diff options
author | Stephen Boyd <sboyd@kernel.org> | 2018-03-16 12:21:40 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2018-03-16 12:23:17 -0400 |
commit | 1871f0fcba5debf21d5b0475e6a064dc5c21a026 (patch) | |
tree | 3f666e9aa7ab636c7e33a855c5a8a220b647131e | |
parent | c7e4e0d7ccc35dc7a0c4fbdb76318fb2f88e73a3 (diff) |
clk: samsung: Mark a few things static
Running sparse on the samsung clk directory has some noise that we can
fix to look for future problems easier.
drivers/clk/samsung/clk-s3c2443.c:111:26: warning: symbol 's3c2443_common_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:139:26: warning: symbol 's3c2443_common_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:152:27: warning: symbol 's3c2443_common_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:186:28: warning: symbol 's3c2443_common_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:241:26: warning: symbol 's3c2416_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:247:26: warning: symbol 's3c2416_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:253:27: warning: symbol 's3c2416_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:263:28: warning: symbol 's3c2416_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:291:26: warning: symbol 's3c2443_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:296:27: warning: symbol 's3c2443_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:305:28: warning: symbol 's3c2443_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:321:26: warning: symbol 's3c2450_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:328:26: warning: symbol 's3c2450_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:334:27: warning: symbol 's3c2450_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:345:28: warning: symbol 's3c2450_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:368:33: warning: symbol 's3c2443_common_frate_clks' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2443.c:464:49: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-s3c2443.c:470:49: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-s3c2443.c:476:49: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-s3c2412.c:96:26: warning: symbol 's3c2412_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2412.c:108:35: warning: symbol 's3c2412_ffactor' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2412.c:128:26: warning: symbol 's3c2412_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2412.c:146:27: warning: symbol 's3c2412_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2412.c:177:28: warning: symbol 's3c2412_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2412.c:227:33: warning: symbol 's3c2412_common_frate_clks' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2412.c:292:43: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-s3c2410.c:98:26: warning: symbol 's3c2410_common_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:114:26: warning: symbol 's3c2410_common_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:119:27: warning: symbol 's3c2410_common_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:138:28: warning: symbol 's3c2410_common_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:203:26: warning: symbol 's3c2410_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:207:35: warning: symbol 's3c2410_ffactor' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:218:28: warning: symbol 's3c2410_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:272:26: warning: symbol 's3c244x_common_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:277:35: warning: symbol 's3c244x_common_ffactor' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:294:26: warning: symbol 's3c244x_common_dividers' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:302:27: warning: symbol 's3c244x_common_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:306:28: warning: symbol 's3c244x_common_aliases' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:321:26: warning: symbol 's3c2440_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:325:27: warning: symbol 's3c2440_gates' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:331:35: warning: symbol 's3c2442_ffactor' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:337:26: warning: symbol 's3c2442_muxes' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:346:33: warning: symbol 's3c2410_common_frate_clks' was not declared. Should it be static?
drivers/clk/samsung/clk-s3c2410.c:471:49: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-s3c2410.c:477:49: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-s3c2410.c:483:49: warning: Using plain integer as NULL pointer
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | drivers/clk/samsung/clk-s3c2410.c | 40 | ||||
-rw-r--r-- | drivers/clk/samsung/clk-s3c2412.c | 14 | ||||
-rw-r--r-- | drivers/clk/samsung/clk-s3c2443.c | 38 |
3 files changed, 46 insertions, 46 deletions
diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c index 0c6aa3e51336..a9c887475054 100644 --- a/drivers/clk/samsung/clk-s3c2410.c +++ b/drivers/clk/samsung/clk-s3c2410.c | |||
@@ -95,7 +95,7 @@ static void __init s3c2410_clk_sleep_init(void) {} | |||
95 | 95 | ||
96 | PNAME(fclk_p) = { "mpll", "div_slow" }; | 96 | PNAME(fclk_p) = { "mpll", "div_slow" }; |
97 | 97 | ||
98 | struct samsung_mux_clock s3c2410_common_muxes[] __initdata = { | 98 | static struct samsung_mux_clock s3c2410_common_muxes[] __initdata = { |
99 | MUX(FCLK, "fclk", fclk_p, CLKSLOW, 4, 1), | 99 | MUX(FCLK, "fclk", fclk_p, CLKSLOW, 4, 1), |
100 | }; | 100 | }; |
101 | 101 | ||
@@ -111,12 +111,12 @@ static struct clk_div_table divslow_d[] = { | |||
111 | { /* sentinel */ }, | 111 | { /* sentinel */ }, |
112 | }; | 112 | }; |
113 | 113 | ||
114 | struct samsung_div_clock s3c2410_common_dividers[] __initdata = { | 114 | static struct samsung_div_clock s3c2410_common_dividers[] __initdata = { |
115 | DIV_T(0, "div_slow", "xti", CLKSLOW, 0, 3, divslow_d), | 115 | DIV_T(0, "div_slow", "xti", CLKSLOW, 0, 3, divslow_d), |
116 | DIV(PCLK, "pclk", "hclk", CLKDIVN, 0, 1), | 116 | DIV(PCLK, "pclk", "hclk", CLKDIVN, 0, 1), |
117 | }; | 117 | }; |
118 | 118 | ||
119 | struct samsung_gate_clock s3c2410_common_gates[] __initdata = { | 119 | static struct samsung_gate_clock s3c2410_common_gates[] __initdata = { |
120 | GATE(PCLK_SPI, "spi", "pclk", CLKCON, 18, 0, 0), | 120 | GATE(PCLK_SPI, "spi", "pclk", CLKCON, 18, 0, 0), |
121 | GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 17, 0, 0), | 121 | GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 17, 0, 0), |
122 | GATE(PCLK_I2C, "i2c", "pclk", CLKCON, 16, 0, 0), | 122 | GATE(PCLK_I2C, "i2c", "pclk", CLKCON, 16, 0, 0), |
@@ -135,7 +135,7 @@ struct samsung_gate_clock s3c2410_common_gates[] __initdata = { | |||
135 | }; | 135 | }; |
136 | 136 | ||
137 | /* should be added _after_ the soc-specific clocks are created */ | 137 | /* should be added _after_ the soc-specific clocks are created */ |
138 | struct samsung_clock_alias s3c2410_common_aliases[] __initdata = { | 138 | static struct samsung_clock_alias s3c2410_common_aliases[] __initdata = { |
139 | ALIAS(PCLK_I2C, "s3c2410-i2c.0", "i2c"), | 139 | ALIAS(PCLK_I2C, "s3c2410-i2c.0", "i2c"), |
140 | ALIAS(PCLK_ADC, NULL, "adc"), | 140 | ALIAS(PCLK_ADC, NULL, "adc"), |
141 | ALIAS(PCLK_RTC, NULL, "rtc"), | 141 | ALIAS(PCLK_RTC, NULL, "rtc"), |
@@ -200,11 +200,11 @@ static struct samsung_pll_clock s3c2410_plls[] __initdata = { | |||
200 | LOCKTIME, UPLLCON, NULL), | 200 | LOCKTIME, UPLLCON, NULL), |
201 | }; | 201 | }; |
202 | 202 | ||
203 | struct samsung_div_clock s3c2410_dividers[] __initdata = { | 203 | static struct samsung_div_clock s3c2410_dividers[] __initdata = { |
204 | DIV(HCLK, "hclk", "mpll", CLKDIVN, 1, 1), | 204 | DIV(HCLK, "hclk", "mpll", CLKDIVN, 1, 1), |
205 | }; | 205 | }; |
206 | 206 | ||
207 | struct samsung_fixed_factor_clock s3c2410_ffactor[] __initdata = { | 207 | static struct samsung_fixed_factor_clock s3c2410_ffactor[] __initdata = { |
208 | /* | 208 | /* |
209 | * armclk is directly supplied by the fclk, without | 209 | * armclk is directly supplied by the fclk, without |
210 | * switching possibility like on the s3c244x below. | 210 | * switching possibility like on the s3c244x below. |
@@ -215,7 +215,7 @@ struct samsung_fixed_factor_clock s3c2410_ffactor[] __initdata = { | |||
215 | FFACTOR(UCLK, "uclk", "upll", 1, 1, 0), | 215 | FFACTOR(UCLK, "uclk", "upll", 1, 1, 0), |
216 | }; | 216 | }; |
217 | 217 | ||
218 | struct samsung_clock_alias s3c2410_aliases[] __initdata = { | 218 | static struct samsung_clock_alias s3c2410_aliases[] __initdata = { |
219 | ALIAS(PCLK_UART0, "s3c2410-uart.0", "uart"), | 219 | ALIAS(PCLK_UART0, "s3c2410-uart.0", "uart"), |
220 | ALIAS(PCLK_UART1, "s3c2410-uart.1", "uart"), | 220 | ALIAS(PCLK_UART1, "s3c2410-uart.1", "uart"), |
221 | ALIAS(PCLK_UART2, "s3c2410-uart.2", "uart"), | 221 | ALIAS(PCLK_UART2, "s3c2410-uart.2", "uart"), |
@@ -269,12 +269,12 @@ static struct samsung_pll_clock s3c244x_common_plls[] __initdata = { | |||
269 | PNAME(hclk_p) = { "fclk", "div_hclk_2", "div_hclk_4", "div_hclk_3" }; | 269 | PNAME(hclk_p) = { "fclk", "div_hclk_2", "div_hclk_4", "div_hclk_3" }; |
270 | PNAME(armclk_p) = { "fclk", "hclk" }; | 270 | PNAME(armclk_p) = { "fclk", "hclk" }; |
271 | 271 | ||
272 | struct samsung_mux_clock s3c244x_common_muxes[] __initdata = { | 272 | static struct samsung_mux_clock s3c244x_common_muxes[] __initdata = { |
273 | MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2), | 273 | MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2), |
274 | MUX(ARMCLK, "armclk", armclk_p, CAMDIVN, 12, 1), | 274 | MUX(ARMCLK, "armclk", armclk_p, CAMDIVN, 12, 1), |
275 | }; | 275 | }; |
276 | 276 | ||
277 | struct samsung_fixed_factor_clock s3c244x_common_ffactor[] __initdata = { | 277 | static struct samsung_fixed_factor_clock s3c244x_common_ffactor[] __initdata = { |
278 | FFACTOR(0, "div_hclk_2", "fclk", 1, 2, 0), | 278 | FFACTOR(0, "div_hclk_2", "fclk", 1, 2, 0), |
279 | FFACTOR(0, "ff_cam", "div_cam", 2, 1, CLK_SET_RATE_PARENT), | 279 | FFACTOR(0, "ff_cam", "div_cam", 2, 1, CLK_SET_RATE_PARENT), |
280 | }; | 280 | }; |
@@ -291,7 +291,7 @@ static struct clk_div_table div_hclk_3_d[] = { | |||
291 | { /* sentinel */ }, | 291 | { /* sentinel */ }, |
292 | }; | 292 | }; |
293 | 293 | ||
294 | struct samsung_div_clock s3c244x_common_dividers[] __initdata = { | 294 | static struct samsung_div_clock s3c244x_common_dividers[] __initdata = { |
295 | DIV(UCLK, "uclk", "upll", CLKDIVN, 3, 1), | 295 | DIV(UCLK, "uclk", "upll", CLKDIVN, 3, 1), |
296 | DIV(0, "div_hclk", "fclk", CLKDIVN, 1, 1), | 296 | DIV(0, "div_hclk", "fclk", CLKDIVN, 1, 1), |
297 | DIV_T(0, "div_hclk_4", "fclk", CAMDIVN, 9, 1, div_hclk_4_d), | 297 | DIV_T(0, "div_hclk_4", "fclk", CAMDIVN, 9, 1, div_hclk_4_d), |
@@ -299,11 +299,11 @@ struct samsung_div_clock s3c244x_common_dividers[] __initdata = { | |||
299 | DIV(0, "div_cam", "upll", CAMDIVN, 0, 3), | 299 | DIV(0, "div_cam", "upll", CAMDIVN, 0, 3), |
300 | }; | 300 | }; |
301 | 301 | ||
302 | struct samsung_gate_clock s3c244x_common_gates[] __initdata = { | 302 | static struct samsung_gate_clock s3c244x_common_gates[] __initdata = { |
303 | GATE(HCLK_CAM, "cam", "hclk", CLKCON, 19, 0, 0), | 303 | GATE(HCLK_CAM, "cam", "hclk", CLKCON, 19, 0, 0), |
304 | }; | 304 | }; |
305 | 305 | ||
306 | struct samsung_clock_alias s3c244x_common_aliases[] __initdata = { | 306 | static struct samsung_clock_alias s3c244x_common_aliases[] __initdata = { |
307 | ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"), | 307 | ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"), |
308 | ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"), | 308 | ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"), |
309 | ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"), | 309 | ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"), |
@@ -318,23 +318,23 @@ struct samsung_clock_alias s3c244x_common_aliases[] __initdata = { | |||
318 | 318 | ||
319 | PNAME(s3c2440_camif_p) = { "upll", "ff_cam" }; | 319 | PNAME(s3c2440_camif_p) = { "upll", "ff_cam" }; |
320 | 320 | ||
321 | struct samsung_mux_clock s3c2440_muxes[] __initdata = { | 321 | static struct samsung_mux_clock s3c2440_muxes[] __initdata = { |
322 | MUX(CAMIF, "camif", s3c2440_camif_p, CAMDIVN, 4, 1), | 322 | MUX(CAMIF, "camif", s3c2440_camif_p, CAMDIVN, 4, 1), |
323 | }; | 323 | }; |
324 | 324 | ||
325 | struct samsung_gate_clock s3c2440_gates[] __initdata = { | 325 | static struct samsung_gate_clock s3c2440_gates[] __initdata = { |
326 | GATE(PCLK_AC97, "ac97", "pclk", CLKCON, 20, 0, 0), | 326 | GATE(PCLK_AC97, "ac97", "pclk", CLKCON, 20, 0, 0), |
327 | }; | 327 | }; |
328 | 328 | ||
329 | /* S3C2442 specific clocks */ | 329 | /* S3C2442 specific clocks */ |
330 | 330 | ||
331 | struct samsung_fixed_factor_clock s3c2442_ffactor[] __initdata = { | 331 | static struct samsung_fixed_factor_clock s3c2442_ffactor[] __initdata = { |
332 | FFACTOR(0, "upll_3", "upll", 1, 3, 0), | 332 | FFACTOR(0, "upll_3", "upll", 1, 3, 0), |
333 | }; | 333 | }; |
334 | 334 | ||
335 | PNAME(s3c2442_camif_p) = { "upll", "ff_cam", "upll", "upll_3" }; | 335 | PNAME(s3c2442_camif_p) = { "upll", "ff_cam", "upll", "upll_3" }; |
336 | 336 | ||
337 | struct samsung_mux_clock s3c2442_muxes[] __initdata = { | 337 | static struct samsung_mux_clock s3c2442_muxes[] __initdata = { |
338 | MUX(CAMIF, "camif", s3c2442_camif_p, CAMDIVN, 4, 2), | 338 | MUX(CAMIF, "camif", s3c2442_camif_p, CAMDIVN, 4, 2), |
339 | }; | 339 | }; |
340 | 340 | ||
@@ -343,7 +343,7 @@ struct samsung_mux_clock s3c2442_muxes[] __initdata = { | |||
343 | * Only necessary until the devicetree-move is complete | 343 | * Only necessary until the devicetree-move is complete |
344 | */ | 344 | */ |
345 | #define XTI 1 | 345 | #define XTI 1 |
346 | struct samsung_fixed_rate_clock s3c2410_common_frate_clks[] __initdata = { | 346 | static struct samsung_fixed_rate_clock s3c2410_common_frate_clks[] __initdata = { |
347 | FRATE(XTI, "xti", NULL, 0, 0), | 347 | FRATE(XTI, "xti", NULL, 0, 0), |
348 | }; | 348 | }; |
349 | 349 | ||
@@ -468,18 +468,18 @@ void __init s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f, | |||
468 | 468 | ||
469 | static void __init s3c2410_clk_init(struct device_node *np) | 469 | static void __init s3c2410_clk_init(struct device_node *np) |
470 | { | 470 | { |
471 | s3c2410_common_clk_init(np, 0, S3C2410, 0); | 471 | s3c2410_common_clk_init(np, 0, S3C2410, NULL); |
472 | } | 472 | } |
473 | CLK_OF_DECLARE(s3c2410_clk, "samsung,s3c2410-clock", s3c2410_clk_init); | 473 | CLK_OF_DECLARE(s3c2410_clk, "samsung,s3c2410-clock", s3c2410_clk_init); |
474 | 474 | ||
475 | static void __init s3c2440_clk_init(struct device_node *np) | 475 | static void __init s3c2440_clk_init(struct device_node *np) |
476 | { | 476 | { |
477 | s3c2410_common_clk_init(np, 0, S3C2440, 0); | 477 | s3c2410_common_clk_init(np, 0, S3C2440, NULL); |
478 | } | 478 | } |
479 | CLK_OF_DECLARE(s3c2440_clk, "samsung,s3c2440-clock", s3c2440_clk_init); | 479 | CLK_OF_DECLARE(s3c2440_clk, "samsung,s3c2440-clock", s3c2440_clk_init); |
480 | 480 | ||
481 | static void __init s3c2442_clk_init(struct device_node *np) | 481 | static void __init s3c2442_clk_init(struct device_node *np) |
482 | { | 482 | { |
483 | s3c2410_common_clk_init(np, 0, S3C2442, 0); | 483 | s3c2410_common_clk_init(np, 0, S3C2442, NULL); |
484 | } | 484 | } |
485 | CLK_OF_DECLARE(s3c2442_clk, "samsung,s3c2442-clock", s3c2442_clk_init); | 485 | CLK_OF_DECLARE(s3c2442_clk, "samsung,s3c2442-clock", s3c2442_clk_init); |
diff --git a/drivers/clk/samsung/clk-s3c2412.c b/drivers/clk/samsung/clk-s3c2412.c index 1555e407529e..6bc94d3aff78 100644 --- a/drivers/clk/samsung/clk-s3c2412.c +++ b/drivers/clk/samsung/clk-s3c2412.c | |||
@@ -93,7 +93,7 @@ static struct clk_div_table divxti_d[] = { | |||
93 | { /* sentinel */ }, | 93 | { /* sentinel */ }, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | struct samsung_div_clock s3c2412_dividers[] __initdata = { | 96 | static struct samsung_div_clock s3c2412_dividers[] __initdata = { |
97 | DIV_T(0, "div_xti", "xti", CLKSRC, 0, 3, divxti_d), | 97 | DIV_T(0, "div_xti", "xti", CLKSRC, 0, 3, divxti_d), |
98 | DIV(0, "div_cam", "mux_cam", CLKDIVN, 16, 4), | 98 | DIV(0, "div_cam", "mux_cam", CLKDIVN, 16, 4), |
99 | DIV(0, "div_i2s", "mux_i2s", CLKDIVN, 12, 4), | 99 | DIV(0, "div_i2s", "mux_i2s", CLKDIVN, 12, 4), |
@@ -105,7 +105,7 @@ struct samsung_div_clock s3c2412_dividers[] __initdata = { | |||
105 | DIV(HCLK, "hclk", "armdiv", CLKDIVN, 0, 2), | 105 | DIV(HCLK, "hclk", "armdiv", CLKDIVN, 0, 2), |
106 | }; | 106 | }; |
107 | 107 | ||
108 | struct samsung_fixed_factor_clock s3c2412_ffactor[] __initdata = { | 108 | static struct samsung_fixed_factor_clock s3c2412_ffactor[] __initdata = { |
109 | FFACTOR(0, "ff_hclk", "hclk", 2, 1, CLK_SET_RATE_PARENT), | 109 | FFACTOR(0, "ff_hclk", "hclk", 2, 1, CLK_SET_RATE_PARENT), |
110 | }; | 110 | }; |
111 | 111 | ||
@@ -125,7 +125,7 @@ PNAME(msysclk_p) = { "mdivclk", "mpll" }; | |||
125 | PNAME(mdivclk_p) = { "xti", "div_xti" }; | 125 | PNAME(mdivclk_p) = { "xti", "div_xti" }; |
126 | PNAME(armclk_p) = { "armdiv", "hclk" }; | 126 | PNAME(armclk_p) = { "armdiv", "hclk" }; |
127 | 127 | ||
128 | struct samsung_mux_clock s3c2412_muxes[] __initdata = { | 128 | static struct samsung_mux_clock s3c2412_muxes[] __initdata = { |
129 | MUX(0, "erefclk", erefclk_p, CLKSRC, 14, 2), | 129 | MUX(0, "erefclk", erefclk_p, CLKSRC, 14, 2), |
130 | MUX(0, "urefclk", urefclk_p, CLKSRC, 12, 2), | 130 | MUX(0, "urefclk", urefclk_p, CLKSRC, 12, 2), |
131 | MUX(0, "mux_cam", camclk_p, CLKSRC, 11, 1), | 131 | MUX(0, "mux_cam", camclk_p, CLKSRC, 11, 1), |
@@ -143,7 +143,7 @@ static struct samsung_pll_clock s3c2412_plls[] __initdata = { | |||
143 | PLL(pll_s3c2410_upll, UPLL, "upll", "urefclk", LOCKTIME, UPLLCON, NULL), | 143 | PLL(pll_s3c2410_upll, UPLL, "upll", "urefclk", LOCKTIME, UPLLCON, NULL), |
144 | }; | 144 | }; |
145 | 145 | ||
146 | struct samsung_gate_clock s3c2412_gates[] __initdata = { | 146 | static struct samsung_gate_clock s3c2412_gates[] __initdata = { |
147 | GATE(PCLK_WDT, "wdt", "pclk", CLKCON, 28, 0, 0), | 147 | GATE(PCLK_WDT, "wdt", "pclk", CLKCON, 28, 0, 0), |
148 | GATE(PCLK_SPI, "spi", "pclk", CLKCON, 27, 0, 0), | 148 | GATE(PCLK_SPI, "spi", "pclk", CLKCON, 27, 0, 0), |
149 | GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 26, 0, 0), | 149 | GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 26, 0, 0), |
@@ -174,7 +174,7 @@ struct samsung_gate_clock s3c2412_gates[] __initdata = { | |||
174 | GATE(HCLK_DMA0, "dma0", "hclk", CLKCON, 0, CLK_IGNORE_UNUSED, 0), | 174 | GATE(HCLK_DMA0, "dma0", "hclk", CLKCON, 0, CLK_IGNORE_UNUSED, 0), |
175 | }; | 175 | }; |
176 | 176 | ||
177 | struct samsung_clock_alias s3c2412_aliases[] __initdata = { | 177 | static struct samsung_clock_alias s3c2412_aliases[] __initdata = { |
178 | ALIAS(PCLK_UART0, "s3c2412-uart.0", "uart"), | 178 | ALIAS(PCLK_UART0, "s3c2412-uart.0", "uart"), |
179 | ALIAS(PCLK_UART1, "s3c2412-uart.1", "uart"), | 179 | ALIAS(PCLK_UART1, "s3c2412-uart.1", "uart"), |
180 | ALIAS(PCLK_UART2, "s3c2412-uart.2", "uart"), | 180 | ALIAS(PCLK_UART2, "s3c2412-uart.2", "uart"), |
@@ -224,7 +224,7 @@ static struct notifier_block s3c2412_restart_handler = { | |||
224 | * Only necessary until the devicetree-move is complete | 224 | * Only necessary until the devicetree-move is complete |
225 | */ | 225 | */ |
226 | #define XTI 1 | 226 | #define XTI 1 |
227 | struct samsung_fixed_rate_clock s3c2412_common_frate_clks[] __initdata = { | 227 | static struct samsung_fixed_rate_clock s3c2412_common_frate_clks[] __initdata = { |
228 | FRATE(XTI, "xti", NULL, 0, 0), | 228 | FRATE(XTI, "xti", NULL, 0, 0), |
229 | FRATE(0, "ext", NULL, 0, 0), | 229 | FRATE(0, "ext", NULL, 0, 0), |
230 | }; | 230 | }; |
@@ -289,6 +289,6 @@ void __init s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f, | |||
289 | 289 | ||
290 | static void __init s3c2412_clk_init(struct device_node *np) | 290 | static void __init s3c2412_clk_init(struct device_node *np) |
291 | { | 291 | { |
292 | s3c2412_common_clk_init(np, 0, 0, 0); | 292 | s3c2412_common_clk_init(np, 0, 0, NULL); |
293 | } | 293 | } |
294 | CLK_OF_DECLARE(s3c2412_clk, "samsung,s3c2412-clock", s3c2412_clk_init); | 294 | CLK_OF_DECLARE(s3c2412_clk, "samsung,s3c2412-clock", s3c2412_clk_init); |
diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c index 9580a6baf4d7..c46e6d5bc9bc 100644 --- a/drivers/clk/samsung/clk-s3c2443.c +++ b/drivers/clk/samsung/clk-s3c2443.c | |||
@@ -108,7 +108,7 @@ PNAME(msysclk_p) = { "mpllref", "mpll" }; | |||
108 | PNAME(armclk_p) = { "armdiv" , "hclk" }; | 108 | PNAME(armclk_p) = { "armdiv" , "hclk" }; |
109 | PNAME(i2s0_p) = { "div_i2s0", "ext_i2s", "epllref", "epllref" }; | 109 | PNAME(i2s0_p) = { "div_i2s0", "ext_i2s", "epllref", "epllref" }; |
110 | 110 | ||
111 | struct samsung_mux_clock s3c2443_common_muxes[] __initdata = { | 111 | static struct samsung_mux_clock s3c2443_common_muxes[] __initdata = { |
112 | MUX(0, "epllref", epllref_p, CLKSRC, 7, 2), | 112 | MUX(0, "epllref", epllref_p, CLKSRC, 7, 2), |
113 | MUX(ESYSCLK, "esysclk", esysclk_p, CLKSRC, 6, 1), | 113 | MUX(ESYSCLK, "esysclk", esysclk_p, CLKSRC, 6, 1), |
114 | MUX(0, "mpllref", mpllref_p, CLKSRC, 3, 1), | 114 | MUX(0, "mpllref", mpllref_p, CLKSRC, 3, 1), |
@@ -136,7 +136,7 @@ static struct clk_div_table mdivclk_d[] = { | |||
136 | { /* sentinel */ }, | 136 | { /* sentinel */ }, |
137 | }; | 137 | }; |
138 | 138 | ||
139 | struct samsung_div_clock s3c2443_common_dividers[] __initdata = { | 139 | static struct samsung_div_clock s3c2443_common_dividers[] __initdata = { |
140 | DIV_T(0, "mdivclk", "xti", CLKDIV0, 6, 3, mdivclk_d), | 140 | DIV_T(0, "mdivclk", "xti", CLKDIV0, 6, 3, mdivclk_d), |
141 | DIV(0, "prediv", "msysclk", CLKDIV0, 4, 2), | 141 | DIV(0, "prediv", "msysclk", CLKDIV0, 4, 2), |
142 | DIV_T(HCLK, "hclk", "prediv", CLKDIV0, 0, 2, hclk_d), | 142 | DIV_T(HCLK, "hclk", "prediv", CLKDIV0, 0, 2, hclk_d), |
@@ -149,7 +149,7 @@ struct samsung_div_clock s3c2443_common_dividers[] __initdata = { | |||
149 | DIV(0, "div_usbhost", "esysclk", CLKDIV1, 4, 2), | 149 | DIV(0, "div_usbhost", "esysclk", CLKDIV1, 4, 2), |
150 | }; | 150 | }; |
151 | 151 | ||
152 | struct samsung_gate_clock s3c2443_common_gates[] __initdata = { | 152 | static struct samsung_gate_clock s3c2443_common_gates[] __initdata = { |
153 | GATE(SCLK_HSMMC_EXT, "sclk_hsmmcext", "ext", SCLKCON, 13, 0, 0), | 153 | GATE(SCLK_HSMMC_EXT, "sclk_hsmmcext", "ext", SCLKCON, 13, 0, 0), |
154 | GATE(SCLK_HSMMC1, "sclk_hsmmc1", "div_hsmmc1", SCLKCON, 12, 0, 0), | 154 | GATE(SCLK_HSMMC1, "sclk_hsmmc1", "div_hsmmc1", SCLKCON, 12, 0, 0), |
155 | GATE(SCLK_FIMD, "sclk_fimd", "div_fimd", SCLKCON, 10, 0, 0), | 155 | GATE(SCLK_FIMD, "sclk_fimd", "div_fimd", SCLKCON, 10, 0, 0), |
@@ -183,7 +183,7 @@ struct samsung_gate_clock s3c2443_common_gates[] __initdata = { | |||
183 | GATE(PCLK_UART0, "uart0", "pclk", PCLKCON, 0, 0, 0), | 183 | GATE(PCLK_UART0, "uart0", "pclk", PCLKCON, 0, 0, 0), |
184 | }; | 184 | }; |
185 | 185 | ||
186 | struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { | 186 | static struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { |
187 | ALIAS(MSYSCLK, NULL, "msysclk"), | 187 | ALIAS(MSYSCLK, NULL, "msysclk"), |
188 | ALIAS(ARMCLK, NULL, "armclk"), | 188 | ALIAS(ARMCLK, NULL, "armclk"), |
189 | ALIAS(MPLL, NULL, "mpll"), | 189 | ALIAS(MPLL, NULL, "mpll"), |
@@ -238,19 +238,19 @@ static struct clk_div_table armdiv_s3c2416_d[] = { | |||
238 | { /* sentinel */ }, | 238 | { /* sentinel */ }, |
239 | }; | 239 | }; |
240 | 240 | ||
241 | struct samsung_div_clock s3c2416_dividers[] __initdata = { | 241 | static struct samsung_div_clock s3c2416_dividers[] __initdata = { |
242 | DIV_T(ARMDIV, "armdiv", "msysclk", CLKDIV0, 9, 3, armdiv_s3c2416_d), | 242 | DIV_T(ARMDIV, "armdiv", "msysclk", CLKDIV0, 9, 3, armdiv_s3c2416_d), |
243 | DIV(0, "div_hsspi0_mpll", "msysclk", CLKDIV2, 0, 4), | 243 | DIV(0, "div_hsspi0_mpll", "msysclk", CLKDIV2, 0, 4), |
244 | DIV(0, "div_hsmmc0", "esysclk", CLKDIV2, 6, 2), | 244 | DIV(0, "div_hsmmc0", "esysclk", CLKDIV2, 6, 2), |
245 | }; | 245 | }; |
246 | 246 | ||
247 | struct samsung_mux_clock s3c2416_muxes[] __initdata = { | 247 | static struct samsung_mux_clock s3c2416_muxes[] __initdata = { |
248 | MUX(MUX_HSMMC0, "mux_hsmmc0", s3c2416_hsmmc0_p, CLKSRC, 16, 1), | 248 | MUX(MUX_HSMMC0, "mux_hsmmc0", s3c2416_hsmmc0_p, CLKSRC, 16, 1), |
249 | MUX(MUX_HSMMC1, "mux_hsmmc1", s3c2416_hsmmc1_p, CLKSRC, 17, 1), | 249 | MUX(MUX_HSMMC1, "mux_hsmmc1", s3c2416_hsmmc1_p, CLKSRC, 17, 1), |
250 | MUX(MUX_HSSPI0, "mux_hsspi0", s3c2416_hsspi0_p, CLKSRC, 18, 1), | 250 | MUX(MUX_HSSPI0, "mux_hsspi0", s3c2416_hsspi0_p, CLKSRC, 18, 1), |
251 | }; | 251 | }; |
252 | 252 | ||
253 | struct samsung_gate_clock s3c2416_gates[] __initdata = { | 253 | static struct samsung_gate_clock s3c2416_gates[] __initdata = { |
254 | GATE(0, "hsspi0_mpll", "div_hsspi0_mpll", SCLKCON, 19, 0, 0), | 254 | GATE(0, "hsspi0_mpll", "div_hsspi0_mpll", SCLKCON, 19, 0, 0), |
255 | GATE(0, "hsspi0_epll", "div_hsspi0_epll", SCLKCON, 14, 0, 0), | 255 | GATE(0, "hsspi0_epll", "div_hsspi0_epll", SCLKCON, 14, 0, 0), |
256 | GATE(0, "sclk_hsmmc0", "div_hsmmc0", SCLKCON, 6, 0, 0), | 256 | GATE(0, "sclk_hsmmc0", "div_hsmmc0", SCLKCON, 6, 0, 0), |
@@ -260,7 +260,7 @@ struct samsung_gate_clock s3c2416_gates[] __initdata = { | |||
260 | GATE(PCLK_PCM, "pcm", "pclk", PCLKCON, 19, 0, 0), | 260 | GATE(PCLK_PCM, "pcm", "pclk", PCLKCON, 19, 0, 0), |
261 | }; | 261 | }; |
262 | 262 | ||
263 | struct samsung_clock_alias s3c2416_aliases[] __initdata = { | 263 | static struct samsung_clock_alias s3c2416_aliases[] __initdata = { |
264 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "hsmmc"), | 264 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "hsmmc"), |
265 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "mmc_busclk.0"), | 265 | ALIAS(HCLK_HSMMC0, "s3c-sdhci.0", "mmc_busclk.0"), |
266 | ALIAS(MUX_HSMMC0, "s3c-sdhci.0", "mmc_busclk.2"), | 266 | ALIAS(MUX_HSMMC0, "s3c-sdhci.0", "mmc_busclk.2"), |
@@ -288,12 +288,12 @@ static struct clk_div_table armdiv_s3c2443_d[] = { | |||
288 | { /* sentinel */ }, | 288 | { /* sentinel */ }, |
289 | }; | 289 | }; |
290 | 290 | ||
291 | struct samsung_div_clock s3c2443_dividers[] __initdata = { | 291 | static struct samsung_div_clock s3c2443_dividers[] __initdata = { |
292 | DIV_T(ARMDIV, "armdiv", "msysclk", CLKDIV0, 9, 4, armdiv_s3c2443_d), | 292 | DIV_T(ARMDIV, "armdiv", "msysclk", CLKDIV0, 9, 4, armdiv_s3c2443_d), |
293 | DIV(0, "div_cam", "esysclk", CLKDIV1, 26, 4), | 293 | DIV(0, "div_cam", "esysclk", CLKDIV1, 26, 4), |
294 | }; | 294 | }; |
295 | 295 | ||
296 | struct samsung_gate_clock s3c2443_gates[] __initdata = { | 296 | static struct samsung_gate_clock s3c2443_gates[] __initdata = { |
297 | GATE(SCLK_HSSPI0, "sclk_hsspi0", "div_hsspi0_epll", SCLKCON, 14, 0, 0), | 297 | GATE(SCLK_HSSPI0, "sclk_hsspi0", "div_hsspi0_epll", SCLKCON, 14, 0, 0), |
298 | GATE(SCLK_CAM, "sclk_cam", "div_cam", SCLKCON, 11, 0, 0), | 298 | GATE(SCLK_CAM, "sclk_cam", "div_cam", SCLKCON, 11, 0, 0), |
299 | GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, CLK_IGNORE_UNUSED, 0), | 299 | GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, CLK_IGNORE_UNUSED, 0), |
@@ -302,7 +302,7 @@ struct samsung_gate_clock s3c2443_gates[] __initdata = { | |||
302 | GATE(PCLK_SDI, "sdi", "pclk", PCLKCON, 5, 0, 0), | 302 | GATE(PCLK_SDI, "sdi", "pclk", PCLKCON, 5, 0, 0), |
303 | }; | 303 | }; |
304 | 304 | ||
305 | struct samsung_clock_alias s3c2443_aliases[] __initdata = { | 305 | static struct samsung_clock_alias s3c2443_aliases[] __initdata = { |
306 | ALIAS(SCLK_HSSPI0, "s3c2443-spi.0", "spi_busclk2"), | 306 | ALIAS(SCLK_HSSPI0, "s3c2443-spi.0", "spi_busclk2"), |
307 | ALIAS(SCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.2"), | 307 | ALIAS(SCLK_HSMMC1, "s3c-sdhci.1", "mmc_busclk.2"), |
308 | ALIAS(SCLK_CAM, NULL, "camif-upll"), | 308 | ALIAS(SCLK_CAM, NULL, "camif-upll"), |
@@ -318,20 +318,20 @@ PNAME(s3c2450_cam_p) = { "div_cam", "hclk" }; | |||
318 | PNAME(s3c2450_hsspi1_p) = { "hsspi1_epll", "hsspi1_mpll" }; | 318 | PNAME(s3c2450_hsspi1_p) = { "hsspi1_epll", "hsspi1_mpll" }; |
319 | PNAME(i2s1_p) = { "div_i2s1", "ext_i2s", "epllref", "epllref" }; | 319 | PNAME(i2s1_p) = { "div_i2s1", "ext_i2s", "epllref", "epllref" }; |
320 | 320 | ||
321 | struct samsung_div_clock s3c2450_dividers[] __initdata = { | 321 | static struct samsung_div_clock s3c2450_dividers[] __initdata = { |
322 | DIV(0, "div_cam", "esysclk", CLKDIV1, 26, 4), | 322 | DIV(0, "div_cam", "esysclk", CLKDIV1, 26, 4), |
323 | DIV(0, "div_hsspi1_epll", "esysclk", CLKDIV2, 24, 2), | 323 | DIV(0, "div_hsspi1_epll", "esysclk", CLKDIV2, 24, 2), |
324 | DIV(0, "div_hsspi1_mpll", "msysclk", CLKDIV2, 16, 4), | 324 | DIV(0, "div_hsspi1_mpll", "msysclk", CLKDIV2, 16, 4), |
325 | DIV(0, "div_i2s1", "esysclk", CLKDIV2, 12, 4), | 325 | DIV(0, "div_i2s1", "esysclk", CLKDIV2, 12, 4), |
326 | }; | 326 | }; |
327 | 327 | ||
328 | struct samsung_mux_clock s3c2450_muxes[] __initdata = { | 328 | static struct samsung_mux_clock s3c2450_muxes[] __initdata = { |
329 | MUX(0, "mux_cam", s3c2450_cam_p, CLKSRC, 20, 1), | 329 | MUX(0, "mux_cam", s3c2450_cam_p, CLKSRC, 20, 1), |
330 | MUX(MUX_HSSPI1, "mux_hsspi1", s3c2450_hsspi1_p, CLKSRC, 19, 1), | 330 | MUX(MUX_HSSPI1, "mux_hsspi1", s3c2450_hsspi1_p, CLKSRC, 19, 1), |
331 | MUX(0, "mux_i2s1", i2s1_p, CLKSRC, 12, 2), | 331 | MUX(0, "mux_i2s1", i2s1_p, CLKSRC, 12, 2), |
332 | }; | 332 | }; |
333 | 333 | ||
334 | struct samsung_gate_clock s3c2450_gates[] __initdata = { | 334 | static struct samsung_gate_clock s3c2450_gates[] __initdata = { |
335 | GATE(SCLK_I2S1, "sclk_i2s1", "div_i2s1", SCLKCON, 5, 0, 0), | 335 | GATE(SCLK_I2S1, "sclk_i2s1", "div_i2s1", SCLKCON, 5, 0, 0), |
336 | GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, 0, 0), | 336 | GATE(HCLK_CFC, "cfc", "hclk", HCLKCON, 17, 0, 0), |
337 | GATE(HCLK_CAM, "cam", "hclk", HCLKCON, 8, 0, 0), | 337 | GATE(HCLK_CAM, "cam", "hclk", HCLKCON, 8, 0, 0), |
@@ -342,7 +342,7 @@ struct samsung_gate_clock s3c2450_gates[] __initdata = { | |||
342 | GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 14, 0, 0), | 342 | GATE(PCLK_SPI1, "spi1", "pclk", PCLKCON, 14, 0, 0), |
343 | }; | 343 | }; |
344 | 344 | ||
345 | struct samsung_clock_alias s3c2450_aliases[] __initdata = { | 345 | static struct samsung_clock_alias s3c2450_aliases[] __initdata = { |
346 | ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi"), | 346 | ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi"), |
347 | ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi_busclk0"), | 347 | ALIAS(PCLK_SPI1, "s3c2443-spi.1", "spi_busclk0"), |
348 | ALIAS(MUX_HSSPI1, "s3c2443-spi.1", "spi_busclk2"), | 348 | ALIAS(MUX_HSSPI1, "s3c2443-spi.1", "spi_busclk2"), |
@@ -365,7 +365,7 @@ static struct notifier_block s3c2443_restart_handler = { | |||
365 | * fixed rate clocks generated outside the soc | 365 | * fixed rate clocks generated outside the soc |
366 | * Only necessary until the devicetree-move is complete | 366 | * Only necessary until the devicetree-move is complete |
367 | */ | 367 | */ |
368 | struct samsung_fixed_rate_clock s3c2443_common_frate_clks[] __initdata = { | 368 | static struct samsung_fixed_rate_clock s3c2443_common_frate_clks[] __initdata = { |
369 | FRATE(0, "xti", NULL, 0, 0), | 369 | FRATE(0, "xti", NULL, 0, 0), |
370 | FRATE(0, "ext", NULL, 0, 0), | 370 | FRATE(0, "ext", NULL, 0, 0), |
371 | FRATE(0, "ext_i2s", NULL, 0, 0), | 371 | FRATE(0, "ext_i2s", NULL, 0, 0), |
@@ -461,18 +461,18 @@ void __init s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f, | |||
461 | 461 | ||
462 | static void __init s3c2416_clk_init(struct device_node *np) | 462 | static void __init s3c2416_clk_init(struct device_node *np) |
463 | { | 463 | { |
464 | s3c2443_common_clk_init(np, 0, S3C2416, 0); | 464 | s3c2443_common_clk_init(np, 0, S3C2416, NULL); |
465 | } | 465 | } |
466 | CLK_OF_DECLARE(s3c2416_clk, "samsung,s3c2416-clock", s3c2416_clk_init); | 466 | CLK_OF_DECLARE(s3c2416_clk, "samsung,s3c2416-clock", s3c2416_clk_init); |
467 | 467 | ||
468 | static void __init s3c2443_clk_init(struct device_node *np) | 468 | static void __init s3c2443_clk_init(struct device_node *np) |
469 | { | 469 | { |
470 | s3c2443_common_clk_init(np, 0, S3C2443, 0); | 470 | s3c2443_common_clk_init(np, 0, S3C2443, NULL); |
471 | } | 471 | } |
472 | CLK_OF_DECLARE(s3c2443_clk, "samsung,s3c2443-clock", s3c2443_clk_init); | 472 | CLK_OF_DECLARE(s3c2443_clk, "samsung,s3c2443-clock", s3c2443_clk_init); |
473 | 473 | ||
474 | static void __init s3c2450_clk_init(struct device_node *np) | 474 | static void __init s3c2450_clk_init(struct device_node *np) |
475 | { | 475 | { |
476 | s3c2443_common_clk_init(np, 0, S3C2450, 0); | 476 | s3c2443_common_clk_init(np, 0, S3C2450, NULL); |
477 | } | 477 | } |
478 | CLK_OF_DECLARE(s3c2450_clk, "samsung,s3c2450-clock", s3c2450_clk_init); | 478 | CLK_OF_DECLARE(s3c2450_clk, "samsung,s3c2450-clock", s3c2450_clk_init); |