diff options
author | Charlene Liu <charlene.liu@amd.com> | 2017-02-17 13:59:11 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 17:15:36 -0400 |
commit | 181a888fcd723c4bc63f43aac50713c34ae9102e (patch) | |
tree | 76147cb53430c9ce0dd897539269593c9ef37b2a | |
parent | 896b3cb3f48e662abdaaaeb5a4e1001723081a19 (diff) |
drm/amd/display: fix incorrect programming for YCbCr422 and YCbCr420
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 files changed, 21 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c index aba392ff5095..e4092fd458a1 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c | |||
@@ -362,9 +362,15 @@ static void dce110_stream_encoder_hdmi_set_stream_attribute( | |||
362 | REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); | 362 | REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); |
363 | break; | 363 | break; |
364 | case COLOR_DEPTH_101010: | 364 | case COLOR_DEPTH_101010: |
365 | REG_UPDATE_2(HDMI_CONTROL, | 365 | if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { |
366 | HDMI_DEEP_COLOR_DEPTH, 1, | 366 | REG_UPDATE_2(HDMI_CONTROL, |
367 | HDMI_DEEP_COLOR_ENABLE, 1); | 367 | HDMI_DEEP_COLOR_DEPTH, 1, |
368 | HDMI_DEEP_COLOR_ENABLE, 0); | ||
369 | } else { | ||
370 | REG_UPDATE_2(HDMI_CONTROL, | ||
371 | HDMI_DEEP_COLOR_DEPTH, 1, | ||
372 | HDMI_DEEP_COLOR_ENABLE, 1); | ||
373 | } | ||
368 | break; | 374 | break; |
369 | case COLOR_DEPTH_121212: | 375 | case COLOR_DEPTH_121212: |
370 | if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { | 376 | if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 76a397d90adc..6915cc46754b 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | |||
@@ -861,10 +861,6 @@ static void build_audio_output( | |||
861 | audio_output->crtc_info.requested_pixel_clock = | 861 | audio_output->crtc_info.requested_pixel_clock = |
862 | pipe_ctx->pix_clk_params.requested_pix_clk; | 862 | pipe_ctx->pix_clk_params.requested_pix_clk; |
863 | 863 | ||
864 | /* | ||
865 | * TODO - Investigate why calculated pixel clk has to be | ||
866 | * requested pixel clk | ||
867 | */ | ||
868 | audio_output->crtc_info.calculated_pixel_clock = | 864 | audio_output->crtc_info.calculated_pixel_clock = |
869 | pipe_ctx->pix_clk_params.requested_pix_clk; | 865 | pipe_ctx->pix_clk_params.requested_pix_clk; |
870 | 866 | ||
@@ -1044,15 +1040,14 @@ static enum dc_status apply_single_controller_ctx_to_hw( | |||
1044 | stream->public.timing.display_color_depth, | 1040 | stream->public.timing.display_color_depth, |
1045 | pipe_ctx->stream->signal); | 1041 | pipe_ctx->stream->signal); |
1046 | 1042 | ||
1043 | /* FPGA does not program backend */ | ||
1044 | if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { | ||
1047 | pipe_ctx->opp->funcs->opp_program_fmt( | 1045 | pipe_ctx->opp->funcs->opp_program_fmt( |
1048 | pipe_ctx->opp, | 1046 | pipe_ctx->opp, |
1049 | &stream->bit_depth_params, | 1047 | &stream->bit_depth_params, |
1050 | &stream->clamping); | 1048 | &stream->clamping); |
1051 | |||
1052 | /* FPGA does not program backend */ | ||
1053 | if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) | ||
1054 | return DC_OK; | 1049 | return DC_OK; |
1055 | 1050 | } | |
1056 | /* TODO: move to stream encoder */ | 1051 | /* TODO: move to stream encoder */ |
1057 | if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL) | 1052 | if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL) |
1058 | if (DC_OK != bios_parser_crtc_source_select(pipe_ctx)) { | 1053 | if (DC_OK != bios_parser_crtc_source_select(pipe_ctx)) { |
@@ -1065,6 +1060,12 @@ static enum dc_status apply_single_controller_ctx_to_hw( | |||
1065 | stream->sink->link->link_enc, | 1060 | stream->sink->link->link_enc, |
1066 | pipe_ctx->stream->signal); | 1061 | pipe_ctx->stream->signal); |
1067 | 1062 | ||
1063 | /*vbios crtc_source_selection and encoder_setup will override fmt_C*/ | ||
1064 | pipe_ctx->opp->funcs->opp_program_fmt( | ||
1065 | pipe_ctx->opp, | ||
1066 | &stream->bit_depth_params, | ||
1067 | &stream->clamping); | ||
1068 | |||
1068 | if (dc_is_dp_signal(pipe_ctx->stream->signal)) | 1069 | if (dc_is_dp_signal(pipe_ctx->stream->signal)) |
1069 | pipe_ctx->stream_enc->funcs->dp_set_stream_attribute( | 1070 | pipe_ctx->stream_enc->funcs->dp_set_stream_attribute( |
1070 | pipe_ctx->stream_enc, | 1071 | pipe_ctx->stream_enc, |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index 074fb978e076..478c8d27f3bd 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | |||
@@ -777,6 +777,9 @@ static void get_pixel_clock_parameters( | |||
777 | pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->public.timing.pixel_encoding == | 777 | pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->public.timing.pixel_encoding == |
778 | PIXEL_ENCODING_YCBCR420); | 778 | PIXEL_ENCODING_YCBCR420); |
779 | pixel_clk_params->pixel_encoding = stream->public.timing.pixel_encoding; | 779 | pixel_clk_params->pixel_encoding = stream->public.timing.pixel_encoding; |
780 | if (stream->public.timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) { | ||
781 | pixel_clk_params->color_depth = COLOR_DEPTH_888; | ||
782 | } | ||
780 | } | 783 | } |
781 | 784 | ||
782 | void dce110_resource_build_bit_depth_reduction_params( | 785 | void dce110_resource_build_bit_depth_reduction_params( |