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authorDavid Lechner <david@lechnology.com>2018-05-25 14:11:48 -0400
committerMichael Turquette <mturquette@baylibre.com>2018-05-30 15:48:39 -0400
commit17d8bacf19bb5ea5f258f9c0644d5688f9ba03a9 (patch)
tree0c9942c7b0fffd698c7e627b7c644e9c264002fa
parent76c9dd9dbd6459f1faf2b10351eb3d3f90255fa1 (diff)
clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE
PLL0 on davinci/da850-type device needs to be registered early in boot because it is needed for clocksource/clockevent. Change the driver to use CLK_OF_DECLARE for this special case. Reviewed-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20180525181150.17873-8-david@lechnology.com
-rw-r--r--drivers/clk/davinci/pll-da850.c21
-rw-r--r--drivers/clk/davinci/pll.c4
-rw-r--r--drivers/clk/davinci/pll.h2
3 files changed, 21 insertions, 6 deletions
diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c
index 59cc2e3733f9..0f7198191ea2 100644
--- a/drivers/clk/davinci/pll-da850.c
+++ b/drivers/clk/davinci/pll-da850.c
@@ -13,6 +13,8 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/mfd/da8xx-cfgchip.h> 15#include <linux/mfd/da8xx-cfgchip.h>
16#include <linux/mfd/syscon.h>
17#include <linux/of_address.h>
16#include <linux/of.h> 18#include <linux/of.h>
17#include <linux/types.h> 19#include <linux/types.h>
18 20
@@ -136,11 +138,22 @@ static const struct davinci_pll_sysclk_info *da850_pll0_sysclk_info[] = {
136 NULL 138 NULL
137}; 139};
138 140
139int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) 141void of_da850_pll0_init(struct device_node *node)
140{ 142{
141 return of_davinci_pll_init(dev, dev->of_node, &da850_pll0_info, 143 void __iomem *base;
142 &da850_pll0_obsclk_info, 144 struct regmap *cfgchip;
143 da850_pll0_sysclk_info, 7, base, cfgchip); 145
146 base = of_iomap(node, 0);
147 if (!base) {
148 pr_err("%s: ioremap failed\n", __func__);
149 return;
150 }
151
152 cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
153
154 of_davinci_pll_init(NULL, node, &da850_pll0_info,
155 &da850_pll0_obsclk_info,
156 da850_pll0_sysclk_info, 7, base, cfgchip);
144} 157}
145 158
146static const struct davinci_pll_clk_info da850_pll1_info = { 159static const struct davinci_pll_clk_info da850_pll1_info = {
diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c
index 2eb981e61185..84a343060bc8 100644
--- a/drivers/clk/davinci/pll.c
+++ b/drivers/clk/davinci/pll.c
@@ -859,8 +859,10 @@ static struct davinci_pll_platform_data *davinci_pll_get_pdata(struct device *de
859 return pdata; 859 return pdata;
860} 860}
861 861
862/* needed in early boot for clocksource/clockevent */
863CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);
864
862static const struct of_device_id davinci_pll_of_match[] = { 865static const struct of_device_id davinci_pll_of_match[] = {
863 { .compatible = "ti,da850-pll0", .data = of_da850_pll0_init },
864 { .compatible = "ti,da850-pll1", .data = of_da850_pll1_init }, 866 { .compatible = "ti,da850-pll1", .data = of_da850_pll1_init },
865 { } 867 { }
866}; 868};
diff --git a/drivers/clk/davinci/pll.h b/drivers/clk/davinci/pll.h
index 562652fc0759..b2e5c4496645 100644
--- a/drivers/clk/davinci/pll.h
+++ b/drivers/clk/davinci/pll.h
@@ -123,7 +123,7 @@ int of_davinci_pll_init(struct device *dev, struct device_node *node,
123/* Platform-specific callbacks */ 123/* Platform-specific callbacks */
124 124
125int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); 125int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
126int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); 126void of_da850_pll0_init(struct device_node *node);
127int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); 127int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
128 128
129int dm355_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip); 129int dm355_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);