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authorAndres Rodriguez <andresx7@gmail.com>2017-09-15 20:44:06 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-10-09 16:30:19 -0400
commit177ae09b5d699a5ebd1cafcee78889db968abf54 (patch)
treea05b42c1155df2dac688952df8378315a7849980
parentb82485fd384a56c27fae44e649552eca6334237a (diff)
drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2
Introduce a flag to signal that access to a BO will be synchronized through an external mechanism. Currently all buffers shared between contexts are subject to implicit synchronization. However, this is only required for protocols that currently don't support an explicit synchronization mechanism (DRI2/3). This patch introduces the AMDGPU_GEM_CREATE_EXPLICIT_SYNC, so that users can specify when it is safe to disable implicit sync. v2: only disable explicit sync in amdgpu_cs_ioctl Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.h8
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c7
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c5
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c8
-rw-r--r--include/uapi/drm/amdgpu_drm.h2
8 files changed, 29 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index ab83dfcabb41..38027a00f8ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -705,7 +705,8 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)
705 705
706 list_for_each_entry(e, &p->validated, tv.head) { 706 list_for_each_entry(e, &p->validated, tv.head) {
707 struct reservation_object *resv = e->robj->tbo.resv; 707 struct reservation_object *resv = e->robj->tbo.resv;
708 r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp); 708 r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp,
709 amdgpu_bo_explicit_sync(e->robj));
709 710
710 if (r) 711 if (r)
711 return r; 712 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index b0d45c8e6bb3..21e99366cab3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -212,7 +212,9 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
212 AMDGPU_GEM_CREATE_NO_CPU_ACCESS | 212 AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
213 AMDGPU_GEM_CREATE_CPU_GTT_USWC | 213 AMDGPU_GEM_CREATE_CPU_GTT_USWC |
214 AMDGPU_GEM_CREATE_VRAM_CLEARED | 214 AMDGPU_GEM_CREATE_VRAM_CLEARED |
215 AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)) 215 AMDGPU_GEM_CREATE_VM_ALWAYS_VALID |
216 AMDGPU_GEM_CREATE_EXPLICIT_SYNC))
217
216 return -EINVAL; 218 return -EINVAL;
217 219
218 /* reject invalid gem domains */ 220 /* reject invalid gem domains */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index c26ef53604af..428aae048f4b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -193,6 +193,14 @@ static inline bool amdgpu_bo_gpu_accessible(struct amdgpu_bo *bo)
193 } 193 }
194} 194}
195 195
196/**
197 * amdgpu_bo_explicit_sync - return whether the bo is explicitly synced
198 */
199static inline bool amdgpu_bo_explicit_sync(struct amdgpu_bo *bo)
200{
201 return bo->flags & AMDGPU_GEM_CREATE_EXPLICIT_SYNC;
202}
203
196int amdgpu_bo_create(struct amdgpu_device *adev, 204int amdgpu_bo_create(struct amdgpu_device *adev,
197 unsigned long size, int byte_align, 205 unsigned long size, int byte_align,
198 bool kernel, u32 domain, u64 flags, 206 bool kernel, u32 domain, u64 flags,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index c586f44312f9..a4bf21f8f1c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -169,14 +169,14 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
169 * 169 *
170 * @sync: sync object to add fences from reservation object to 170 * @sync: sync object to add fences from reservation object to
171 * @resv: reservation object with embedded fence 171 * @resv: reservation object with embedded fence
172 * @shared: true if we should only sync to the exclusive fence 172 * @explicit_sync: true if we should only sync to the exclusive fence
173 * 173 *
174 * Sync to the fence 174 * Sync to the fence
175 */ 175 */
176int amdgpu_sync_resv(struct amdgpu_device *adev, 176int amdgpu_sync_resv(struct amdgpu_device *adev,
177 struct amdgpu_sync *sync, 177 struct amdgpu_sync *sync,
178 struct reservation_object *resv, 178 struct reservation_object *resv,
179 void *owner) 179 void *owner, bool explicit_sync)
180{ 180{
181 struct reservation_object_list *flist; 181 struct reservation_object_list *flist;
182 struct dma_fence *f; 182 struct dma_fence *f;
@@ -191,6 +191,9 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
191 f = reservation_object_get_excl(resv); 191 f = reservation_object_get_excl(resv);
192 r = amdgpu_sync_fence(adev, sync, f); 192 r = amdgpu_sync_fence(adev, sync, f);
193 193
194 if (explicit_sync)
195 return r;
196
194 flist = reservation_object_get_list(resv); 197 flist = reservation_object_get_list(resv);
195 if (!flist || r) 198 if (!flist || r)
196 return r; 199 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
index dc7687993317..70d7e3a279a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
@@ -45,7 +45,8 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
45int amdgpu_sync_resv(struct amdgpu_device *adev, 45int amdgpu_sync_resv(struct amdgpu_device *adev,
46 struct amdgpu_sync *sync, 46 struct amdgpu_sync *sync,
47 struct reservation_object *resv, 47 struct reservation_object *resv,
48 void *owner); 48 void *owner,
49 bool explicit_sync);
49struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, 50struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
50 struct amdgpu_ring *ring); 51 struct amdgpu_ring *ring);
51struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync); 52struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 10952c3e5eb6..a2282bacf960 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1489,7 +1489,8 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
1489 job->vm_needs_flush = vm_needs_flush; 1489 job->vm_needs_flush = vm_needs_flush;
1490 if (resv) { 1490 if (resv) {
1491 r = amdgpu_sync_resv(adev, &job->sync, resv, 1491 r = amdgpu_sync_resv(adev, &job->sync, resv,
1492 AMDGPU_FENCE_OWNER_UNDEFINED); 1492 AMDGPU_FENCE_OWNER_UNDEFINED,
1493 false);
1493 if (r) { 1494 if (r) {
1494 DRM_ERROR("sync failed (%d).\n", r); 1495 DRM_ERROR("sync failed (%d).\n", r);
1495 goto error_free; 1496 goto error_free;
@@ -1581,7 +1582,7 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
1581 1582
1582 if (resv) { 1583 if (resv) {
1583 r = amdgpu_sync_resv(adev, &job->sync, resv, 1584 r = amdgpu_sync_resv(adev, &job->sync, resv,
1584 AMDGPU_FENCE_OWNER_UNDEFINED); 1585 AMDGPU_FENCE_OWNER_UNDEFINED, false);
1585 if (r) { 1586 if (r) {
1586 DRM_ERROR("sync failed (%d).\n", r); 1587 DRM_ERROR("sync failed (%d).\n", r);
1587 goto error_free; 1588 goto error_free;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index eb4a01c14eee..c559d76ff695 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1035,7 +1035,7 @@ static int amdgpu_vm_wait_pd(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1035 int r; 1035 int r;
1036 1036
1037 amdgpu_sync_create(&sync); 1037 amdgpu_sync_create(&sync);
1038 amdgpu_sync_resv(adev, &sync, vm->root.base.bo->tbo.resv, owner); 1038 amdgpu_sync_resv(adev, &sync, vm->root.base.bo->tbo.resv, owner, false);
1039 r = amdgpu_sync_wait(&sync, true); 1039 r = amdgpu_sync_wait(&sync, true);
1040 amdgpu_sync_free(&sync); 1040 amdgpu_sync_free(&sync);
1041 1041
@@ -1176,11 +1176,11 @@ static int amdgpu_vm_update_level(struct amdgpu_device *adev,
1176 amdgpu_ring_pad_ib(ring, params.ib); 1176 amdgpu_ring_pad_ib(ring, params.ib);
1177 amdgpu_sync_resv(adev, &job->sync, 1177 amdgpu_sync_resv(adev, &job->sync,
1178 parent->base.bo->tbo.resv, 1178 parent->base.bo->tbo.resv,
1179 AMDGPU_FENCE_OWNER_VM); 1179 AMDGPU_FENCE_OWNER_VM, false);
1180 if (shadow) 1180 if (shadow)
1181 amdgpu_sync_resv(adev, &job->sync, 1181 amdgpu_sync_resv(adev, &job->sync,
1182 shadow->tbo.resv, 1182 shadow->tbo.resv,
1183 AMDGPU_FENCE_OWNER_VM); 1183 AMDGPU_FENCE_OWNER_VM, false);
1184 1184
1185 WARN_ON(params.ib->length_dw > ndw); 1185 WARN_ON(params.ib->length_dw > ndw);
1186 r = amdgpu_job_submit(job, ring, &vm->entity, 1186 r = amdgpu_job_submit(job, ring, &vm->entity,
@@ -1644,7 +1644,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
1644 goto error_free; 1644 goto error_free;
1645 1645
1646 r = amdgpu_sync_resv(adev, &job->sync, vm->root.base.bo->tbo.resv, 1646 r = amdgpu_sync_resv(adev, &job->sync, vm->root.base.bo->tbo.resv,
1647 owner); 1647 owner, false);
1648 if (r) 1648 if (r)
1649 goto error_free; 1649 goto error_free;
1650 1650
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 4c6e8c482ee4..b62484af8ccb 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -91,6 +91,8 @@ extern "C" {
91#define AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS (1 << 5) 91#define AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS (1 << 5)
92/* Flag that BO is always valid in this VM */ 92/* Flag that BO is always valid in this VM */
93#define AMDGPU_GEM_CREATE_VM_ALWAYS_VALID (1 << 6) 93#define AMDGPU_GEM_CREATE_VM_ALWAYS_VALID (1 << 6)
94/* Flag that BO sharing will be explicitly synchronized */
95#define AMDGPU_GEM_CREATE_EXPLICIT_SYNC (1 << 7)
94 96
95struct drm_amdgpu_gem_create_in { 97struct drm_amdgpu_gem_create_in {
96 /** the requested memory size */ 98 /** the requested memory size */