aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJohn Crispin <blogic@openwrt.org>2016-02-19 03:44:10 -0500
committerMatthias Brugger <matthias.bgg@gmail.com>2016-04-20 07:03:02 -0400
commit174f7b4ce15f9edd77caac67a82c686c54788485 (patch)
tree681969c589df9b714803801aee06b5c09582a8ac
parente5eef49bc34b2adda3d3d0549d92a7f252130e79 (diff)
soc: mediatek: PMIC wrap: SPI_WRITE needs a different bitmask for MT2701/7623
Different SoCs will use different bitmask for the SPI_WRITE command. This patch defines the bitmask in the pmic_wrapper_type struct. This allows us to support new SoCs with a different bitmask to the one currently used. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r--drivers/soc/mediatek/mtk-pmic-wrap.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 9df113546160..8ce1bad3b605 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -372,6 +372,7 @@ struct pmic_wrapper_type {
372 enum pwrap_type type; 372 enum pwrap_type type;
373 u32 arb_en_all; 373 u32 arb_en_all;
374 u32 int_en_all; 374 u32 int_en_all;
375 u32 spi_w;
375 int (*init_reg_clock)(struct pmic_wrapper *wrp); 376 int (*init_reg_clock)(struct pmic_wrapper *wrp);
376 int (*init_soc_specific)(struct pmic_wrapper *wrp); 377 int (*init_soc_specific)(struct pmic_wrapper *wrp);
377}; 378};
@@ -511,15 +512,15 @@ static int pwrap_reset_spislave(struct pmic_wrapper *wrp)
511 pwrap_writel(wrp, 1, PWRAP_MAN_EN); 512 pwrap_writel(wrp, 1, PWRAP_MAN_EN);
512 pwrap_writel(wrp, 0, PWRAP_DIO_EN); 513 pwrap_writel(wrp, 0, PWRAP_DIO_EN);
513 514
514 pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSL, 515 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL,
515 PWRAP_MAN_CMD); 516 PWRAP_MAN_CMD);
516 pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS, 517 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
517 PWRAP_MAN_CMD); 518 PWRAP_MAN_CMD);
518 pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_CSH, 519 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH,
519 PWRAP_MAN_CMD); 520 PWRAP_MAN_CMD);
520 521
521 for (i = 0; i < 4; i++) 522 for (i = 0; i < 4; i++)
522 pwrap_writel(wrp, PWRAP_MAN_CMD_SPI_WRITE | PWRAP_MAN_CMD_OP_OUTS, 523 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
523 PWRAP_MAN_CMD); 524 PWRAP_MAN_CMD);
524 525
525 ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle); 526 ret = pwrap_wait_for_state(wrp, pwrap_is_sync_idle);
@@ -827,6 +828,7 @@ static struct pmic_wrapper_type pwrap_mt8135 = {
827 .type = PWRAP_MT8135, 828 .type = PWRAP_MT8135,
828 .arb_en_all = 0x1ff, 829 .arb_en_all = 0x1ff,
829 .int_en_all = ~(BIT(31) | BIT(1)), 830 .int_en_all = ~(BIT(31) | BIT(1)),
831 .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
830 .init_reg_clock = pwrap_mt8135_init_reg_clock, 832 .init_reg_clock = pwrap_mt8135_init_reg_clock,
831 .init_soc_specific = pwrap_mt8135_init_soc_specific, 833 .init_soc_specific = pwrap_mt8135_init_soc_specific,
832}; 834};
@@ -836,6 +838,7 @@ static struct pmic_wrapper_type pwrap_mt8173 = {
836 .type = PWRAP_MT8173, 838 .type = PWRAP_MT8173,
837 .arb_en_all = 0x3f, 839 .arb_en_all = 0x3f,
838 .int_en_all = ~(BIT(31) | BIT(1)), 840 .int_en_all = ~(BIT(31) | BIT(1)),
841 .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
839 .init_reg_clock = pwrap_mt8173_init_reg_clock, 842 .init_reg_clock = pwrap_mt8173_init_reg_clock,
840 .init_soc_specific = pwrap_mt8173_init_soc_specific, 843 .init_soc_specific = pwrap_mt8173_init_soc_specific,
841}; 844};