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authorXiaodong Liu <xiaodong.liu@intel.com>2016-08-12 06:24:42 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2016-08-16 05:09:42 -0400
commit172b1d6b5a9337eb8c1ec294b80e448e03a9ac17 (patch)
tree06019222a0f6f4da6ffe35c31aec3953281938c7
parenta0118c8b2be9297aed8e915c60b4013326b256d4 (diff)
crypto: sha256-mb - fix ctx pointer and digest copy
1. fix ctx pointer Use req_ctx which is the ctx for the next job that have been completed in the lanes instead of the first completed job rctx, whose completion could have been called and released. 2. fix digest copy Use XMM register to copy another 16 bytes sha256 digest instead of a regular register. Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--arch/x86/crypto/sha256-mb/sha256_mb.c4
-rw-r--r--arch/x86/crypto/sha256-mb/sha256_mb_mgr_flush_avx2.S7
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/x86/crypto/sha256-mb/sha256_mb.c b/arch/x86/crypto/sha256-mb/sha256_mb.c
index 89fa85e8b10c..6f97fb33ae21 100644
--- a/arch/x86/crypto/sha256-mb/sha256_mb.c
+++ b/arch/x86/crypto/sha256-mb/sha256_mb.c
@@ -485,10 +485,10 @@ static int sha_complete_job(struct mcryptd_hash_request_ctx *rctx,
485 485
486 req = cast_mcryptd_ctx_to_req(req_ctx); 486 req = cast_mcryptd_ctx_to_req(req_ctx);
487 if (irqs_disabled()) 487 if (irqs_disabled())
488 rctx->complete(&req->base, ret); 488 req_ctx->complete(&req->base, ret);
489 else { 489 else {
490 local_bh_disable(); 490 local_bh_disable();
491 rctx->complete(&req->base, ret); 491 req_ctx->complete(&req->base, ret);
492 local_bh_enable(); 492 local_bh_enable();
493 } 493 }
494 } 494 }
diff --git a/arch/x86/crypto/sha256-mb/sha256_mb_mgr_flush_avx2.S b/arch/x86/crypto/sha256-mb/sha256_mb_mgr_flush_avx2.S
index b691da981cd9..a78a0694ddef 100644
--- a/arch/x86/crypto/sha256-mb/sha256_mb_mgr_flush_avx2.S
+++ b/arch/x86/crypto/sha256-mb/sha256_mb_mgr_flush_avx2.S
@@ -265,13 +265,14 @@ ENTRY(sha256_mb_mgr_get_comp_job_avx2)
265 vpinsrd $1, _args_digest+1*32(state, idx, 4), %xmm0, %xmm0 265 vpinsrd $1, _args_digest+1*32(state, idx, 4), %xmm0, %xmm0
266 vpinsrd $2, _args_digest+2*32(state, idx, 4), %xmm0, %xmm0 266 vpinsrd $2, _args_digest+2*32(state, idx, 4), %xmm0, %xmm0
267 vpinsrd $3, _args_digest+3*32(state, idx, 4), %xmm0, %xmm0 267 vpinsrd $3, _args_digest+3*32(state, idx, 4), %xmm0, %xmm0
268 movl _args_digest+4*32(state, idx, 4), tmp2_w 268 vmovd _args_digest(state , idx, 4) , %xmm0
269 vpinsrd $1, _args_digest+5*32(state, idx, 4), %xmm1, %xmm1 269 vpinsrd $1, _args_digest+5*32(state, idx, 4), %xmm1, %xmm1
270 vpinsrd $2, _args_digest+6*32(state, idx, 4), %xmm1, %xmm1 270 vpinsrd $2, _args_digest+6*32(state, idx, 4), %xmm1, %xmm1
271 vpinsrd $3, _args_digest+7*32(state, idx, 4), %xmm1, %xmm1 271 vpinsrd $3, _args_digest+7*32(state, idx, 4), %xmm1, %xmm1
272 272
273 vmovdqu %xmm0, _result_digest(job_rax) 273 vmovdqu %xmm0, _result_digest(job_rax)
274 movl tmp2_w, _result_digest+1*16(job_rax) 274 offset = (_result_digest + 1*16)
275 vmovdqu %xmm1, offset(job_rax)
275 276
276 pop %rbx 277 pop %rbx
277 278