diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2015-05-13 06:53:07 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2015-05-13 07:39:42 -0400 |
commit | 16ec30ef99b886d9dcaa3bd272a94a4bd1f660f4 (patch) | |
tree | 220073dee6845e2a8ed101a55cf969ad6fbbd8b1 | |
parent | 3ebee5a2e141496bb8bf6a3225ffcd703ac1dd4d (diff) |
ARM: ux500: get rid of static maps
The static mappings of the GPIO blocks, clock/reset controller
and MTU timer are clearly superfluous. These are all probed
exclusively from the device tree. Tested on the U8500.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | arch/arm/mach-ux500/cpu-db8500.c | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 6f63954c8bde..537a7753afc1 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
@@ -48,25 +48,14 @@ static struct map_desc u8500_uart_io_desc[] __initdata = { | |||
48 | __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), | 48 | __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), |
49 | __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), | 49 | __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), |
50 | }; | 50 | }; |
51 | |||
51 | /* U8500 and U9540 common io_desc */ | 52 | /* U8500 and U9540 common io_desc */ |
52 | static struct map_desc u8500_common_io_desc[] __initdata = { | 53 | static struct map_desc u8500_common_io_desc[] __initdata = { |
53 | /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ | 54 | /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ |
54 | __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), | 55 | __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), |
55 | __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), | 56 | __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), |
56 | __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), | 57 | __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), |
57 | __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), | ||
58 | __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), | 58 | __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), |
59 | |||
60 | __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), | ||
61 | __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), | ||
62 | __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), | ||
63 | __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), | ||
64 | __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), | ||
65 | |||
66 | __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), | ||
67 | __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), | ||
68 | __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), | ||
69 | __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), | ||
70 | }; | 59 | }; |
71 | 60 | ||
72 | /* U8500 IO map specific description */ | 61 | /* U8500 IO map specific description */ |