diff options
| author | James Hogan <james.hogan@imgtec.com> | 2015-12-16 18:49:33 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-01-23 21:15:51 -0500 |
| commit | 16d100db245ab34d975e080f39e4cc4ed09b3820 (patch) | |
| tree | d8353347f013c35a81276c22e068dc3ced73d8c5 | |
| parent | 2db9d233860e638fecd4b6c519c880bee98ba5eb (diff) | |
MIPS: Move Cause.ExcCode trap codes to mipsregs.h
Move the Cause.ExcCode trap code definitions from kvm_host.h to
mipsregs.h, since they describe architectural bits rather than KVM
specific constants, and change the prefix from T_ to EXCCODE_.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Gleb Natapov <gleb@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/kvm_host.h | 28 | ||||
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 24 | ||||
| -rw-r--r-- | arch/mips/kvm/emulate.c | 71 | ||||
| -rw-r--r-- | arch/mips/kvm/interrupt.c | 8 | ||||
| -rw-r--r-- | arch/mips/kvm/mips.c | 32 |
5 files changed, 80 insertions, 83 deletions
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index 16f647347357..ba8d9acdba30 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h | |||
| @@ -281,34 +281,6 @@ enum mips_mmu_types { | |||
| 281 | MMU_TYPE_R8000 | 281 | MMU_TYPE_R8000 |
| 282 | }; | 282 | }; |
| 283 | 283 | ||
| 284 | /* | ||
| 285 | * Trap codes | ||
| 286 | */ | ||
| 287 | #define T_INT 0 /* Interrupt pending */ | ||
| 288 | #define T_TLB_MOD 1 /* TLB modified fault */ | ||
| 289 | #define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */ | ||
| 290 | #define T_TLB_ST_MISS 3 /* TLB miss on a store */ | ||
| 291 | #define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */ | ||
| 292 | #define T_ADDR_ERR_ST 5 /* Address error on a store */ | ||
| 293 | #define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */ | ||
| 294 | #define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */ | ||
| 295 | #define T_SYSCALL 8 /* System call */ | ||
| 296 | #define T_BREAK 9 /* Breakpoint */ | ||
| 297 | #define T_RES_INST 10 /* Reserved instruction exception */ | ||
| 298 | #define T_COP_UNUSABLE 11 /* Coprocessor unusable */ | ||
| 299 | #define T_OVFLOW 12 /* Arithmetic overflow */ | ||
| 300 | |||
| 301 | /* | ||
| 302 | * Trap definitions added for r4000 port. | ||
| 303 | */ | ||
| 304 | #define T_TRAP 13 /* Trap instruction */ | ||
| 305 | #define T_VCEI 14 /* Virtual coherency exception */ | ||
| 306 | #define T_MSAFPE 14 /* MSA floating point exception */ | ||
| 307 | #define T_FPE 15 /* Floating point exception */ | ||
| 308 | #define T_MSADIS 21 /* MSA disabled exception */ | ||
| 309 | #define T_WATCH 23 /* Watch address reference */ | ||
| 310 | #define T_VCED 31 /* Virtual coherency data */ | ||
| 311 | |||
| 312 | /* Resume Flags */ | 284 | /* Resume Flags */ |
| 313 | #define RESUME_FLAG_DR (1<<0) /* Reload guest nonvolatile state? */ | 285 | #define RESUME_FLAG_DR (1<<0) /* Reload guest nonvolatile state? */ |
| 314 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ | 286 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ |
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index af36d2be4d0d..eb89b877c6c9 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
| @@ -404,6 +404,30 @@ | |||
| 404 | #define CAUSEF_BD (_ULCAST_(1) << 31) | 404 | #define CAUSEF_BD (_ULCAST_(1) << 31) |
| 405 | 405 | ||
| 406 | /* | 406 | /* |
| 407 | * Cause.ExcCode trap codes. | ||
| 408 | */ | ||
| 409 | #define EXCCODE_INT 0 /* Interrupt pending */ | ||
| 410 | #define EXCCODE_MOD 1 /* TLB modified fault */ | ||
| 411 | #define EXCCODE_TLBL 2 /* TLB miss on load or ifetch */ | ||
| 412 | #define EXCCODE_TLBS 3 /* TLB miss on a store */ | ||
| 413 | #define EXCCODE_ADEL 4 /* Address error on a load or ifetch */ | ||
| 414 | #define EXCCODE_ADES 5 /* Address error on a store */ | ||
| 415 | #define EXCCODE_IBE 6 /* Bus error on an ifetch */ | ||
| 416 | #define EXCCODE_DBE 7 /* Bus error on a load or store */ | ||
| 417 | #define EXCCODE_SYS 8 /* System call */ | ||
| 418 | #define EXCCODE_BP 9 /* Breakpoint */ | ||
| 419 | #define EXCCODE_RI 10 /* Reserved instruction exception */ | ||
| 420 | #define EXCCODE_CPU 11 /* Coprocessor unusable */ | ||
| 421 | #define EXCCODE_OV 12 /* Arithmetic overflow */ | ||
| 422 | #define EXCCODE_TR 13 /* Trap instruction */ | ||
| 423 | #define EXCCODE_VCEI 14 /* Virtual coherency exception */ | ||
| 424 | #define EXCCODE_MSAFPE 14 /* MSA floating point exception */ | ||
| 425 | #define EXCCODE_FPE 15 /* Floating point exception */ | ||
| 426 | #define EXCCODE_MSADIS 21 /* MSA disabled exception */ | ||
| 427 | #define EXCCODE_WATCH 23 /* Watch address reference */ | ||
| 428 | #define EXCCODE_VCED 31 /* Virtual coherency data */ | ||
| 429 | |||
| 430 | /* | ||
| 407 | * Bits in the coprocessor 0 config register. | 431 | * Bits in the coprocessor 0 config register. |
| 408 | */ | 432 | */ |
| 409 | /* Generic bits. */ | 433 | /* Generic bits. */ |
diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c index 95b83a6582ef..6ff1dcfc9ef1 100644 --- a/arch/mips/kvm/emulate.c +++ b/arch/mips/kvm/emulate.c | |||
| @@ -1780,7 +1780,7 @@ enum emulation_result kvm_mips_emulate_syscall(unsigned long cause, | |||
| 1780 | kvm_debug("Delivering SYSCALL @ pc %#lx\n", arch->pc); | 1780 | kvm_debug("Delivering SYSCALL @ pc %#lx\n", arch->pc); |
| 1781 | 1781 | ||
| 1782 | kvm_change_c0_guest_cause(cop0, (0xff), | 1782 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 1783 | (T_SYSCALL << CAUSEB_EXCCODE)); | 1783 | (EXCCODE_SYS << CAUSEB_EXCCODE)); |
| 1784 | 1784 | ||
| 1785 | /* Set PC to the exception entry point */ | 1785 | /* Set PC to the exception entry point */ |
| 1786 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 1786 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| @@ -1827,7 +1827,7 @@ enum emulation_result kvm_mips_emulate_tlbmiss_ld(unsigned long cause, | |||
| 1827 | } | 1827 | } |
| 1828 | 1828 | ||
| 1829 | kvm_change_c0_guest_cause(cop0, (0xff), | 1829 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 1830 | (T_TLB_LD_MISS << CAUSEB_EXCCODE)); | 1830 | (EXCCODE_TLBL << CAUSEB_EXCCODE)); |
| 1831 | 1831 | ||
| 1832 | /* setup badvaddr, context and entryhi registers for the guest */ | 1832 | /* setup badvaddr, context and entryhi registers for the guest */ |
| 1833 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); | 1833 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); |
| @@ -1873,7 +1873,7 @@ enum emulation_result kvm_mips_emulate_tlbinv_ld(unsigned long cause, | |||
| 1873 | } | 1873 | } |
| 1874 | 1874 | ||
| 1875 | kvm_change_c0_guest_cause(cop0, (0xff), | 1875 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 1876 | (T_TLB_LD_MISS << CAUSEB_EXCCODE)); | 1876 | (EXCCODE_TLBL << CAUSEB_EXCCODE)); |
| 1877 | 1877 | ||
| 1878 | /* setup badvaddr, context and entryhi registers for the guest */ | 1878 | /* setup badvaddr, context and entryhi registers for the guest */ |
| 1879 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); | 1879 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); |
| @@ -1917,7 +1917,7 @@ enum emulation_result kvm_mips_emulate_tlbmiss_st(unsigned long cause, | |||
| 1917 | } | 1917 | } |
| 1918 | 1918 | ||
| 1919 | kvm_change_c0_guest_cause(cop0, (0xff), | 1919 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 1920 | (T_TLB_ST_MISS << CAUSEB_EXCCODE)); | 1920 | (EXCCODE_TLBS << CAUSEB_EXCCODE)); |
| 1921 | 1921 | ||
| 1922 | /* setup badvaddr, context and entryhi registers for the guest */ | 1922 | /* setup badvaddr, context and entryhi registers for the guest */ |
| 1923 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); | 1923 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); |
| @@ -1961,7 +1961,7 @@ enum emulation_result kvm_mips_emulate_tlbinv_st(unsigned long cause, | |||
| 1961 | } | 1961 | } |
| 1962 | 1962 | ||
| 1963 | kvm_change_c0_guest_cause(cop0, (0xff), | 1963 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 1964 | (T_TLB_ST_MISS << CAUSEB_EXCCODE)); | 1964 | (EXCCODE_TLBS << CAUSEB_EXCCODE)); |
| 1965 | 1965 | ||
| 1966 | /* setup badvaddr, context and entryhi registers for the guest */ | 1966 | /* setup badvaddr, context and entryhi registers for the guest */ |
| 1967 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); | 1967 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); |
| @@ -2032,7 +2032,8 @@ enum emulation_result kvm_mips_emulate_tlbmod(unsigned long cause, | |||
| 2032 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2032 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| 2033 | } | 2033 | } |
| 2034 | 2034 | ||
| 2035 | kvm_change_c0_guest_cause(cop0, (0xff), (T_TLB_MOD << CAUSEB_EXCCODE)); | 2035 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2036 | (EXCCODE_MOD << CAUSEB_EXCCODE)); | ||
| 2036 | 2037 | ||
| 2037 | /* setup badvaddr, context and entryhi registers for the guest */ | 2038 | /* setup badvaddr, context and entryhi registers for the guest */ |
| 2038 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); | 2039 | kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr); |
| @@ -2067,7 +2068,7 @@ enum emulation_result kvm_mips_emulate_fpu_exc(unsigned long cause, | |||
| 2067 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2068 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| 2068 | 2069 | ||
| 2069 | kvm_change_c0_guest_cause(cop0, (0xff), | 2070 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2070 | (T_COP_UNUSABLE << CAUSEB_EXCCODE)); | 2071 | (EXCCODE_CPU << CAUSEB_EXCCODE)); |
| 2071 | kvm_change_c0_guest_cause(cop0, (CAUSEF_CE), (0x1 << CAUSEB_CE)); | 2072 | kvm_change_c0_guest_cause(cop0, (CAUSEF_CE), (0x1 << CAUSEB_CE)); |
| 2072 | 2073 | ||
| 2073 | return EMULATE_DONE; | 2074 | return EMULATE_DONE; |
| @@ -2095,7 +2096,7 @@ enum emulation_result kvm_mips_emulate_ri_exc(unsigned long cause, | |||
| 2095 | kvm_debug("Delivering RI @ pc %#lx\n", arch->pc); | 2096 | kvm_debug("Delivering RI @ pc %#lx\n", arch->pc); |
| 2096 | 2097 | ||
| 2097 | kvm_change_c0_guest_cause(cop0, (0xff), | 2098 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2098 | (T_RES_INST << CAUSEB_EXCCODE)); | 2099 | (EXCCODE_RI << CAUSEB_EXCCODE)); |
| 2099 | 2100 | ||
| 2100 | /* Set PC to the exception entry point */ | 2101 | /* Set PC to the exception entry point */ |
| 2101 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2102 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| @@ -2130,7 +2131,7 @@ enum emulation_result kvm_mips_emulate_bp_exc(unsigned long cause, | |||
| 2130 | kvm_debug("Delivering BP @ pc %#lx\n", arch->pc); | 2131 | kvm_debug("Delivering BP @ pc %#lx\n", arch->pc); |
| 2131 | 2132 | ||
| 2132 | kvm_change_c0_guest_cause(cop0, (0xff), | 2133 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2133 | (T_BREAK << CAUSEB_EXCCODE)); | 2134 | (EXCCODE_BP << CAUSEB_EXCCODE)); |
| 2134 | 2135 | ||
| 2135 | /* Set PC to the exception entry point */ | 2136 | /* Set PC to the exception entry point */ |
| 2136 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2137 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| @@ -2165,7 +2166,7 @@ enum emulation_result kvm_mips_emulate_trap_exc(unsigned long cause, | |||
| 2165 | kvm_debug("Delivering TRAP @ pc %#lx\n", arch->pc); | 2166 | kvm_debug("Delivering TRAP @ pc %#lx\n", arch->pc); |
| 2166 | 2167 | ||
| 2167 | kvm_change_c0_guest_cause(cop0, (0xff), | 2168 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2168 | (T_TRAP << CAUSEB_EXCCODE)); | 2169 | (EXCCODE_TR << CAUSEB_EXCCODE)); |
| 2169 | 2170 | ||
| 2170 | /* Set PC to the exception entry point */ | 2171 | /* Set PC to the exception entry point */ |
| 2171 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2172 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| @@ -2200,7 +2201,7 @@ enum emulation_result kvm_mips_emulate_msafpe_exc(unsigned long cause, | |||
| 2200 | kvm_debug("Delivering MSAFPE @ pc %#lx\n", arch->pc); | 2201 | kvm_debug("Delivering MSAFPE @ pc %#lx\n", arch->pc); |
| 2201 | 2202 | ||
| 2202 | kvm_change_c0_guest_cause(cop0, (0xff), | 2203 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2203 | (T_MSAFPE << CAUSEB_EXCCODE)); | 2204 | (EXCCODE_MSAFPE << CAUSEB_EXCCODE)); |
| 2204 | 2205 | ||
| 2205 | /* Set PC to the exception entry point */ | 2206 | /* Set PC to the exception entry point */ |
| 2206 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2207 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| @@ -2235,7 +2236,7 @@ enum emulation_result kvm_mips_emulate_fpe_exc(unsigned long cause, | |||
| 2235 | kvm_debug("Delivering FPE @ pc %#lx\n", arch->pc); | 2236 | kvm_debug("Delivering FPE @ pc %#lx\n", arch->pc); |
| 2236 | 2237 | ||
| 2237 | kvm_change_c0_guest_cause(cop0, (0xff), | 2238 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2238 | (T_FPE << CAUSEB_EXCCODE)); | 2239 | (EXCCODE_FPE << CAUSEB_EXCCODE)); |
| 2239 | 2240 | ||
| 2240 | /* Set PC to the exception entry point */ | 2241 | /* Set PC to the exception entry point */ |
| 2241 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2242 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| @@ -2270,7 +2271,7 @@ enum emulation_result kvm_mips_emulate_msadis_exc(unsigned long cause, | |||
| 2270 | kvm_debug("Delivering MSADIS @ pc %#lx\n", arch->pc); | 2271 | kvm_debug("Delivering MSADIS @ pc %#lx\n", arch->pc); |
| 2271 | 2272 | ||
| 2272 | kvm_change_c0_guest_cause(cop0, (0xff), | 2273 | kvm_change_c0_guest_cause(cop0, (0xff), |
| 2273 | (T_MSADIS << CAUSEB_EXCCODE)); | 2274 | (EXCCODE_MSADIS << CAUSEB_EXCCODE)); |
| 2274 | 2275 | ||
| 2275 | /* Set PC to the exception entry point */ | 2276 | /* Set PC to the exception entry point */ |
| 2276 | arch->pc = KVM_GUEST_KSEG0 + 0x180; | 2277 | arch->pc = KVM_GUEST_KSEG0 + 0x180; |
| @@ -2479,25 +2480,25 @@ enum emulation_result kvm_mips_check_privilege(unsigned long cause, | |||
| 2479 | 2480 | ||
| 2480 | if (usermode) { | 2481 | if (usermode) { |
| 2481 | switch (exccode) { | 2482 | switch (exccode) { |
| 2482 | case T_INT: | 2483 | case EXCCODE_INT: |
| 2483 | case T_SYSCALL: | 2484 | case EXCCODE_SYS: |
| 2484 | case T_BREAK: | 2485 | case EXCCODE_BP: |
| 2485 | case T_RES_INST: | 2486 | case EXCCODE_RI: |
| 2486 | case T_TRAP: | 2487 | case EXCCODE_TR: |
| 2487 | case T_MSAFPE: | 2488 | case EXCCODE_MSAFPE: |
| 2488 | case T_FPE: | 2489 | case EXCCODE_FPE: |
| 2489 | case T_MSADIS: | 2490 | case EXCCODE_MSADIS: |
| 2490 | break; | 2491 | break; |
| 2491 | 2492 | ||
| 2492 | case T_COP_UNUSABLE: | 2493 | case EXCCODE_CPU: |
| 2493 | if (((cause & CAUSEF_CE) >> CAUSEB_CE) == 0) | 2494 | if (((cause & CAUSEF_CE) >> CAUSEB_CE) == 0) |
| 2494 | er = EMULATE_PRIV_FAIL; | 2495 | er = EMULATE_PRIV_FAIL; |
| 2495 | break; | 2496 | break; |
| 2496 | 2497 | ||
| 2497 | case T_TLB_MOD: | 2498 | case EXCCODE_MOD: |
| 2498 | break; | 2499 | break; |
| 2499 | 2500 | ||
| 2500 | case T_TLB_LD_MISS: | 2501 | case EXCCODE_TLBL: |
| 2501 | /* | 2502 | /* |
| 2502 | * We we are accessing Guest kernel space, then send an | 2503 | * We we are accessing Guest kernel space, then send an |
| 2503 | * address error exception to the guest | 2504 | * address error exception to the guest |
| @@ -2506,12 +2507,12 @@ enum emulation_result kvm_mips_check_privilege(unsigned long cause, | |||
| 2506 | kvm_debug("%s: LD MISS @ %#lx\n", __func__, | 2507 | kvm_debug("%s: LD MISS @ %#lx\n", __func__, |
| 2507 | badvaddr); | 2508 | badvaddr); |
| 2508 | cause &= ~0xff; | 2509 | cause &= ~0xff; |
| 2509 | cause |= (T_ADDR_ERR_LD << CAUSEB_EXCCODE); | 2510 | cause |= (EXCCODE_ADEL << CAUSEB_EXCCODE); |
| 2510 | er = EMULATE_PRIV_FAIL; | 2511 | er = EMULATE_PRIV_FAIL; |
| 2511 | } | 2512 | } |
| 2512 | break; | 2513 | break; |
| 2513 | 2514 | ||
| 2514 | case T_TLB_ST_MISS: | 2515 | case EXCCODE_TLBS: |
| 2515 | /* | 2516 | /* |
| 2516 | * We we are accessing Guest kernel space, then send an | 2517 | * We we are accessing Guest kernel space, then send an |
| 2517 | * address error exception to the guest | 2518 | * address error exception to the guest |
| @@ -2520,26 +2521,26 @@ enum emulation_result kvm_mips_check_privilege(unsigned long cause, | |||
| 2520 | kvm_debug("%s: ST MISS @ %#lx\n", __func__, | 2521 | kvm_debug("%s: ST MISS @ %#lx\n", __func__, |
| 2521 | badvaddr); | 2522 | badvaddr); |
| 2522 | cause &= ~0xff; | 2523 | cause &= ~0xff; |
| 2523 | cause |= (T_ADDR_ERR_ST << CAUSEB_EXCCODE); | 2524 | cause |= (EXCCODE_ADES << CAUSEB_EXCCODE); |
| 2524 | er = EMULATE_PRIV_FAIL; | 2525 | er = EMULATE_PRIV_FAIL; |
| 2525 | } | 2526 | } |
| 2526 | break; | 2527 | break; |
| 2527 | 2528 | ||
| 2528 | case T_ADDR_ERR_ST: | 2529 | case EXCCODE_ADES: |
| 2529 | kvm_debug("%s: address error ST @ %#lx\n", __func__, | 2530 | kvm_debug("%s: address error ST @ %#lx\n", __func__, |
| 2530 | badvaddr); | 2531 | badvaddr); |
| 2531 | if ((badvaddr & PAGE_MASK) == KVM_GUEST_COMMPAGE_ADDR) { | 2532 | if ((badvaddr & PAGE_MASK) == KVM_GUEST_COMMPAGE_ADDR) { |
| 2532 | cause &= ~0xff; | 2533 | cause &= ~0xff; |
| 2533 | cause |= (T_TLB_ST_MISS << CAUSEB_EXCCODE); | 2534 | cause |= (EXCCODE_TLBS << CAUSEB_EXCCODE); |
| 2534 | } | 2535 | } |
| 2535 | er = EMULATE_PRIV_FAIL; | 2536 | er = EMULATE_PRIV_FAIL; |
| 2536 | break; | 2537 | break; |
| 2537 | case T_ADDR_ERR_LD: | 2538 | case EXCCODE_ADEL: |
| 2538 | kvm_debug("%s: address error LD @ %#lx\n", __func__, | 2539 | kvm_debug("%s: address error LD @ %#lx\n", __func__, |
| 2539 | badvaddr); | 2540 | badvaddr); |
| 2540 | if ((badvaddr & PAGE_MASK) == KVM_GUEST_COMMPAGE_ADDR) { | 2541 | if ((badvaddr & PAGE_MASK) == KVM_GUEST_COMMPAGE_ADDR) { |
| 2541 | cause &= ~0xff; | 2542 | cause &= ~0xff; |
| 2542 | cause |= (T_TLB_LD_MISS << CAUSEB_EXCCODE); | 2543 | cause |= (EXCCODE_TLBL << CAUSEB_EXCCODE); |
| 2543 | } | 2544 | } |
| 2544 | er = EMULATE_PRIV_FAIL; | 2545 | er = EMULATE_PRIV_FAIL; |
| 2545 | break; | 2546 | break; |
| @@ -2585,9 +2586,9 @@ enum emulation_result kvm_mips_handle_tlbmiss(unsigned long cause, | |||
| 2585 | (va & VPN2_MASK) | | 2586 | (va & VPN2_MASK) | |
| 2586 | (kvm_read_c0_guest_entryhi(vcpu->arch.cop0) & ASID_MASK)); | 2587 | (kvm_read_c0_guest_entryhi(vcpu->arch.cop0) & ASID_MASK)); |
| 2587 | if (index < 0) { | 2588 | if (index < 0) { |
| 2588 | if (exccode == T_TLB_LD_MISS) { | 2589 | if (exccode == EXCCODE_TLBL) { |
| 2589 | er = kvm_mips_emulate_tlbmiss_ld(cause, opc, run, vcpu); | 2590 | er = kvm_mips_emulate_tlbmiss_ld(cause, opc, run, vcpu); |
| 2590 | } else if (exccode == T_TLB_ST_MISS) { | 2591 | } else if (exccode == EXCCODE_TLBS) { |
| 2591 | er = kvm_mips_emulate_tlbmiss_st(cause, opc, run, vcpu); | 2592 | er = kvm_mips_emulate_tlbmiss_st(cause, opc, run, vcpu); |
| 2592 | } else { | 2593 | } else { |
| 2593 | kvm_err("%s: invalid exc code: %d\n", __func__, | 2594 | kvm_err("%s: invalid exc code: %d\n", __func__, |
| @@ -2602,10 +2603,10 @@ enum emulation_result kvm_mips_handle_tlbmiss(unsigned long cause, | |||
| 2602 | * exception to the guest | 2603 | * exception to the guest |
| 2603 | */ | 2604 | */ |
| 2604 | if (!TLB_IS_VALID(*tlb, va)) { | 2605 | if (!TLB_IS_VALID(*tlb, va)) { |
| 2605 | if (exccode == T_TLB_LD_MISS) { | 2606 | if (exccode == EXCCODE_TLBL) { |
| 2606 | er = kvm_mips_emulate_tlbinv_ld(cause, opc, run, | 2607 | er = kvm_mips_emulate_tlbinv_ld(cause, opc, run, |
| 2607 | vcpu); | 2608 | vcpu); |
| 2608 | } else if (exccode == T_TLB_ST_MISS) { | 2609 | } else if (exccode == EXCCODE_TLBS) { |
| 2609 | er = kvm_mips_emulate_tlbinv_st(cause, opc, run, | 2610 | er = kvm_mips_emulate_tlbinv_st(cause, opc, run, |
| 2610 | vcpu); | 2611 | vcpu); |
| 2611 | } else { | 2612 | } else { |
diff --git a/arch/mips/kvm/interrupt.c b/arch/mips/kvm/interrupt.c index 9b4445940c2b..95f790663b0c 100644 --- a/arch/mips/kvm/interrupt.c +++ b/arch/mips/kvm/interrupt.c | |||
| @@ -128,7 +128,7 @@ int kvm_mips_irq_deliver_cb(struct kvm_vcpu *vcpu, unsigned int priority, | |||
| 128 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) | 128 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) |
| 129 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ5)) { | 129 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ5)) { |
| 130 | allowed = 1; | 130 | allowed = 1; |
| 131 | exccode = T_INT; | 131 | exccode = EXCCODE_INT; |
| 132 | } | 132 | } |
| 133 | break; | 133 | break; |
| 134 | 134 | ||
| @@ -137,7 +137,7 @@ int kvm_mips_irq_deliver_cb(struct kvm_vcpu *vcpu, unsigned int priority, | |||
| 137 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) | 137 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) |
| 138 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ0)) { | 138 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ0)) { |
| 139 | allowed = 1; | 139 | allowed = 1; |
| 140 | exccode = T_INT; | 140 | exccode = EXCCODE_INT; |
| 141 | } | 141 | } |
| 142 | break; | 142 | break; |
| 143 | 143 | ||
| @@ -146,7 +146,7 @@ int kvm_mips_irq_deliver_cb(struct kvm_vcpu *vcpu, unsigned int priority, | |||
| 146 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) | 146 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) |
| 147 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ1)) { | 147 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ1)) { |
| 148 | allowed = 1; | 148 | allowed = 1; |
| 149 | exccode = T_INT; | 149 | exccode = EXCCODE_INT; |
| 150 | } | 150 | } |
| 151 | break; | 151 | break; |
| 152 | 152 | ||
| @@ -155,7 +155,7 @@ int kvm_mips_irq_deliver_cb(struct kvm_vcpu *vcpu, unsigned int priority, | |||
| 155 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) | 155 | && (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) |
| 156 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ2)) { | 156 | && (kvm_read_c0_guest_status(cop0) & IE_IRQ2)) { |
| 157 | allowed = 1; | 157 | allowed = 1; |
| 158 | exccode = T_INT; | 158 | exccode = EXCCODE_INT; |
| 159 | } | 159 | } |
| 160 | break; | 160 | break; |
| 161 | 161 | ||
diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c index 5848b616d5a0..1b688faf2cf3 100644 --- a/arch/mips/kvm/mips.c +++ b/arch/mips/kvm/mips.c | |||
| @@ -1264,8 +1264,8 @@ int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 1264 | } | 1264 | } |
| 1265 | 1265 | ||
| 1266 | switch (exccode) { | 1266 | switch (exccode) { |
| 1267 | case T_INT: | 1267 | case EXCCODE_INT: |
| 1268 | kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc); | 1268 | kvm_debug("[%d]EXCCODE_INT @ %p\n", vcpu->vcpu_id, opc); |
| 1269 | 1269 | ||
| 1270 | ++vcpu->stat.int_exits; | 1270 | ++vcpu->stat.int_exits; |
| 1271 | trace_kvm_exit(vcpu, INT_EXITS); | 1271 | trace_kvm_exit(vcpu, INT_EXITS); |
| @@ -1276,8 +1276,8 @@ int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 1276 | ret = RESUME_GUEST; | 1276 | ret = RESUME_GUEST; |
| 1277 | break; | 1277 | break; |
| 1278 | 1278 | ||
| 1279 | case T_COP_UNUSABLE: | 1279 | case EXCCODE_CPU: |
| 1280 | kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc); | 1280 | kvm_debug("EXCCODE_CPU: @ PC: %p\n", opc); |
| 1281 | 1281 | ||
| 1282 | ++vcpu->stat.cop_unusable_exits; | 1282 | ++vcpu->stat.cop_unusable_exits; |
| 1283 | trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS); | 1283 | trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS); |
| @@ -1287,13 +1287,13 @@ int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 1287 | ret = RESUME_HOST; | 1287 | ret = RESUME_HOST; |
| 1288 | break; | 1288 | break; |
| 1289 | 1289 | ||
| 1290 | case T_TLB_MOD: | 1290 | case EXCCODE_MOD: |
| 1291 | ++vcpu->stat.tlbmod_exits; | 1291 | ++vcpu->stat.tlbmod_exits; |
| 1292 | trace_kvm_exit(vcpu, TLBMOD_EXITS); | 1292 | trace_kvm_exit(vcpu, TLBMOD_EXITS); |
| 1293 | ret = kvm_mips_callbacks->handle_tlb_mod(vcpu); | 1293 | ret = kvm_mips_callbacks->handle_tlb_mod(vcpu); |
| 1294 | break; | 1294 | break; |
| 1295 | 1295 | ||
| 1296 | case T_TLB_ST_MISS: | 1296 | case EXCCODE_TLBS: |
| 1297 | kvm_debug("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n", | 1297 | kvm_debug("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n", |
| 1298 | cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc, | 1298 | cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc, |
| 1299 | badvaddr); | 1299 | badvaddr); |
| @@ -1303,7 +1303,7 @@ int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 1303 | ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu); | 1303 | ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu); |
| 1304 | break; | 1304 | break; |
| 1305 | 1305 | ||
| 1306 | case T_TLB_LD_MISS: | 1306 | case EXCCODE_TLBL: |
| 1307 | kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n", | 1307 | kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n", |
| 1308 | cause, opc, badvaddr); | 1308 | cause, opc, badvaddr); |
| 1309 | 1309 | ||
| @@ -1312,55 +1312,55 @@ int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
| 1312 | ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu); | 1312 | ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu); |
| 1313 | break; | 1313 | break; |
| 1314 | 1314 | ||
| 1315 | case T_ADDR_ERR_ST: | 1315 | case EXCCODE_ADES: |
| 1316 | ++vcpu->stat.addrerr_st_exits; | 1316 | ++vcpu->stat.addrerr_st_exits; |
| 1317 | trace_kvm_exit(vcpu, ADDRERR_ST_EXITS); | 1317 | trace_kvm_exit(vcpu, ADDRERR_ST_EXITS); |
| 1318 | ret = kvm_mips_callbacks->handle_addr_err_st(vcpu); | 1318 | ret = kvm_mips_callbacks->handle_addr_err_st(vcpu); |
| 1319 | break; | 1319 | break; |
| 1320 | 1320 | ||
| 1321 | case T_ADDR_ERR_LD: | 1321 | case EXCCODE_ADEL: |
| 1322 | ++vcpu->stat.addrerr_ld_exits; | 1322 | ++vcpu->stat.addrerr_ld_exits; |
| 1323 | trace_kvm_exit(vcpu, ADDRERR_LD_EXITS); | 1323 | trace_kvm_exit(vcpu, ADDRERR_LD_EXITS); |
| 1324 | ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu); | 1324 | ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu); |
| 1325 | break; | 1325 | break; |
| 1326 | 1326 | ||
| 1327 | case T_SYSCALL: | 1327 | case EXCCODE_SYS: |
| 1328 | ++vcpu->stat.syscall_exits; | 1328 | ++vcpu->stat.syscall_exits; |
| 1329 | trace_kvm_exit(vcpu, SYSCALL_EXITS); | 1329 | trace_kvm_exit(vcpu, SYSCALL_EXITS); |
| 1330 | ret = kvm_mips_callbacks->handle_syscall(vcpu); | 1330 | ret = kvm_mips_callbacks->handle_syscall(vcpu); |
| 1331 | break; | 1331 | break; |
| 1332 | 1332 | ||
| 1333 | case T_RES_INST: | 1333 | case EXCCODE_RI: |
| 1334 | ++vcpu->stat.resvd_inst_exits; | 1334 | ++vcpu->stat.resvd_inst_exits; |
| 1335 | trace_kvm_exit(vcpu, RESVD_INST_EXITS); | 1335 | trace_kvm_exit(vcpu, RESVD_INST_EXITS); |
| 1336 | ret = kvm_mips_callbacks->handle_res_inst(vcpu); | 1336 | ret = kvm_mips_callbacks->handle_res_inst(vcpu); |
| 1337 | break; | 1337 | break; |
| 1338 | 1338 | ||
| 1339 | case T_BREAK: | 1339 | case EXCCODE_BP: |
| 1340 | ++vcpu->stat.break_inst_exits; | 1340 | ++vcpu->stat.break_inst_exits; |
| 1341 | trace_kvm_exit(vcpu, BREAK_INST_EXITS); | 1341 | trace_kvm_exit(vcpu, BREAK_INST_EXITS); |
| 1342 | ret = kvm_mips_callbacks->handle_break(vcpu); | 1342 | ret = kvm_mips_callbacks->handle_break(vcpu); |
| 1343 | break; | 1343 | break; |
| 1344 | 1344 | ||
| 1345 | case T_TRAP: | 1345 | case EXCCODE_TR: |
| 1346 | ++vcpu->stat.trap_inst_exits; | 1346 | ++vcpu->stat.trap_inst_exits; |
| 1347 | trace_kvm_exit(vcpu, TRAP_INST_EXITS); | 1347 | trace_kvm_exit(vcpu, TRAP_INST_EXITS); |
| 1348 | ret = kvm_mips_callbacks->handle_trap(vcpu); | 1348 | ret = kvm_mips_callbacks->handle_trap(vcpu); |
| 1349 | break; | 1349 | break; |
| 1350 | 1350 | ||
| 1351 | case T_MSAFPE: | 1351 | case EXCCODE_MSAFPE: |
| 1352 | ++vcpu->stat.msa_fpe_exits; | 1352 | ++vcpu->stat.msa_fpe_exits; |
| 1353 | trace_kvm_exit(vcpu, MSA_FPE_EXITS); | 1353 | trace_kvm_exit(vcpu, MSA_FPE_EXITS); |
| 1354 | ret = kvm_mips_callbacks->handle_msa_fpe(vcpu); | 1354 | ret = kvm_mips_callbacks->handle_msa_fpe(vcpu); |
| 1355 | break; | 1355 | break; |
| 1356 | 1356 | ||
| 1357 | case T_FPE: | 1357 | case EXCCODE_FPE: |
| 1358 | ++vcpu->stat.fpe_exits; | 1358 | ++vcpu->stat.fpe_exits; |
| 1359 | trace_kvm_exit(vcpu, FPE_EXITS); | 1359 | trace_kvm_exit(vcpu, FPE_EXITS); |
| 1360 | ret = kvm_mips_callbacks->handle_fpe(vcpu); | 1360 | ret = kvm_mips_callbacks->handle_fpe(vcpu); |
| 1361 | break; | 1361 | break; |
| 1362 | 1362 | ||
| 1363 | case T_MSADIS: | 1363 | case EXCCODE_MSADIS: |
| 1364 | ++vcpu->stat.msa_disabled_exits; | 1364 | ++vcpu->stat.msa_disabled_exits; |
| 1365 | trace_kvm_exit(vcpu, MSA_DISABLED_EXITS); | 1365 | trace_kvm_exit(vcpu, MSA_DISABLED_EXITS); |
| 1366 | ret = kvm_mips_callbacks->handle_msa_disabled(vcpu); | 1366 | ret = kvm_mips_callbacks->handle_msa_disabled(vcpu); |
