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authorBard Liao <bardliao@realtek.com>2015-04-27 23:27:40 -0400
committerMark Brown <broonie@kernel.org>2015-04-29 07:20:26 -0400
commit16ab6e18c60927e5a9e756c384a1ed7bd9f40871 (patch)
treeca561cec68bc0cce339be8f0df47170fe82b74fa
parentb787f68c36d49bb1d9236f403813641efa74a031 (diff)
ASoC: rt5677: add i2s asrc clk src selection
The ASRC source of i2s are also configurable. We add the selection in the existing rt5677_sel_asrc_clk_src API. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/codecs/rt5677.c30
-rw-r--r--sound/soc/codecs/rt5677.h14
2 files changed, 44 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index af182586712d..331e638b28f4 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -1057,6 +1057,7 @@ int rt5677_sel_asrc_clk_src(struct snd_soc_codec *codec,
1057 unsigned int asrc5_mask = 0, asrc5_value = 0; 1057 unsigned int asrc5_mask = 0, asrc5_value = 0;
1058 unsigned int asrc6_mask = 0, asrc6_value = 0; 1058 unsigned int asrc6_mask = 0, asrc6_value = 0;
1059 unsigned int asrc7_mask = 0, asrc7_value = 0; 1059 unsigned int asrc7_mask = 0, asrc7_value = 0;
1060 unsigned int asrc8_mask = 0, asrc8_value = 0;
1060 1061
1061 switch (clk_src) { 1062 switch (clk_src) {
1062 case RT5677_CLK_SEL_SYS: 1063 case RT5677_CLK_SEL_SYS:
@@ -1193,6 +1194,35 @@ int rt5677_sel_asrc_clk_src(struct snd_soc_codec *codec,
1193 regmap_update_bits(rt5677->regmap, RT5677_ASRC_7, asrc7_mask, 1194 regmap_update_bits(rt5677->regmap, RT5677_ASRC_7, asrc7_mask,
1194 asrc7_value); 1195 asrc7_value);
1195 1196
1197 /* ASRC 8 */
1198 if (filter_mask & RT5677_I2S1_SOURCE) {
1199 asrc8_mask |= RT5677_I2S1_CLK_SEL_MASK;
1200 asrc8_value = (asrc8_value & ~RT5677_I2S1_CLK_SEL_MASK)
1201 | ((clk_src - 1) << RT5677_I2S1_CLK_SEL_SFT);
1202 }
1203
1204 if (filter_mask & RT5677_I2S2_SOURCE) {
1205 asrc8_mask |= RT5677_I2S2_CLK_SEL_MASK;
1206 asrc8_value = (asrc8_value & ~RT5677_I2S2_CLK_SEL_MASK)
1207 | ((clk_src - 1) << RT5677_I2S2_CLK_SEL_SFT);
1208 }
1209
1210 if (filter_mask & RT5677_I2S3_SOURCE) {
1211 asrc8_mask |= RT5677_I2S3_CLK_SEL_MASK;
1212 asrc8_value = (asrc8_value & ~RT5677_I2S3_CLK_SEL_MASK)
1213 | ((clk_src - 1) << RT5677_I2S3_CLK_SEL_SFT);
1214 }
1215
1216 if (filter_mask & RT5677_I2S4_SOURCE) {
1217 asrc8_mask |= RT5677_I2S4_CLK_SEL_MASK;
1218 asrc8_value = (asrc8_value & ~RT5677_I2S4_CLK_SEL_MASK)
1219 | ((clk_src - 1) << RT5677_I2S4_CLK_SEL_SFT);
1220 }
1221
1222 if (asrc8_mask)
1223 regmap_update_bits(rt5677->regmap, RT5677_ASRC_8, asrc8_mask,
1224 asrc8_value);
1225
1196 return 0; 1226 return 0;
1197} 1227}
1198EXPORT_SYMBOL_GPL(rt5677_sel_asrc_clk_src); 1228EXPORT_SYMBOL_GPL(rt5677_sel_asrc_clk_src);
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index 9dceb41d18ea..62571d071a8d 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -1446,6 +1446,16 @@
1446#define RT5677_DSP_OB_4_7_CLK_SEL_MASK (0xf << 8) 1446#define RT5677_DSP_OB_4_7_CLK_SEL_MASK (0xf << 8)
1447#define RT5677_DSP_OB_4_7_CLK_SEL_SFT 8 1447#define RT5677_DSP_OB_4_7_CLK_SEL_SFT 8
1448 1448
1449/* ASRC Control 8 (0x8a) */
1450#define RT5677_I2S1_CLK_SEL_MASK (0xf << 12)
1451#define RT5677_I2S1_CLK_SEL_SFT 12
1452#define RT5677_I2S2_CLK_SEL_MASK (0xf << 8)
1453#define RT5677_I2S2_CLK_SEL_SFT 8
1454#define RT5677_I2S3_CLK_SEL_MASK (0xf << 4)
1455#define RT5677_I2S3_CLK_SEL_SFT 4
1456#define RT5677_I2S4_CLK_SEL_MASK (0xf)
1457#define RT5677_I2S4_CLK_SEL_SFT 0
1458
1449/* VAD Function Control 4 (0x9f) */ 1459/* VAD Function Control 4 (0x9f) */
1450#define RT5677_VAD_SRC_MASK (0x7 << 8) 1460#define RT5677_VAD_SRC_MASK (0x7 << 8)
1451#define RT5677_VAD_SRC_SFT 8 1461#define RT5677_VAD_SRC_SFT 8
@@ -1744,6 +1754,10 @@ enum {
1744 RT5677_AD_MONO_R_FILTER = (0x1 << 12), 1754 RT5677_AD_MONO_R_FILTER = (0x1 << 12),
1745 RT5677_DSP_OB_0_3_FILTER = (0x1 << 13), 1755 RT5677_DSP_OB_0_3_FILTER = (0x1 << 13),
1746 RT5677_DSP_OB_4_7_FILTER = (0x1 << 14), 1756 RT5677_DSP_OB_4_7_FILTER = (0x1 << 14),
1757 RT5677_I2S1_SOURCE = (0x1 << 15),
1758 RT5677_I2S2_SOURCE = (0x1 << 16),
1759 RT5677_I2S3_SOURCE = (0x1 << 17),
1760 RT5677_I2S4_SOURCE = (0x1 << 18),
1747}; 1761};
1748 1762
1749struct rt5677_priv { 1763struct rt5677_priv {