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authorOlivier Moysan <olivier.moysan@st.com>2017-10-19 09:03:17 -0400
committerMark Brown <broonie@kernel.org>2017-10-21 06:17:27 -0400
commit14f0e5f8d97e632695d92f41f2e91d10d8005d47 (patch)
tree7dfb62144c6b4e5abde9b9a346ba2c67214f7136
parent3c6f6c53ab4df585639bbe647b45aa81ca54bdd2 (diff)
ASoC: stm32: Add synchronization to SAI bindings
Add synchronization configuration to STM32 SAI bindings. This patch also adds peripheral clock which is required to access synchronization register. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/sound/st,stm32-sai.txt14
1 files changed, 11 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/sound/st,stm32-sai.txt b/Documentation/devicetree/bindings/sound/st,stm32-sai.txt
index f1c5ae59e7c9..1f9cd7095337 100644
--- a/Documentation/devicetree/bindings/sound/st,stm32-sai.txt
+++ b/Documentation/devicetree/bindings/sound/st,stm32-sai.txt
@@ -10,13 +10,21 @@ Required properties:
10 - reg: Base address and size of SAI common register set. 10 - reg: Base address and size of SAI common register set.
11 - clocks: Must contain phandle and clock specifier pairs for each entry 11 - clocks: Must contain phandle and clock specifier pairs for each entry
12 in clock-names. 12 in clock-names.
13 - clock-names: Must contain "x8k" and "x11k" 13 - clock-names: Must contain "pclk" "x8k" and "x11k"
14 "pclk": Clock which feeds the peripheral bus interface.
15 Mandatory for "st,stm32h7-sai" compatible.
16 Not used for "st,stm32f4-sai" compatible.
14 "x8k": SAI parent clock for sampling rates multiple of 8kHz. 17 "x8k": SAI parent clock for sampling rates multiple of 8kHz.
15 "x11k": SAI parent clock for sampling rates multiple of 11.025kHz. 18 "x11k": SAI parent clock for sampling rates multiple of 11.025kHz.
16 - interrupts: cpu DAI interrupt line shared by SAI sub-blocks 19 - interrupts: cpu DAI interrupt line shared by SAI sub-blocks
17 20
18Optional properties: 21Optional properties:
19 - resets: Reference to a reset controller asserting the SAI 22 - resets: Reference to a reset controller asserting the SAI
23 - st,sync: specify synchronization mode.
24 By default SAI sub-block is in asynchronous mode.
25 This property sets SAI sub-block as slave of another SAI sub-block.
26 Must contain the phandle and index of the sai sub-block providing
27 the synchronization.
20 28
21SAI subnodes: 29SAI subnodes:
22Two subnodes corresponding to SAI sub-block instances A et B can be defined. 30Two subnodes corresponding to SAI sub-block instances A et B can be defined.
@@ -52,8 +60,8 @@ sai1: sai1@40015800 {
52 #size-cells = <1>; 60 #size-cells = <1>;
53 ranges = <0 0x40015800 0x400>; 61 ranges = <0 0x40015800 0x400>;
54 reg = <0x40015800 0x4>; 62 reg = <0x40015800 0x4>;
55 clocks = <&rcc PLL1_Q>, <&rcc PLL2_P>; 63 clocks = <&rcc SAI1_CK>, <&rcc PLL1_Q>, <&rcc PLL2_P>;
56 clock-names = "x8k", "x11k"; 64 clock-names = "pclk", "x8k", "x11k";
57 interrupts = <87>; 65 interrupts = <87>;
58 66
59 sai1a: audio-controller@40015804 { 67 sai1a: audio-controller@40015804 {