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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-11 20:48:14 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-11 20:48:14 -0500
commit140cd7fb04a4a2bc09a30980bc8104cc89e09330 (patch)
tree776d57c7508f946d592de4334d4d3cb50fd36220
parent27afc5dbda52ee3dbcd0bda7375c917c6936b470 (diff)
parent56548fc0e86cb9156af7a7e1f15ba78f251dafaf (diff)
Merge tag 'powerpc-3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux
Pull powerpc updates from Michael Ellerman: "Some nice cleanups like removing bootmem, and removal of __get_cpu_var(). There is one patch to mm/gup.c. This is the generic GUP implementation, but is only used by us and arm(64). We have an ack from Steve Capper, and although we didn't get an ack from Andrew he told us to take the patch through the powerpc tree. There's one cxl patch. This is in drivers/misc, but Greg said he was happy for us to manage fixes for it. There is an infrastructure patch to support an IPMI driver for OPAL. There is also an RTC driver for OPAL. We weren't able to get any response from the RTC maintainer, Alessandro Zummo, so in the end we just merged the driver. The usual batch of Freescale updates from Scott" * tag 'powerpc-3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux: (101 commits) powerpc/powernv: Return to cpu offline loop when finished in KVM guest powerpc/book3s: Fix partial invalidation of TLBs in MCE code. powerpc/mm: don't do tlbie for updatepp request with NO HPTE fault powerpc/xmon: Cleanup the breakpoint flags powerpc/xmon: Enable HW instruction breakpoint on POWER8 powerpc/mm/thp: Use tlbiel if possible powerpc/mm/thp: Remove code duplication powerpc/mm/hugetlb: Sanity check gigantic hugepage count powerpc/oprofile: Disable pagefaults during user stack read powerpc/mm: Check for matching hpte without taking hpte lock powerpc: Drop useless warning in eeh_init() powerpc/powernv: Cleanup unused MCE definitions/declarations. powerpc/eeh: Dump PHB diag-data early powerpc/eeh: Recover EEH error on ownership change for BCM5719 powerpc/eeh: Set EEH_PE_RESET on PE reset powerpc/eeh: Refactor eeh_reset_pe() powerpc: Remove more traces of bootmem powerpc/pseries: Initialise nvram_pstore_info's buf_lock cxl: Name interrupts in /proc/interrupt cxl: Return error to PSL if IRQ demultiplexing fails & print clearer warning ...
-rw-r--r--Documentation/devicetree/bindings/clock/qoriq-clock.txt14
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/fman.txt534
-rw-r--r--Documentation/devicetree/bindings/rtc/rtc-opal.txt16
-rw-r--r--Documentation/devicetree/bindings/soc/fsl/bman-portals.txt56
-rw-r--r--Documentation/devicetree/bindings/soc/fsl/bman.txt125
-rw-r--r--Documentation/devicetree/bindings/soc/fsl/qman-portals.txt154
-rw-r--r--Documentation/devicetree/bindings/soc/fsl/qman.txt165
-rw-r--r--arch/powerpc/Kconfig5
-rw-r--r--arch/powerpc/boot/dts/b4860emu.dts4
-rw-r--r--arch/powerpc/boot/dts/b4qds.dtsi23
-rw-r--r--arch/powerpc/boot/dts/bsc9131rdb.dtsi50
-rw-r--r--arch/powerpc/boot/dts/fsl/b4420si-post.dtsi28
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-post.dtsi28
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi48
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi48
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi48
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi48
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi48
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi85
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/t1040si-post.dtsi30
-rw-r--r--arch/powerpc/boot/dts/fsl/t2081si-post.dtsi29
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi29
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts20
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts20
-rw-r--r--arch/powerpc/boot/dts/p5040ds.dts20
-rw-r--r--arch/powerpc/boot/dts/t104xrdb.dtsi7
-rw-r--r--arch/powerpc/boot/dts/t208xqds.dtsi11
-rw-r--r--arch/powerpc/boot/dts/t4240emu.dts4
-rw-r--r--arch/powerpc/boot/main.c15
-rw-r--r--arch/powerpc/boot/ops.h2
-rw-r--r--arch/powerpc/boot/serial.c6
-rw-r--r--arch/powerpc/configs/corenet32_smp_defconfig1
-rw-r--r--arch/powerpc/configs/corenet64_smp_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig1
-rw-r--r--arch/powerpc/include/asm/bitops.h6
-rw-r--r--arch/powerpc/include/asm/cputable.h10
-rw-r--r--arch/powerpc/include/asm/eeh.h2
-rw-r--r--arch/powerpc/include/asm/elf.h3
-rw-r--r--arch/powerpc/include/asm/fsl_guts.h5
-rw-r--r--arch/powerpc/include/asm/hardirq.h7
-rw-r--r--arch/powerpc/include/asm/hugetlb.h8
-rw-r--r--arch/powerpc/include/asm/io.h3
-rw-r--r--arch/powerpc/include/asm/machdep.h19
-rw-r--r--arch/powerpc/include/asm/mmu-8xx.h2
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h22
-rw-r--r--arch/powerpc/include/asm/opal.h122
-rw-r--r--arch/powerpc/include/asm/paca.h7
-rw-r--r--arch/powerpc/include/asm/page.h4
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h20
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64-4k.h16
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64-64k.h3
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h52
-rw-r--r--arch/powerpc/include/asm/pgtable.h6
-rw-r--r--arch/powerpc/include/asm/processor.h2
-rw-r--r--arch/powerpc/include/asm/pte-8xx.h7
-rw-r--r--arch/powerpc/include/asm/setup.h3
-rw-r--r--arch/powerpc/include/asm/thread_info.h5
-rw-r--r--arch/powerpc/include/asm/tlbflush.h10
-rw-r--r--arch/powerpc/include/asm/vga.h4
-rw-r--r--arch/powerpc/include/asm/xics.h8
-rw-r--r--arch/powerpc/kernel/align.c2
-rw-r--r--arch/powerpc/kernel/asm-offsets.c7
-rw-r--r--arch/powerpc/kernel/crash_dump.c1
-rw-r--r--arch/powerpc/kernel/dbell.c2
-rw-r--r--arch/powerpc/kernel/eeh.c41
-rw-r--r--arch/powerpc/kernel/eeh_driver.c10
-rw-r--r--arch/powerpc/kernel/entry_32.S12
-rw-r--r--arch/powerpc/kernel/entry_64.S35
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S34
-rw-r--r--arch/powerpc/kernel/ftrace.c73
-rw-r--r--arch/powerpc/kernel/head_8xx.S230
-rw-r--r--arch/powerpc/kernel/hw_breakpoint.c6
-rw-r--r--arch/powerpc/kernel/idle_power7.S12
-rw-r--r--arch/powerpc/kernel/iommu.c2
-rw-r--r--arch/powerpc/kernel/irq.c5
-rw-r--r--arch/powerpc/kernel/kgdb.c2
-rw-r--r--arch/powerpc/kernel/kprobes.c6
-rw-r--r--arch/powerpc/kernel/mce.c24
-rw-r--r--arch/powerpc/kernel/mce_power.c4
-rw-r--r--arch/powerpc/kernel/pci-common.c3
-rw-r--r--arch/powerpc/kernel/pci_32.c4
-rw-r--r--arch/powerpc/kernel/pci_64.c1
-rw-r--r--arch/powerpc/kernel/process.c36
-rw-r--r--arch/powerpc/kernel/prom.c11
-rw-r--r--arch/powerpc/kernel/rtas-proc.c20
-rw-r--r--arch/powerpc/kernel/rtas.c4
-rw-r--r--arch/powerpc/kernel/rtas_pci.c1
-rw-r--r--arch/powerpc/kernel/setup-common.c6
-rw-r--r--arch/powerpc/kernel/setup_32.c11
-rw-r--r--arch/powerpc/kernel/setup_64.c35
-rw-r--r--arch/powerpc/kernel/smp.c6
-rw-r--r--arch/powerpc/kernel/sysfs.c4
-rw-r--r--arch/powerpc/kernel/time.c23
-rw-r--r--arch/powerpc/kernel/traps.c8
-rw-r--r--arch/powerpc/kernel/udbg_16550.c6
-rw-r--r--arch/powerpc/kernel/vdso.c1
-rw-r--r--arch/powerpc/kvm/book3s_hv_builtin.c3
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S54
-rw-r--r--arch/powerpc/kvm/e500.c14
-rw-r--r--arch/powerpc/kvm/e500mc.c4
-rw-r--r--arch/powerpc/lib/Makefile1
-rw-r--r--arch/powerpc/lib/alloc.c4
-rw-r--r--arch/powerpc/lib/devres.c43
-rw-r--r--arch/powerpc/lib/sstep.c6
-rw-r--r--arch/powerpc/mm/Makefile2
-rw-r--r--arch/powerpc/mm/fault.c7
-rw-r--r--arch/powerpc/mm/gup.c235
-rw-r--r--arch/powerpc/mm/hash_low_64.S19
-rw-r--r--arch/powerpc/mm/hash_native_64.c41
-rw-r--r--arch/powerpc/mm/hash_utils_64.c114
-rw-r--r--arch/powerpc/mm/hugepage-hash64.c60
-rw-r--r--arch/powerpc/mm/hugetlbpage-book3e.c6
-rw-r--r--arch/powerpc/mm/hugetlbpage-hash64.c6
-rw-r--r--arch/powerpc/mm/hugetlbpage.c51
-rw-r--r--arch/powerpc/mm/init_32.c10
-rw-r--r--arch/powerpc/mm/init_64.c1
-rw-r--r--arch/powerpc/mm/mem.c77
-rw-r--r--arch/powerpc/mm/mmu_context_nohash.c8
-rw-r--r--arch/powerpc/mm/numa.c224
-rw-r--r--arch/powerpc/mm/pgtable_32.c3
-rw-r--r--arch/powerpc/mm/pgtable_64.c104
-rw-r--r--arch/powerpc/oprofile/backtrace.c6
-rw-r--r--arch/powerpc/perf/core-book3s.c22
-rw-r--r--arch/powerpc/perf/core-fsl-emb.c6
-rw-r--r--arch/powerpc/platforms/44x/ppc476.c2
-rw-r--r--arch/powerpc/platforms/512x/mpc512x_shared.c9
-rw-r--r--arch/powerpc/platforms/52xx/efika.c3
-rw-r--r--arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c8
-rw-r--r--arch/powerpc/platforms/85xx/corenet_generic.c2
-rw-r--r--arch/powerpc/platforms/85xx/sgy_cts1000.c4
-rw-r--r--arch/powerpc/platforms/8xx/Kconfig4
-rw-r--r--arch/powerpc/platforms/cell/beat_htab.c4
-rw-r--r--arch/powerpc/platforms/cell/celleb_pci.c6
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_epci.c1
-rw-r--r--arch/powerpc/platforms/cell/celleb_scc_pciex.c1
-rw-r--r--arch/powerpc/platforms/cell/celleb_setup.c4
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c6
-rw-r--r--arch/powerpc/platforms/cell/qpace_setup.c2
-rw-r--r--arch/powerpc/platforms/cell/setup.c2
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c5
-rw-r--r--arch/powerpc/platforms/cell/spufs/fault.c2
-rw-r--r--arch/powerpc/platforms/chrp/setup.c3
-rw-r--r--arch/powerpc/platforms/embedded6xx/gamecube.c3
-rw-r--r--arch/powerpc/platforms/embedded6xx/linkstation.c4
-rw-r--r--arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c6
-rw-r--r--arch/powerpc/platforms/embedded6xx/wii.c3
-rw-r--r--arch/powerpc/platforms/maple/pci.c1
-rw-r--r--arch/powerpc/platforms/maple/setup.c4
-rw-r--r--arch/powerpc/platforms/powermac/nvram.c6
-rw-r--r--arch/powerpc/platforms/powermac/pci.c1
-rw-r--r--arch/powerpc/platforms/powermac/setup.c3
-rw-r--r--arch/powerpc/platforms/powernv/eeh-ioda.c16
-rw-r--r--arch/powerpc/platforms/powernv/opal-async.c3
-rw-r--r--arch/powerpc/platforms/powernv/opal-rtc.c65
-rw-r--r--arch/powerpc/platforms/powernv/opal-tracepoints.c4
-rw-r--r--arch/powerpc/platforms/powernv/opal-wrappers.S6
-rw-r--r--arch/powerpc/platforms/powernv/opal.c21
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c217
-rw-r--r--arch/powerpc/platforms/powernv/pci-p5ioc2.c44
-rw-r--r--arch/powerpc/platforms/powernv/pci.c1
-rw-r--r--arch/powerpc/platforms/powernv/pci.h2
-rw-r--r--arch/powerpc/platforms/powernv/setup.c6
-rw-r--r--arch/powerpc/platforms/powernv/smp.c23
-rw-r--r--arch/powerpc/platforms/ps3/htab.c2
-rw-r--r--arch/powerpc/platforms/ps3/interrupt.c2
-rw-r--r--arch/powerpc/platforms/ps3/setup.c9
-rw-r--r--arch/powerpc/platforms/pseries/dtl.c2
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-memory.c21
-rw-r--r--arch/powerpc/platforms/pseries/hvCall.S4
-rw-r--r--arch/powerpc/platforms/pseries/hvCall_inst.c4
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c11
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c10
-rw-r--r--arch/powerpc/platforms/pseries/nvram.c2
-rw-r--r--arch/powerpc/platforms/pseries/pci.c2
-rw-r--r--arch/powerpc/platforms/pseries/ras.c4
-rw-r--r--arch/powerpc/platforms/pseries/setup.c65
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c1
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c3
-rw-r--r--arch/powerpc/sysdev/fsl_rio.c104
-rw-r--r--arch/powerpc/sysdev/fsl_rio.h13
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c5
-rw-r--r--arch/powerpc/sysdev/ipic.c1
-rw-r--r--arch/powerpc/sysdev/mpc5xxx_clocks.c3
-rw-r--r--arch/powerpc/sysdev/mpic.c1
-rw-r--r--arch/powerpc/sysdev/mpic_pasemi_msi.c1
-rw-r--r--arch/powerpc/sysdev/mpic_u3msi.c1
-rw-r--r--arch/powerpc/sysdev/ppc4xx_cpm.c8
-rw-r--r--arch/powerpc/sysdev/ppc4xx_msi.c1
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c1
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c1
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_ic.c1
-rw-r--r--arch/powerpc/sysdev/uic.c1
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c2
-rw-r--r--arch/powerpc/xmon/xmon.c82
-rw-r--r--drivers/misc/cxl/cxl.h15
-rw-r--r--drivers/misc/cxl/fault.c8
-rw-r--r--drivers/misc/cxl/irq.c144
-rw-r--r--drivers/misc/cxl/native.c14
-rw-r--r--drivers/rtc/Kconfig11
-rw-r--r--drivers/rtc/Makefile1
-rw-r--r--drivers/rtc/rtc-opal.c261
-rw-r--r--include/linux/hugetlb.h46
-rw-r--r--mm/gup.c81
205 files changed, 3246 insertions, 2177 deletions
diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
index 5666812fc42b..266ff9d23229 100644
--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
+++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
@@ -62,6 +62,8 @@ Required properties:
62 It takes parent's clock-frequency as its clock. 62 It takes parent's clock-frequency as its clock.
63 * "fsl,qoriq-sysclk-2.0": for input system clock (v2.0). 63 * "fsl,qoriq-sysclk-2.0": for input system clock (v2.0).
64 It takes parent's clock-frequency as its clock. 64 It takes parent's clock-frequency as its clock.
65 * "fsl,qoriq-platform-pll-1.0" for the platform PLL clock (v1.0)
66 * "fsl,qoriq-platform-pll-2.0" for the platform PLL clock (v2.0)
65- #clock-cells: From common clock binding. The number of cells in a 67- #clock-cells: From common clock binding. The number of cells in a
66 clock-specifier. Should be <0> for "fsl,qoriq-sysclk-[1,2].0" 68 clock-specifier. Should be <0> for "fsl,qoriq-sysclk-[1,2].0"
67 clocks, or <1> for "fsl,qoriq-core-pll-[1,2].0" clocks. 69 clocks, or <1> for "fsl,qoriq-core-pll-[1,2].0" clocks.
@@ -128,8 +130,16 @@ Example for clock block and clock provider:
128 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 130 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
129 clock-output-names = "cmux1"; 131 clock-output-names = "cmux1";
130 }; 132 };
133
134 platform-pll: platform-pll@c00 {
135 #clock-cells = <1>;
136 reg = <0xc00 0x4>;
137 compatible = "fsl,qoriq-platform-pll-1.0";
138 clocks = <&sysclk>;
139 clock-output-names = "platform-pll", "platform-pll-div2";
140 };
131 }; 141 };
132 } 142};
133 143
134Example for clock consumer: 144Example for clock consumer:
135 145
@@ -139,4 +149,4 @@ Example for clock consumer:
139 clocks = <&mux0>; 149 clocks = <&mux0>;
140 ... 150 ...
141 }; 151 };
142 } 152};
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
new file mode 100644
index 000000000000..edeea160ca39
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
@@ -0,0 +1,534 @@
1=============================================================================
2Freescale Frame Manager Device Bindings
3
4CONTENTS
5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - Example
11
12=============================================================================
13FMan Node
14
15DESCRIPTION
16
17Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
18etc.) the FMan node will have child nodes for each of them.
19
20PROPERTIES
21
22- compatible
23 Usage: required
24 Value type: <stringlist>
25 Definition: Must include "fsl,fman"
26 FMan version can be determined via FM_IP_REV_1 register in the
27 FMan block. The offset is 0xc4 from the beginning of the
28 Frame Processing Manager memory map (0xc3000 from the
29 beginning of the FMan node).
30
31- cell-index
32 Usage: required
33 Value type: <u32>
34 Definition: Specifies the index of the FMan unit.
35
36 The cell-index value may be used by the SoC, to identify the
37 FMan unit in the SoC memory map. In the table bellow,
38 there's a description of the cell-index use in each SoC:
39
40 - P1023:
41 register[bit] FMan unit cell-index
42 ============================================================
43 DEVDISR[1] 1 0
44
45 - P2041, P3041, P4080 P5020, P5040:
46 register[bit] FMan unit cell-index
47 ============================================================
48 DCFG_DEVDISR2[6] 1 0
49 DCFG_DEVDISR2[14] 2 1
50 (Second FM available only in P4080 and P5040)
51
52 - B4860, T1040, T2080, T4240:
53 register[bit] FMan unit cell-index
54 ============================================================
55 DCFG_CCSR_DEVDISR2[24] 1 0
56 DCFG_CCSR_DEVDISR2[25] 2 1
57 (Second FM available only in T4240)
58
59 DEVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
60 the specific SoC "Device Configuration/Pin Control" Memory
61 Map.
62
63- reg
64 Usage: required
65 Value type: <prop-encoded-array>
66 Definition: A standard property. Specifies the offset of the
67 following configuration registers:
68 - BMI configuration registers.
69 - QMI configuration registers.
70 - DMA configuration registers.
71 - FPM configuration registers.
72 - FMan controller configuration registers.
73
74- ranges
75 Usage: required
76 Value type: <prop-encoded-array>
77 Definition: A standard property.
78
79- clocks
80 Usage: required
81 Value type: <prop-encoded-array>
82 Definition: phandle for the fman input clock.
83
84- clock-names
85 usage: required
86 Value type: <stringlist>
87 Definition: "fmanclk" for the fman input clock.
88
89- interrupts
90 Usage: required
91 Value type: <prop-encoded-array>
92 Definition: A pair of IRQs are specified in this property.
93 The first element is associated with the event interrupts and
94 the second element is associated with the error interrupts.
95
96- fsl,qman-channel-range
97 Usage: required
98 Value type: <prop-encoded-array>
99 Definition: Specifies the range of the available dedicated
100 channels in the FMan. The first cell specifies the beginning
101 of the range and the second cell specifies the number of
102 channels.
103 Further information available at:
104 "Work Queue (WQ) Channel Assignments in the QMan" section
105 in DPAA Reference Manual.
106
107- fsl,qman
108- fsl,bman
109 Usage: required
110 Definition: See soc/fsl/qman.txt and soc/fsl/bman.txt
111
112=============================================================================
113FMan MURAM Node
114
115DESCRIPTION
116
117FMan Internal memory - shared between all the FMan modules.
118It contains data structures that are common and written to or read by
119the modules.
120FMan internal memory is split into the following parts:
121 Packet buffering (Tx/Rx FIFOs)
122 Frames internal context
123
124PROPERTIES
125
126- compatible
127 Usage: required
128 Value type: <stringlist>
129 Definition: Must include "fsl,fman-muram"
130
131- ranges
132 Usage: required
133 Value type: <prop-encoded-array>
134 Definition: A standard property.
135 Specifies the multi-user memory offset and the size within
136 the FMan.
137
138EXAMPLE
139
140muram@0 {
141 compatible = "fsl,fman-muram";
142 ranges = <0 0x000000 0x28000>;
143};
144
145=============================================================================
146FMan Port Node
147
148DESCRIPTION
149
150The Frame Manager (FMan) supports several types of hardware ports:
151 Ethernet receiver (RX)
152 Ethernet transmitter (TX)
153 Offline/Host command (O/H)
154
155PROPERTIES
156
157- compatible
158 Usage: required
159 Value type: <stringlist>
160 Definition: A standard property.
161 Must include one of the following:
162 - "fsl,fman-v2-port-oh" for FManV2 OH ports
163 - "fsl,fman-v2-port-rx" for FManV2 RX ports
164 - "fsl,fman-v2-port-tx" for FManV2 TX ports
165 - "fsl,fman-v3-port-oh" for FManV3 OH ports
166 - "fsl,fman-v3-port-rx" for FManV3 RX ports
167 - "fsl,fman-v3-port-tx" for FManV3 TX ports
168
169- cell-index
170 Usage: required
171 Value type: <u32>
172 Definition: Specifies the hardware port id.
173 Each hardware port on the FMan has its own hardware PortID.
174 Super set of all hardware Port IDs available at FMan Reference
175 Manual under "FMan Hardware Ports in Freescale Devices" table.
176
177 Each hardware port is assigned a 4KB, port-specific page in
178 the FMan hardware port memory region (which is part of the
179 FMan memory map). The first 4 KB in the FMan hardware ports
180 memory region is used for what are called common registers.
181 The subsequent 63 4KB pages are allocated to the hardware
182 ports.
183 The page of a specific port is determined by the cell-index.
184
185- reg
186 Usage: required
187 Value type: <prop-encoded-array>
188 Definition: There is one reg region describing the port
189 configuration registers.
190
191EXAMPLE
192
193port@a8000 {
194 cell-index = <0x28>;
195 compatible = "fsl,fman-v2-port-tx";
196 reg = <0xa8000 0x1000>;
197};
198
199port@88000 {
200 cell-index = <0x8>;
201 compatible = "fsl,fman-v2-port-rx";
202 reg = <0x88000 0x1000>;
203};
204
205port@81000 {
206 cell-index = <0x1>;
207 compatible = "fsl,fman-v2-port-oh";
208 reg = <0x81000 0x1000>;
209};
210
211=============================================================================
212FMan dTSEC/XGEC/mEMAC Node
213
214DESCRIPTION
215
216mEMAC/dTSEC/XGEC are the Ethernet network interfaces
217
218PROPERTIES
219
220- compatible
221 Usage: required
222 Value type: <stringlist>
223 Definition: A standard property.
224 Must include one of the following:
225 - "fsl,fman-dtsec" for dTSEC MAC
226 - "fsl,fman-xgec" for XGEC MAC
227 - "fsl,fman-memac for mEMAC MAC
228
229- cell-index
230 Usage: required
231 Value type: <u32>
232 Definition: Specifies the MAC id.
233
234 The cell-index value may be used by the FMan or the SoC, to
235 identify the MAC unit in the FMan (or SoC) memory map.
236 In the tables bellow there's a description of the cell-index
237 use, there are two tables, one describes the use of cell-index
238 by the FMan, the second describes the use by the SoC:
239
240 1. FMan Registers
241
242 FManV2:
243 register[bit] MAC cell-index
244 ============================================================
245 FM_EPI[16] XGEC 8
246 FM_EPI[16+n] dTSECn n-1
247 FM_NPI[11+n] dTSECn n-1
248 n = 1,..,5
249
250 FManV3:
251 register[bit] MAC cell-index
252 ============================================================
253 FM_EPI[16+n] mEMACn n-1
254 FM_EPI[25] mEMAC10 9
255
256 FM_NPI[11+n] mEMACn n-1
257 FM_NPI[10] mEMAC10 9
258 FM_NPI[11] mEMAC9 8
259 n = 1,..8
260
261 FM_EPI and FM_NPI are located in the FMan memory map.
262
263 2. SoC registers:
264
265 - P2041, P3041, P4080 P5020, P5040:
266 register[bit] FMan MAC cell
267 Unit index
268 ============================================================
269 DCFG_DEVDISR2[7] 1 XGEC 8
270 DCFG_DEVDISR2[7+n] 1 dTSECn n-1
271 DCFG_DEVDISR2[15] 2 XGEC 8
272 DCFG_DEVDISR2[15+n] 2 dTSECn n-1
273 n = 1,..5
274
275 - T1040, T2080, T4240, B4860:
276 register[bit] FMan MAC cell
277 Unit index
278 ============================================================
279 DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1
280 DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1
281 n = 1,..6,9,10
282
283 EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
284 the specific SoC "Device Configuration/Pin Control" Memory
285 Map.
286
287- reg
288 Usage: required
289 Value type: <prop-encoded-array>
290 Definition: A standard property.
291
292- fsl,fman-ports
293 Usage: required
294 Value type: <prop-encoded-array>
295 Definition: An array of two phandles - the first references is
296 the FMan RX port and the second is the TX port used by this
297 MAC.
298
299- ptp-timer
300 Usage required
301 Value type: <phandle>
302 Definition: A phandle for 1EEE1588 timer.
303
304EXAMPLE
305
306fman1_tx28: port@a8000 {
307 cell-index = <0x28>;
308 compatible = "fsl,fman-v2-port-tx";
309 reg = <0xa8000 0x1000>;
310};
311
312fman1_rx8: port@88000 {
313 cell-index = <0x8>;
314 compatible = "fsl,fman-v2-port-rx";
315 reg = <0x88000 0x1000>;
316};
317
318ptp-timer: ptp_timer@fe000 {
319 compatible = "fsl,fman-ptp-timer";
320 reg = <0xfe000 0x1000>;
321};
322
323ethernet@e0000 {
324 compatible = "fsl,fman-dtsec";
325 cell-index = <0>;
326 reg = <0xe0000 0x1000>;
327 fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;
328 ptp-timer = <&ptp-timer>;
329};
330
331============================================================================
332FMan IEEE 1588 Node
333
334DESCRIPTION
335
336The FMan interface to support IEEE 1588
337
338
339PROPERTIES
340
341- compatible
342 Usage: required
343 Value type: <stringlist>
344 Definition: A standard property.
345 Must include "fsl,fman-ptp-timer".
346
347- reg
348 Usage: required
349 Value type: <prop-encoded-array>
350 Definition: A standard property.
351
352EXAMPLE
353
354ptp-timer@fe000 {
355 compatible = "fsl,fman-ptp-timer";
356 reg = <0xfe000 0x1000>;
357};
358
359=============================================================================
360Example
361
362fman@400000 {
363 #address-cells = <1>;
364 #size-cells = <1>;
365 cell-index = <1>;
366 compatible = "fsl,fman"
367 ranges = <0 0x400000 0x100000>;
368 reg = <0x400000 0x100000>;
369 clocks = <&fman_clk>;
370 clock-names = "fmanclk";
371 interrupts = <
372 96 2 0 0
373 16 2 1 1>;
374 fsl,qman-channel-range = <0x40 0xc>;
375
376 muram@0 {
377 compatible = "fsl,fman-muram";
378 reg = <0x0 0x28000>;
379 };
380
381 port@81000 {
382 cell-index = <1>;
383 compatible = "fsl,fman-v2-port-oh";
384 reg = <0x81000 0x1000>;
385 };
386
387 port@82000 {
388 cell-index = <2>;
389 compatible = "fsl,fman-v2-port-oh";
390 reg = <0x82000 0x1000>;
391 };
392
393 port@83000 {
394 cell-index = <3>;
395 compatible = "fsl,fman-v2-port-oh";
396 reg = <0x83000 0x1000>;
397 };
398
399 port@84000 {
400 cell-index = <4>;
401 compatible = "fsl,fman-v2-port-oh";
402 reg = <0x84000 0x1000>;
403 };
404
405 port@85000 {
406 cell-index = <5>;
407 compatible = "fsl,fman-v2-port-oh";
408 reg = <0x85000 0x1000>;
409 };
410
411 port@86000 {
412 cell-index = <6>;
413 compatible = "fsl,fman-v2-port-oh";
414 reg = <0x86000 0x1000>;
415 };
416
417 fman1_rx_0x8: port@88000 {
418 cell-index = <0x8>;
419 compatible = "fsl,fman-v2-port-rx";
420 reg = <0x88000 0x1000>;
421 };
422
423 fman1_rx_0x9: port@89000 {
424 cell-index = <0x9>;
425 compatible = "fsl,fman-v2-port-rx";
426 reg = <0x89000 0x1000>;
427 };
428
429 fman1_rx_0xa: port@8a000 {
430 cell-index = <0xa>;
431 compatible = "fsl,fman-v2-port-rx";
432 reg = <0x8a000 0x1000>;
433 };
434
435 fman1_rx_0xb: port@8b000 {
436 cell-index = <0xb>;
437 compatible = "fsl,fman-v2-port-rx";
438 reg = <0x8b000 0x1000>;
439 };
440
441 fman1_rx_0xc: port@8c000 {
442 cell-index = <0xc>;
443 compatible = "fsl,fman-v2-port-rx";
444 reg = <0x8c000 0x1000>;
445 };
446
447 fman1_rx_0x10: port@90000 {
448 cell-index = <0x10>;
449 compatible = "fsl,fman-v2-port-rx";
450 reg = <0x90000 0x1000>;
451 };
452
453 fman1_tx_0x28: port@a8000 {
454 cell-index = <0x28>;
455 compatible = "fsl,fman-v2-port-tx";
456 reg = <0xa8000 0x1000>;
457 };
458
459 fman1_tx_0x29: port@a9000 {
460 cell-index = <0x29>;
461 compatible = "fsl,fman-v2-port-tx";
462 reg = <0xa9000 0x1000>;
463 };
464
465 fman1_tx_0x2a: port@aa000 {
466 cell-index = <0x2a>;
467 compatible = "fsl,fman-v2-port-tx";
468 reg = <0xaa000 0x1000>;
469 };
470
471 fman1_tx_0x2b: port@ab000 {
472 cell-index = <0x2b>;
473 compatible = "fsl,fman-v2-port-tx";
474 reg = <0xab000 0x1000>;
475 };
476
477 fman1_tx_0x2c: port@ac0000 {
478 cell-index = <0x2c>;
479 compatible = "fsl,fman-v2-port-tx";
480 reg = <0xac000 0x1000>;
481 };
482
483 fman1_tx_0x30: port@b0000 {
484 cell-index = <0x30>;
485 compatible = "fsl,fman-v2-port-tx";
486 reg = <0xb0000 0x1000>;
487 };
488
489 ethernet@e0000 {
490 compatible = "fsl,fman-dtsec";
491 cell-index = <0>;
492 reg = <0xe0000 0x1000>;
493 fsl,fman-ports = <&fman1_rx_0x8 &fman1_tx_0x28>;
494 };
495
496 ethernet@e2000 {
497 compatible = "fsl,fman-dtsec";
498 cell-index = <1>;
499 reg = <0xe2000 0x1000>;
500 fsl,fman-ports = <&fman1_rx_0x9 &fman1_tx_0x29>;
501 };
502
503 ethernet@e4000 {
504 compatible = "fsl,fman-dtsec";
505 cell-index = <2>;
506 reg = <0xe4000 0x1000>;
507 fsl,fman-ports = <&fman1_rx_0xa &fman1_tx_0x2a>;
508 };
509
510 ethernet@e6000 {
511 compatible = "fsl,fman-dtsec";
512 cell-index = <3>;
513 reg = <0xe6000 0x1000>;
514 fsl,fman-ports = <&fman1_rx_0xb &fman1_tx_0x2b>;
515 };
516
517 ethernet@e8000 {
518 compatible = "fsl,fman-dtsec";
519 cell-index = <4>;
520 reg = <0xf0000 0x1000>;
521 fsl,fman-ports = <&fman1_rx_0xc &fman1_tx_0x2c>;
522
523 ethernet@f0000 {
524 cell-index = <8>;
525 compatible = "fsl,fman-xgec";
526 reg = <0xf0000 0x1000>;
527 fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
528 };
529
530 ptp-timer@fe000 {
531 compatible = "fsl,fman-ptp-timer";
532 reg = <0xfe000 0x1000>;
533 };
534};
diff --git a/Documentation/devicetree/bindings/rtc/rtc-opal.txt b/Documentation/devicetree/bindings/rtc/rtc-opal.txt
new file mode 100644
index 000000000000..af87e5ecac54
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/rtc-opal.txt
@@ -0,0 +1,16 @@
1IBM OPAL real-time clock
2------------------------
3
4Required properties:
5- comapatible: Should be "ibm,opal-rtc"
6
7Optional properties:
8- has-tpo: Decides if the wakeup is supported or not.
9
10Example:
11 rtc {
12 compatible = "ibm,opal-rtc";
13 has-tpo;
14 phandle = <0x10000029>;
15 linux,phandle = <0x10000029>;
16 };
diff --git a/Documentation/devicetree/bindings/soc/fsl/bman-portals.txt b/Documentation/devicetree/bindings/soc/fsl/bman-portals.txt
new file mode 100644
index 000000000000..2a00e14e11e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/fsl/bman-portals.txt
@@ -0,0 +1,56 @@
1QorIQ DPAA Buffer Manager Portals Device Tree Binding
2
3Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
4
5CONTENTS
6
7 - BMan Portal
8 - Example
9
10BMan Portal Node
11
12Portals are memory mapped interfaces to BMan that allow low-latency, lock-less
13interaction by software running on processor cores, accelerators and network
14interfaces with the BMan
15
16PROPERTIES
17
18- compatible
19 Usage: Required
20 Value type: <stringlist>
21 Definition: Must include "fsl,bman-portal-<hardware revision>"
22 May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal"
23
24- reg
25 Usage: Required
26 Value type: <prop-encoded-array>
27 Definition: Two regions. The first is the cache-enabled region of
28 the portal. The second is the cache-inhibited region of
29 the portal
30
31- interrupts
32 Usage: Required
33 Value type: <prop-encoded-array>
34 Definition: Standard property
35
36EXAMPLE
37
38The example below shows a (P4080) BMan portals container/bus node with two portals
39
40 bman-portals@ff4000000 {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 compatible = "simple-bus";
44 ranges = <0 0xf 0xf4000000 0x200000>;
45
46 bman-portal@0 {
47 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
48 reg = <0x0 0x4000>, <0x100000 0x1000>;
49 interrupts = <105 2 0 0>;
50 };
51 bman-portal@4000 {
52 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
53 reg = <0x4000 0x4000>, <0x101000 0x1000>;
54 interrupts = <107 2 0 0>;
55 };
56 };
diff --git a/Documentation/devicetree/bindings/soc/fsl/bman.txt b/Documentation/devicetree/bindings/soc/fsl/bman.txt
new file mode 100644
index 000000000000..9f80bf8709ac
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/fsl/bman.txt
@@ -0,0 +1,125 @@
1QorIQ DPAA Buffer Manager Device Tree Bindings
2
3Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
4
5CONTENTS
6
7 - BMan Node
8 - BMan Private Memory Node
9 - Example
10
11BMan Node
12
13The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
14BMan supports hardware allocation and deallocation of buffers belonging to pools
15originally created by software with configurable depletion thresholds. This
16binding covers the CCSR space programming model
17
18PROPERTIES
19
20- compatible
21 Usage: Required
22 Value type: <stringlist>
23 Definition: Must include "fsl,bman"
24 May include "fsl,<SoC>-bman"
25
26- reg
27 Usage: Required
28 Value type: <prop-encoded-array>
29 Definition: Registers region within the CCSR address space
30
31The BMan revision information is located in the BMAN_IP_REV_1/2 registers which
32are located at offsets 0xbf8 and 0xbfc
33
34- interrupts
35 Usage: Required
36 Value type: <prop-encoded-array>
37 Definition: Standard property. The error interrupt
38
39- fsl,liodn
40 Usage: See pamu.txt
41 Value type: <prop-encoded-array>
42 Definition: PAMU property used for static LIODN assignment
43
44- fsl,iommu-parent
45 Usage: See pamu.txt
46 Value type: <phandle>
47 Definition: PAMU property used for dynamic LIODN assignment
48
49 For additional details about the PAMU/LIODN binding(s) see pamu.txt
50
51Devices connected to a BMan instance via Direct Connect Portals (DCP) must link
52to the respective BMan instance
53
54- fsl,bman
55 Usage: Required
56 Value type: <prop-encoded-array>
57 Description: List of phandle and DCP index pairs, to the BMan instance
58 to which this device is connected via the DCP
59
60BMan Private Memory Node
61
62BMan requires a contiguous range of physical memory used for the backing store
63for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as a
64node under the /reserved-memory node
65
66The BMan FBPR memory node must be named "bman-fbpr"
67
68PROPERTIES
69
70- compatible
71 Usage: required
72 Value type: <stringlist>
73 Definition: Must inclide "fsl,bman-fbpr"
74
75The following constraints are relevant to the FBPR private memory:
76 - The size must be 2^(size + 1), with size = 11..33. That is 4 KiB to
77 16 GiB
78 - The alignment must be a muliptle of the memory size
79
80The size of the FBPR must be chosen by observing the hardware features configured
81via the Reset Configuration Word (RCW) and that are relevant to a specific board
82(e.g. number of MAC(s) pinned-out, number of offline/host command FMan ports,
83etc.). The size configured in the DT must reflect the hardware capabilities and
84not the specific needs of an application
85
86For additional details about reserved memory regions see reserved-memory.txt
87
88EXAMPLE
89
90The example below shows a BMan FBPR dynamic allocation memory node
91
92 reserved-memory {
93 #address-cells = <2>;
94 #size-cells = <2>;
95 ranges;
96
97 bman_fbpr: bman-fbpr {
98 compatible = "fsl,bman-fbpr";
99 alloc-ranges = <0 0 0xf 0xffffffff>;
100 size = <0 0x1000000>;
101 alignment = <0 0x1000000>;
102 };
103 };
104
105The example below shows a (P4080) BMan CCSR-space node
106
107 crypto@300000 {
108 ...
109 fsl,bman = <&bman, 2>;
110 ...
111 };
112
113 bman: bman@31a000 {
114 compatible = "fsl,bman";
115 reg = <0x31a000 0x1000>;
116 interrupts = <16 2 1 2>;
117 fsl,liodn = <0x17>;
118 memory-region = <&bman_fbpr>;
119 };
120
121 fman@400000 {
122 ...
123 fsl,bman = <&bman, 0>;
124 ...
125 };
diff --git a/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt b/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt
new file mode 100644
index 000000000000..48c4dae5d6f9
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt
@@ -0,0 +1,154 @@
1QorIQ DPAA Queue Manager Portals Device Tree Binding
2
3Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
4
5CONTENTS
6
7 - QMan Portal
8 - QMan Pool Channel
9 - Example
10
11QMan Portal Node
12
13Portals are memory mapped interfaces to QMan that allow low-latency, lock-less
14interaction by software running on processor cores, accelerators and network
15interfaces with the QMan
16
17PROPERTIES
18
19- compatible
20 Usage: Required
21 Value type: <stringlist>
22 Definition: Must include "fsl,qman-portal-<hardware revision>"
23 May include "fsl,<SoC>-qman-portal" or "fsl,qman-portal"
24
25- reg
26 Usage: Required
27 Value type: <prop-encoded-array>
28 Definition: Two regions. The first is the cache-enabled region of
29 the portal. The second is the cache-inhibited region of
30 the portal
31
32- interrupts
33 Usage: Required
34 Value type: <prop-encoded-array>
35 Definition: Standard property
36
37- fsl,liodn
38 Usage: See pamu.txt
39 Value type: <prop-encoded-array>
40 Definition: Two LIODN(s). DQRR LIODN (DLIODN) and Frame LIODN
41 (FLIODN)
42
43- fsl,iommu-parent
44 Usage: See pamu.txt
45 Value type: <phandle>
46 Definition: PAMU property used for dynamic LIODN assignment
47
48 For additional details about the PAMU/LIODN binding(s) see pamu.txt
49
50- fsl,qman-channel-id
51 Usage: Required
52 Value type: <u32>
53 Definition: The hardware index of the channel. This can also be
54 determined by dividing any of the channel's 8 work queue
55 IDs by 8
56
57In addition to these properties the qman-portals should have sub-nodes to
58represent the HW devices/portals that are connected to the software portal
59described here
60
61The currently supported sub-nodes are:
62 * fman0
63 * fman1
64 * pme
65 * crypto
66
67These subnodes should have the following properties:
68
69- fsl,liodn
70 Usage: See pamu.txt
71 Value type: <prop-encoded-array>
72 Definition: PAMU property used for static LIODN assignment
73
74- fsl,iommu-parent
75 Usage: See pamu.txt
76 Value type: <phandle>
77 Definition: PAMU property used for dynamic LIODN assignment
78
79- dev-handle
80 Usage: Required
81 Value type: <phandle>
82 Definition: The phandle to the particular hardware device that this
83 portal is connected to.
84
85DPAA QMan Pool Channel Nodes
86
87Pool Channels are defined with the following properties.
88
89PROPERTIES
90
91- compatible
92 Usage: Required
93 Value type: <stringlist>
94 Definition: Must include "fsl,qman-pool-channel"
95 May include "fsl,<SoC>-qman-pool-channel"
96
97- fsl,qman-channel-id
98 Usage: Required
99 Value type: <u32>
100 Definition: The hardware index of the channel. This can also be
101 determined by dividing any of the channel's 8 work queue
102 IDs by 8
103
104EXAMPLE
105
106The example below shows a (P4080) QMan portals container/bus node with two portals
107
108 qman-portals@ff4200000 {
109 #address-cells = <1>;
110 #size-cells = <1>;
111 compatible = "simple-bus";
112 ranges = <0 0xf 0xf4200000 0x200000>;
113
114 qman-portal@0 {
115 compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
116 reg = <0 0x4000>, <0x100000 0x1000>;
117 interrupts = <104 2 0 0>;
118 fsl,liodn = <1 2>;
119 fsl,qman-channel-id = <0>;
120
121 fman0 {
122 fsl,liodn = <0x21>;
123 dev-handle = <&fman0>;
124 };
125 fman1 {
126 fsl,liodn = <0xa1>;
127 dev-handle = <&fman1>;
128 };
129 crypto {
130 fsl,liodn = <0x41 0x66>;
131 dev-handle = <&crypto>;
132 };
133 };
134 qman-portal@4000 {
135 compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
136 reg = <0x4000 0x4000>, <0x101000 0x1000>;
137 interrupts = <106 2 0 0>;
138 fsl,liodn = <3 4>;
139 fsl,qman-channel-id = <1>;
140
141 fman0 {
142 fsl,liodn = <0x22>;
143 dev-handle = <&fman0>;
144 };
145 fman1 {
146 fsl,liodn = <0xa2>;
147 dev-handle = <&fman1>;
148 };
149 crypto {
150 fsl,liodn = <0x42 0x67>;
151 dev-handle = <&crypto>;
152 };
153 };
154 };
diff --git a/Documentation/devicetree/bindings/soc/fsl/qman.txt b/Documentation/devicetree/bindings/soc/fsl/qman.txt
new file mode 100644
index 000000000000..063e3a0b9d04
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/fsl/qman.txt
@@ -0,0 +1,165 @@
1QorIQ DPAA Queue Manager Device Tree Binding
2
3Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
4
5CONTENTS
6
7 - QMan Node
8 - QMan Private Memory Nodes
9 - Example
10
11QMan Node
12
13The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
14supports queuing and QoS scheduling of frames to CPUs, network interfaces and
15DPAA logic modules, maintains packet ordering within flows. Besides providing
16flow-level queuing, is also responsible for congestion management functions such
17as RED/WRED, congestion notifications and tail discards. This binding covers the
18CCSR space programming model
19
20PROPERTIES
21
22- compatible
23 Usage: Required
24 Value type: <stringlist>
25 Definition: Must include "fsl,qman"
26 May include "fsl,<SoC>-qman"
27
28- reg
29 Usage: Required
30 Value type: <prop-encoded-array>
31 Definition: Registers region within the CCSR address space
32
33The QMan revision information is located in the QMAN_IP_REV_1/2 registers which
34are located at offsets 0xbf8 and 0xbfc
35
36- interrupts
37 Usage: Required
38 Value type: <prop-encoded-array>
39 Definition: Standard property. The error interrupt
40
41- fsl,liodn
42 Usage: See pamu.txt
43 Value type: <prop-encoded-array>
44 Definition: PAMU property used for static LIODN assignment
45
46- fsl,iommu-parent
47 Usage: See pamu.txt
48 Value type: <phandle>
49 Definition: PAMU property used for dynamic LIODN assignment
50
51 For additional details about the PAMU/LIODN binding(s) see pamu.txt
52
53- clocks
54 Usage: See clock-bindings.txt and qoriq-clock.txt
55 Value type: <prop-encoded-array>
56 Definition: Reference input clock. Its frequency is half of the
57 platform clock
58
59Devices connected to a QMan instance via Direct Connect Portals (DCP) must link
60to the respective QMan instance
61
62- fsl,qman
63 Usage: Required
64 Value type: <prop-encoded-array>
65 Description: List of phandle and DCP index pairs, to the QMan instance
66 to which this device is connected via the DCP
67
68QMan Private Memory Nodes
69
70QMan requires two contiguous range of physical memory used for the backing store
71for QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).
72This memory is reserved/allocated as a nodes under the /reserved-memory node
73
74The QMan FQD memory node must be named "qman-fqd"
75
76PROPERTIES
77
78- compatible
79 Usage: required
80 Value type: <stringlist>
81 Definition: Must inclide "fsl,qman-fqd"
82
83The QMan PFDR memory node must be named "qman-pfdr"
84
85PROPERTIES
86
87- compatible
88 Usage: required
89 Value type: <stringlist>
90 Definition: Must inclide "fsl,qman-pfdr"
91
92The following constraints are relevant to the FQD and PFDR private memory:
93 - The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
94 1 GiB
95 - The alignment must be a muliptle of the memory size
96
97The size of the FQD and PFDP must be chosen by observing the hardware features
98configured via the Reset Configuration Word (RCW) and that are relevant to a
99specific board (e.g. number of MAC(s) pinned-out, number of offline/host command
100FMan ports, etc.). The size configured in the DT must reflect the hardware
101capabilities and not the specific needs of an application
102
103For additional details about reserved memory regions see reserved-memory.txt
104
105EXAMPLE
106
107The example below shows a QMan FQD and a PFDR dynamic allocation memory nodes
108
109 reserved-memory {
110 #address-cells = <2>;
111 #size-cells = <2>;
112 ranges;
113
114 qman_fqd: qman-fqd {
115 compatible = "fsl,qman-fqd";
116 alloc-ranges = <0 0 0xf 0xffffffff>;
117 size = <0 0x400000>;
118 alignment = <0 0x400000>;
119 };
120 qman_pfdr: qman-pfdr {
121 compatible = "fsl,qman-pfdr";
122 alloc-ranges = <0 0 0xf 0xffffffff>;
123 size = <0 0x2000000>;
124 alignment = <0 0x2000000>;
125 };
126 };
127
128The example below shows a (P4080) QMan CCSR-space node
129
130 clockgen: global-utilities@e1000 {
131 ...
132 sysclk: sysclk {
133 ...
134 };
135 ...
136 platform_pll: platform-pll@c00 {
137 #clock-cells = <1>;
138 reg = <0xc00 0x4>;
139 compatible = "fsl,qoriq-platform-pll-1.0";
140 clocks = <&sysclk>;
141 clock-output-names = "platform-pll", "platform-pll-div2";
142 };
143 ...
144 };
145
146 crypto@300000 {
147 ...
148 fsl,qman = <&qman, 2>;
149 ...
150 };
151
152 qman: qman@318000 {
153 compatible = "fsl,qman";
154 reg = <0x318000 0x1000>;
155 interrupts = <16 2 1 3>
156 fsl,liodn = <0x16>;
157 memory-region = <&qman_fqd &qman_pfdr>;
158 clocks = <&platform_pll 1>;
159 };
160
161 fman@400000 {
162 ...
163 fsl,qman = <&qman, 0>;
164 ...
165 };
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 88eace4e28c3..af696874248b 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -88,6 +88,7 @@ config PPC
88 select ARCH_MIGHT_HAVE_PC_PARPORT 88 select ARCH_MIGHT_HAVE_PC_PARPORT
89 select ARCH_MIGHT_HAVE_PC_SERIO 89 select ARCH_MIGHT_HAVE_PC_SERIO
90 select BINFMT_ELF 90 select BINFMT_ELF
91 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
91 select OF 92 select OF
92 select OF_EARLY_FLATTREE 93 select OF_EARLY_FLATTREE
93 select OF_RESERVED_MEM 94 select OF_RESERVED_MEM
@@ -148,6 +149,8 @@ config PPC
148 select HAVE_ARCH_AUDITSYSCALL 149 select HAVE_ARCH_AUDITSYSCALL
149 select ARCH_SUPPORTS_ATOMIC_RMW 150 select ARCH_SUPPORTS_ATOMIC_RMW
150 select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN 151 select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN
152 select NO_BOOTMEM
153 select HAVE_GENERIC_RCU_GUP
151 154
152config GENERIC_CSUM 155config GENERIC_CSUM
153 def_bool CPU_LITTLE_ENDIAN 156 def_bool CPU_LITTLE_ENDIAN
@@ -549,7 +552,7 @@ config PPC_4K_PAGES
549 bool "4k page size" 552 bool "4k page size"
550 553
551config PPC_16K_PAGES 554config PPC_16K_PAGES
552 bool "16k page size" if 44x 555 bool "16k page size" if 44x || PPC_8xx
553 556
554config PPC_64K_PAGES 557config PPC_64K_PAGES
555 bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64 558 bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64
diff --git a/arch/powerpc/boot/dts/b4860emu.dts b/arch/powerpc/boot/dts/b4860emu.dts
index 85646b4f96e1..2aa5cd318ce8 100644
--- a/arch/powerpc/boot/dts/b4860emu.dts
+++ b/arch/powerpc/boot/dts/b4860emu.dts
@@ -193,9 +193,9 @@
193 fsl,liodn-bits = <12>; 193 fsl,liodn-bits = <12>;
194 }; 194 };
195 195
196 clockgen: global-utilities@e1000 { 196/include/ "fsl/qoriq-clockgen2.dtsi"
197 global-utilities@e1000 {
197 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0"; 198 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
198 reg = <0xe1000 0x1000>;
199 }; 199 };
200 200
201/include/ "fsl/qoriq-dma-0.dtsi" 201/include/ "fsl/qoriq-dma-0.dtsi"
diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi
index 8b47edcfabf0..e5bde0b85135 100644
--- a/arch/powerpc/boot/dts/b4qds.dtsi
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
@@ -152,6 +152,29 @@
152 reg = <0x68>; 152 reg = <0x68>;
153 }; 153 };
154 }; 154 };
155
156 i2c@2 {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 reg = <0x2>;
160
161 ina220@40 {
162 compatible = "ti,ina220";
163 reg = <0x40>;
164 shunt-resistor = <1000>;
165 };
166 };
167
168 i2c@3 {
169 #address-cells = <1>;
170 #size-cells = <0>;
171 reg = <0x3>;
172
173 adt7461@4c {
174 compatible = "adi,adt7461";
175 reg = <0x4c>;
176 };
177 };
155 }; 178 };
156 }; 179 };
157 180
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
index 9e6c01339ccc..45efcbadb23c 100644
--- a/arch/powerpc/boot/dts/bsc9131rdb.dtsi
+++ b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
@@ -40,31 +40,6 @@
40 compatible = "fsl,ifc-nand"; 40 compatible = "fsl,ifc-nand";
41 reg = <0x0 0x0 0x4000>; 41 reg = <0x0 0x0 0x4000>;
42 42
43 partition@0 {
44 /* This location must not be altered */
45 /* 3MB for u-boot Bootloader Image */
46 reg = <0x0 0x00300000>;
47 label = "NAND U-Boot Image";
48 read-only;
49 };
50
51 partition@300000 {
52 /* 1MB for DTB Image */
53 reg = <0x00300000 0x00100000>;
54 label = "NAND DTB Image";
55 };
56
57 partition@400000 {
58 /* 8MB for Linux Kernel Image */
59 reg = <0x00400000 0x00800000>;
60 label = "NAND Linux Kernel Image";
61 };
62
63 partition@c00000 {
64 /* Rest space for Root file System Image */
65 reg = <0x00c00000 0x07400000>;
66 label = "NAND RFS Image";
67 };
68 }; 43 };
69}; 44};
70 45
@@ -82,31 +57,6 @@
82 reg = <0>; 57 reg = <0>;
83 spi-max-frequency = <50000000>; 58 spi-max-frequency = <50000000>;
84 59
85 /* 512KB for u-boot Bootloader Image */
86 partition@0 {
87 reg = <0x0 0x00080000>;
88 label = "SPI Flash U-Boot Image";
89 read-only;
90 };
91
92 /* 512KB for DTB Image */
93 partition@80000 {
94 reg = <0x00080000 0x00080000>;
95 label = "SPI Flash DTB Image";
96 };
97
98 /* 4MB for Linux Kernel Image */
99 partition@100000 {
100 reg = <0x00100000 0x00400000>;
101 label = "SPI Flash Kernel Image";
102 };
103
104 /*11MB for RFS Image */
105 partition@500000 {
106 reg = <0x00500000 0x00B00000>;
107 label = "SPI Flash RFS Image";
108 };
109
110 }; 60 };
111 }; 61 };
112 62
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
index d67894459ac8..86161ae6c966 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -80,33 +80,9 @@
80 compatible = "fsl,b4420-device-config", "fsl,qoriq-device-config-2.0"; 80 compatible = "fsl,b4420-device-config", "fsl,qoriq-device-config-2.0";
81 }; 81 };
82 82
83 clockgen: global-utilities@e1000 { 83/include/ "qoriq-clockgen2.dtsi"
84 global-utilities@e1000 {
84 compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0"; 85 compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
85 ranges = <0x0 0xe1000 0x1000>;
86 #address-cells = <1>;
87 #size-cells = <1>;
88
89 sysclk: sysclk {
90 #clock-cells = <0>;
91 compatible = "fsl,qoriq-sysclk-2.0";
92 clock-output-names = "sysclk";
93 };
94
95 pll0: pll0@800 {
96 #clock-cells = <1>;
97 reg = <0x800 0x4>;
98 compatible = "fsl,qoriq-core-pll-2.0";
99 clocks = <&sysclk>;
100 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
101 };
102
103 pll1: pll1@820 {
104 #clock-cells = <1>;
105 reg = <0x820 0x4>;
106 compatible = "fsl,qoriq-core-pll-2.0";
107 clocks = <&sysclk>;
108 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
109 };
110 86
111 mux0: mux0@0 { 87 mux0: mux0@0 {
112 #clock-cells = <0>; 88 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index 582381dba1d7..65100b9636b7 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -124,33 +124,9 @@
124 compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0"; 124 compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
125 }; 125 };
126 126
127 clockgen: global-utilities@e1000 { 127/include/ "qoriq-clockgen2.dtsi"
128 global-utilities@e1000 {
128 compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0"; 129 compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
129 ranges = <0x0 0xe1000 0x1000>;
130 #address-cells = <1>;
131 #size-cells = <1>;
132
133 sysclk: sysclk {
134 #clock-cells = <0>;
135 compatible = "fsl,qoriq-sysclk-2.0";
136 clock-output-names = "sysclk";
137 };
138
139 pll0: pll0@800 {
140 #clock-cells = <1>;
141 reg = <0x800 0x4>;
142 compatible = "fsl,qoriq-core-pll-2.0";
143 clocks = <&sysclk>;
144 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
145 };
146
147 pll1: pll1@820 {
148 #clock-cells = <1>;
149 reg = <0x820 0x4>;
150 compatible = "fsl,qoriq-core-pll-2.0";
151 clocks = <&sysclk>;
152 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
153 };
154 130
155 mux0: mux0@0 { 131 mux0: mux0@0 {
156 #clock-cells = <0>; 132 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 69ce1026c948..efd74db4f9b0 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -305,53 +305,9 @@
305 #sleep-cells = <2>; 305 #sleep-cells = <2>;
306 }; 306 };
307 307
308 clockgen: global-utilities@e1000 { 308/include/ "qoriq-clockgen1.dtsi"
309 global-utilities@e1000 {
309 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; 310 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
310 ranges = <0x0 0xe1000 0x1000>;
311 reg = <0xe1000 0x1000>;
312 clock-frequency = <0>;
313 #address-cells = <1>;
314 #size-cells = <1>;
315
316 sysclk: sysclk {
317 #clock-cells = <0>;
318 compatible = "fsl,qoriq-sysclk-1.0";
319 clock-output-names = "sysclk";
320 };
321
322 pll0: pll0@800 {
323 #clock-cells = <1>;
324 reg = <0x800 0x4>;
325 compatible = "fsl,qoriq-core-pll-1.0";
326 clocks = <&sysclk>;
327 clock-output-names = "pll0", "pll0-div2";
328 };
329
330 pll1: pll1@820 {
331 #clock-cells = <1>;
332 reg = <0x820 0x4>;
333 compatible = "fsl,qoriq-core-pll-1.0";
334 clocks = <&sysclk>;
335 clock-output-names = "pll1", "pll1-div2";
336 };
337
338 mux0: mux0@0 {
339 #clock-cells = <0>;
340 reg = <0x0 0x4>;
341 compatible = "fsl,qoriq-core-mux-1.0";
342 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
343 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
344 clock-output-names = "cmux0";
345 };
346
347 mux1: mux1@20 {
348 #clock-cells = <0>;
349 reg = <0x20 0x4>;
350 compatible = "fsl,qoriq-core-mux-1.0";
351 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
352 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
353 clock-output-names = "cmux1";
354 };
355 311
356 mux2: mux2@40 { 312 mux2: mux2@40 {
357 #clock-cells = <0>; 313 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index cd63cb1b1042..d7425ef1ae41 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -332,53 +332,9 @@
332 #sleep-cells = <2>; 332 #sleep-cells = <2>;
333 }; 333 };
334 334
335 clockgen: global-utilities@e1000 { 335/include/ "qoriq-clockgen1.dtsi"
336 global-utilities@e1000 {
336 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; 337 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
337 ranges = <0x0 0xe1000 0x1000>;
338 reg = <0xe1000 0x1000>;
339 clock-frequency = <0>;
340 #address-cells = <1>;
341 #size-cells = <1>;
342
343 sysclk: sysclk {
344 #clock-cells = <0>;
345 compatible = "fsl,qoriq-sysclk-1.0";
346 clock-output-names = "sysclk";
347 };
348
349 pll0: pll0@800 {
350 #clock-cells = <1>;
351 reg = <0x800 0x4>;
352 compatible = "fsl,qoriq-core-pll-1.0";
353 clocks = <&sysclk>;
354 clock-output-names = "pll0", "pll0-div2";
355 };
356
357 pll1: pll1@820 {
358 #clock-cells = <1>;
359 reg = <0x820 0x4>;
360 compatible = "fsl,qoriq-core-pll-1.0";
361 clocks = <&sysclk>;
362 clock-output-names = "pll1", "pll1-div2";
363 };
364
365 mux0: mux0@0 {
366 #clock-cells = <0>;
367 reg = <0x0 0x4>;
368 compatible = "fsl,qoriq-core-mux-1.0";
369 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
370 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
371 clock-output-names = "cmux0";
372 };
373
374 mux1: mux1@20 {
375 #clock-cells = <0>;
376 reg = <0x20 0x4>;
377 compatible = "fsl,qoriq-core-mux-1.0";
378 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
379 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
380 clock-output-names = "cmux1";
381 };
382 338
383 mux2: mux2@40 { 339 mux2: mux2@40 {
384 #clock-cells = <0>; 340 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 12947ccddf25..7005a4a4cef0 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -352,35 +352,9 @@
352 #sleep-cells = <2>; 352 #sleep-cells = <2>;
353 }; 353 };
354 354
355 clockgen: global-utilities@e1000 { 355/include/ "qoriq-clockgen1.dtsi"
356 global-utilities@e1000 {
356 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0"; 357 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
357 ranges = <0x0 0xe1000 0x1000>;
358 reg = <0xe1000 0x1000>;
359 clock-frequency = <0>;
360 #address-cells = <1>;
361 #size-cells = <1>;
362
363 sysclk: sysclk {
364 #clock-cells = <0>;
365 compatible = "fsl,qoriq-sysclk-1.0";
366 clock-output-names = "sysclk";
367 };
368
369 pll0: pll0@800 {
370 #clock-cells = <1>;
371 reg = <0x800 0x4>;
372 compatible = "fsl,qoriq-core-pll-1.0";
373 clocks = <&sysclk>;
374 clock-output-names = "pll0", "pll0-div2";
375 };
376
377 pll1: pll1@820 {
378 #clock-cells = <1>;
379 reg = <0x820 0x4>;
380 compatible = "fsl,qoriq-core-pll-1.0";
381 clocks = <&sysclk>;
382 clock-output-names = "pll1", "pll1-div2";
383 };
384 358
385 pll2: pll2@840 { 359 pll2: pll2@840 {
386 #clock-cells = <1>; 360 #clock-cells = <1>;
@@ -398,24 +372,6 @@
398 clock-output-names = "pll3", "pll3-div2"; 372 clock-output-names = "pll3", "pll3-div2";
399 }; 373 };
400 374
401 mux0: mux0@0 {
402 #clock-cells = <0>;
403 reg = <0x0 0x4>;
404 compatible = "fsl,qoriq-core-mux-1.0";
405 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
406 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
407 clock-output-names = "cmux0";
408 };
409
410 mux1: mux1@20 {
411 #clock-cells = <0>;
412 reg = <0x20 0x4>;
413 compatible = "fsl,qoriq-core-mux-1.0";
414 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
415 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
416 clock-output-names = "cmux1";
417 };
418
419 mux2: mux2@40 { 375 mux2: mux2@40 {
420 #clock-cells = <0>; 376 #clock-cells = <0>;
421 reg = <0x40 0x4>; 377 reg = <0x40 0x4>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 4c4a2b0436b2..55834211bd28 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -337,53 +337,9 @@
337 #sleep-cells = <2>; 337 #sleep-cells = <2>;
338 }; 338 };
339 339
340 clockgen: global-utilities@e1000 { 340/include/ "qoriq-clockgen1.dtsi"
341 global-utilities@e1000 {
341 compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; 342 compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
342 ranges = <0x0 0xe1000 0x1000>;
343 reg = <0xe1000 0x1000>;
344 clock-frequency = <0>;
345 #address-cells = <1>;
346 #size-cells = <1>;
347
348 sysclk: sysclk {
349 #clock-cells = <0>;
350 compatible = "fsl,qoriq-sysclk-1.0";
351 clock-output-names = "sysclk";
352 };
353
354 pll0: pll0@800 {
355 #clock-cells = <1>;
356 reg = <0x800 0x4>;
357 compatible = "fsl,qoriq-core-pll-1.0";
358 clocks = <&sysclk>;
359 clock-output-names = "pll0", "pll0-div2";
360 };
361
362 pll1: pll1@820 {
363 #clock-cells = <1>;
364 reg = <0x820 0x4>;
365 compatible = "fsl,qoriq-core-pll-1.0";
366 clocks = <&sysclk>;
367 clock-output-names = "pll1", "pll1-div2";
368 };
369
370 mux0: mux0@0 {
371 #clock-cells = <0>;
372 reg = <0x0 0x4>;
373 compatible = "fsl,qoriq-core-mux-1.0";
374 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
375 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
376 clock-output-names = "cmux0";
377 };
378
379 mux1: mux1@20 {
380 #clock-cells = <0>;
381 reg = <0x20 0x4>;
382 compatible = "fsl,qoriq-core-mux-1.0";
383 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
384 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
385 clock-output-names = "cmux1";
386 };
387 }; 343 };
388 344
389 rcpm: global-utilities@e2000 { 345 rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 67296fdd9698..6e4cd6ce363c 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -297,53 +297,9 @@
297 #sleep-cells = <2>; 297 #sleep-cells = <2>;
298 }; 298 };
299 299
300 clockgen: global-utilities@e1000 { 300/include/ "qoriq-clockgen1.dtsi"
301 global-utilities@e1000 {
301 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0"; 302 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
302 ranges = <0x0 0xe1000 0x1000>;
303 reg = <0xe1000 0x1000>;
304 clock-frequency = <0>;
305 #address-cells = <1>;
306 #size-cells = <1>;
307
308 sysclk: sysclk {
309 #clock-cells = <0>;
310 compatible = "fsl,qoriq-sysclk-1.0";
311 clock-output-names = "sysclk";
312 };
313
314 pll0: pll0@800 {
315 #clock-cells = <1>;
316 reg = <0x800 0x4>;
317 compatible = "fsl,qoriq-core-pll-1.0";
318 clocks = <&sysclk>;
319 clock-output-names = "pll0", "pll0-div2";
320 };
321
322 pll1: pll1@820 {
323 #clock-cells = <1>;
324 reg = <0x820 0x4>;
325 compatible = "fsl,qoriq-core-pll-1.0";
326 clocks = <&sysclk>;
327 clock-output-names = "pll1", "pll1-div2";
328 };
329
330 mux0: mux0@0 {
331 #clock-cells = <0>;
332 reg = <0x0 0x4>;
333 compatible = "fsl,qoriq-core-mux-1.0";
334 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
335 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
336 clock-output-names = "cmux0";
337 };
338
339 mux1: mux1@20 {
340 #clock-cells = <0>;
341 reg = <0x20 0x4>;
342 compatible = "fsl,qoriq-core-mux-1.0";
343 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
344 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
345 clock-output-names = "cmux1";
346 };
347 303
348 mux2: mux2@40 { 304 mux2: mux2@40 {
349 #clock-cells = <0>; 305 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
new file mode 100644
index 000000000000..4ece1edbff63
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
@@ -0,0 +1,85 @@
1/*
2 * QorIQ clock control device tree stub [ controller @ offset 0xe1000 ]
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35global-utilities@e1000 {
36 compatible = "fsl,qoriq-clockgen-1.0";
37 ranges = <0x0 0xe1000 0x1000>;
38 reg = <0xe1000 0x1000>;
39 clock-frequency = <0>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 sysclk: sysclk {
44 #clock-cells = <0>;
45 compatible = "fsl,qoriq-sysclk-1.0", "fixed-clock";
46 clock-output-names = "sysclk";
47 };
48 pll0: pll0@800 {
49 #clock-cells = <1>;
50 reg = <0x800 0x4>;
51 compatible = "fsl,qoriq-core-pll-1.0";
52 clocks = <&sysclk>;
53 clock-output-names = "pll0", "pll0-div2";
54 };
55 pll1: pll1@820 {
56 #clock-cells = <1>;
57 reg = <0x820 0x4>;
58 compatible = "fsl,qoriq-core-pll-1.0";
59 clocks = <&sysclk>;
60 clock-output-names = "pll1", "pll1-div2";
61 };
62 mux0: mux0@0 {
63 #clock-cells = <0>;
64 reg = <0x0 0x4>;
65 compatible = "fsl,qoriq-core-mux-1.0";
66 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
67 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
68 clock-output-names = "cmux0";
69 };
70 mux1: mux1@20 {
71 #clock-cells = <0>;
72 reg = <0x20 0x4>;
73 compatible = "fsl,qoriq-core-mux-1.0";
74 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
75 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
76 clock-output-names = "cmux1";
77 };
78 platform_pll: platform-pll@c00 {
79 #clock-cells = <1>;
80 reg = <0xc00 0x4>;
81 compatible = "fsl,qoriq-platform-pll-1.0";
82 clocks = <&sysclk>;
83 clock-output-names = "platform-pll", "platform-pll-div2";
84 };
85};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
new file mode 100644
index 000000000000..48e0b6e4ce33
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
@@ -0,0 +1,68 @@
1/*
2 * QorIQ clock control device tree stub [ controller @ offset 0xe1000 ]
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35global-utilities@e1000 {
36 compatible = "fsl,qoriq-clockgen-2.0";
37 ranges = <0x0 0xe1000 0x1000>;
38 reg = <0xe1000 0x1000>;
39 #address-cells = <1>;
40 #size-cells = <1>;
41
42 sysclk: sysclk {
43 #clock-cells = <0>;
44 compatible = "fsl,qoriq-sysclk-2.0", "fixed-clock";
45 clock-output-names = "sysclk";
46 };
47 pll0: pll0@800 {
48 #clock-cells = <1>;
49 reg = <0x800 0x4>;
50 compatible = "fsl,qoriq-core-pll-2.0";
51 clocks = <&sysclk>;
52 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
53 };
54 pll1: pll1@820 {
55 #clock-cells = <1>;
56 reg = <0x820 0x4>;
57 compatible = "fsl,qoriq-core-pll-2.0";
58 clocks = <&sysclk>;
59 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
60 };
61 platform_pll: platform-pll@c00 {
62 #clock-cells = <1>;
63 reg = <0xc00 0x4>;
64 compatible = "fsl,qoriq-platform-pll-2.0";
65 clocks = <&sysclk>;
66 clock-output-names = "platform-pll", "platform-pll-div2";
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 12e597eea3c8..15ae462e758f 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -281,35 +281,9 @@
281 fsl,liodn-bits = <12>; 281 fsl,liodn-bits = <12>;
282 }; 282 };
283 283
284 clockgen: global-utilities@e1000 { 284/include/ "qoriq-clockgen2.dtsi"
285 global-utilities@e1000 {
285 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0"; 286 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
286 ranges = <0x0 0xe1000 0x1000>;
287 reg = <0xe1000 0x1000>;
288 #address-cells = <1>;
289 #size-cells = <1>;
290
291 sysclk: sysclk {
292 #clock-cells = <0>;
293 compatible = "fsl,qoriq-sysclk-2.0";
294 clock-output-names = "sysclk", "fixed-clock";
295 };
296
297
298 pll0: pll0@800 {
299 #clock-cells = <1>;
300 reg = <0x800 4>;
301 compatible = "fsl,qoriq-core-pll-2.0";
302 clocks = <&sysclk>;
303 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
304 };
305
306 pll1: pll1@820 {
307 #clock-cells = <1>;
308 reg = <0x820 4>;
309 compatible = "fsl,qoriq-core-pll-2.0";
310 clocks = <&sysclk>;
311 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
312 };
313 287
314 mux0: mux0@0 { 288 mux0: mux0@0 {
315 #clock-cells = <0>; 289 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
index aecee9690a88..1ce91e3485a9 100644
--- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
@@ -305,34 +305,9 @@
305 fsl,liodn-bits = <12>; 305 fsl,liodn-bits = <12>;
306 }; 306 };
307 307
308 clockgen: global-utilities@e1000 { 308/include/ "qoriq-clockgen2.dtsi"
309 global-utilities@e1000 {
309 compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0"; 310 compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0";
310 ranges = <0x0 0xe1000 0x1000>;
311 reg = <0xe1000 0x1000>;
312 #address-cells = <1>;
313 #size-cells = <1>;
314
315 sysclk: sysclk {
316 #clock-cells = <0>;
317 compatible = "fsl,qoriq-sysclk-2.0";
318 clock-output-names = "sysclk", "fixed-clock";
319 };
320
321 pll0: pll0@800 {
322 #clock-cells = <1>;
323 reg = <0x800 4>;
324 compatible = "fsl,qoriq-core-pll-2.0";
325 clocks = <&sysclk>;
326 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
327 };
328
329 pll1: pll1@820 {
330 #clock-cells = <1>;
331 reg = <0x820 4>;
332 compatible = "fsl,qoriq-core-pll-2.0";
333 clocks = <&sysclk>;
334 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
335 };
336 311
337 mux0: mux0@0 { 312 mux0: mux0@0 {
338 #clock-cells = <0>; 313 #clock-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 7e2fc7cdce48..0e96fcabe812 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -368,34 +368,9 @@
368 fsl,liodn-bits = <12>; 368 fsl,liodn-bits = <12>;
369 }; 369 };
370 370
371 clockgen: global-utilities@e1000 { 371/include/ "qoriq-clockgen2.dtsi"
372 global-utilities@e1000 {
372 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0"; 373 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
373 ranges = <0x0 0xe1000 0x1000>;
374 reg = <0xe1000 0x1000>;
375 #address-cells = <1>;
376 #size-cells = <1>;
377
378 sysclk: sysclk {
379 #clock-cells = <0>;
380 compatible = "fsl,qoriq-sysclk-2.0";
381 clock-output-names = "sysclk";
382 };
383
384 pll0: pll0@800 {
385 #clock-cells = <1>;
386 reg = <0x800 0x4>;
387 compatible = "fsl,qoriq-core-pll-2.0";
388 clocks = <&sysclk>;
389 clock-output-names = "pll0", "pll0-div2", "pll0-div4";
390 };
391
392 pll1: pll1@820 {
393 #clock-cells = <1>;
394 reg = <0x820 0x4>;
395 compatible = "fsl,qoriq-core-pll-2.0";
396 clocks = <&sysclk>;
397 clock-output-names = "pll1", "pll1-div2", "pll1-div4";
398 };
399 374
400 pll2: pll2@840 { 375 pll2: pll2@840 {
401 #clock-cells = <1>; 376 #clock-cells = <1>;
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 2fed3bc0b990..394ea9c943c9 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -98,6 +98,26 @@
98 reg = <0x68>; 98 reg = <0x68>;
99 interrupts = <0x1 0x1 0 0>; 99 interrupts = <0x1 0x1 0 0>;
100 }; 100 };
101 ina220@40 {
102 compatible = "ti,ina220";
103 reg = <0x40>;
104 shunt-resistor = <1000>;
105 };
106 ina220@41 {
107 compatible = "ti,ina220";
108 reg = <0x41>;
109 shunt-resistor = <1000>;
110 };
111 ina220@44 {
112 compatible = "ti,ina220";
113 reg = <0x44>;
114 shunt-resistor = <1000>;
115 };
116 ina220@45 {
117 compatible = "ti,ina220";
118 reg = <0x45>;
119 shunt-resistor = <1000>;
120 };
101 adt7461@4c { 121 adt7461@4c {
102 compatible = "adi,adt7461"; 122 compatible = "adi,adt7461";
103 reg = <0x4c>; 123 reg = <0x4c>;
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index 2869fea717dd..b7f3057cd894 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -98,6 +98,26 @@
98 reg = <0x68>; 98 reg = <0x68>;
99 interrupts = <0x1 0x1 0 0>; 99 interrupts = <0x1 0x1 0 0>;
100 }; 100 };
101 ina220@40 {
102 compatible = "ti,ina220";
103 reg = <0x40>;
104 shunt-resistor = <1000>;
105 };
106 ina220@41 {
107 compatible = "ti,ina220";
108 reg = <0x41>;
109 shunt-resistor = <1000>;
110 };
111 ina220@44 {
112 compatible = "ti,ina220";
113 reg = <0x44>;
114 shunt-resistor = <1000>;
115 };
116 ina220@45 {
117 compatible = "ti,ina220";
118 reg = <0x45>;
119 shunt-resistor = <1000>;
120 };
101 adt7461@4c { 121 adt7461@4c {
102 compatible = "adi,adt7461"; 122 compatible = "adi,adt7461";
103 reg = <0x4c>; 123 reg = <0x4c>;
diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/p5040ds.dts
index 860b5ccf76c0..7e04bf487c04 100644
--- a/arch/powerpc/boot/dts/p5040ds.dts
+++ b/arch/powerpc/boot/dts/p5040ds.dts
@@ -95,6 +95,26 @@
95 reg = <0x68>; 95 reg = <0x68>;
96 interrupts = <0x1 0x1 0 0>; 96 interrupts = <0x1 0x1 0 0>;
97 }; 97 };
98 ina220@40 {
99 compatible = "ti,ina220";
100 reg = <0x40>;
101 shunt-resistor = <1000>;
102 };
103 ina220@41 {
104 compatible = "ti,ina220";
105 reg = <0x41>;
106 shunt-resistor = <1000>;
107 };
108 ina220@44 {
109 compatible = "ti,ina220";
110 reg = <0x44>;
111 shunt-resistor = <1000>;
112 };
113 ina220@45 {
114 compatible = "ti,ina220";
115 reg = <0x45>;
116 shunt-resistor = <1000>;
117 };
98 adt7461@4c { 118 adt7461@4c {
99 compatible = "adi,adt7461"; 119 compatible = "adi,adt7461";
100 reg = <0x4c>; 120 reg = <0x4c>;
diff --git a/arch/powerpc/boot/dts/t104xrdb.dtsi b/arch/powerpc/boot/dts/t104xrdb.dtsi
index 1cf0f3c5f7e5..187add885cae 100644
--- a/arch/powerpc/boot/dts/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/t104xrdb.dtsi
@@ -83,6 +83,13 @@
83 }; 83 };
84 }; 84 };
85 85
86 i2c@118000 {
87 adt7461@4c {
88 compatible = "adi,adt7461";
89 reg = <0x4c>;
90 };
91 };
92
86 i2c@118100 { 93 i2c@118100 {
87 pca9546@77 { 94 pca9546@77 {
88 compatible = "nxp,pca9546"; 95 compatible = "nxp,pca9546";
diff --git a/arch/powerpc/boot/dts/t208xqds.dtsi b/arch/powerpc/boot/dts/t208xqds.dtsi
index 555dc6e03d89..59061834d54e 100644
--- a/arch/powerpc/boot/dts/t208xqds.dtsi
+++ b/arch/powerpc/boot/dts/t208xqds.dtsi
@@ -169,6 +169,17 @@
169 shunt-resistor = <1000>; 169 shunt-resistor = <1000>;
170 }; 170 };
171 }; 171 };
172
173 i2c@3 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 reg = <0x3>;
177
178 adt7461@4c {
179 compatible = "adi,adt7461";
180 reg = <0x4c>;
181 };
182 };
172 }; 183 };
173 }; 184 };
174 185
diff --git a/arch/powerpc/boot/dts/t4240emu.dts b/arch/powerpc/boot/dts/t4240emu.dts
index bc12127a03fb..decaf357db9c 100644
--- a/arch/powerpc/boot/dts/t4240emu.dts
+++ b/arch/powerpc/boot/dts/t4240emu.dts
@@ -250,9 +250,9 @@
250 fsl,liodn-bits = <12>; 250 fsl,liodn-bits = <12>;
251 }; 251 };
252 252
253 clockgen: global-utilities@e1000 { 253/include/ "fsl/qoriq-clockgen2.dtsi"
254 global-utilities@e1000 {
254 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0"; 255 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
255 reg = <0xe1000 0x1000>;
256 }; 256 };
257 257
258/include/ "fsl/qoriq-dma-0.dtsi" 258/include/ "fsl/qoriq-dma-0.dtsi"
diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c
index d367a0aece2a..d80161b633f4 100644
--- a/arch/powerpc/boot/main.c
+++ b/arch/powerpc/boot/main.c
@@ -144,13 +144,24 @@ static char cmdline[BOOT_COMMAND_LINE_SIZE]
144 144
145static void prep_cmdline(void *chosen) 145static void prep_cmdline(void *chosen)
146{ 146{
147 unsigned int getline_timeout = 5000;
148 int v;
149 int n;
150
151 /* Wait-for-input time */
152 n = getprop(chosen, "linux,cmdline-timeout", &v, sizeof(v));
153 if (n == sizeof(v))
154 getline_timeout = v;
155
147 if (cmdline[0] == '\0') 156 if (cmdline[0] == '\0')
148 getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1); 157 getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1);
149 158
150 printf("\n\rLinux/PowerPC load: %s", cmdline); 159 printf("\n\rLinux/PowerPC load: %s", cmdline);
160
151 /* If possible, edit the command line */ 161 /* If possible, edit the command line */
152 if (console_ops.edit_cmdline) 162 if (console_ops.edit_cmdline && getline_timeout)
153 console_ops.edit_cmdline(cmdline, BOOT_COMMAND_LINE_SIZE); 163 console_ops.edit_cmdline(cmdline, BOOT_COMMAND_LINE_SIZE, getline_timeout);
164
154 printf("\n\r"); 165 printf("\n\r");
155 166
156 /* Put the command line back into the devtree for the kernel */ 167 /* Put the command line back into the devtree for the kernel */
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index 8aad3c55aeda..5e75e1c5518e 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -58,7 +58,7 @@ extern struct dt_ops dt_ops;
58struct console_ops { 58struct console_ops {
59 int (*open)(void); 59 int (*open)(void);
60 void (*write)(const char *buf, int len); 60 void (*write)(const char *buf, int len);
61 void (*edit_cmdline)(char *buf, int len); 61 void (*edit_cmdline)(char *buf, int len, unsigned int getline_timeout);
62 void (*close)(void); 62 void (*close)(void);
63 void *data; 63 void *data;
64}; 64};
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index f2156f07571f..167ee9433de6 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -33,7 +33,7 @@ static void serial_write(const char *buf, int len)
33 scdp->putc(*buf++); 33 scdp->putc(*buf++);
34} 34}
35 35
36static void serial_edit_cmdline(char *buf, int len) 36static void serial_edit_cmdline(char *buf, int len, unsigned int timeout)
37{ 37{
38 int timer = 0, count; 38 int timer = 0, count;
39 char ch, *cp; 39 char ch, *cp;
@@ -44,7 +44,7 @@ static void serial_edit_cmdline(char *buf, int len)
44 cp = &buf[count]; 44 cp = &buf[count];
45 count++; 45 count++;
46 46
47 while (timer++ < 5*1000) { 47 do {
48 if (scdp->tstc()) { 48 if (scdp->tstc()) {
49 while (((ch = scdp->getc()) != '\n') && (ch != '\r')) { 49 while (((ch = scdp->getc()) != '\n') && (ch != '\r')) {
50 /* Test for backspace/delete */ 50 /* Test for backspace/delete */
@@ -70,7 +70,7 @@ static void serial_edit_cmdline(char *buf, int len)
70 break; /* Exit 'timer' loop */ 70 break; /* Exit 'timer' loop */
71 } 71 }
72 udelay(1000); /* 1 msec */ 72 udelay(1000); /* 1 msec */
73 } 73 } while (timer++ < timeout);
74 *cp = 0; 74 *cp = 0;
75} 75}
76 76
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 688e9e4d29a1..611efe99faeb 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -144,6 +144,7 @@ CONFIG_RTC_DRV_DS1374=y
144CONFIG_RTC_DRV_DS3232=y 144CONFIG_RTC_DRV_DS3232=y
145CONFIG_UIO=y 145CONFIG_UIO=y
146CONFIG_STAGING=y 146CONFIG_STAGING=y
147CONFIG_MEMORY=y
147CONFIG_VIRT_DRIVERS=y 148CONFIG_VIRT_DRIVERS=y
148CONFIG_FSL_HV_MANAGER=y 149CONFIG_FSL_HV_MANAGER=y
149CONFIG_EXT2_FS=y 150CONFIG_EXT2_FS=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 6db97e4414b2..be24a18c0d96 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -118,6 +118,7 @@ CONFIG_FSL_DMA=y
118CONFIG_VIRT_DRIVERS=y 118CONFIG_VIRT_DRIVERS=y
119CONFIG_FSL_HV_MANAGER=y 119CONFIG_FSL_HV_MANAGER=y
120CONFIG_FSL_CORENET_CF=y 120CONFIG_FSL_CORENET_CF=y
121CONFIG_MEMORY=y
121CONFIG_EXT2_FS=y 122CONFIG_EXT2_FS=y
122CONFIG_EXT3_FS=y 123CONFIG_EXT3_FS=y
123CONFIG_ISO9660_FS=m 124CONFIG_ISO9660_FS=m
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index d2c415489f72..02395fab19bd 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -215,6 +215,7 @@ CONFIG_RTC_DRV_DS3232=y
215CONFIG_RTC_DRV_CMOS=y 215CONFIG_RTC_DRV_CMOS=y
216CONFIG_DMADEVICES=y 216CONFIG_DMADEVICES=y
217CONFIG_FSL_DMA=y 217CONFIG_FSL_DMA=y
218CONFIG_MEMORY=y
218# CONFIG_NET_DMA is not set 219# CONFIG_NET_DMA is not set
219CONFIG_EXT2_FS=y 220CONFIG_EXT2_FS=y
220CONFIG_EXT3_FS=y 221CONFIG_EXT3_FS=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 87460083dbc7..b5d1b82a1b43 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -216,6 +216,7 @@ CONFIG_RTC_DRV_DS3232=y
216CONFIG_RTC_DRV_CMOS=y 216CONFIG_RTC_DRV_CMOS=y
217CONFIG_DMADEVICES=y 217CONFIG_DMADEVICES=y
218CONFIG_FSL_DMA=y 218CONFIG_FSL_DMA=y
219CONFIG_MEMORY=y
219# CONFIG_NET_DMA is not set 220# CONFIG_NET_DMA is not set
220CONFIG_EXT2_FS=y 221CONFIG_EXT2_FS=y
221CONFIG_EXT3_FS=y 222CONFIG_EXT3_FS=y
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index bd3bd573d0ae..59abc620f8e8 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -14,9 +14,9 @@
14 * 14 *
15 * The bitop functions are defined to work on unsigned longs, so for a 15 * The bitop functions are defined to work on unsigned longs, so for a
16 * ppc64 system the bits end up numbered: 16 * ppc64 system the bits end up numbered:
17 * |63..............0|127............64|191...........128|255...........196| 17 * |63..............0|127............64|191...........128|255...........192|
18 * and on ppc32: 18 * and on ppc32:
19 * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224| 19 * |31.....0|63....32|95....64|127...96|159..128|191..160|223..192|255..224|
20 * 20 *
21 * There are a few little-endian macros used mostly for filesystem 21 * There are a few little-endian macros used mostly for filesystem
22 * bitmaps, these work on similar bit arrays layouts, but 22 * bitmaps, these work on similar bit arrays layouts, but
@@ -213,7 +213,7 @@ static __inline__ unsigned long ffz(unsigned long x)
213 return __ilog2(x & -x); 213 return __ilog2(x & -x);
214} 214}
215 215
216static __inline__ int __ffs(unsigned long x) 216static __inline__ unsigned long __ffs(unsigned long x)
217{ 217{
218 return __ilog2(x & -x); 218 return __ilog2(x & -x);
219} 219}
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index daa5af91163c..22d5a7da9e68 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -448,13 +448,9 @@ extern const char *powerpc_base_platform;
448 CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_DABRX) 448 CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_DABRX)
449#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2) 449#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2)
450 450
451#define CPU_FTRS_A2 (CPU_FTR_USE_TB | CPU_FTR_SMT | CPU_FTR_DBELL | \
452 CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN | \
453 CPU_FTR_ICSWX | CPU_FTR_DABRX )
454
455#ifdef __powerpc64__ 451#ifdef __powerpc64__
456#ifdef CONFIG_PPC_BOOK3E 452#ifdef CONFIG_PPC_BOOK3E
457#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500 | CPU_FTRS_A2) 453#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500)
458#else 454#else
459#define CPU_FTRS_POSSIBLE \ 455#define CPU_FTRS_POSSIBLE \
460 (CPU_FTRS_POWER4 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \ 456 (CPU_FTRS_POWER4 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
@@ -505,13 +501,13 @@ enum {
505 501
506#ifdef __powerpc64__ 502#ifdef __powerpc64__
507#ifdef CONFIG_PPC_BOOK3E 503#ifdef CONFIG_PPC_BOOK3E
508#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500 & CPU_FTRS_A2) 504#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500)
509#else 505#else
510#define CPU_FTRS_ALWAYS \ 506#define CPU_FTRS_ALWAYS \
511 (CPU_FTRS_POWER4 & CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \ 507 (CPU_FTRS_POWER4 & CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
512 CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \ 508 CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
513 CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \ 509 CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \
514 CPU_FTRS_POWER8_DD1 & CPU_FTRS_POSSIBLE) 510 CPU_FTRS_POWER8_DD1 & ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE)
515#endif 511#endif
516#else 512#else
517enum { 513enum {
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index ca07f9c27335..0652ebe117af 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -39,6 +39,7 @@ struct device_node;
39#define EEH_PROBE_MODE_DEV 0x04 /* From PCI device */ 39#define EEH_PROBE_MODE_DEV 0x04 /* From PCI device */
40#define EEH_PROBE_MODE_DEVTREE 0x08 /* From device tree */ 40#define EEH_PROBE_MODE_DEVTREE 0x08 /* From device tree */
41#define EEH_ENABLE_IO_FOR_LOG 0x10 /* Enable IO for log */ 41#define EEH_ENABLE_IO_FOR_LOG 0x10 /* Enable IO for log */
42#define EEH_EARLY_DUMP_LOG 0x20 /* Dump log immediately */
42 43
43/* 44/*
44 * Delay for PE reset, all in ms 45 * Delay for PE reset, all in ms
@@ -72,6 +73,7 @@ struct device_node;
72#define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */ 73#define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
73#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ 74#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
74#define EEH_PE_CFG_BLOCKED (1 << 2) /* Block config access */ 75#define EEH_PE_CFG_BLOCKED (1 << 2) /* Block config access */
76#define EEH_PE_RESET (1 << 3) /* PE reset in progress */
75 77
76#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */ 78#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
77#define EEH_PE_CFG_RESTRICTED (1 << 9) /* Block config on error */ 79#define EEH_PE_CFG_RESTRICTED (1 << 9) /* Block config on error */
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index 888d8f3f2524..57d289acb803 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -28,8 +28,7 @@
28 the loader. We need to make sure that it is out of the way of the program 28 the loader. We need to make sure that it is out of the way of the program
29 that it will "exec", and that there is sufficient room for the brk. */ 29 that it will "exec", and that there is sufficient room for the brk. */
30 30
31extern unsigned long randomize_et_dyn(unsigned long base); 31#define ELF_ET_DYN_BASE 0x20000000
32#define ELF_ET_DYN_BASE (randomize_et_dyn(0x20000000))
33 32
34#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0) 33#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)
35 34
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index 77ced0b3d81d..43b6bb1a4a9c 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -68,7 +68,10 @@ struct ccsr_guts {
68 u8 res0b4[0xc0 - 0xb4]; 68 u8 res0b4[0xc0 - 0xb4];
69 __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register 69 __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register
70 Called 'elbcvselcr' on 86xx SOCs */ 70 Called 'elbcvselcr' on 86xx SOCs */
71 u8 res0c4[0x224 - 0xc4]; 71 u8 res0c4[0x100 - 0xc4];
72 __be32 rcwsr[16]; /* 0x.0100 - Reset Control Word Status registers
73 There are 16 registers */
74 u8 res140[0x224 - 0x140];
72 __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ 75 __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
73 __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ 76 __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
74 u8 res22c[0x604 - 0x22c]; 77 u8 res22c[0x604 - 0x22c];
diff --git a/arch/powerpc/include/asm/hardirq.h b/arch/powerpc/include/asm/hardirq.h
index 1bbb3013d6aa..8add8b861e8d 100644
--- a/arch/powerpc/include/asm/hardirq.h
+++ b/arch/powerpc/include/asm/hardirq.h
@@ -21,7 +21,12 @@ DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
21 21
22#define __ARCH_IRQ_STAT 22#define __ARCH_IRQ_STAT
23 23
24#define local_softirq_pending() __get_cpu_var(irq_stat).__softirq_pending 24#define local_softirq_pending() __this_cpu_read(irq_stat.__softirq_pending)
25
26#define __ARCH_SET_SOFTIRQ_PENDING
27
28#define set_softirq_pending(x) __this_cpu_write(irq_stat.__softirq_pending, (x))
29#define or_softirq_pending(x) __this_cpu_or(irq_stat.__softirq_pending, (x))
25 30
26static inline void ack_bad_irq(unsigned int irq) 31static inline void ack_bad_irq(unsigned int irq)
27{ 32{
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 766b77d527ac..1d53a65b4ec1 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -48,7 +48,7 @@ static inline unsigned int hugepd_shift(hugepd_t hpd)
48#endif /* CONFIG_PPC_BOOK3S_64 */ 48#endif /* CONFIG_PPC_BOOK3S_64 */
49 49
50 50
51static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr, 51static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
52 unsigned pdshift) 52 unsigned pdshift)
53{ 53{
54 /* 54 /*
@@ -58,9 +58,9 @@ static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
58 */ 58 */
59 unsigned long idx = 0; 59 unsigned long idx = 0;
60 60
61 pte_t *dir = hugepd_page(*hpdp); 61 pte_t *dir = hugepd_page(hpd);
62#ifndef CONFIG_PPC_FSL_BOOK3E 62#ifndef CONFIG_PPC_FSL_BOOK3E
63 idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(*hpdp); 63 idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
64#endif 64#endif
65 65
66 return dir + idx; 66 return dir + idx;
@@ -193,7 +193,7 @@ static inline void flush_hugetlb_page(struct vm_area_struct *vma,
193} 193}
194 194
195#define hugepd_shift(x) 0 195#define hugepd_shift(x) 0
196static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr, 196static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
197 unsigned pdshift) 197 unsigned pdshift)
198{ 198{
199 return 0; 199 return 0;
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 9eaf301ac952..a8d2ef30d473 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -855,9 +855,6 @@ static inline void * bus_to_virt(unsigned long address)
855 855
856#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 856#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
857 857
858void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset,
859 size_t size, unsigned long flags);
860
861#endif /* __KERNEL__ */ 858#endif /* __KERNEL__ */
862 859
863#endif /* _ASM_POWERPC_IO_H */ 860#endif /* _ASM_POWERPC_IO_H */
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 307347f8ddbd..c8175a3fe560 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -42,7 +42,7 @@ struct machdep_calls {
42 unsigned long newpp, 42 unsigned long newpp,
43 unsigned long vpn, 43 unsigned long vpn,
44 int bpsize, int apsize, 44 int bpsize, int apsize,
45 int ssize, int local); 45 int ssize, unsigned long flags);
46 void (*hpte_updateboltedpp)(unsigned long newpp, 46 void (*hpte_updateboltedpp)(unsigned long newpp,
47 unsigned long ea, 47 unsigned long ea,
48 int psize, int ssize); 48 int psize, int ssize);
@@ -60,7 +60,7 @@ struct machdep_calls {
60 void (*hugepage_invalidate)(unsigned long vsid, 60 void (*hugepage_invalidate)(unsigned long vsid,
61 unsigned long addr, 61 unsigned long addr,
62 unsigned char *hpte_slot_array, 62 unsigned char *hpte_slot_array,
63 int psize, int ssize); 63 int psize, int ssize, int local);
64 /* special for kexec, to be called in real mode, linear mapping is 64 /* special for kexec, to be called in real mode, linear mapping is
65 * destroyed as well */ 65 * destroyed as well */
66 void (*hpte_clear_all)(void); 66 void (*hpte_clear_all)(void);
@@ -142,7 +142,6 @@ struct machdep_calls {
142#endif 142#endif
143 143
144 void (*restart)(char *cmd); 144 void (*restart)(char *cmd);
145 void (*power_off)(void);
146 void (*halt)(void); 145 void (*halt)(void);
147 void (*panic)(char *str); 146 void (*panic)(char *str);
148 void (*cpu_die)(void); 147 void (*cpu_die)(void);
@@ -292,10 +291,6 @@ struct machdep_calls {
292#ifdef CONFIG_ARCH_RANDOM 291#ifdef CONFIG_ARCH_RANDOM
293 int (*get_random_long)(unsigned long *v); 292 int (*get_random_long)(unsigned long *v);
294#endif 293#endif
295
296#ifdef CONFIG_MEMORY_HOTREMOVE
297 int (*remove_memory)(u64, u64);
298#endif
299}; 294};
300 295
301extern void e500_idle(void); 296extern void e500_idle(void);
@@ -343,16 +338,6 @@ extern sys_ctrler_t sys_ctrler;
343 338
344#endif /* CONFIG_PPC_PMAC */ 339#endif /* CONFIG_PPC_PMAC */
345 340
346
347/* Functions to produce codes on the leds.
348 * The SRC code should be unique for the message category and should
349 * be limited to the lower 24 bits (the upper 8 are set by these funcs),
350 * and (for boot & dump) should be sorted numerically in the order
351 * the events occur.
352 */
353/* Print a boot progress message. */
354void ppc64_boot_msg(unsigned int src, const char *msg);
355
356static inline void log_error(char *buf, unsigned int err_type, int fatal) 341static inline void log_error(char *buf, unsigned int err_type, int fatal)
357{ 342{
358 if (ppc_md.log_error) 343 if (ppc_md.log_error)
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/mmu-8xx.h
index 3d11d3ce79ec..986b9e1e1044 100644
--- a/arch/powerpc/include/asm/mmu-8xx.h
+++ b/arch/powerpc/include/asm/mmu-8xx.h
@@ -56,6 +56,7 @@
56 * additional information from the MI_EPN, and MI_TWC registers. 56 * additional information from the MI_EPN, and MI_TWC registers.
57 */ 57 */
58#define SPRN_MI_RPN 790 58#define SPRN_MI_RPN 790
59#define MI_SPS16K 0x00000008 /* Small page size (0 = 4k, 1 = 16k) */
59 60
60/* Define an RPN value for mapping kernel memory to large virtual 61/* Define an RPN value for mapping kernel memory to large virtual
61 * pages for boot initialization. This has real page number of 0, 62 * pages for boot initialization. This has real page number of 0,
@@ -129,6 +130,7 @@
129 * additional information from the MD_EPN, and MD_TWC registers. 130 * additional information from the MD_EPN, and MD_TWC registers.
130 */ 131 */
131#define SPRN_MD_RPN 798 132#define SPRN_MD_RPN 798
133#define MD_SPS16K 0x00000008 /* Small page size (0 = 4k, 1 = 16k) */
132 134
133/* This is a temporary storage register that could be used to save 135/* This is a temporary storage register that could be used to save
134 * a processor working register during a tablewalk. 136 * a processor working register during a tablewalk.
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index aeebc94b2bce..4f13c3ed7acf 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -316,27 +316,33 @@ static inline unsigned long hpt_hash(unsigned long vpn,
316 return hash & 0x7fffffffffUL; 316 return hash & 0x7fffffffffUL;
317} 317}
318 318
319#define HPTE_LOCAL_UPDATE 0x1
320#define HPTE_NOHPTE_UPDATE 0x2
321
319extern int __hash_page_4K(unsigned long ea, unsigned long access, 322extern int __hash_page_4K(unsigned long ea, unsigned long access,
320 unsigned long vsid, pte_t *ptep, unsigned long trap, 323 unsigned long vsid, pte_t *ptep, unsigned long trap,
321 unsigned int local, int ssize, int subpage_prot); 324 unsigned long flags, int ssize, int subpage_prot);
322extern int __hash_page_64K(unsigned long ea, unsigned long access, 325extern int __hash_page_64K(unsigned long ea, unsigned long access,
323 unsigned long vsid, pte_t *ptep, unsigned long trap, 326 unsigned long vsid, pte_t *ptep, unsigned long trap,
324 unsigned int local, int ssize); 327 unsigned long flags, int ssize);
325struct mm_struct; 328struct mm_struct;
326unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap); 329unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap);
327extern int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, unsigned long trap); 330extern int hash_page_mm(struct mm_struct *mm, unsigned long ea,
328extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); 331 unsigned long access, unsigned long trap,
332 unsigned long flags);
333extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap,
334 unsigned long dsisr);
329int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid, 335int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
330 pte_t *ptep, unsigned long trap, int local, int ssize, 336 pte_t *ptep, unsigned long trap, unsigned long flags,
331 unsigned int shift, unsigned int mmu_psize); 337 int ssize, unsigned int shift, unsigned int mmu_psize);
332#ifdef CONFIG_TRANSPARENT_HUGEPAGE 338#ifdef CONFIG_TRANSPARENT_HUGEPAGE
333extern int __hash_page_thp(unsigned long ea, unsigned long access, 339extern int __hash_page_thp(unsigned long ea, unsigned long access,
334 unsigned long vsid, pmd_t *pmdp, unsigned long trap, 340 unsigned long vsid, pmd_t *pmdp, unsigned long trap,
335 int local, int ssize, unsigned int psize); 341 unsigned long flags, int ssize, unsigned int psize);
336#else 342#else
337static inline int __hash_page_thp(unsigned long ea, unsigned long access, 343static inline int __hash_page_thp(unsigned long ea, unsigned long access,
338 unsigned long vsid, pmd_t *pmdp, 344 unsigned long vsid, pmd_t *pmdp,
339 unsigned long trap, int local, 345 unsigned long trap, unsigned long flags,
340 int ssize, unsigned int psize) 346 int ssize, unsigned int psize)
341{ 347{
342 BUG(); 348 BUG();
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 9124b0ede1fc..5cd8d2fddba9 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -154,6 +154,10 @@ struct opal_sg_list {
154#define OPAL_HANDLE_HMI 98 154#define OPAL_HANDLE_HMI 98
155#define OPAL_REGISTER_DUMP_REGION 101 155#define OPAL_REGISTER_DUMP_REGION 101
156#define OPAL_UNREGISTER_DUMP_REGION 102 156#define OPAL_UNREGISTER_DUMP_REGION 102
157#define OPAL_WRITE_TPO 103
158#define OPAL_READ_TPO 104
159#define OPAL_IPMI_SEND 107
160#define OPAL_IPMI_RECV 108
157 161
158#ifndef __ASSEMBLY__ 162#ifndef __ASSEMBLY__
159 163
@@ -284,62 +288,6 @@ enum OpalMessageType {
284 OPAL_MSG_TYPE_MAX, 288 OPAL_MSG_TYPE_MAX,
285}; 289};
286 290
287/* Machine check related definitions */
288enum OpalMCE_Version {
289 OpalMCE_V1 = 1,
290};
291
292enum OpalMCE_Severity {
293 OpalMCE_SEV_NO_ERROR = 0,
294 OpalMCE_SEV_WARNING = 1,
295 OpalMCE_SEV_ERROR_SYNC = 2,
296 OpalMCE_SEV_FATAL = 3,
297};
298
299enum OpalMCE_Disposition {
300 OpalMCE_DISPOSITION_RECOVERED = 0,
301 OpalMCE_DISPOSITION_NOT_RECOVERED = 1,
302};
303
304enum OpalMCE_Initiator {
305 OpalMCE_INITIATOR_UNKNOWN = 0,
306 OpalMCE_INITIATOR_CPU = 1,
307};
308
309enum OpalMCE_ErrorType {
310 OpalMCE_ERROR_TYPE_UNKNOWN = 0,
311 OpalMCE_ERROR_TYPE_UE = 1,
312 OpalMCE_ERROR_TYPE_SLB = 2,
313 OpalMCE_ERROR_TYPE_ERAT = 3,
314 OpalMCE_ERROR_TYPE_TLB = 4,
315};
316
317enum OpalMCE_UeErrorType {
318 OpalMCE_UE_ERROR_INDETERMINATE = 0,
319 OpalMCE_UE_ERROR_IFETCH = 1,
320 OpalMCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2,
321 OpalMCE_UE_ERROR_LOAD_STORE = 3,
322 OpalMCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4,
323};
324
325enum OpalMCE_SlbErrorType {
326 OpalMCE_SLB_ERROR_INDETERMINATE = 0,
327 OpalMCE_SLB_ERROR_PARITY = 1,
328 OpalMCE_SLB_ERROR_MULTIHIT = 2,
329};
330
331enum OpalMCE_EratErrorType {
332 OpalMCE_ERAT_ERROR_INDETERMINATE = 0,
333 OpalMCE_ERAT_ERROR_PARITY = 1,
334 OpalMCE_ERAT_ERROR_MULTIHIT = 2,
335};
336
337enum OpalMCE_TlbErrorType {
338 OpalMCE_TLB_ERROR_INDETERMINATE = 0,
339 OpalMCE_TLB_ERROR_PARITY = 1,
340 OpalMCE_TLB_ERROR_MULTIHIT = 2,
341};
342
343enum OpalThreadStatus { 291enum OpalThreadStatus {
344 OPAL_THREAD_INACTIVE = 0x0, 292 OPAL_THREAD_INACTIVE = 0x0,
345 OPAL_THREAD_STARTED = 0x1, 293 OPAL_THREAD_STARTED = 0x1,
@@ -452,52 +400,15 @@ struct opal_msg {
452 __be64 params[8]; 400 __be64 params[8];
453}; 401};
454 402
455struct opal_machine_check_event { 403enum {
456 enum OpalMCE_Version version:8; /* 0x00 */ 404 OPAL_IPMI_MSG_FORMAT_VERSION_1 = 1,
457 uint8_t in_use; /* 0x01 */ 405};
458 enum OpalMCE_Severity severity:8; /* 0x02 */
459 enum OpalMCE_Initiator initiator:8; /* 0x03 */
460 enum OpalMCE_ErrorType error_type:8; /* 0x04 */
461 enum OpalMCE_Disposition disposition:8; /* 0x05 */
462 uint8_t reserved_1[2]; /* 0x06 */
463 uint64_t gpr3; /* 0x08 */
464 uint64_t srr0; /* 0x10 */
465 uint64_t srr1; /* 0x18 */
466 union { /* 0x20 */
467 struct {
468 enum OpalMCE_UeErrorType ue_error_type:8;
469 uint8_t effective_address_provided;
470 uint8_t physical_address_provided;
471 uint8_t reserved_1[5];
472 uint64_t effective_address;
473 uint64_t physical_address;
474 uint8_t reserved_2[8];
475 } ue_error;
476
477 struct {
478 enum OpalMCE_SlbErrorType slb_error_type:8;
479 uint8_t effective_address_provided;
480 uint8_t reserved_1[6];
481 uint64_t effective_address;
482 uint8_t reserved_2[16];
483 } slb_error;
484
485 struct {
486 enum OpalMCE_EratErrorType erat_error_type:8;
487 uint8_t effective_address_provided;
488 uint8_t reserved_1[6];
489 uint64_t effective_address;
490 uint8_t reserved_2[16];
491 } erat_error;
492 406
493 struct { 407struct opal_ipmi_msg {
494 enum OpalMCE_TlbErrorType tlb_error_type:8; 408 uint8_t version;
495 uint8_t effective_address_provided; 409 uint8_t netfn;
496 uint8_t reserved_1[6]; 410 uint8_t cmd;
497 uint64_t effective_address; 411 uint8_t data[];
498 uint8_t reserved_2[16];
499 } tlb_error;
500 } u;
501}; 412};
502 413
503/* FSP memory errors handling */ 414/* FSP memory errors handling */
@@ -819,6 +730,9 @@ int64_t opal_rtc_read(__be32 *year_month_day,
819 __be64 *hour_minute_second_millisecond); 730 __be64 *hour_minute_second_millisecond);
820int64_t opal_rtc_write(uint32_t year_month_day, 731int64_t opal_rtc_write(uint32_t year_month_day,
821 uint64_t hour_minute_second_millisecond); 732 uint64_t hour_minute_second_millisecond);
733int64_t opal_tpo_read(uint64_t token, __be32 *year_mon_day, __be32 *hour_min);
734int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
735 uint32_t hour_min);
822int64_t opal_cec_power_down(uint64_t request); 736int64_t opal_cec_power_down(uint64_t request);
823int64_t opal_cec_reboot(void); 737int64_t opal_cec_reboot(void);
824int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset); 738int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
@@ -963,6 +877,10 @@ int64_t opal_handle_hmi(void);
963int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end); 877int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
964int64_t opal_unregister_dump_region(uint32_t id); 878int64_t opal_unregister_dump_region(uint32_t id);
965int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number); 879int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
880int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
881 uint64_t msg_len);
882int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
883 uint64_t *msg_len);
966 884
967/* Internal functions */ 885/* Internal functions */
968extern int early_init_dt_scan_opal(unsigned long node, const char *uname, 886extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
@@ -992,8 +910,6 @@ extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
992extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data); 910extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
993 911
994struct rtc_time; 912struct rtc_time;
995extern int opal_set_rtc_time(struct rtc_time *tm);
996extern void opal_get_rtc_time(struct rtc_time *tm);
997extern unsigned long opal_get_boot_time(void); 913extern unsigned long opal_get_boot_time(void);
998extern void opal_nvram_init(void); 914extern void opal_nvram_init(void);
999extern void opal_flash_init(void); 915extern void opal_flash_init(void);
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index a5139ea6910b..24a386cbb928 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -42,7 +42,6 @@ extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
42#define get_slb_shadow() (get_paca()->slb_shadow_ptr) 42#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
43 43
44struct task_struct; 44struct task_struct;
45struct opal_machine_check_event;
46 45
47/* 46/*
48 * Defines the layout of the paca. 47 * Defines the layout of the paca.
@@ -153,12 +152,6 @@ struct paca_struct {
153 u64 tm_scratch; /* TM scratch area for reclaim */ 152 u64 tm_scratch; /* TM scratch area for reclaim */
154#endif 153#endif
155 154
156#ifdef CONFIG_PPC_POWERNV
157 /* Pointer to OPAL machine check event structure set by the
158 * early exception handler for use by high level C handler
159 */
160 struct opal_machine_check_event *opal_mc_evt;
161#endif
162#ifdef CONFIG_PPC_BOOK3S_64 155#ifdef CONFIG_PPC_BOOK3S_64
163 /* Exclusive emergency stack pointer for machine check exception. */ 156 /* Exclusive emergency stack pointer for machine check exception. */
164 void *mc_emergency_sp; 157 void *mc_emergency_sp;
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 26fe1ae15212..69c059887a2c 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -379,12 +379,14 @@ static inline int hugepd_ok(hugepd_t hpd)
379} 379}
380#endif 380#endif
381 381
382#define is_hugepd(pdep) (hugepd_ok(*((hugepd_t *)(pdep)))) 382#define is_hugepd(hpd) (hugepd_ok(hpd))
383#define pgd_huge pgd_huge
383int pgd_huge(pgd_t pgd); 384int pgd_huge(pgd_t pgd);
384#else /* CONFIG_HUGETLB_PAGE */ 385#else /* CONFIG_HUGETLB_PAGE */
385#define is_hugepd(pdep) 0 386#define is_hugepd(pdep) 0
386#define pgd_huge(pgd) 0 387#define pgd_huge(pgd) 0
387#endif /* CONFIG_HUGETLB_PAGE */ 388#endif /* CONFIG_HUGETLB_PAGE */
389#define __hugepd(x) ((hugepd_t) { (x) })
388 390
389struct page; 391struct page;
390extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg); 392extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 945e47adf7db..234e07c47803 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -170,6 +170,25 @@ static inline unsigned long pte_update(pte_t *p,
170#ifdef PTE_ATOMIC_UPDATES 170#ifdef PTE_ATOMIC_UPDATES
171 unsigned long old, tmp; 171 unsigned long old, tmp;
172 172
173#ifdef CONFIG_PPC_8xx
174 unsigned long tmp2;
175
176 __asm__ __volatile__("\
1771: lwarx %0,0,%4\n\
178 andc %1,%0,%5\n\
179 or %1,%1,%6\n\
180 /* 0x200 == Extended encoding, bit 22 */ \
181 /* Bit 22 has to be 1 if neither _PAGE_USER nor _PAGE_RW are set */ \
182 rlwimi %1,%1,32-2,0x200\n /* get _PAGE_USER */ \
183 rlwinm %3,%1,32-1,0x200\n /* get _PAGE_RW */ \
184 or %1,%3,%1\n\
185 xori %1,%1,0x200\n"
186" stwcx. %1,0,%4\n\
187 bne- 1b"
188 : "=&r" (old), "=&r" (tmp), "=m" (*p), "=&r" (tmp2)
189 : "r" (p), "r" (clr), "r" (set), "m" (*p)
190 : "cc" );
191#else /* CONFIG_PPC_8xx */
173 __asm__ __volatile__("\ 192 __asm__ __volatile__("\
1741: lwarx %0,0,%3\n\ 1931: lwarx %0,0,%3\n\
175 andc %1,%0,%4\n\ 194 andc %1,%0,%4\n\
@@ -180,6 +199,7 @@ static inline unsigned long pte_update(pte_t *p,
180 : "=&r" (old), "=&r" (tmp), "=m" (*p) 199 : "=&r" (old), "=&r" (tmp), "=m" (*p)
181 : "r" (p), "r" (clr), "r" (set), "m" (*p) 200 : "r" (p), "r" (clr), "r" (set), "m" (*p)
182 : "cc" ); 201 : "cc" );
202#endif /* CONFIG_PPC_8xx */
183#else /* PTE_ATOMIC_UPDATES */ 203#else /* PTE_ATOMIC_UPDATES */
184 unsigned long old = pte_val(*p); 204 unsigned long old = pte_val(*p);
185 *p = __pte((old & ~clr) | set); 205 *p = __pte((old & ~clr) | set);
diff --git a/arch/powerpc/include/asm/pgtable-ppc64-4k.h b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
index 7b935683f268..132ee1d482c2 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64-4k.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
@@ -57,7 +57,21 @@
57#define pgd_present(pgd) (pgd_val(pgd) != 0) 57#define pgd_present(pgd) (pgd_val(pgd) != 0)
58#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0) 58#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0)
59#define pgd_page_vaddr(pgd) (pgd_val(pgd) & ~PGD_MASKED_BITS) 59#define pgd_page_vaddr(pgd) (pgd_val(pgd) & ~PGD_MASKED_BITS)
60#define pgd_page(pgd) virt_to_page(pgd_page_vaddr(pgd)) 60
61#ifndef __ASSEMBLY__
62
63static inline pte_t pgd_pte(pgd_t pgd)
64{
65 return __pte(pgd_val(pgd));
66}
67
68static inline pgd_t pte_pgd(pte_t pte)
69{
70 return __pgd(pte_val(pte));
71}
72extern struct page *pgd_page(pgd_t pgd);
73
74#endif /* !__ASSEMBLY__ */
61 75
62#define pud_offset(pgdp, addr) \ 76#define pud_offset(pgdp, addr) \
63 (((pud_t *) pgd_page_vaddr(*(pgdp))) + \ 77 (((pud_t *) pgd_page_vaddr(*(pgdp))) + \
diff --git a/arch/powerpc/include/asm/pgtable-ppc64-64k.h b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
index a56b82fb0609..1de35bbd02a6 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64-64k.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
@@ -38,4 +38,7 @@
38/* Bits to mask out from a PGD/PUD to get to the PMD page */ 38/* Bits to mask out from a PGD/PUD to get to the PMD page */
39#define PUD_MASKED_BITS 0x1ff 39#define PUD_MASKED_BITS 0x1ff
40 40
41#define pgd_pte(pgd) (pud_pte(((pud_t){ pgd })))
42#define pte_pgd(pte) ((pgd_t)pte_pud(pte))
43
41#endif /* _ASM_POWERPC_PGTABLE_PPC64_64K_H */ 44#endif /* _ASM_POWERPC_PGTABLE_PPC64_64K_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 9b4b1904efae..b9dcc936e2d1 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -152,7 +152,7 @@
152#define pmd_none(pmd) (!pmd_val(pmd)) 152#define pmd_none(pmd) (!pmd_val(pmd))
153#define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \ 153#define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
154 || (pmd_val(pmd) & PMD_BAD_BITS)) 154 || (pmd_val(pmd) & PMD_BAD_BITS))
155#define pmd_present(pmd) (pmd_val(pmd) != 0) 155#define pmd_present(pmd) (!pmd_none(pmd))
156#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0) 156#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
157#define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS) 157#define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
158extern struct page *pmd_page(pmd_t pmd); 158extern struct page *pmd_page(pmd_t pmd);
@@ -164,9 +164,21 @@ extern struct page *pmd_page(pmd_t pmd);
164#define pud_present(pud) (pud_val(pud) != 0) 164#define pud_present(pud) (pud_val(pud) != 0)
165#define pud_clear(pudp) (pud_val(*(pudp)) = 0) 165#define pud_clear(pudp) (pud_val(*(pudp)) = 0)
166#define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS) 166#define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
167#define pud_page(pud) virt_to_page(pud_page_vaddr(pud))
168 167
168extern struct page *pud_page(pud_t pud);
169
170static inline pte_t pud_pte(pud_t pud)
171{
172 return __pte(pud_val(pud));
173}
174
175static inline pud_t pte_pud(pte_t pte)
176{
177 return __pud(pte_val(pte));
178}
179#define pud_write(pud) pte_write(pud_pte(pud))
169#define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);}) 180#define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
181#define pgd_write(pgd) pte_write(pgd_pte(pgd))
170 182
171/* 183/*
172 * Find an entry in a page-table-directory. We combine the address region 184 * Find an entry in a page-table-directory. We combine the address region
@@ -422,7 +434,22 @@ extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
422 pmd_t *pmdp, pmd_t pmd); 434 pmd_t *pmdp, pmd_t pmd);
423extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr, 435extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
424 pmd_t *pmd); 436 pmd_t *pmd);
425 437/*
438 *
439 * For core kernel code by design pmd_trans_huge is never run on any hugetlbfs
440 * page. The hugetlbfs page table walking and mangling paths are totally
441 * separated form the core VM paths and they're differentiated by
442 * VM_HUGETLB being set on vm_flags well before any pmd_trans_huge could run.
443 *
444 * pmd_trans_huge() is defined as false at build time if
445 * CONFIG_TRANSPARENT_HUGEPAGE=n to optimize away code blocks at build
446 * time in such case.
447 *
448 * For ppc64 we need to differntiate from explicit hugepages from THP, because
449 * for THP we also track the subpage details at the pmd level. We don't do
450 * that for explicit huge pages.
451 *
452 */
426static inline int pmd_trans_huge(pmd_t pmd) 453static inline int pmd_trans_huge(pmd_t pmd)
427{ 454{
428 /* 455 /*
@@ -431,16 +458,6 @@ static inline int pmd_trans_huge(pmd_t pmd)
431 return (pmd_val(pmd) & 0x3) && (pmd_val(pmd) & _PAGE_THP_HUGE); 458 return (pmd_val(pmd) & 0x3) && (pmd_val(pmd) & _PAGE_THP_HUGE);
432} 459}
433 460
434static inline int pmd_large(pmd_t pmd)
435{
436 /*
437 * leaf pte for huge page, bottom two bits != 00
438 */
439 if (pmd_trans_huge(pmd))
440 return pmd_val(pmd) & _PAGE_PRESENT;
441 return 0;
442}
443
444static inline int pmd_trans_splitting(pmd_t pmd) 461static inline int pmd_trans_splitting(pmd_t pmd)
445{ 462{
446 if (pmd_trans_huge(pmd)) 463 if (pmd_trans_huge(pmd))
@@ -451,6 +468,14 @@ static inline int pmd_trans_splitting(pmd_t pmd)
451extern int has_transparent_hugepage(void); 468extern int has_transparent_hugepage(void);
452#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 469#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
453 470
471static inline int pmd_large(pmd_t pmd)
472{
473 /*
474 * leaf pte for huge page, bottom two bits != 00
475 */
476 return ((pmd_val(pmd) & 0x3) != 0x0);
477}
478
454static inline pte_t pmd_pte(pmd_t pmd) 479static inline pte_t pmd_pte(pmd_t pmd)
455{ 480{
456 return __pte(pmd_val(pmd)); 481 return __pte(pmd_val(pmd));
@@ -576,6 +601,5 @@ static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
576 */ 601 */
577 return true; 602 return true;
578} 603}
579
580#endif /* __ASSEMBLY__ */ 604#endif /* __ASSEMBLY__ */
581#endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */ 605#endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 316f9a5da173..a8805fee0df9 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -274,11 +274,9 @@ extern void paging_init(void);
274 */ 274 */
275extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *); 275extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
276 276
277extern int gup_hugepd(hugepd_t *hugepd, unsigned pdshift, unsigned long addr,
278 unsigned long end, int write, struct page **pages, int *nr);
279
280extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr, 277extern int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
281 unsigned long end, int write, struct page **pages, int *nr); 278 unsigned long end, int write,
279 struct page **pages, int *nr);
282#ifndef CONFIG_TRANSPARENT_HUGEPAGE 280#ifndef CONFIG_TRANSPARENT_HUGEPAGE
283#define pmd_large(pmd) 0 281#define pmd_large(pmd) 0
284#define has_transparent_hugepage() 0 282#define has_transparent_hugepage() 0
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index dda7ac4c80bd..29c3798cf800 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -451,7 +451,7 @@ extern unsigned long cpuidle_disable;
451enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF}; 451enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
452 452
453extern int powersave_nap; /* set if nap mode can be used in idle loop */ 453extern int powersave_nap; /* set if nap mode can be used in idle loop */
454extern void power7_nap(int check_irq); 454extern unsigned long power7_nap(int check_irq);
455extern void power7_sleep(void); 455extern void power7_sleep(void);
456extern void flush_instruction_cache(void); 456extern void flush_instruction_cache(void);
457extern void hard_reset_now(void); 457extern void hard_reset_now(void);
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h
index d44826e4ff97..daa4616e61c4 100644
--- a/arch/powerpc/include/asm/pte-8xx.h
+++ b/arch/powerpc/include/asm/pte-8xx.h
@@ -48,19 +48,22 @@
48 */ 48 */
49#define _PAGE_RW 0x0400 /* lsb PP bits, inverted in HW */ 49#define _PAGE_RW 0x0400 /* lsb PP bits, inverted in HW */
50#define _PAGE_USER 0x0800 /* msb PP bits */ 50#define _PAGE_USER 0x0800 /* msb PP bits */
51/* set when neither _PAGE_USER nor _PAGE_RW are set */
52#define _PAGE_KNLRO 0x0200
51 53
52#define _PMD_PRESENT 0x0001 54#define _PMD_PRESENT 0x0001
53#define _PMD_BAD 0x0ff0 55#define _PMD_BAD 0x0ff0
54#define _PMD_PAGE_MASK 0x000c 56#define _PMD_PAGE_MASK 0x000c
55#define _PMD_PAGE_8M 0x000c 57#define _PMD_PAGE_8M 0x000c
56 58
57#define _PTE_NONE_MASK _PAGE_ACCESSED 59#define _PTE_NONE_MASK _PAGE_KNLRO
58 60
59/* Until my rework is finished, 8xx still needs atomic PTE updates */ 61/* Until my rework is finished, 8xx still needs atomic PTE updates */
60#define PTE_ATOMIC_UPDATES 1 62#define PTE_ATOMIC_UPDATES 1
61 63
62/* We need to add _PAGE_SHARED to kernel pages */ 64/* We need to add _PAGE_SHARED to kernel pages */
63#define _PAGE_KERNEL_RO (_PAGE_SHARED) 65#define _PAGE_KERNEL_RO (_PAGE_SHARED | _PAGE_KNLRO)
66#define _PAGE_KERNEL_ROX (_PAGE_EXEC | _PAGE_KNLRO)
64#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE) 67#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
65 68
66#endif /* __KERNEL__ */ 69#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index 11ba86e17631..fbdf18cf954c 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -8,7 +8,6 @@ extern void ppc_printk_progress(char *s, unsigned short hex);
8 8
9extern unsigned int rtas_data; 9extern unsigned int rtas_data;
10extern int mem_init_done; /* set on boot once kmalloc can be called */ 10extern int mem_init_done; /* set on boot once kmalloc can be called */
11extern int init_bootmem_done; /* set once bootmem is available */
12extern unsigned long long memory_limit; 11extern unsigned long long memory_limit;
13extern unsigned long klimit; 12extern unsigned long klimit;
14extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask); 13extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
@@ -24,7 +23,7 @@ extern void reloc_got2(unsigned long);
24#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x))) 23#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
25 24
26void check_for_initrd(void); 25void check_for_initrd(void);
27void do_init_bootmem(void); 26void initmem_init(void);
28void setup_panic(void); 27void setup_panic(void);
29#define ARCH_PANIC_TIMEOUT 180 28#define ARCH_PANIC_TIMEOUT 180
30 29
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index b034ecdb7c74..ebc4f165690a 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -71,13 +71,12 @@ struct thread_info {
71#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) 71#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
72 72
73/* how to get the thread information struct from C */ 73/* how to get the thread information struct from C */
74register unsigned long __current_r1 asm("r1");
74static inline struct thread_info *current_thread_info(void) 75static inline struct thread_info *current_thread_info(void)
75{ 76{
76 register unsigned long sp asm("r1");
77
78 /* gcc4, at least, is smart enough to turn this into a single 77 /* gcc4, at least, is smart enough to turn this into a single
79 * rlwinm for ppc32 and clrrdi for ppc64 */ 78 * rlwinm for ppc32 and clrrdi for ppc64 */
80 return (struct thread_info *)(sp & ~(THREAD_SIZE-1)); 79 return (struct thread_info *)(__current_r1 & ~(THREAD_SIZE-1));
81} 80}
82 81
83#endif /* __ASSEMBLY__ */ 82#endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/tlbflush.h b/arch/powerpc/include/asm/tlbflush.h
index 2def01ed0cb2..23d351ca0303 100644
--- a/arch/powerpc/include/asm/tlbflush.h
+++ b/arch/powerpc/include/asm/tlbflush.h
@@ -107,14 +107,14 @@ extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
107 107
108static inline void arch_enter_lazy_mmu_mode(void) 108static inline void arch_enter_lazy_mmu_mode(void)
109{ 109{
110 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 110 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
111 111
112 batch->active = 1; 112 batch->active = 1;
113} 113}
114 114
115static inline void arch_leave_lazy_mmu_mode(void) 115static inline void arch_leave_lazy_mmu_mode(void)
116{ 116{
117 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 117 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
118 118
119 if (batch->index) 119 if (batch->index)
120 __flush_tlb_pending(batch); 120 __flush_tlb_pending(batch);
@@ -125,9 +125,11 @@ static inline void arch_leave_lazy_mmu_mode(void)
125 125
126 126
127extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, 127extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize,
128 int ssize, int local); 128 int ssize, unsigned long flags);
129extern void flush_hash_range(unsigned long number, int local); 129extern void flush_hash_range(unsigned long number, int local);
130 130extern void flush_hash_hugepage(unsigned long vsid, unsigned long addr,
131 pmd_t *pmdp, unsigned int psize, int ssize,
132 unsigned long flags);
131 133
132static inline void local_flush_tlb_mm(struct mm_struct *mm) 134static inline void local_flush_tlb_mm(struct mm_struct *mm)
133{ 135{
diff --git a/arch/powerpc/include/asm/vga.h b/arch/powerpc/include/asm/vga.h
index a2eac409c1ec..e5f8dd366212 100644
--- a/arch/powerpc/include/asm/vga.h
+++ b/arch/powerpc/include/asm/vga.h
@@ -38,12 +38,10 @@ static inline u16 scr_readw(volatile const u16 *addr)
38 38
39#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */ 39#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
40 40
41extern unsigned long vgacon_remap_base;
42
43#ifdef __powerpc64__ 41#ifdef __powerpc64__
44#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap((x), s)) 42#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap((x), s))
45#else 43#else
46#define VGA_MAP_MEM(x,s) (x + vgacon_remap_base) 44#define VGA_MAP_MEM(x,s) (x)
47#endif 45#endif
48 46
49#define vga_readb(x) (*(x)) 47#define vga_readb(x) (*(x))
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 0d050ea37a04..6997f4a271df 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -98,7 +98,7 @@ DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
98 98
99static inline void xics_push_cppr(unsigned int vec) 99static inline void xics_push_cppr(unsigned int vec)
100{ 100{
101 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); 101 struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
102 102
103 if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1)) 103 if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
104 return; 104 return;
@@ -111,7 +111,7 @@ static inline void xics_push_cppr(unsigned int vec)
111 111
112static inline unsigned char xics_pop_cppr(void) 112static inline unsigned char xics_pop_cppr(void)
113{ 113{
114 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); 114 struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
115 115
116 if (WARN_ON(os_cppr->index < 1)) 116 if (WARN_ON(os_cppr->index < 1))
117 return LOWEST_PRIORITY; 117 return LOWEST_PRIORITY;
@@ -121,7 +121,7 @@ static inline unsigned char xics_pop_cppr(void)
121 121
122static inline void xics_set_base_cppr(unsigned char cppr) 122static inline void xics_set_base_cppr(unsigned char cppr)
123{ 123{
124 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); 124 struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
125 125
126 /* we only really want to set the priority when there's 126 /* we only really want to set the priority when there's
127 * just one cppr value on the stack 127 * just one cppr value on the stack
@@ -133,7 +133,7 @@ static inline void xics_set_base_cppr(unsigned char cppr)
133 133
134static inline unsigned char xics_cppr_top(void) 134static inline unsigned char xics_cppr_top(void)
135{ 135{
136 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); 136 struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
137 137
138 return os_cppr->stack[os_cppr->index]; 138 return os_cppr->stack[os_cppr->index];
139} 139}
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 34f55524d456..86150fbb42c3 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -908,7 +908,7 @@ int fix_alignment(struct pt_regs *regs)
908 flush_fp_to_thread(current); 908 flush_fp_to_thread(current);
909 } 909 }
910 910
911 if ((nb == 16)) { 911 if (nb == 16) {
912 if (flags & F) { 912 if (flags & F) {
913 /* Special case for 16-byte FP loads and stores */ 913 /* Special case for 16-byte FP loads and stores */
914 PPC_WARN_ALIGNMENT(fp_pair, regs); 914 PPC_WARN_ALIGNMENT(fp_pair, regs);
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 9d7dede2847c..c161ef3f28a1 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -726,12 +726,5 @@ int main(void)
726 arch.timing_last_enter.tv32.tbl)); 726 arch.timing_last_enter.tv32.tbl));
727#endif 727#endif
728 728
729#ifdef CONFIG_PPC_POWERNV
730 DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
731 DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
732 DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
733 DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
734#endif
735
736 return 0; 729 return 0;
737} 730}
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index c78e6dac4d7d..cfa0f81a5bb0 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -12,7 +12,6 @@
12#undef DEBUG 12#undef DEBUG
13 13
14#include <linux/crash_dump.h> 14#include <linux/crash_dump.h>
15#include <linux/bootmem.h>
16#include <linux/io.h> 15#include <linux/io.h>
17#include <linux/memblock.h> 16#include <linux/memblock.h>
18#include <asm/code-patching.h> 17#include <asm/code-patching.h>
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c
index d55c76c571f3..f4217819cc31 100644
--- a/arch/powerpc/kernel/dbell.c
+++ b/arch/powerpc/kernel/dbell.c
@@ -41,7 +41,7 @@ void doorbell_exception(struct pt_regs *regs)
41 41
42 may_hard_irq_enable(); 42 may_hard_irq_enable();
43 43
44 __get_cpu_var(irq_stat).doorbell_irqs++; 44 __this_cpu_inc(irq_stat.doorbell_irqs);
45 45
46 smp_ipi_demux(); 46 smp_ipi_demux();
47 47
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 2248a1999c64..e1b6d8e17289 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -143,6 +143,8 @@ static int __init eeh_setup(char *str)
143{ 143{
144 if (!strcmp(str, "off")) 144 if (!strcmp(str, "off"))
145 eeh_add_flag(EEH_FORCE_DISABLED); 145 eeh_add_flag(EEH_FORCE_DISABLED);
146 else if (!strcmp(str, "early_log"))
147 eeh_add_flag(EEH_EARLY_DUMP_LOG);
146 148
147 return 1; 149 return 1;
148} 150}
@@ -758,30 +760,41 @@ static void eeh_reset_pe_once(struct eeh_pe *pe)
758int eeh_reset_pe(struct eeh_pe *pe) 760int eeh_reset_pe(struct eeh_pe *pe)
759{ 761{
760 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); 762 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
761 int i, rc; 763 int i, state, ret;
764
765 /* Mark as reset and block config space */
766 eeh_pe_state_mark(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);
762 767
763 /* Take three shots at resetting the bus */ 768 /* Take three shots at resetting the bus */
764 for (i=0; i<3; i++) { 769 for (i = 0; i < 3; i++) {
765 eeh_reset_pe_once(pe); 770 eeh_reset_pe_once(pe);
766 771
767 /* 772 /*
768 * EEH_PE_ISOLATED is expected to be removed after 773 * EEH_PE_ISOLATED is expected to be removed after
769 * BAR restore. 774 * BAR restore.
770 */ 775 */
771 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC); 776 state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
772 if ((rc & flags) == flags) 777 if ((state & flags) == flags) {
773 return 0; 778 ret = 0;
779 goto out;
780 }
774 781
775 if (rc < 0) { 782 if (state < 0) {
776 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x", 783 pr_warn("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
777 __func__, pe->phb->global_number, pe->addr); 784 __func__, pe->phb->global_number, pe->addr);
778 return -1; 785 ret = -ENOTRECOVERABLE;
786 goto out;
779 } 787 }
780 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n", 788
781 i+1, pe->phb->global_number, pe->addr, rc); 789 /* We might run out of credits */
790 ret = -EIO;
791 pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n",
792 __func__, state, pe->phb->global_number, pe->addr, (i + 1));
782 } 793 }
783 794
784 return -1; 795out:
796 eeh_pe_state_clear(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);
797 return ret;
785} 798}
786 799
787/** 800/**
@@ -920,11 +933,8 @@ int eeh_init(void)
920 pr_warn("%s: Platform EEH operation not found\n", 933 pr_warn("%s: Platform EEH operation not found\n",
921 __func__); 934 __func__);
922 return -EEXIST; 935 return -EEXIST;
923 } else if ((ret = eeh_ops->init())) { 936 } else if ((ret = eeh_ops->init()))
924 pr_warn("%s: Failed to call platform init function (%d)\n",
925 __func__, ret);
926 return ret; 937 return ret;
927 }
928 938
929 /* Initialize EEH event */ 939 /* Initialize EEH event */
930 ret = eeh_event_init(); 940 ret = eeh_event_init();
@@ -1209,6 +1219,7 @@ int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state)
1209static struct pci_device_id eeh_reset_ids[] = { 1219static struct pci_device_id eeh_reset_ids[] = {
1210 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */ 1220 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */
1211 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */ 1221 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */
1222 { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */
1212 { 0 } 1223 { 0 }
1213}; 1224};
1214 1225
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 6535936bdf27..b17e793ba67e 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -528,13 +528,11 @@ int eeh_pe_reset_and_recover(struct eeh_pe *pe)
528 eeh_pe_dev_traverse(pe, eeh_report_error, &result); 528 eeh_pe_dev_traverse(pe, eeh_report_error, &result);
529 529
530 /* Issue reset */ 530 /* Issue reset */
531 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
532 ret = eeh_reset_pe(pe); 531 ret = eeh_reset_pe(pe);
533 if (ret) { 532 if (ret) {
534 eeh_pe_state_clear(pe, EEH_PE_RECOVERING | EEH_PE_CFG_BLOCKED); 533 eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
535 return ret; 534 return ret;
536 } 535 }
537 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
538 536
539 /* Unfreeze the PE */ 537 /* Unfreeze the PE */
540 ret = eeh_clear_pe_frozen_state(pe, true); 538 ret = eeh_clear_pe_frozen_state(pe, true);
@@ -601,19 +599,15 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
601 * config accesses. So we prefer to block them. However, controlled 599 * config accesses. So we prefer to block them. However, controlled
602 * PCI config accesses initiated from EEH itself are allowed. 600 * PCI config accesses initiated from EEH itself are allowed.
603 */ 601 */
604 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
605 rc = eeh_reset_pe(pe); 602 rc = eeh_reset_pe(pe);
606 if (rc) { 603 if (rc)
607 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
608 return rc; 604 return rc;
609 }
610 605
611 pci_lock_rescan_remove(); 606 pci_lock_rescan_remove();
612 607
613 /* Restore PE */ 608 /* Restore PE */
614 eeh_ops->configure_bridge(pe); 609 eeh_ops->configure_bridge(pe);
615 eeh_pe_restore_bars(pe); 610 eeh_pe_restore_bars(pe);
616 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
617 611
618 /* Clear frozen state */ 612 /* Clear frozen state */
619 rc = eeh_clear_pe_frozen_state(pe, false); 613 rc = eeh_clear_pe_frozen_state(pe, false);
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 22b45a4955cd..10a093579191 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -1424,12 +1424,18 @@ _GLOBAL(ftrace_graph_caller)
1424 lwz r4, 44(r1) 1424 lwz r4, 44(r1)
1425 subi r4, r4, MCOUNT_INSN_SIZE 1425 subi r4, r4, MCOUNT_INSN_SIZE
1426 1426
1427 /* get the parent address */ 1427 /* Grab the LR out of the caller stack frame */
1428 addi r3, r1, 52 1428 lwz r3,52(r1)
1429 1429
1430 bl prepare_ftrace_return 1430 bl prepare_ftrace_return
1431 nop 1431 nop
1432 1432
1433 /*
1434 * prepare_ftrace_return gives us the address we divert to.
1435 * Change the LR in the callers stack frame to this.
1436 */
1437 stw r3,52(r1)
1438
1433 MCOUNT_RESTORE_FRAME 1439 MCOUNT_RESTORE_FRAME
1434 /* old link register ends up in ctr reg */ 1440 /* old link register ends up in ctr reg */
1435 bctr 1441 bctr
@@ -1457,4 +1463,4 @@ _GLOBAL(return_to_handler)
1457 blr 1463 blr
1458#endif /* CONFIG_FUNCTION_GRAPH_TRACER */ 1464#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
1459 1465
1460#endif /* CONFIG_MCOUNT */ 1466#endif /* CONFIG_FUNCTION_TRACER */
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 0905c8da90f1..194e46dcf08d 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -1227,13 +1227,20 @@ _GLOBAL(ftrace_graph_caller)
1227 ld r4, 128(r1) 1227 ld r4, 128(r1)
1228 subi r4, r4, MCOUNT_INSN_SIZE 1228 subi r4, r4, MCOUNT_INSN_SIZE
1229 1229
1230 /* get the parent address */ 1230 /* Grab the LR out of the caller stack frame */
1231 ld r11, 112(r1) 1231 ld r11, 112(r1)
1232 addi r3, r11, 16 1232 ld r3, 16(r11)
1233 1233
1234 bl prepare_ftrace_return 1234 bl prepare_ftrace_return
1235 nop 1235 nop
1236 1236
1237 /*
1238 * prepare_ftrace_return gives us the address we divert to.
1239 * Change the LR in the callers stack frame to this.
1240 */
1241 ld r11, 112(r1)
1242 std r3, 16(r11)
1243
1237 ld r0, 128(r1) 1244 ld r0, 128(r1)
1238 mtlr r0 1245 mtlr r0
1239 addi r1, r1, 112 1246 addi r1, r1, 112
@@ -1241,28 +1248,6 @@ _GLOBAL(ftrace_graph_caller)
1241 1248
1242_GLOBAL(return_to_handler) 1249_GLOBAL(return_to_handler)
1243 /* need to save return values */ 1250 /* need to save return values */
1244 std r4, -24(r1)
1245 std r3, -16(r1)
1246 std r31, -8(r1)
1247 mr r31, r1
1248 stdu r1, -112(r1)
1249
1250 bl ftrace_return_to_handler
1251 nop
1252
1253 /* return value has real return address */
1254 mtlr r3
1255
1256 ld r1, 0(r1)
1257 ld r4, -24(r1)
1258 ld r3, -16(r1)
1259 ld r31, -8(r1)
1260
1261 /* Jump back to real return address */
1262 blr
1263
1264_GLOBAL(mod_return_to_handler)
1265 /* need to save return values */
1266 std r4, -32(r1) 1251 std r4, -32(r1)
1267 std r3, -24(r1) 1252 std r3, -24(r1)
1268 /* save TOC */ 1253 /* save TOC */
@@ -1272,7 +1257,7 @@ _GLOBAL(mod_return_to_handler)
1272 stdu r1, -112(r1) 1257 stdu r1, -112(r1)
1273 1258
1274 /* 1259 /*
1275 * We are in a module using the module's TOC. 1260 * We might be called from a module.
1276 * Switch to our TOC to run inside the core kernel. 1261 * Switch to our TOC to run inside the core kernel.
1277 */ 1262 */
1278 ld r2, PACATOC(r13) 1263 ld r2, PACATOC(r13)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 72e783ea0681..db08382e19f1 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -131,6 +131,8 @@ BEGIN_FTR_SECTION
1311: 1311:
132#endif 132#endif
133 133
134 /* Return SRR1 from power7_nap() */
135 mfspr r3,SPRN_SRR1
134 beq cr1,2f 136 beq cr1,2f
135 b power7_wakeup_noloss 137 b power7_wakeup_noloss
1362: b power7_wakeup_loss 1382: b power7_wakeup_loss
@@ -292,15 +294,26 @@ decrementer_pSeries:
292 . = 0xc00 294 . = 0xc00
293 .globl system_call_pSeries 295 .globl system_call_pSeries
294system_call_pSeries: 296system_call_pSeries:
295 HMT_MEDIUM 297 /*
298 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
299 * that support it) before changing to HMT_MEDIUM. That allows the KVM
300 * code to save that value into the guest state (it is the guest's PPR
301 * value). Otherwise just change to HMT_MEDIUM as userspace has
302 * already saved the PPR.
303 */
296#ifdef CONFIG_KVM_BOOK3S_64_HANDLER 304#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
297 SET_SCRATCH0(r13) 305 SET_SCRATCH0(r13)
298 GET_PACA(r13) 306 GET_PACA(r13)
299 std r9,PACA_EXGEN+EX_R9(r13) 307 std r9,PACA_EXGEN+EX_R9(r13)
308 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
309 HMT_MEDIUM;
300 std r10,PACA_EXGEN+EX_R10(r13) 310 std r10,PACA_EXGEN+EX_R10(r13)
311 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
301 mfcr r9 312 mfcr r9
302 KVMTEST(0xc00) 313 KVMTEST(0xc00)
303 GET_SCRATCH0(r13) 314 GET_SCRATCH0(r13)
315#else
316 HMT_MEDIUM;
304#endif 317#endif
305 SYSCALL_PSERIES_1 318 SYSCALL_PSERIES_1
306 SYSCALL_PSERIES_2_RFID 319 SYSCALL_PSERIES_2_RFID
@@ -1301,23 +1314,6 @@ hmi_exception_after_realmode:
1301 EXCEPTION_PROLOG_0(PACA_EXGEN) 1314 EXCEPTION_PROLOG_0(PACA_EXGEN)
1302 b hmi_exception_hv 1315 b hmi_exception_hv
1303 1316
1304#ifdef CONFIG_PPC_POWERNV
1305_GLOBAL(opal_mc_secondary_handler)
1306 HMT_MEDIUM_PPR_DISCARD
1307 SET_SCRATCH0(r13)
1308 GET_PACA(r13)
1309 clrldi r3,r3,2
1310 tovirt(r3,r3)
1311 std r3,PACA_OPAL_MC_EVT(r13)
1312 ld r13,OPAL_MC_SRR0(r3)
1313 mtspr SPRN_SRR0,r13
1314 ld r13,OPAL_MC_SRR1(r3)
1315 mtspr SPRN_SRR1,r13
1316 ld r3,OPAL_MC_GPR3(r3)
1317 GET_SCRATCH0(r13)
1318 b machine_check_pSeries
1319#endif /* CONFIG_PPC_POWERNV */
1320
1321 1317
1322#define MACHINE_CHECK_HANDLER_WINDUP \ 1318#define MACHINE_CHECK_HANDLER_WINDUP \
1323 /* Clear MSR_RI before setting SRR0 and SRR1. */\ 1319 /* Clear MSR_RI before setting SRR0 and SRR1. */\
@@ -1571,9 +1567,11 @@ do_hash_page:
1571 * r3 contains the faulting address 1567 * r3 contains the faulting address
1572 * r4 contains the required access permissions 1568 * r4 contains the required access permissions
1573 * r5 contains the trap number 1569 * r5 contains the trap number
1570 * r6 contains dsisr
1574 * 1571 *
1575 * at return r3 = 0 for success, 1 for page fault, negative for error 1572 * at return r3 = 0 for success, 1 for page fault, negative for error
1576 */ 1573 */
1574 ld r6,_DSISR(r1)
1577 bl hash_page /* build HPTE if possible */ 1575 bl hash_page /* build HPTE if possible */
1578 cmpdi r3,0 /* see if hash_page succeeded */ 1576 cmpdi r3,0 /* see if hash_page succeeded */
1579 1577
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index e66af6d265e8..44d4d8eb3c85 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -510,79 +510,36 @@ int ftrace_disable_ftrace_graph_caller(void)
510} 510}
511#endif /* CONFIG_DYNAMIC_FTRACE */ 511#endif /* CONFIG_DYNAMIC_FTRACE */
512 512
513#ifdef CONFIG_PPC64
514extern void mod_return_to_handler(void);
515#endif
516
517/* 513/*
518 * Hook the return address and push it in the stack of return addrs 514 * Hook the return address and push it in the stack of return addrs
519 * in current thread info. 515 * in current thread info. Return the address we want to divert to.
520 */ 516 */
521void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) 517unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip)
522{ 518{
523 unsigned long old;
524 int faulted;
525 struct ftrace_graph_ent trace; 519 struct ftrace_graph_ent trace;
526 unsigned long return_hooker = (unsigned long)&return_to_handler; 520 unsigned long return_hooker;
527 521
528 if (unlikely(ftrace_graph_is_dead())) 522 if (unlikely(ftrace_graph_is_dead()))
529 return; 523 goto out;
530 524
531 if (unlikely(atomic_read(&current->tracing_graph_pause))) 525 if (unlikely(atomic_read(&current->tracing_graph_pause)))
532 return; 526 goto out;
533
534#ifdef CONFIG_PPC64
535 /* non core kernel code needs to save and restore the TOC */
536 if (REGION_ID(self_addr) != KERNEL_REGION_ID)
537 return_hooker = (unsigned long)&mod_return_to_handler;
538#endif
539
540 return_hooker = ppc_function_entry((void *)return_hooker);
541 527
542 /* 528 return_hooker = ppc_function_entry(return_to_handler);
543 * Protect against fault, even if it shouldn't
544 * happen. This tool is too much intrusive to
545 * ignore such a protection.
546 */
547 asm volatile(
548 "1: " PPC_LL "%[old], 0(%[parent])\n"
549 "2: " PPC_STL "%[return_hooker], 0(%[parent])\n"
550 " li %[faulted], 0\n"
551 "3:\n"
552
553 ".section .fixup, \"ax\"\n"
554 "4: li %[faulted], 1\n"
555 " b 3b\n"
556 ".previous\n"
557
558 ".section __ex_table,\"a\"\n"
559 PPC_LONG_ALIGN "\n"
560 PPC_LONG "1b,4b\n"
561 PPC_LONG "2b,4b\n"
562 ".previous"
563
564 : [old] "=&r" (old), [faulted] "=r" (faulted)
565 : [parent] "r" (parent), [return_hooker] "r" (return_hooker)
566 : "memory"
567 );
568
569 if (unlikely(faulted)) {
570 ftrace_graph_stop();
571 WARN_ON(1);
572 return;
573 }
574 529
575 trace.func = self_addr; 530 trace.func = ip;
576 trace.depth = current->curr_ret_stack + 1; 531 trace.depth = current->curr_ret_stack + 1;
577 532
578 /* Only trace if the calling function expects to */ 533 /* Only trace if the calling function expects to */
579 if (!ftrace_graph_entry(&trace)) { 534 if (!ftrace_graph_entry(&trace))
580 *parent = old; 535 goto out;
581 return; 536
582 } 537 if (ftrace_push_return_trace(parent, ip, &trace.depth, 0) == -EBUSY)
538 goto out;
583 539
584 if (ftrace_push_return_trace(old, self_addr, &trace.depth, 0) == -EBUSY) 540 parent = return_hooker;
585 *parent = old; 541out:
542 return parent;
586} 543}
587#endif /* CONFIG_FUNCTION_GRAPH_TRACER */ 544#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
588 545
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index fafff8dbd5d9..d99aac0d69f1 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -33,13 +33,31 @@
33 33
34/* Macro to make the code more readable. */ 34/* Macro to make the code more readable. */
35#ifdef CONFIG_8xx_CPU6 35#ifdef CONFIG_8xx_CPU6
36#define DO_8xx_CPU6(val, reg) \ 36#define SPRN_MI_TWC_ADDR 0x2b80
37 li reg, val; \ 37#define SPRN_MI_RPN_ADDR 0x2d80
38 stw reg, 12(r0); \ 38#define SPRN_MD_TWC_ADDR 0x3b80
39 lwz reg, 12(r0); 39#define SPRN_MD_RPN_ADDR 0x3d80
40
41#define MTSPR_CPU6(spr, reg, treg) \
42 li treg, spr##_ADDR; \
43 stw treg, 12(r0); \
44 lwz treg, 12(r0); \
45 mtspr spr, reg
40#else 46#else
41#define DO_8xx_CPU6(val, reg) 47#define MTSPR_CPU6(spr, reg, treg) \
48 mtspr spr, reg
42#endif 49#endif
50
51/*
52 * Value for the bits that have fixed value in RPN entries.
53 * Also used for tagging DAR for DTLBerror.
54 */
55#ifdef CONFIG_PPC_16K_PAGES
56#define RPN_PATTERN (0x00f0 | MD_SPS16K)
57#else
58#define RPN_PATTERN 0x00f0
59#endif
60
43 __HEAD 61 __HEAD
44_ENTRY(_stext); 62_ENTRY(_stext);
45_ENTRY(_start); 63_ENTRY(_start);
@@ -65,13 +83,6 @@ _ENTRY(_start);
65 * 8M 1:1. I also mapped an additional I/O space 1:1 so we can get to 83 * 8M 1:1. I also mapped an additional I/O space 1:1 so we can get to
66 * the "internal" processor registers before MMU_init is called. 84 * the "internal" processor registers before MMU_init is called.
67 * 85 *
68 * The TLB code currently contains a major hack. Since I use the condition
69 * code register, I have to save and restore it. I am out of registers, so
70 * I just store it in memory location 0 (the TLB handlers are not reentrant).
71 * To avoid making any decisions, I need to use the "segment" valid bit
72 * in the first level table, but that would require many changes to the
73 * Linux page directory/table functions that I don't want to do right now.
74 *
75 * -- Dan 86 * -- Dan
76 */ 87 */
77 .globl __start 88 .globl __start
@@ -211,7 +222,7 @@ MachineCheck:
211 EXCEPTION_PROLOG 222 EXCEPTION_PROLOG
212 mfspr r4,SPRN_DAR 223 mfspr r4,SPRN_DAR
213 stw r4,_DAR(r11) 224 stw r4,_DAR(r11)
214 li r5,0x00f0 225 li r5,RPN_PATTERN
215 mtspr SPRN_DAR,r5 /* Tag DAR, to be used in DTLB Error */ 226 mtspr SPRN_DAR,r5 /* Tag DAR, to be used in DTLB Error */
216 mfspr r5,SPRN_DSISR 227 mfspr r5,SPRN_DSISR
217 stw r5,_DSISR(r11) 228 stw r5,_DSISR(r11)
@@ -219,30 +230,16 @@ MachineCheck:
219 EXC_XFER_STD(0x200, machine_check_exception) 230 EXC_XFER_STD(0x200, machine_check_exception)
220 231
221/* Data access exception. 232/* Data access exception.
222 * This is "never generated" by the MPC8xx. We jump to it for other 233 * This is "never generated" by the MPC8xx.
223 * translation errors.
224 */ 234 */
225 . = 0x300 235 . = 0x300
226DataAccess: 236DataAccess:
227 EXCEPTION_PROLOG
228 mfspr r10,SPRN_DSISR
229 stw r10,_DSISR(r11)
230 mr r5,r10
231 mfspr r4,SPRN_DAR
232 li r10,0x00f0
233 mtspr SPRN_DAR,r10 /* Tag DAR, to be used in DTLB Error */
234 EXC_XFER_LITE(0x300, handle_page_fault)
235 237
236/* Instruction access exception. 238/* Instruction access exception.
237 * This is "never generated" by the MPC8xx. We jump to it for other 239 * This is "never generated" by the MPC8xx.
238 * translation errors.
239 */ 240 */
240 . = 0x400 241 . = 0x400
241InstructionAccess: 242InstructionAccess:
242 EXCEPTION_PROLOG
243 mr r4,r12
244 mr r5,r9
245 EXC_XFER_LITE(0x400, handle_page_fault)
246 243
247/* External interrupt */ 244/* External interrupt */
248 EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE) 245 EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
@@ -253,7 +250,7 @@ Alignment:
253 EXCEPTION_PROLOG 250 EXCEPTION_PROLOG
254 mfspr r4,SPRN_DAR 251 mfspr r4,SPRN_DAR
255 stw r4,_DAR(r11) 252 stw r4,_DAR(r11)
256 li r5,0x00f0 253 li r5,RPN_PATTERN
257 mtspr SPRN_DAR,r5 /* Tag DAR, to be used in DTLB Error */ 254 mtspr SPRN_DAR,r5 /* Tag DAR, to be used in DTLB Error */
258 mfspr r5,SPRN_DSISR 255 mfspr r5,SPRN_DSISR
259 stw r5,_DSISR(r11) 256 stw r5,_DSISR(r11)
@@ -292,8 +289,8 @@ SystemCall:
292 . = 0x1100 289 . = 0x1100
293/* 290/*
294 * For the MPC8xx, this is a software tablewalk to load the instruction 291 * For the MPC8xx, this is a software tablewalk to load the instruction
295 * TLB. It is modelled after the example in the Motorola manual. The task 292 * TLB. The task switch loads the M_TW register with the pointer to the first
296 * switch loads the M_TWB register with the pointer to the first level table. 293 * level table.
297 * If we discover there is no second level table (value is zero) or if there 294 * If we discover there is no second level table (value is zero) or if there
298 * is an invalid pte, we load that into the TLB, which causes another fault 295 * is an invalid pte, we load that into the TLB, which causes another fault
299 * into the TLB Error interrupt where we can handle such problems. 296 * into the TLB Error interrupt where we can handle such problems.
@@ -302,20 +299,17 @@ SystemCall:
302 */ 299 */
303InstructionTLBMiss: 300InstructionTLBMiss:
304#ifdef CONFIG_8xx_CPU6 301#ifdef CONFIG_8xx_CPU6
305 stw r3, 8(r0) 302 mtspr SPRN_DAR, r3
306#endif 303#endif
307 EXCEPTION_PROLOG_0 304 EXCEPTION_PROLOG_0
308 mtspr SPRN_SPRG_SCRATCH2, r10 305 mtspr SPRN_SPRG_SCRATCH2, r10
309 mfspr r10, SPRN_SRR0 /* Get effective address of fault */ 306 mfspr r10, SPRN_SRR0 /* Get effective address of fault */
310#ifdef CONFIG_8xx_CPU15 307#ifdef CONFIG_8xx_CPU15
311 addi r11, r10, 0x1000 308 addi r11, r10, PAGE_SIZE
312 tlbie r11 309 tlbie r11
313 addi r11, r10, -0x1000 310 addi r11, r10, -PAGE_SIZE
314 tlbie r11 311 tlbie r11
315#endif 312#endif
316 DO_8xx_CPU6(0x3780, r3)
317 mtspr SPRN_MD_EPN, r10 /* Have to use MD_EPN for walk, MI_EPN can't */
318 mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */
319 313
320 /* If we are faulting a kernel address, we have to use the 314 /* If we are faulting a kernel address, we have to use the
321 * kernel page tables. 315 * kernel page tables.
@@ -323,32 +317,37 @@ InstructionTLBMiss:
323#ifdef CONFIG_MODULES 317#ifdef CONFIG_MODULES
324 /* Only modules will cause ITLB Misses as we always 318 /* Only modules will cause ITLB Misses as we always
325 * pin the first 8MB of kernel memory */ 319 * pin the first 8MB of kernel memory */
326 andi. r11, r10, 0x0800 /* Address >= 0x80000000 */ 320 andis. r11, r10, 0x8000 /* Address >= 0x80000000 */
321#endif
322 mfspr r11, SPRN_M_TW /* Get level 1 table base address */
323#ifdef CONFIG_MODULES
327 beq 3f 324 beq 3f
328 lis r11, swapper_pg_dir@h 325 lis r11, (swapper_pg_dir-PAGE_OFFSET)@h
329 ori r11, r11, swapper_pg_dir@l 326 ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
330 rlwimi r10, r11, 0, 2, 19
3313: 3273:
332#endif 328#endif
333 lwz r11, 0(r10) /* Get the level 1 entry */ 329 /* Extract level 1 index */
330 rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
331 lwzx r11, r10, r11 /* Get the level 1 entry */
334 rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ 332 rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
335 beq 2f /* If zero, don't try to find a pte */ 333 beq 2f /* If zero, don't try to find a pte */
336 334
337 /* We have a pte table, so load the MI_TWC with the attributes 335 /* We have a pte table, so load the MI_TWC with the attributes
338 * for this "segment." 336 * for this "segment."
339 */ 337 */
340 ori r11,r11,1 /* Set valid bit */ 338 MTSPR_CPU6(SPRN_MI_TWC, r11, r3) /* Set segment attributes */
341 DO_8xx_CPU6(0x2b80, r3) 339 mfspr r11, SPRN_SRR0 /* Get effective address of fault */
342 mtspr SPRN_MI_TWC, r11 /* Set segment attributes */ 340 /* Extract level 2 index */
343 DO_8xx_CPU6(0x3b80, r3) 341 rlwinm r11, r11, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
344 mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ 342 lwzx r10, r10, r11 /* Get the pte */
345 mfspr r11, SPRN_MD_TWC /* ....and get the pte address */
346 lwz r10, 0(r11) /* Get the pte */
347 343
348#ifdef CONFIG_SWAP 344#ifdef CONFIG_SWAP
349 andi. r11, r10, _PAGE_ACCESSED | _PAGE_PRESENT 345 andi. r11, r10, _PAGE_ACCESSED | _PAGE_PRESENT
350 cmpwi cr0, r11, _PAGE_ACCESSED | _PAGE_PRESENT 346 cmpwi cr0, r11, _PAGE_ACCESSED | _PAGE_PRESENT
347 li r11, RPN_PATTERN
351 bne- cr0, 2f 348 bne- cr0, 2f
349#else
350 li r11, RPN_PATTERN
352#endif 351#endif
353 /* The Linux PTE won't go exactly into the MMU TLB. 352 /* The Linux PTE won't go exactly into the MMU TLB.
354 * Software indicator bits 21 and 28 must be clear. 353 * Software indicator bits 21 and 28 must be clear.
@@ -356,62 +355,63 @@ InstructionTLBMiss:
356 * set. All other Linux PTE bits control the behavior 355 * set. All other Linux PTE bits control the behavior
357 * of the MMU. 356 * of the MMU.
358 */ 357 */
359 li r11, 0x00f0
360 rlwimi r10, r11, 0, 0x07f8 /* Set 24-27, clear 21-23,28 */ 358 rlwimi r10, r11, 0, 0x07f8 /* Set 24-27, clear 21-23,28 */
361 DO_8xx_CPU6(0x2d80, r3) 359 MTSPR_CPU6(SPRN_MI_RPN, r10, r3) /* Update TLB entry */
362 mtspr SPRN_MI_RPN, r10 /* Update TLB entry */
363 360
364 /* Restore registers */ 361 /* Restore registers */
365#ifdef CONFIG_8xx_CPU6 362#ifdef CONFIG_8xx_CPU6
366 lwz r3, 8(r0) 363 mfspr r3, SPRN_DAR
364 mtspr SPRN_DAR, r11 /* Tag DAR */
367#endif 365#endif
368 mfspr r10, SPRN_SPRG_SCRATCH2 366 mfspr r10, SPRN_SPRG_SCRATCH2
369 EXCEPTION_EPILOG_0 367 EXCEPTION_EPILOG_0
370 rfi 368 rfi
3712: 3692:
372 mfspr r11, SPRN_SRR1 370 mfspr r10, SPRN_SRR1
373 /* clear all error bits as TLB Miss 371 /* clear all error bits as TLB Miss
374 * sets a few unconditionally 372 * sets a few unconditionally
375 */ 373 */
376 rlwinm r11, r11, 0, 0xffff 374 rlwinm r10, r10, 0, 0xffff
377 mtspr SPRN_SRR1, r11 375 mtspr SPRN_SRR1, r10
378 376
379 /* Restore registers */ 377 /* Restore registers */
380#ifdef CONFIG_8xx_CPU6 378#ifdef CONFIG_8xx_CPU6
381 lwz r3, 8(r0) 379 mfspr r3, SPRN_DAR
380 mtspr SPRN_DAR, r11 /* Tag DAR */
382#endif 381#endif
383 mfspr r10, SPRN_SPRG_SCRATCH2 382 mfspr r10, SPRN_SPRG_SCRATCH2
384 EXCEPTION_EPILOG_0 383 b InstructionTLBError1
385 b InstructionAccess
386 384
387 . = 0x1200 385 . = 0x1200
388DataStoreTLBMiss: 386DataStoreTLBMiss:
389#ifdef CONFIG_8xx_CPU6 387#ifdef CONFIG_8xx_CPU6
390 stw r3, 8(r0) 388 mtspr SPRN_DAR, r3
391#endif 389#endif
392 EXCEPTION_PROLOG_0 390 EXCEPTION_PROLOG_0
393 mtspr SPRN_SPRG_SCRATCH2, r10 391 mtspr SPRN_SPRG_SCRATCH2, r10
394 mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */ 392 mfspr r10, SPRN_MD_EPN
395 393
396 /* If we are faulting a kernel address, we have to use the 394 /* If we are faulting a kernel address, we have to use the
397 * kernel page tables. 395 * kernel page tables.
398 */ 396 */
399 andi. r11, r10, 0x0800 397 andis. r11, r10, 0x8000
398 mfspr r11, SPRN_M_TW /* Get level 1 table base address */
400 beq 3f 399 beq 3f
401 lis r11, swapper_pg_dir@h 400 lis r11, (swapper_pg_dir-PAGE_OFFSET)@h
402 ori r11, r11, swapper_pg_dir@l 401 ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
403 rlwimi r10, r11, 0, 2, 19
4043: 4023:
405 lwz r11, 0(r10) /* Get the level 1 entry */ 403 /* Extract level 1 index */
404 rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
405 lwzx r11, r10, r11 /* Get the level 1 entry */
406 rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ 406 rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
407 beq 2f /* If zero, don't try to find a pte */ 407 beq 2f /* If zero, don't try to find a pte */
408 408
409 /* We have a pte table, so load fetch the pte from the table. 409 /* We have a pte table, so load fetch the pte from the table.
410 */ 410 */
411 ori r11, r11, 1 /* Set valid bit in physical L2 page */ 411 mfspr r10, SPRN_MD_EPN /* Get address of fault */
412 DO_8xx_CPU6(0x3b80, r3) 412 /* Extract level 2 index */
413 mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ 413 rlwinm r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
414 mfspr r10, SPRN_MD_TWC /* ....and get the pte address */ 414 rlwimi r10, r11, 0, 0, 32 - PAGE_SHIFT - 1 /* Add level 2 base */
415 lwz r10, 0(r10) /* Get the pte */ 415 lwz r10, 0(r10) /* Get the pte */
416 416
417 /* Insert the Guarded flag into the TWC from the Linux PTE. 417 /* Insert the Guarded flag into the TWC from the Linux PTE.
@@ -425,8 +425,7 @@ DataStoreTLBMiss:
425 * It is bit 25 in the Linux PTE and bit 30 in the TWC 425 * It is bit 25 in the Linux PTE and bit 30 in the TWC
426 */ 426 */
427 rlwimi r11, r10, 32-5, 30, 30 427 rlwimi r11, r10, 32-5, 30, 30
428 DO_8xx_CPU6(0x3b80, r3) 428 MTSPR_CPU6(SPRN_MD_TWC, r11, r3)
429 mtspr SPRN_MD_TWC, r11
430 429
431 /* Both _PAGE_ACCESSED and _PAGE_PRESENT has to be set. 430 /* Both _PAGE_ACCESSED and _PAGE_PRESENT has to be set.
432 * We also need to know if the insn is a load/store, so: 431 * We also need to know if the insn is a load/store, so:
@@ -442,14 +441,8 @@ DataStoreTLBMiss:
442 and r11, r11, r10 441 and r11, r11, r10
443 rlwimi r10, r11, 0, _PAGE_PRESENT 442 rlwimi r10, r11, 0, _PAGE_PRESENT
444#endif 443#endif
445 /* Honour kernel RO, User NA */ 444 /* invert RW */
446 /* 0x200 == Extended encoding, bit 22 */ 445 xori r10, r10, _PAGE_RW
447 rlwimi r10, r10, 32-2, 0x200 /* Copy USER to bit 22, 0x200 */
448 /* r11 = (r10 & _PAGE_RW) >> 1 */
449 rlwinm r11, r10, 32-1, 0x200
450 or r10, r11, r10
451 /* invert RW and 0x200 bits */
452 xori r10, r10, _PAGE_RW | 0x200
453 446
454 /* The Linux PTE won't go exactly into the MMU TLB. 447 /* The Linux PTE won't go exactly into the MMU TLB.
455 * Software indicator bits 22 and 28 must be clear. 448 * Software indicator bits 22 and 28 must be clear.
@@ -457,14 +450,13 @@ DataStoreTLBMiss:
457 * set. All other Linux PTE bits control the behavior 450 * set. All other Linux PTE bits control the behavior
458 * of the MMU. 451 * of the MMU.
459 */ 452 */
4602: li r11, 0x00f0 4532: li r11, RPN_PATTERN
461 rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */ 454 rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */
462 DO_8xx_CPU6(0x3d80, r3) 455 MTSPR_CPU6(SPRN_MD_RPN, r10, r3) /* Update TLB entry */
463 mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
464 456
465 /* Restore registers */ 457 /* Restore registers */
466#ifdef CONFIG_8xx_CPU6 458#ifdef CONFIG_8xx_CPU6
467 lwz r3, 8(r0) 459 mfspr r3, SPRN_DAR
468#endif 460#endif
469 mtspr SPRN_DAR, r11 /* Tag DAR */ 461 mtspr SPRN_DAR, r11 /* Tag DAR */
470 mfspr r10, SPRN_SPRG_SCRATCH2 462 mfspr r10, SPRN_SPRG_SCRATCH2
@@ -477,7 +469,17 @@ DataStoreTLBMiss:
477 */ 469 */
478 . = 0x1300 470 . = 0x1300
479InstructionTLBError: 471InstructionTLBError:
480 b InstructionAccess 472 EXCEPTION_PROLOG_0
473InstructionTLBError1:
474 EXCEPTION_PROLOG_1
475 EXCEPTION_PROLOG_2
476 mr r4,r12
477 mr r5,r9
478 andis. r10,r5,0x4000
479 beq+ 1f
480 tlbie r4
481 /* 0x400 is InstructionAccess exception, needed by bad_page_fault() */
4821: EXC_XFER_LITE(0x400, handle_page_fault)
481 483
482/* This is the data TLB error on the MPC8xx. This could be due to 484/* This is the data TLB error on the MPC8xx. This could be due to
483 * many reasons, including a dirty update to a pte. We bail out to 485 * many reasons, including a dirty update to a pte. We bail out to
@@ -488,11 +490,21 @@ DataTLBError:
488 EXCEPTION_PROLOG_0 490 EXCEPTION_PROLOG_0
489 491
490 mfspr r11, SPRN_DAR 492 mfspr r11, SPRN_DAR
491 cmpwi cr0, r11, 0x00f0 493 cmpwi cr0, r11, RPN_PATTERN
492 beq- FixupDAR /* must be a buggy dcbX, icbi insn. */ 494 beq- FixupDAR /* must be a buggy dcbX, icbi insn. */
493DARFixed:/* Return from dcbx instruction bug workaround */ 495DARFixed:/* Return from dcbx instruction bug workaround */
494 EXCEPTION_EPILOG_0 496 EXCEPTION_PROLOG_1
495 b DataAccess 497 EXCEPTION_PROLOG_2
498 mfspr r5,SPRN_DSISR
499 stw r5,_DSISR(r11)
500 mfspr r4,SPRN_DAR
501 andis. r10,r5,0x4000
502 beq+ 1f
503 tlbie r4
5041: li r10,RPN_PATTERN
505 mtspr SPRN_DAR,r10 /* Tag DAR, to be used in DTLB Error */
506 /* 0x300 is DataAccess exception, needed by bad_page_fault() */
507 EXC_XFER_LITE(0x300, handle_page_fault)
496 508
497 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) 509 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
498 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE) 510 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
@@ -521,29 +533,30 @@ DARFixed:/* Return from dcbx instruction bug workaround */
521#define NO_SELF_MODIFYING_CODE 533#define NO_SELF_MODIFYING_CODE
522FixupDAR:/* Entry point for dcbx workaround. */ 534FixupDAR:/* Entry point for dcbx workaround. */
523#ifdef CONFIG_8xx_CPU6 535#ifdef CONFIG_8xx_CPU6
524 stw r3, 8(r0) 536 mtspr SPRN_DAR, r3
525#endif 537#endif
526 mtspr SPRN_SPRG_SCRATCH2, r10 538 mtspr SPRN_SPRG_SCRATCH2, r10
527 /* fetch instruction from memory. */ 539 /* fetch instruction from memory. */
528 mfspr r10, SPRN_SRR0 540 mfspr r10, SPRN_SRR0
529 andis. r11, r10, 0x8000 /* Address >= 0x80000000 */ 541 andis. r11, r10, 0x8000 /* Address >= 0x80000000 */
530 DO_8xx_CPU6(0x3780, r3) 542 mfspr r11, SPRN_M_TW /* Get level 1 table base address */
531 mtspr SPRN_MD_EPN, r10
532 mfspr r11, SPRN_M_TWB /* Get level 1 table entry address */
533 beq- 3f /* Branch if user space */ 543 beq- 3f /* Branch if user space */
534 lis r11, (swapper_pg_dir-PAGE_OFFSET)@h 544 lis r11, (swapper_pg_dir-PAGE_OFFSET)@h
535 ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l 545 ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l
536 rlwimi r11, r10, 32-20, 0xffc /* r11 = r11&~0xffc|(r10>>20)&0xffc */ 546 /* Extract level 1 index */
5373: lwz r11, 0(r11) /* Get the level 1 entry */ 5473: rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 29
538 DO_8xx_CPU6(0x3b80, r3) 548 lwzx r11, r10, r11 /* Get the level 1 entry */
539 mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ 549 rlwinm r10, r11,0,0,19 /* Extract page descriptor page address */
540 mfspr r11, SPRN_MD_TWC /* ....and get the pte address */ 550 mfspr r11, SPRN_SRR0 /* Get effective address of fault */
541 lwz r11, 0(r11) /* Get the pte */ 551 /* Extract level 2 index */
552 rlwinm r11, r11, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
553 lwzx r11, r10, r11 /* Get the pte */
542#ifdef CONFIG_8xx_CPU6 554#ifdef CONFIG_8xx_CPU6
543 lwz r3, 8(r0) /* restore r3 from memory */ 555 mfspr r3, SPRN_DAR
544#endif 556#endif
545 /* concat physical page address(r11) and page offset(r10) */ 557 /* concat physical page address(r11) and page offset(r10) */
546 rlwimi r11, r10, 0, 20, 31 558 mfspr r10, SPRN_SRR0
559 rlwimi r11, r10, 0, 32 - PAGE_SHIFT, 31
547 lwz r11,0(r11) 560 lwz r11,0(r11)
548/* Check if it really is a dcbx instruction. */ 561/* Check if it really is a dcbx instruction. */
549/* dcbt and dcbtst does not generate DTLB Misses/Errors, 562/* dcbt and dcbtst does not generate DTLB Misses/Errors,
@@ -698,11 +711,11 @@ start_here:
698#ifdef CONFIG_8xx_CPU6 711#ifdef CONFIG_8xx_CPU6
699 lis r4, cpu6_errata_word@h 712 lis r4, cpu6_errata_word@h
700 ori r4, r4, cpu6_errata_word@l 713 ori r4, r4, cpu6_errata_word@l
701 li r3, 0x3980 714 li r3, 0x3f80
702 stw r3, 12(r4) 715 stw r3, 12(r4)
703 lwz r3, 12(r4) 716 lwz r3, 12(r4)
704#endif 717#endif
705 mtspr SPRN_M_TWB, r6 718 mtspr SPRN_M_TW, r6
706 lis r4,2f@h 719 lis r4,2f@h
707 ori r4,r4,2f@l 720 ori r4,r4,2f@l
708 tophys(r4,r4) 721 tophys(r4,r4)
@@ -876,10 +889,10 @@ _GLOBAL(set_context)
876 lis r6, cpu6_errata_word@h 889 lis r6, cpu6_errata_word@h
877 ori r6, r6, cpu6_errata_word@l 890 ori r6, r6, cpu6_errata_word@l
878 tophys (r4, r4) 891 tophys (r4, r4)
879 li r7, 0x3980 892 li r7, 0x3f80
880 stw r7, 12(r6) 893 stw r7, 12(r6)
881 lwz r7, 12(r6) 894 lwz r7, 12(r6)
882 mtspr SPRN_M_TWB, r4 /* Update MMU base address */ 895 mtspr SPRN_M_TW, r4 /* Update MMU base address */
883 li r7, 0x3380 896 li r7, 0x3380
884 stw r7, 12(r6) 897 stw r7, 12(r6)
885 lwz r7, 12(r6) 898 lwz r7, 12(r6)
@@ -887,7 +900,7 @@ _GLOBAL(set_context)
887#else 900#else
888 mtspr SPRN_M_CASID,r3 /* Update context */ 901 mtspr SPRN_M_CASID,r3 /* Update context */
889 tophys (r4, r4) 902 tophys (r4, r4)
890 mtspr SPRN_M_TWB, r4 /* and pgd */ 903 mtspr SPRN_M_TW, r4 /* and pgd */
891#endif 904#endif
892 SYNC 905 SYNC
893 blr 906 blr
@@ -919,12 +932,13 @@ set_dec_cpu6:
919 .globl sdata 932 .globl sdata
920sdata: 933sdata:
921 .globl empty_zero_page 934 .globl empty_zero_page
935 .align PAGE_SHIFT
922empty_zero_page: 936empty_zero_page:
923 .space 4096 937 .space PAGE_SIZE
924 938
925 .globl swapper_pg_dir 939 .globl swapper_pg_dir
926swapper_pg_dir: 940swapper_pg_dir:
927 .space 4096 941 .space PGD_TABLE_SIZE
928 942
929/* Room for two PTE table poiners, usually the kernel and current user 943/* Room for two PTE table poiners, usually the kernel and current user
930 * pointer to their respective root page table (pgdir). 944 * pointer to their respective root page table (pgdir).
diff --git a/arch/powerpc/kernel/hw_breakpoint.c b/arch/powerpc/kernel/hw_breakpoint.c
index 1f7d84e2e8b2..05e804cdecaa 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -63,7 +63,7 @@ int hw_breakpoint_slots(int type)
63int arch_install_hw_breakpoint(struct perf_event *bp) 63int arch_install_hw_breakpoint(struct perf_event *bp)
64{ 64{
65 struct arch_hw_breakpoint *info = counter_arch_bp(bp); 65 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
66 struct perf_event **slot = &__get_cpu_var(bp_per_reg); 66 struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
67 67
68 *slot = bp; 68 *slot = bp;
69 69
@@ -88,7 +88,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
88 */ 88 */
89void arch_uninstall_hw_breakpoint(struct perf_event *bp) 89void arch_uninstall_hw_breakpoint(struct perf_event *bp)
90{ 90{
91 struct perf_event **slot = &__get_cpu_var(bp_per_reg); 91 struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
92 92
93 if (*slot != bp) { 93 if (*slot != bp) {
94 WARN_ONCE(1, "Can't find the breakpoint"); 94 WARN_ONCE(1, "Can't find the breakpoint");
@@ -226,7 +226,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
226 */ 226 */
227 rcu_read_lock(); 227 rcu_read_lock();
228 228
229 bp = __get_cpu_var(bp_per_reg); 229 bp = __this_cpu_read(bp_per_reg);
230 if (!bp) 230 if (!bp)
231 goto out; 231 goto out;
232 info = counter_arch_bp(bp); 232 info = counter_arch_bp(bp);
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index c0754bbf8118..18c0687e5ab3 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -212,6 +212,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
212 mtspr SPRN_SRR0,r5 212 mtspr SPRN_SRR0,r5
213 rfid 213 rfid
214 214
215/*
216 * R3 here contains the value that will be returned to the caller
217 * of power7_nap.
218 */
215_GLOBAL(power7_wakeup_loss) 219_GLOBAL(power7_wakeup_loss)
216 ld r1,PACAR1(r13) 220 ld r1,PACAR1(r13)
217BEGIN_FTR_SECTION 221BEGIN_FTR_SECTION
@@ -219,15 +223,19 @@ BEGIN_FTR_SECTION
219END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 223END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
220 REST_NVGPRS(r1) 224 REST_NVGPRS(r1)
221 REST_GPR(2, r1) 225 REST_GPR(2, r1)
222 ld r3,_CCR(r1) 226 ld r6,_CCR(r1)
223 ld r4,_MSR(r1) 227 ld r4,_MSR(r1)
224 ld r5,_NIP(r1) 228 ld r5,_NIP(r1)
225 addi r1,r1,INT_FRAME_SIZE 229 addi r1,r1,INT_FRAME_SIZE
226 mtcr r3 230 mtcr r6
227 mtspr SPRN_SRR1,r4 231 mtspr SPRN_SRR1,r4
228 mtspr SPRN_SRR0,r5 232 mtspr SPRN_SRR0,r5
229 rfid 233 rfid
230 234
235/*
236 * R3 here contains the value that will be returned to the caller
237 * of power7_nap.
238 */
231_GLOBAL(power7_wakeup_noloss) 239_GLOBAL(power7_wakeup_noloss)
232 lbz r0,PACA_NAPSTATELOST(r13) 240 lbz r0,PACA_NAPSTATELOST(r13)
233 cmpwi r0,0 241 cmpwi r0,0
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index a83cf5ef6488..5d3968c4d799 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -208,7 +208,7 @@ static unsigned long iommu_range_alloc(struct device *dev,
208 * We don't need to disable preemption here because any CPU can 208 * We don't need to disable preemption here because any CPU can
209 * safely use any IOMMU pool. 209 * safely use any IOMMU pool.
210 */ 210 */
211 pool_nr = __raw_get_cpu_var(iommu_pool_hash) & (tbl->nr_pools - 1); 211 pool_nr = __this_cpu_read(iommu_pool_hash) & (tbl->nr_pools - 1);
212 212
213 if (largealloc) 213 if (largealloc)
214 pool = &(tbl->large_pool); 214 pool = &(tbl->large_pool);
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index c14383575fe8..45096033d37b 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -50,7 +50,6 @@
50#include <linux/list.h> 50#include <linux/list.h>
51#include <linux/radix-tree.h> 51#include <linux/radix-tree.h>
52#include <linux/mutex.h> 52#include <linux/mutex.h>
53#include <linux/bootmem.h>
54#include <linux/pci.h> 53#include <linux/pci.h>
55#include <linux/debugfs.h> 54#include <linux/debugfs.h>
56#include <linux/of.h> 55#include <linux/of.h>
@@ -114,7 +113,7 @@ static inline notrace void set_soft_enabled(unsigned long enable)
114static inline notrace int decrementer_check_overflow(void) 113static inline notrace int decrementer_check_overflow(void)
115{ 114{
116 u64 now = get_tb_or_rtc(); 115 u64 now = get_tb_or_rtc();
117 u64 *next_tb = &__get_cpu_var(decrementers_next_tb); 116 u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
118 117
119 return now >= *next_tb; 118 return now >= *next_tb;
120} 119}
@@ -499,7 +498,7 @@ void __do_irq(struct pt_regs *regs)
499 498
500 /* And finally process it */ 499 /* And finally process it */
501 if (unlikely(irq == NO_IRQ)) 500 if (unlikely(irq == NO_IRQ))
502 __get_cpu_var(irq_stat).spurious_irqs++; 501 __this_cpu_inc(irq_stat.spurious_irqs);
503 else 502 else
504 generic_handle_irq(irq); 503 generic_handle_irq(irq);
505 504
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index 8504657379f1..e77c3ccf8dcf 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -155,7 +155,7 @@ static int kgdb_singlestep(struct pt_regs *regs)
155{ 155{
156 struct thread_info *thread_info, *exception_thread_info; 156 struct thread_info *thread_info, *exception_thread_info;
157 struct thread_info *backup_current_thread_info = 157 struct thread_info *backup_current_thread_info =
158 &__get_cpu_var(kgdb_thread_info); 158 this_cpu_ptr(&kgdb_thread_info);
159 159
160 if (user_mode(regs)) 160 if (user_mode(regs))
161 return 0; 161 return 0;
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index 2f72af82513c..7c053f281406 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -119,7 +119,7 @@ static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
119 119
120static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb) 120static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
121{ 121{
122 __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp; 122 __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
123 kcb->kprobe_status = kcb->prev_kprobe.status; 123 kcb->kprobe_status = kcb->prev_kprobe.status;
124 kcb->kprobe_saved_msr = kcb->prev_kprobe.saved_msr; 124 kcb->kprobe_saved_msr = kcb->prev_kprobe.saved_msr;
125} 125}
@@ -127,7 +127,7 @@ static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
127static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs, 127static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
128 struct kprobe_ctlblk *kcb) 128 struct kprobe_ctlblk *kcb)
129{ 129{
130 __get_cpu_var(current_kprobe) = p; 130 __this_cpu_write(current_kprobe, p);
131 kcb->kprobe_saved_msr = regs->msr; 131 kcb->kprobe_saved_msr = regs->msr;
132} 132}
133 133
@@ -192,7 +192,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
192 ret = 1; 192 ret = 1;
193 goto no_kprobe; 193 goto no_kprobe;
194 } 194 }
195 p = __get_cpu_var(current_kprobe); 195 p = __this_cpu_read(current_kprobe);
196 if (p->break_handler && p->break_handler(p, regs)) { 196 if (p->break_handler && p->break_handler(p, regs)) {
197 goto ss_probe; 197 goto ss_probe;
198 } 198 }
diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c
index a7fd4cb78b78..15c99b649b04 100644
--- a/arch/powerpc/kernel/mce.c
+++ b/arch/powerpc/kernel/mce.c
@@ -73,8 +73,8 @@ void save_mce_event(struct pt_regs *regs, long handled,
73 uint64_t nip, uint64_t addr) 73 uint64_t nip, uint64_t addr)
74{ 74{
75 uint64_t srr1; 75 uint64_t srr1;
76 int index = __get_cpu_var(mce_nest_count)++; 76 int index = __this_cpu_inc_return(mce_nest_count);
77 struct machine_check_event *mce = &__get_cpu_var(mce_event[index]); 77 struct machine_check_event *mce = this_cpu_ptr(&mce_event[index]);
78 78
79 /* 79 /*
80 * Return if we don't have enough space to log mce event. 80 * Return if we don't have enough space to log mce event.
@@ -143,7 +143,7 @@ void save_mce_event(struct pt_regs *regs, long handled,
143 */ 143 */
144int get_mce_event(struct machine_check_event *mce, bool release) 144int get_mce_event(struct machine_check_event *mce, bool release)
145{ 145{
146 int index = __get_cpu_var(mce_nest_count) - 1; 146 int index = __this_cpu_read(mce_nest_count) - 1;
147 struct machine_check_event *mc_evt; 147 struct machine_check_event *mc_evt;
148 int ret = 0; 148 int ret = 0;
149 149
@@ -153,7 +153,7 @@ int get_mce_event(struct machine_check_event *mce, bool release)
153 153
154 /* Check if we have MCE info to process. */ 154 /* Check if we have MCE info to process. */
155 if (index < MAX_MC_EVT) { 155 if (index < MAX_MC_EVT) {
156 mc_evt = &__get_cpu_var(mce_event[index]); 156 mc_evt = this_cpu_ptr(&mce_event[index]);
157 /* Copy the event structure and release the original */ 157 /* Copy the event structure and release the original */
158 if (mce) 158 if (mce)
159 *mce = *mc_evt; 159 *mce = *mc_evt;
@@ -163,7 +163,7 @@ int get_mce_event(struct machine_check_event *mce, bool release)
163 } 163 }
164 /* Decrement the count to free the slot. */ 164 /* Decrement the count to free the slot. */
165 if (release) 165 if (release)
166 __get_cpu_var(mce_nest_count)--; 166 __this_cpu_dec(mce_nest_count);
167 167
168 return ret; 168 return ret;
169} 169}
@@ -184,13 +184,13 @@ void machine_check_queue_event(void)
184 if (!get_mce_event(&evt, MCE_EVENT_RELEASE)) 184 if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
185 return; 185 return;
186 186
187 index = __get_cpu_var(mce_queue_count)++; 187 index = __this_cpu_inc_return(mce_queue_count);
188 /* If queue is full, just return for now. */ 188 /* If queue is full, just return for now. */
189 if (index >= MAX_MC_EVT) { 189 if (index >= MAX_MC_EVT) {
190 __get_cpu_var(mce_queue_count)--; 190 __this_cpu_dec(mce_queue_count);
191 return; 191 return;
192 } 192 }
193 __get_cpu_var(mce_event_queue[index]) = evt; 193 memcpy(this_cpu_ptr(&mce_event_queue[index]), &evt, sizeof(evt));
194 194
195 /* Queue irq work to process this event later. */ 195 /* Queue irq work to process this event later. */
196 irq_work_queue(&mce_event_process_work); 196 irq_work_queue(&mce_event_process_work);
@@ -208,11 +208,11 @@ static void machine_check_process_queued_event(struct irq_work *work)
208 * For now just print it to console. 208 * For now just print it to console.
209 * TODO: log this error event to FSP or nvram. 209 * TODO: log this error event to FSP or nvram.
210 */ 210 */
211 while (__get_cpu_var(mce_queue_count) > 0) { 211 while (__this_cpu_read(mce_queue_count) > 0) {
212 index = __get_cpu_var(mce_queue_count) - 1; 212 index = __this_cpu_read(mce_queue_count) - 1;
213 machine_check_print_event_info( 213 machine_check_print_event_info(
214 &__get_cpu_var(mce_event_queue[index])); 214 this_cpu_ptr(&mce_event_queue[index]));
215 __get_cpu_var(mce_queue_count)--; 215 __this_cpu_dec(mce_queue_count);
216 } 216 }
217} 217}
218 218
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index aa9aff3d6ad3..b6f123ab90ed 100644
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -79,7 +79,7 @@ static long mce_handle_derror(uint64_t dsisr, uint64_t slb_error_bits)
79 } 79 }
80 if (dsisr & P7_DSISR_MC_TLB_MULTIHIT_MFTLB) { 80 if (dsisr & P7_DSISR_MC_TLB_MULTIHIT_MFTLB) {
81 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) 81 if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
82 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_PAGE); 82 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET);
83 /* reset error bits */ 83 /* reset error bits */
84 dsisr &= ~P7_DSISR_MC_TLB_MULTIHIT_MFTLB; 84 dsisr &= ~P7_DSISR_MC_TLB_MULTIHIT_MFTLB;
85 } 85 }
@@ -110,7 +110,7 @@ static long mce_handle_common_ierror(uint64_t srr1)
110 break; 110 break;
111 case P7_SRR1_MC_IFETCH_TLB_MULTIHIT: 111 case P7_SRR1_MC_IFETCH_TLB_MULTIHIT:
112 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) { 112 if (cur_cpu_spec && cur_cpu_spec->flush_tlb) {
113 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_PAGE); 113 cur_cpu_spec->flush_tlb(TLBIEL_INVAL_SET);
114 handled = 1; 114 handled = 1;
115 } 115 }
116 break; 116 break;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index e5dad9a9edc0..37d512d35943 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -20,7 +20,6 @@
20#include <linux/pci.h> 20#include <linux/pci.h>
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/bootmem.h>
24#include <linux/delay.h> 23#include <linux/delay.h>
25#include <linux/export.h> 24#include <linux/export.h>
26#include <linux/of_address.h> 25#include <linux/of_address.h>
@@ -1464,7 +1463,7 @@ static void pcibios_setup_phb_resources(struct pci_controller *hose,
1464 res = &hose->io_resource; 1463 res = &hose->io_resource;
1465 1464
1466 if (!res->flags) { 1465 if (!res->flags) {
1467 printk(KERN_WARNING "PCI: I/O resource not set for host" 1466 pr_info("PCI: I/O resource not set for host"
1468 " bridge %s (domain %d)\n", 1467 " bridge %s (domain %d)\n",
1469 hose->dn->full_name, hose->global_number); 1468 hose->dn->full_name, hose->global_number);
1470 } else { 1469 } else {
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 432459c817fa..1f7930037cb7 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -199,9 +199,7 @@ pci_create_OF_bus_map(void)
199 struct property* of_prop; 199 struct property* of_prop;
200 struct device_node *dn; 200 struct device_node *dn;
201 201
202 of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256); 202 of_prop = memblock_virt_alloc(sizeof(struct property) + 256, 0);
203 if (!of_prop)
204 return;
205 dn = of_find_node_by_path("/"); 203 dn = of_find_node_by_path("/");
206 if (dn) { 204 if (dn) {
207 memset(of_prop, -1, sizeof(struct property) + 256); 205 memset(of_prop, -1, sizeof(struct property) + 256);
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index b15194e2c5fc..60bb187cb46a 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -17,7 +17,6 @@
17#include <linux/pci.h> 17#include <linux/pci.h>
18#include <linux/string.h> 18#include <linux/string.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/bootmem.h>
21#include <linux/export.h> 20#include <linux/export.h>
22#include <linux/mm.h> 21#include <linux/mm.h>
23#include <linux/list.h> 22#include <linux/list.h>
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 923cd2daba89..b4cc7bef6b16 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -37,9 +37,9 @@
37#include <linux/personality.h> 37#include <linux/personality.h>
38#include <linux/random.h> 38#include <linux/random.h>
39#include <linux/hw_breakpoint.h> 39#include <linux/hw_breakpoint.h>
40#include <linux/uaccess.h>
40 41
41#include <asm/pgtable.h> 42#include <asm/pgtable.h>
42#include <asm/uaccess.h>
43#include <asm/io.h> 43#include <asm/io.h>
44#include <asm/processor.h> 44#include <asm/processor.h>
45#include <asm/mmu.h> 45#include <asm/mmu.h>
@@ -499,7 +499,7 @@ static inline int set_dawr(struct arch_hw_breakpoint *brk)
499 499
500void __set_breakpoint(struct arch_hw_breakpoint *brk) 500void __set_breakpoint(struct arch_hw_breakpoint *brk)
501{ 501{
502 __get_cpu_var(current_brk) = *brk; 502 memcpy(this_cpu_ptr(&current_brk), brk, sizeof(*brk));
503 503
504 if (cpu_has_feature(CPU_FTR_DAWR)) 504 if (cpu_has_feature(CPU_FTR_DAWR))
505 set_dawr(brk); 505 set_dawr(brk);
@@ -842,7 +842,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
842 * schedule DABR 842 * schedule DABR
843 */ 843 */
844#ifndef CONFIG_HAVE_HW_BREAKPOINT 844#ifndef CONFIG_HAVE_HW_BREAKPOINT
845 if (unlikely(!hw_brk_match(&__get_cpu_var(current_brk), &new->thread.hw_brk))) 845 if (unlikely(!hw_brk_match(this_cpu_ptr(&current_brk), &new->thread.hw_brk)))
846 __set_breakpoint(&new->thread.hw_brk); 846 __set_breakpoint(&new->thread.hw_brk);
847#endif /* CONFIG_HAVE_HW_BREAKPOINT */ 847#endif /* CONFIG_HAVE_HW_BREAKPOINT */
848#endif 848#endif
@@ -856,7 +856,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
856 * Collect processor utilization data per process 856 * Collect processor utilization data per process
857 */ 857 */
858 if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 858 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
859 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array); 859 struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array);
860 long unsigned start_tb, current_tb; 860 long unsigned start_tb, current_tb;
861 start_tb = old_thread->start_tb; 861 start_tb = old_thread->start_tb;
862 cu->current_tb = current_tb = mfspr(SPRN_PURR); 862 cu->current_tb = current_tb = mfspr(SPRN_PURR);
@@ -866,7 +866,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
866#endif /* CONFIG_PPC64 */ 866#endif /* CONFIG_PPC64 */
867 867
868#ifdef CONFIG_PPC_BOOK3S_64 868#ifdef CONFIG_PPC_BOOK3S_64
869 batch = &__get_cpu_var(ppc64_tlb_batch); 869 batch = this_cpu_ptr(&ppc64_tlb_batch);
870 if (batch->active) { 870 if (batch->active) {
871 current_thread_info()->local_flags |= _TLF_LAZY_MMU; 871 current_thread_info()->local_flags |= _TLF_LAZY_MMU;
872 if (batch->index) 872 if (batch->index)
@@ -889,7 +889,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
889#ifdef CONFIG_PPC_BOOK3S_64 889#ifdef CONFIG_PPC_BOOK3S_64
890 if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { 890 if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
891 current_thread_info()->local_flags &= ~_TLF_LAZY_MMU; 891 current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
892 batch = &__get_cpu_var(ppc64_tlb_batch); 892 batch = this_cpu_ptr(&ppc64_tlb_batch);
893 batch->active = 1; 893 batch->active = 1;
894 } 894 }
895#endif /* CONFIG_PPC_BOOK3S_64 */ 895#endif /* CONFIG_PPC_BOOK3S_64 */
@@ -921,12 +921,8 @@ static void show_instructions(struct pt_regs *regs)
921 pc = (unsigned long)phys_to_virt(pc); 921 pc = (unsigned long)phys_to_virt(pc);
922#endif 922#endif
923 923
924 /* We use __get_user here *only* to avoid an OOPS on a
925 * bad address because the pc *should* only be a
926 * kernel address.
927 */
928 if (!__kernel_text_address(pc) || 924 if (!__kernel_text_address(pc) ||
929 __get_user(instr, (unsigned int __user *)pc)) { 925 probe_kernel_address((unsigned int __user *)pc, instr)) {
930 printk(KERN_CONT "XXXXXXXX "); 926 printk(KERN_CONT "XXXXXXXX ");
931 } else { 927 } else {
932 if (regs->nip == pc) 928 if (regs->nip == pc)
@@ -1531,13 +1527,6 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
1531 int curr_frame = current->curr_ret_stack; 1527 int curr_frame = current->curr_ret_stack;
1532 extern void return_to_handler(void); 1528 extern void return_to_handler(void);
1533 unsigned long rth = (unsigned long)return_to_handler; 1529 unsigned long rth = (unsigned long)return_to_handler;
1534 unsigned long mrth = -1;
1535#ifdef CONFIG_PPC64
1536 extern void mod_return_to_handler(void);
1537 rth = *(unsigned long *)rth;
1538 mrth = (unsigned long)mod_return_to_handler;
1539 mrth = *(unsigned long *)mrth;
1540#endif
1541#endif 1530#endif
1542 1531
1543 sp = (unsigned long) stack; 1532 sp = (unsigned long) stack;
@@ -1562,7 +1551,7 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
1562 if (!firstframe || ip != lr) { 1551 if (!firstframe || ip != lr) {
1563 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); 1552 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
1564#ifdef CONFIG_FUNCTION_GRAPH_TRACER 1553#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1565 if ((ip == rth || ip == mrth) && curr_frame >= 0) { 1554 if ((ip == rth) && curr_frame >= 0) {
1566 printk(" (%pS)", 1555 printk(" (%pS)",
1567 (void *)current->ret_stack[curr_frame].ret); 1556 (void *)current->ret_stack[curr_frame].ret);
1568 curr_frame--; 1557 curr_frame--;
@@ -1665,12 +1654,3 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
1665 return ret; 1654 return ret;
1666} 1655}
1667 1656
1668unsigned long randomize_et_dyn(unsigned long base)
1669{
1670 unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1671
1672 if (ret < base)
1673 return base;
1674
1675 return ret;
1676}
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 099f27e6d1b0..6a799b3cc6b4 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -160,6 +160,12 @@ static struct ibm_pa_feature {
160 {CPU_FTR_NODSISRALIGN, 0, 0, 1, 1, 1}, 160 {CPU_FTR_NODSISRALIGN, 0, 0, 1, 1, 1},
161 {0, MMU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0}, 161 {0, MMU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0},
162 {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0}, 162 {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
163 /*
164 * If the kernel doesn't support TM (ie. CONFIG_PPC_TRANSACTIONAL_MEM=n),
165 * we don't want to turn on CPU_FTR_TM here, so we use CPU_FTR_TM_COMP
166 * which is 0 if the kernel doesn't support TM.
167 */
168 {CPU_FTR_TM_COMP, 0, 0, 22, 0, 0},
163}; 169};
164 170
165static void __init scan_features(unsigned long node, const unsigned char *ftrs, 171static void __init scan_features(unsigned long node, const unsigned char *ftrs,
@@ -696,10 +702,7 @@ void __init early_init_devtree(void *params)
696 reserve_crashkernel(); 702 reserve_crashkernel();
697 early_reserve_mem(); 703 early_reserve_mem();
698 704
699 /* 705 /* Ensure that total memory size is page-aligned. */
700 * Ensure that total memory size is page-aligned, because otherwise
701 * mark_bootmem() gets upset.
702 */
703 limit = ALIGN(memory_limit ?: memblock_phys_mem_size(), PAGE_SIZE); 706 limit = ALIGN(memory_limit ?: memblock_phys_mem_size(), PAGE_SIZE);
704 memblock_enforce_memory_limit(limit); 707 memblock_enforce_memory_limit(limit);
705 708
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c
index 8777fb02349f..fb2fb3ea85e5 100644
--- a/arch/powerpc/kernel/rtas-proc.c
+++ b/arch/powerpc/kernel/rtas-proc.c
@@ -113,17 +113,6 @@
113#define SENSOR_PREFIX "ibm,sensor-" 113#define SENSOR_PREFIX "ibm,sensor-"
114#define cel_to_fahr(x) ((x*9/5)+32) 114#define cel_to_fahr(x) ((x*9/5)+32)
115 115
116
117/* Globals */
118static struct rtas_sensors sensors;
119static struct device_node *rtas_node = NULL;
120static unsigned long power_on_time = 0; /* Save the time the user set */
121static char progress_led[MAX_LINELENGTH];
122
123static unsigned long rtas_tone_frequency = 1000;
124static unsigned long rtas_tone_volume = 0;
125
126/* ****************STRUCTS******************************************* */
127struct individual_sensor { 116struct individual_sensor {
128 unsigned int token; 117 unsigned int token;
129 unsigned int quant; 118 unsigned int quant;
@@ -134,6 +123,15 @@ struct rtas_sensors {
134 unsigned int quant; 123 unsigned int quant;
135}; 124};
136 125
126/* Globals */
127static struct rtas_sensors sensors;
128static struct device_node *rtas_node = NULL;
129static unsigned long power_on_time = 0; /* Save the time the user set */
130static char progress_led[MAX_LINELENGTH];
131
132static unsigned long rtas_tone_frequency = 1000;
133static unsigned long rtas_tone_volume = 0;
134
137/* ****************************************************************** */ 135/* ****************************************************************** */
138/* Declarations */ 136/* Declarations */
139static int ppc_rtas_sensors_show(struct seq_file *m, void *v); 137static int ppc_rtas_sensors_show(struct seq_file *m, void *v);
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 8b4c857c1421..4af905e81ab0 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -1091,8 +1091,8 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
1091} 1091}
1092 1092
1093/* 1093/*
1094 * Call early during boot, before mem init or bootmem, to retrieve the RTAS 1094 * Call early during boot, before mem init, to retrieve the RTAS
1095 * informations from the device-tree and allocate the RMO buffer for userland 1095 * information from the device-tree and allocate the RMO buffer for userland
1096 * accesses. 1096 * accesses.
1097 */ 1097 */
1098void __init rtas_initialize(void) 1098void __init rtas_initialize(void)
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 7c55b86206b3..ce230da2c015 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -26,7 +26,6 @@
26#include <linux/pci.h> 26#include <linux/pci.h>
27#include <linux/string.h> 27#include <linux/string.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/bootmem.h>
30 29
31#include <asm/io.h> 30#include <asm/io.h>
32#include <asm/pgtable.h> 31#include <asm/pgtable.h>
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 1362cd62b3fa..44c8d03558ac 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -139,8 +139,8 @@ void machine_restart(char *cmd)
139void machine_power_off(void) 139void machine_power_off(void)
140{ 140{
141 machine_shutdown(); 141 machine_shutdown();
142 if (ppc_md.power_off) 142 if (pm_power_off)
143 ppc_md.power_off(); 143 pm_power_off();
144#ifdef CONFIG_SMP 144#ifdef CONFIG_SMP
145 smp_send_stop(); 145 smp_send_stop();
146#endif 146#endif
@@ -151,7 +151,7 @@ void machine_power_off(void)
151/* Used by the G5 thermal driver */ 151/* Used by the G5 thermal driver */
152EXPORT_SYMBOL_GPL(machine_power_off); 152EXPORT_SYMBOL_GPL(machine_power_off);
153 153
154void (*pm_power_off)(void) = machine_power_off; 154void (*pm_power_off)(void);
155EXPORT_SYMBOL_GPL(pm_power_off); 155EXPORT_SYMBOL_GPL(pm_power_off);
156 156
157void machine_halt(void) 157void machine_halt(void)
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 07831ed0d9ef..bb02e9f6944e 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -11,7 +11,6 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/initrd.h> 12#include <linux/initrd.h>
13#include <linux/tty.h> 13#include <linux/tty.h>
14#include <linux/bootmem.h>
15#include <linux/seq_file.h> 14#include <linux/seq_file.h>
16#include <linux/root_dev.h> 15#include <linux/root_dev.h>
17#include <linux/cpu.h> 16#include <linux/cpu.h>
@@ -53,11 +52,6 @@ unsigned long ISA_DMA_THRESHOLD;
53unsigned int DMA_MODE_READ; 52unsigned int DMA_MODE_READ;
54unsigned int DMA_MODE_WRITE; 53unsigned int DMA_MODE_WRITE;
55 54
56#ifdef CONFIG_VGA_CONSOLE
57unsigned long vgacon_remap_base;
58EXPORT_SYMBOL(vgacon_remap_base);
59#endif
60
61/* 55/*
62 * These are used in binfmt_elf.c to put aux entries on the stack 56 * These are used in binfmt_elf.c to put aux entries on the stack
63 * for each elf executable being started. 57 * for each elf executable being started.
@@ -311,9 +305,8 @@ void __init setup_arch(char **cmdline_p)
311 305
312 irqstack_early_init(); 306 irqstack_early_init();
313 307
314 /* set up the bootmem stuff with available memory */ 308 initmem_init();
315 do_init_bootmem(); 309 if ( ppc_md.progress ) ppc_md.progress("setup_arch: initmem", 0x3eab);
316 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
317 310
318#ifdef CONFIG_DUMMY_CONSOLE 311#ifdef CONFIG_DUMMY_CONSOLE
319 conswitchp = &dummy_con; 312 conswitchp = &dummy_con;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 4f3cfe1b6a33..49f553bbb360 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -660,13 +660,11 @@ static void __init emergency_stack_init(void)
660} 660}
661 661
662/* 662/*
663 * Called into from start_kernel this initializes bootmem, which is used 663 * Called into from start_kernel this initializes memblock, which is used
664 * to manage page allocation until mem_init is called. 664 * to manage page allocation until mem_init is called.
665 */ 665 */
666void __init setup_arch(char **cmdline_p) 666void __init setup_arch(char **cmdline_p)
667{ 667{
668 ppc64_boot_msg(0x12, "Setup Arch");
669
670 *cmdline_p = boot_command_line; 668 *cmdline_p = boot_command_line;
671 669
672 /* 670 /*
@@ -691,9 +689,7 @@ void __init setup_arch(char **cmdline_p)
691 exc_lvl_early_init(); 689 exc_lvl_early_init();
692 emergency_stack_init(); 690 emergency_stack_init();
693 691
694 /* set up the bootmem stuff with available memory */ 692 initmem_init();
695 do_init_bootmem();
696 sparse_init();
697 693
698#ifdef CONFIG_DUMMY_CONSOLE 694#ifdef CONFIG_DUMMY_CONSOLE
699 conswitchp = &dummy_con; 695 conswitchp = &dummy_con;
@@ -711,33 +707,6 @@ void __init setup_arch(char **cmdline_p)
711 if ((unsigned long)_stext & 0xffff) 707 if ((unsigned long)_stext & 0xffff)
712 panic("Kernelbase not 64K-aligned (0x%lx)!\n", 708 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
713 (unsigned long)_stext); 709 (unsigned long)_stext);
714
715 ppc64_boot_msg(0x15, "Setup Done");
716}
717
718
719/* ToDo: do something useful if ppc_md is not yet setup. */
720#define PPC64_LINUX_FUNCTION 0x0f000000
721#define PPC64_IPL_MESSAGE 0xc0000000
722#define PPC64_TERM_MESSAGE 0xb0000000
723
724static void ppc64_do_msg(unsigned int src, const char *msg)
725{
726 if (ppc_md.progress) {
727 char buf[128];
728
729 sprintf(buf, "%08X\n", src);
730 ppc_md.progress(buf, 0);
731 snprintf(buf, 128, "%s", msg);
732 ppc_md.progress(buf, 0);
733 }
734}
735
736/* Print a boot progress message. */
737void ppc64_boot_msg(unsigned int src, const char *msg)
738{
739 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
740 printk("[boot]%04x %s\n", src, msg);
741} 710}
742 711
743#ifdef CONFIG_SMP 712#ifdef CONFIG_SMP
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 71e186d5f331..8b2d2dc8ef10 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -243,7 +243,7 @@ void smp_muxed_ipi_message_pass(int cpu, int msg)
243 243
244irqreturn_t smp_ipi_demux(void) 244irqreturn_t smp_ipi_demux(void)
245{ 245{
246 struct cpu_messages *info = &__get_cpu_var(ipi_message); 246 struct cpu_messages *info = this_cpu_ptr(&ipi_message);
247 unsigned int all; 247 unsigned int all;
248 248
249 mb(); /* order any irq clear */ 249 mb(); /* order any irq clear */
@@ -442,9 +442,9 @@ void generic_mach_cpu_die(void)
442 idle_task_exit(); 442 idle_task_exit();
443 cpu = smp_processor_id(); 443 cpu = smp_processor_id();
444 printk(KERN_DEBUG "CPU%d offline\n", cpu); 444 printk(KERN_DEBUG "CPU%d offline\n", cpu);
445 __get_cpu_var(cpu_state) = CPU_DEAD; 445 __this_cpu_write(cpu_state, CPU_DEAD);
446 smp_wmb(); 446 smp_wmb();
447 while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) 447 while (__this_cpu_read(cpu_state) != CPU_UP_PREPARE)
448 cpu_relax(); 448 cpu_relax();
449} 449}
450 450
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 67fd2fd2620a..fa1fd8a0c867 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -394,10 +394,10 @@ void ppc_enable_pmcs(void)
394 ppc_set_pmu_inuse(1); 394 ppc_set_pmu_inuse(1);
395 395
396 /* Only need to enable them once */ 396 /* Only need to enable them once */
397 if (__get_cpu_var(pmcs_enabled)) 397 if (__this_cpu_read(pmcs_enabled))
398 return; 398 return;
399 399
400 __get_cpu_var(pmcs_enabled) = 1; 400 __this_cpu_write(pmcs_enabled, 1);
401 401
402 if (ppc_md.enable_pmcs) 402 if (ppc_md.enable_pmcs)
403 ppc_md.enable_pmcs(); 403 ppc_md.enable_pmcs();
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 7505599c2593..fa7c4f12104f 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -458,9 +458,9 @@ static inline void clear_irq_work_pending(void)
458 458
459DEFINE_PER_CPU(u8, irq_work_pending); 459DEFINE_PER_CPU(u8, irq_work_pending);
460 460
461#define set_irq_work_pending_flag() __get_cpu_var(irq_work_pending) = 1 461#define set_irq_work_pending_flag() __this_cpu_write(irq_work_pending, 1)
462#define test_irq_work_pending() __get_cpu_var(irq_work_pending) 462#define test_irq_work_pending() __this_cpu_read(irq_work_pending)
463#define clear_irq_work_pending() __get_cpu_var(irq_work_pending) = 0 463#define clear_irq_work_pending() __this_cpu_write(irq_work_pending, 0)
464 464
465#endif /* 32 vs 64 bit */ 465#endif /* 32 vs 64 bit */
466 466
@@ -482,8 +482,8 @@ void arch_irq_work_raise(void)
482static void __timer_interrupt(void) 482static void __timer_interrupt(void)
483{ 483{
484 struct pt_regs *regs = get_irq_regs(); 484 struct pt_regs *regs = get_irq_regs();
485 u64 *next_tb = &__get_cpu_var(decrementers_next_tb); 485 u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
486 struct clock_event_device *evt = &__get_cpu_var(decrementers); 486 struct clock_event_device *evt = this_cpu_ptr(&decrementers);
487 u64 now; 487 u64 now;
488 488
489 trace_timer_interrupt_entry(regs); 489 trace_timer_interrupt_entry(regs);
@@ -498,7 +498,7 @@ static void __timer_interrupt(void)
498 *next_tb = ~(u64)0; 498 *next_tb = ~(u64)0;
499 if (evt->event_handler) 499 if (evt->event_handler)
500 evt->event_handler(evt); 500 evt->event_handler(evt);
501 __get_cpu_var(irq_stat).timer_irqs_event++; 501 __this_cpu_inc(irq_stat.timer_irqs_event);
502 } else { 502 } else {
503 now = *next_tb - now; 503 now = *next_tb - now;
504 if (now <= DECREMENTER_MAX) 504 if (now <= DECREMENTER_MAX)
@@ -506,13 +506,13 @@ static void __timer_interrupt(void)
506 /* We may have raced with new irq work */ 506 /* We may have raced with new irq work */
507 if (test_irq_work_pending()) 507 if (test_irq_work_pending())
508 set_dec(1); 508 set_dec(1);
509 __get_cpu_var(irq_stat).timer_irqs_others++; 509 __this_cpu_inc(irq_stat.timer_irqs_others);
510 } 510 }
511 511
512#ifdef CONFIG_PPC64 512#ifdef CONFIG_PPC64
513 /* collect purr register values often, for accurate calculations */ 513 /* collect purr register values often, for accurate calculations */
514 if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 514 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
515 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array); 515 struct cpu_usage *cu = this_cpu_ptr(&cpu_usage_array);
516 cu->current_tb = mfspr(SPRN_PURR); 516 cu->current_tb = mfspr(SPRN_PURR);
517 } 517 }
518#endif 518#endif
@@ -527,7 +527,7 @@ static void __timer_interrupt(void)
527void timer_interrupt(struct pt_regs * regs) 527void timer_interrupt(struct pt_regs * regs)
528{ 528{
529 struct pt_regs *old_regs; 529 struct pt_regs *old_regs;
530 u64 *next_tb = &__get_cpu_var(decrementers_next_tb); 530 u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
531 531
532 /* Ensure a positive value is written to the decrementer, or else 532 /* Ensure a positive value is written to the decrementer, or else
533 * some CPUs will continue to take decrementer exceptions. 533 * some CPUs will continue to take decrementer exceptions.
@@ -813,7 +813,7 @@ static void __init clocksource_init(void)
813static int decrementer_set_next_event(unsigned long evt, 813static int decrementer_set_next_event(unsigned long evt,
814 struct clock_event_device *dev) 814 struct clock_event_device *dev)
815{ 815{
816 __get_cpu_var(decrementers_next_tb) = get_tb_or_rtc() + evt; 816 __this_cpu_write(decrementers_next_tb, get_tb_or_rtc() + evt);
817 set_dec(evt); 817 set_dec(evt);
818 818
819 /* We may have raced with new irq work */ 819 /* We may have raced with new irq work */
@@ -833,7 +833,7 @@ static void decrementer_set_mode(enum clock_event_mode mode,
833/* Interrupt handler for the timer broadcast IPI */ 833/* Interrupt handler for the timer broadcast IPI */
834void tick_broadcast_ipi_handler(void) 834void tick_broadcast_ipi_handler(void)
835{ 835{
836 u64 *next_tb = &__get_cpu_var(decrementers_next_tb); 836 u64 *next_tb = this_cpu_ptr(&decrementers_next_tb);
837 837
838 *next_tb = get_tb_or_rtc(); 838 *next_tb = get_tb_or_rtc();
839 __timer_interrupt(); 839 __timer_interrupt();
@@ -989,6 +989,7 @@ void GregorianDay(struct rtc_time * tm)
989 989
990 tm->tm_wday = day % 7; 990 tm->tm_wday = day % 7;
991} 991}
992EXPORT_SYMBOL_GPL(GregorianDay);
992 993
993void to_tm(int tim, struct rtc_time * tm) 994void to_tm(int tim, struct rtc_time * tm)
994{ 995{
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 0dc43f9932cf..e6595b72269b 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -295,7 +295,7 @@ long machine_check_early(struct pt_regs *regs)
295{ 295{
296 long handled = 0; 296 long handled = 0;
297 297
298 __get_cpu_var(irq_stat).mce_exceptions++; 298 __this_cpu_inc(irq_stat.mce_exceptions);
299 299
300 if (cur_cpu_spec && cur_cpu_spec->machine_check_early) 300 if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
301 handled = cur_cpu_spec->machine_check_early(regs); 301 handled = cur_cpu_spec->machine_check_early(regs);
@@ -304,7 +304,7 @@ long machine_check_early(struct pt_regs *regs)
304 304
305long hmi_exception_realmode(struct pt_regs *regs) 305long hmi_exception_realmode(struct pt_regs *regs)
306{ 306{
307 __get_cpu_var(irq_stat).hmi_exceptions++; 307 __this_cpu_inc(irq_stat.hmi_exceptions);
308 308
309 if (ppc_md.hmi_exception_early) 309 if (ppc_md.hmi_exception_early)
310 ppc_md.hmi_exception_early(regs); 310 ppc_md.hmi_exception_early(regs);
@@ -700,7 +700,7 @@ void machine_check_exception(struct pt_regs *regs)
700 enum ctx_state prev_state = exception_enter(); 700 enum ctx_state prev_state = exception_enter();
701 int recover = 0; 701 int recover = 0;
702 702
703 __get_cpu_var(irq_stat).mce_exceptions++; 703 __this_cpu_inc(irq_stat.mce_exceptions);
704 704
705 /* See if any machine dependent calls. In theory, we would want 705 /* See if any machine dependent calls. In theory, we would want
706 * to call the CPU first, and call the ppc_md. one if the CPU 706 * to call the CPU first, and call the ppc_md. one if the CPU
@@ -1519,7 +1519,7 @@ void vsx_unavailable_tm(struct pt_regs *regs)
1519 1519
1520void performance_monitor_exception(struct pt_regs *regs) 1520void performance_monitor_exception(struct pt_regs *regs)
1521{ 1521{
1522 __get_cpu_var(irq_stat).pmu_irqs++; 1522 __this_cpu_inc(irq_stat.pmu_irqs);
1523 1523
1524 perf_irq(regs); 1524 perf_irq(regs);
1525} 1525}
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 6e7c4923b5ea..411116c38da4 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -69,8 +69,12 @@ static void udbg_uart_putc(char c)
69 69
70static int udbg_uart_getc_poll(void) 70static int udbg_uart_getc_poll(void)
71{ 71{
72 if (!udbg_uart_in || !(udbg_uart_in(UART_LSR) & LSR_DR)) 72 if (!udbg_uart_in)
73 return -1;
74
75 if (!(udbg_uart_in(UART_LSR) & LSR_DR))
73 return udbg_uart_in(UART_RBR); 76 return udbg_uart_in(UART_RBR);
77
74 return -1; 78 return -1;
75} 79}
76 80
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index f174351842cf..305eb0d9b768 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -20,7 +20,6 @@
20#include <linux/user.h> 20#include <linux/user.h>
21#include <linux/elf.h> 21#include <linux/elf.h>
22#include <linux/security.h> 22#include <linux/security.h>
23#include <linux/bootmem.h>
24#include <linux/memblock.h> 23#include <linux/memblock.h>
25 24
26#include <asm/pgtable.h> 25#include <asm/pgtable.h>
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index 4fdc27c80f4c..3f1bb5a36c27 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -12,7 +12,6 @@
12#include <linux/export.h> 12#include <linux/export.h>
13#include <linux/sched.h> 13#include <linux/sched.h>
14#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <linux/bootmem.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/memblock.h> 16#include <linux/memblock.h>
18#include <linux/sizes.h> 17#include <linux/sizes.h>
@@ -154,7 +153,7 @@ EXPORT_SYMBOL_GPL(kvm_release_hpt);
154 * kvm_cma_reserve() - reserve area for kvm hash pagetable 153 * kvm_cma_reserve() - reserve area for kvm hash pagetable
155 * 154 *
156 * This function reserves memory from early allocator. It should be 155 * This function reserves memory from early allocator. It should be
157 * called by arch specific code once the early allocator (memblock or bootmem) 156 * called by arch specific code once the memblock allocator
158 * has been activated and all other subsystems have already allocated/reserved 157 * has been activated and all other subsystems have already allocated/reserved
159 * memory. 158 * memory.
160 */ 159 */
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index edb2ccdbb2ba..65c105b17a25 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -201,8 +201,6 @@ kvmppc_primary_no_guest:
201 bge kvm_novcpu_exit /* another thread already exiting */ 201 bge kvm_novcpu_exit /* another thread already exiting */
202 li r3, NAPPING_NOVCPU 202 li r3, NAPPING_NOVCPU
203 stb r3, HSTATE_NAPPING(r13) 203 stb r3, HSTATE_NAPPING(r13)
204 li r3, 1
205 stb r3, HSTATE_HWTHREAD_REQ(r13)
206 204
207 b kvm_do_nap 205 b kvm_do_nap
208 206
@@ -293,6 +291,8 @@ kvm_start_guest:
293 /* if we have no vcpu to run, go back to sleep */ 291 /* if we have no vcpu to run, go back to sleep */
294 beq kvm_no_guest 292 beq kvm_no_guest
295 293
294kvm_secondary_got_guest:
295
296 /* Set HSTATE_DSCR(r13) to something sensible */ 296 /* Set HSTATE_DSCR(r13) to something sensible */
297 ld r6, PACA_DSCR(r13) 297 ld r6, PACA_DSCR(r13)
298 std r6, HSTATE_DSCR(r13) 298 std r6, HSTATE_DSCR(r13)
@@ -318,27 +318,46 @@ kvm_start_guest:
318 stwcx. r3, 0, r4 318 stwcx. r3, 0, r4
319 bne 51b 319 bne 51b
320 320
321/*
322 * At this point we have finished executing in the guest.
323 * We need to wait for hwthread_req to become zero, since
324 * we may not turn on the MMU while hwthread_req is non-zero.
325 * While waiting we also need to check if we get given a vcpu to run.
326 */
321kvm_no_guest: 327kvm_no_guest:
322 li r0, KVM_HWTHREAD_IN_NAP 328 lbz r3, HSTATE_HWTHREAD_REQ(r13)
329 cmpwi r3, 0
330 bne 53f
331 HMT_MEDIUM
332 li r0, KVM_HWTHREAD_IN_KERNEL
323 stb r0, HSTATE_HWTHREAD_STATE(r13) 333 stb r0, HSTATE_HWTHREAD_STATE(r13)
324kvm_do_nap: 334 /* need to recheck hwthread_req after a barrier, to avoid race */
325 /* Clear the runlatch bit before napping */ 335 sync
326 mfspr r2, SPRN_CTRLF 336 lbz r3, HSTATE_HWTHREAD_REQ(r13)
327 clrrdi r2, r2, 1 337 cmpwi r3, 0
328 mtspr SPRN_CTRLT, r2 338 bne 54f
329 339/*
340 * We jump to power7_wakeup_loss, which will return to the caller
341 * of power7_nap in the powernv cpu offline loop. The value we
342 * put in r3 becomes the return value for power7_nap.
343 */
330 li r3, LPCR_PECE0 344 li r3, LPCR_PECE0
331 mfspr r4, SPRN_LPCR 345 mfspr r4, SPRN_LPCR
332 rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1 346 rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
333 mtspr SPRN_LPCR, r4 347 mtspr SPRN_LPCR, r4
334 isync 348 li r3, 0
335 std r0, HSTATE_SCRATCH0(r13) 349 b power7_wakeup_loss
336 ptesync 350
337 ld r0, HSTATE_SCRATCH0(r13) 35153: HMT_LOW
3381: cmpd r0, r0 352 ld r4, HSTATE_KVM_VCPU(r13)
339 bne 1b 353 cmpdi r4, 0
340 nap 354 beq kvm_no_guest
341 b . 355 HMT_MEDIUM
356 b kvm_secondary_got_guest
357
35854: li r0, KVM_HWTHREAD_IN_KVM
359 stb r0, HSTATE_HWTHREAD_STATE(r13)
360 b kvm_no_guest
342 361
343/****************************************************************************** 362/******************************************************************************
344 * * 363 * *
@@ -2172,6 +2191,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
2172 * occurs, with PECE1, PECE0 and PECEDP set in LPCR. Also clear the 2191 * occurs, with PECE1, PECE0 and PECEDP set in LPCR. Also clear the
2173 * runlatch bit before napping. 2192 * runlatch bit before napping.
2174 */ 2193 */
2194kvm_do_nap:
2175 mfspr r2, SPRN_CTRLF 2195 mfspr r2, SPRN_CTRLF
2176 clrrdi r2, r2, 1 2196 clrrdi r2, r2, 1
2177 mtspr SPRN_CTRLT, r2 2197 mtspr SPRN_CTRLT, r2
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 2e02ed849f36..16095841afe1 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -76,11 +76,11 @@ static inline int local_sid_setup_one(struct id *entry)
76 unsigned long sid; 76 unsigned long sid;
77 int ret = -1; 77 int ret = -1;
78 78
79 sid = ++(__get_cpu_var(pcpu_last_used_sid)); 79 sid = __this_cpu_inc_return(pcpu_last_used_sid);
80 if (sid < NUM_TIDS) { 80 if (sid < NUM_TIDS) {
81 __get_cpu_var(pcpu_sids).entry[sid] = entry; 81 __this_cpu_write(pcpu_sids)entry[sid], entry);
82 entry->val = sid; 82 entry->val = sid;
83 entry->pentry = &__get_cpu_var(pcpu_sids).entry[sid]; 83 entry->pentry = this_cpu_ptr(&pcpu_sids.entry[sid]);
84 ret = sid; 84 ret = sid;
85 } 85 }
86 86
@@ -108,8 +108,8 @@ static inline int local_sid_setup_one(struct id *entry)
108static inline int local_sid_lookup(struct id *entry) 108static inline int local_sid_lookup(struct id *entry)
109{ 109{
110 if (entry && entry->val != 0 && 110 if (entry && entry->val != 0 &&
111 __get_cpu_var(pcpu_sids).entry[entry->val] == entry && 111 __this_cpu_read(pcpu_sids.entry[entry->val]) == entry &&
112 entry->pentry == &__get_cpu_var(pcpu_sids).entry[entry->val]) 112 entry->pentry == this_cpu_ptr(&pcpu_sids.entry[entry->val]))
113 return entry->val; 113 return entry->val;
114 return -1; 114 return -1;
115} 115}
@@ -117,8 +117,8 @@ static inline int local_sid_lookup(struct id *entry)
117/* Invalidate all id mappings on local core -- call with preempt disabled */ 117/* Invalidate all id mappings on local core -- call with preempt disabled */
118static inline void local_sid_destroy_all(void) 118static inline void local_sid_destroy_all(void)
119{ 119{
120 __get_cpu_var(pcpu_last_used_sid) = 0; 120 __this_cpu_write(pcpu_last_used_sid, 0);
121 memset(&__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids))); 121 memset(this_cpu_ptr(&pcpu_sids), 0, sizeof(pcpu_sids));
122} 122}
123 123
124static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500) 124static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index 2fdc8722e324..cda695de8aa7 100644
--- a/arch/powerpc/kvm/e500mc.c
+++ b/arch/powerpc/kvm/e500mc.c
@@ -144,9 +144,9 @@ static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu)
144 mtspr(SPRN_GESR, vcpu->arch.shared->esr); 144 mtspr(SPRN_GESR, vcpu->arch.shared->esr);
145 145
146 if (vcpu->arch.oldpir != mfspr(SPRN_PIR) || 146 if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
147 __get_cpu_var(last_vcpu_of_lpid)[get_lpid(vcpu)] != vcpu) { 147 __this_cpu_read(last_vcpu_of_lpid[get_lpid(vcpu)]) != vcpu) {
148 kvmppc_e500_tlbil_all(vcpu_e500); 148 kvmppc_e500_tlbil_all(vcpu_e500);
149 __get_cpu_var(last_vcpu_of_lpid)[get_lpid(vcpu)] = vcpu; 149 __this_cpu_write(last_vcpu_of_lpid[get_lpid(vcpu)], vcpu);
150 } 150 }
151} 151}
152 152
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 9f342f134ae4..597562f69b2d 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -12,7 +12,6 @@ CFLAGS_REMOVE_feature-fixups.o = -pg
12obj-y := string.o alloc.o \ 12obj-y := string.o alloc.o \
13 crtsavres.o ppc_ksyms.o 13 crtsavres.o ppc_ksyms.o
14obj-$(CONFIG_PPC32) += div64.o copy_32.o 14obj-$(CONFIG_PPC32) += div64.o copy_32.o
15obj-$(CONFIG_HAS_IOMEM) += devres.o
16 15
17obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \ 16obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
18 usercopy_64.o mem_64.o string.o \ 17 usercopy_64.o mem_64.o string.o \
diff --git a/arch/powerpc/lib/alloc.c b/arch/powerpc/lib/alloc.c
index da22c84a8fed..4a6c2cf890d9 100644
--- a/arch/powerpc/lib/alloc.c
+++ b/arch/powerpc/lib/alloc.c
@@ -13,9 +13,7 @@ void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
13 if (mem_init_done) 13 if (mem_init_done)
14 p = kzalloc(size, mask); 14 p = kzalloc(size, mask);
15 else { 15 else {
16 p = alloc_bootmem(size); 16 p = memblock_virt_alloc(size, 0);
17 if (p)
18 memset(p, 0, size);
19 } 17 }
20 return p; 18 return p;
21} 19}
diff --git a/arch/powerpc/lib/devres.c b/arch/powerpc/lib/devres.c
deleted file mode 100644
index 8df55fc3aad6..000000000000
--- a/arch/powerpc/lib/devres.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#include <linux/device.h> /* devres_*(), devm_ioremap_release() */
11#include <linux/gfp.h>
12#include <linux/io.h> /* ioremap_prot() */
13#include <linux/export.h> /* EXPORT_SYMBOL() */
14
15/**
16 * devm_ioremap_prot - Managed ioremap_prot()
17 * @dev: Generic device to remap IO address for
18 * @offset: BUS offset to map
19 * @size: Size of map
20 * @flags: Page flags
21 *
22 * Managed ioremap_prot(). Map is automatically unmapped on driver
23 * detach.
24 */
25void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset,
26 size_t size, unsigned long flags)
27{
28 void __iomem **ptr, *addr;
29
30 ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL);
31 if (!ptr)
32 return NULL;
33
34 addr = ioremap_prot(offset, size, flags);
35 if (addr) {
36 *ptr = addr;
37 devres_add(dev, ptr);
38 } else
39 devres_free(ptr);
40
41 return addr;
42}
43EXPORT_SYMBOL(devm_ioremap_prot);
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 54651fc2d412..dc885b30f7a6 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1865,6 +1865,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1865 } 1865 }
1866 goto ldst_done; 1866 goto ldst_done;
1867 1867
1868#ifdef CONFIG_PPC_FPU
1868 case LOAD_FP: 1869 case LOAD_FP:
1869 if (regs->msr & MSR_LE) 1870 if (regs->msr & MSR_LE)
1870 return 0; 1871 return 0;
@@ -1873,7 +1874,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1873 else 1874 else
1874 err = do_fp_load(op.reg, do_lfd, op.ea, size, regs); 1875 err = do_fp_load(op.reg, do_lfd, op.ea, size, regs);
1875 goto ldst_done; 1876 goto ldst_done;
1876 1877#endif
1877#ifdef CONFIG_ALTIVEC 1878#ifdef CONFIG_ALTIVEC
1878 case LOAD_VMX: 1879 case LOAD_VMX:
1879 if (regs->msr & MSR_LE) 1880 if (regs->msr & MSR_LE)
@@ -1919,6 +1920,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1919 err = write_mem(op.val, op.ea, size, regs); 1920 err = write_mem(op.val, op.ea, size, regs);
1920 goto ldst_done; 1921 goto ldst_done;
1921 1922
1923#ifdef CONFIG_PPC_FPU
1922 case STORE_FP: 1924 case STORE_FP:
1923 if (regs->msr & MSR_LE) 1925 if (regs->msr & MSR_LE)
1924 return 0; 1926 return 0;
@@ -1927,7 +1929,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1927 else 1929 else
1928 err = do_fp_store(op.reg, do_stfd, op.ea, size, regs); 1930 err = do_fp_store(op.reg, do_stfd, op.ea, size, regs);
1929 goto ldst_done; 1931 goto ldst_done;
1930 1932#endif
1931#ifdef CONFIG_ALTIVEC 1933#ifdef CONFIG_ALTIVEC
1932 case STORE_VMX: 1934 case STORE_VMX:
1933 if (regs->msr & MSR_LE) 1935 if (regs->msr & MSR_LE)
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 325e861616a1..438dcd3fd0d1 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,7 +6,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
6 6
7ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC) 7ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
8 8
9obj-y := fault.o mem.o pgtable.o gup.o mmap.o \ 9obj-y := fault.o mem.o pgtable.o mmap.o \
10 init_$(CONFIG_WORD_SIZE).o \ 10 init_$(CONFIG_WORD_SIZE).o \
11 pgtable_$(CONFIG_WORD_SIZE).o 11 pgtable_$(CONFIG_WORD_SIZE).o
12obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ 12obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 08d659a9fcdb..eb79907f34fa 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -43,7 +43,6 @@
43#include <asm/tlbflush.h> 43#include <asm/tlbflush.h>
44#include <asm/siginfo.h> 44#include <asm/siginfo.h>
45#include <asm/debug.h> 45#include <asm/debug.h>
46#include <mm/mmu_decl.h>
47 46
48#include "icswx.h" 47#include "icswx.h"
49 48
@@ -380,12 +379,6 @@ good_area:
380 goto bad_area; 379 goto bad_area;
381#endif /* CONFIG_6xx */ 380#endif /* CONFIG_6xx */
382#if defined(CONFIG_8xx) 381#if defined(CONFIG_8xx)
383 /* 8xx sometimes need to load a invalid/non-present TLBs.
384 * These must be invalidated separately as linux mm don't.
385 */
386 if (error_code & 0x40000000) /* no translation? */
387 _tlbil_va(address, 0, 0, 0);
388
389 /* The MPC8xx seems to always set 0x80000000, which is 382 /* The MPC8xx seems to always set 0x80000000, which is
390 * "undefined". Of those that can be set, this is the only 383 * "undefined". Of those that can be set, this is the only
391 * one which seems bad. 384 * one which seems bad.
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
deleted file mode 100644
index d8746684f606..000000000000
--- a/arch/powerpc/mm/gup.c
+++ /dev/null
@@ -1,235 +0,0 @@
1/*
2 * Lockless get_user_pages_fast for powerpc
3 *
4 * Copyright (C) 2008 Nick Piggin
5 * Copyright (C) 2008 Novell Inc.
6 */
7#undef DEBUG
8
9#include <linux/sched.h>
10#include <linux/mm.h>
11#include <linux/hugetlb.h>
12#include <linux/vmstat.h>
13#include <linux/pagemap.h>
14#include <linux/rwsem.h>
15#include <asm/pgtable.h>
16
17#ifdef __HAVE_ARCH_PTE_SPECIAL
18
19/*
20 * The performance critical leaf functions are made noinline otherwise gcc
21 * inlines everything into a single function which results in too much
22 * register pressure.
23 */
24static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
25 unsigned long end, int write, struct page **pages, int *nr)
26{
27 unsigned long mask, result;
28 pte_t *ptep;
29
30 result = _PAGE_PRESENT|_PAGE_USER;
31 if (write)
32 result |= _PAGE_RW;
33 mask = result | _PAGE_SPECIAL;
34
35 ptep = pte_offset_kernel(&pmd, addr);
36 do {
37 pte_t pte = ACCESS_ONCE(*ptep);
38 struct page *page;
39 /*
40 * Similar to the PMD case, NUMA hinting must take slow path
41 */
42 if (pte_numa(pte))
43 return 0;
44
45 if ((pte_val(pte) & mask) != result)
46 return 0;
47 VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
48 page = pte_page(pte);
49 if (!page_cache_get_speculative(page))
50 return 0;
51 if (unlikely(pte_val(pte) != pte_val(*ptep))) {
52 put_page(page);
53 return 0;
54 }
55 pages[*nr] = page;
56 (*nr)++;
57
58 } while (ptep++, addr += PAGE_SIZE, addr != end);
59
60 return 1;
61}
62
63static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
64 int write, struct page **pages, int *nr)
65{
66 unsigned long next;
67 pmd_t *pmdp;
68
69 pmdp = pmd_offset(&pud, addr);
70 do {
71 pmd_t pmd = ACCESS_ONCE(*pmdp);
72
73 next = pmd_addr_end(addr, end);
74 /*
75 * If we find a splitting transparent hugepage we
76 * return zero. That will result in taking the slow
77 * path which will call wait_split_huge_page()
78 * if the pmd is still in splitting state
79 */
80 if (pmd_none(pmd) || pmd_trans_splitting(pmd))
81 return 0;
82 if (pmd_huge(pmd) || pmd_large(pmd)) {
83 /*
84 * NUMA hinting faults need to be handled in the GUP
85 * slowpath for accounting purposes and so that they
86 * can be serialised against THP migration.
87 */
88 if (pmd_numa(pmd))
89 return 0;
90
91 if (!gup_hugepte((pte_t *)pmdp, PMD_SIZE, addr, next,
92 write, pages, nr))
93 return 0;
94 } else if (is_hugepd(pmdp)) {
95 if (!gup_hugepd((hugepd_t *)pmdp, PMD_SHIFT,
96 addr, next, write, pages, nr))
97 return 0;
98 } else if (!gup_pte_range(pmd, addr, next, write, pages, nr))
99 return 0;
100 } while (pmdp++, addr = next, addr != end);
101
102 return 1;
103}
104
105static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
106 int write, struct page **pages, int *nr)
107{
108 unsigned long next;
109 pud_t *pudp;
110
111 pudp = pud_offset(&pgd, addr);
112 do {
113 pud_t pud = ACCESS_ONCE(*pudp);
114
115 next = pud_addr_end(addr, end);
116 if (pud_none(pud))
117 return 0;
118 if (pud_huge(pud)) {
119 if (!gup_hugepte((pte_t *)pudp, PUD_SIZE, addr, next,
120 write, pages, nr))
121 return 0;
122 } else if (is_hugepd(pudp)) {
123 if (!gup_hugepd((hugepd_t *)pudp, PUD_SHIFT,
124 addr, next, write, pages, nr))
125 return 0;
126 } else if (!gup_pmd_range(pud, addr, next, write, pages, nr))
127 return 0;
128 } while (pudp++, addr = next, addr != end);
129
130 return 1;
131}
132
133int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
134 struct page **pages)
135{
136 struct mm_struct *mm = current->mm;
137 unsigned long addr, len, end;
138 unsigned long next;
139 unsigned long flags;
140 pgd_t *pgdp;
141 int nr = 0;
142
143 pr_devel("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read");
144
145 start &= PAGE_MASK;
146 addr = start;
147 len = (unsigned long) nr_pages << PAGE_SHIFT;
148 end = start + len;
149
150 if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
151 start, len)))
152 return 0;
153
154 pr_devel(" aligned: %lx .. %lx\n", start, end);
155
156 /*
157 * XXX: batch / limit 'nr', to avoid large irq off latency
158 * needs some instrumenting to determine the common sizes used by
159 * important workloads (eg. DB2), and whether limiting the batch size
160 * will decrease performance.
161 *
162 * It seems like we're in the clear for the moment. Direct-IO is
163 * the main guy that batches up lots of get_user_pages, and even
164 * they are limited to 64-at-a-time which is not so many.
165 */
166 /*
167 * This doesn't prevent pagetable teardown, but does prevent
168 * the pagetables from being freed on powerpc.
169 *
170 * So long as we atomically load page table pointers versus teardown,
171 * we can follow the address down to the the page and take a ref on it.
172 */
173 local_irq_save(flags);
174
175 pgdp = pgd_offset(mm, addr);
176 do {
177 pgd_t pgd = ACCESS_ONCE(*pgdp);
178
179 pr_devel(" %016lx: normal pgd %p\n", addr,
180 (void *)pgd_val(pgd));
181 next = pgd_addr_end(addr, end);
182 if (pgd_none(pgd))
183 break;
184 if (pgd_huge(pgd)) {
185 if (!gup_hugepte((pte_t *)pgdp, PGDIR_SIZE, addr, next,
186 write, pages, &nr))
187 break;
188 } else if (is_hugepd(pgdp)) {
189 if (!gup_hugepd((hugepd_t *)pgdp, PGDIR_SHIFT,
190 addr, next, write, pages, &nr))
191 break;
192 } else if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
193 break;
194 } while (pgdp++, addr = next, addr != end);
195
196 local_irq_restore(flags);
197
198 return nr;
199}
200
201int get_user_pages_fast(unsigned long start, int nr_pages, int write,
202 struct page **pages)
203{
204 struct mm_struct *mm = current->mm;
205 int nr, ret;
206
207 start &= PAGE_MASK;
208 nr = __get_user_pages_fast(start, nr_pages, write, pages);
209 ret = nr;
210
211 if (nr < nr_pages) {
212 pr_devel(" slow path ! nr = %d\n", nr);
213
214 /* Try to get the remaining pages with get_user_pages */
215 start += nr << PAGE_SHIFT;
216 pages += nr;
217
218 down_read(&mm->mmap_sem);
219 ret = get_user_pages(current, mm, start,
220 nr_pages - nr, write, 0, pages, NULL);
221 up_read(&mm->mmap_sem);
222
223 /* Have to be a bit careful with return values */
224 if (nr > 0) {
225 if (ret < 0)
226 ret = nr;
227 else
228 ret += nr;
229 }
230 }
231
232 return ret;
233}
234
235#endif /* __HAVE_ARCH_PTE_SPECIAL */
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index 057cbbb4c576..463174a4a647 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -46,7 +46,8 @@
46 46
47/* 47/*
48 * _hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid, 48 * _hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
49 * pte_t *ptep, unsigned long trap, int local, int ssize) 49 * pte_t *ptep, unsigned long trap, unsigned long flags,
50 * int ssize)
50 * 51 *
51 * Adds a 4K page to the hash table in a segment of 4K pages only 52 * Adds a 4K page to the hash table in a segment of 4K pages only
52 */ 53 */
@@ -298,7 +299,7 @@ htab_modify_pte:
298 li r6,MMU_PAGE_4K /* base page size */ 299 li r6,MMU_PAGE_4K /* base page size */
299 li r7,MMU_PAGE_4K /* actual page size */ 300 li r7,MMU_PAGE_4K /* actual page size */
300 ld r8,STK_PARAM(R9)(r1) /* segment size */ 301 ld r8,STK_PARAM(R9)(r1) /* segment size */
301 ld r9,STK_PARAM(R8)(r1) /* get "local" param */ 302 ld r9,STK_PARAM(R8)(r1) /* get "flags" param */
302.globl htab_call_hpte_updatepp 303.globl htab_call_hpte_updatepp
303htab_call_hpte_updatepp: 304htab_call_hpte_updatepp:
304 bl . /* Patched by htab_finish_init() */ 305 bl . /* Patched by htab_finish_init() */
@@ -338,8 +339,8 @@ htab_pte_insert_failure:
338 *****************************************************************************/ 339 *****************************************************************************/
339 340
340/* _hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid, 341/* _hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
341 * pte_t *ptep, unsigned long trap, int local, int ssize, 342 * pte_t *ptep, unsigned long trap, unsigned local flags,
342 * int subpg_prot) 343 * int ssize, int subpg_prot)
343 */ 344 */
344 345
345/* 346/*
@@ -514,7 +515,7 @@ htab_insert_pte:
514 andis. r0,r31,_PAGE_4K_PFN@h 515 andis. r0,r31,_PAGE_4K_PFN@h
515 srdi r5,r31,PTE_RPN_SHIFT 516 srdi r5,r31,PTE_RPN_SHIFT
516 bne- htab_special_pfn 517 bne- htab_special_pfn
517 sldi r5,r5,PAGE_SHIFT-HW_PAGE_SHIFT 518 sldi r5,r5,PAGE_FACTOR
518 add r5,r5,r25 519 add r5,r5,r25
519htab_special_pfn: 520htab_special_pfn:
520 sldi r5,r5,HW_PAGE_SHIFT 521 sldi r5,r5,HW_PAGE_SHIFT
@@ -544,7 +545,7 @@ htab_call_hpte_insert1:
544 andis. r0,r31,_PAGE_4K_PFN@h 545 andis. r0,r31,_PAGE_4K_PFN@h
545 srdi r5,r31,PTE_RPN_SHIFT 546 srdi r5,r31,PTE_RPN_SHIFT
546 bne- 3f 547 bne- 3f
547 sldi r5,r5,PAGE_SHIFT-HW_PAGE_SHIFT 548 sldi r5,r5,PAGE_FACTOR
548 add r5,r5,r25 549 add r5,r5,r25
5493: sldi r5,r5,HW_PAGE_SHIFT 5503: sldi r5,r5,HW_PAGE_SHIFT
550 551
@@ -594,7 +595,7 @@ htab_inval_old_hpte:
594 li r5,0 /* PTE.hidx */ 595 li r5,0 /* PTE.hidx */
595 li r6,MMU_PAGE_64K /* psize */ 596 li r6,MMU_PAGE_64K /* psize */
596 ld r7,STK_PARAM(R9)(r1) /* ssize */ 597 ld r7,STK_PARAM(R9)(r1) /* ssize */
597 ld r8,STK_PARAM(R8)(r1) /* local */ 598 ld r8,STK_PARAM(R8)(r1) /* flags */
598 bl flush_hash_page 599 bl flush_hash_page
599 /* Clear out _PAGE_HPTE_SUB bits in the new linux PTE */ 600 /* Clear out _PAGE_HPTE_SUB bits in the new linux PTE */
600 lis r0,_PAGE_HPTE_SUB@h 601 lis r0,_PAGE_HPTE_SUB@h
@@ -666,7 +667,7 @@ htab_modify_pte:
666 li r6,MMU_PAGE_4K /* base page size */ 667 li r6,MMU_PAGE_4K /* base page size */
667 li r7,MMU_PAGE_4K /* actual page size */ 668 li r7,MMU_PAGE_4K /* actual page size */
668 ld r8,STK_PARAM(R9)(r1) /* segment size */ 669 ld r8,STK_PARAM(R9)(r1) /* segment size */
669 ld r9,STK_PARAM(R8)(r1) /* get "local" param */ 670 ld r9,STK_PARAM(R8)(r1) /* get "flags" param */
670.globl htab_call_hpte_updatepp 671.globl htab_call_hpte_updatepp
671htab_call_hpte_updatepp: 672htab_call_hpte_updatepp:
672 bl . /* patched by htab_finish_init() */ 673 bl . /* patched by htab_finish_init() */
@@ -962,7 +963,7 @@ ht64_modify_pte:
962 li r6,MMU_PAGE_64K /* base page size */ 963 li r6,MMU_PAGE_64K /* base page size */
963 li r7,MMU_PAGE_64K /* actual page size */ 964 li r7,MMU_PAGE_64K /* actual page size */
964 ld r8,STK_PARAM(R9)(r1) /* segment size */ 965 ld r8,STK_PARAM(R9)(r1) /* segment size */
965 ld r9,STK_PARAM(R8)(r1) /* get "local" param */ 966 ld r9,STK_PARAM(R8)(r1) /* get "flags" param */
966.globl ht64_call_hpte_updatepp 967.globl ht64_call_hpte_updatepp
967ht64_call_hpte_updatepp: 968ht64_call_hpte_updatepp:
968 bl . /* patched by htab_finish_init() */ 969 bl . /* patched by htab_finish_init() */
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index ae4962a06476..9c4880ddecd6 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -283,19 +283,17 @@ static long native_hpte_remove(unsigned long hpte_group)
283 283
284static long native_hpte_updatepp(unsigned long slot, unsigned long newpp, 284static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
285 unsigned long vpn, int bpsize, 285 unsigned long vpn, int bpsize,
286 int apsize, int ssize, int local) 286 int apsize, int ssize, unsigned long flags)
287{ 287{
288 struct hash_pte *hptep = htab_address + slot; 288 struct hash_pte *hptep = htab_address + slot;
289 unsigned long hpte_v, want_v; 289 unsigned long hpte_v, want_v;
290 int ret = 0; 290 int ret = 0, local = 0;
291 291
292 want_v = hpte_encode_avpn(vpn, bpsize, ssize); 292 want_v = hpte_encode_avpn(vpn, bpsize, ssize);
293 293
294 DBG_LOW(" update(vpn=%016lx, avpnv=%016lx, group=%lx, newpp=%lx)", 294 DBG_LOW(" update(vpn=%016lx, avpnv=%016lx, group=%lx, newpp=%lx)",
295 vpn, want_v & HPTE_V_AVPN, slot, newpp); 295 vpn, want_v & HPTE_V_AVPN, slot, newpp);
296 296
297 native_lock_hpte(hptep);
298
299 hpte_v = be64_to_cpu(hptep->v); 297 hpte_v = be64_to_cpu(hptep->v);
300 /* 298 /*
301 * We need to invalidate the TLB always because hpte_remove doesn't do 299 * We need to invalidate the TLB always because hpte_remove doesn't do
@@ -308,15 +306,30 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
308 DBG_LOW(" -> miss\n"); 306 DBG_LOW(" -> miss\n");
309 ret = -1; 307 ret = -1;
310 } else { 308 } else {
311 DBG_LOW(" -> hit\n"); 309 native_lock_hpte(hptep);
312 /* Update the HPTE */ 310 /* recheck with locks held */
313 hptep->r = cpu_to_be64((be64_to_cpu(hptep->r) & ~(HPTE_R_PP | HPTE_R_N)) | 311 hpte_v = be64_to_cpu(hptep->v);
314 (newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_C))); 312 if (unlikely(!HPTE_V_COMPARE(hpte_v, want_v) ||
313 !(hpte_v & HPTE_V_VALID))) {
314 ret = -1;
315 } else {
316 DBG_LOW(" -> hit\n");
317 /* Update the HPTE */
318 hptep->r = cpu_to_be64((be64_to_cpu(hptep->r) &
319 ~(HPTE_R_PP | HPTE_R_N)) |
320 (newpp & (HPTE_R_PP | HPTE_R_N |
321 HPTE_R_C)));
322 }
323 native_unlock_hpte(hptep);
315 } 324 }
316 native_unlock_hpte(hptep);
317 325
318 /* Ensure it is out of the tlb too. */ 326 if (flags & HPTE_LOCAL_UPDATE)
319 tlbie(vpn, bpsize, apsize, ssize, local); 327 local = 1;
328 /*
329 * Ensure it is out of the tlb too if it is not a nohpte fault
330 */
331 if (!(flags & HPTE_NOHPTE_UPDATE))
332 tlbie(vpn, bpsize, apsize, ssize, local);
320 333
321 return ret; 334 return ret;
322} 335}
@@ -419,7 +432,7 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long vpn,
419static void native_hugepage_invalidate(unsigned long vsid, 432static void native_hugepage_invalidate(unsigned long vsid,
420 unsigned long addr, 433 unsigned long addr,
421 unsigned char *hpte_slot_array, 434 unsigned char *hpte_slot_array,
422 int psize, int ssize) 435 int psize, int ssize, int local)
423{ 436{
424 int i; 437 int i;
425 struct hash_pte *hptep; 438 struct hash_pte *hptep;
@@ -465,7 +478,7 @@ static void native_hugepage_invalidate(unsigned long vsid,
465 * instruction compares entry_VA in tlb with the VA specified 478 * instruction compares entry_VA in tlb with the VA specified
466 * here 479 * here
467 */ 480 */
468 tlbie(vpn, psize, actual_psize, ssize, 0); 481 tlbie(vpn, psize, actual_psize, ssize, local);
469 } 482 }
470 local_irq_restore(flags); 483 local_irq_restore(flags);
471} 484}
@@ -629,7 +642,7 @@ static void native_flush_hash_range(unsigned long number, int local)
629 unsigned long want_v; 642 unsigned long want_v;
630 unsigned long flags; 643 unsigned long flags;
631 real_pte_t pte; 644 real_pte_t pte;
632 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 645 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
633 unsigned long psize = batch->psize; 646 unsigned long psize = batch->psize;
634 int ssize = batch->ssize; 647 int ssize = batch->ssize;
635 int i; 648 int i;
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index d5339a3b9945..e56a307bc676 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -989,7 +989,9 @@ static void check_paca_psize(unsigned long ea, struct mm_struct *mm,
989 * -1 - critical hash insertion error 989 * -1 - critical hash insertion error
990 * -2 - access not permitted by subpage protection mechanism 990 * -2 - access not permitted by subpage protection mechanism
991 */ 991 */
992int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, unsigned long trap) 992int hash_page_mm(struct mm_struct *mm, unsigned long ea,
993 unsigned long access, unsigned long trap,
994 unsigned long flags)
993{ 995{
994 enum ctx_state prev_state = exception_enter(); 996 enum ctx_state prev_state = exception_enter();
995 pgd_t *pgdir; 997 pgd_t *pgdir;
@@ -997,7 +999,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, u
997 pte_t *ptep; 999 pte_t *ptep;
998 unsigned hugeshift; 1000 unsigned hugeshift;
999 const struct cpumask *tmp; 1001 const struct cpumask *tmp;
1000 int rc, user_region = 0, local = 0; 1002 int rc, user_region = 0;
1001 int psize, ssize; 1003 int psize, ssize;
1002 1004
1003 DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n", 1005 DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n",
@@ -1049,7 +1051,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, u
1049 /* Check CPU locality */ 1051 /* Check CPU locality */
1050 tmp = cpumask_of(smp_processor_id()); 1052 tmp = cpumask_of(smp_processor_id());
1051 if (user_region && cpumask_equal(mm_cpumask(mm), tmp)) 1053 if (user_region && cpumask_equal(mm_cpumask(mm), tmp))
1052 local = 1; 1054 flags |= HPTE_LOCAL_UPDATE;
1053 1055
1054#ifndef CONFIG_PPC_64K_PAGES 1056#ifndef CONFIG_PPC_64K_PAGES
1055 /* If we use 4K pages and our psize is not 4K, then we might 1057 /* If we use 4K pages and our psize is not 4K, then we might
@@ -1086,11 +1088,11 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, u
1086 if (hugeshift) { 1088 if (hugeshift) {
1087 if (pmd_trans_huge(*(pmd_t *)ptep)) 1089 if (pmd_trans_huge(*(pmd_t *)ptep))
1088 rc = __hash_page_thp(ea, access, vsid, (pmd_t *)ptep, 1090 rc = __hash_page_thp(ea, access, vsid, (pmd_t *)ptep,
1089 trap, local, ssize, psize); 1091 trap, flags, ssize, psize);
1090#ifdef CONFIG_HUGETLB_PAGE 1092#ifdef CONFIG_HUGETLB_PAGE
1091 else 1093 else
1092 rc = __hash_page_huge(ea, access, vsid, ptep, trap, 1094 rc = __hash_page_huge(ea, access, vsid, ptep, trap,
1093 local, ssize, hugeshift, psize); 1095 flags, ssize, hugeshift, psize);
1094#else 1096#else
1095 else { 1097 else {
1096 /* 1098 /*
@@ -1149,7 +1151,8 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, u
1149 1151
1150#ifdef CONFIG_PPC_HAS_HASH_64K 1152#ifdef CONFIG_PPC_HAS_HASH_64K
1151 if (psize == MMU_PAGE_64K) 1153 if (psize == MMU_PAGE_64K)
1152 rc = __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize); 1154 rc = __hash_page_64K(ea, access, vsid, ptep, trap,
1155 flags, ssize);
1153 else 1156 else
1154#endif /* CONFIG_PPC_HAS_HASH_64K */ 1157#endif /* CONFIG_PPC_HAS_HASH_64K */
1155 { 1158 {
@@ -1158,7 +1161,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, unsigned long access, u
1158 rc = -2; 1161 rc = -2;
1159 else 1162 else
1160 rc = __hash_page_4K(ea, access, vsid, ptep, trap, 1163 rc = __hash_page_4K(ea, access, vsid, ptep, trap,
1161 local, ssize, spp); 1164 flags, ssize, spp);
1162 } 1165 }
1163 1166
1164 /* Dump some info in case of hash insertion failure, they should 1167 /* Dump some info in case of hash insertion failure, they should
@@ -1181,14 +1184,19 @@ bail:
1181} 1184}
1182EXPORT_SYMBOL_GPL(hash_page_mm); 1185EXPORT_SYMBOL_GPL(hash_page_mm);
1183 1186
1184int hash_page(unsigned long ea, unsigned long access, unsigned long trap) 1187int hash_page(unsigned long ea, unsigned long access, unsigned long trap,
1188 unsigned long dsisr)
1185{ 1189{
1190 unsigned long flags = 0;
1186 struct mm_struct *mm = current->mm; 1191 struct mm_struct *mm = current->mm;
1187 1192
1188 if (REGION_ID(ea) == VMALLOC_REGION_ID) 1193 if (REGION_ID(ea) == VMALLOC_REGION_ID)
1189 mm = &init_mm; 1194 mm = &init_mm;
1190 1195
1191 return hash_page_mm(mm, ea, access, trap); 1196 if (dsisr & DSISR_NOHPTE)
1197 flags |= HPTE_NOHPTE_UPDATE;
1198
1199 return hash_page_mm(mm, ea, access, trap, flags);
1192} 1200}
1193EXPORT_SYMBOL_GPL(hash_page); 1201EXPORT_SYMBOL_GPL(hash_page);
1194 1202
@@ -1200,7 +1208,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
1200 pgd_t *pgdir; 1208 pgd_t *pgdir;
1201 pte_t *ptep; 1209 pte_t *ptep;
1202 unsigned long flags; 1210 unsigned long flags;
1203 int rc, ssize, local = 0; 1211 int rc, ssize, update_flags = 0;
1204 1212
1205 BUG_ON(REGION_ID(ea) != USER_REGION_ID); 1213 BUG_ON(REGION_ID(ea) != USER_REGION_ID);
1206 1214
@@ -1251,16 +1259,17 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
1251 1259
1252 /* Is that local to this CPU ? */ 1260 /* Is that local to this CPU ? */
1253 if (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) 1261 if (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
1254 local = 1; 1262 update_flags |= HPTE_LOCAL_UPDATE;
1255 1263
1256 /* Hash it in */ 1264 /* Hash it in */
1257#ifdef CONFIG_PPC_HAS_HASH_64K 1265#ifdef CONFIG_PPC_HAS_HASH_64K
1258 if (mm->context.user_psize == MMU_PAGE_64K) 1266 if (mm->context.user_psize == MMU_PAGE_64K)
1259 rc = __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize); 1267 rc = __hash_page_64K(ea, access, vsid, ptep, trap,
1268 update_flags, ssize);
1260 else 1269 else
1261#endif /* CONFIG_PPC_HAS_HASH_64K */ 1270#endif /* CONFIG_PPC_HAS_HASH_64K */
1262 rc = __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize, 1271 rc = __hash_page_4K(ea, access, vsid, ptep, trap, update_flags,
1263 subpage_protection(mm, ea)); 1272 ssize, subpage_protection(mm, ea));
1264 1273
1265 /* Dump some info in case of hash insertion failure, they should 1274 /* Dump some info in case of hash insertion failure, they should
1266 * never happen so it is really useful to know if/when they do 1275 * never happen so it is really useful to know if/when they do
@@ -1278,9 +1287,10 @@ out_exit:
1278 * do not forget to update the assembly call site ! 1287 * do not forget to update the assembly call site !
1279 */ 1288 */
1280void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize, 1289void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize,
1281 int local) 1290 unsigned long flags)
1282{ 1291{
1283 unsigned long hash, index, shift, hidx, slot; 1292 unsigned long hash, index, shift, hidx, slot;
1293 int local = flags & HPTE_LOCAL_UPDATE;
1284 1294
1285 DBG_LOW("flush_hash_page(vpn=%016lx)\n", vpn); 1295 DBG_LOW("flush_hash_page(vpn=%016lx)\n", vpn);
1286 pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { 1296 pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
@@ -1315,6 +1325,78 @@ void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize,
1315#endif 1325#endif
1316} 1326}
1317 1327
1328#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1329void flush_hash_hugepage(unsigned long vsid, unsigned long addr,
1330 pmd_t *pmdp, unsigned int psize, int ssize,
1331 unsigned long flags)
1332{
1333 int i, max_hpte_count, valid;
1334 unsigned long s_addr;
1335 unsigned char *hpte_slot_array;
1336 unsigned long hidx, shift, vpn, hash, slot;
1337 int local = flags & HPTE_LOCAL_UPDATE;
1338
1339 s_addr = addr & HPAGE_PMD_MASK;
1340 hpte_slot_array = get_hpte_slot_array(pmdp);
1341 /*
1342 * IF we try to do a HUGE PTE update after a withdraw is done.
1343 * we will find the below NULL. This happens when we do
1344 * split_huge_page_pmd
1345 */
1346 if (!hpte_slot_array)
1347 return;
1348
1349 if (ppc_md.hugepage_invalidate) {
1350 ppc_md.hugepage_invalidate(vsid, s_addr, hpte_slot_array,
1351 psize, ssize, local);
1352 goto tm_abort;
1353 }
1354 /*
1355 * No bluk hpte removal support, invalidate each entry
1356 */
1357 shift = mmu_psize_defs[psize].shift;
1358 max_hpte_count = HPAGE_PMD_SIZE >> shift;
1359 for (i = 0; i < max_hpte_count; i++) {
1360 /*
1361 * 8 bits per each hpte entries
1362 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
1363 */
1364 valid = hpte_valid(hpte_slot_array, i);
1365 if (!valid)
1366 continue;
1367 hidx = hpte_hash_index(hpte_slot_array, i);
1368
1369 /* get the vpn */
1370 addr = s_addr + (i * (1ul << shift));
1371 vpn = hpt_vpn(addr, vsid, ssize);
1372 hash = hpt_hash(vpn, shift, ssize);
1373 if (hidx & _PTEIDX_SECONDARY)
1374 hash = ~hash;
1375
1376 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
1377 slot += hidx & _PTEIDX_GROUP_IX;
1378 ppc_md.hpte_invalidate(slot, vpn, psize,
1379 MMU_PAGE_16M, ssize, local);
1380 }
1381tm_abort:
1382#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1383 /* Transactions are not aborted by tlbiel, only tlbie.
1384 * Without, syncing a page back to a block device w/ PIO could pick up
1385 * transactional data (bad!) so we force an abort here. Before the
1386 * sync the page will be made read-only, which will flush_hash_page.
1387 * BIG ISSUE here: if the kernel uses a page from userspace without
1388 * unmapping it first, it may see the speculated version.
1389 */
1390 if (local && cpu_has_feature(CPU_FTR_TM) &&
1391 current->thread.regs &&
1392 MSR_TM_ACTIVE(current->thread.regs->msr)) {
1393 tm_enable();
1394 tm_abort(TM_CAUSE_TLBI);
1395 }
1396#endif
1397}
1398#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1399
1318void flush_hash_range(unsigned long number, int local) 1400void flush_hash_range(unsigned long number, int local)
1319{ 1401{
1320 if (ppc_md.flush_hash_range) 1402 if (ppc_md.flush_hash_range)
@@ -1322,7 +1404,7 @@ void flush_hash_range(unsigned long number, int local)
1322 else { 1404 else {
1323 int i; 1405 int i;
1324 struct ppc64_tlb_batch *batch = 1406 struct ppc64_tlb_batch *batch =
1325 &__get_cpu_var(ppc64_tlb_batch); 1407 this_cpu_ptr(&ppc64_tlb_batch);
1326 1408
1327 for (i = 0; i < number; i++) 1409 for (i = 0; i < number; i++)
1328 flush_hash_page(batch->vpn[i], batch->pte[i], 1410 flush_hash_page(batch->vpn[i], batch->pte[i],
diff --git a/arch/powerpc/mm/hugepage-hash64.c b/arch/powerpc/mm/hugepage-hash64.c
index 5f5e6328c21c..86686514ae13 100644
--- a/arch/powerpc/mm/hugepage-hash64.c
+++ b/arch/powerpc/mm/hugepage-hash64.c
@@ -18,60 +18,9 @@
18#include <linux/mm.h> 18#include <linux/mm.h>
19#include <asm/machdep.h> 19#include <asm/machdep.h>
20 20
21static void invalidate_old_hpte(unsigned long vsid, unsigned long addr,
22 pmd_t *pmdp, unsigned int psize, int ssize)
23{
24 int i, max_hpte_count, valid;
25 unsigned long s_addr;
26 unsigned char *hpte_slot_array;
27 unsigned long hidx, shift, vpn, hash, slot;
28
29 s_addr = addr & HPAGE_PMD_MASK;
30 hpte_slot_array = get_hpte_slot_array(pmdp);
31 /*
32 * IF we try to do a HUGE PTE update after a withdraw is done.
33 * we will find the below NULL. This happens when we do
34 * split_huge_page_pmd
35 */
36 if (!hpte_slot_array)
37 return;
38
39 if (ppc_md.hugepage_invalidate)
40 return ppc_md.hugepage_invalidate(vsid, s_addr, hpte_slot_array,
41 psize, ssize);
42 /*
43 * No bluk hpte removal support, invalidate each entry
44 */
45 shift = mmu_psize_defs[psize].shift;
46 max_hpte_count = HPAGE_PMD_SIZE >> shift;
47 for (i = 0; i < max_hpte_count; i++) {
48 /*
49 * 8 bits per each hpte entries
50 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
51 */
52 valid = hpte_valid(hpte_slot_array, i);
53 if (!valid)
54 continue;
55 hidx = hpte_hash_index(hpte_slot_array, i);
56
57 /* get the vpn */
58 addr = s_addr + (i * (1ul << shift));
59 vpn = hpt_vpn(addr, vsid, ssize);
60 hash = hpt_hash(vpn, shift, ssize);
61 if (hidx & _PTEIDX_SECONDARY)
62 hash = ~hash;
63
64 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
65 slot += hidx & _PTEIDX_GROUP_IX;
66 ppc_md.hpte_invalidate(slot, vpn, psize,
67 MMU_PAGE_16M, ssize, 0);
68 }
69}
70
71
72int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid, 21int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
73 pmd_t *pmdp, unsigned long trap, int local, int ssize, 22 pmd_t *pmdp, unsigned long trap, unsigned long flags,
74 unsigned int psize) 23 int ssize, unsigned int psize)
75{ 24{
76 unsigned int index, valid; 25 unsigned int index, valid;
77 unsigned char *hpte_slot_array; 26 unsigned char *hpte_slot_array;
@@ -145,7 +94,8 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
145 * hash page table entries. 94 * hash page table entries.
146 */ 95 */
147 if ((old_pmd & _PAGE_HASHPTE) && !(old_pmd & _PAGE_COMBO)) 96 if ((old_pmd & _PAGE_HASHPTE) && !(old_pmd & _PAGE_COMBO))
148 invalidate_old_hpte(vsid, ea, pmdp, MMU_PAGE_64K, ssize); 97 flush_hash_hugepage(vsid, ea, pmdp, MMU_PAGE_64K,
98 ssize, flags);
149 } 99 }
150 100
151 valid = hpte_valid(hpte_slot_array, index); 101 valid = hpte_valid(hpte_slot_array, index);
@@ -158,7 +108,7 @@ int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
158 slot += hidx & _PTEIDX_GROUP_IX; 108 slot += hidx & _PTEIDX_GROUP_IX;
159 109
160 ret = ppc_md.hpte_updatepp(slot, rflags, vpn, 110 ret = ppc_md.hpte_updatepp(slot, rflags, vpn,
161 psize, lpsize, ssize, local); 111 psize, lpsize, ssize, flags);
162 /* 112 /*
163 * We failed to update, try to insert a new entry. 113 * We failed to update, try to insert a new entry.
164 */ 114 */
diff --git a/arch/powerpc/mm/hugetlbpage-book3e.c b/arch/powerpc/mm/hugetlbpage-book3e.c
index 5e4ee2573903..ba47aaf33a4b 100644
--- a/arch/powerpc/mm/hugetlbpage-book3e.c
+++ b/arch/powerpc/mm/hugetlbpage-book3e.c
@@ -33,13 +33,13 @@ static inline int tlb1_next(void)
33 33
34 ncams = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY; 34 ncams = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
35 35
36 index = __get_cpu_var(next_tlbcam_idx); 36 index = this_cpu_read(next_tlbcam_idx);
37 37
38 /* Just round-robin the entries and wrap when we hit the end */ 38 /* Just round-robin the entries and wrap when we hit the end */
39 if (unlikely(index == ncams - 1)) 39 if (unlikely(index == ncams - 1))
40 __get_cpu_var(next_tlbcam_idx) = tlbcam_index; 40 __this_cpu_write(next_tlbcam_idx, tlbcam_index);
41 else 41 else
42 __get_cpu_var(next_tlbcam_idx)++; 42 __this_cpu_inc(next_tlbcam_idx);
43 43
44 return index; 44 return index;
45} 45}
diff --git a/arch/powerpc/mm/hugetlbpage-hash64.c b/arch/powerpc/mm/hugetlbpage-hash64.c
index a5bcf9301196..d94b1af53a93 100644
--- a/arch/powerpc/mm/hugetlbpage-hash64.c
+++ b/arch/powerpc/mm/hugetlbpage-hash64.c
@@ -19,8 +19,8 @@ extern long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
19 unsigned long vflags, int psize, int ssize); 19 unsigned long vflags, int psize, int ssize);
20 20
21int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid, 21int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
22 pte_t *ptep, unsigned long trap, int local, int ssize, 22 pte_t *ptep, unsigned long trap, unsigned long flags,
23 unsigned int shift, unsigned int mmu_psize) 23 int ssize, unsigned int shift, unsigned int mmu_psize)
24{ 24{
25 unsigned long vpn; 25 unsigned long vpn;
26 unsigned long old_pte, new_pte; 26 unsigned long old_pte, new_pte;
@@ -81,7 +81,7 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
81 slot += (old_pte & _PAGE_F_GIX) >> 12; 81 slot += (old_pte & _PAGE_F_GIX) >> 12;
82 82
83 if (ppc_md.hpte_updatepp(slot, rflags, vpn, mmu_psize, 83 if (ppc_md.hpte_updatepp(slot, rflags, vpn, mmu_psize,
84 mmu_psize, ssize, local) == -1) 84 mmu_psize, ssize, flags) == -1)
85 old_pte &= ~_PAGE_HPTEFLAGS; 85 old_pte &= ~_PAGE_HPTEFLAGS;
86 } 86 }
87 87
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 6a4a5fcb9730..5ff4e07d920a 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -62,6 +62,9 @@ static unsigned nr_gpages;
62/* 62/*
63 * We have PGD_INDEX_SIZ = 12 and PTE_INDEX_SIZE = 8, so that we can have 63 * We have PGD_INDEX_SIZ = 12 and PTE_INDEX_SIZE = 8, so that we can have
64 * 16GB hugepage pte in PGD and 16MB hugepage pte at PMD; 64 * 16GB hugepage pte in PGD and 16MB hugepage pte at PMD;
65 *
66 * Defined in such a way that we can optimize away code block at build time
67 * if CONFIG_HUGETLB_PAGE=n.
65 */ 68 */
66int pmd_huge(pmd_t pmd) 69int pmd_huge(pmd_t pmd)
67{ 70{
@@ -230,7 +233,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz
230 if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, pdshift, pshift)) 233 if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, pdshift, pshift))
231 return NULL; 234 return NULL;
232 235
233 return hugepte_offset(hpdp, addr, pdshift); 236 return hugepte_offset(*hpdp, addr, pdshift);
234} 237}
235 238
236#else 239#else
@@ -270,13 +273,13 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz
270 if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, pdshift, pshift)) 273 if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, pdshift, pshift))
271 return NULL; 274 return NULL;
272 275
273 return hugepte_offset(hpdp, addr, pdshift); 276 return hugepte_offset(*hpdp, addr, pdshift);
274} 277}
275#endif 278#endif
276 279
277#ifdef CONFIG_PPC_FSL_BOOK3E 280#ifdef CONFIG_PPC_FSL_BOOK3E
278/* Build list of addresses of gigantic pages. This function is used in early 281/* Build list of addresses of gigantic pages. This function is used in early
279 * boot before the buddy or bootmem allocator is setup. 282 * boot before the buddy allocator is setup.
280 */ 283 */
281void add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages) 284void add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages)
282{ 285{
@@ -312,7 +315,7 @@ int alloc_bootmem_huge_page(struct hstate *hstate)
312 * If gpages can be in highmem we can't use the trick of storing the 315 * If gpages can be in highmem we can't use the trick of storing the
313 * data structure in the page; allocate space for this 316 * data structure in the page; allocate space for this
314 */ 317 */
315 m = alloc_bootmem(sizeof(struct huge_bootmem_page)); 318 m = memblock_virt_alloc(sizeof(struct huge_bootmem_page), 0);
316 m->phys = gpage_freearray[idx].gpage_list[--nr_gpages]; 319 m->phys = gpage_freearray[idx].gpage_list[--nr_gpages];
317#else 320#else
318 m = phys_to_virt(gpage_freearray[idx].gpage_list[--nr_gpages]); 321 m = phys_to_virt(gpage_freearray[idx].gpage_list[--nr_gpages]);
@@ -352,6 +355,13 @@ static int __init do_gpage_early_setup(char *param, char *val,
352 if (size != 0) { 355 if (size != 0) {
353 if (sscanf(val, "%lu", &npages) <= 0) 356 if (sscanf(val, "%lu", &npages) <= 0)
354 npages = 0; 357 npages = 0;
358 if (npages > MAX_NUMBER_GPAGES) {
359 pr_warn("MMU: %lu pages requested for page "
360 "size %llu KB, limiting to "
361 __stringify(MAX_NUMBER_GPAGES) "\n",
362 npages, size / 1024);
363 npages = MAX_NUMBER_GPAGES;
364 }
355 gpage_npages[shift_to_mmu_psize(__ffs(size))] = npages; 365 gpage_npages[shift_to_mmu_psize(__ffs(size))] = npages;
356 size = 0; 366 size = 0;
357 } 367 }
@@ -399,7 +409,7 @@ void __init reserve_hugetlb_gpages(void)
399#else /* !PPC_FSL_BOOK3E */ 409#else /* !PPC_FSL_BOOK3E */
400 410
401/* Build list of addresses of gigantic pages. This function is used in early 411/* Build list of addresses of gigantic pages. This function is used in early
402 * boot before the buddy or bootmem allocator is setup. 412 * boot before the buddy allocator is setup.
403 */ 413 */
404void add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages) 414void add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages)
405{ 415{
@@ -462,7 +472,7 @@ static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
462{ 472{
463 struct hugepd_freelist **batchp; 473 struct hugepd_freelist **batchp;
464 474
465 batchp = &get_cpu_var(hugepd_freelist_cur); 475 batchp = this_cpu_ptr(&hugepd_freelist_cur);
466 476
467 if (atomic_read(&tlb->mm->mm_users) < 2 || 477 if (atomic_read(&tlb->mm->mm_users) < 2 ||
468 cpumask_equal(mm_cpumask(tlb->mm), 478 cpumask_equal(mm_cpumask(tlb->mm),
@@ -536,7 +546,7 @@ static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
536 do { 546 do {
537 pmd = pmd_offset(pud, addr); 547 pmd = pmd_offset(pud, addr);
538 next = pmd_addr_end(addr, end); 548 next = pmd_addr_end(addr, end);
539 if (!is_hugepd(pmd)) { 549 if (!is_hugepd(__hugepd(pmd_val(*pmd)))) {
540 /* 550 /*
541 * if it is not hugepd pointer, we should already find 551 * if it is not hugepd pointer, we should already find
542 * it cleared. 552 * it cleared.
@@ -585,7 +595,7 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
585 do { 595 do {
586 pud = pud_offset(pgd, addr); 596 pud = pud_offset(pgd, addr);
587 next = pud_addr_end(addr, end); 597 next = pud_addr_end(addr, end);
588 if (!is_hugepd(pud)) { 598 if (!is_hugepd(__hugepd(pud_val(*pud)))) {
589 if (pud_none_or_clear_bad(pud)) 599 if (pud_none_or_clear_bad(pud))
590 continue; 600 continue;
591 hugetlb_free_pmd_range(tlb, pud, addr, next, floor, 601 hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
@@ -651,7 +661,7 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb,
651 do { 661 do {
652 next = pgd_addr_end(addr, end); 662 next = pgd_addr_end(addr, end);
653 pgd = pgd_offset(tlb->mm, addr); 663 pgd = pgd_offset(tlb->mm, addr);
654 if (!is_hugepd(pgd)) { 664 if (!is_hugepd(__hugepd(pgd_val(*pgd)))) {
655 if (pgd_none_or_clear_bad(pgd)) 665 if (pgd_none_or_clear_bad(pgd))
656 continue; 666 continue;
657 hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling); 667 hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
@@ -711,12 +721,11 @@ static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
711 return (__boundary - 1 < end - 1) ? __boundary : end; 721 return (__boundary - 1 < end - 1) ? __boundary : end;
712} 722}
713 723
714int gup_hugepd(hugepd_t *hugepd, unsigned pdshift, 724int gup_huge_pd(hugepd_t hugepd, unsigned long addr, unsigned pdshift,
715 unsigned long addr, unsigned long end, 725 unsigned long end, int write, struct page **pages, int *nr)
716 int write, struct page **pages, int *nr)
717{ 726{
718 pte_t *ptep; 727 pte_t *ptep;
719 unsigned long sz = 1UL << hugepd_shift(*hugepd); 728 unsigned long sz = 1UL << hugepd_shift(hugepd);
720 unsigned long next; 729 unsigned long next;
721 730
722 ptep = hugepte_offset(hugepd, addr, pdshift); 731 ptep = hugepte_offset(hugepd, addr, pdshift);
@@ -959,7 +968,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
959 else if (pgd_huge(pgd)) { 968 else if (pgd_huge(pgd)) {
960 ret_pte = (pte_t *) pgdp; 969 ret_pte = (pte_t *) pgdp;
961 goto out; 970 goto out;
962 } else if (is_hugepd(&pgd)) 971 } else if (is_hugepd(__hugepd(pgd_val(pgd))))
963 hpdp = (hugepd_t *)&pgd; 972 hpdp = (hugepd_t *)&pgd;
964 else { 973 else {
965 /* 974 /*
@@ -976,7 +985,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
976 else if (pud_huge(pud)) { 985 else if (pud_huge(pud)) {
977 ret_pte = (pte_t *) pudp; 986 ret_pte = (pte_t *) pudp;
978 goto out; 987 goto out;
979 } else if (is_hugepd(&pud)) 988 } else if (is_hugepd(__hugepd(pud_val(pud))))
980 hpdp = (hugepd_t *)&pud; 989 hpdp = (hugepd_t *)&pud;
981 else { 990 else {
982 pdshift = PMD_SHIFT; 991 pdshift = PMD_SHIFT;
@@ -997,7 +1006,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
997 if (pmd_huge(pmd) || pmd_large(pmd)) { 1006 if (pmd_huge(pmd) || pmd_large(pmd)) {
998 ret_pte = (pte_t *) pmdp; 1007 ret_pte = (pte_t *) pmdp;
999 goto out; 1008 goto out;
1000 } else if (is_hugepd(&pmd)) 1009 } else if (is_hugepd(__hugepd(pmd_val(pmd))))
1001 hpdp = (hugepd_t *)&pmd; 1010 hpdp = (hugepd_t *)&pmd;
1002 else 1011 else
1003 return pte_offset_kernel(&pmd, ea); 1012 return pte_offset_kernel(&pmd, ea);
@@ -1006,7 +1015,7 @@ pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, unsigned *shift
1006 if (!hpdp) 1015 if (!hpdp)
1007 return NULL; 1016 return NULL;
1008 1017
1009 ret_pte = hugepte_offset(hpdp, ea, pdshift); 1018 ret_pte = hugepte_offset(*hpdp, ea, pdshift);
1010 pdshift = hugepd_shift(*hpdp); 1019 pdshift = hugepd_shift(*hpdp);
1011out: 1020out:
1012 if (shift) 1021 if (shift)
@@ -1036,14 +1045,6 @@ int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
1036 if ((pte_val(pte) & mask) != mask) 1045 if ((pte_val(pte) & mask) != mask)
1037 return 0; 1046 return 0;
1038 1047
1039#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1040 /*
1041 * check for splitting here
1042 */
1043 if (pmd_trans_splitting(pte_pmd(pte)))
1044 return 0;
1045#endif
1046
1047 /* hugepages are never "special" */ 1048 /* hugepages are never "special" */
1048 VM_BUG_ON(!pfn_valid(pte_pfn(pte))); 1049 VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
1049 1050
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 415a51b028b9..a10be665b645 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -26,7 +26,6 @@
26#include <linux/mm.h> 26#include <linux/mm.h>
27#include <linux/stddef.h> 27#include <linux/stddef.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/bootmem.h>
30#include <linux/highmem.h> 29#include <linux/highmem.h>
31#include <linux/initrd.h> 30#include <linux/initrd.h>
32#include <linux/pagemap.h> 31#include <linux/pagemap.h>
@@ -195,15 +194,6 @@ void __init MMU_init(void)
195 memblock_set_current_limit(lowmem_end_addr); 194 memblock_set_current_limit(lowmem_end_addr);
196} 195}
197 196
198/* This is only called until mem_init is done. */
199void __init *early_get_page(void)
200{
201 if (init_bootmem_done)
202 return alloc_bootmem_pages(PAGE_SIZE);
203 else
204 return __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
205}
206
207#ifdef CONFIG_8xx /* No 8xx specific .c file to put that in ... */ 197#ifdef CONFIG_8xx /* No 8xx specific .c file to put that in ... */
208void setup_initial_memory_limit(phys_addr_t first_memblock_base, 198void setup_initial_memory_limit(phys_addr_t first_memblock_base,
209 phys_addr_t first_memblock_size) 199 phys_addr_t first_memblock_size)
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 3481556a1880..10471f9bb63f 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -34,7 +34,6 @@
34#include <linux/vmalloc.h> 34#include <linux/vmalloc.h>
35#include <linux/init.h> 35#include <linux/init.h>
36#include <linux/delay.h> 36#include <linux/delay.h>
37#include <linux/bootmem.h>
38#include <linux/highmem.h> 37#include <linux/highmem.h>
39#include <linux/idr.h> 38#include <linux/idr.h>
40#include <linux/nodemask.h> 39#include <linux/nodemask.h>
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 8ebaac75c940..b7285a5870f8 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -35,6 +35,7 @@
35#include <linux/memblock.h> 35#include <linux/memblock.h>
36#include <linux/hugetlb.h> 36#include <linux/hugetlb.h>
37#include <linux/slab.h> 37#include <linux/slab.h>
38#include <linux/vmalloc.h>
38 39
39#include <asm/pgalloc.h> 40#include <asm/pgalloc.h>
40#include <asm/prom.h> 41#include <asm/prom.h>
@@ -60,7 +61,6 @@
60#define CPU_FTR_NOEXECUTE 0 61#define CPU_FTR_NOEXECUTE 0
61#endif 62#endif
62 63
63int init_bootmem_done;
64int mem_init_done; 64int mem_init_done;
65unsigned long long memory_limit; 65unsigned long long memory_limit;
66 66
@@ -144,8 +144,17 @@ int arch_remove_memory(u64 start, u64 size)
144 144
145 zone = page_zone(pfn_to_page(start_pfn)); 145 zone = page_zone(pfn_to_page(start_pfn));
146 ret = __remove_pages(zone, start_pfn, nr_pages); 146 ret = __remove_pages(zone, start_pfn, nr_pages);
147 if (!ret && (ppc_md.remove_memory)) 147 if (ret)
148 ret = ppc_md.remove_memory(start, size); 148 return ret;
149
150 /* Remove htab bolted mappings for this section of memory */
151 start = (unsigned long)__va(start);
152 ret = remove_section_mapping(start, start + size);
153
154 /* Ensure all vmalloc mappings are flushed in case they also
155 * hit that section of memory
156 */
157 vm_unmap_aliases();
149 158
150 return ret; 159 return ret;
151} 160}
@@ -180,70 +189,23 @@ walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages,
180} 189}
181EXPORT_SYMBOL_GPL(walk_system_ram_range); 190EXPORT_SYMBOL_GPL(walk_system_ram_range);
182 191
183/*
184 * Initialize the bootmem system and give it all the memory we
185 * have available. If we are using highmem, we only put the
186 * lowmem into the bootmem system.
187 */
188#ifndef CONFIG_NEED_MULTIPLE_NODES 192#ifndef CONFIG_NEED_MULTIPLE_NODES
189void __init do_init_bootmem(void) 193void __init initmem_init(void)
190{ 194{
191 unsigned long start, bootmap_pages;
192 unsigned long total_pages;
193 struct memblock_region *reg;
194 int boot_mapsize;
195
196 max_low_pfn = max_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT; 195 max_low_pfn = max_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT;
197 total_pages = (memblock_end_of_DRAM() - memstart_addr) >> PAGE_SHIFT; 196 min_low_pfn = MEMORY_START >> PAGE_SHIFT;
198#ifdef CONFIG_HIGHMEM 197#ifdef CONFIG_HIGHMEM
199 total_pages = total_lowmem >> PAGE_SHIFT;
200 max_low_pfn = lowmem_end_addr >> PAGE_SHIFT; 198 max_low_pfn = lowmem_end_addr >> PAGE_SHIFT;
201#endif 199#endif
202 200
203 /*
204 * Find an area to use for the bootmem bitmap. Calculate the size of
205 * bitmap required as (Total Memory) / PAGE_SIZE / BITS_PER_BYTE.
206 * Add 1 additional page in case the address isn't page-aligned.
207 */
208 bootmap_pages = bootmem_bootmap_pages(total_pages);
209
210 start = memblock_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
211
212 min_low_pfn = MEMORY_START >> PAGE_SHIFT;
213 boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn);
214
215 /* Place all memblock_regions in the same node and merge contiguous 201 /* Place all memblock_regions in the same node and merge contiguous
216 * memblock_regions 202 * memblock_regions
217 */ 203 */
218 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0); 204 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
219 205
220 /* Add all physical memory to the bootmem map, mark each area
221 * present.
222 */
223#ifdef CONFIG_HIGHMEM
224 free_bootmem_with_active_regions(0, lowmem_end_addr >> PAGE_SHIFT);
225
226 /* reserve the sections we're already using */
227 for_each_memblock(reserved, reg) {
228 unsigned long top = reg->base + reg->size - 1;
229 if (top < lowmem_end_addr)
230 reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
231 else if (reg->base < lowmem_end_addr) {
232 unsigned long trunc_size = lowmem_end_addr - reg->base;
233 reserve_bootmem(reg->base, trunc_size, BOOTMEM_DEFAULT);
234 }
235 }
236#else
237 free_bootmem_with_active_regions(0, max_pfn);
238
239 /* reserve the sections we're already using */
240 for_each_memblock(reserved, reg)
241 reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
242#endif
243 /* XXX need to clip this if using highmem? */ 206 /* XXX need to clip this if using highmem? */
244 sparse_memory_present_with_active_regions(0); 207 sparse_memory_present_with_active_regions(0);
245 208 sparse_init();
246 init_bootmem_done = 1;
247} 209}
248 210
249/* mark pages that don't exist as nosave */ 211/* mark pages that don't exist as nosave */
@@ -359,14 +321,6 @@ void __init paging_init(void)
359 mark_nonram_nosave(); 321 mark_nonram_nosave();
360} 322}
361 323
362static void __init register_page_bootmem_info(void)
363{
364 int i;
365
366 for_each_online_node(i)
367 register_page_bootmem_info_node(NODE_DATA(i));
368}
369
370void __init mem_init(void) 324void __init mem_init(void)
371{ 325{
372 /* 326 /*
@@ -379,7 +333,6 @@ void __init mem_init(void)
379 swiotlb_init(0); 333 swiotlb_init(0);
380#endif 334#endif
381 335
382 register_page_bootmem_info();
383 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); 336 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
384 set_max_mapnr(max_pfn); 337 set_max_mapnr(max_pfn);
385 free_all_bootmem(); 338 free_all_bootmem();
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index 928ebe79668b..9cba6cba2e50 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -421,12 +421,12 @@ void __init mmu_context_init(void)
421 /* 421 /*
422 * Allocate the maps used by context management 422 * Allocate the maps used by context management
423 */ 423 */
424 context_map = alloc_bootmem(CTX_MAP_SIZE); 424 context_map = memblock_virt_alloc(CTX_MAP_SIZE, 0);
425 context_mm = alloc_bootmem(sizeof(void *) * (last_context + 1)); 425 context_mm = memblock_virt_alloc(sizeof(void *) * (last_context + 1), 0);
426#ifndef CONFIG_SMP 426#ifndef CONFIG_SMP
427 stale_map[0] = alloc_bootmem(CTX_MAP_SIZE); 427 stale_map[0] = memblock_virt_alloc(CTX_MAP_SIZE, 0);
428#else 428#else
429 stale_map[boot_cpuid] = alloc_bootmem(CTX_MAP_SIZE); 429 stale_map[boot_cpuid] = memblock_virt_alloc(CTX_MAP_SIZE, 0);
430 430
431 register_cpu_notifier(&mmu_context_cpu_nb); 431 register_cpu_notifier(&mmu_context_cpu_nb);
432#endif 432#endif
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 9fe6002c1d5a..0257a7d659ef 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -134,28 +134,6 @@ static int __init fake_numa_create_new_node(unsigned long end_pfn,
134 return 0; 134 return 0;
135} 135}
136 136
137/*
138 * get_node_active_region - Return active region containing pfn
139 * Active range returned is empty if none found.
140 * @pfn: The page to return the region for
141 * @node_ar: Returned set to the active region containing @pfn
142 */
143static void __init get_node_active_region(unsigned long pfn,
144 struct node_active_region *node_ar)
145{
146 unsigned long start_pfn, end_pfn;
147 int i, nid;
148
149 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, &nid) {
150 if (pfn >= start_pfn && pfn < end_pfn) {
151 node_ar->nid = nid;
152 node_ar->start_pfn = start_pfn;
153 node_ar->end_pfn = end_pfn;
154 break;
155 }
156 }
157}
158
159static void reset_numa_cpu_lookup_table(void) 137static void reset_numa_cpu_lookup_table(void)
160{ 138{
161 unsigned int cpu; 139 unsigned int cpu;
@@ -928,134 +906,48 @@ static void __init dump_numa_memory_topology(void)
928 } 906 }
929} 907}
930 908
931/*
932 * Allocate some memory, satisfying the memblock or bootmem allocator where
933 * required. nid is the preferred node and end is the physical address of
934 * the highest address in the node.
935 *
936 * Returns the virtual address of the memory.
937 */
938static void __init *careful_zallocation(int nid, unsigned long size,
939 unsigned long align,
940 unsigned long end_pfn)
941{
942 void *ret;
943 int new_nid;
944 unsigned long ret_paddr;
945
946 ret_paddr = __memblock_alloc_base(size, align, end_pfn << PAGE_SHIFT);
947
948 /* retry over all memory */
949 if (!ret_paddr)
950 ret_paddr = __memblock_alloc_base(size, align, memblock_end_of_DRAM());
951
952 if (!ret_paddr)
953 panic("numa.c: cannot allocate %lu bytes for node %d",
954 size, nid);
955
956 ret = __va(ret_paddr);
957
958 /*
959 * We initialize the nodes in numeric order: 0, 1, 2...
960 * and hand over control from the MEMBLOCK allocator to the
961 * bootmem allocator. If this function is called for
962 * node 5, then we know that all nodes <5 are using the
963 * bootmem allocator instead of the MEMBLOCK allocator.
964 *
965 * So, check the nid from which this allocation came
966 * and double check to see if we need to use bootmem
967 * instead of the MEMBLOCK. We don't free the MEMBLOCK memory
968 * since it would be useless.
969 */
970 new_nid = early_pfn_to_nid(ret_paddr >> PAGE_SHIFT);
971 if (new_nid < nid) {
972 ret = __alloc_bootmem_node(NODE_DATA(new_nid),
973 size, align, 0);
974
975 dbg("alloc_bootmem %p %lx\n", ret, size);
976 }
977
978 memset(ret, 0, size);
979 return ret;
980}
981
982static struct notifier_block ppc64_numa_nb = { 909static struct notifier_block ppc64_numa_nb = {
983 .notifier_call = cpu_numa_callback, 910 .notifier_call = cpu_numa_callback,
984 .priority = 1 /* Must run before sched domains notifier. */ 911 .priority = 1 /* Must run before sched domains notifier. */
985}; 912};
986 913
987static void __init mark_reserved_regions_for_nid(int nid) 914/* Initialize NODE_DATA for a node on the local memory */
915static void __init setup_node_data(int nid, u64 start_pfn, u64 end_pfn)
988{ 916{
989 struct pglist_data *node = NODE_DATA(nid); 917 u64 spanned_pages = end_pfn - start_pfn;
990 struct memblock_region *reg; 918 const size_t nd_size = roundup(sizeof(pg_data_t), SMP_CACHE_BYTES);
991 919 u64 nd_pa;
992 for_each_memblock(reserved, reg) { 920 void *nd;
993 unsigned long physbase = reg->base; 921 int tnid;
994 unsigned long size = reg->size; 922
995 unsigned long start_pfn = physbase >> PAGE_SHIFT; 923 if (spanned_pages)
996 unsigned long end_pfn = PFN_UP(physbase + size); 924 pr_info("Initmem setup node %d [mem %#010Lx-%#010Lx]\n",
997 struct node_active_region node_ar; 925 nid, start_pfn << PAGE_SHIFT,
998 unsigned long node_end_pfn = pgdat_end_pfn(node); 926 (end_pfn << PAGE_SHIFT) - 1);
999 927 else
1000 /* 928 pr_info("Initmem setup node %d\n", nid);
1001 * Check to make sure that this memblock.reserved area is 929
1002 * within the bounds of the node that we care about. 930 nd_pa = memblock_alloc_try_nid(nd_size, SMP_CACHE_BYTES, nid);
1003 * Checking the nid of the start and end points is not 931 nd = __va(nd_pa);
1004 * sufficient because the reserved area could span the 932
1005 * entire node. 933 /* report and initialize */
1006 */ 934 pr_info(" NODE_DATA [mem %#010Lx-%#010Lx]\n",
1007 if (end_pfn <= node->node_start_pfn || 935 nd_pa, nd_pa + nd_size - 1);
1008 start_pfn >= node_end_pfn) 936 tnid = early_pfn_to_nid(nd_pa >> PAGE_SHIFT);
1009 continue; 937 if (tnid != nid)
1010 938 pr_info(" NODE_DATA(%d) on node %d\n", nid, tnid);
1011 get_node_active_region(start_pfn, &node_ar); 939
1012 while (start_pfn < end_pfn && 940 node_data[nid] = nd;
1013 node_ar.start_pfn < node_ar.end_pfn) { 941 memset(NODE_DATA(nid), 0, sizeof(pg_data_t));
1014 unsigned long reserve_size = size; 942 NODE_DATA(nid)->node_id = nid;
1015 /* 943 NODE_DATA(nid)->node_start_pfn = start_pfn;
1016 * if reserved region extends past active region 944 NODE_DATA(nid)->node_spanned_pages = spanned_pages;
1017 * then trim size to active region
1018 */
1019 if (end_pfn > node_ar.end_pfn)
1020 reserve_size = (node_ar.end_pfn << PAGE_SHIFT)
1021 - physbase;
1022 /*
1023 * Only worry about *this* node, others may not
1024 * yet have valid NODE_DATA().
1025 */
1026 if (node_ar.nid == nid) {
1027 dbg("reserve_bootmem %lx %lx nid=%d\n",
1028 physbase, reserve_size, node_ar.nid);
1029 reserve_bootmem_node(NODE_DATA(node_ar.nid),
1030 physbase, reserve_size,
1031 BOOTMEM_DEFAULT);
1032 }
1033 /*
1034 * if reserved region is contained in the active region
1035 * then done.
1036 */
1037 if (end_pfn <= node_ar.end_pfn)
1038 break;
1039
1040 /*
1041 * reserved region extends past the active region
1042 * get next active region that contains this
1043 * reserved region
1044 */
1045 start_pfn = node_ar.end_pfn;
1046 physbase = start_pfn << PAGE_SHIFT;
1047 size = size - reserve_size;
1048 get_node_active_region(start_pfn, &node_ar);
1049 }
1050 }
1051} 945}
1052 946
1053 947void __init initmem_init(void)
1054void __init do_init_bootmem(void)
1055{ 948{
1056 int nid, cpu; 949 int nid, cpu;
1057 950
1058 min_low_pfn = 0;
1059 max_low_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT; 951 max_low_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT;
1060 max_pfn = max_low_pfn; 952 max_pfn = max_low_pfn;
1061 953
@@ -1064,64 +956,18 @@ void __init do_init_bootmem(void)
1064 else 956 else
1065 dump_numa_memory_topology(); 957 dump_numa_memory_topology();
1066 958
959 memblock_dump_all();
960
1067 for_each_online_node(nid) { 961 for_each_online_node(nid) {
1068 unsigned long start_pfn, end_pfn; 962 unsigned long start_pfn, end_pfn;
1069 void *bootmem_vaddr;
1070 unsigned long bootmap_pages;
1071 963
1072 get_pfn_range_for_nid(nid, &start_pfn, &end_pfn); 964 get_pfn_range_for_nid(nid, &start_pfn, &end_pfn);
1073 965 setup_node_data(nid, start_pfn, end_pfn);
1074 /*
1075 * Allocate the node structure node local if possible
1076 *
1077 * Be careful moving this around, as it relies on all
1078 * previous nodes' bootmem to be initialized and have
1079 * all reserved areas marked.
1080 */
1081 NODE_DATA(nid) = careful_zallocation(nid,
1082 sizeof(struct pglist_data),
1083 SMP_CACHE_BYTES, end_pfn);
1084
1085 dbg("node %d\n", nid);
1086 dbg("NODE_DATA() = %p\n", NODE_DATA(nid));
1087
1088 NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
1089 NODE_DATA(nid)->node_start_pfn = start_pfn;
1090 NODE_DATA(nid)->node_spanned_pages = end_pfn - start_pfn;
1091
1092 if (NODE_DATA(nid)->node_spanned_pages == 0)
1093 continue;
1094
1095 dbg("start_paddr = %lx\n", start_pfn << PAGE_SHIFT);
1096 dbg("end_paddr = %lx\n", end_pfn << PAGE_SHIFT);
1097
1098 bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
1099 bootmem_vaddr = careful_zallocation(nid,
1100 bootmap_pages << PAGE_SHIFT,
1101 PAGE_SIZE, end_pfn);
1102
1103 dbg("bootmap_vaddr = %p\n", bootmem_vaddr);
1104
1105 init_bootmem_node(NODE_DATA(nid),
1106 __pa(bootmem_vaddr) >> PAGE_SHIFT,
1107 start_pfn, end_pfn);
1108
1109 free_bootmem_with_active_regions(nid, end_pfn);
1110 /*
1111 * Be very careful about moving this around. Future
1112 * calls to careful_zallocation() depend on this getting
1113 * done correctly.
1114 */
1115 mark_reserved_regions_for_nid(nid);
1116 sparse_memory_present_with_active_regions(nid); 966 sparse_memory_present_with_active_regions(nid);
1117 } 967 }
1118 968
1119 init_bootmem_done = 1; 969 sparse_init();
1120 970
1121 /*
1122 * Now bootmem is initialised we can create the node to cpumask
1123 * lookup tables and setup the cpu callback to populate them.
1124 */
1125 setup_node_to_cpumask_map(); 971 setup_node_to_cpumask_map();
1126 972
1127 reset_numa_cpu_lookup_table(); 973 reset_numa_cpu_lookup_table();
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index cf11342bf519..d545b1231594 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -100,12 +100,11 @@ __init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long add
100{ 100{
101 pte_t *pte; 101 pte_t *pte;
102 extern int mem_init_done; 102 extern int mem_init_done;
103 extern void *early_get_page(void);
104 103
105 if (mem_init_done) { 104 if (mem_init_done) {
106 pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); 105 pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
107 } else { 106 } else {
108 pte = (pte_t *)early_get_page(); 107 pte = __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
109 if (pte) 108 if (pte)
110 clear_page(pte); 109 clear_page(pte);
111 } 110 }
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index c8d709ab489d..4fe5f64cc179 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -33,9 +33,9 @@
33#include <linux/swap.h> 33#include <linux/swap.h>
34#include <linux/stddef.h> 34#include <linux/stddef.h>
35#include <linux/vmalloc.h> 35#include <linux/vmalloc.h>
36#include <linux/bootmem.h>
37#include <linux/memblock.h> 36#include <linux/memblock.h>
38#include <linux/slab.h> 37#include <linux/slab.h>
38#include <linux/hugetlb.h>
39 39
40#include <asm/pgalloc.h> 40#include <asm/pgalloc.h>
41#include <asm/page.h> 41#include <asm/page.h>
@@ -51,6 +51,7 @@
51#include <asm/cputable.h> 51#include <asm/cputable.h>
52#include <asm/sections.h> 52#include <asm/sections.h>
53#include <asm/firmware.h> 53#include <asm/firmware.h>
54#include <asm/dma.h>
54 55
55#include "mmu_decl.h" 56#include "mmu_decl.h"
56 57
@@ -75,11 +76,7 @@ static __ref void *early_alloc_pgtable(unsigned long size)
75{ 76{
76 void *pt; 77 void *pt;
77 78
78 if (init_bootmem_done) 79 pt = __va(memblock_alloc_base(size, size, __pa(MAX_DMA_ADDRESS)));
79 pt = __alloc_bootmem(size, size, __pa(MAX_DMA_ADDRESS));
80 else
81 pt = __va(memblock_alloc_base(size, size,
82 __pa(MAX_DMA_ADDRESS)));
83 memset(pt, 0, size); 80 memset(pt, 0, size);
84 81
85 return pt; 82 return pt;
@@ -113,10 +110,6 @@ int map_kernel_page(unsigned long ea, unsigned long pa, int flags)
113 __pgprot(flags))); 110 __pgprot(flags)));
114 } else { 111 } else {
115#ifdef CONFIG_PPC_MMU_NOHASH 112#ifdef CONFIG_PPC_MMU_NOHASH
116 /* Warning ! This will blow up if bootmem is not initialized
117 * which our ppc64 code is keen to do that, we'll need to
118 * fix it and/or be more careful
119 */
120 pgdp = pgd_offset_k(ea); 113 pgdp = pgd_offset_k(ea);
121#ifdef PUD_TABLE_SIZE 114#ifdef PUD_TABLE_SIZE
122 if (pgd_none(*pgdp)) { 115 if (pgd_none(*pgdp)) {
@@ -352,16 +345,31 @@ EXPORT_SYMBOL(iounmap);
352EXPORT_SYMBOL(__iounmap); 345EXPORT_SYMBOL(__iounmap);
353EXPORT_SYMBOL(__iounmap_at); 346EXPORT_SYMBOL(__iounmap_at);
354 347
348#ifndef __PAGETABLE_PUD_FOLDED
349/* 4 level page table */
350struct page *pgd_page(pgd_t pgd)
351{
352 if (pgd_huge(pgd))
353 return pte_page(pgd_pte(pgd));
354 return virt_to_page(pgd_page_vaddr(pgd));
355}
356#endif
357
358struct page *pud_page(pud_t pud)
359{
360 if (pud_huge(pud))
361 return pte_page(pud_pte(pud));
362 return virt_to_page(pud_page_vaddr(pud));
363}
364
355/* 365/*
356 * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags 366 * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
357 * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address. 367 * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
358 */ 368 */
359struct page *pmd_page(pmd_t pmd) 369struct page *pmd_page(pmd_t pmd)
360{ 370{
361#ifdef CONFIG_TRANSPARENT_HUGEPAGE 371 if (pmd_trans_huge(pmd) || pmd_huge(pmd))
362 if (pmd_trans_huge(pmd))
363 return pfn_to_page(pmd_pfn(pmd)); 372 return pfn_to_page(pmd_pfn(pmd));
364#endif
365 return virt_to_page(pmd_page_vaddr(pmd)); 373 return virt_to_page(pmd_page_vaddr(pmd));
366} 374}
367 375
@@ -731,29 +739,15 @@ void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
731void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr, 739void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
732 pmd_t *pmdp, unsigned long old_pmd) 740 pmd_t *pmdp, unsigned long old_pmd)
733{ 741{
734 int ssize, i; 742 int ssize;
735 unsigned long s_addr; 743 unsigned int psize;
736 int max_hpte_count; 744 unsigned long vsid;
737 unsigned int psize, valid; 745 unsigned long flags = 0;
738 unsigned char *hpte_slot_array; 746 const struct cpumask *tmp;
739 unsigned long hidx, vpn, vsid, hash, shift, slot;
740
741 /*
742 * Flush all the hptes mapping this hugepage
743 */
744 s_addr = addr & HPAGE_PMD_MASK;
745 hpte_slot_array = get_hpte_slot_array(pmdp);
746 /*
747 * IF we try to do a HUGE PTE update after a withdraw is done.
748 * we will find the below NULL. This happens when we do
749 * split_huge_page_pmd
750 */
751 if (!hpte_slot_array)
752 return;
753 747
754 /* get the base page size,vsid and segment size */ 748 /* get the base page size,vsid and segment size */
755#ifdef CONFIG_DEBUG_VM 749#ifdef CONFIG_DEBUG_VM
756 psize = get_slice_psize(mm, s_addr); 750 psize = get_slice_psize(mm, addr);
757 BUG_ON(psize == MMU_PAGE_16M); 751 BUG_ON(psize == MMU_PAGE_16M);
758#endif 752#endif
759 if (old_pmd & _PAGE_COMBO) 753 if (old_pmd & _PAGE_COMBO)
@@ -761,46 +755,20 @@ void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
761 else 755 else
762 psize = MMU_PAGE_64K; 756 psize = MMU_PAGE_64K;
763 757
764 if (!is_kernel_addr(s_addr)) { 758 if (!is_kernel_addr(addr)) {
765 ssize = user_segment_size(s_addr); 759 ssize = user_segment_size(addr);
766 vsid = get_vsid(mm->context.id, s_addr, ssize); 760 vsid = get_vsid(mm->context.id, addr, ssize);
767 WARN_ON(vsid == 0); 761 WARN_ON(vsid == 0);
768 } else { 762 } else {
769 vsid = get_kernel_vsid(s_addr, mmu_kernel_ssize); 763 vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
770 ssize = mmu_kernel_ssize; 764 ssize = mmu_kernel_ssize;
771 } 765 }
772 766
773 if (ppc_md.hugepage_invalidate) 767 tmp = cpumask_of(smp_processor_id());
774 return ppc_md.hugepage_invalidate(vsid, s_addr, 768 if (cpumask_equal(mm_cpumask(mm), tmp))
775 hpte_slot_array, 769 flags |= HPTE_LOCAL_UPDATE;
776 psize, ssize); 770
777 /* 771 return flush_hash_hugepage(vsid, addr, pmdp, psize, ssize, flags);
778 * No bluk hpte removal support, invalidate each entry
779 */
780 shift = mmu_psize_defs[psize].shift;
781 max_hpte_count = HPAGE_PMD_SIZE >> shift;
782 for (i = 0; i < max_hpte_count; i++) {
783 /*
784 * 8 bits per each hpte entries
785 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
786 */
787 valid = hpte_valid(hpte_slot_array, i);
788 if (!valid)
789 continue;
790 hidx = hpte_hash_index(hpte_slot_array, i);
791
792 /* get the vpn */
793 addr = s_addr + (i * (1ul << shift));
794 vpn = hpt_vpn(addr, vsid, ssize);
795 hash = hpt_hash(vpn, shift, ssize);
796 if (hidx & _PTEIDX_SECONDARY)
797 hash = ~hash;
798
799 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
800 slot += hidx & _PTEIDX_GROUP_IX;
801 ppc_md.hpte_invalidate(slot, vpn, psize,
802 MMU_PAGE_16M, ssize, 0);
803 }
804} 772}
805 773
806static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot) 774static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot)
diff --git a/arch/powerpc/oprofile/backtrace.c b/arch/powerpc/oprofile/backtrace.c
index 6adf55fa5d88..ecc66d5f02c9 100644
--- a/arch/powerpc/oprofile/backtrace.c
+++ b/arch/powerpc/oprofile/backtrace.c
@@ -10,7 +10,7 @@
10#include <linux/oprofile.h> 10#include <linux/oprofile.h>
11#include <linux/sched.h> 11#include <linux/sched.h>
12#include <asm/processor.h> 12#include <asm/processor.h>
13#include <asm/uaccess.h> 13#include <linux/uaccess.h>
14#include <asm/compat.h> 14#include <asm/compat.h>
15#include <asm/oprofile_impl.h> 15#include <asm/oprofile_impl.h>
16 16
@@ -105,6 +105,7 @@ void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth)
105 first_frame = 0; 105 first_frame = 0;
106 } 106 }
107 } else { 107 } else {
108 pagefault_disable();
108#ifdef CONFIG_PPC64 109#ifdef CONFIG_PPC64
109 if (!is_32bit_task()) { 110 if (!is_32bit_task()) {
110 while (depth--) { 111 while (depth--) {
@@ -113,7 +114,7 @@ void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth)
113 break; 114 break;
114 first_frame = 0; 115 first_frame = 0;
115 } 116 }
116 117 pagefault_enable();
117 return; 118 return;
118 } 119 }
119#endif 120#endif
@@ -124,5 +125,6 @@ void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth)
124 break; 125 break;
125 first_frame = 0; 126 first_frame = 0;
126 } 127 }
128 pagefault_enable();
127 } 129 }
128} 130}
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index a6995d4e93d4..7c4f6690533a 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -339,7 +339,7 @@ static void power_pmu_bhrb_reset(void)
339 339
340static void power_pmu_bhrb_enable(struct perf_event *event) 340static void power_pmu_bhrb_enable(struct perf_event *event)
341{ 341{
342 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); 342 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
343 343
344 if (!ppmu->bhrb_nr) 344 if (!ppmu->bhrb_nr)
345 return; 345 return;
@@ -354,7 +354,7 @@ static void power_pmu_bhrb_enable(struct perf_event *event)
354 354
355static void power_pmu_bhrb_disable(struct perf_event *event) 355static void power_pmu_bhrb_disable(struct perf_event *event)
356{ 356{
357 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); 357 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
358 358
359 if (!ppmu->bhrb_nr) 359 if (!ppmu->bhrb_nr)
360 return; 360 return;
@@ -1144,7 +1144,7 @@ static void power_pmu_disable(struct pmu *pmu)
1144 if (!ppmu) 1144 if (!ppmu)
1145 return; 1145 return;
1146 local_irq_save(flags); 1146 local_irq_save(flags);
1147 cpuhw = &__get_cpu_var(cpu_hw_events); 1147 cpuhw = this_cpu_ptr(&cpu_hw_events);
1148 1148
1149 if (!cpuhw->disabled) { 1149 if (!cpuhw->disabled) {
1150 /* 1150 /*
@@ -1211,7 +1211,7 @@ static void power_pmu_enable(struct pmu *pmu)
1211 return; 1211 return;
1212 local_irq_save(flags); 1212 local_irq_save(flags);
1213 1213
1214 cpuhw = &__get_cpu_var(cpu_hw_events); 1214 cpuhw = this_cpu_ptr(&cpu_hw_events);
1215 if (!cpuhw->disabled) 1215 if (!cpuhw->disabled)
1216 goto out; 1216 goto out;
1217 1217
@@ -1403,7 +1403,7 @@ static int power_pmu_add(struct perf_event *event, int ef_flags)
1403 * Add the event to the list (if there is room) 1403 * Add the event to the list (if there is room)
1404 * and check whether the total set is still feasible. 1404 * and check whether the total set is still feasible.
1405 */ 1405 */
1406 cpuhw = &__get_cpu_var(cpu_hw_events); 1406 cpuhw = this_cpu_ptr(&cpu_hw_events);
1407 n0 = cpuhw->n_events; 1407 n0 = cpuhw->n_events;
1408 if (n0 >= ppmu->n_counter) 1408 if (n0 >= ppmu->n_counter)
1409 goto out; 1409 goto out;
@@ -1469,7 +1469,7 @@ static void power_pmu_del(struct perf_event *event, int ef_flags)
1469 1469
1470 power_pmu_read(event); 1470 power_pmu_read(event);
1471 1471
1472 cpuhw = &__get_cpu_var(cpu_hw_events); 1472 cpuhw = this_cpu_ptr(&cpu_hw_events);
1473 for (i = 0; i < cpuhw->n_events; ++i) { 1473 for (i = 0; i < cpuhw->n_events; ++i) {
1474 if (event == cpuhw->event[i]) { 1474 if (event == cpuhw->event[i]) {
1475 while (++i < cpuhw->n_events) { 1475 while (++i < cpuhw->n_events) {
@@ -1575,7 +1575,7 @@ static void power_pmu_stop(struct perf_event *event, int ef_flags)
1575 */ 1575 */
1576static void power_pmu_start_txn(struct pmu *pmu) 1576static void power_pmu_start_txn(struct pmu *pmu)
1577{ 1577{
1578 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); 1578 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
1579 1579
1580 perf_pmu_disable(pmu); 1580 perf_pmu_disable(pmu);
1581 cpuhw->group_flag |= PERF_EVENT_TXN; 1581 cpuhw->group_flag |= PERF_EVENT_TXN;
@@ -1589,7 +1589,7 @@ static void power_pmu_start_txn(struct pmu *pmu)
1589 */ 1589 */
1590static void power_pmu_cancel_txn(struct pmu *pmu) 1590static void power_pmu_cancel_txn(struct pmu *pmu)
1591{ 1591{
1592 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); 1592 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
1593 1593
1594 cpuhw->group_flag &= ~PERF_EVENT_TXN; 1594 cpuhw->group_flag &= ~PERF_EVENT_TXN;
1595 perf_pmu_enable(pmu); 1595 perf_pmu_enable(pmu);
@@ -1607,7 +1607,7 @@ static int power_pmu_commit_txn(struct pmu *pmu)
1607 1607
1608 if (!ppmu) 1608 if (!ppmu)
1609 return -EAGAIN; 1609 return -EAGAIN;
1610 cpuhw = &__get_cpu_var(cpu_hw_events); 1610 cpuhw = this_cpu_ptr(&cpu_hw_events);
1611 n = cpuhw->n_events; 1611 n = cpuhw->n_events;
1612 if (check_excludes(cpuhw->event, cpuhw->flags, 0, n)) 1612 if (check_excludes(cpuhw->event, cpuhw->flags, 0, n))
1613 return -EAGAIN; 1613 return -EAGAIN;
@@ -1964,7 +1964,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
1964 1964
1965 if (event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK) { 1965 if (event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK) {
1966 struct cpu_hw_events *cpuhw; 1966 struct cpu_hw_events *cpuhw;
1967 cpuhw = &__get_cpu_var(cpu_hw_events); 1967 cpuhw = this_cpu_ptr(&cpu_hw_events);
1968 power_pmu_bhrb_read(cpuhw); 1968 power_pmu_bhrb_read(cpuhw);
1969 data.br_stack = &cpuhw->bhrb_stack; 1969 data.br_stack = &cpuhw->bhrb_stack;
1970 } 1970 }
@@ -2037,7 +2037,7 @@ static bool pmc_overflow(unsigned long val)
2037static void perf_event_interrupt(struct pt_regs *regs) 2037static void perf_event_interrupt(struct pt_regs *regs)
2038{ 2038{
2039 int i, j; 2039 int i, j;
2040 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); 2040 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
2041 struct perf_event *event; 2041 struct perf_event *event;
2042 unsigned long val[8]; 2042 unsigned long val[8];
2043 int found, active; 2043 int found, active;
diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c
index d35ae52c69dc..4acaea01fe03 100644
--- a/arch/powerpc/perf/core-fsl-emb.c
+++ b/arch/powerpc/perf/core-fsl-emb.c
@@ -210,7 +210,7 @@ static void fsl_emb_pmu_disable(struct pmu *pmu)
210 unsigned long flags; 210 unsigned long flags;
211 211
212 local_irq_save(flags); 212 local_irq_save(flags);
213 cpuhw = &__get_cpu_var(cpu_hw_events); 213 cpuhw = this_cpu_ptr(&cpu_hw_events);
214 214
215 if (!cpuhw->disabled) { 215 if (!cpuhw->disabled) {
216 cpuhw->disabled = 1; 216 cpuhw->disabled = 1;
@@ -249,7 +249,7 @@ static void fsl_emb_pmu_enable(struct pmu *pmu)
249 unsigned long flags; 249 unsigned long flags;
250 250
251 local_irq_save(flags); 251 local_irq_save(flags);
252 cpuhw = &__get_cpu_var(cpu_hw_events); 252 cpuhw = this_cpu_ptr(&cpu_hw_events);
253 if (!cpuhw->disabled) 253 if (!cpuhw->disabled)
254 goto out; 254 goto out;
255 255
@@ -653,7 +653,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
653static void perf_event_interrupt(struct pt_regs *regs) 653static void perf_event_interrupt(struct pt_regs *regs)
654{ 654{
655 int i; 655 int i;
656 struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); 656 struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
657 struct perf_event *event; 657 struct perf_event *event;
658 unsigned long val; 658 unsigned long val;
659 int found = 0; 659 int found = 0;
diff --git a/arch/powerpc/platforms/44x/ppc476.c b/arch/powerpc/platforms/44x/ppc476.c
index 58db9d083969..c11ce6516c8f 100644
--- a/arch/powerpc/platforms/44x/ppc476.c
+++ b/arch/powerpc/platforms/44x/ppc476.c
@@ -94,7 +94,7 @@ static int avr_probe(struct i2c_client *client,
94{ 94{
95 avr_i2c_client = client; 95 avr_i2c_client = client;
96 ppc_md.restart = avr_reset_system; 96 ppc_md.restart = avr_reset_system;
97 ppc_md.power_off = avr_power_off_system; 97 pm_power_off = avr_power_off_system;
98 return 0; 98 return 0;
99} 99}
100 100
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index e996e007bc44..711f3d352af7 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -18,7 +18,7 @@
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20#include <linux/fsl-diu-fb.h> 20#include <linux/fsl-diu-fb.h>
21#include <linux/bootmem.h> 21#include <linux/memblock.h>
22#include <sysdev/fsl_soc.h> 22#include <sysdev/fsl_soc.h>
23 23
24#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
@@ -297,14 +297,13 @@ static void __init mpc512x_setup_diu(void)
297 * and so negatively affect boot time. Instead we reserve the 297 * and so negatively affect boot time. Instead we reserve the
298 * already configured frame buffer area so that it won't be 298 * already configured frame buffer area so that it won't be
299 * destroyed. The starting address of the area to reserve and 299 * destroyed. The starting address of the area to reserve and
300 * also it's length is passed to reserve_bootmem(). It will be 300 * also it's length is passed to memblock_reserve(). It will be
301 * freed later on first open of fbdev, when splash image is not 301 * freed later on first open of fbdev, when splash image is not
302 * needed any more. 302 * needed any more.
303 */ 303 */
304 if (diu_shared_fb.in_use) { 304 if (diu_shared_fb.in_use) {
305 ret = reserve_bootmem(diu_shared_fb.fb_phys, 305 ret = memblock_reserve(diu_shared_fb.fb_phys,
306 diu_shared_fb.fb_len, 306 diu_shared_fb.fb_len);
307 BOOTMEM_EXCLUSIVE);
308 if (ret) { 307 if (ret) {
309 pr_err("%s: reserve bootmem failed\n", __func__); 308 pr_err("%s: reserve bootmem failed\n", __func__);
310 diu_shared_fb.in_use = false; 309 diu_shared_fb.in_use = false;
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 3feffde9128d..6af651e69129 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -212,6 +212,8 @@ static int __init efika_probe(void)
212 DMA_MODE_READ = 0x44; 212 DMA_MODE_READ = 0x44;
213 DMA_MODE_WRITE = 0x48; 213 DMA_MODE_WRITE = 0x48;
214 214
215 pm_power_off = rtas_power_off;
216
215 return 1; 217 return 1;
216} 218}
217 219
@@ -225,7 +227,6 @@ define_machine(efika)
225 .init_IRQ = mpc52xx_init_irq, 227 .init_IRQ = mpc52xx_init_irq,
226 .get_irq = mpc52xx_get_irq, 228 .get_irq = mpc52xx_get_irq,
227 .restart = rtas_restart, 229 .restart = rtas_restart,
228 .power_off = rtas_power_off,
229 .halt = rtas_halt, 230 .halt = rtas_halt,
230 .set_rtc_time = rtas_set_rtc_time, 231 .set_rtc_time = rtas_set_rtc_time,
231 .get_rtc_time = rtas_get_rtc_time, 232 .get_rtc_time = rtas_get_rtc_time,
diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
index 463fa91ee5b6..15e8021ddef9 100644
--- a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
+++ b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
@@ -167,10 +167,10 @@ static int mcu_probe(struct i2c_client *client, const struct i2c_device_id *id)
167 if (ret) 167 if (ret)
168 goto err; 168 goto err;
169 169
170 /* XXX: this is potentially racy, but there is no lock for ppc_md */ 170 /* XXX: this is potentially racy, but there is no lock for pm_power_off */
171 if (!ppc_md.power_off) { 171 if (!pm_power_off) {
172 glob_mcu = mcu; 172 glob_mcu = mcu;
173 ppc_md.power_off = mcu_power_off; 173 pm_power_off = mcu_power_off;
174 dev_info(&client->dev, "will provide power-off service\n"); 174 dev_info(&client->dev, "will provide power-off service\n");
175 } 175 }
176 176
@@ -197,7 +197,7 @@ static int mcu_remove(struct i2c_client *client)
197 device_remove_file(&client->dev, &dev_attr_status); 197 device_remove_file(&client->dev, &dev_attr_status);
198 198
199 if (glob_mcu == mcu) { 199 if (glob_mcu == mcu) {
200 ppc_md.power_off = NULL; 200 pm_power_off = NULL;
201 glob_mcu = NULL; 201 glob_mcu = NULL;
202 } 202 }
203 203
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index e56b89a792ed..1f309ccb096e 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -170,7 +170,7 @@ static int __init corenet_generic_probe(void)
170 170
171 ppc_md.get_irq = ehv_pic_get_irq; 171 ppc_md.get_irq = ehv_pic_get_irq;
172 ppc_md.restart = fsl_hv_restart; 172 ppc_md.restart = fsl_hv_restart;
173 ppc_md.power_off = fsl_hv_halt; 173 pm_power_off = fsl_hv_halt;
174 ppc_md.halt = fsl_hv_halt; 174 ppc_md.halt = fsl_hv_halt;
175#ifdef CONFIG_SMP 175#ifdef CONFIG_SMP
176 /* 176 /*
diff --git a/arch/powerpc/platforms/85xx/sgy_cts1000.c b/arch/powerpc/platforms/85xx/sgy_cts1000.c
index 8162b0412117..e149c9ec26ae 100644
--- a/arch/powerpc/platforms/85xx/sgy_cts1000.c
+++ b/arch/powerpc/platforms/85xx/sgy_cts1000.c
@@ -120,7 +120,7 @@ static int gpio_halt_probe(struct platform_device *pdev)
120 120
121 /* Register our halt function */ 121 /* Register our halt function */
122 ppc_md.halt = gpio_halt_cb; 122 ppc_md.halt = gpio_halt_cb;
123 ppc_md.power_off = gpio_halt_cb; 123 pm_power_off = gpio_halt_cb;
124 124
125 printk(KERN_INFO "gpio-halt: registered GPIO %d (%d trigger, %d" 125 printk(KERN_INFO "gpio-halt: registered GPIO %d (%d trigger, %d"
126 " irq).\n", gpio, trigger, irq); 126 " irq).\n", gpio, trigger, irq);
@@ -137,7 +137,7 @@ static int gpio_halt_remove(struct platform_device *pdev)
137 free_irq(irq, halt_node); 137 free_irq(irq, halt_node);
138 138
139 ppc_md.halt = NULL; 139 ppc_md.halt = NULL;
140 ppc_md.power_off = NULL; 140 pm_power_off = NULL;
141 141
142 gpio_free(gpio); 142 gpio_free(gpio);
143 143
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index bd6f1a1cf922..157250426b56 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -1,6 +1,3 @@
1config FADS
2 bool
3
4config CPM1 1config CPM1
5 bool 2 bool
6 select CPM 3 select CPM
@@ -13,7 +10,6 @@ choice
13 10
14config MPC8XXFADS 11config MPC8XXFADS
15 bool "FADS" 12 bool "FADS"
16 select FADS
17 13
18config MPC86XADS 14config MPC86XADS
19 bool "MPC86XADS" 15 bool "MPC86XADS"
diff --git a/arch/powerpc/platforms/cell/beat_htab.c b/arch/powerpc/platforms/cell/beat_htab.c
index d4d245c0d787..bee9232fe619 100644
--- a/arch/powerpc/platforms/cell/beat_htab.c
+++ b/arch/powerpc/platforms/cell/beat_htab.c
@@ -186,7 +186,7 @@ static long beat_lpar_hpte_updatepp(unsigned long slot,
186 unsigned long newpp, 186 unsigned long newpp,
187 unsigned long vpn, 187 unsigned long vpn,
188 int psize, int apsize, 188 int psize, int apsize,
189 int ssize, int local) 189 int ssize, unsigned long flags)
190{ 190{
191 unsigned long lpar_rc; 191 unsigned long lpar_rc;
192 u64 dummy0, dummy1; 192 u64 dummy0, dummy1;
@@ -369,7 +369,7 @@ static long beat_lpar_hpte_updatepp_v3(unsigned long slot,
369 unsigned long newpp, 369 unsigned long newpp,
370 unsigned long vpn, 370 unsigned long vpn,
371 int psize, int apsize, 371 int psize, int apsize,
372 int ssize, int local) 372 int ssize, unsigned long flags)
373{ 373{
374 unsigned long lpar_rc; 374 unsigned long lpar_rc;
375 unsigned long want_v; 375 unsigned long want_v;
diff --git a/arch/powerpc/platforms/cell/celleb_pci.c b/arch/powerpc/platforms/cell/celleb_pci.c
index 2b98a36ef8fb..3ce70ded2d6a 100644
--- a/arch/powerpc/platforms/cell/celleb_pci.c
+++ b/arch/powerpc/platforms/cell/celleb_pci.c
@@ -29,7 +29,7 @@
29#include <linux/pci.h> 29#include <linux/pci.h>
30#include <linux/string.h> 30#include <linux/string.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/bootmem.h> 32#include <linux/memblock.h>
33#include <linux/pci_regs.h> 33#include <linux/pci_regs.h>
34#include <linux/of.h> 34#include <linux/of.h>
35#include <linux/of_device.h> 35#include <linux/of_device.h>
@@ -401,11 +401,11 @@ error:
401 } else { 401 } else {
402 if (config && *config) { 402 if (config && *config) {
403 size = 256; 403 size = 256;
404 free_bootmem(__pa(*config), size); 404 memblock_free(__pa(*config), size);
405 } 405 }
406 if (res && *res) { 406 if (res && *res) {
407 size = sizeof(struct celleb_pci_resource); 407 size = sizeof(struct celleb_pci_resource);
408 free_bootmem(__pa(*res), size); 408 memblock_free(__pa(*res), size);
409 } 409 }
410 } 410 }
411 411
diff --git a/arch/powerpc/platforms/cell/celleb_scc_epci.c b/arch/powerpc/platforms/cell/celleb_scc_epci.c
index 844c0facb4f7..9438bbed402f 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_epci.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_epci.c
@@ -25,7 +25,6 @@
25#include <linux/pci.h> 25#include <linux/pci.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/pci_regs.h> 27#include <linux/pci_regs.h>
28#include <linux/bootmem.h>
29 28
30#include <asm/io.h> 29#include <asm/io.h>
31#include <asm/irq.h> 30#include <asm/irq.h>
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
index 4278acfa2ede..f22387598040 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
@@ -25,7 +25,6 @@
25#include <linux/string.h> 25#include <linux/string.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/bootmem.h>
29#include <linux/delay.h> 28#include <linux/delay.h>
30#include <linux/interrupt.h> 29#include <linux/interrupt.h>
31 30
diff --git a/arch/powerpc/platforms/cell/celleb_setup.c b/arch/powerpc/platforms/cell/celleb_setup.c
index 34e8ce2976aa..90be8ec51686 100644
--- a/arch/powerpc/platforms/cell/celleb_setup.c
+++ b/arch/powerpc/platforms/cell/celleb_setup.c
@@ -142,6 +142,7 @@ static int __init celleb_probe_beat(void)
142 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS 142 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS
143 | FW_FEATURE_BEAT | FW_FEATURE_LPAR; 143 | FW_FEATURE_BEAT | FW_FEATURE_LPAR;
144 hpte_init_beat_v3(); 144 hpte_init_beat_v3();
145 pm_power_off = beat_power_off;
145 146
146 return 1; 147 return 1;
147} 148}
@@ -190,6 +191,7 @@ static int __init celleb_probe_native(void)
190 191
191 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS; 192 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS;
192 hpte_init_native(); 193 hpte_init_native();
194 pm_power_off = rtas_power_off;
193 195
194 return 1; 196 return 1;
195} 197}
@@ -204,7 +206,6 @@ define_machine(celleb_beat) {
204 .setup_arch = celleb_setup_arch_beat, 206 .setup_arch = celleb_setup_arch_beat,
205 .show_cpuinfo = celleb_show_cpuinfo, 207 .show_cpuinfo = celleb_show_cpuinfo,
206 .restart = beat_restart, 208 .restart = beat_restart,
207 .power_off = beat_power_off,
208 .halt = beat_halt, 209 .halt = beat_halt,
209 .get_rtc_time = beat_get_rtc_time, 210 .get_rtc_time = beat_get_rtc_time,
210 .set_rtc_time = beat_set_rtc_time, 211 .set_rtc_time = beat_set_rtc_time,
@@ -230,7 +231,6 @@ define_machine(celleb_native) {
230 .setup_arch = celleb_setup_arch_native, 231 .setup_arch = celleb_setup_arch_native,
231 .show_cpuinfo = celleb_show_cpuinfo, 232 .show_cpuinfo = celleb_show_cpuinfo,
232 .restart = rtas_restart, 233 .restart = rtas_restart,
233 .power_off = rtas_power_off,
234 .halt = rtas_halt, 234 .halt = rtas_halt,
235 .get_boot_time = rtas_get_boot_time, 235 .get_boot_time = rtas_get_boot_time,
236 .get_rtc_time = rtas_get_rtc_time, 236 .get_rtc_time = rtas_get_rtc_time,
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 8a106b4172e0..4c11421847be 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -82,7 +82,7 @@ static void iic_unmask(struct irq_data *d)
82 82
83static void iic_eoi(struct irq_data *d) 83static void iic_eoi(struct irq_data *d)
84{ 84{
85 struct iic *iic = &__get_cpu_var(cpu_iic); 85 struct iic *iic = this_cpu_ptr(&cpu_iic);
86 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); 86 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
87 BUG_ON(iic->eoi_ptr < 0); 87 BUG_ON(iic->eoi_ptr < 0);
88} 88}
@@ -148,7 +148,7 @@ static unsigned int iic_get_irq(void)
148 struct iic *iic; 148 struct iic *iic;
149 unsigned int virq; 149 unsigned int virq;
150 150
151 iic = &__get_cpu_var(cpu_iic); 151 iic = this_cpu_ptr(&cpu_iic);
152 *(unsigned long *) &pending = 152 *(unsigned long *) &pending =
153 in_be64((u64 __iomem *) &iic->regs->pending_destr); 153 in_be64((u64 __iomem *) &iic->regs->pending_destr);
154 if (!(pending.flags & CBE_IIC_IRQ_VALID)) 154 if (!(pending.flags & CBE_IIC_IRQ_VALID))
@@ -163,7 +163,7 @@ static unsigned int iic_get_irq(void)
163 163
164void iic_setup_cpu(void) 164void iic_setup_cpu(void)
165{ 165{
166 out_be64(&__get_cpu_var(cpu_iic).regs->prio, 0xff); 166 out_be64(this_cpu_ptr(&cpu_iic.regs->prio), 0xff);
167} 167}
168 168
169u8 iic_get_target_id(int cpu) 169u8 iic_get_target_id(int cpu)
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index 6e3409d590ac..d328140dc6f5 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -127,6 +127,7 @@ static int __init qpace_probe(void)
127 return 0; 127 return 0;
128 128
129 hpte_init_native(); 129 hpte_init_native();
130 pm_power_off = rtas_power_off;
130 131
131 return 1; 132 return 1;
132} 133}
@@ -137,7 +138,6 @@ define_machine(qpace) {
137 .setup_arch = qpace_setup_arch, 138 .setup_arch = qpace_setup_arch,
138 .show_cpuinfo = qpace_show_cpuinfo, 139 .show_cpuinfo = qpace_show_cpuinfo,
139 .restart = rtas_restart, 140 .restart = rtas_restart,
140 .power_off = rtas_power_off,
141 .halt = rtas_halt, 141 .halt = rtas_halt,
142 .get_boot_time = rtas_get_boot_time, 142 .get_boot_time = rtas_get_boot_time,
143 .get_rtc_time = rtas_get_rtc_time, 143 .get_rtc_time = rtas_get_rtc_time,
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 6ae25fb62015..d62aa982d530 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -259,6 +259,7 @@ static int __init cell_probe(void)
259 return 0; 259 return 0;
260 260
261 hpte_init_native(); 261 hpte_init_native();
262 pm_power_off = rtas_power_off;
262 263
263 return 1; 264 return 1;
264} 265}
@@ -269,7 +270,6 @@ define_machine(cell) {
269 .setup_arch = cell_setup_arch, 270 .setup_arch = cell_setup_arch,
270 .show_cpuinfo = cell_show_cpuinfo, 271 .show_cpuinfo = cell_show_cpuinfo,
271 .restart = rtas_restart, 272 .restart = rtas_restart,
272 .power_off = rtas_power_off,
273 .halt = rtas_halt, 273 .halt = rtas_halt,
274 .get_boot_time = rtas_get_boot_time, 274 .get_boot_time = rtas_get_boot_time,
275 .get_rtc_time = rtas_get_rtc_time, 275 .get_rtc_time = rtas_get_rtc_time,
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index ffcbd242e669..f7af74f83693 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -181,7 +181,8 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
181 return 0; 181 return 0;
182} 182}
183 183
184extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX 184extern int hash_page(unsigned long ea, unsigned long access,
185 unsigned long trap, unsigned long dsisr); //XXX
185static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr) 186static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
186{ 187{
187 int ret; 188 int ret;
@@ -196,7 +197,7 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
196 (REGION_ID(ea) != USER_REGION_ID)) { 197 (REGION_ID(ea) != USER_REGION_ID)) {
197 198
198 spin_unlock(&spu->register_lock); 199 spin_unlock(&spu->register_lock);
199 ret = hash_page(ea, _PAGE_PRESENT, 0x300); 200 ret = hash_page(ea, _PAGE_PRESENT, 0x300, dsisr);
200 spin_lock(&spu->register_lock); 201 spin_lock(&spu->register_lock);
201 202
202 if (!ret) { 203 if (!ret) {
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index e45894a08118..d98f845ac777 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -144,7 +144,7 @@ int spufs_handle_class1(struct spu_context *ctx)
144 access = (_PAGE_PRESENT | _PAGE_USER); 144 access = (_PAGE_PRESENT | _PAGE_USER);
145 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL; 145 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
146 local_irq_save(flags); 146 local_irq_save(flags);
147 ret = hash_page(ea, access, 0x300); 147 ret = hash_page(ea, access, 0x300, dsisr);
148 local_irq_restore(flags); 148 local_irq_restore(flags);
149 149
150 /* hashing failed, so try the actual fault handler */ 150 /* hashing failed, so try the actual fault handler */
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 5b77b1919fd2..860a59eb8ea2 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -585,6 +585,8 @@ static int __init chrp_probe(void)
585 DMA_MODE_READ = 0x44; 585 DMA_MODE_READ = 0x44;
586 DMA_MODE_WRITE = 0x48; 586 DMA_MODE_WRITE = 0x48;
587 587
588 pm_power_off = rtas_power_off;
589
588 return 1; 590 return 1;
589} 591}
590 592
@@ -597,7 +599,6 @@ define_machine(chrp) {
597 .show_cpuinfo = chrp_show_cpuinfo, 599 .show_cpuinfo = chrp_show_cpuinfo,
598 .init_IRQ = chrp_init_IRQ, 600 .init_IRQ = chrp_init_IRQ,
599 .restart = rtas_restart, 601 .restart = rtas_restart,
600 .power_off = rtas_power_off,
601 .halt = rtas_halt, 602 .halt = rtas_halt,
602 .time_init = chrp_time_init, 603 .time_init = chrp_time_init,
603 .set_rtc_time = chrp_set_rtc_time, 604 .set_rtc_time = chrp_set_rtc_time,
diff --git a/arch/powerpc/platforms/embedded6xx/gamecube.c b/arch/powerpc/platforms/embedded6xx/gamecube.c
index bd4ba5d7d568..fe0ed6ee285e 100644
--- a/arch/powerpc/platforms/embedded6xx/gamecube.c
+++ b/arch/powerpc/platforms/embedded6xx/gamecube.c
@@ -67,6 +67,8 @@ static int __init gamecube_probe(void)
67 if (!of_flat_dt_is_compatible(dt_root, "nintendo,gamecube")) 67 if (!of_flat_dt_is_compatible(dt_root, "nintendo,gamecube"))
68 return 0; 68 return 0;
69 69
70 pm_power_off = gamecube_power_off;
71
70 return 1; 72 return 1;
71} 73}
72 74
@@ -80,7 +82,6 @@ define_machine(gamecube) {
80 .probe = gamecube_probe, 82 .probe = gamecube_probe,
81 .init_early = gamecube_init_early, 83 .init_early = gamecube_init_early,
82 .restart = gamecube_restart, 84 .restart = gamecube_restart,
83 .power_off = gamecube_power_off,
84 .halt = gamecube_halt, 85 .halt = gamecube_halt,
85 .init_IRQ = flipper_pic_probe, 86 .init_IRQ = flipper_pic_probe,
86 .get_irq = flipper_pic_get_irq, 87 .get_irq = flipper_pic_get_irq,
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c
index 168e1d80b2e5..540eeb58d3f0 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -147,6 +147,9 @@ static int __init linkstation_probe(void)
147 147
148 if (!of_flat_dt_is_compatible(root, "linkstation")) 148 if (!of_flat_dt_is_compatible(root, "linkstation"))
149 return 0; 149 return 0;
150
151 pm_power_off = linkstation_power_off;
152
150 return 1; 153 return 1;
151} 154}
152 155
@@ -158,7 +161,6 @@ define_machine(linkstation){
158 .show_cpuinfo = linkstation_show_cpuinfo, 161 .show_cpuinfo = linkstation_show_cpuinfo,
159 .get_irq = mpic_get_irq, 162 .get_irq = mpic_get_irq,
160 .restart = linkstation_restart, 163 .restart = linkstation_restart,
161 .power_off = linkstation_power_off,
162 .halt = linkstation_halt, 164 .halt = linkstation_halt,
163 .calibrate_decr = generic_calibrate_decr, 165 .calibrate_decr = generic_calibrate_decr,
164}; 166};
diff --git a/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c b/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c
index 20a8ed91962e..7feb325b636b 100644
--- a/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c
+++ b/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c
@@ -247,7 +247,7 @@ void __init ug_udbg_init(void)
247 np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-exi"); 247 np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-exi");
248 if (!np) { 248 if (!np) {
249 udbg_printf("%s: EXI node not found\n", __func__); 249 udbg_printf("%s: EXI node not found\n", __func__);
250 goto done; 250 goto out;
251 } 251 }
252 252
253 exi_io_base = ug_udbg_setup_exi_io_base(np); 253 exi_io_base = ug_udbg_setup_exi_io_base(np);
@@ -267,8 +267,8 @@ void __init ug_udbg_init(void)
267 } 267 }
268 268
269done: 269done:
270 if (np) 270 of_node_put(np);
271 of_node_put(np); 271out:
272 return; 272 return;
273} 273}
274 274
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c b/arch/powerpc/platforms/embedded6xx/wii.c
index 388e29bab8f6..352592d3e44e 100644
--- a/arch/powerpc/platforms/embedded6xx/wii.c
+++ b/arch/powerpc/platforms/embedded6xx/wii.c
@@ -211,6 +211,8 @@ static int __init wii_probe(void)
211 if (!of_flat_dt_is_compatible(dt_root, "nintendo,wii")) 211 if (!of_flat_dt_is_compatible(dt_root, "nintendo,wii"))
212 return 0; 212 return 0;
213 213
214 pm_power_off = wii_power_off;
215
214 return 1; 216 return 1;
215} 217}
216 218
@@ -226,7 +228,6 @@ define_machine(wii) {
226 .init_early = wii_init_early, 228 .init_early = wii_init_early,
227 .setup_arch = wii_setup_arch, 229 .setup_arch = wii_setup_arch,
228 .restart = wii_restart, 230 .restart = wii_restart,
229 .power_off = wii_power_off,
230 .halt = wii_halt, 231 .halt = wii_halt,
231 .init_IRQ = wii_pic_probe, 232 .init_IRQ = wii_pic_probe,
232 .get_irq = flipper_pic_get_irq, 233 .get_irq = flipper_pic_get_irq,
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index f7136aae8bbf..d3a13067ec42 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -15,7 +15,6 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/string.h> 16#include <linux/string.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/bootmem.h>
19#include <linux/irq.h> 18#include <linux/irq.h>
20 19
21#include <asm/sections.h> 20#include <asm/sections.h>
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index cb1b0b35a0c6..56b85cd61aaf 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -169,7 +169,7 @@ static void __init maple_use_rtas_reboot_and_halt_if_present(void)
169 if (rtas_service_present("system-reboot") && 169 if (rtas_service_present("system-reboot") &&
170 rtas_service_present("power-off")) { 170 rtas_service_present("power-off")) {
171 ppc_md.restart = rtas_restart; 171 ppc_md.restart = rtas_restart;
172 ppc_md.power_off = rtas_power_off; 172 pm_power_off = rtas_power_off;
173 ppc_md.halt = rtas_halt; 173 ppc_md.halt = rtas_halt;
174 } 174 }
175} 175}
@@ -312,6 +312,7 @@ static int __init maple_probe(void)
312 alloc_dart_table(); 312 alloc_dart_table();
313 313
314 hpte_init_native(); 314 hpte_init_native();
315 pm_power_off = maple_power_off;
315 316
316 return 1; 317 return 1;
317} 318}
@@ -325,7 +326,6 @@ define_machine(maple) {
325 .pci_irq_fixup = maple_pci_irq_fixup, 326 .pci_irq_fixup = maple_pci_irq_fixup,
326 .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq, 327 .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq,
327 .restart = maple_restart, 328 .restart = maple_restart,
328 .power_off = maple_power_off,
329 .halt = maple_halt, 329 .halt = maple_halt,
330 .get_boot_time = maple_get_boot_time, 330 .get_boot_time = maple_get_boot_time,
331 .set_rtc_time = maple_set_rtc_time, 331 .set_rtc_time = maple_set_rtc_time,
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index 014d06e6d46b..60b03a1703d1 100644
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -513,11 +513,7 @@ static int __init core99_nvram_setup(struct device_node *dp, unsigned long addr)
513 printk(KERN_ERR "nvram: no address\n"); 513 printk(KERN_ERR "nvram: no address\n");
514 return -EINVAL; 514 return -EINVAL;
515 } 515 }
516 nvram_image = alloc_bootmem(NVRAM_SIZE); 516 nvram_image = memblock_virt_alloc(NVRAM_SIZE, 0);
517 if (nvram_image == NULL) {
518 printk(KERN_ERR "nvram: can't allocate ram image\n");
519 return -ENOMEM;
520 }
521 nvram_data = ioremap(addr, NVRAM_SIZE*2); 517 nvram_data = ioremap(addr, NVRAM_SIZE*2);
522 nvram_naddrs = 1; /* Make sure we get the correct case */ 518 nvram_naddrs = 1; /* Make sure we get the correct case */
523 519
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 7e868ccf3b0d..04702db35d45 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -15,7 +15,6 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/string.h> 16#include <linux/string.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/bootmem.h>
19#include <linux/irq.h> 18#include <linux/irq.h>
20#include <linux/of_pci.h> 19#include <linux/of_pci.h>
21 20
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index b127a29ac526..713d36d45d1d 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -632,6 +632,8 @@ static int __init pmac_probe(void)
632 smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL); 632 smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL);
633#endif /* CONFIG_PMAC_SMU */ 633#endif /* CONFIG_PMAC_SMU */
634 634
635 pm_power_off = pmac_power_off;
636
635 return 1; 637 return 1;
636} 638}
637 639
@@ -663,7 +665,6 @@ define_machine(powermac) {
663 .get_irq = NULL, /* changed later */ 665 .get_irq = NULL, /* changed later */
664 .pci_irq_fixup = pmac_pci_irq_fixup, 666 .pci_irq_fixup = pmac_pci_irq_fixup,
665 .restart = pmac_restart, 667 .restart = pmac_restart,
666 .power_off = pmac_power_off,
667 .halt = pmac_halt, 668 .halt = pmac_halt,
668 .time_init = pmac_time_init, 669 .time_init = pmac_time_init,
669 .get_boot_time = pmac_get_boot_time, 670 .get_boot_time = pmac_get_boot_time,
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index eba9cb10619c..2809c9895288 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -11,7 +11,6 @@
11 * (at your option) any later version. 11 * (at your option) any later version.
12 */ 12 */
13 13
14#include <linux/bootmem.h>
15#include <linux/debugfs.h> 14#include <linux/debugfs.h>
16#include <linux/delay.h> 15#include <linux/delay.h>
17#include <linux/io.h> 16#include <linux/io.h>
@@ -354,6 +353,9 @@ static int ioda_eeh_get_phb_state(struct eeh_pe *pe)
354 } else if (!(pe->state & EEH_PE_ISOLATED)) { 353 } else if (!(pe->state & EEH_PE_ISOLATED)) {
355 eeh_pe_state_mark(pe, EEH_PE_ISOLATED); 354 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
356 ioda_eeh_phb_diag(pe); 355 ioda_eeh_phb_diag(pe);
356
357 if (eeh_has_flag(EEH_EARLY_DUMP_LOG))
358 pnv_pci_dump_phb_diag_data(pe->phb, pe->data);
357 } 359 }
358 360
359 return result; 361 return result;
@@ -373,7 +375,7 @@ static int ioda_eeh_get_pe_state(struct eeh_pe *pe)
373 * moving forward, we have to return operational 375 * moving forward, we have to return operational
374 * state during PE reset. 376 * state during PE reset.
375 */ 377 */
376 if (pe->state & EEH_PE_CFG_BLOCKED) { 378 if (pe->state & EEH_PE_RESET) {
377 result = (EEH_STATE_MMIO_ACTIVE | 379 result = (EEH_STATE_MMIO_ACTIVE |
378 EEH_STATE_DMA_ACTIVE | 380 EEH_STATE_DMA_ACTIVE |
379 EEH_STATE_MMIO_ENABLED | 381 EEH_STATE_MMIO_ENABLED |
@@ -452,6 +454,9 @@ static int ioda_eeh_get_pe_state(struct eeh_pe *pe)
452 454
453 eeh_pe_state_mark(pe, EEH_PE_ISOLATED); 455 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
454 ioda_eeh_phb_diag(pe); 456 ioda_eeh_phb_diag(pe);
457
458 if (eeh_has_flag(EEH_EARLY_DUMP_LOG))
459 pnv_pci_dump_phb_diag_data(pe->phb, pe->data);
455 } 460 }
456 461
457 return result; 462 return result;
@@ -731,7 +736,8 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
731static int ioda_eeh_get_log(struct eeh_pe *pe, int severity, 736static int ioda_eeh_get_log(struct eeh_pe *pe, int severity,
732 char *drv_log, unsigned long len) 737 char *drv_log, unsigned long len)
733{ 738{
734 pnv_pci_dump_phb_diag_data(pe->phb, pe->data); 739 if (!eeh_has_flag(EEH_EARLY_DUMP_LOG))
740 pnv_pci_dump_phb_diag_data(pe->phb, pe->data);
735 741
736 return 0; 742 return 0;
737} 743}
@@ -1087,6 +1093,10 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
1087 !((*pe)->state & EEH_PE_ISOLATED)) { 1093 !((*pe)->state & EEH_PE_ISOLATED)) {
1088 eeh_pe_state_mark(*pe, EEH_PE_ISOLATED); 1094 eeh_pe_state_mark(*pe, EEH_PE_ISOLATED);
1089 ioda_eeh_phb_diag(*pe); 1095 ioda_eeh_phb_diag(*pe);
1096
1097 if (eeh_has_flag(EEH_EARLY_DUMP_LOG))
1098 pnv_pci_dump_phb_diag_data((*pe)->phb,
1099 (*pe)->data);
1090 } 1100 }
1091 1101
1092 /* 1102 /*
diff --git a/arch/powerpc/platforms/powernv/opal-async.c b/arch/powerpc/platforms/powernv/opal-async.c
index e462ab947d16..693b6cdac691 100644
--- a/arch/powerpc/platforms/powernv/opal-async.c
+++ b/arch/powerpc/platforms/powernv/opal-async.c
@@ -71,6 +71,7 @@ int opal_async_get_token_interruptible(void)
71 71
72 return token; 72 return token;
73} 73}
74EXPORT_SYMBOL_GPL(opal_async_get_token_interruptible);
74 75
75int __opal_async_release_token(int token) 76int __opal_async_release_token(int token)
76{ 77{
@@ -102,6 +103,7 @@ int opal_async_release_token(int token)
102 103
103 return 0; 104 return 0;
104} 105}
106EXPORT_SYMBOL_GPL(opal_async_release_token);
105 107
106int opal_async_wait_response(uint64_t token, struct opal_msg *msg) 108int opal_async_wait_response(uint64_t token, struct opal_msg *msg)
107{ 109{
@@ -120,6 +122,7 @@ int opal_async_wait_response(uint64_t token, struct opal_msg *msg)
120 122
121 return 0; 123 return 0;
122} 124}
125EXPORT_SYMBOL_GPL(opal_async_wait_response);
123 126
124static int opal_async_comp_event(struct notifier_block *nb, 127static int opal_async_comp_event(struct notifier_block *nb,
125 unsigned long msg_type, void *msg) 128 unsigned long msg_type, void *msg)
diff --git a/arch/powerpc/platforms/powernv/opal-rtc.c b/arch/powerpc/platforms/powernv/opal-rtc.c
index 499707ddaa9c..37dbee15769f 100644
--- a/arch/powerpc/platforms/powernv/opal-rtc.c
+++ b/arch/powerpc/platforms/powernv/opal-rtc.c
@@ -15,6 +15,8 @@
15#include <linux/bcd.h> 15#include <linux/bcd.h>
16#include <linux/rtc.h> 16#include <linux/rtc.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/platform_device.h>
19#include <linux/of_platform.h>
18 20
19#include <asm/opal.h> 21#include <asm/opal.h>
20#include <asm/firmware.h> 22#include <asm/firmware.h>
@@ -43,7 +45,7 @@ unsigned long __init opal_get_boot_time(void)
43 long rc = OPAL_BUSY; 45 long rc = OPAL_BUSY;
44 46
45 if (!opal_check_token(OPAL_RTC_READ)) 47 if (!opal_check_token(OPAL_RTC_READ))
46 goto out; 48 return 0;
47 49
48 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 50 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
49 rc = opal_rtc_read(&__y_m_d, &__h_m_s_ms); 51 rc = opal_rtc_read(&__y_m_d, &__h_m_s_ms);
@@ -53,62 +55,33 @@ unsigned long __init opal_get_boot_time(void)
53 mdelay(10); 55 mdelay(10);
54 } 56 }
55 if (rc != OPAL_SUCCESS) 57 if (rc != OPAL_SUCCESS)
56 goto out; 58 return 0;
57 59
58 y_m_d = be32_to_cpu(__y_m_d); 60 y_m_d = be32_to_cpu(__y_m_d);
59 h_m_s_ms = be64_to_cpu(__h_m_s_ms); 61 h_m_s_ms = be64_to_cpu(__h_m_s_ms);
60 opal_to_tm(y_m_d, h_m_s_ms, &tm); 62 opal_to_tm(y_m_d, h_m_s_ms, &tm);
61 return mktime(tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, 63 return mktime(tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
62 tm.tm_hour, tm.tm_min, tm.tm_sec); 64 tm.tm_hour, tm.tm_min, tm.tm_sec);
63out:
64 ppc_md.get_rtc_time = NULL;
65 ppc_md.set_rtc_time = NULL;
66 return 0;
67} 65}
68 66
69void opal_get_rtc_time(struct rtc_time *tm) 67static __init int opal_time_init(void)
70{ 68{
71 long rc = OPAL_BUSY; 69 struct platform_device *pdev;
72 u32 y_m_d; 70 struct device_node *rtc;
73 u64 h_m_s_ms;
74 __be32 __y_m_d;
75 __be64 __h_m_s_ms;
76 71
77 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 72 rtc = of_find_node_by_path("/ibm,opal/rtc");
78 rc = opal_rtc_read(&__y_m_d, &__h_m_s_ms); 73 if (rtc) {
79 if (rc == OPAL_BUSY_EVENT) 74 pdev = of_platform_device_create(rtc, "opal-rtc", NULL);
80 opal_poll_events(NULL); 75 of_node_put(rtc);
76 } else {
77 if (opal_check_token(OPAL_RTC_READ) ||
78 opal_check_token(OPAL_READ_TPO))
79 pdev = platform_device_register_simple("opal-rtc", -1,
80 NULL, 0);
81 else 81 else
82 mdelay(10); 82 return -ENODEV;
83 } 83 }
84 if (rc != OPAL_SUCCESS)
85 return;
86 y_m_d = be32_to_cpu(__y_m_d);
87 h_m_s_ms = be64_to_cpu(__h_m_s_ms);
88 opal_to_tm(y_m_d, h_m_s_ms, tm);
89}
90
91int opal_set_rtc_time(struct rtc_time *tm)
92{
93 long rc = OPAL_BUSY;
94 u32 y_m_d = 0;
95 u64 h_m_s_ms = 0;
96
97 y_m_d |= ((u32)bin2bcd((tm->tm_year + 1900) / 100)) << 24;
98 y_m_d |= ((u32)bin2bcd((tm->tm_year + 1900) % 100)) << 16;
99 y_m_d |= ((u32)bin2bcd((tm->tm_mon + 1))) << 8;
100 y_m_d |= ((u32)bin2bcd(tm->tm_mday));
101
102 h_m_s_ms |= ((u64)bin2bcd(tm->tm_hour)) << 56;
103 h_m_s_ms |= ((u64)bin2bcd(tm->tm_min)) << 48;
104 h_m_s_ms |= ((u64)bin2bcd(tm->tm_sec)) << 40;
105 84
106 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 85 return PTR_ERR_OR_ZERO(pdev);
107 rc = opal_rtc_write(y_m_d, h_m_s_ms);
108 if (rc == OPAL_BUSY_EVENT)
109 opal_poll_events(NULL);
110 else
111 mdelay(10);
112 }
113 return rc == OPAL_SUCCESS ? 0 : -EIO;
114} 86}
87machine_subsys_initcall(powernv, opal_time_init);
diff --git a/arch/powerpc/platforms/powernv/opal-tracepoints.c b/arch/powerpc/platforms/powernv/opal-tracepoints.c
index ae14c40b4b1c..e11273b2386d 100644
--- a/arch/powerpc/platforms/powernv/opal-tracepoints.c
+++ b/arch/powerpc/platforms/powernv/opal-tracepoints.c
@@ -48,7 +48,7 @@ void __trace_opal_entry(unsigned long opcode, unsigned long *args)
48 48
49 local_irq_save(flags); 49 local_irq_save(flags);
50 50
51 depth = &__get_cpu_var(opal_trace_depth); 51 depth = this_cpu_ptr(&opal_trace_depth);
52 52
53 if (*depth) 53 if (*depth)
54 goto out; 54 goto out;
@@ -69,7 +69,7 @@ void __trace_opal_exit(long opcode, unsigned long retval)
69 69
70 local_irq_save(flags); 70 local_irq_save(flags);
71 71
72 depth = &__get_cpu_var(opal_trace_depth); 72 depth = this_cpu_ptr(&opal_trace_depth);
73 73
74 if (*depth) 74 if (*depth)
75 goto out; 75 goto out;
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index feb549aa3eea..0a299be588af 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -18,7 +18,7 @@
18 .section ".text" 18 .section ".text"
19 19
20#ifdef CONFIG_TRACEPOINTS 20#ifdef CONFIG_TRACEPOINTS
21#ifdef CONFIG_JUMP_LABEL 21#ifdef HAVE_JUMP_LABEL
22#define OPAL_BRANCH(LABEL) \ 22#define OPAL_BRANCH(LABEL) \
23 ARCH_STATIC_BRANCH(LABEL, opal_tracepoint_key) 23 ARCH_STATIC_BRANCH(LABEL, opal_tracepoint_key)
24#else 24#else
@@ -250,3 +250,7 @@ OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI);
250OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION); 250OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION);
251OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION); 251OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION);
252OPAL_CALL(opal_pci_set_phb_cxl_mode, OPAL_PCI_SET_PHB_CXL_MODE); 252OPAL_CALL(opal_pci_set_phb_cxl_mode, OPAL_PCI_SET_PHB_CXL_MODE);
253OPAL_CALL(opal_tpo_write, OPAL_WRITE_TPO);
254OPAL_CALL(opal_tpo_read, OPAL_READ_TPO);
255OPAL_CALL(opal_ipmi_send, OPAL_IPMI_SEND);
256OPAL_CALL(opal_ipmi_recv, OPAL_IPMI_RECV);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index d019b081df9d..cb0b6de79cd4 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -50,7 +50,6 @@ static int mc_recoverable_range_len;
50 50
51struct device_node *opal_node; 51struct device_node *opal_node;
52static DEFINE_SPINLOCK(opal_write_lock); 52static DEFINE_SPINLOCK(opal_write_lock);
53extern u64 opal_mc_secondary_handler[];
54static unsigned int *opal_irqs; 53static unsigned int *opal_irqs;
55static unsigned int opal_irq_count; 54static unsigned int opal_irq_count;
56static ATOMIC_NOTIFIER_HEAD(opal_notifier_head); 55static ATOMIC_NOTIFIER_HEAD(opal_notifier_head);
@@ -644,6 +643,16 @@ static void __init opal_dump_region_init(void)
644 pr_warn("DUMP: Failed to register kernel log buffer. " 643 pr_warn("DUMP: Failed to register kernel log buffer. "
645 "rc = %d\n", rc); 644 "rc = %d\n", rc);
646} 645}
646
647static void opal_ipmi_init(struct device_node *opal_node)
648{
649 struct device_node *np;
650
651 for_each_child_of_node(opal_node, np)
652 if (of_device_is_compatible(np, "ibm,opal-ipmi"))
653 of_platform_device_create(np, NULL, NULL);
654}
655
647static int __init opal_init(void) 656static int __init opal_init(void)
648{ 657{
649 struct device_node *np, *consoles; 658 struct device_node *np, *consoles;
@@ -707,6 +716,8 @@ static int __init opal_init(void)
707 opal_msglog_init(); 716 opal_msglog_init();
708 } 717 }
709 718
719 opal_ipmi_init(opal_node);
720
710 return 0; 721 return 0;
711} 722}
712machine_subsys_initcall(powernv, opal_init); 723machine_subsys_initcall(powernv, opal_init);
@@ -742,6 +753,8 @@ void opal_shutdown(void)
742 753
743/* Export this so that test modules can use it */ 754/* Export this so that test modules can use it */
744EXPORT_SYMBOL_GPL(opal_invalid_call); 755EXPORT_SYMBOL_GPL(opal_invalid_call);
756EXPORT_SYMBOL_GPL(opal_ipmi_send);
757EXPORT_SYMBOL_GPL(opal_ipmi_recv);
745 758
746/* Convert a region of vmalloc memory to an opal sg list */ 759/* Convert a region of vmalloc memory to an opal sg list */
747struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr, 760struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
@@ -805,3 +818,9 @@ void opal_free_sg_list(struct opal_sg_list *sg)
805 sg = NULL; 818 sg = NULL;
806 } 819 }
807} 820}
821
822EXPORT_SYMBOL_GPL(opal_poll_events);
823EXPORT_SYMBOL_GPL(opal_rtc_read);
824EXPORT_SYMBOL_GPL(opal_rtc_write);
825EXPORT_SYMBOL_GPL(opal_tpo_read);
826EXPORT_SYMBOL_GPL(opal_tpo_write);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 3ba435ec3dcd..fac88ed8a915 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -91,6 +91,24 @@ static inline bool pnv_pci_is_mem_pref_64(unsigned long flags)
91 (IORESOURCE_MEM_64 | IORESOURCE_PREFETCH)); 91 (IORESOURCE_MEM_64 | IORESOURCE_PREFETCH));
92} 92}
93 93
94static void pnv_ioda_reserve_pe(struct pnv_phb *phb, int pe_no)
95{
96 if (!(pe_no >= 0 && pe_no < phb->ioda.total_pe)) {
97 pr_warn("%s: Invalid PE %d on PHB#%x\n",
98 __func__, pe_no, phb->hose->global_number);
99 return;
100 }
101
102 if (test_and_set_bit(pe_no, phb->ioda.pe_alloc)) {
103 pr_warn("%s: PE %d was assigned on PHB#%x\n",
104 __func__, pe_no, phb->hose->global_number);
105 return;
106 }
107
108 phb->ioda.pe_array[pe_no].phb = phb;
109 phb->ioda.pe_array[pe_no].pe_number = pe_no;
110}
111
94static int pnv_ioda_alloc_pe(struct pnv_phb *phb) 112static int pnv_ioda_alloc_pe(struct pnv_phb *phb)
95{ 113{
96 unsigned long pe; 114 unsigned long pe;
@@ -172,7 +190,7 @@ fail:
172 return -EIO; 190 return -EIO;
173} 191}
174 192
175static void pnv_ioda2_alloc_m64_pe(struct pnv_phb *phb) 193static void pnv_ioda2_reserve_m64_pe(struct pnv_phb *phb)
176{ 194{
177 resource_size_t sgsz = phb->ioda.m64_segsize; 195 resource_size_t sgsz = phb->ioda.m64_segsize;
178 struct pci_dev *pdev; 196 struct pci_dev *pdev;
@@ -185,16 +203,15 @@ static void pnv_ioda2_alloc_m64_pe(struct pnv_phb *phb)
185 * instead of root bus. 203 * instead of root bus.
186 */ 204 */
187 list_for_each_entry(pdev, &phb->hose->bus->devices, bus_list) { 205 list_for_each_entry(pdev, &phb->hose->bus->devices, bus_list) {
188 for (i = PCI_BRIDGE_RESOURCES; 206 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
189 i <= PCI_BRIDGE_RESOURCE_END; i++) { 207 r = &pdev->resource[PCI_BRIDGE_RESOURCES + i];
190 r = &pdev->resource[i];
191 if (!r->parent || 208 if (!r->parent ||
192 !pnv_pci_is_mem_pref_64(r->flags)) 209 !pnv_pci_is_mem_pref_64(r->flags))
193 continue; 210 continue;
194 211
195 base = (r->start - phb->ioda.m64_base) / sgsz; 212 base = (r->start - phb->ioda.m64_base) / sgsz;
196 for (step = 0; step < resource_size(r) / sgsz; step++) 213 for (step = 0; step < resource_size(r) / sgsz; step++)
197 set_bit(base + step, phb->ioda.pe_alloc); 214 pnv_ioda_reserve_pe(phb, base + step);
198 } 215 }
199 } 216 }
200} 217}
@@ -287,8 +304,6 @@ done:
287 while ((i = find_next_bit(pe_alloc, phb->ioda.total_pe, i + 1)) < 304 while ((i = find_next_bit(pe_alloc, phb->ioda.total_pe, i + 1)) <
288 phb->ioda.total_pe) { 305 phb->ioda.total_pe) {
289 pe = &phb->ioda.pe_array[i]; 306 pe = &phb->ioda.pe_array[i];
290 pe->phb = phb;
291 pe->pe_number = i;
292 307
293 if (!master_pe) { 308 if (!master_pe) {
294 pe->flags |= PNV_IODA_PE_MASTER; 309 pe->flags |= PNV_IODA_PE_MASTER;
@@ -313,6 +328,12 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb)
313 const u32 *r; 328 const u32 *r;
314 u64 pci_addr; 329 u64 pci_addr;
315 330
331 /* FIXME: Support M64 for P7IOC */
332 if (phb->type != PNV_PHB_IODA2) {
333 pr_info(" Not support M64 window\n");
334 return;
335 }
336
316 if (!firmware_has_feature(FW_FEATURE_OPALv3)) { 337 if (!firmware_has_feature(FW_FEATURE_OPALv3)) {
317 pr_info(" Firmware too old to support M64 window\n"); 338 pr_info(" Firmware too old to support M64 window\n");
318 return; 339 return;
@@ -325,12 +346,6 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb)
325 return; 346 return;
326 } 347 }
327 348
328 /* FIXME: Support M64 for P7IOC */
329 if (phb->type != PNV_PHB_IODA2) {
330 pr_info(" Not support M64 window\n");
331 return;
332 }
333
334 res = &hose->mem_resources[1]; 349 res = &hose->mem_resources[1];
335 res->start = of_translate_address(dn, r + 2); 350 res->start = of_translate_address(dn, r + 2);
336 res->end = res->start + of_read_number(r + 4, 2) - 1; 351 res->end = res->start + of_read_number(r + 4, 2) - 1;
@@ -345,7 +360,7 @@ static void __init pnv_ioda_parse_m64_window(struct pnv_phb *phb)
345 /* Use last M64 BAR to cover M64 window */ 360 /* Use last M64 BAR to cover M64 window */
346 phb->ioda.m64_bar_idx = 15; 361 phb->ioda.m64_bar_idx = 15;
347 phb->init_m64 = pnv_ioda2_init_m64; 362 phb->init_m64 = pnv_ioda2_init_m64;
348 phb->alloc_m64_pe = pnv_ioda2_alloc_m64_pe; 363 phb->reserve_m64_pe = pnv_ioda2_reserve_m64_pe;
349 phb->pick_m64_pe = pnv_ioda2_pick_m64_pe; 364 phb->pick_m64_pe = pnv_ioda2_pick_m64_pe;
350} 365}
351 366
@@ -358,7 +373,9 @@ static void pnv_ioda_freeze_pe(struct pnv_phb *phb, int pe_no)
358 /* Fetch master PE */ 373 /* Fetch master PE */
359 if (pe->flags & PNV_IODA_PE_SLAVE) { 374 if (pe->flags & PNV_IODA_PE_SLAVE) {
360 pe = pe->master; 375 pe = pe->master;
361 WARN_ON(!pe || !(pe->flags & PNV_IODA_PE_MASTER)); 376 if (WARN_ON(!pe || !(pe->flags & PNV_IODA_PE_MASTER)))
377 return;
378
362 pe_no = pe->pe_number; 379 pe_no = pe->pe_number;
363 } 380 }
364 381
@@ -507,6 +524,106 @@ static struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
507} 524}
508#endif /* CONFIG_PCI_MSI */ 525#endif /* CONFIG_PCI_MSI */
509 526
527static int pnv_ioda_set_one_peltv(struct pnv_phb *phb,
528 struct pnv_ioda_pe *parent,
529 struct pnv_ioda_pe *child,
530 bool is_add)
531{
532 const char *desc = is_add ? "adding" : "removing";
533 uint8_t op = is_add ? OPAL_ADD_PE_TO_DOMAIN :
534 OPAL_REMOVE_PE_FROM_DOMAIN;
535 struct pnv_ioda_pe *slave;
536 long rc;
537
538 /* Parent PE affects child PE */
539 rc = opal_pci_set_peltv(phb->opal_id, parent->pe_number,
540 child->pe_number, op);
541 if (rc != OPAL_SUCCESS) {
542 pe_warn(child, "OPAL error %ld %s to parent PELTV\n",
543 rc, desc);
544 return -ENXIO;
545 }
546
547 if (!(child->flags & PNV_IODA_PE_MASTER))
548 return 0;
549
550 /* Compound case: parent PE affects slave PEs */
551 list_for_each_entry(slave, &child->slaves, list) {
552 rc = opal_pci_set_peltv(phb->opal_id, parent->pe_number,
553 slave->pe_number, op);
554 if (rc != OPAL_SUCCESS) {
555 pe_warn(slave, "OPAL error %ld %s to parent PELTV\n",
556 rc, desc);
557 return -ENXIO;
558 }
559 }
560
561 return 0;
562}
563
564static int pnv_ioda_set_peltv(struct pnv_phb *phb,
565 struct pnv_ioda_pe *pe,
566 bool is_add)
567{
568 struct pnv_ioda_pe *slave;
569 struct pci_dev *pdev;
570 int ret;
571
572 /*
573 * Clear PE frozen state. If it's master PE, we need
574 * clear slave PE frozen state as well.
575 */
576 if (is_add) {
577 opal_pci_eeh_freeze_clear(phb->opal_id, pe->pe_number,
578 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
579 if (pe->flags & PNV_IODA_PE_MASTER) {
580 list_for_each_entry(slave, &pe->slaves, list)
581 opal_pci_eeh_freeze_clear(phb->opal_id,
582 slave->pe_number,
583 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
584 }
585 }
586
587 /*
588 * Associate PE in PELT. We need add the PE into the
589 * corresponding PELT-V as well. Otherwise, the error
590 * originated from the PE might contribute to other
591 * PEs.
592 */
593 ret = pnv_ioda_set_one_peltv(phb, pe, pe, is_add);
594 if (ret)
595 return ret;
596
597 /* For compound PEs, any one affects all of them */
598 if (pe->flags & PNV_IODA_PE_MASTER) {
599 list_for_each_entry(slave, &pe->slaves, list) {
600 ret = pnv_ioda_set_one_peltv(phb, slave, pe, is_add);
601 if (ret)
602 return ret;
603 }
604 }
605
606 if (pe->flags & (PNV_IODA_PE_BUS_ALL | PNV_IODA_PE_BUS))
607 pdev = pe->pbus->self;
608 else
609 pdev = pe->pdev->bus->self;
610 while (pdev) {
611 struct pci_dn *pdn = pci_get_pdn(pdev);
612 struct pnv_ioda_pe *parent;
613
614 if (pdn && pdn->pe_number != IODA_INVALID_PE) {
615 parent = &phb->ioda.pe_array[pdn->pe_number];
616 ret = pnv_ioda_set_one_peltv(phb, parent, pe, is_add);
617 if (ret)
618 return ret;
619 }
620
621 pdev = pdev->bus->self;
622 }
623
624 return 0;
625}
626
510static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) 627static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
511{ 628{
512 struct pci_dev *parent; 629 struct pci_dev *parent;
@@ -561,48 +678,36 @@ static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
561 return -ENXIO; 678 return -ENXIO;
562 } 679 }
563 680
564 rc = opal_pci_set_peltv(phb->opal_id, pe->pe_number, 681 /* Configure PELTV */
565 pe->pe_number, OPAL_ADD_PE_TO_DOMAIN); 682 pnv_ioda_set_peltv(phb, pe, true);
566 if (rc)
567 pe_warn(pe, "OPAL error %d adding self to PELTV\n", rc);
568 opal_pci_eeh_freeze_clear(phb->opal_id, pe->pe_number,
569 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
570 683
571 /* Add to all parents PELT-V */
572 while (parent) {
573 struct pci_dn *pdn = pci_get_pdn(parent);
574 if (pdn && pdn->pe_number != IODA_INVALID_PE) {
575 rc = opal_pci_set_peltv(phb->opal_id, pdn->pe_number,
576 pe->pe_number, OPAL_ADD_PE_TO_DOMAIN);
577 /* XXX What to do in case of error ? */
578 }
579 parent = parent->bus->self;
580 }
581 /* Setup reverse map */ 684 /* Setup reverse map */
582 for (rid = pe->rid; rid < rid_end; rid++) 685 for (rid = pe->rid; rid < rid_end; rid++)
583 phb->ioda.pe_rmap[rid] = pe->pe_number; 686 phb->ioda.pe_rmap[rid] = pe->pe_number;
584 687
585 /* Setup one MVTs on IODA1 */ 688 /* Setup one MVTs on IODA1 */
586 if (phb->type == PNV_PHB_IODA1) { 689 if (phb->type != PNV_PHB_IODA1) {
587 pe->mve_number = pe->pe_number; 690 pe->mve_number = 0;
588 rc = opal_pci_set_mve(phb->opal_id, pe->mve_number, 691 goto out;
589 pe->pe_number); 692 }
693
694 pe->mve_number = pe->pe_number;
695 rc = opal_pci_set_mve(phb->opal_id, pe->mve_number, pe->pe_number);
696 if (rc != OPAL_SUCCESS) {
697 pe_err(pe, "OPAL error %ld setting up MVE %d\n",
698 rc, pe->mve_number);
699 pe->mve_number = -1;
700 } else {
701 rc = opal_pci_set_mve_enable(phb->opal_id,
702 pe->mve_number, OPAL_ENABLE_MVE);
590 if (rc) { 703 if (rc) {
591 pe_err(pe, "OPAL error %ld setting up MVE %d\n", 704 pe_err(pe, "OPAL error %ld enabling MVE %d\n",
592 rc, pe->mve_number); 705 rc, pe->mve_number);
593 pe->mve_number = -1; 706 pe->mve_number = -1;
594 } else {
595 rc = opal_pci_set_mve_enable(phb->opal_id,
596 pe->mve_number, OPAL_ENABLE_MVE);
597 if (rc) {
598 pe_err(pe, "OPAL error %ld enabling MVE %d\n",
599 rc, pe->mve_number);
600 pe->mve_number = -1;
601 }
602 } 707 }
603 } else if (phb->type == PNV_PHB_IODA2) 708 }
604 pe->mve_number = 0;
605 709
710out:
606 return 0; 711 return 0;
607} 712}
608 713
@@ -837,8 +942,8 @@ static void pnv_pci_ioda_setup_PEs(void)
837 phb = hose->private_data; 942 phb = hose->private_data;
838 943
839 /* M64 layout might affect PE allocation */ 944 /* M64 layout might affect PE allocation */
840 if (phb->alloc_m64_pe) 945 if (phb->reserve_m64_pe)
841 phb->alloc_m64_pe(phb); 946 phb->reserve_m64_pe(phb);
842 947
843 pnv_ioda_setup_PEs(hose->bus); 948 pnv_ioda_setup_PEs(hose->bus);
844 } 949 }
@@ -1834,19 +1939,14 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
1834 phb_id = be64_to_cpup(prop64); 1939 phb_id = be64_to_cpup(prop64);
1835 pr_debug(" PHB-ID : 0x%016llx\n", phb_id); 1940 pr_debug(" PHB-ID : 0x%016llx\n", phb_id);
1836 1941
1837 phb = alloc_bootmem(sizeof(struct pnv_phb)); 1942 phb = memblock_virt_alloc(sizeof(struct pnv_phb), 0);
1838 if (!phb) {
1839 pr_err(" Out of memory !\n");
1840 return;
1841 }
1842 1943
1843 /* Allocate PCI controller */ 1944 /* Allocate PCI controller */
1844 memset(phb, 0, sizeof(struct pnv_phb));
1845 phb->hose = hose = pcibios_alloc_controller(np); 1945 phb->hose = hose = pcibios_alloc_controller(np);
1846 if (!phb->hose) { 1946 if (!phb->hose) {
1847 pr_err(" Can't allocate PCI controller for %s\n", 1947 pr_err(" Can't allocate PCI controller for %s\n",
1848 np->full_name); 1948 np->full_name);
1849 free_bootmem((unsigned long)phb, sizeof(struct pnv_phb)); 1949 memblock_free(__pa(phb), sizeof(struct pnv_phb));
1850 return; 1950 return;
1851 } 1951 }
1852 1952
@@ -1913,8 +2013,7 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
1913 } 2013 }
1914 pemap_off = size; 2014 pemap_off = size;
1915 size += phb->ioda.total_pe * sizeof(struct pnv_ioda_pe); 2015 size += phb->ioda.total_pe * sizeof(struct pnv_ioda_pe);
1916 aux = alloc_bootmem(size); 2016 aux = memblock_virt_alloc(size, 0);
1917 memset(aux, 0, size);
1918 phb->ioda.pe_alloc = aux; 2017 phb->ioda.pe_alloc = aux;
1919 phb->ioda.m32_segmap = aux + m32map_off; 2018 phb->ioda.m32_segmap = aux + m32map_off;
1920 if (phb->type == PNV_PHB_IODA1) 2019 if (phb->type == PNV_PHB_IODA1)
@@ -1999,8 +2098,8 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
1999 ioda_eeh_phb_reset(hose, EEH_RESET_DEACTIVATE); 2098 ioda_eeh_phb_reset(hose, EEH_RESET_DEACTIVATE);
2000 } 2099 }
2001 2100
2002 /* Configure M64 window */ 2101 /* Remove M64 resource if we can't configure it successfully */
2003 if (phb->init_m64 && phb->init_m64(phb)) 2102 if (!phb->init_m64 || phb->init_m64(phb))
2004 hose->mem_resources[1].flags = 0; 2103 hose->mem_resources[1].flags = 0;
2005} 2104}
2006 2105
diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
index 94ce3481490b..6ef6d4d8e7e2 100644
--- a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
+++ b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
@@ -122,12 +122,9 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,
122 return; 122 return;
123 } 123 }
124 124
125 phb = alloc_bootmem(sizeof(struct pnv_phb)); 125 phb = memblock_virt_alloc(sizeof(struct pnv_phb), 0);
126 if (phb) { 126 phb->hose = pcibios_alloc_controller(np);
127 memset(phb, 0, sizeof(struct pnv_phb)); 127 if (!phb->hose) {
128 phb->hose = pcibios_alloc_controller(np);
129 }
130 if (!phb || !phb->hose) {
131 pr_err(" Failed to allocate PCI controller\n"); 128 pr_err(" Failed to allocate PCI controller\n");
132 return; 129 return;
133 } 130 }
@@ -196,16 +193,27 @@ void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)
196 hub_id = be64_to_cpup(prop64); 193 hub_id = be64_to_cpup(prop64);
197 pr_info(" HUB-ID : 0x%016llx\n", hub_id); 194 pr_info(" HUB-ID : 0x%016llx\n", hub_id);
198 195
196 /* Count child PHBs and calculate TCE space per PHB */
197 for_each_child_of_node(np, phbn) {
198 if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") ||
199 of_device_is_compatible(phbn, "ibm,p5ioc2-pciex"))
200 phb_count++;
201 }
202
203 if (phb_count <= 0) {
204 pr_info(" No PHBs for Hub %s\n", np->full_name);
205 return;
206 }
207
208 tce_per_phb = __rounddown_pow_of_two(P5IOC2_TCE_MEMORY / phb_count);
209 pr_info(" Allocating %lld MB of TCE memory per PHB\n",
210 tce_per_phb >> 20);
211
199 /* Currently allocate 16M of TCE memory for every Hub 212 /* Currently allocate 16M of TCE memory for every Hub
200 * 213 *
201 * XXX TODO: Make it chip local if possible 214 * XXX TODO: Make it chip local if possible
202 */ 215 */
203 tce_mem = __alloc_bootmem(P5IOC2_TCE_MEMORY, P5IOC2_TCE_MEMORY, 216 tce_mem = memblock_virt_alloc(P5IOC2_TCE_MEMORY, P5IOC2_TCE_MEMORY);
204 __pa(MAX_DMA_ADDRESS));
205 if (!tce_mem) {
206 pr_err(" Failed to allocate TCE Memory !\n");
207 return;
208 }
209 pr_debug(" TCE : 0x%016lx..0x%016lx\n", 217 pr_debug(" TCE : 0x%016lx..0x%016lx\n",
210 __pa(tce_mem), __pa(tce_mem) + P5IOC2_TCE_MEMORY - 1); 218 __pa(tce_mem), __pa(tce_mem) + P5IOC2_TCE_MEMORY - 1);
211 rc = opal_pci_set_hub_tce_memory(hub_id, __pa(tce_mem), 219 rc = opal_pci_set_hub_tce_memory(hub_id, __pa(tce_mem),
@@ -215,18 +223,6 @@ void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)
215 return; 223 return;
216 } 224 }
217 225
218 /* Count child PHBs */
219 for_each_child_of_node(np, phbn) {
220 if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") ||
221 of_device_is_compatible(phbn, "ibm,p5ioc2-pciex"))
222 phb_count++;
223 }
224
225 /* Calculate how much TCE space we can give per PHB */
226 tce_per_phb = __rounddown_pow_of_two(P5IOC2_TCE_MEMORY / phb_count);
227 pr_info(" Allocating %lld MB of TCE memory per PHB\n",
228 tce_per_phb >> 20);
229
230 /* Initialize PHBs */ 226 /* Initialize PHBs */
231 for_each_child_of_node(np, phbn) { 227 for_each_child_of_node(np, phbn) {
232 if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") || 228 if (of_device_is_compatible(phbn, "ibm,p5ioc2-pcix") ||
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 540fc6dd56b3..4945e87f12dc 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -16,7 +16,6 @@
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/bootmem.h>
20#include <linux/irq.h> 19#include <linux/irq.h>
21#include <linux/io.h> 20#include <linux/io.h>
22#include <linux/msi.h> 21#include <linux/msi.h>
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index 34d29eb2a4de..6c02ff8dd69f 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -130,7 +130,7 @@ struct pnv_phb {
130 u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn); 130 u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn);
131 void (*shutdown)(struct pnv_phb *phb); 131 void (*shutdown)(struct pnv_phb *phb);
132 int (*init_m64)(struct pnv_phb *phb); 132 int (*init_m64)(struct pnv_phb *phb);
133 void (*alloc_m64_pe)(struct pnv_phb *phb); 133 void (*reserve_m64_pe)(struct pnv_phb *phb);
134 int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all); 134 int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all);
135 int (*get_pe_state)(struct pnv_phb *phb, int pe_no); 135 int (*get_pe_state)(struct pnv_phb *phb, int pe_no);
136 void (*freeze_pe)(struct pnv_phb *phb, int pe_no); 136 void (*freeze_pe)(struct pnv_phb *phb, int pe_no);
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 3f9546d8a51f..30b1c3e298a6 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -265,10 +265,8 @@ static unsigned long pnv_memory_block_size(void)
265static void __init pnv_setup_machdep_opal(void) 265static void __init pnv_setup_machdep_opal(void)
266{ 266{
267 ppc_md.get_boot_time = opal_get_boot_time; 267 ppc_md.get_boot_time = opal_get_boot_time;
268 ppc_md.get_rtc_time = opal_get_rtc_time;
269 ppc_md.set_rtc_time = opal_set_rtc_time;
270 ppc_md.restart = pnv_restart; 268 ppc_md.restart = pnv_restart;
271 ppc_md.power_off = pnv_power_off; 269 pm_power_off = pnv_power_off;
272 ppc_md.halt = pnv_halt; 270 ppc_md.halt = pnv_halt;
273 ppc_md.machine_check_exception = opal_machine_check; 271 ppc_md.machine_check_exception = opal_machine_check;
274 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; 272 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
@@ -285,7 +283,7 @@ static void __init pnv_setup_machdep_rtas(void)
285 ppc_md.set_rtc_time = rtas_set_rtc_time; 283 ppc_md.set_rtc_time = rtas_set_rtc_time;
286 } 284 }
287 ppc_md.restart = rtas_restart; 285 ppc_md.restart = rtas_restart;
288 ppc_md.power_off = rtas_power_off; 286 pm_power_off = rtas_power_off;
289 ppc_md.halt = rtas_halt; 287 ppc_md.halt = rtas_halt;
290} 288}
291#endif /* CONFIG_PPC_POWERNV_RTAS */ 289#endif /* CONFIG_PPC_POWERNV_RTAS */
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 4753958cd509..b716f666e48a 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -149,6 +149,7 @@ static int pnv_smp_cpu_disable(void)
149static void pnv_smp_cpu_kill_self(void) 149static void pnv_smp_cpu_kill_self(void)
150{ 150{
151 unsigned int cpu; 151 unsigned int cpu;
152 unsigned long srr1;
152 153
153 /* Standard hot unplug procedure */ 154 /* Standard hot unplug procedure */
154 local_irq_disable(); 155 local_irq_disable();
@@ -165,13 +166,25 @@ static void pnv_smp_cpu_kill_self(void)
165 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1); 166 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
166 while (!generic_check_cpu_restart(cpu)) { 167 while (!generic_check_cpu_restart(cpu)) {
167 ppc64_runlatch_off(); 168 ppc64_runlatch_off();
168 power7_nap(1); 169 srr1 = power7_nap(1);
169 ppc64_runlatch_on(); 170 ppc64_runlatch_on();
170 171
171 /* Clear the IPI that woke us up */ 172 /*
172 icp_native_flush_interrupt(); 173 * If the SRR1 value indicates that we woke up due to
173 local_paca->irq_happened &= PACA_IRQ_HARD_DIS; 174 * an external interrupt, then clear the interrupt.
174 mb(); 175 * We clear the interrupt before checking for the
176 * reason, so as to avoid a race where we wake up for
177 * some other reason, find nothing and clear the interrupt
178 * just as some other cpu is sending us an interrupt.
179 * If we returned from power7_nap as a result of
180 * having finished executing in a KVM guest, then srr1
181 * contains 0.
182 */
183 if ((srr1 & SRR1_WAKEMASK) == SRR1_WAKEEE) {
184 icp_native_flush_interrupt();
185 local_paca->irq_happened &= PACA_IRQ_HARD_DIS;
186 smp_mb();
187 }
175 188
176 if (cpu_core_split_required()) 189 if (cpu_core_split_required())
177 continue; 190 continue;
diff --git a/arch/powerpc/platforms/ps3/htab.c b/arch/powerpc/platforms/ps3/htab.c
index 3e270e3412ae..2f95d33cf34a 100644
--- a/arch/powerpc/platforms/ps3/htab.c
+++ b/arch/powerpc/platforms/ps3/htab.c
@@ -110,7 +110,7 @@ static long ps3_hpte_remove(unsigned long hpte_group)
110 110
111static long ps3_hpte_updatepp(unsigned long slot, unsigned long newpp, 111static long ps3_hpte_updatepp(unsigned long slot, unsigned long newpp,
112 unsigned long vpn, int psize, int apsize, 112 unsigned long vpn, int psize, int apsize,
113 int ssize, int local) 113 int ssize, unsigned long inv_flags)
114{ 114{
115 int result; 115 int result;
116 u64 hpte_v, want_v, hpte_rs; 116 u64 hpte_v, want_v, hpte_rs;
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 5f3b23220b8e..a6c42f34303a 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -711,7 +711,7 @@ void __init ps3_register_ipi_irq(unsigned int cpu, unsigned int virq)
711 711
712static unsigned int ps3_get_irq(void) 712static unsigned int ps3_get_irq(void)
713{ 713{
714 struct ps3_private *pd = &__get_cpu_var(ps3_private); 714 struct ps3_private *pd = this_cpu_ptr(&ps3_private);
715 u64 x = (pd->bmp.status & pd->bmp.mask); 715 u64 x = (pd->bmp.status & pd->bmp.mask);
716 unsigned int plug; 716 unsigned int plug;
717 717
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c
index 3f509f86432c..799c8580ab09 100644
--- a/arch/powerpc/platforms/ps3/setup.c
+++ b/arch/powerpc/platforms/ps3/setup.c
@@ -125,12 +125,7 @@ static void __init prealloc(struct ps3_prealloc *p)
125 if (!p->size) 125 if (!p->size)
126 return; 126 return;
127 127
128 p->address = __alloc_bootmem(p->size, p->align, __pa(MAX_DMA_ADDRESS)); 128 p->address = memblock_virt_alloc(p->size, p->align);
129 if (!p->address) {
130 printk(KERN_ERR "%s: Cannot allocate %s\n", __func__,
131 p->name);
132 return;
133 }
134 129
135 printk(KERN_INFO "%s: %lu bytes at %p\n", p->name, p->size, 130 printk(KERN_INFO "%s: %lu bytes at %p\n", p->name, p->size,
136 p->address); 131 p->address);
@@ -248,6 +243,7 @@ static int __init ps3_probe(void)
248 ps3_mm_init(); 243 ps3_mm_init();
249 ps3_mm_vas_create(&htab_size); 244 ps3_mm_vas_create(&htab_size);
250 ps3_hpte_init(htab_size); 245 ps3_hpte_init(htab_size);
246 pm_power_off = ps3_power_off;
251 247
252 DBG(" <- %s:%d\n", __func__, __LINE__); 248 DBG(" <- %s:%d\n", __func__, __LINE__);
253 return 1; 249 return 1;
@@ -278,7 +274,6 @@ define_machine(ps3) {
278 .calibrate_decr = ps3_calibrate_decr, 274 .calibrate_decr = ps3_calibrate_decr,
279 .progress = ps3_progress, 275 .progress = ps3_progress,
280 .restart = ps3_restart, 276 .restart = ps3_restart,
281 .power_off = ps3_power_off,
282 .halt = ps3_halt, 277 .halt = ps3_halt,
283#if defined(CONFIG_KEXEC) 278#if defined(CONFIG_KEXEC)
284 .kexec_cpu_down = ps3_kexec_cpu_down, 279 .kexec_cpu_down = ps3_kexec_cpu_down,
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index 1062f71f5a85..39049e4884fb 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -75,7 +75,7 @@ static atomic_t dtl_count;
75 */ 75 */
76static void consume_dtle(struct dtl_entry *dtle, u64 index) 76static void consume_dtle(struct dtl_entry *dtle, u64 index)
77{ 77{
78 struct dtl_ring *dtlr = &__get_cpu_var(dtl_rings); 78 struct dtl_ring *dtlr = this_cpu_ptr(&dtl_rings);
79 struct dtl_entry *wp = dtlr->write_ptr; 79 struct dtl_entry *wp = dtlr->write_ptr;
80 struct lppaca *vpa = local_paca->lppaca_ptr; 80 struct lppaca *vpa = local_paca->lppaca_ptr;
81 81
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 1bbb78fab530..fa41f0da5b6f 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -12,7 +12,6 @@
12#include <linux/of.h> 12#include <linux/of.h>
13#include <linux/of_address.h> 13#include <linux/of_address.h>
14#include <linux/memblock.h> 14#include <linux/memblock.h>
15#include <linux/vmalloc.h>
16#include <linux/memory.h> 15#include <linux/memory.h>
17#include <linux/memory_hotplug.h> 16#include <linux/memory_hotplug.h>
18 17
@@ -66,22 +65,6 @@ unsigned long pseries_memory_block_size(void)
66} 65}
67 66
68#ifdef CONFIG_MEMORY_HOTREMOVE 67#ifdef CONFIG_MEMORY_HOTREMOVE
69static int pseries_remove_memory(u64 start, u64 size)
70{
71 int ret;
72
73 /* Remove htab bolted mappings for this section of memory */
74 start = (unsigned long)__va(start);
75 ret = remove_section_mapping(start, start + size);
76
77 /* Ensure all vmalloc mappings are flushed in case they also
78 * hit that section of memory
79 */
80 vm_unmap_aliases();
81
82 return ret;
83}
84
85static int pseries_remove_memblock(unsigned long base, unsigned int memblock_size) 68static int pseries_remove_memblock(unsigned long base, unsigned int memblock_size)
86{ 69{
87 unsigned long block_sz, start_pfn; 70 unsigned long block_sz, start_pfn;
@@ -261,10 +244,6 @@ static int __init pseries_memory_hotplug_init(void)
261 if (firmware_has_feature(FW_FEATURE_LPAR)) 244 if (firmware_has_feature(FW_FEATURE_LPAR))
262 of_reconfig_notifier_register(&pseries_mem_nb); 245 of_reconfig_notifier_register(&pseries_mem_nb);
263 246
264#ifdef CONFIG_MEMORY_HOTREMOVE
265 ppc_md.remove_memory = pseries_remove_memory;
266#endif
267
268 return 0; 247 return 0;
269} 248}
270machine_device_initcall(pseries, pseries_memory_hotplug_init); 249machine_device_initcall(pseries, pseries_memory_hotplug_init);
diff --git a/arch/powerpc/platforms/pseries/hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S
index 3fda3f17b84e..ccd53f91e8aa 100644
--- a/arch/powerpc/platforms/pseries/hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
@@ -18,7 +18,7 @@
18 18
19#ifdef CONFIG_TRACEPOINTS 19#ifdef CONFIG_TRACEPOINTS
20 20
21#ifndef CONFIG_JUMP_LABEL 21#ifndef HAVE_JUMP_LABEL
22 .section ".toc","aw" 22 .section ".toc","aw"
23 23
24 .globl hcall_tracepoint_refcount 24 .globl hcall_tracepoint_refcount
@@ -78,7 +78,7 @@ hcall_tracepoint_refcount:
78 mr r5,BUFREG; \ 78 mr r5,BUFREG; \
79 __HCALL_INST_POSTCALL 79 __HCALL_INST_POSTCALL
80 80
81#ifdef CONFIG_JUMP_LABEL 81#ifdef HAVE_JUMP_LABEL
82#define HCALL_BRANCH(LABEL) \ 82#define HCALL_BRANCH(LABEL) \
83 ARCH_STATIC_BRANCH(LABEL, hcall_tracepoint_key) 83 ARCH_STATIC_BRANCH(LABEL, hcall_tracepoint_key)
84#else 84#else
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index 4575f0c9e521..f02ec3ab428c 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -110,7 +110,7 @@ static void probe_hcall_entry(void *ignored, unsigned long opcode, unsigned long
110 if (opcode > MAX_HCALL_OPCODE) 110 if (opcode > MAX_HCALL_OPCODE)
111 return; 111 return;
112 112
113 h = &__get_cpu_var(hcall_stats)[opcode / 4]; 113 h = this_cpu_ptr(&hcall_stats[opcode / 4]);
114 h->tb_start = mftb(); 114 h->tb_start = mftb();
115 h->purr_start = mfspr(SPRN_PURR); 115 h->purr_start = mfspr(SPRN_PURR);
116} 116}
@@ -123,7 +123,7 @@ static void probe_hcall_exit(void *ignored, unsigned long opcode, unsigned long
123 if (opcode > MAX_HCALL_OPCODE) 123 if (opcode > MAX_HCALL_OPCODE)
124 return; 124 return;
125 125
126 h = &__get_cpu_var(hcall_stats)[opcode / 4]; 126 h = this_cpu_ptr(&hcall_stats[opcode / 4]);
127 h->num_calls++; 127 h->num_calls++;
128 h->tb_total += mftb() - h->tb_start; 128 h->tb_total += mftb() - h->tb_start;
129 h->purr_total += mfspr(SPRN_PURR) - h->purr_start; 129 h->purr_total += mfspr(SPRN_PURR) - h->purr_start;
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 3e5bfdafee63..1d3d52dc3ff3 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -199,7 +199,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
199 199
200 local_irq_save(flags); /* to protect tcep and the page behind it */ 200 local_irq_save(flags); /* to protect tcep and the page behind it */
201 201
202 tcep = __get_cpu_var(tce_page); 202 tcep = __this_cpu_read(tce_page);
203 203
204 /* This is safe to do since interrupts are off when we're called 204 /* This is safe to do since interrupts are off when we're called
205 * from iommu_alloc{,_sg}() 205 * from iommu_alloc{,_sg}()
@@ -212,7 +212,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
212 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, 212 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
213 direction, attrs); 213 direction, attrs);
214 } 214 }
215 __get_cpu_var(tce_page) = tcep; 215 __this_cpu_write(tce_page, tcep);
216 } 216 }
217 217
218 rpn = __pa(uaddr) >> TCE_SHIFT; 218 rpn = __pa(uaddr) >> TCE_SHIFT;
@@ -398,7 +398,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
398 long l, limit; 398 long l, limit;
399 399
400 local_irq_disable(); /* to protect tcep and the page behind it */ 400 local_irq_disable(); /* to protect tcep and the page behind it */
401 tcep = __get_cpu_var(tce_page); 401 tcep = __this_cpu_read(tce_page);
402 402
403 if (!tcep) { 403 if (!tcep) {
404 tcep = (__be64 *)__get_free_page(GFP_ATOMIC); 404 tcep = (__be64 *)__get_free_page(GFP_ATOMIC);
@@ -406,7 +406,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
406 local_irq_enable(); 406 local_irq_enable();
407 return -ENOMEM; 407 return -ENOMEM;
408 } 408 }
409 __get_cpu_var(tce_page) = tcep; 409 __this_cpu_write(tce_page, tcep);
410 } 410 }
411 411
412 proto_tce = TCE_PCI_READ | TCE_PCI_WRITE; 412 proto_tce = TCE_PCI_READ | TCE_PCI_WRITE;
@@ -574,8 +574,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
574 while (isa_dn && isa_dn != dn) 574 while (isa_dn && isa_dn != dn)
575 isa_dn = isa_dn->parent; 575 isa_dn = isa_dn->parent;
576 576
577 if (isa_dn_orig) 577 of_node_put(isa_dn_orig);
578 of_node_put(isa_dn_orig);
579 578
580 /* Count number of direct PCI children of the PHB. */ 579 /* Count number of direct PCI children of the PHB. */
581 for (children = 0, tmp = dn->child; tmp; tmp = tmp->sibling) 580 for (children = 0, tmp = dn->child; tmp; tmp = tmp->sibling)
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index f6880d2a40fb..469751d92004 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -284,7 +284,7 @@ static long pSeries_lpar_hpte_updatepp(unsigned long slot,
284 unsigned long newpp, 284 unsigned long newpp,
285 unsigned long vpn, 285 unsigned long vpn,
286 int psize, int apsize, 286 int psize, int apsize,
287 int ssize, int local) 287 int ssize, unsigned long inv_flags)
288{ 288{
289 unsigned long lpar_rc; 289 unsigned long lpar_rc;
290 unsigned long flags = (newpp & 7) | H_AVPN; 290 unsigned long flags = (newpp & 7) | H_AVPN;
@@ -442,7 +442,7 @@ static void __pSeries_lpar_hugepage_invalidate(unsigned long *slot,
442static void pSeries_lpar_hugepage_invalidate(unsigned long vsid, 442static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
443 unsigned long addr, 443 unsigned long addr,
444 unsigned char *hpte_slot_array, 444 unsigned char *hpte_slot_array,
445 int psize, int ssize) 445 int psize, int ssize, int local)
446{ 446{
447 int i, index = 0; 447 int i, index = 0;
448 unsigned long s_addr = addr; 448 unsigned long s_addr = addr;
@@ -515,7 +515,7 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
515 unsigned long vpn; 515 unsigned long vpn;
516 unsigned long i, pix, rc; 516 unsigned long i, pix, rc;
517 unsigned long flags = 0; 517 unsigned long flags = 0;
518 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 518 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
519 int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE); 519 int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
520 unsigned long param[9]; 520 unsigned long param[9];
521 unsigned long hash, index, shift, hidx, slot; 521 unsigned long hash, index, shift, hidx, slot;
@@ -705,7 +705,7 @@ void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
705 705
706 local_irq_save(flags); 706 local_irq_save(flags);
707 707
708 depth = &__get_cpu_var(hcall_trace_depth); 708 depth = this_cpu_ptr(&hcall_trace_depth);
709 709
710 if (*depth) 710 if (*depth)
711 goto out; 711 goto out;
@@ -730,7 +730,7 @@ void __trace_hcall_exit(long opcode, unsigned long retval,
730 730
731 local_irq_save(flags); 731 local_irq_save(flags);
732 732
733 depth = &__get_cpu_var(hcall_trace_depth); 733 depth = this_cpu_ptr(&hcall_trace_depth);
734 734
735 if (*depth) 735 if (*depth)
736 goto out; 736 goto out;
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 11a3b617ef5d..054a0ed5c7ee 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -715,6 +715,8 @@ static int nvram_pstore_init(void)
715 nvram_pstore_info.buf = oops_data; 715 nvram_pstore_info.buf = oops_data;
716 nvram_pstore_info.bufsize = oops_data_sz; 716 nvram_pstore_info.bufsize = oops_data_sz;
717 717
718 spin_lock_init(&nvram_pstore_info.buf_lock);
719
718 rc = pstore_register(&nvram_pstore_info); 720 rc = pstore_register(&nvram_pstore_info);
719 if (rc != 0) 721 if (rc != 0)
720 pr_err("nvram: pstore_register() failed, defaults to " 722 pr_err("nvram: pstore_register() failed, defaults to "
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index 67e48594040c..fe16a50700de 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -134,7 +134,7 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
134 of_node_put(pdn); 134 of_node_put(pdn);
135 135
136 if (rc) { 136 if (rc) {
137 pr_err("no ibm,pcie-link-speed-stats property\n"); 137 pr_debug("no ibm,pcie-link-speed-stats property\n");
138 return 0; 138 return 0;
139 } 139 }
140 140
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 5a4d0fc03b03..c3b2a7e81ddb 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -302,8 +302,8 @@ static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
302 /* If it isn't an extended log we can use the per cpu 64bit buffer */ 302 /* If it isn't an extended log we can use the per cpu 64bit buffer */
303 h = (struct rtas_error_log *)&savep[1]; 303 h = (struct rtas_error_log *)&savep[1];
304 if (!rtas_error_extended(h)) { 304 if (!rtas_error_extended(h)) {
305 memcpy(&__get_cpu_var(mce_data_buf), h, sizeof(__u64)); 305 memcpy(this_cpu_ptr(&mce_data_buf), h, sizeof(__u64));
306 errhdr = (struct rtas_error_log *)&__get_cpu_var(mce_data_buf); 306 errhdr = (struct rtas_error_log *)this_cpu_ptr(&mce_data_buf);
307 } else { 307 } else {
308 int len, error_log_length; 308 int len, error_log_length;
309 309
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index ed8a90022a3d..e445b6701f50 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -500,7 +500,11 @@ static void __init pSeries_setup_arch(void)
500 500
501 if (firmware_has_feature(FW_FEATURE_SET_MODE)) { 501 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
502 long rc; 502 long rc;
503 if ((rc = pSeries_enable_reloc_on_exc()) != H_SUCCESS) { 503
504 rc = pSeries_enable_reloc_on_exc();
505 if (rc == H_P2) {
506 pr_info("Relocation on exceptions not supported\n");
507 } else if (rc != H_SUCCESS) {
504 pr_warn("Unable to enable relocation on exceptions: " 508 pr_warn("Unable to enable relocation on exceptions: "
505 "%ld\n", rc); 509 "%ld\n", rc);
506 } 510 }
@@ -660,6 +664,34 @@ static void __init pSeries_init_early(void)
660 pr_debug(" <- pSeries_init_early()\n"); 664 pr_debug(" <- pSeries_init_early()\n");
661} 665}
662 666
667/**
668 * pseries_power_off - tell firmware about how to power off the system.
669 *
670 * This function calls either the power-off rtas token in normal cases
671 * or the ibm,power-off-ups token (if present & requested) in case of
672 * a power failure. If power-off token is used, power on will only be
673 * possible with power button press. If ibm,power-off-ups token is used
674 * it will allow auto poweron after power is restored.
675 */
676static void pseries_power_off(void)
677{
678 int rc;
679 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
680
681 if (rtas_flash_term_hook)
682 rtas_flash_term_hook(SYS_POWER_OFF);
683
684 if (rtas_poweron_auto == 0 ||
685 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
686 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
687 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
688 } else {
689 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
690 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
691 }
692 for (;;);
693}
694
663/* 695/*
664 * Called very early, MMU is off, device-tree isn't unflattened 696 * Called very early, MMU is off, device-tree isn't unflattened
665 */ 697 */
@@ -742,6 +774,8 @@ static int __init pSeries_probe(void)
742 else 774 else
743 hpte_init_native(); 775 hpte_init_native();
744 776
777 pm_power_off = pseries_power_off;
778
745 pr_debug("Machine is%s LPAR !\n", 779 pr_debug("Machine is%s LPAR !\n",
746 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 780 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
747 781
@@ -755,34 +789,6 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
755 return PCI_PROBE_NORMAL; 789 return PCI_PROBE_NORMAL;
756} 790}
757 791
758/**
759 * pSeries_power_off - tell firmware about how to power off the system.
760 *
761 * This function calls either the power-off rtas token in normal cases
762 * or the ibm,power-off-ups token (if present & requested) in case of
763 * a power failure. If power-off token is used, power on will only be
764 * possible with power button press. If ibm,power-off-ups token is used
765 * it will allow auto poweron after power is restored.
766 */
767static void pSeries_power_off(void)
768{
769 int rc;
770 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
771
772 if (rtas_flash_term_hook)
773 rtas_flash_term_hook(SYS_POWER_OFF);
774
775 if (rtas_poweron_auto == 0 ||
776 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
777 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
778 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
779 } else {
780 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
781 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
782 }
783 for (;;);
784}
785
786#ifndef CONFIG_PCI 792#ifndef CONFIG_PCI
787void pSeries_final_fixup(void) { } 793void pSeries_final_fixup(void) { }
788#endif 794#endif
@@ -797,7 +803,6 @@ define_machine(pseries) {
797 .pcibios_fixup = pSeries_final_fixup, 803 .pcibios_fixup = pSeries_final_fixup,
798 .pci_probe_mode = pSeries_pci_probe_mode, 804 .pci_probe_mode = pSeries_pci_probe_mode,
799 .restart = rtas_restart, 805 .restart = rtas_restart,
800 .power_off = pSeries_power_off,
801 .halt = rtas_halt, 806 .halt = rtas_halt,
802 .panic = rtas_os_term, 807 .panic = rtas_os_term,
803 .get_boot_time = rtas_get_boot_time, 808 .get_boot_time = rtas_get_boot_time,
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 7aed8d0876b7..d09f4fa2c3d1 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -13,7 +13,6 @@
13 * 13 *
14 */ 14 */
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/bootmem.h>
17#include <linux/msi.h> 16#include <linux/msi.h>
18#include <linux/pci.h> 17#include <linux/pci.h>
19#include <linux/slab.h> 18#include <linux/slab.h>
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 65d2ed4549e6..6455c1eada1a 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -23,7 +23,6 @@
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/bootmem.h>
27#include <linux/memblock.h> 26#include <linux/memblock.h>
28#include <linux/log2.h> 27#include <linux/log2.h>
29#include <linux/slab.h> 28#include <linux/slab.h>
@@ -152,7 +151,7 @@ static int setup_one_atmu(struct ccsr_pci __iomem *pci,
152 flags |= 0x10000000; /* enable relaxed ordering */ 151 flags |= 0x10000000; /* enable relaxed ordering */
153 152
154 for (i = 0; size > 0; i++) { 153 for (i = 0; size > 0; i++) {
155 unsigned int bits = min(ilog2(size), 154 unsigned int bits = min_t(u32, ilog2(size),
156 __ffs(pci_addr | phys_addr)); 155 __ffs(pci_addr | phys_addr));
157 156
158 if (index + i >= 5) 157 if (index + i >= 5)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index c04b718307c8..08d60f183dad 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -58,6 +58,19 @@
58#define RIO_ISR_AACR 0x10120 58#define RIO_ISR_AACR 0x10120
59#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ 59#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
60 60
61#define RIWTAR_TRAD_VAL_SHIFT 12
62#define RIWTAR_TRAD_MASK 0x00FFFFFF
63#define RIWBAR_BADD_VAL_SHIFT 12
64#define RIWBAR_BADD_MASK 0x003FFFFF
65#define RIWAR_ENABLE 0x80000000
66#define RIWAR_TGINT_LOCAL 0x00F00000
67#define RIWAR_RDTYP_NO_SNOOP 0x00040000
68#define RIWAR_RDTYP_SNOOP 0x00050000
69#define RIWAR_WRTYP_NO_SNOOP 0x00004000
70#define RIWAR_WRTYP_SNOOP 0x00005000
71#define RIWAR_WRTYP_ALLOC 0x00006000
72#define RIWAR_SIZE_MASK 0x0000003F
73
61#define __fsl_read_rio_config(x, addr, err, op) \ 74#define __fsl_read_rio_config(x, addr, err, op) \
62 __asm__ __volatile__( \ 75 __asm__ __volatile__( \
63 "1: "op" %1,0(%2)\n" \ 76 "1: "op" %1,0(%2)\n" \
@@ -266,6 +279,89 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
266 return 0; 279 return 0;
267} 280}
268 281
282static void fsl_rio_inbound_mem_init(struct rio_priv *priv)
283{
284 int i;
285
286 /* close inbound windows */
287 for (i = 0; i < RIO_INB_ATMU_COUNT; i++)
288 out_be32(&priv->inb_atmu_regs[i].riwar, 0);
289}
290
291int fsl_map_inb_mem(struct rio_mport *mport, dma_addr_t lstart,
292 u64 rstart, u32 size, u32 flags)
293{
294 struct rio_priv *priv = mport->priv;
295 u32 base_size;
296 unsigned int base_size_log;
297 u64 win_start, win_end;
298 u32 riwar;
299 int i;
300
301 if ((size & (size - 1)) != 0)
302 return -EINVAL;
303
304 base_size_log = ilog2(size);
305 base_size = 1 << base_size_log;
306
307 /* check if addresses are aligned with the window size */
308 if (lstart & (base_size - 1))
309 return -EINVAL;
310 if (rstart & (base_size - 1))
311 return -EINVAL;
312
313 /* check for conflicting ranges */
314 for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
315 riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
316 if ((riwar & RIWAR_ENABLE) == 0)
317 continue;
318 win_start = ((u64)(in_be32(&priv->inb_atmu_regs[i].riwbar) & RIWBAR_BADD_MASK))
319 << RIWBAR_BADD_VAL_SHIFT;
320 win_end = win_start + ((1 << ((riwar & RIWAR_SIZE_MASK) + 1)) - 1);
321 if (rstart < win_end && (rstart + size) > win_start)
322 return -EINVAL;
323 }
324
325 /* find unused atmu */
326 for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
327 riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
328 if ((riwar & RIWAR_ENABLE) == 0)
329 break;
330 }
331 if (i >= RIO_INB_ATMU_COUNT)
332 return -ENOMEM;
333
334 out_be32(&priv->inb_atmu_regs[i].riwtar, lstart >> RIWTAR_TRAD_VAL_SHIFT);
335 out_be32(&priv->inb_atmu_regs[i].riwbar, rstart >> RIWBAR_BADD_VAL_SHIFT);
336 out_be32(&priv->inb_atmu_regs[i].riwar, RIWAR_ENABLE | RIWAR_TGINT_LOCAL |
337 RIWAR_RDTYP_SNOOP | RIWAR_WRTYP_SNOOP | (base_size_log - 1));
338
339 return 0;
340}
341
342void fsl_unmap_inb_mem(struct rio_mport *mport, dma_addr_t lstart)
343{
344 u32 win_start_shift, base_start_shift;
345 struct rio_priv *priv = mport->priv;
346 u32 riwar, riwtar;
347 int i;
348
349 /* skip default window */
350 base_start_shift = lstart >> RIWTAR_TRAD_VAL_SHIFT;
351 for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
352 riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
353 if ((riwar & RIWAR_ENABLE) == 0)
354 continue;
355
356 riwtar = in_be32(&priv->inb_atmu_regs[i].riwtar);
357 win_start_shift = riwtar & RIWTAR_TRAD_MASK;
358 if (win_start_shift == base_start_shift) {
359 out_be32(&priv->inb_atmu_regs[i].riwar, riwar & ~RIWAR_ENABLE);
360 return;
361 }
362 }
363}
364
269void fsl_rio_port_error_handler(int offset) 365void fsl_rio_port_error_handler(int offset)
270{ 366{
271 /*XXX: Error recovery is not implemented, we just clear errors */ 367 /*XXX: Error recovery is not implemented, we just clear errors */
@@ -389,6 +485,8 @@ int fsl_rio_setup(struct platform_device *dev)
389 ops->add_outb_message = fsl_add_outb_message; 485 ops->add_outb_message = fsl_add_outb_message;
390 ops->add_inb_buffer = fsl_add_inb_buffer; 486 ops->add_inb_buffer = fsl_add_inb_buffer;
391 ops->get_inb_message = fsl_get_inb_message; 487 ops->get_inb_message = fsl_get_inb_message;
488 ops->map_inb = fsl_map_inb_mem;
489 ops->unmap_inb = fsl_unmap_inb_mem;
392 490
393 rmu_node = of_parse_phandle(dev->dev.of_node, "fsl,srio-rmu-handle", 0); 491 rmu_node = of_parse_phandle(dev->dev.of_node, "fsl,srio-rmu-handle", 0);
394 if (!rmu_node) { 492 if (!rmu_node) {
@@ -602,6 +700,11 @@ int fsl_rio_setup(struct platform_device *dev)
602 RIO_ATMU_REGS_PORT2_OFFSET)); 700 RIO_ATMU_REGS_PORT2_OFFSET));
603 701
604 priv->maint_atmu_regs = priv->atmu_regs + 1; 702 priv->maint_atmu_regs = priv->atmu_regs + 1;
703 priv->inb_atmu_regs = (struct rio_inb_atmu_regs __iomem *)
704 (priv->regs_win +
705 ((i == 0) ? RIO_INB_ATMU_REGS_PORT1_OFFSET :
706 RIO_INB_ATMU_REGS_PORT2_OFFSET));
707
605 708
606 /* Set to receive any dist ID for serial RapidIO controller. */ 709 /* Set to receive any dist ID for serial RapidIO controller. */
607 if (port->phy_type == RIO_PHY_SERIAL) 710 if (port->phy_type == RIO_PHY_SERIAL)
@@ -620,6 +723,7 @@ int fsl_rio_setup(struct platform_device *dev)
620 rio_law_start = range_start; 723 rio_law_start = range_start;
621 724
622 fsl_rio_setup_rmu(port, rmu_np[i]); 725 fsl_rio_setup_rmu(port, rmu_np[i]);
726 fsl_rio_inbound_mem_init(priv);
623 727
624 dbell->mport[i] = port; 728 dbell->mport[i] = port;
625 729
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
index ae8e27405a0d..d53407a34f32 100644
--- a/arch/powerpc/sysdev/fsl_rio.h
+++ b/arch/powerpc/sysdev/fsl_rio.h
@@ -50,9 +50,12 @@
50#define RIO_S_DBELL_REGS_OFFSET 0x13400 50#define RIO_S_DBELL_REGS_OFFSET 0x13400
51#define RIO_S_PW_REGS_OFFSET 0x134e0 51#define RIO_S_PW_REGS_OFFSET 0x134e0
52#define RIO_ATMU_REGS_DBELL_OFFSET 0x10C40 52#define RIO_ATMU_REGS_DBELL_OFFSET 0x10C40
53#define RIO_INB_ATMU_REGS_PORT1_OFFSET 0x10d60
54#define RIO_INB_ATMU_REGS_PORT2_OFFSET 0x10f60
53 55
54#define MAX_MSG_UNIT_NUM 2 56#define MAX_MSG_UNIT_NUM 2
55#define MAX_PORT_NUM 4 57#define MAX_PORT_NUM 4
58#define RIO_INB_ATMU_COUNT 4
56 59
57struct rio_atmu_regs { 60struct rio_atmu_regs {
58 u32 rowtar; 61 u32 rowtar;
@@ -63,6 +66,15 @@ struct rio_atmu_regs {
63 u32 pad2[3]; 66 u32 pad2[3];
64}; 67};
65 68
69struct rio_inb_atmu_regs {
70 u32 riwtar;
71 u32 pad1;
72 u32 riwbar;
73 u32 pad2;
74 u32 riwar;
75 u32 pad3[3];
76};
77
66struct rio_dbell_ring { 78struct rio_dbell_ring {
67 void *virt; 79 void *virt;
68 dma_addr_t phys; 80 dma_addr_t phys;
@@ -99,6 +111,7 @@ struct rio_priv {
99 void __iomem *regs_win; 111 void __iomem *regs_win;
100 struct rio_atmu_regs __iomem *atmu_regs; 112 struct rio_atmu_regs __iomem *atmu_regs;
101 struct rio_atmu_regs __iomem *maint_atmu_regs; 113 struct rio_atmu_regs __iomem *maint_atmu_regs;
114 struct rio_inb_atmu_regs __iomem *inb_atmu_regs;
102 void __iomem *maint_win; 115 void __iomem *maint_win;
103 void *rmm_handle; /* RapidIO message manager(unit) Handle */ 116 void *rmm_handle; /* RapidIO message manager(unit) Handle */
104}; 117};
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index ffd1169ebaab..99269c041615 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -197,8 +197,7 @@ static int __init setup_rstcr(void)
197 if (!rstcr && ppc_md.restart == fsl_rstcr_restart) 197 if (!rstcr && ppc_md.restart == fsl_rstcr_restart)
198 printk(KERN_ERR "No RSTCR register, warm reboot won't work\n"); 198 printk(KERN_ERR "No RSTCR register, warm reboot won't work\n");
199 199
200 if (np) 200 of_node_put(np);
201 of_node_put(np);
202 201
203 return 0; 202 return 0;
204} 203}
@@ -238,7 +237,7 @@ void fsl_hv_restart(char *cmd)
238/* 237/*
239 * Halt the current partition 238 * Halt the current partition
240 * 239 *
241 * This function should be assigned to the ppc_md.power_off and ppc_md.halt 240 * This function should be assigned to the pm_power_off and ppc_md.halt
242 * function pointers, to shut down the partition when we're running under 241 * function pointers, to shut down the partition when we're running under
243 * the Freescale hypervisor. 242 * the Freescale hypervisor.
244 */ 243 */
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index b50f97811c25..b28733727ed3 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -20,7 +20,6 @@
20#include <linux/signal.h> 20#include <linux/signal.h>
21#include <linux/syscore_ops.h> 21#include <linux/syscore_ops.h>
22#include <linux/device.h> 22#include <linux/device.h>
23#include <linux/bootmem.h>
24#include <linux/spinlock.h> 23#include <linux/spinlock.h>
25#include <linux/fsl_devices.h> 24#include <linux/fsl_devices.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
diff --git a/arch/powerpc/sysdev/mpc5xxx_clocks.c b/arch/powerpc/sysdev/mpc5xxx_clocks.c
index 5492dc5f56f4..f4f0301b9a60 100644
--- a/arch/powerpc/sysdev/mpc5xxx_clocks.c
+++ b/arch/powerpc/sysdev/mpc5xxx_clocks.c
@@ -26,8 +26,7 @@ unsigned long mpc5xxx_get_bus_frequency(struct device_node *node)
26 of_node_put(node); 26 of_node_put(node);
27 node = np; 27 node = np;
28 } 28 }
29 if (node) 29 of_node_put(node);
30 of_node_put(node);
31 30
32 return p_bus_freq ? *p_bus_freq : 0; 31 return p_bus_freq ? *p_bus_freq : 0;
33} 32}
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 89cec0ed6a58..c4648ad5c1f3 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -24,7 +24,6 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/smp.h> 25#include <linux/smp.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/bootmem.h>
28#include <linux/spinlock.h> 27#include <linux/spinlock.h>
29#include <linux/pci.h> 28#include <linux/pci.h>
30#include <linux/slab.h> 29#include <linux/slab.h>
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 45c114bc430b..a3f660eed6de 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -16,7 +16,6 @@
16#undef DEBUG 16#undef DEBUG
17 17
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/bootmem.h>
20#include <linux/msi.h> 19#include <linux/msi.h>
21#include <asm/mpic.h> 20#include <asm/mpic.h>
22#include <asm/prom.h> 21#include <asm/prom.h>
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 0dff1cd44481..b2cef1809389 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/irq.h> 12#include <linux/irq.h>
13#include <linux/bootmem.h>
14#include <linux/msi.h> 13#include <linux/msi.h>
15#include <asm/mpic.h> 14#include <asm/mpic.h>
16#include <asm/prom.h> 15#include <asm/prom.h>
diff --git a/arch/powerpc/sysdev/ppc4xx_cpm.c b/arch/powerpc/sysdev/ppc4xx_cpm.c
index 82e2cfe35c62..ba95adf81d8d 100644
--- a/arch/powerpc/sysdev/ppc4xx_cpm.c
+++ b/arch/powerpc/sysdev/ppc4xx_cpm.c
@@ -281,7 +281,7 @@ static int __init cpm_init(void)
281 printk(KERN_ERR "cpm: could not parse dcr property for %s\n", 281 printk(KERN_ERR "cpm: could not parse dcr property for %s\n",
282 np->full_name); 282 np->full_name);
283 ret = -EINVAL; 283 ret = -EINVAL;
284 goto out; 284 goto node_put;
285 } 285 }
286 286
287 cpm.dcr_host = dcr_map(np, dcr_base, dcr_len); 287 cpm.dcr_host = dcr_map(np, dcr_base, dcr_len);
@@ -290,7 +290,7 @@ static int __init cpm_init(void)
290 printk(KERN_ERR "cpm: failed to map dcr property for %s\n", 290 printk(KERN_ERR "cpm: failed to map dcr property for %s\n",
291 np->full_name); 291 np->full_name);
292 ret = -EINVAL; 292 ret = -EINVAL;
293 goto out; 293 goto node_put;
294 } 294 }
295 295
296 /* All 4xx SoCs with a CPM controller have one of two 296 /* All 4xx SoCs with a CPM controller have one of two
@@ -330,9 +330,9 @@ static int __init cpm_init(void)
330 330
331 if (cpm.standby || cpm.suspend) 331 if (cpm.standby || cpm.suspend)
332 suspend_set_ops(&cpm_suspend_ops); 332 suspend_set_ops(&cpm_suspend_ops);
333node_put:
334 of_node_put(np);
333out: 335out:
334 if (np)
335 of_node_put(np);
336 return ret; 336 return ret;
337} 337}
338 338
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c
index 518eabbe0bdc..5e622c0544c4 100644
--- a/arch/powerpc/sysdev/ppc4xx_msi.c
+++ b/arch/powerpc/sysdev/ppc4xx_msi.c
@@ -22,7 +22,6 @@
22 */ 22 */
23 23
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/bootmem.h>
26#include <linux/pci.h> 25#include <linux/pci.h>
27#include <linux/msi.h> 26#include <linux/msi.h>
28#include <linux/of_platform.h> 27#include <linux/of_platform.h>
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index df6e2fc4ff92..086aca69ecae 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -22,7 +22,6 @@
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/of.h> 24#include <linux/of.h>
25#include <linux/bootmem.h>
26#include <linux/delay.h> 25#include <linux/delay.h>
27#include <linux/slab.h> 26#include <linux/slab.h>
28 27
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 238a07b97f2c..b584debbcd9c 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -22,7 +22,6 @@
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/bootmem.h>
26#include <linux/module.h> 25#include <linux/module.h>
27#include <linux/delay.h> 26#include <linux/delay.h>
28#include <linux/ioport.h> 27#include <linux/ioport.h>
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index b2b87c30e266..543765e1ef14 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -23,7 +23,6 @@
23#include <linux/sched.h> 23#include <linux/sched.h>
24#include <linux/signal.h> 24#include <linux/signal.h>
25#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/bootmem.h>
27#include <linux/spinlock.h> 26#include <linux/spinlock.h>
28#include <asm/irq.h> 27#include <asm/irq.h>
29#include <asm/io.h> 28#include <asm/io.h>
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 92033936a8f7..7c37157d4c24 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -19,7 +19,6 @@
19#include <linux/sched.h> 19#include <linux/sched.h>
20#include <linux/signal.h> 20#include <linux/signal.h>
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/bootmem.h>
23#include <linux/spinlock.h> 22#include <linux/spinlock.h>
24#include <linux/irq.h> 23#include <linux/irq.h>
25#include <linux/interrupt.h> 24#include <linux/interrupt.h>
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index fe0cca477164..365249cd346b 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -155,7 +155,7 @@ int __init xics_smp_probe(void)
155 155
156void xics_teardown_cpu(void) 156void xics_teardown_cpu(void)
157{ 157{
158 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); 158 struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
159 159
160 /* 160 /*
161 * we have to reset the cppr index to 0 because we're 161 * we have to reset the cppr index to 0 because we're
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index c8efbb37d6e0..5b150f0c5df9 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -51,6 +51,12 @@
51#include <asm/paca.h> 51#include <asm/paca.h>
52#endif 52#endif
53 53
54#if defined(CONFIG_PPC_SPLPAR)
55#include <asm/plpar_wrappers.h>
56#else
57static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
58#endif
59
54#include "nonstdio.h" 60#include "nonstdio.h"
55#include "dis-asm.h" 61#include "dis-asm.h"
56 62
@@ -88,10 +94,9 @@ struct bpt {
88}; 94};
89 95
90/* Bits in bpt.enabled */ 96/* Bits in bpt.enabled */
91#define BP_IABR_TE 1 /* IABR translation enabled */ 97#define BP_CIABR 1
92#define BP_IABR 2 98#define BP_TRAP 2
93#define BP_TRAP 8 99#define BP_DABR 4
94#define BP_DABR 0x10
95 100
96#define NBPTS 256 101#define NBPTS 256
97static struct bpt bpts[NBPTS]; 102static struct bpt bpts[NBPTS];
@@ -270,6 +275,45 @@ static inline void cinval(void *p)
270 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); 275 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
271} 276}
272 277
278/**
279 * write_ciabr() - write the CIABR SPR
280 * @ciabr: The value to write.
281 *
282 * This function writes a value to the CIARB register either directly
283 * through mtspr instruction if the kernel is in HV privilege mode or
284 * call a hypervisor function to achieve the same in case the kernel
285 * is in supervisor privilege mode.
286 */
287static void write_ciabr(unsigned long ciabr)
288{
289 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
290 return;
291
292 if (cpu_has_feature(CPU_FTR_HVMODE)) {
293 mtspr(SPRN_CIABR, ciabr);
294 return;
295 }
296 plapr_set_ciabr(ciabr);
297}
298
299/**
300 * set_ciabr() - set the CIABR
301 * @addr: The value to set.
302 *
303 * This function sets the correct privilege value into the the HW
304 * breakpoint address before writing it up in the CIABR register.
305 */
306static void set_ciabr(unsigned long addr)
307{
308 addr &= ~CIABR_PRIV;
309
310 if (cpu_has_feature(CPU_FTR_HVMODE))
311 addr |= CIABR_PRIV_HYPER;
312 else
313 addr |= CIABR_PRIV_SUPER;
314 write_ciabr(addr);
315}
316
273/* 317/*
274 * Disable surveillance (the service processor watchdog function) 318 * Disable surveillance (the service processor watchdog function)
275 * while we are in xmon. 319 * while we are in xmon.
@@ -727,7 +771,7 @@ static void insert_bpts(void)
727 771
728 bp = bpts; 772 bp = bpts;
729 for (i = 0; i < NBPTS; ++i, ++bp) { 773 for (i = 0; i < NBPTS; ++i, ++bp) {
730 if ((bp->enabled & (BP_TRAP|BP_IABR)) == 0) 774 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
731 continue; 775 continue;
732 if (mread(bp->address, &bp->instr[0], 4) != 4) { 776 if (mread(bp->address, &bp->instr[0], 4) != 4) {
733 printf("Couldn't read instruction at %lx, " 777 printf("Couldn't read instruction at %lx, "
@@ -742,7 +786,7 @@ static void insert_bpts(void)
742 continue; 786 continue;
743 } 787 }
744 store_inst(&bp->instr[0]); 788 store_inst(&bp->instr[0]);
745 if (bp->enabled & BP_IABR) 789 if (bp->enabled & BP_CIABR)
746 continue; 790 continue;
747 if (mwrite(bp->address, &bpinstr, 4) != 4) { 791 if (mwrite(bp->address, &bpinstr, 4) != 4) {
748 printf("Couldn't write instruction at %lx, " 792 printf("Couldn't write instruction at %lx, "
@@ -764,9 +808,9 @@ static void insert_cpu_bpts(void)
764 brk.len = 8; 808 brk.len = 8;
765 __set_breakpoint(&brk); 809 __set_breakpoint(&brk);
766 } 810 }
767 if (iabr && cpu_has_feature(CPU_FTR_IABR)) 811
768 mtspr(SPRN_IABR, iabr->address 812 if (iabr)
769 | (iabr->enabled & (BP_IABR|BP_IABR_TE))); 813 set_ciabr(iabr->address);
770} 814}
771 815
772static void remove_bpts(void) 816static void remove_bpts(void)
@@ -777,7 +821,7 @@ static void remove_bpts(void)
777 821
778 bp = bpts; 822 bp = bpts;
779 for (i = 0; i < NBPTS; ++i, ++bp) { 823 for (i = 0; i < NBPTS; ++i, ++bp) {
780 if ((bp->enabled & (BP_TRAP|BP_IABR)) != BP_TRAP) 824 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
781 continue; 825 continue;
782 if (mread(bp->address, &instr, 4) == 4 826 if (mread(bp->address, &instr, 4) == 4
783 && instr == bpinstr 827 && instr == bpinstr
@@ -792,8 +836,7 @@ static void remove_bpts(void)
792static void remove_cpu_bpts(void) 836static void remove_cpu_bpts(void)
793{ 837{
794 hw_breakpoint_disable(); 838 hw_breakpoint_disable();
795 if (cpu_has_feature(CPU_FTR_IABR)) 839 write_ciabr(0);
796 mtspr(SPRN_IABR, 0);
797} 840}
798 841
799/* Command interpreting routine */ 842/* Command interpreting routine */
@@ -907,7 +950,7 @@ cmds(struct pt_regs *excp)
907 case 'u': 950 case 'u':
908 dump_segments(); 951 dump_segments();
909 break; 952 break;
910#elif defined(CONFIG_4xx) 953#elif defined(CONFIG_44x)
911 case 'u': 954 case 'u':
912 dump_tlb_44x(); 955 dump_tlb_44x();
913 break; 956 break;
@@ -981,7 +1024,8 @@ static void bootcmds(void)
981 else if (cmd == 'h') 1024 else if (cmd == 'h')
982 ppc_md.halt(); 1025 ppc_md.halt();
983 else if (cmd == 'p') 1026 else if (cmd == 'p')
984 ppc_md.power_off(); 1027 if (pm_power_off)
1028 pm_power_off();
985} 1029}
986 1030
987static int cpu_cmd(void) 1031static int cpu_cmd(void)
@@ -1127,7 +1171,7 @@ static char *breakpoint_help_string =
1127 "b <addr> [cnt] set breakpoint at given instr addr\n" 1171 "b <addr> [cnt] set breakpoint at given instr addr\n"
1128 "bc clear all breakpoints\n" 1172 "bc clear all breakpoints\n"
1129 "bc <n/addr> clear breakpoint number n or at addr\n" 1173 "bc <n/addr> clear breakpoint number n or at addr\n"
1130 "bi <addr> [cnt] set hardware instr breakpoint (POWER3/RS64 only)\n" 1174 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1131 "bd <addr> [cnt] set hardware data breakpoint\n" 1175 "bd <addr> [cnt] set hardware data breakpoint\n"
1132 ""; 1176 "";
1133 1177
@@ -1166,13 +1210,13 @@ bpt_cmds(void)
1166 break; 1210 break;
1167 1211
1168 case 'i': /* bi - hardware instr breakpoint */ 1212 case 'i': /* bi - hardware instr breakpoint */
1169 if (!cpu_has_feature(CPU_FTR_IABR)) { 1213 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1170 printf("Hardware instruction breakpoint " 1214 printf("Hardware instruction breakpoint "
1171 "not supported on this cpu\n"); 1215 "not supported on this cpu\n");
1172 break; 1216 break;
1173 } 1217 }
1174 if (iabr) { 1218 if (iabr) {
1175 iabr->enabled &= ~(BP_IABR | BP_IABR_TE); 1219 iabr->enabled &= ~BP_CIABR;
1176 iabr = NULL; 1220 iabr = NULL;
1177 } 1221 }
1178 if (!scanhex(&a)) 1222 if (!scanhex(&a))
@@ -1181,7 +1225,7 @@ bpt_cmds(void)
1181 break; 1225 break;
1182 bp = new_breakpoint(a); 1226 bp = new_breakpoint(a);
1183 if (bp != NULL) { 1227 if (bp != NULL) {
1184 bp->enabled |= BP_IABR | BP_IABR_TE; 1228 bp->enabled |= BP_CIABR;
1185 iabr = bp; 1229 iabr = bp;
1186 } 1230 }
1187 break; 1231 break;
@@ -1238,7 +1282,7 @@ bpt_cmds(void)
1238 if (!bp->enabled) 1282 if (!bp->enabled)
1239 continue; 1283 continue;
1240 printf("%2x %s ", BP_NUM(bp), 1284 printf("%2x %s ", BP_NUM(bp),
1241 (bp->enabled & BP_IABR)? "inst": "trap"); 1285 (bp->enabled & BP_CIABR) ? "inst": "trap");
1242 xmon_print_symbol(bp->address, " ", "\n"); 1286 xmon_print_symbol(bp->address, " ", "\n");
1243 } 1287 }
1244 break; 1288 break;
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 3d2b8677ec8a..b5b6bda44a00 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -336,6 +336,8 @@ struct cxl_sste {
336struct cxl_afu { 336struct cxl_afu {
337 irq_hw_number_t psl_hwirq; 337 irq_hw_number_t psl_hwirq;
338 irq_hw_number_t serr_hwirq; 338 irq_hw_number_t serr_hwirq;
339 char *err_irq_name;
340 char *psl_irq_name;
339 unsigned int serr_virq; 341 unsigned int serr_virq;
340 void __iomem *p1n_mmio; 342 void __iomem *p1n_mmio;
341 void __iomem *p2n_mmio; 343 void __iomem *p2n_mmio;
@@ -379,6 +381,12 @@ struct cxl_afu {
379 bool enabled; 381 bool enabled;
380}; 382};
381 383
384
385struct cxl_irq_name {
386 struct list_head list;
387 char *name;
388};
389
382/* 390/*
383 * This is a cxl context. If the PSL is in dedicated mode, there will be one 391 * This is a cxl context. If the PSL is in dedicated mode, there will be one
384 * of these per AFU. If in AFU directed there can be lots of these. 392 * of these per AFU. If in AFU directed there can be lots of these.
@@ -403,6 +411,7 @@ struct cxl_context {
403 411
404 unsigned long *irq_bitmap; /* Accessed from IRQ context */ 412 unsigned long *irq_bitmap; /* Accessed from IRQ context */
405 struct cxl_irq_ranges irqs; 413 struct cxl_irq_ranges irqs;
414 struct list_head irq_names;
406 u64 fault_addr; 415 u64 fault_addr;
407 u64 fault_dsisr; 416 u64 fault_dsisr;
408 u64 afu_err; 417 u64 afu_err;
@@ -444,6 +453,7 @@ struct cxl {
444 struct dentry *trace; 453 struct dentry *trace;
445 struct dentry *psl_err_chk; 454 struct dentry *psl_err_chk;
446 struct dentry *debugfs; 455 struct dentry *debugfs;
456 char *irq_name;
447 struct bin_attribute cxl_attr; 457 struct bin_attribute cxl_attr;
448 int adapter_num; 458 int adapter_num;
449 int user_irqs; 459 int user_irqs;
@@ -563,9 +573,6 @@ int _cxl_afu_deactivate_mode(struct cxl_afu *afu, int mode);
563int cxl_afu_deactivate_mode(struct cxl_afu *afu); 573int cxl_afu_deactivate_mode(struct cxl_afu *afu);
564int cxl_afu_select_best_mode(struct cxl_afu *afu); 574int cxl_afu_select_best_mode(struct cxl_afu *afu);
565 575
566unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq,
567 irq_handler_t handler, void *cookie);
568void cxl_unmap_irq(unsigned int virq, void *cookie);
569int cxl_register_psl_irq(struct cxl_afu *afu); 576int cxl_register_psl_irq(struct cxl_afu *afu);
570void cxl_release_psl_irq(struct cxl_afu *afu); 577void cxl_release_psl_irq(struct cxl_afu *afu);
571int cxl_register_psl_err_irq(struct cxl *adapter); 578int cxl_register_psl_err_irq(struct cxl *adapter);
@@ -612,7 +619,7 @@ int cxl_attach_process(struct cxl_context *ctx, bool kernel, u64 wed,
612 u64 amr); 619 u64 amr);
613int cxl_detach_process(struct cxl_context *ctx); 620int cxl_detach_process(struct cxl_context *ctx);
614 621
615int cxl_get_irq(struct cxl_context *ctx, struct cxl_irq_info *info); 622int cxl_get_irq(struct cxl_afu *afu, struct cxl_irq_info *info);
616int cxl_ack_irq(struct cxl_context *ctx, u64 tfc, u64 psl_reset_mask); 623int cxl_ack_irq(struct cxl_context *ctx, u64 tfc, u64 psl_reset_mask);
617 624
618int cxl_check_error(struct cxl_afu *afu); 625int cxl_check_error(struct cxl_afu *afu);
diff --git a/drivers/misc/cxl/fault.c b/drivers/misc/cxl/fault.c
index c99e896604ee..f8684bca2d79 100644
--- a/drivers/misc/cxl/fault.c
+++ b/drivers/misc/cxl/fault.c
@@ -133,7 +133,7 @@ static void cxl_handle_page_fault(struct cxl_context *ctx,
133{ 133{
134 unsigned flt = 0; 134 unsigned flt = 0;
135 int result; 135 int result;
136 unsigned long access, flags; 136 unsigned long access, flags, inv_flags = 0;
137 137
138 if ((result = copro_handle_mm_fault(mm, dar, dsisr, &flt))) { 138 if ((result = copro_handle_mm_fault(mm, dar, dsisr, &flt))) {
139 pr_devel("copro_handle_mm_fault failed: %#x\n", result); 139 pr_devel("copro_handle_mm_fault failed: %#x\n", result);
@@ -149,8 +149,12 @@ static void cxl_handle_page_fault(struct cxl_context *ctx,
149 access |= _PAGE_RW; 149 access |= _PAGE_RW;
150 if ((!ctx->kernel) || ~(dar & (1ULL << 63))) 150 if ((!ctx->kernel) || ~(dar & (1ULL << 63)))
151 access |= _PAGE_USER; 151 access |= _PAGE_USER;
152
153 if (dsisr & DSISR_NOHPTE)
154 inv_flags |= HPTE_NOHPTE_UPDATE;
155
152 local_irq_save(flags); 156 local_irq_save(flags);
153 hash_page_mm(mm, dar, access, 0x300); 157 hash_page_mm(mm, dar, access, 0x300, inv_flags);
154 local_irq_restore(flags); 158 local_irq_restore(flags);
155 159
156 pr_devel("Page fault successfully handled for pe: %i!\n", ctx->pe); 160 pr_devel("Page fault successfully handled for pe: %i!\n", ctx->pe);
diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c
index 336020c8e1af..c294925f73ee 100644
--- a/drivers/misc/cxl/irq.c
+++ b/drivers/misc/cxl/irq.c
@@ -92,20 +92,13 @@ static irqreturn_t schedule_cxl_fault(struct cxl_context *ctx, u64 dsisr, u64 da
92 return IRQ_HANDLED; 92 return IRQ_HANDLED;
93} 93}
94 94
95static irqreturn_t cxl_irq(int irq, void *data) 95static irqreturn_t cxl_irq(int irq, void *data, struct cxl_irq_info *irq_info)
96{ 96{
97 struct cxl_context *ctx = data; 97 struct cxl_context *ctx = data;
98 struct cxl_irq_info irq_info;
99 u64 dsisr, dar; 98 u64 dsisr, dar;
100 int result;
101
102 if ((result = cxl_get_irq(ctx, &irq_info))) {
103 WARN(1, "Unable to get CXL IRQ Info: %i\n", result);
104 return IRQ_HANDLED;
105 }
106 99
107 dsisr = irq_info.dsisr; 100 dsisr = irq_info->dsisr;
108 dar = irq_info.dar; 101 dar = irq_info->dar;
109 102
110 pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar); 103 pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar);
111 104
@@ -149,9 +142,9 @@ static irqreturn_t cxl_irq(int irq, void *data)
149 if (dsisr & CXL_PSL_DSISR_An_UR) 142 if (dsisr & CXL_PSL_DSISR_An_UR)
150 pr_devel("CXL interrupt: AURP PTE not found\n"); 143 pr_devel("CXL interrupt: AURP PTE not found\n");
151 if (dsisr & CXL_PSL_DSISR_An_PE) 144 if (dsisr & CXL_PSL_DSISR_An_PE)
152 return handle_psl_slice_error(ctx, dsisr, irq_info.errstat); 145 return handle_psl_slice_error(ctx, dsisr, irq_info->errstat);
153 if (dsisr & CXL_PSL_DSISR_An_AE) { 146 if (dsisr & CXL_PSL_DSISR_An_AE) {
154 pr_devel("CXL interrupt: AFU Error %.llx\n", irq_info.afu_err); 147 pr_devel("CXL interrupt: AFU Error %.llx\n", irq_info->afu_err);
155 148
156 if (ctx->pending_afu_err) { 149 if (ctx->pending_afu_err) {
157 /* 150 /*
@@ -163,10 +156,10 @@ static irqreturn_t cxl_irq(int irq, void *data)
163 */ 156 */
164 dev_err_ratelimited(&ctx->afu->dev, "CXL AFU Error " 157 dev_err_ratelimited(&ctx->afu->dev, "CXL AFU Error "
165 "undelivered to pe %i: %.llx\n", 158 "undelivered to pe %i: %.llx\n",
166 ctx->pe, irq_info.afu_err); 159 ctx->pe, irq_info->afu_err);
167 } else { 160 } else {
168 spin_lock(&ctx->lock); 161 spin_lock(&ctx->lock);
169 ctx->afu_err = irq_info.afu_err; 162 ctx->afu_err = irq_info->afu_err;
170 ctx->pending_afu_err = 1; 163 ctx->pending_afu_err = 1;
171 spin_unlock(&ctx->lock); 164 spin_unlock(&ctx->lock);
172 165
@@ -182,24 +175,43 @@ static irqreturn_t cxl_irq(int irq, void *data)
182 return IRQ_HANDLED; 175 return IRQ_HANDLED;
183} 176}
184 177
178static irqreturn_t fail_psl_irq(struct cxl_afu *afu, struct cxl_irq_info *irq_info)
179{
180 if (irq_info->dsisr & CXL_PSL_DSISR_TRANS)
181 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE);
182 else
183 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_A);
184
185 return IRQ_HANDLED;
186}
187
185static irqreturn_t cxl_irq_multiplexed(int irq, void *data) 188static irqreturn_t cxl_irq_multiplexed(int irq, void *data)
186{ 189{
187 struct cxl_afu *afu = data; 190 struct cxl_afu *afu = data;
188 struct cxl_context *ctx; 191 struct cxl_context *ctx;
192 struct cxl_irq_info irq_info;
189 int ph = cxl_p2n_read(afu, CXL_PSL_PEHandle_An) & 0xffff; 193 int ph = cxl_p2n_read(afu, CXL_PSL_PEHandle_An) & 0xffff;
190 int ret; 194 int ret;
191 195
196 if ((ret = cxl_get_irq(afu, &irq_info))) {
197 WARN(1, "Unable to get CXL IRQ Info: %i\n", ret);
198 return fail_psl_irq(afu, &irq_info);
199 }
200
192 rcu_read_lock(); 201 rcu_read_lock();
193 ctx = idr_find(&afu->contexts_idr, ph); 202 ctx = idr_find(&afu->contexts_idr, ph);
194 if (ctx) { 203 if (ctx) {
195 ret = cxl_irq(irq, ctx); 204 ret = cxl_irq(irq, ctx, &irq_info);
196 rcu_read_unlock(); 205 rcu_read_unlock();
197 return ret; 206 return ret;
198 } 207 }
199 rcu_read_unlock(); 208 rcu_read_unlock();
200 209
201 WARN(1, "Unable to demultiplex CXL PSL IRQ\n"); 210 WARN(1, "Unable to demultiplex CXL PSL IRQ for PE %i DSISR %.16llx DAR"
202 return IRQ_HANDLED; 211 " %.16llx\n(Possible AFU HW issue - was a term/remove acked"
212 " with outstanding transactions?)\n", ph, irq_info.dsisr,
213 irq_info.dar);
214 return fail_psl_irq(afu, &irq_info);
203} 215}
204 216
205static irqreturn_t cxl_irq_afu(int irq, void *data) 217static irqreturn_t cxl_irq_afu(int irq, void *data)
@@ -243,7 +255,7 @@ static irqreturn_t cxl_irq_afu(int irq, void *data)
243} 255}
244 256
245unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq, 257unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq,
246 irq_handler_t handler, void *cookie) 258 irq_handler_t handler, void *cookie, const char *name)
247{ 259{
248 unsigned int virq; 260 unsigned int virq;
249 int result; 261 int result;
@@ -259,7 +271,7 @@ unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq,
259 271
260 pr_devel("hwirq %#lx mapped to virq %u\n", hwirq, virq); 272 pr_devel("hwirq %#lx mapped to virq %u\n", hwirq, virq);
261 273
262 result = request_irq(virq, handler, 0, "cxl", cookie); 274 result = request_irq(virq, handler, 0, name, cookie);
263 if (result) { 275 if (result) {
264 dev_warn(&adapter->dev, "cxl_map_irq: request_irq failed: %i\n", result); 276 dev_warn(&adapter->dev, "cxl_map_irq: request_irq failed: %i\n", result);
265 return 0; 277 return 0;
@@ -278,14 +290,15 @@ static int cxl_register_one_irq(struct cxl *adapter,
278 irq_handler_t handler, 290 irq_handler_t handler,
279 void *cookie, 291 void *cookie,
280 irq_hw_number_t *dest_hwirq, 292 irq_hw_number_t *dest_hwirq,
281 unsigned int *dest_virq) 293 unsigned int *dest_virq,
294 const char *name)
282{ 295{
283 int hwirq, virq; 296 int hwirq, virq;
284 297
285 if ((hwirq = cxl_alloc_one_irq(adapter)) < 0) 298 if ((hwirq = cxl_alloc_one_irq(adapter)) < 0)
286 return hwirq; 299 return hwirq;
287 300
288 if (!(virq = cxl_map_irq(adapter, hwirq, handler, cookie))) 301 if (!(virq = cxl_map_irq(adapter, hwirq, handler, cookie, name)))
289 goto err; 302 goto err;
290 303
291 *dest_hwirq = hwirq; 304 *dest_hwirq = hwirq;
@@ -302,10 +315,19 @@ int cxl_register_psl_err_irq(struct cxl *adapter)
302{ 315{
303 int rc; 316 int rc;
304 317
318 adapter->irq_name = kasprintf(GFP_KERNEL, "cxl-%s-err",
319 dev_name(&adapter->dev));
320 if (!adapter->irq_name)
321 return -ENOMEM;
322
305 if ((rc = cxl_register_one_irq(adapter, cxl_irq_err, adapter, 323 if ((rc = cxl_register_one_irq(adapter, cxl_irq_err, adapter,
306 &adapter->err_hwirq, 324 &adapter->err_hwirq,
307 &adapter->err_virq))) 325 &adapter->err_virq,
326 adapter->irq_name))) {
327 kfree(adapter->irq_name);
328 adapter->irq_name = NULL;
308 return rc; 329 return rc;
330 }
309 331
310 cxl_p1_write(adapter, CXL_PSL_ErrIVTE, adapter->err_hwirq & 0xffff); 332 cxl_p1_write(adapter, CXL_PSL_ErrIVTE, adapter->err_hwirq & 0xffff);
311 333
@@ -317,6 +339,7 @@ void cxl_release_psl_err_irq(struct cxl *adapter)
317 cxl_p1_write(adapter, CXL_PSL_ErrIVTE, 0x0000000000000000); 339 cxl_p1_write(adapter, CXL_PSL_ErrIVTE, 0x0000000000000000);
318 cxl_unmap_irq(adapter->err_virq, adapter); 340 cxl_unmap_irq(adapter->err_virq, adapter);
319 cxl_release_one_irq(adapter, adapter->err_hwirq); 341 cxl_release_one_irq(adapter, adapter->err_hwirq);
342 kfree(adapter->irq_name);
320} 343}
321 344
322int cxl_register_serr_irq(struct cxl_afu *afu) 345int cxl_register_serr_irq(struct cxl_afu *afu)
@@ -324,10 +347,18 @@ int cxl_register_serr_irq(struct cxl_afu *afu)
324 u64 serr; 347 u64 serr;
325 int rc; 348 int rc;
326 349
350 afu->err_irq_name = kasprintf(GFP_KERNEL, "cxl-%s-err",
351 dev_name(&afu->dev));
352 if (!afu->err_irq_name)
353 return -ENOMEM;
354
327 if ((rc = cxl_register_one_irq(afu->adapter, cxl_slice_irq_err, afu, 355 if ((rc = cxl_register_one_irq(afu->adapter, cxl_slice_irq_err, afu,
328 &afu->serr_hwirq, 356 &afu->serr_hwirq,
329 &afu->serr_virq))) 357 &afu->serr_virq, afu->err_irq_name))) {
358 kfree(afu->err_irq_name);
359 afu->err_irq_name = NULL;
330 return rc; 360 return rc;
361 }
331 362
332 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An); 363 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An);
333 serr = (serr & 0x00ffffffffff0000ULL) | (afu->serr_hwirq & 0xffff); 364 serr = (serr & 0x00ffffffffff0000ULL) | (afu->serr_hwirq & 0xffff);
@@ -341,24 +372,50 @@ void cxl_release_serr_irq(struct cxl_afu *afu)
341 cxl_p1n_write(afu, CXL_PSL_SERR_An, 0x0000000000000000); 372 cxl_p1n_write(afu, CXL_PSL_SERR_An, 0x0000000000000000);
342 cxl_unmap_irq(afu->serr_virq, afu); 373 cxl_unmap_irq(afu->serr_virq, afu);
343 cxl_release_one_irq(afu->adapter, afu->serr_hwirq); 374 cxl_release_one_irq(afu->adapter, afu->serr_hwirq);
375 kfree(afu->err_irq_name);
344} 376}
345 377
346int cxl_register_psl_irq(struct cxl_afu *afu) 378int cxl_register_psl_irq(struct cxl_afu *afu)
347{ 379{
348 return cxl_register_one_irq(afu->adapter, cxl_irq_multiplexed, afu, 380 int rc;
349 &afu->psl_hwirq, &afu->psl_virq); 381
382 afu->psl_irq_name = kasprintf(GFP_KERNEL, "cxl-%s",
383 dev_name(&afu->dev));
384 if (!afu->psl_irq_name)
385 return -ENOMEM;
386
387 if ((rc = cxl_register_one_irq(afu->adapter, cxl_irq_multiplexed, afu,
388 &afu->psl_hwirq, &afu->psl_virq,
389 afu->psl_irq_name))) {
390 kfree(afu->psl_irq_name);
391 afu->psl_irq_name = NULL;
392 }
393 return rc;
350} 394}
351 395
352void cxl_release_psl_irq(struct cxl_afu *afu) 396void cxl_release_psl_irq(struct cxl_afu *afu)
353{ 397{
354 cxl_unmap_irq(afu->psl_virq, afu); 398 cxl_unmap_irq(afu->psl_virq, afu);
355 cxl_release_one_irq(afu->adapter, afu->psl_hwirq); 399 cxl_release_one_irq(afu->adapter, afu->psl_hwirq);
400 kfree(afu->psl_irq_name);
401}
402
403void afu_irq_name_free(struct cxl_context *ctx)
404{
405 struct cxl_irq_name *irq_name, *tmp;
406
407 list_for_each_entry_safe(irq_name, tmp, &ctx->irq_names, list) {
408 kfree(irq_name->name);
409 list_del(&irq_name->list);
410 kfree(irq_name);
411 }
356} 412}
357 413
358int afu_register_irqs(struct cxl_context *ctx, u32 count) 414int afu_register_irqs(struct cxl_context *ctx, u32 count)
359{ 415{
360 irq_hw_number_t hwirq; 416 irq_hw_number_t hwirq;
361 int rc, r, i; 417 int rc, r, i, j = 1;
418 struct cxl_irq_name *irq_name;
362 419
363 if ((rc = cxl_alloc_irq_ranges(&ctx->irqs, ctx->afu->adapter, count))) 420 if ((rc = cxl_alloc_irq_ranges(&ctx->irqs, ctx->afu->adapter, count)))
364 return rc; 421 return rc;
@@ -372,15 +429,47 @@ int afu_register_irqs(struct cxl_context *ctx, u32 count)
372 sizeof(*ctx->irq_bitmap), GFP_KERNEL); 429 sizeof(*ctx->irq_bitmap), GFP_KERNEL);
373 if (!ctx->irq_bitmap) 430 if (!ctx->irq_bitmap)
374 return -ENOMEM; 431 return -ENOMEM;
432
433 /*
434 * Allocate names first. If any fail, bail out before allocating
435 * actual hardware IRQs.
436 */
437 INIT_LIST_HEAD(&ctx->irq_names);
438 for (r = 1; r < CXL_IRQ_RANGES; r++) {
439 for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) {
440 irq_name = kmalloc(sizeof(struct cxl_irq_name),
441 GFP_KERNEL);
442 if (!irq_name)
443 goto out;
444 irq_name->name = kasprintf(GFP_KERNEL, "cxl-%s-pe%i-%i",
445 dev_name(&ctx->afu->dev),
446 ctx->pe, j);
447 if (!irq_name->name) {
448 kfree(irq_name);
449 goto out;
450 }
451 /* Add to tail so next look get the correct order */
452 list_add_tail(&irq_name->list, &ctx->irq_names);
453 j++;
454 }
455 }
456
457 /* We've allocated all memory now, so let's do the irq allocations */
458 irq_name = list_first_entry(&ctx->irq_names, struct cxl_irq_name, list);
375 for (r = 1; r < CXL_IRQ_RANGES; r++) { 459 for (r = 1; r < CXL_IRQ_RANGES; r++) {
376 hwirq = ctx->irqs.offset[r]; 460 hwirq = ctx->irqs.offset[r];
377 for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) { 461 for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) {
378 cxl_map_irq(ctx->afu->adapter, hwirq, 462 cxl_map_irq(ctx->afu->adapter, hwirq,
379 cxl_irq_afu, ctx); 463 cxl_irq_afu, ctx, irq_name->name);
464 irq_name = list_next_entry(irq_name, list);
380 } 465 }
381 } 466 }
382 467
383 return 0; 468 return 0;
469
470out:
471 afu_irq_name_free(ctx);
472 return -ENOMEM;
384} 473}
385 474
386void afu_release_irqs(struct cxl_context *ctx) 475void afu_release_irqs(struct cxl_context *ctx)
@@ -398,5 +487,6 @@ void afu_release_irqs(struct cxl_context *ctx)
398 } 487 }
399 } 488 }
400 489
490 afu_irq_name_free(ctx);
401 cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter); 491 cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter);
402} 492}
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index d47532e8f4f1..9a5a442269a8 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -637,18 +637,18 @@ int cxl_detach_process(struct cxl_context *ctx)
637 return detach_process_native_afu_directed(ctx); 637 return detach_process_native_afu_directed(ctx);
638} 638}
639 639
640int cxl_get_irq(struct cxl_context *ctx, struct cxl_irq_info *info) 640int cxl_get_irq(struct cxl_afu *afu, struct cxl_irq_info *info)
641{ 641{
642 u64 pidtid; 642 u64 pidtid;
643 643
644 info->dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An); 644 info->dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
645 info->dar = cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An); 645 info->dar = cxl_p2n_read(afu, CXL_PSL_DAR_An);
646 info->dsr = cxl_p2n_read(ctx->afu, CXL_PSL_DSR_An); 646 info->dsr = cxl_p2n_read(afu, CXL_PSL_DSR_An);
647 pidtid = cxl_p2n_read(ctx->afu, CXL_PSL_PID_TID_An); 647 pidtid = cxl_p2n_read(afu, CXL_PSL_PID_TID_An);
648 info->pid = pidtid >> 32; 648 info->pid = pidtid >> 32;
649 info->tid = pidtid & 0xffffffff; 649 info->tid = pidtid & 0xffffffff;
650 info->afu_err = cxl_p2n_read(ctx->afu, CXL_AFU_ERR_An); 650 info->afu_err = cxl_p2n_read(afu, CXL_AFU_ERR_An);
651 info->errstat = cxl_p2n_read(ctx->afu, CXL_PSL_ErrStat_An); 651 info->errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An);
652 652
653 return 0; 653 return 0;
654} 654}
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4511ddc1ac31..f15cddfeb897 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -987,6 +987,17 @@ config RTC_DRV_NUC900
987 If you say yes here you get support for the RTC subsystem of the 987 If you say yes here you get support for the RTC subsystem of the
988 NUC910/NUC920 used in embedded systems. 988 NUC910/NUC920 used in embedded systems.
989 989
990config RTC_DRV_OPAL
991 tristate "IBM OPAL RTC driver"
992 depends on PPC_POWERNV
993 default y
994 help
995 If you say yes here you get support for the PowerNV platform RTC
996 driver based on OPAL interfaces.
997
998 This driver can also be built as a module. If so, the module
999 will be called rtc-opal.
1000
990comment "on-CPU RTC drivers" 1001comment "on-CPU RTC drivers"
991 1002
992config RTC_DRV_DAVINCI 1003config RTC_DRV_DAVINCI
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index b188323c096a..c8ef3e1e6ccd 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -92,6 +92,7 @@ obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
92obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o 92obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
93obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o 93obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
94obj-$(CONFIG_RTC_DRV_NUC900) += rtc-nuc900.o 94obj-$(CONFIG_RTC_DRV_NUC900) += rtc-nuc900.o
95obj-$(CONFIG_RTC_DRV_OPAL) += rtc-opal.o
95obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o 96obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o
96obj-$(CONFIG_RTC_DRV_PALMAS) += rtc-palmas.o 97obj-$(CONFIG_RTC_DRV_PALMAS) += rtc-palmas.o
97obj-$(CONFIG_RTC_DRV_PCAP) += rtc-pcap.o 98obj-$(CONFIG_RTC_DRV_PCAP) += rtc-pcap.o
diff --git a/drivers/rtc/rtc-opal.c b/drivers/rtc/rtc-opal.c
new file mode 100644
index 000000000000..95f652165fe9
--- /dev/null
+++ b/drivers/rtc/rtc-opal.c
@@ -0,0 +1,261 @@
1/*
2 * IBM OPAL RTC driver
3 * Copyright (C) 2014 IBM
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program.
17 */
18
19#define DRVNAME "rtc-opal"
20#define pr_fmt(fmt) DRVNAME ": " fmt
21
22#include <linux/module.h>
23#include <linux/err.h>
24#include <linux/rtc.h>
25#include <linux/delay.h>
26#include <linux/bcd.h>
27#include <linux/platform_device.h>
28#include <linux/of.h>
29#include <asm/opal.h>
30#include <asm/firmware.h>
31
32static void opal_to_tm(u32 y_m_d, u64 h_m_s_ms, struct rtc_time *tm)
33{
34 tm->tm_year = ((bcd2bin(y_m_d >> 24) * 100) +
35 bcd2bin((y_m_d >> 16) & 0xff)) - 1900;
36 tm->tm_mon = bcd2bin((y_m_d >> 8) & 0xff) - 1;
37 tm->tm_mday = bcd2bin(y_m_d & 0xff);
38 tm->tm_hour = bcd2bin((h_m_s_ms >> 56) & 0xff);
39 tm->tm_min = bcd2bin((h_m_s_ms >> 48) & 0xff);
40 tm->tm_sec = bcd2bin((h_m_s_ms >> 40) & 0xff);
41
42 GregorianDay(tm);
43}
44
45static void tm_to_opal(struct rtc_time *tm, u32 *y_m_d, u64 *h_m_s_ms)
46{
47 *y_m_d |= ((u32)bin2bcd((tm->tm_year + 1900) / 100)) << 24;
48 *y_m_d |= ((u32)bin2bcd((tm->tm_year + 1900) % 100)) << 16;
49 *y_m_d |= ((u32)bin2bcd((tm->tm_mon + 1))) << 8;
50 *y_m_d |= ((u32)bin2bcd(tm->tm_mday));
51
52 *h_m_s_ms |= ((u64)bin2bcd(tm->tm_hour)) << 56;
53 *h_m_s_ms |= ((u64)bin2bcd(tm->tm_min)) << 48;
54 *h_m_s_ms |= ((u64)bin2bcd(tm->tm_sec)) << 40;
55}
56
57static int opal_get_rtc_time(struct device *dev, struct rtc_time *tm)
58{
59 long rc = OPAL_BUSY;
60 u32 y_m_d;
61 u64 h_m_s_ms;
62 __be32 __y_m_d;
63 __be64 __h_m_s_ms;
64
65 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
66 rc = opal_rtc_read(&__y_m_d, &__h_m_s_ms);
67 if (rc == OPAL_BUSY_EVENT)
68 opal_poll_events(NULL);
69 else
70 msleep(10);
71 }
72
73 if (rc != OPAL_SUCCESS)
74 return -EIO;
75
76 y_m_d = be32_to_cpu(__y_m_d);
77 h_m_s_ms = be64_to_cpu(__h_m_s_ms);
78 opal_to_tm(y_m_d, h_m_s_ms, tm);
79
80 return 0;
81}
82
83static int opal_set_rtc_time(struct device *dev, struct rtc_time *tm)
84{
85 long rc = OPAL_BUSY;
86 u32 y_m_d = 0;
87 u64 h_m_s_ms = 0;
88
89 tm_to_opal(tm, &y_m_d, &h_m_s_ms);
90 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
91 rc = opal_rtc_write(y_m_d, h_m_s_ms);
92 if (rc == OPAL_BUSY_EVENT)
93 opal_poll_events(NULL);
94 else
95 msleep(10);
96 }
97
98 return rc == OPAL_SUCCESS ? 0 : -EIO;
99}
100
101/*
102 * TPO Timed Power-On
103 *
104 * TPO get/set OPAL calls care about the hour and min and to make it consistent
105 * with the rtc utility time conversion functions, we use the 'u64' to store
106 * its value and perform bit shift by 32 before use..
107 */
108static int opal_get_tpo_time(struct device *dev, struct rtc_wkalrm *alarm)
109{
110 __be32 __y_m_d, __h_m;
111 struct opal_msg msg;
112 int rc, token;
113 u64 h_m_s_ms;
114 u32 y_m_d;
115
116 token = opal_async_get_token_interruptible();
117 if (token < 0) {
118 if (token != -ERESTARTSYS)
119 pr_err("Failed to get the async token\n");
120
121 return token;
122 }
123
124 rc = opal_tpo_read(token, &__y_m_d, &__h_m);
125 if (rc != OPAL_ASYNC_COMPLETION) {
126 rc = -EIO;
127 goto exit;
128 }
129
130 rc = opal_async_wait_response(token, &msg);
131 if (rc) {
132 rc = -EIO;
133 goto exit;
134 }
135
136 rc = be64_to_cpu(msg.params[1]);
137 if (rc != OPAL_SUCCESS) {
138 rc = -EIO;
139 goto exit;
140 }
141
142 y_m_d = be32_to_cpu(__y_m_d);
143 h_m_s_ms = ((u64)be32_to_cpu(__h_m) << 32);
144 opal_to_tm(y_m_d, h_m_s_ms, &alarm->time);
145
146exit:
147 opal_async_release_token(token);
148 return rc;
149}
150
151/* Set Timed Power-On */
152static int opal_set_tpo_time(struct device *dev, struct rtc_wkalrm *alarm)
153{
154 u64 h_m_s_ms = 0, token;
155 struct opal_msg msg;
156 u32 y_m_d = 0;
157 int rc;
158
159 tm_to_opal(&alarm->time, &y_m_d, &h_m_s_ms);
160
161 token = opal_async_get_token_interruptible();
162 if (token < 0) {
163 if (token != -ERESTARTSYS)
164 pr_err("Failed to get the async token\n");
165
166 return token;
167 }
168
169 /* TPO, we care about hour and minute */
170 rc = opal_tpo_write(token, y_m_d,
171 (u32)((h_m_s_ms >> 32) & 0xffff0000));
172 if (rc != OPAL_ASYNC_COMPLETION) {
173 rc = -EIO;
174 goto exit;
175 }
176
177 rc = opal_async_wait_response(token, &msg);
178 if (rc) {
179 rc = -EIO;
180 goto exit;
181 }
182
183 rc = be64_to_cpu(msg.params[1]);
184 if (rc != OPAL_SUCCESS)
185 rc = -EIO;
186
187exit:
188 opal_async_release_token(token);
189 return rc;
190}
191
192static const struct rtc_class_ops opal_rtc_ops = {
193 .read_time = opal_get_rtc_time,
194 .set_time = opal_set_rtc_time,
195 .read_alarm = opal_get_tpo_time,
196 .set_alarm = opal_set_tpo_time,
197};
198
199static int opal_rtc_probe(struct platform_device *pdev)
200{
201 struct rtc_device *rtc;
202
203 if (pdev->dev.of_node && of_get_property(pdev->dev.of_node, "has-tpo",
204 NULL))
205 device_set_wakeup_capable(&pdev->dev, true);
206
207 rtc = devm_rtc_device_register(&pdev->dev, DRVNAME, &opal_rtc_ops,
208 THIS_MODULE);
209 if (IS_ERR(rtc))
210 return PTR_ERR(rtc);
211
212 rtc->uie_unsupported = 1;
213
214 return 0;
215}
216
217static const struct of_device_id opal_rtc_match[] = {
218 {
219 .compatible = "ibm,opal-rtc",
220 },
221 { }
222};
223MODULE_DEVICE_TABLE(of, opal_rtc_match);
224
225static const struct platform_device_id opal_rtc_driver_ids[] = {
226 {
227 .name = "opal-rtc",
228 },
229 { }
230};
231MODULE_DEVICE_TABLE(platform, opal_rtc_driver_ids);
232
233static struct platform_driver opal_rtc_driver = {
234 .probe = opal_rtc_probe,
235 .id_table = opal_rtc_driver_ids,
236 .driver = {
237 .name = DRVNAME,
238 .owner = THIS_MODULE,
239 .of_match_table = opal_rtc_match,
240 },
241};
242
243static int __init opal_rtc_init(void)
244{
245 if (!firmware_has_feature(FW_FEATURE_OPAL))
246 return -ENODEV;
247
248 return platform_driver_register(&opal_rtc_driver);
249}
250
251static void __exit opal_rtc_exit(void)
252{
253 platform_driver_unregister(&opal_rtc_driver);
254}
255
256MODULE_AUTHOR("Neelesh Gupta <neelegup@linux.vnet.ibm.com>");
257MODULE_DESCRIPTION("IBM OPAL RTC driver");
258MODULE_LICENSE("GPL");
259
260module_init(opal_rtc_init);
261module_exit(opal_rtc_exit);
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index cdd149ca5cc0..431b7fc605c9 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -175,6 +175,52 @@ static inline void __unmap_hugepage_range(struct mmu_gather *tlb,
175} 175}
176 176
177#endif /* !CONFIG_HUGETLB_PAGE */ 177#endif /* !CONFIG_HUGETLB_PAGE */
178/*
179 * hugepages at page global directory. If arch support
180 * hugepages at pgd level, they need to define this.
181 */
182#ifndef pgd_huge
183#define pgd_huge(x) 0
184#endif
185
186#ifndef pgd_write
187static inline int pgd_write(pgd_t pgd)
188{
189 BUG();
190 return 0;
191}
192#endif
193
194#ifndef pud_write
195static inline int pud_write(pud_t pud)
196{
197 BUG();
198 return 0;
199}
200#endif
201
202#ifndef is_hugepd
203/*
204 * Some architectures requires a hugepage directory format that is
205 * required to support multiple hugepage sizes. For example
206 * a4fe3ce76 "powerpc/mm: Allow more flexible layouts for hugepage pagetables"
207 * introduced the same on powerpc. This allows for a more flexible hugepage
208 * pagetable layout.
209 */
210typedef struct { unsigned long pd; } hugepd_t;
211#define is_hugepd(hugepd) (0)
212#define __hugepd(x) ((hugepd_t) { (x) })
213static inline int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
214 unsigned pdshift, unsigned long end,
215 int write, struct page **pages, int *nr)
216{
217 return 0;
218}
219#else
220extern int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
221 unsigned pdshift, unsigned long end,
222 int write, struct page **pages, int *nr);
223#endif
178 224
179#define HUGETLB_ANON_FILE "anon_hugepage" 225#define HUGETLB_ANON_FILE "anon_hugepage"
180 226
diff --git a/mm/gup.c b/mm/gup.c
index cd62c8c90d4a..0ca1df9075ab 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -3,7 +3,6 @@
3#include <linux/err.h> 3#include <linux/err.h>
4#include <linux/spinlock.h> 4#include <linux/spinlock.h>
5 5
6#include <linux/hugetlb.h>
7#include <linux/mm.h> 6#include <linux/mm.h>
8#include <linux/pagemap.h> 7#include <linux/pagemap.h>
9#include <linux/rmap.h> 8#include <linux/rmap.h>
@@ -12,6 +11,7 @@
12 11
13#include <linux/sched.h> 12#include <linux/sched.h>
14#include <linux/rwsem.h> 13#include <linux/rwsem.h>
14#include <linux/hugetlb.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable.h>
16 16
17#include "internal.h" 17#include "internal.h"
@@ -875,6 +875,49 @@ static int gup_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
875 return 1; 875 return 1;
876} 876}
877 877
878static int gup_huge_pgd(pgd_t orig, pgd_t *pgdp, unsigned long addr,
879 unsigned long end, int write,
880 struct page **pages, int *nr)
881{
882 int refs;
883 struct page *head, *page, *tail;
884
885 if (write && !pgd_write(orig))
886 return 0;
887
888 refs = 0;
889 head = pgd_page(orig);
890 page = head + ((addr & ~PGDIR_MASK) >> PAGE_SHIFT);
891 tail = page;
892 do {
893 VM_BUG_ON_PAGE(compound_head(page) != head, page);
894 pages[*nr] = page;
895 (*nr)++;
896 page++;
897 refs++;
898 } while (addr += PAGE_SIZE, addr != end);
899
900 if (!page_cache_add_speculative(head, refs)) {
901 *nr -= refs;
902 return 0;
903 }
904
905 if (unlikely(pgd_val(orig) != pgd_val(*pgdp))) {
906 *nr -= refs;
907 while (refs--)
908 put_page(head);
909 return 0;
910 }
911
912 while (refs--) {
913 if (PageTail(tail))
914 get_huge_page_tail(tail);
915 tail++;
916 }
917
918 return 1;
919}
920
878static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end, 921static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
879 int write, struct page **pages, int *nr) 922 int write, struct page **pages, int *nr)
880{ 923{
@@ -902,6 +945,14 @@ static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
902 pages, nr)) 945 pages, nr))
903 return 0; 946 return 0;
904 947
948 } else if (unlikely(is_hugepd(__hugepd(pmd_val(pmd))))) {
949 /*
950 * architecture have different format for hugetlbfs
951 * pmd format and THP pmd format
952 */
953 if (!gup_huge_pd(__hugepd(pmd_val(pmd)), addr,
954 PMD_SHIFT, next, write, pages, nr))
955 return 0;
905 } else if (!gup_pte_range(pmd, addr, next, write, pages, nr)) 956 } else if (!gup_pte_range(pmd, addr, next, write, pages, nr))
906 return 0; 957 return 0;
907 } while (pmdp++, addr = next, addr != end); 958 } while (pmdp++, addr = next, addr != end);
@@ -909,22 +960,26 @@ static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
909 return 1; 960 return 1;
910} 961}
911 962
912static int gup_pud_range(pgd_t *pgdp, unsigned long addr, unsigned long end, 963static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
913 int write, struct page **pages, int *nr) 964 int write, struct page **pages, int *nr)
914{ 965{
915 unsigned long next; 966 unsigned long next;
916 pud_t *pudp; 967 pud_t *pudp;
917 968
918 pudp = pud_offset(pgdp, addr); 969 pudp = pud_offset(&pgd, addr);
919 do { 970 do {
920 pud_t pud = ACCESS_ONCE(*pudp); 971 pud_t pud = ACCESS_ONCE(*pudp);
921 972
922 next = pud_addr_end(addr, end); 973 next = pud_addr_end(addr, end);
923 if (pud_none(pud)) 974 if (pud_none(pud))
924 return 0; 975 return 0;
925 if (pud_huge(pud)) { 976 if (unlikely(pud_huge(pud))) {
926 if (!gup_huge_pud(pud, pudp, addr, next, write, 977 if (!gup_huge_pud(pud, pudp, addr, next, write,
927 pages, nr)) 978 pages, nr))
979 return 0;
980 } else if (unlikely(is_hugepd(__hugepd(pud_val(pud))))) {
981 if (!gup_huge_pd(__hugepd(pud_val(pud)), addr,
982 PUD_SHIFT, next, write, pages, nr))
928 return 0; 983 return 0;
929 } else if (!gup_pmd_range(pud, addr, next, write, pages, nr)) 984 } else if (!gup_pmd_range(pud, addr, next, write, pages, nr))
930 return 0; 985 return 0;
@@ -970,10 +1025,20 @@ int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
970 local_irq_save(flags); 1025 local_irq_save(flags);
971 pgdp = pgd_offset(mm, addr); 1026 pgdp = pgd_offset(mm, addr);
972 do { 1027 do {
1028 pgd_t pgd = ACCESS_ONCE(*pgdp);
1029
973 next = pgd_addr_end(addr, end); 1030 next = pgd_addr_end(addr, end);
974 if (pgd_none(*pgdp)) 1031 if (pgd_none(pgd))
975 break; 1032 break;
976 else if (!gup_pud_range(pgdp, addr, next, write, pages, &nr)) 1033 if (unlikely(pgd_huge(pgd))) {
1034 if (!gup_huge_pgd(pgd, pgdp, addr, next, write,
1035 pages, &nr))
1036 break;
1037 } else if (unlikely(is_hugepd(__hugepd(pgd_val(pgd))))) {
1038 if (!gup_huge_pd(__hugepd(pgd_val(pgd)), addr,
1039 PGDIR_SHIFT, next, write, pages, &nr))
1040 break;
1041 } else if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
977 break; 1042 break;
978 } while (pgdp++, addr = next, addr != end); 1043 } while (pgdp++, addr = next, addr != end);
979 local_irq_restore(flags); 1044 local_irq_restore(flags);