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authorLinus Torvalds <torvalds@linux-foundation.org>2016-03-16 00:58:58 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-03-16 00:58:58 -0400
commit13f6f62f61b4d3d5f45bed889128bb7ff3fda5ed (patch)
treee3b6a1127364ded5dd7b3869ff1d5c698d9ab62d
parentf0718cea471265fe69017191429979ba1a54b9e0 (diff)
parentcee2cc21550648679d222cbe2637fcc6d0f730ef (diff)
Merge tag 'rtc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Pull RTC updates from Alexandre Belloni: "Core: - New sysfs interface to set and read clock offset - Drivers can now be both I2C and SPI (see pcf2127 and ds3232) New drivers: - Alphascale ASM9260 - Epson RX6110SA - Maxim max20024 and max77620 (in max77686) - Microchip PIC32 - NXP pcf2129 (in pcf2127) Subsystem wide cleanups: - remove IRQF_EARLY_RESUME when unecessary Drivers: - ds1307: clock output, temperature sensor and wakeup-source support - ds1685: actually spin forever in poweroff error path - ds3232: many cleanups - ds3234: merged in ds3232 - hym8563: fix invalid year calculation - max77686: many cleanups - max77802 merged in max77686 - pcf2123: cleanups and offset support - pcf85063: cleanups - pcf8523: propely handle oscillator stop bit - rv3029: many cleanups, trickle charger and temperature sensor support - rv8803: convert spin_lock to mutex_lock - rx8025: many fixes - vr41xx: restore alarm_irq_enable" * tag 'rtc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (86 commits) rtc: pcf2127: add pcf2129 device id rtc: pcf2127: add support for spi interface rtc: pcf2127: convert to use regmap rtc: rv3029: Add thermometer hwmon support rtc: rv3029: Add update_bits helper for eeprom access rtc: ds1685: actually spin forever in poweroff error path rtc: hym8563: fix invalid year calculation rtc: ds3232: use rtc->ops_lock to protect alarm operations rtc: ds3232: fix issue when irq is shared several devices rtc: ds3232: remove unused UIE code rtc: ds3232: add register access error checks rtc: ds3232: fix read on /dev/rtc after RTC_AIE_ON rtc: merge ds3232 and ds3234 rtc: ds3232: convert to use regmap rtc: pxa: fix Kconfig indentation rtc: rv3029: Add device tree property for trickle charger rtc: rv3029: Add functions for EEPROM access rtc: rv3029: Add i2c register update-bits helper rtc: rv3029: Add missing register definitions rtc: rv3029: Add "rv3029" I2C device id ...
-rw-r--r--Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt19
-rw-r--r--Documentation/devicetree/bindings/rtc/epson,rx6110.txt39
-rw-r--r--Documentation/devicetree/bindings/rtc/maxim,ds3231.txt37
-rw-r--r--Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt21
-rw-r--r--Documentation/rtc.txt6
-rw-r--r--drivers/mfd/max77686.c86
-rw-r--r--drivers/rtc/Kconfig252
-rw-r--r--drivers/rtc/Makefile5
-rw-r--r--drivers/rtc/class.c13
-rw-r--r--drivers/rtc/interface.c54
-rw-r--r--drivers/rtc/rtc-as3722.c2
-rw-r--r--drivers/rtc/rtc-asm9260.c355
-rw-r--r--drivers/rtc/rtc-ds1305.c4
-rw-r--r--drivers/rtc/rtc-ds1307.c411
-rw-r--r--drivers/rtc/rtc-ds1685.c9
-rw-r--r--drivers/rtc/rtc-ds3232.c476
-rw-r--r--drivers/rtc/rtc-ds3234.c171
-rw-r--r--drivers/rtc/rtc-generic.c12
-rw-r--r--drivers/rtc/rtc-hym8563.c2
-rw-r--r--drivers/rtc/rtc-max77686.c565
-rw-r--r--drivers/rtc/rtc-max77802.c502
-rw-r--r--drivers/rtc/rtc-mt6397.c1
-rw-r--r--drivers/rtc/rtc-palmas.c3
-rw-r--r--drivers/rtc/rtc-pcf2123.c271
-rw-r--r--drivers/rtc/rtc-pcf2127.c335
-rw-r--r--drivers/rtc/rtc-pcf85063.c162
-rw-r--r--drivers/rtc/rtc-pcf8523.c25
-rw-r--r--drivers/rtc/rtc-pic32.c411
-rw-r--r--drivers/rtc/rtc-rv3029c2.c723
-rw-r--r--drivers/rtc/rtc-rv8803.c39
-rw-r--r--drivers/rtc/rtc-rx6110.c402
-rw-r--r--drivers/rtc/rtc-rx8025.c25
-rw-r--r--drivers/rtc/rtc-s5m.c8
-rw-r--r--drivers/rtc/rtc-sysfs.c35
-rw-r--r--drivers/rtc/rtc-tps6586x.c2
-rw-r--r--drivers/rtc/rtc-tps65910.c2
-rw-r--r--drivers/rtc/rtc-tps80031.c2
-rw-r--r--drivers/rtc/rtc-vr41xx.c13
-rw-r--r--include/linux/mfd/max77686-private.h3
-rw-r--r--include/linux/rtc.h4
40 files changed, 3854 insertions, 1653 deletions
diff --git a/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt b/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt
new file mode 100644
index 000000000000..76ebca568db9
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt
@@ -0,0 +1,19 @@
1* Alphascale asm9260 SoC Real Time Clock
2
3Required properties:
4- compatible: Should be "alphascale,asm9260-rtc"
5- reg: Physical base address of the controller and length
6 of memory mapped region.
7- interrupts: IRQ line for the RTC.
8- clocks: Reference to the clock entry.
9- clock-names: should contain:
10 * "ahb" for the SoC RTC clock
11
12Example:
13rtc0: rtc@800a0000 {
14 compatible = "alphascale,asm9260-rtc";
15 reg = <0x800a0000 0x100>;
16 clocks = <&acc CLKID_AHB_RTC>;
17 clock-names = "ahb";
18 interrupts = <2>;
19};
diff --git a/Documentation/devicetree/bindings/rtc/epson,rx6110.txt b/Documentation/devicetree/bindings/rtc/epson,rx6110.txt
new file mode 100644
index 000000000000..3dc313e01f77
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/epson,rx6110.txt
@@ -0,0 +1,39 @@
1Epson RX6110 Real Time Clock
2============================
3
4The Epson RX6110 can be used with SPI or I2C busses. The kind of
5bus depends on the SPISEL pin and can not be configured via software.
6
7I2C mode
8--------
9
10Required properties:
11 - compatible: should be: "epson,rx6110"
12 - reg : the I2C address of the device for I2C
13
14Example:
15
16 rtc: rtc@32 {
17 compatible = "epson,rx6110"
18 reg = <0x32>;
19 };
20
21SPI mode
22--------
23
24Required properties:
25 - compatible: should be: "epson,rx6110"
26 - reg: chip select number
27 - spi-cs-high: RX6110 needs chipselect high
28 - spi-cpha: RX6110 works with SPI shifted clock phase
29 - spi-cpol: RX6110 works with SPI inverse clock polarity
30
31Example:
32
33 rtc: rtc@3 {
34 compatible = "epson,rx6110"
35 reg = <3>
36 spi-cs-high;
37 spi-cpha;
38 spi-cpol;
39 };
diff --git a/Documentation/devicetree/bindings/rtc/maxim,ds3231.txt b/Documentation/devicetree/bindings/rtc/maxim,ds3231.txt
new file mode 100644
index 000000000000..ddef330d2709
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/maxim,ds3231.txt
@@ -0,0 +1,37 @@
1* Maxim DS3231 Real Time Clock
2
3Required properties:
4see: Documentation/devicetree/bindings/i2c/trivial-devices.txt
5
6Optional property:
7- #clock-cells: Should be 1.
8- clock-output-names:
9 overwrite the default clock names "ds3231_clk_sqw" and "ds3231_clk_32khz".
10
11Each clock is assigned an identifier and client nodes can use this identifier
12to specify the clock which they consume. Following indices are allowed:
13 - 0: square-wave output on the SQW pin
14 - 1: square-wave output on the 32kHz pin
15
16- interrupts: rtc alarm/event interrupt. When this property is selected,
17 clock on the SQW pin cannot be used.
18
19Example:
20
21ds3231: ds3231@51 {
22 compatible = "maxim,ds3231";
23 reg = <0x68>;
24 #clock-cells = <1>;
25};
26
27device1 {
28...
29 clocks = <&ds3231 0>;
30...
31};
32
33device2 {
34...
35 clocks = <&ds3231 1>;
36...
37};
diff --git a/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt b/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt
new file mode 100644
index 000000000000..180b7144bfcc
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt
@@ -0,0 +1,21 @@
1* Microchip PIC32 Real Time Clock and Calendar
2
3The RTCC keeps time in hours, minutes, and seconds, and one half second. It
4provides a calendar in weekday, date, month, and year. It also provides a
5configurable alarm.
6
7Required properties:
8- compatible: should be: "microchip,pic32mzda-rtc"
9- reg: physical base address of the controller and length of memory mapped
10 region.
11- interrupts: RTC alarm/event interrupt
12- clocks: clock phandle
13
14Example:
15
16 rtc: rtc@1f8c0000 {
17 compatible = "microchip,pic32mzda-rtc";
18 reg = <0x1f8c0000 0x60>;
19 interrupts = <166 IRQ_TYPE_EDGE_RISING>;
20 clocks = <&PBCLK6>;
21 };
diff --git a/Documentation/rtc.txt b/Documentation/rtc.txt
index 8446f1ea1410..ddc366026e00 100644
--- a/Documentation/rtc.txt
+++ b/Documentation/rtc.txt
@@ -157,6 +157,12 @@ wakealarm: The time at which the clock will generate a system wakeup
157 the epoch by default, or if there's a leading +, seconds in the 157 the epoch by default, or if there's a leading +, seconds in the
158 future, or if there is a leading +=, seconds ahead of the current 158 future, or if there is a leading +=, seconds ahead of the current
159 alarm. 159 alarm.
160offset: The amount which the rtc clock has been adjusted in firmware.
161 Visible only if the driver supports clock offset adjustment.
162 The unit is parts per billion, i.e. The number of clock ticks
163 which are added to or removed from the rtc's base clock per
164 billion ticks. A positive value makes a day pass more slowly,
165 longer, and a negative value makes a day pass more quickly.
160 166
161IOCTL INTERFACE 167IOCTL INTERFACE
162--------------- 168---------------
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index d959ebbb2194..98ecd136a21b 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -35,8 +35,6 @@
35#include <linux/err.h> 35#include <linux/err.h>
36#include <linux/of.h> 36#include <linux/of.h>
37 37
38#define I2C_ADDR_RTC (0x0C >> 1)
39
40static const struct mfd_cell max77686_devs[] = { 38static const struct mfd_cell max77686_devs[] = {
41 { .name = "max77686-pmic", }, 39 { .name = "max77686-pmic", },
42 { .name = "max77686-rtc", }, 40 { .name = "max77686-rtc", },
@@ -116,11 +114,6 @@ static const struct regmap_config max77686_regmap_config = {
116 .val_bits = 8, 114 .val_bits = 8,
117}; 115};
118 116
119static const struct regmap_config max77686_rtc_regmap_config = {
120 .reg_bits = 8,
121 .val_bits = 8,
122};
123
124static const struct regmap_config max77802_regmap_config = { 117static const struct regmap_config max77802_regmap_config = {
125 .reg_bits = 8, 118 .reg_bits = 8,
126 .val_bits = 8, 119 .val_bits = 8,
@@ -156,25 +149,6 @@ static const struct regmap_irq_chip max77686_irq_chip = {
156 .num_irqs = ARRAY_SIZE(max77686_irqs), 149 .num_irqs = ARRAY_SIZE(max77686_irqs),
157}; 150};
158 151
159static const struct regmap_irq max77686_rtc_irqs[] = {
160 /* RTC interrupts */
161 { .reg_offset = 0, .mask = MAX77686_RTCINT_RTC60S_MSK, },
162 { .reg_offset = 0, .mask = MAX77686_RTCINT_RTCA1_MSK, },
163 { .reg_offset = 0, .mask = MAX77686_RTCINT_RTCA2_MSK, },
164 { .reg_offset = 0, .mask = MAX77686_RTCINT_SMPL_MSK, },
165 { .reg_offset = 0, .mask = MAX77686_RTCINT_RTC1S_MSK, },
166 { .reg_offset = 0, .mask = MAX77686_RTCINT_WTSR_MSK, },
167};
168
169static const struct regmap_irq_chip max77686_rtc_irq_chip = {
170 .name = "max77686-rtc",
171 .status_base = MAX77686_RTC_INT,
172 .mask_base = MAX77686_RTC_INTM,
173 .num_regs = 1,
174 .irqs = max77686_rtc_irqs,
175 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
176};
177
178static const struct regmap_irq_chip max77802_irq_chip = { 152static const struct regmap_irq_chip max77802_irq_chip = {
179 .name = "max77802-pmic", 153 .name = "max77802-pmic",
180 .status_base = MAX77802_REG_INT1, 154 .status_base = MAX77802_REG_INT1,
@@ -184,15 +158,6 @@ static const struct regmap_irq_chip max77802_irq_chip = {
184 .num_irqs = ARRAY_SIZE(max77686_irqs), 158 .num_irqs = ARRAY_SIZE(max77686_irqs),
185}; 159};
186 160
187static const struct regmap_irq_chip max77802_rtc_irq_chip = {
188 .name = "max77802-rtc",
189 .status_base = MAX77802_RTC_INT,
190 .mask_base = MAX77802_RTC_INTM,
191 .num_regs = 1,
192 .irqs = max77686_rtc_irqs, /* same masks as 77686 */
193 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
194};
195
196static const struct of_device_id max77686_pmic_dt_match[] = { 161static const struct of_device_id max77686_pmic_dt_match[] = {
197 { 162 {
198 .compatible = "maxim,max77686", 163 .compatible = "maxim,max77686",
@@ -214,8 +179,6 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
214 int ret = 0; 179 int ret = 0;
215 const struct regmap_config *config; 180 const struct regmap_config *config;
216 const struct regmap_irq_chip *irq_chip; 181 const struct regmap_irq_chip *irq_chip;
217 const struct regmap_irq_chip *rtc_irq_chip;
218 struct regmap **rtc_regmap;
219 const struct mfd_cell *cells; 182 const struct mfd_cell *cells;
220 int n_devs; 183 int n_devs;
221 184
@@ -242,15 +205,11 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
242 if (max77686->type == TYPE_MAX77686) { 205 if (max77686->type == TYPE_MAX77686) {
243 config = &max77686_regmap_config; 206 config = &max77686_regmap_config;
244 irq_chip = &max77686_irq_chip; 207 irq_chip = &max77686_irq_chip;
245 rtc_irq_chip = &max77686_rtc_irq_chip;
246 rtc_regmap = &max77686->rtc_regmap;
247 cells = max77686_devs; 208 cells = max77686_devs;
248 n_devs = ARRAY_SIZE(max77686_devs); 209 n_devs = ARRAY_SIZE(max77686_devs);
249 } else { 210 } else {
250 config = &max77802_regmap_config; 211 config = &max77802_regmap_config;
251 irq_chip = &max77802_irq_chip; 212 irq_chip = &max77802_irq_chip;
252 rtc_irq_chip = &max77802_rtc_irq_chip;
253 rtc_regmap = &max77686->regmap;
254 cells = max77802_devs; 213 cells = max77802_devs;
255 n_devs = ARRAY_SIZE(max77802_devs); 214 n_devs = ARRAY_SIZE(max77802_devs);
256 } 215 }
@@ -270,60 +229,25 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
270 return -ENODEV; 229 return -ENODEV;
271 } 230 }
272 231
273 if (max77686->type == TYPE_MAX77686) {
274 max77686->rtc = i2c_new_dummy(i2c->adapter, I2C_ADDR_RTC);
275 if (!max77686->rtc) {
276 dev_err(max77686->dev,
277 "Failed to allocate I2C device for RTC\n");
278 return -ENODEV;
279 }
280 i2c_set_clientdata(max77686->rtc, max77686);
281
282 max77686->rtc_regmap =
283 devm_regmap_init_i2c(max77686->rtc,
284 &max77686_rtc_regmap_config);
285 if (IS_ERR(max77686->rtc_regmap)) {
286 ret = PTR_ERR(max77686->rtc_regmap);
287 dev_err(max77686->dev,
288 "failed to allocate RTC regmap: %d\n",
289 ret);
290 goto err_unregister_i2c;
291 }
292 }
293
294 ret = regmap_add_irq_chip(max77686->regmap, max77686->irq, 232 ret = regmap_add_irq_chip(max77686->regmap, max77686->irq,
295 IRQF_TRIGGER_FALLING | IRQF_ONESHOT | 233 IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
296 IRQF_SHARED, 0, irq_chip, 234 IRQF_SHARED, 0, irq_chip,
297 &max77686->irq_data); 235 &max77686->irq_data);
298 if (ret) { 236 if (ret < 0) {
299 dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret); 237 dev_err(&i2c->dev, "failed to add PMIC irq chip: %d\n", ret);
300 goto err_unregister_i2c; 238 return ret;
301 }
302
303 ret = regmap_add_irq_chip(*rtc_regmap, max77686->irq,
304 IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
305 IRQF_SHARED, 0, rtc_irq_chip,
306 &max77686->rtc_irq_data);
307 if (ret) {
308 dev_err(&i2c->dev, "failed to add RTC irq chip: %d\n", ret);
309 goto err_del_irqc;
310 } 239 }
311 240
312 ret = mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL, 0, NULL); 241 ret = mfd_add_devices(max77686->dev, -1, cells, n_devs, NULL, 0, NULL);
313 if (ret < 0) { 242 if (ret < 0) {
314 dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); 243 dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret);
315 goto err_del_rtc_irqc; 244 goto err_del_irqc;
316 } 245 }
317 246
318 return 0; 247 return 0;
319 248
320err_del_rtc_irqc:
321 regmap_del_irq_chip(max77686->irq, max77686->rtc_irq_data);
322err_del_irqc: 249err_del_irqc:
323 regmap_del_irq_chip(max77686->irq, max77686->irq_data); 250 regmap_del_irq_chip(max77686->irq, max77686->irq_data);
324err_unregister_i2c:
325 if (max77686->type == TYPE_MAX77686)
326 i2c_unregister_device(max77686->rtc);
327 251
328 return ret; 252 return ret;
329} 253}
@@ -334,12 +258,8 @@ static int max77686_i2c_remove(struct i2c_client *i2c)
334 258
335 mfd_remove_devices(max77686->dev); 259 mfd_remove_devices(max77686->dev);
336 260
337 regmap_del_irq_chip(max77686->irq, max77686->rtc_irq_data);
338 regmap_del_irq_chip(max77686->irq, max77686->irq_data); 261 regmap_del_irq_chip(max77686->irq, max77686->irq_data);
339 262
340 if (max77686->type == TYPE_MAX77686)
341 i2c_unregister_device(max77686->rtc);
342
343 return 0; 263 return 0;
344} 264}
345 265
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 376322f71fd5..544bd3493852 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -140,7 +140,6 @@ config RTC_DRV_TEST
140 will be called rtc-test. 140 will be called rtc-test.
141 141
142comment "I2C RTC drivers" 142comment "I2C RTC drivers"
143 depends on I2C
144 143
145if I2C 144if I2C
146 145
@@ -212,6 +211,15 @@ config RTC_DRV_DS1307
212 This driver can also be built as a module. If so, the module 211 This driver can also be built as a module. If so, the module
213 will be called rtc-ds1307. 212 will be called rtc-ds1307.
214 213
214config RTC_DRV_DS1307_HWMON
215 bool "HWMON support for rtc-ds1307"
216 depends on RTC_DRV_DS1307 && HWMON
217 depends on !(RTC_DRV_DS1307=y && HWMON=m)
218 default y
219 help
220 Say Y here if you want to expose temperature sensor data on
221 rtc-ds1307 (only DS3231)
222
215config RTC_DRV_DS1374 223config RTC_DRV_DS1374
216 tristate "Dallas/Maxim DS1374" 224 tristate "Dallas/Maxim DS1374"
217 help 225 help
@@ -239,16 +247,6 @@ config RTC_DRV_DS1672
239 This driver can also be built as a module. If so, the module 247 This driver can also be built as a module. If so, the module
240 will be called rtc-ds1672. 248 will be called rtc-ds1672.
241 249
242config RTC_DRV_DS3232
243 tristate "Dallas/Maxim DS3232"
244 help
245 If you say yes here you get support for Dallas Semiconductor
246 DS3232 real-time clock chips. If an interrupt is associated
247 with the device, the alarm functionality is supported.
248
249 This driver can also be built as a module. If so, the module
250 will be called rtc-ds3232.
251
252config RTC_DRV_HYM8563 250config RTC_DRV_HYM8563
253 tristate "Haoyu Microelectronics HYM8563" 251 tristate "Haoyu Microelectronics HYM8563"
254 depends on OF 252 depends on OF
@@ -317,10 +315,10 @@ config RTC_DRV_MAX8997
317 315
318config RTC_DRV_MAX77686 316config RTC_DRV_MAX77686
319 tristate "Maxim MAX77686" 317 tristate "Maxim MAX77686"
320 depends on MFD_MAX77686 318 depends on MFD_MAX77686 || MFD_MAX77620
321 help 319 help
322 If you say yes here you will get support for the 320 If you say yes here you will get support for the
323 RTC of Maxim MAX77686 PMIC. 321 RTC of Maxim MAX77686/MAX77620/MAX77802 PMIC.
324 322
325 This driver can also be built as a module. If so, the module 323 This driver can also be built as a module. If so, the module
326 will be called rtc-max77686. 324 will be called rtc-max77686.
@@ -335,16 +333,6 @@ config RTC_DRV_RK808
335 This driver can also be built as a module. If so, the module 333 This driver can also be built as a module. If so, the module
336 will be called rk808-rtc. 334 will be called rk808-rtc.
337 335
338config RTC_DRV_MAX77802
339 tristate "Maxim 77802 RTC"
340 depends on MFD_MAX77686
341 help
342 If you say yes here you will get support for the
343 RTC of Maxim MAX77802 PMIC.
344
345 This driver can also be built as a module. If so, the module
346 will be called rtc-max77802.
347
348config RTC_DRV_RS5C372 336config RTC_DRV_RS5C372
349 tristate "Ricoh R2025S/D, RS5C372A/B, RV5C386, RV5C387A" 337 tristate "Ricoh R2025S/D, RS5C372A/B, RV5C386, RV5C387A"
350 help 338 help
@@ -391,25 +379,6 @@ config RTC_DRV_X1205
391 This driver can also be built as a module. If so, the module 379 This driver can also be built as a module. If so, the module
392 will be called rtc-x1205. 380 will be called rtc-x1205.
393 381
394config RTC_DRV_PALMAS
395 tristate "TI Palmas RTC driver"
396 depends on MFD_PALMAS
397 help
398 If you say yes here you get support for the RTC of TI PALMA series PMIC
399 chips.
400
401 This driver can also be built as a module. If so, the module
402 will be called rtc-palma.
403
404config RTC_DRV_PCF2127
405 tristate "NXP PCF2127"
406 help
407 If you say yes here you get support for the NXP PCF2127/29 RTC
408 chips.
409
410 This driver can also be built as a module. If so, the module
411 will be called rtc-pcf2127.
412
413config RTC_DRV_PCF8523 382config RTC_DRV_PCF8523
414 tristate "NXP PCF8523" 383 tristate "NXP PCF8523"
415 help 384 help
@@ -419,6 +388,14 @@ config RTC_DRV_PCF8523
419 This driver can also be built as a module. If so, the module 388 This driver can also be built as a module. If so, the module
420 will be called rtc-pcf8523. 389 will be called rtc-pcf8523.
421 390
391config RTC_DRV_PCF85063
392 tristate "NXP PCF85063"
393 help
394 If you say yes here you get support for the PCF85063 RTC chip
395
396 This driver can also be built as a module. If so, the module
397 will be called rtc-pcf85063.
398
422config RTC_DRV_PCF8563 399config RTC_DRV_PCF8563
423 tristate "Philips PCF8563/Epson RTC8564" 400 tristate "Philips PCF8563/Epson RTC8564"
424 help 401 help
@@ -429,14 +406,6 @@ config RTC_DRV_PCF8563
429 This driver can also be built as a module. If so, the module 406 This driver can also be built as a module. If so, the module
430 will be called rtc-pcf8563. 407 will be called rtc-pcf8563.
431 408
432config RTC_DRV_PCF85063
433 tristate "nxp PCF85063"
434 help
435 If you say yes here you get support for the PCF85063 RTC chip
436
437 This driver can also be built as a module. If so, the module
438 will be called rtc-pcf85063.
439
440config RTC_DRV_PCF8583 409config RTC_DRV_PCF8583
441 tristate "Philips PCF8583" 410 tristate "Philips PCF8583"
442 help 411 help
@@ -501,6 +470,16 @@ config RTC_DRV_TWL4030
501 This driver can also be built as a module. If so, the module 470 This driver can also be built as a module. If so, the module
502 will be called rtc-twl. 471 will be called rtc-twl.
503 472
473config RTC_DRV_PALMAS
474 tristate "TI Palmas RTC driver"
475 depends on MFD_PALMAS
476 help
477 If you say yes here you get support for the RTC of TI PALMA series PMIC
478 chips.
479
480 This driver can also be built as a module. If so, the module
481 will be called rtc-palma.
482
504config RTC_DRV_TPS6586X 483config RTC_DRV_TPS6586X
505 tristate "TI TPS6586X RTC driver" 484 tristate "TI TPS6586X RTC driver"
506 depends on MFD_TPS6586X 485 depends on MFD_TPS6586X
@@ -595,14 +574,23 @@ config RTC_DRV_EM3027
595 will be called rtc-em3027. 574 will be called rtc-em3027.
596 575
597config RTC_DRV_RV3029C2 576config RTC_DRV_RV3029C2
598 tristate "Micro Crystal RTC" 577 tristate "Micro Crystal RV3029"
599 help 578 help
600 If you say yes here you get support for the Micro Crystal 579 If you say yes here you get support for the Micro Crystal
601 RV3029-C2 RTC chips. 580 RV3029 RTC chips.
602 581
603 This driver can also be built as a module. If so, the module 582 This driver can also be built as a module. If so, the module
604 will be called rtc-rv3029c2. 583 will be called rtc-rv3029c2.
605 584
585config RTC_DRV_RV3029_HWMON
586 bool "HWMON support for RV3029"
587 depends on RTC_DRV_RV3029C2 && HWMON
588 depends on !(RTC_DRV_RV3029C2=y && HWMON=m)
589 default y
590 help
591 Say Y here if you want to expose temperature sensor data on
592 rtc-rv3029c2.
593
606config RTC_DRV_RV8803 594config RTC_DRV_RV8803
607 tristate "Micro Crystal RV8803" 595 tristate "Micro Crystal RV8803"
608 help 596 help
@@ -691,15 +679,6 @@ config RTC_DRV_DS1390
691 This driver can also be built as a module. If so, the module 679 This driver can also be built as a module. If so, the module
692 will be called rtc-ds1390. 680 will be called rtc-ds1390.
693 681
694config RTC_DRV_MAX6902
695 tristate "Maxim MAX6902"
696 help
697 If you say yes here you will get support for the
698 Maxim MAX6902 SPI RTC chip.
699
700 This driver can also be built as a module. If so, the module
701 will be called rtc-max6902.
702
703config RTC_DRV_R9701 682config RTC_DRV_R9701
704 tristate "Epson RTC-9701JE" 683 tristate "Epson RTC-9701JE"
705 help 684 help
@@ -709,6 +688,23 @@ config RTC_DRV_R9701
709 This driver can also be built as a module. If so, the module 688 This driver can also be built as a module. If so, the module
710 will be called rtc-r9701. 689 will be called rtc-r9701.
711 690
691config RTC_DRV_RX4581
692 tristate "Epson RX-4581"
693 help
694 If you say yes here you will get support for the Epson RX-4581.
695
696 This driver can also be built as a module. If so the module
697 will be called rtc-rx4581.
698
699config RTC_DRV_RX6110
700 tristate "Epson RX-6110"
701 select REGMAP_SPI
702 help
703 If you say yes here you will get support for the Epson RX-6610.
704
705 This driver can also be built as a module. If so the module
706 will be called rtc-rx6110.
707
712config RTC_DRV_RS5C348 708config RTC_DRV_RS5C348
713 tristate "Ricoh RS5C348A/B" 709 tristate "Ricoh RS5C348A/B"
714 help 710 help
@@ -718,14 +714,14 @@ config RTC_DRV_RS5C348
718 This driver can also be built as a module. If so, the module 714 This driver can also be built as a module. If so, the module
719 will be called rtc-rs5c348. 715 will be called rtc-rs5c348.
720 716
721config RTC_DRV_DS3234 717config RTC_DRV_MAX6902
722 tristate "Maxim/Dallas DS3234" 718 tristate "Maxim MAX6902"
723 help 719 help
724 If you say yes here you get support for the 720 If you say yes here you will get support for the
725 Maxim/Dallas DS3234 SPI RTC chip. 721 Maxim MAX6902 SPI RTC chip.
726 722
727 This driver can also be built as a module. If so, the module 723 This driver can also be built as a module. If so, the module
728 will be called rtc-ds3234. 724 will be called rtc-max6902.
729 725
730config RTC_DRV_PCF2123 726config RTC_DRV_PCF2123
731 tristate "NXP PCF2123" 727 tristate "NXP PCF2123"
@@ -736,14 +732,6 @@ config RTC_DRV_PCF2123
736 This driver can also be built as a module. If so, the module 732 This driver can also be built as a module. If so, the module
737 will be called rtc-pcf2123. 733 will be called rtc-pcf2123.
738 734
739config RTC_DRV_RX4581
740 tristate "Epson RX-4581"
741 help
742 If you say yes here you will get support for the Epson RX-4581.
743
744 This driver can also be built as a module. If so the module
745 will be called rtc-rx4581.
746
747config RTC_DRV_MCP795 735config RTC_DRV_MCP795
748 tristate "Microchip MCP795" 736 tristate "Microchip MCP795"
749 help 737 help
@@ -754,6 +742,41 @@ config RTC_DRV_MCP795
754 742
755endif # SPI_MASTER 743endif # SPI_MASTER
756 744
745#
746# Helper to resolve issues with configs that have SPI enabled but I2C
747# modular. See SND_SOC_I2C_AND_SPI for more information
748#
749config RTC_I2C_AND_SPI
750 tristate
751 default m if I2C=m
752 default y if I2C=y
753 default y if SPI_MASTER=y
754 select REGMAP_I2C if I2C
755 select REGMAP_SPI if SPI_MASTER
756
757comment "SPI and I2C RTC drivers"
758
759config RTC_DRV_DS3232
760 tristate "Dallas/Maxim DS3232/DS3234"
761 depends on RTC_I2C_AND_SPI
762 help
763 If you say yes here you get support for Dallas Semiconductor
764 DS3232 and DS3234 real-time clock chips. If an interrupt is associated
765 with the device, the alarm functionality is supported.
766
767 This driver can also be built as a module. If so, the module
768 will be called rtc-ds3232.
769
770config RTC_DRV_PCF2127
771 tristate "NXP PCF2127"
772 depends on RTC_I2C_AND_SPI
773 help
774 If you say yes here you get support for the NXP PCF2127/29 RTC
775 chips.
776
777 This driver can also be built as a module. If so, the module
778 will be called rtc-pcf2127.
779
757comment "Platform RTC drivers" 780comment "Platform RTC drivers"
758 781
759# this 'CMOS' RTC driver is arch dependent because <asm-generic/rtc.h> 782# this 'CMOS' RTC driver is arch dependent because <asm-generic/rtc.h>
@@ -1087,7 +1110,7 @@ config RTC_DRV_WM8350
1087 1110
1088config RTC_DRV_SPEAR 1111config RTC_DRV_SPEAR
1089 tristate "SPEAR ST RTC" 1112 tristate "SPEAR ST RTC"
1090 depends on PLAT_SPEAR 1113 depends on PLAT_SPEAR || COMPILE_TEST
1091 default y 1114 default y
1092 help 1115 help
1093 If you say Y here you will get support for the RTC found on 1116 If you say Y here you will get support for the RTC found on
@@ -1119,7 +1142,7 @@ config RTC_DRV_AB8500
1119 1142
1120config RTC_DRV_NUC900 1143config RTC_DRV_NUC900
1121 tristate "NUC910/NUC920 RTC driver" 1144 tristate "NUC910/NUC920 RTC driver"
1122 depends on ARCH_W90X900 1145 depends on ARCH_W90X900 || COMPILE_TEST
1123 help 1146 help
1124 If you say yes here you get support for the RTC subsystem of the 1147 If you say yes here you get support for the RTC subsystem of the
1125 NUC910/NUC920 used in embedded systems. 1148 NUC910/NUC920 used in embedded systems.
@@ -1144,9 +1167,19 @@ config RTC_DRV_ZYNQMP
1144 1167
1145comment "on-CPU RTC drivers" 1168comment "on-CPU RTC drivers"
1146 1169
1170config RTC_DRV_ASM9260
1171 tristate "Alphascale asm9260 RTC"
1172 depends on MACH_ASM9260
1173 help
1174 If you say yes here you get support for the RTC on the
1175 Alphascale asm9260 SoC.
1176
1177 This driver can also be built as a module. If so, the module
1178 will be called rtc-asm9260.
1179
1147config RTC_DRV_DAVINCI 1180config RTC_DRV_DAVINCI
1148 tristate "TI DaVinci RTC" 1181 tristate "TI DaVinci RTC"
1149 depends on ARCH_DAVINCI_DM365 1182 depends on ARCH_DAVINCI_DM365 || COMPILE_TEST
1150 help 1183 help
1151 If you say yes here you get support for the RTC on the 1184 If you say yes here you get support for the RTC on the
1152 DaVinci platforms (DM365). 1185 DaVinci platforms (DM365).
@@ -1156,7 +1189,7 @@ config RTC_DRV_DAVINCI
1156 1189
1157config RTC_DRV_DIGICOLOR 1190config RTC_DRV_DIGICOLOR
1158 tristate "Conexant Digicolor RTC" 1191 tristate "Conexant Digicolor RTC"
1159 depends on ARCH_DIGICOLOR 1192 depends on ARCH_DIGICOLOR || COMPILE_TEST
1160 help 1193 help
1161 If you say yes here you get support for the RTC on Conexant 1194 If you say yes here you get support for the RTC on Conexant
1162 Digicolor platforms. This currently includes the CX92755 SoC. 1195 Digicolor platforms. This currently includes the CX92755 SoC.
@@ -1175,7 +1208,7 @@ config RTC_DRV_IMXDI
1175 1208
1176config RTC_DRV_OMAP 1209config RTC_DRV_OMAP
1177 tristate "TI OMAP Real Time Clock" 1210 tristate "TI OMAP Real Time Clock"
1178 depends on ARCH_OMAP || ARCH_DAVINCI 1211 depends on ARCH_OMAP || ARCH_DAVINCI || COMPILE_TEST
1179 help 1212 help
1180 Say "yes" here to support the on chip real time clock 1213 Say "yes" here to support the on chip real time clock
1181 present on TI OMAP1, AM33xx, DA8xx/OMAP-L13x, AM43xx and DRA7xx. 1214 present on TI OMAP1, AM33xx, DA8xx/OMAP-L13x, AM43xx and DRA7xx.
@@ -1192,7 +1225,7 @@ config HAVE_S3C_RTC
1192 1225
1193config RTC_DRV_S3C 1226config RTC_DRV_S3C
1194 tristate "Samsung S3C series SoC RTC" 1227 tristate "Samsung S3C series SoC RTC"
1195 depends on ARCH_S3C64XX || HAVE_S3C_RTC 1228 depends on ARCH_S3C64XX || HAVE_S3C_RTC || COMPILE_TEST
1196 help 1229 help
1197 RTC (Realtime Clock) driver for the clock inbuilt into the 1230 RTC (Realtime Clock) driver for the clock inbuilt into the
1198 Samsung S3C24XX series of SoCs. This can provide periodic 1231 Samsung S3C24XX series of SoCs. This can provide periodic
@@ -1208,7 +1241,7 @@ config RTC_DRV_S3C
1208 1241
1209config RTC_DRV_EP93XX 1242config RTC_DRV_EP93XX
1210 tristate "Cirrus Logic EP93XX" 1243 tristate "Cirrus Logic EP93XX"
1211 depends on ARCH_EP93XX 1244 depends on ARCH_EP93XX || COMPILE_TEST
1212 help 1245 help
1213 If you say yes here you get support for the 1246 If you say yes here you get support for the
1214 RTC embedded in the Cirrus Logic EP93XX processors. 1247 RTC embedded in the Cirrus Logic EP93XX processors.
@@ -1238,7 +1271,7 @@ config RTC_DRV_SH
1238 1271
1239config RTC_DRV_VR41XX 1272config RTC_DRV_VR41XX
1240 tristate "NEC VR41XX" 1273 tristate "NEC VR41XX"
1241 depends on CPU_VR41XX 1274 depends on CPU_VR41XX || COMPILE_TEST
1242 help 1275 help
1243 If you say Y here you will get access to the real time clock 1276 If you say Y here you will get access to the real time clock
1244 built into your NEC VR41XX CPU. 1277 built into your NEC VR41XX CPU.
@@ -1268,14 +1301,14 @@ config RTC_DRV_PL031
1268 1301
1269config RTC_DRV_AT32AP700X 1302config RTC_DRV_AT32AP700X
1270 tristate "AT32AP700X series RTC" 1303 tristate "AT32AP700X series RTC"
1271 depends on PLATFORM_AT32AP 1304 depends on PLATFORM_AT32AP || COMPILE_TEST
1272 help 1305 help
1273 Driver for the internal RTC (Realtime Clock) on Atmel AVR32 1306 Driver for the internal RTC (Realtime Clock) on Atmel AVR32
1274 AT32AP700x family processors. 1307 AT32AP700x family processors.
1275 1308
1276config RTC_DRV_AT91RM9200 1309config RTC_DRV_AT91RM9200
1277 tristate "AT91RM9200 or some AT91SAM9 RTC" 1310 tristate "AT91RM9200 or some AT91SAM9 RTC"
1278 depends on ARCH_AT91 1311 depends on ARCH_AT91 || COMPILE_TEST
1279 help 1312 help
1280 Driver for the internal RTC (Realtime Clock) module found on 1313 Driver for the internal RTC (Realtime Clock) module found on
1281 Atmel AT91RM9200's and some AT91SAM9 chips. On AT91SAM9 chips 1314 Atmel AT91RM9200's and some AT91SAM9 chips. On AT91SAM9 chips
@@ -1283,7 +1316,7 @@ config RTC_DRV_AT91RM9200
1283 1316
1284config RTC_DRV_AT91SAM9 1317config RTC_DRV_AT91SAM9
1285 tristate "AT91SAM9 RTT as RTC" 1318 tristate "AT91SAM9 RTT as RTC"
1286 depends on ARCH_AT91 1319 depends on ARCH_AT91 || COMPILE_TEST
1287 select MFD_SYSCON 1320 select MFD_SYSCON
1288 help 1321 help
1289 Some AT91SAM9 SoCs provide an RTT (Real Time Timer) block which 1322 Some AT91SAM9 SoCs provide an RTT (Real Time Timer) block which
@@ -1325,17 +1358,17 @@ config RTC_DRV_GENERIC
1325 tristate "Generic RTC support" 1358 tristate "Generic RTC support"
1326 # Please consider writing a new RTC driver instead of using the generic 1359 # Please consider writing a new RTC driver instead of using the generic
1327 # RTC abstraction 1360 # RTC abstraction
1328 depends on PARISC || M68K || PPC || SUPERH32 1361 depends on PARISC || M68K || PPC || SUPERH32 || COMPILE_TEST
1329 help 1362 help
1330 Say Y or M here to enable RTC support on systems using the generic 1363 Say Y or M here to enable RTC support on systems using the generic
1331 RTC abstraction. If you do not know what you are doing, you should 1364 RTC abstraction. If you do not know what you are doing, you should
1332 just say Y. 1365 just say Y.
1333 1366
1334config RTC_DRV_PXA 1367config RTC_DRV_PXA
1335 tristate "PXA27x/PXA3xx" 1368 tristate "PXA27x/PXA3xx"
1336 depends on ARCH_PXA 1369 depends on ARCH_PXA
1337 select RTC_DRV_SA1100 1370 select RTC_DRV_SA1100
1338 help 1371 help
1339 If you say Y here you will get access to the real time clock 1372 If you say Y here you will get access to the real time clock
1340 built into your PXA27x or PXA3xx CPU. This RTC is actually 2 RTCs 1373 built into your PXA27x or PXA3xx CPU. This RTC is actually 2 RTCs
1341 consisting of an SA1100 compatible RTC and the extended PXA RTC. 1374 consisting of an SA1100 compatible RTC and the extended PXA RTC.
@@ -1345,7 +1378,7 @@ config RTC_DRV_PXA
1345 1378
1346config RTC_DRV_VT8500 1379config RTC_DRV_VT8500
1347 tristate "VIA/WonderMedia 85xx SoC RTC" 1380 tristate "VIA/WonderMedia 85xx SoC RTC"
1348 depends on ARCH_VT8500 1381 depends on ARCH_VT8500 || COMPILE_TEST
1349 help 1382 help
1350 If you say Y here you will get access to the real time clock 1383 If you say Y here you will get access to the real time clock
1351 built into your VIA VT8500 SoC or its relatives. 1384 built into your VIA VT8500 SoC or its relatives.
@@ -1360,14 +1393,15 @@ config RTC_DRV_SUN4V
1360 1393
1361config RTC_DRV_SUN6I 1394config RTC_DRV_SUN6I
1362 tristate "Allwinner A31 RTC" 1395 tristate "Allwinner A31 RTC"
1363 depends on MACH_SUN6I || MACH_SUN8I 1396 default MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
1397 depends on ARCH_SUNXI
1364 help 1398 help
1365 If you say Y here you will get support for the RTC found on 1399 If you say Y here you will get support for the RTC found in
1366 Allwinner A31. 1400 some Allwinner SoCs like the A31 or the A64.
1367 1401
1368config RTC_DRV_SUNXI 1402config RTC_DRV_SUNXI
1369 tristate "Allwinner sun4i/sun7i RTC" 1403 tristate "Allwinner sun4i/sun7i RTC"
1370 depends on MACH_SUN4I || MACH_SUN7I 1404 depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST
1371 help 1405 help
1372 If you say Y here you will get support for the RTC found on 1406 If you say Y here you will get support for the RTC found on
1373 Allwinner A10/A20. 1407 Allwinner A10/A20.
@@ -1388,7 +1422,7 @@ config RTC_DRV_TX4939
1388 1422
1389config RTC_DRV_MV 1423config RTC_DRV_MV
1390 tristate "Marvell SoC RTC" 1424 tristate "Marvell SoC RTC"
1391 depends on ARCH_DOVE || ARCH_MVEBU 1425 depends on ARCH_DOVE || ARCH_MVEBU || COMPILE_TEST
1392 help 1426 help
1393 If you say yes here you will get support for the in-chip RTC 1427 If you say yes here you will get support for the in-chip RTC
1394 that can be found in some of Marvell's SoC devices, such as 1428 that can be found in some of Marvell's SoC devices, such as
@@ -1399,7 +1433,7 @@ config RTC_DRV_MV
1399 1433
1400config RTC_DRV_ARMADA38X 1434config RTC_DRV_ARMADA38X
1401 tristate "Armada 38x Marvell SoC RTC" 1435 tristate "Armada 38x Marvell SoC RTC"
1402 depends on ARCH_MVEBU 1436 depends on ARCH_MVEBU || COMPILE_TEST
1403 help 1437 help
1404 If you say yes here you will get support for the in-chip RTC 1438 If you say yes here you will get support for the in-chip RTC
1405 that can be found in the Armada 38x Marvell's SoC device 1439 that can be found in the Armada 38x Marvell's SoC device
@@ -1429,7 +1463,7 @@ config RTC_DRV_PS3
1429 1463
1430config RTC_DRV_COH901331 1464config RTC_DRV_COH901331
1431 tristate "ST-Ericsson COH 901 331 RTC" 1465 tristate "ST-Ericsson COH 901 331 RTC"
1432 depends on ARCH_U300 1466 depends on ARCH_U300 || COMPILE_TEST
1433 help 1467 help
1434 If you say Y here you will get access to ST-Ericsson 1468 If you say Y here you will get access to ST-Ericsson
1435 COH 901 331 RTC clock found in some ST-Ericsson Mobile 1469 COH 901 331 RTC clock found in some ST-Ericsson Mobile
@@ -1441,7 +1475,7 @@ config RTC_DRV_COH901331
1441 1475
1442config RTC_DRV_STMP 1476config RTC_DRV_STMP
1443 tristate "Freescale STMP3xxx/i.MX23/i.MX28 RTC" 1477 tristate "Freescale STMP3xxx/i.MX23/i.MX28 RTC"
1444 depends on ARCH_MXS 1478 depends on ARCH_MXS || COMPILE_TEST
1445 select STMP_DEVICE 1479 select STMP_DEVICE
1446 help 1480 help
1447 If you say yes here you will get support for the onboard 1481 If you say yes here you will get support for the onboard
@@ -1476,7 +1510,7 @@ config RTC_DRV_MPC5121
1476 1510
1477config RTC_DRV_JZ4740 1511config RTC_DRV_JZ4740
1478 tristate "Ingenic JZ4740 SoC" 1512 tristate "Ingenic JZ4740 SoC"
1479 depends on MACH_JZ4740 1513 depends on MACH_JZ4740 || COMPILE_TEST
1480 help 1514 help
1481 If you say yes here you get support for the Ingenic JZ4740 SoC RTC 1515 If you say yes here you get support for the Ingenic JZ4740 SoC RTC
1482 controller. 1516 controller.
@@ -1497,7 +1531,7 @@ config RTC_DRV_LPC24XX
1497 so, the module will be called rtc-lpc24xx. 1531 so, the module will be called rtc-lpc24xx.
1498 1532
1499config RTC_DRV_LPC32XX 1533config RTC_DRV_LPC32XX
1500 depends on ARCH_LPC32XX 1534 depends on ARCH_LPC32XX || COMPILE_TEST
1501 tristate "NXP LPC32XX RTC" 1535 tristate "NXP LPC32XX RTC"
1502 help 1536 help
1503 This enables support for the NXP RTC in the LPC32XX 1537 This enables support for the NXP RTC in the LPC32XX
@@ -1507,7 +1541,7 @@ config RTC_DRV_LPC32XX
1507 1541
1508config RTC_DRV_PM8XXX 1542config RTC_DRV_PM8XXX
1509 tristate "Qualcomm PMIC8XXX RTC" 1543 tristate "Qualcomm PMIC8XXX RTC"
1510 depends on MFD_PM8XXX || MFD_SPMI_PMIC 1544 depends on MFD_PM8XXX || MFD_SPMI_PMIC || COMPILE_TEST
1511 help 1545 help
1512 If you say yes here you get support for the 1546 If you say yes here you get support for the
1513 Qualcomm PMIC8XXX RTC. 1547 Qualcomm PMIC8XXX RTC.
@@ -1517,7 +1551,7 @@ config RTC_DRV_PM8XXX
1517 1551
1518config RTC_DRV_TEGRA 1552config RTC_DRV_TEGRA
1519 tristate "NVIDIA Tegra Internal RTC driver" 1553 tristate "NVIDIA Tegra Internal RTC driver"
1520 depends on ARCH_TEGRA 1554 depends on ARCH_TEGRA || COMPILE_TEST
1521 help 1555 help
1522 If you say yes here you get support for the 1556 If you say yes here you get support for the
1523 Tegra 200 series internal RTC module. 1557 Tegra 200 series internal RTC module.
@@ -1603,7 +1637,7 @@ config RTC_DRV_MOXART
1603 1637
1604config RTC_DRV_MT6397 1638config RTC_DRV_MT6397
1605 tristate "Mediatek Real Time Clock driver" 1639 tristate "Mediatek Real Time Clock driver"
1606 depends on MFD_MT6397 || COMPILE_TEST 1640 depends on MFD_MT6397 || (COMPILE_TEST && IRQ_DOMAIN)
1607 help 1641 help
1608 This selects the Mediatek(R) RTC driver. RTC is part of Mediatek 1642 This selects the Mediatek(R) RTC driver. RTC is part of Mediatek
1609 MT6397 PMIC. You should enable MT6397 PMIC MFD before select 1643 MT6397 PMIC. You should enable MT6397 PMIC MFD before select
@@ -1622,6 +1656,16 @@ config RTC_DRV_XGENE
1622 This driver can also be built as a module, if so, the module 1656 This driver can also be built as a module, if so, the module
1623 will be called "rtc-xgene". 1657 will be called "rtc-xgene".
1624 1658
1659config RTC_DRV_PIC32
1660 tristate "Microchip PIC32 RTC"
1661 depends on MACH_PIC32
1662 default y
1663 help
1664 If you say yes here you get support for the PIC32 RTC module.
1665
1666 This driver can also be built as a module. If so, the module
1667 will be called rtc-pic32
1668
1625comment "HID Sensor RTC drivers" 1669comment "HID Sensor RTC drivers"
1626 1670
1627config RTC_DRV_HID_SENSOR_TIME 1671config RTC_DRV_HID_SENSOR_TIME
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 62d61b26ca7e..ea2833723fa9 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_RTC_DRV_ABB5ZES3) += rtc-ab-b5ze-s3.o
28obj-$(CONFIG_RTC_DRV_ABX80X) += rtc-abx80x.o 28obj-$(CONFIG_RTC_DRV_ABX80X) += rtc-abx80x.o
29obj-$(CONFIG_RTC_DRV_ARMADA38X) += rtc-armada38x.o 29obj-$(CONFIG_RTC_DRV_ARMADA38X) += rtc-armada38x.o
30obj-$(CONFIG_RTC_DRV_AS3722) += rtc-as3722.o 30obj-$(CONFIG_RTC_DRV_AS3722) += rtc-as3722.o
31obj-$(CONFIG_RTC_DRV_ASM9260) += rtc-asm9260.o
31obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o 32obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o
32obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o 33obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o
33obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o 34obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o
@@ -59,7 +60,6 @@ obj-$(CONFIG_RTC_DRV_DS1685_FAMILY) += rtc-ds1685.o
59obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o 60obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o
60obj-$(CONFIG_RTC_DRV_DS2404) += rtc-ds2404.o 61obj-$(CONFIG_RTC_DRV_DS2404) += rtc-ds2404.o
61obj-$(CONFIG_RTC_DRV_DS3232) += rtc-ds3232.o 62obj-$(CONFIG_RTC_DRV_DS3232) += rtc-ds3232.o
62obj-$(CONFIG_RTC_DRV_DS3234) += rtc-ds3234.o
63obj-$(CONFIG_RTC_DRV_EFI) += rtc-efi.o 63obj-$(CONFIG_RTC_DRV_EFI) += rtc-efi.o
64obj-$(CONFIG_RTC_DRV_EM3027) += rtc-em3027.o 64obj-$(CONFIG_RTC_DRV_EM3027) += rtc-em3027.o
65obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o 65obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o
@@ -86,7 +86,6 @@ obj-$(CONFIG_RTC_DRV_M48T86) += rtc-m48t86.o
86obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o 86obj-$(CONFIG_RTC_DRV_MAX6900) += rtc-max6900.o
87obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o 87obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
88obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o 88obj-$(CONFIG_RTC_DRV_MAX77686) += rtc-max77686.o
89obj-$(CONFIG_RTC_DRV_MAX77802) += rtc-max77802.o
90obj-$(CONFIG_RTC_DRV_MAX8907) += rtc-max8907.o 89obj-$(CONFIG_RTC_DRV_MAX8907) += rtc-max8907.o
91obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o 90obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o
92obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o 91obj-$(CONFIG_RTC_DRV_MAX8997) += rtc-max8997.o
@@ -112,6 +111,7 @@ obj-$(CONFIG_RTC_DRV_PCF85063) += rtc-pcf85063.o
112obj-$(CONFIG_RTC_DRV_PCF8523) += rtc-pcf8523.o 111obj-$(CONFIG_RTC_DRV_PCF8523) += rtc-pcf8523.o
113obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o 112obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
114obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o 113obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o
114obj-$(CONFIG_RTC_DRV_PIC32) += rtc-pic32.o
115obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o 115obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o
116obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o 116obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o
117obj-$(CONFIG_RTC_DRV_PM8XXX) += rtc-pm8xxx.o 117obj-$(CONFIG_RTC_DRV_PM8XXX) += rtc-pm8xxx.o
@@ -128,6 +128,7 @@ obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o
128obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o 128obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o
129obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o 129obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o
130obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o 130obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o
131obj-$(CONFIG_RTC_DRV_RX6110) += rtc-rx6110.o
131obj-$(CONFIG_RTC_DRV_RX8010) += rtc-rx8010.o 132obj-$(CONFIG_RTC_DRV_RX8010) += rtc-rx8010.o
132obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o 133obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o
133obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o 134obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o
diff --git a/drivers/rtc/class.c b/drivers/rtc/class.c
index de86578bcd6d..74fd9746aeca 100644
--- a/drivers/rtc/class.c
+++ b/drivers/rtc/class.c
@@ -361,17 +361,4 @@ static int __init rtc_init(void)
361 rtc_dev_init(); 361 rtc_dev_init();
362 return 0; 362 return 0;
363} 363}
364
365static void __exit rtc_exit(void)
366{
367 rtc_dev_exit();
368 class_destroy(rtc_class);
369 ida_destroy(&rtc_ida);
370}
371
372subsys_initcall(rtc_init); 364subsys_initcall(rtc_init);
373module_exit(rtc_exit);
374
375MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
376MODULE_DESCRIPTION("RTC class support");
377MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index 5836751b8203..9ef5f6f89f98 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -939,4 +939,58 @@ void rtc_timer_cancel(struct rtc_device *rtc, struct rtc_timer *timer)
939 mutex_unlock(&rtc->ops_lock); 939 mutex_unlock(&rtc->ops_lock);
940} 940}
941 941
942/**
943 * rtc_read_offset - Read the amount of rtc offset in parts per billion
944 * @ rtc: rtc device to be used
945 * @ offset: the offset in parts per billion
946 *
947 * see below for details.
948 *
949 * Kernel interface to read rtc clock offset
950 * Returns 0 on success, or a negative number on error.
951 * If read_offset() is not implemented for the rtc, return -EINVAL
952 */
953int rtc_read_offset(struct rtc_device *rtc, long *offset)
954{
955 int ret;
956
957 if (!rtc->ops)
958 return -ENODEV;
959
960 if (!rtc->ops->read_offset)
961 return -EINVAL;
962
963 mutex_lock(&rtc->ops_lock);
964 ret = rtc->ops->read_offset(rtc->dev.parent, offset);
965 mutex_unlock(&rtc->ops_lock);
966 return ret;
967}
942 968
969/**
970 * rtc_set_offset - Adjusts the duration of the average second
971 * @ rtc: rtc device to be used
972 * @ offset: the offset in parts per billion
973 *
974 * Some rtc's allow an adjustment to the average duration of a second
975 * to compensate for differences in the actual clock rate due to temperature,
976 * the crystal, capacitor, etc.
977 *
978 * Kernel interface to adjust an rtc clock offset.
979 * Return 0 on success, or a negative number on error.
980 * If the rtc offset is not setable (or not implemented), return -EINVAL
981 */
982int rtc_set_offset(struct rtc_device *rtc, long offset)
983{
984 int ret;
985
986 if (!rtc->ops)
987 return -ENODEV;
988
989 if (!rtc->ops->set_offset)
990 return -EINVAL;
991
992 mutex_lock(&rtc->ops_lock);
993 ret = rtc->ops->set_offset(rtc->dev.parent, offset);
994 mutex_unlock(&rtc->ops_lock);
995 return ret;
996}
diff --git a/drivers/rtc/rtc-as3722.c b/drivers/rtc/rtc-as3722.c
index 56cc5821118b..6ef0c887e6ca 100644
--- a/drivers/rtc/rtc-as3722.c
+++ b/drivers/rtc/rtc-as3722.c
@@ -210,7 +210,7 @@ static int as3722_rtc_probe(struct platform_device *pdev)
210 dev_info(&pdev->dev, "RTC interrupt %d\n", as3722_rtc->alarm_irq); 210 dev_info(&pdev->dev, "RTC interrupt %d\n", as3722_rtc->alarm_irq);
211 211
212 ret = devm_request_threaded_irq(&pdev->dev, as3722_rtc->alarm_irq, NULL, 212 ret = devm_request_threaded_irq(&pdev->dev, as3722_rtc->alarm_irq, NULL,
213 as3722_alarm_irq, IRQF_ONESHOT | IRQF_EARLY_RESUME, 213 as3722_alarm_irq, IRQF_ONESHOT,
214 "rtc-alarm", as3722_rtc); 214 "rtc-alarm", as3722_rtc);
215 if (ret < 0) { 215 if (ret < 0) {
216 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n", 216 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
diff --git a/drivers/rtc/rtc-asm9260.c b/drivers/rtc/rtc-asm9260.c
new file mode 100644
index 000000000000..14e08c4c1a01
--- /dev/null
+++ b/drivers/rtc/rtc-asm9260.c
@@ -0,0 +1,355 @@
1/*
2 * Copyright (C) 2016 Oleksij Rempel <linux@rempel-privat.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License,
7 * or (at your option) any later version.
8 */
9
10#include <linux/clk.h>
11#include <linux/interrupt.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/of.h>
15#include <linux/platform_device.h>
16#include <linux/rtc.h>
17
18/* Miscellaneous registers */
19/* Interrupt Location Register */
20#define HW_ILR 0x00
21#define BM_RTCALF BIT(1)
22#define BM_RTCCIF BIT(0)
23
24/* Clock Control Register */
25#define HW_CCR 0x08
26/* Calibration counter disable */
27#define BM_CCALOFF BIT(4)
28/* Reset internal oscillator divider */
29#define BM_CTCRST BIT(1)
30/* Clock Enable */
31#define BM_CLKEN BIT(0)
32
33/* Counter Increment Interrupt Register */
34#define HW_CIIR 0x0C
35#define BM_CIIR_IMYEAR BIT(7)
36#define BM_CIIR_IMMON BIT(6)
37#define BM_CIIR_IMDOY BIT(5)
38#define BM_CIIR_IMDOW BIT(4)
39#define BM_CIIR_IMDOM BIT(3)
40#define BM_CIIR_IMHOUR BIT(2)
41#define BM_CIIR_IMMIN BIT(1)
42#define BM_CIIR_IMSEC BIT(0)
43
44/* Alarm Mask Register */
45#define HW_AMR 0x10
46#define BM_AMR_IMYEAR BIT(7)
47#define BM_AMR_IMMON BIT(6)
48#define BM_AMR_IMDOY BIT(5)
49#define BM_AMR_IMDOW BIT(4)
50#define BM_AMR_IMDOM BIT(3)
51#define BM_AMR_IMHOUR BIT(2)
52#define BM_AMR_IMMIN BIT(1)
53#define BM_AMR_IMSEC BIT(0)
54#define BM_AMR_OFF 0xff
55
56/* Consolidated time registers */
57#define HW_CTIME0 0x14
58#define BM_CTIME0_DOW_S 24
59#define BM_CTIME0_DOW_M 0x7
60#define BM_CTIME0_HOUR_S 16
61#define BM_CTIME0_HOUR_M 0x1f
62#define BM_CTIME0_MIN_S 8
63#define BM_CTIME0_MIN_M 0x3f
64#define BM_CTIME0_SEC_S 0
65#define BM_CTIME0_SEC_M 0x3f
66
67#define HW_CTIME1 0x18
68#define BM_CTIME1_YEAR_S 16
69#define BM_CTIME1_YEAR_M 0xfff
70#define BM_CTIME1_MON_S 8
71#define BM_CTIME1_MON_M 0xf
72#define BM_CTIME1_DOM_S 0
73#define BM_CTIME1_DOM_M 0x1f
74
75#define HW_CTIME2 0x1C
76#define BM_CTIME2_DOY_S 0
77#define BM_CTIME2_DOY_M 0xfff
78
79/* Time counter registers */
80#define HW_SEC 0x20
81#define HW_MIN 0x24
82#define HW_HOUR 0x28
83#define HW_DOM 0x2C
84#define HW_DOW 0x30
85#define HW_DOY 0x34
86#define HW_MONTH 0x38
87#define HW_YEAR 0x3C
88
89#define HW_CALIBRATION 0x40
90#define BM_CALDIR_BACK BIT(17)
91#define BM_CALVAL_M 0x1ffff
92
93/* General purpose registers */
94#define HW_GPREG0 0x44
95#define HW_GPREG1 0x48
96#define HW_GPREG2 0x4C
97#define HW_GPREG3 0x50
98#define HW_GPREG4 0x54
99
100/* Alarm register group */
101#define HW_ALSEC 0x60
102#define HW_ALMIN 0x64
103#define HW_ALHOUR 0x68
104#define HW_ALDOM 0x6C
105#define HW_ALDOW 0x70
106#define HW_ALDOY 0x74
107#define HW_ALMON 0x78
108#define HW_ALYEAR 0x7C
109
110struct asm9260_rtc_priv {
111 struct device *dev;
112 void __iomem *iobase;
113 struct rtc_device *rtc;
114 struct clk *clk;
115 /* io lock */
116 spinlock_t lock;
117};
118
119static irqreturn_t asm9260_rtc_irq(int irq, void *dev_id)
120{
121 struct asm9260_rtc_priv *priv = dev_id;
122 u32 isr;
123 unsigned long events = 0;
124
125 isr = ioread32(priv->iobase + HW_CIIR);
126 if (!isr)
127 return IRQ_NONE;
128
129 iowrite32(0, priv->iobase + HW_CIIR);
130
131 events |= RTC_AF | RTC_IRQF;
132
133 rtc_update_irq(priv->rtc, 1, events);
134
135 return IRQ_HANDLED;
136}
137
138static int asm9260_rtc_read_time(struct device *dev, struct rtc_time *tm)
139{
140 struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
141 u32 ctime0, ctime1, ctime2;
142 unsigned long irq_flags;
143
144 spin_lock_irqsave(&priv->lock, irq_flags);
145 ctime0 = ioread32(priv->iobase + HW_CTIME0);
146 ctime1 = ioread32(priv->iobase + HW_CTIME1);
147 ctime2 = ioread32(priv->iobase + HW_CTIME2);
148
149 if (ctime1 != ioread32(priv->iobase + HW_CTIME1)) {
150 /*
151 * woops, counter flipped right now. Now we are safe
152 * to reread.
153 */
154 ctime0 = ioread32(priv->iobase + HW_CTIME0);
155 ctime1 = ioread32(priv->iobase + HW_CTIME1);
156 ctime2 = ioread32(priv->iobase + HW_CTIME2);
157 }
158 spin_unlock_irqrestore(&priv->lock, irq_flags);
159
160 tm->tm_sec = (ctime0 >> BM_CTIME0_SEC_S) & BM_CTIME0_SEC_M;
161 tm->tm_min = (ctime0 >> BM_CTIME0_MIN_S) & BM_CTIME0_MIN_M;
162 tm->tm_hour = (ctime0 >> BM_CTIME0_HOUR_S) & BM_CTIME0_HOUR_M;
163 tm->tm_wday = (ctime0 >> BM_CTIME0_DOW_S) & BM_CTIME0_DOW_M;
164
165 tm->tm_mday = (ctime1 >> BM_CTIME1_DOM_S) & BM_CTIME1_DOM_M;
166 tm->tm_mon = (ctime1 >> BM_CTIME1_MON_S) & BM_CTIME1_MON_M;
167 tm->tm_year = (ctime1 >> BM_CTIME1_YEAR_S) & BM_CTIME1_YEAR_M;
168
169 tm->tm_yday = (ctime2 >> BM_CTIME2_DOY_S) & BM_CTIME2_DOY_M;
170
171 return 0;
172}
173
174static int asm9260_rtc_set_time(struct device *dev, struct rtc_time *tm)
175{
176 struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
177 unsigned long irq_flags;
178
179 spin_lock_irqsave(&priv->lock, irq_flags);
180 /*
181 * make sure SEC counter will not flip other counter on write time,
182 * real value will be written at the enf of sequence.
183 */
184 iowrite32(0, priv->iobase + HW_SEC);
185
186 iowrite32(tm->tm_year, priv->iobase + HW_YEAR);
187 iowrite32(tm->tm_mon, priv->iobase + HW_MONTH);
188 iowrite32(tm->tm_mday, priv->iobase + HW_DOM);
189 iowrite32(tm->tm_wday, priv->iobase + HW_DOW);
190 iowrite32(tm->tm_yday, priv->iobase + HW_DOY);
191 iowrite32(tm->tm_hour, priv->iobase + HW_HOUR);
192 iowrite32(tm->tm_min, priv->iobase + HW_MIN);
193 iowrite32(tm->tm_sec, priv->iobase + HW_SEC);
194 spin_unlock_irqrestore(&priv->lock, irq_flags);
195
196 return 0;
197}
198
199static int asm9260_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
200{
201 struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
202 unsigned long irq_flags;
203
204 spin_lock_irqsave(&priv->lock, irq_flags);
205 alrm->time.tm_year = ioread32(priv->iobase + HW_ALYEAR);
206 alrm->time.tm_mon = ioread32(priv->iobase + HW_ALMON);
207 alrm->time.tm_mday = ioread32(priv->iobase + HW_ALDOM);
208 alrm->time.tm_wday = ioread32(priv->iobase + HW_ALDOW);
209 alrm->time.tm_yday = ioread32(priv->iobase + HW_ALDOY);
210 alrm->time.tm_hour = ioread32(priv->iobase + HW_ALHOUR);
211 alrm->time.tm_min = ioread32(priv->iobase + HW_ALMIN);
212 alrm->time.tm_sec = ioread32(priv->iobase + HW_ALSEC);
213
214 alrm->enabled = ioread32(priv->iobase + HW_AMR) ? 1 : 0;
215 alrm->pending = ioread32(priv->iobase + HW_CIIR) ? 1 : 0;
216 spin_unlock_irqrestore(&priv->lock, irq_flags);
217
218 return rtc_valid_tm(&alrm->time);
219}
220
221static int asm9260_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
222{
223 struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
224 unsigned long irq_flags;
225
226 spin_lock_irqsave(&priv->lock, irq_flags);
227 iowrite32(alrm->time.tm_year, priv->iobase + HW_ALYEAR);
228 iowrite32(alrm->time.tm_mon, priv->iobase + HW_ALMON);
229 iowrite32(alrm->time.tm_mday, priv->iobase + HW_ALDOM);
230 iowrite32(alrm->time.tm_wday, priv->iobase + HW_ALDOW);
231 iowrite32(alrm->time.tm_yday, priv->iobase + HW_ALDOY);
232 iowrite32(alrm->time.tm_hour, priv->iobase + HW_ALHOUR);
233 iowrite32(alrm->time.tm_min, priv->iobase + HW_ALMIN);
234 iowrite32(alrm->time.tm_sec, priv->iobase + HW_ALSEC);
235
236 iowrite32(alrm->enabled ? 0 : BM_AMR_OFF, priv->iobase + HW_AMR);
237 spin_unlock_irqrestore(&priv->lock, irq_flags);
238
239 return 0;
240}
241
242static int asm9260_alarm_irq_enable(struct device *dev, unsigned int enabled)
243{
244 struct asm9260_rtc_priv *priv = dev_get_drvdata(dev);
245
246 iowrite32(enabled ? 0 : BM_AMR_OFF, priv->iobase + HW_AMR);
247 return 0;
248}
249
250static const struct rtc_class_ops asm9260_rtc_ops = {
251 .read_time = asm9260_rtc_read_time,
252 .set_time = asm9260_rtc_set_time,
253 .read_alarm = asm9260_rtc_read_alarm,
254 .set_alarm = asm9260_rtc_set_alarm,
255 .alarm_irq_enable = asm9260_alarm_irq_enable,
256};
257
258static int __init asm9260_rtc_probe(struct platform_device *pdev)
259{
260 struct asm9260_rtc_priv *priv;
261 struct device *dev = &pdev->dev;
262 struct resource *res;
263 int irq_alarm, ret;
264 u32 ccr;
265
266 priv = devm_kzalloc(dev, sizeof(struct asm9260_rtc_priv), GFP_KERNEL);
267 if (!priv)
268 return -ENOMEM;
269
270 priv->dev = &pdev->dev;
271 platform_set_drvdata(pdev, priv);
272
273 irq_alarm = platform_get_irq(pdev, 0);
274 if (irq_alarm < 0) {
275 dev_err(dev, "No alarm IRQ resource defined\n");
276 return irq_alarm;
277 }
278
279 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
280 priv->iobase = devm_ioremap_resource(dev, res);
281 if (IS_ERR(priv->iobase))
282 return PTR_ERR(priv->iobase);
283
284 priv->clk = devm_clk_get(dev, "ahb");
285 ret = clk_prepare_enable(priv->clk);
286 if (ret) {
287 dev_err(dev, "Failed to enable clk!\n");
288 return ret;
289 }
290
291 ccr = ioread32(priv->iobase + HW_CCR);
292 /* if dev is not enabled, reset it */
293 if ((ccr & (BM_CLKEN | BM_CTCRST)) != BM_CLKEN) {
294 iowrite32(BM_CTCRST, priv->iobase + HW_CCR);
295 ccr = 0;
296 }
297
298 iowrite32(BM_CLKEN | ccr, priv->iobase + HW_CCR);
299 iowrite32(0, priv->iobase + HW_CIIR);
300 iowrite32(BM_AMR_OFF, priv->iobase + HW_AMR);
301
302 priv->rtc = devm_rtc_device_register(dev, dev_name(dev),
303 &asm9260_rtc_ops, THIS_MODULE);
304 if (IS_ERR(priv->rtc)) {
305 ret = PTR_ERR(priv->rtc);
306 dev_err(dev, "Failed to register RTC device: %d\n", ret);
307 goto err_return;
308 }
309
310 ret = devm_request_threaded_irq(dev, irq_alarm, NULL,
311 asm9260_rtc_irq, IRQF_ONESHOT,
312 dev_name(dev), priv);
313 if (ret < 0) {
314 dev_err(dev, "can't get irq %i, err %d\n",
315 irq_alarm, ret);
316 goto err_return;
317 }
318
319 return 0;
320
321err_return:
322 clk_disable_unprepare(priv->clk);
323 return ret;
324}
325
326static int __exit asm9260_rtc_remove(struct platform_device *pdev)
327{
328 struct asm9260_rtc_priv *priv = platform_get_drvdata(pdev);
329
330 /* Disable alarm matching */
331 iowrite32(BM_AMR_OFF, priv->iobase + HW_AMR);
332 clk_disable_unprepare(priv->clk);
333 return 0;
334}
335
336static const struct of_device_id asm9260_dt_ids[] = {
337 { .compatible = "alphascale,asm9260-rtc", },
338 {}
339};
340
341static struct platform_driver asm9260_rtc_driver = {
342 .probe = asm9260_rtc_probe,
343 .remove = asm9260_rtc_remove,
344 .driver = {
345 .name = "asm9260-rtc",
346 .owner = THIS_MODULE,
347 .of_match_table = asm9260_dt_ids,
348 },
349};
350
351module_platform_driver(asm9260_rtc_driver);
352
353MODULE_AUTHOR("Oleksij Rempel <linux@rempel-privat.de>");
354MODULE_DESCRIPTION("Alphascale asm9260 SoC Realtime Clock Driver (RTC)");
355MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c
index f39691eea736..8e41c4613e51 100644
--- a/drivers/rtc/rtc-ds1305.c
+++ b/drivers/rtc/rtc-ds1305.c
@@ -532,7 +532,7 @@ ds1305_nvram_read(struct file *filp, struct kobject *kobj,
532 struct spi_transfer x[2]; 532 struct spi_transfer x[2];
533 int status; 533 int status;
534 534
535 spi = container_of(kobj, struct spi_device, dev.kobj); 535 spi = to_spi_device(kobj_to_dev(kobj));
536 536
537 addr = DS1305_NVRAM + off; 537 addr = DS1305_NVRAM + off;
538 msg_init(&m, x, &addr, count, NULL, buf); 538 msg_init(&m, x, &addr, count, NULL, buf);
@@ -554,7 +554,7 @@ ds1305_nvram_write(struct file *filp, struct kobject *kobj,
554 struct spi_transfer x[2]; 554 struct spi_transfer x[2];
555 int status; 555 int status;
556 556
557 spi = container_of(kobj, struct spi_device, dev.kobj); 557 spi = to_spi_device(kobj_to_dev(kobj));
558 558
559 addr = (DS1305_WRITE | DS1305_NVRAM) + off; 559 addr = (DS1305_WRITE | DS1305_NVRAM) + off;
560 msg_init(&m, x, &addr, count, buf, NULL); 560 msg_init(&m, x, &addr, count, buf, NULL);
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index cf685f67b391..b2156ee5bae1 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -19,6 +19,9 @@
19#include <linux/rtc.h> 19#include <linux/rtc.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/hwmon.h>
23#include <linux/hwmon-sysfs.h>
24#include <linux/clk-provider.h>
22 25
23/* 26/*
24 * We can't determine type by probing, but if we expect pre-Linux code 27 * We can't determine type by probing, but if we expect pre-Linux code
@@ -89,6 +92,7 @@ enum ds_type {
89# define DS1340_BIT_OSF 0x80 92# define DS1340_BIT_OSF 0x80
90#define DS1337_REG_STATUS 0x0f 93#define DS1337_REG_STATUS 0x0f
91# define DS1337_BIT_OSF 0x80 94# define DS1337_BIT_OSF 0x80
95# define DS3231_BIT_EN32KHZ 0x08
92# define DS1337_BIT_A2I 0x02 96# define DS1337_BIT_A2I 0x02
93# define DS1337_BIT_A1I 0x01 97# define DS1337_BIT_A1I 0x01
94#define DS1339_REG_ALARM1_SECS 0x07 98#define DS1339_REG_ALARM1_SECS 0x07
@@ -118,6 +122,9 @@ struct ds1307 {
118 u8 length, u8 *values); 122 u8 length, u8 *values);
119 s32 (*write_block_data)(const struct i2c_client *client, u8 command, 123 s32 (*write_block_data)(const struct i2c_client *client, u8 command,
120 u8 length, const u8 *values); 124 u8 length, const u8 *values);
125#ifdef CONFIG_COMMON_CLK
126 struct clk_hw clks[2];
127#endif
121}; 128};
122 129
123struct chip_desc { 130struct chip_desc {
@@ -842,6 +849,378 @@ out:
842 return; 849 return;
843} 850}
844 851
852/*----------------------------------------------------------------------*/
853
854#ifdef CONFIG_RTC_DRV_DS1307_HWMON
855
856/*
857 * Temperature sensor support for ds3231 devices.
858 */
859
860#define DS3231_REG_TEMPERATURE 0x11
861
862/*
863 * A user-initiated temperature conversion is not started by this function,
864 * so the temperature is updated once every 64 seconds.
865 */
866static int ds3231_hwmon_read_temp(struct device *dev, s16 *mC)
867{
868 struct ds1307 *ds1307 = dev_get_drvdata(dev);
869 u8 temp_buf[2];
870 s16 temp;
871 int ret;
872
873 ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
874 sizeof(temp_buf), temp_buf);
875 if (ret < 0)
876 return ret;
877 if (ret != sizeof(temp_buf))
878 return -EIO;
879
880 /*
881 * Temperature is represented as a 10-bit code with a resolution of
882 * 0.25 degree celsius and encoded in two's complement format.
883 */
884 temp = (temp_buf[0] << 8) | temp_buf[1];
885 temp >>= 6;
886 *mC = temp * 250;
887
888 return 0;
889}
890
891static ssize_t ds3231_hwmon_show_temp(struct device *dev,
892 struct device_attribute *attr, char *buf)
893{
894 int ret;
895 s16 temp;
896
897 ret = ds3231_hwmon_read_temp(dev, &temp);
898 if (ret)
899 return ret;
900
901 return sprintf(buf, "%d\n", temp);
902}
903static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
904 NULL, 0);
905
906static struct attribute *ds3231_hwmon_attrs[] = {
907 &sensor_dev_attr_temp1_input.dev_attr.attr,
908 NULL,
909};
910ATTRIBUTE_GROUPS(ds3231_hwmon);
911
912static void ds1307_hwmon_register(struct ds1307 *ds1307)
913{
914 struct device *dev;
915
916 if (ds1307->type != ds_3231)
917 return;
918
919 dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
920 ds1307->client->name,
921 ds1307, ds3231_hwmon_groups);
922 if (IS_ERR(dev)) {
923 dev_warn(&ds1307->client->dev,
924 "unable to register hwmon device %ld\n", PTR_ERR(dev));
925 }
926}
927
928#else
929
930static void ds1307_hwmon_register(struct ds1307 *ds1307)
931{
932}
933
934#endif /* CONFIG_RTC_DRV_DS1307_HWMON */
935
936/*----------------------------------------------------------------------*/
937
938/*
939 * Square-wave output support for DS3231
940 * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
941 */
942#ifdef CONFIG_COMMON_CLK
943
944enum {
945 DS3231_CLK_SQW = 0,
946 DS3231_CLK_32KHZ,
947};
948
949#define clk_sqw_to_ds1307(clk) \
950 container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
951#define clk_32khz_to_ds1307(clk) \
952 container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
953
954static int ds3231_clk_sqw_rates[] = {
955 1,
956 1024,
957 4096,
958 8192,
959};
960
961static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
962{
963 struct i2c_client *client = ds1307->client;
964 struct mutex *lock = &ds1307->rtc->ops_lock;
965 int control;
966 int ret;
967
968 mutex_lock(lock);
969
970 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
971 if (control < 0) {
972 ret = control;
973 goto out;
974 }
975
976 control &= ~mask;
977 control |= value;
978
979 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
980out:
981 mutex_unlock(lock);
982
983 return ret;
984}
985
986static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
987 unsigned long parent_rate)
988{
989 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
990 int control;
991 int rate_sel = 0;
992
993 control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
994 if (control < 0)
995 return control;
996 if (control & DS1337_BIT_RS1)
997 rate_sel += 1;
998 if (control & DS1337_BIT_RS2)
999 rate_sel += 2;
1000
1001 return ds3231_clk_sqw_rates[rate_sel];
1002}
1003
1004static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1005 unsigned long *prate)
1006{
1007 int i;
1008
1009 for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1010 if (ds3231_clk_sqw_rates[i] <= rate)
1011 return ds3231_clk_sqw_rates[i];
1012 }
1013
1014 return 0;
1015}
1016
1017static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1018 unsigned long parent_rate)
1019{
1020 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1021 int control = 0;
1022 int rate_sel;
1023
1024 for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1025 rate_sel++) {
1026 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1027 break;
1028 }
1029
1030 if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1031 return -EINVAL;
1032
1033 if (rate_sel & 1)
1034 control |= DS1337_BIT_RS1;
1035 if (rate_sel & 2)
1036 control |= DS1337_BIT_RS2;
1037
1038 return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1039 control);
1040}
1041
1042static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1043{
1044 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1045
1046 return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1047}
1048
1049static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1050{
1051 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1052
1053 ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1054}
1055
1056static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1057{
1058 struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1059 int control;
1060
1061 control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1062 if (control < 0)
1063 return control;
1064
1065 return !(control & DS1337_BIT_INTCN);
1066}
1067
1068static const struct clk_ops ds3231_clk_sqw_ops = {
1069 .prepare = ds3231_clk_sqw_prepare,
1070 .unprepare = ds3231_clk_sqw_unprepare,
1071 .is_prepared = ds3231_clk_sqw_is_prepared,
1072 .recalc_rate = ds3231_clk_sqw_recalc_rate,
1073 .round_rate = ds3231_clk_sqw_round_rate,
1074 .set_rate = ds3231_clk_sqw_set_rate,
1075};
1076
1077static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1078 unsigned long parent_rate)
1079{
1080 return 32768;
1081}
1082
1083static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1084{
1085 struct i2c_client *client = ds1307->client;
1086 struct mutex *lock = &ds1307->rtc->ops_lock;
1087 int status;
1088 int ret;
1089
1090 mutex_lock(lock);
1091
1092 status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1093 if (status < 0) {
1094 ret = status;
1095 goto out;
1096 }
1097
1098 if (enable)
1099 status |= DS3231_BIT_EN32KHZ;
1100 else
1101 status &= ~DS3231_BIT_EN32KHZ;
1102
1103 ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1104out:
1105 mutex_unlock(lock);
1106
1107 return ret;
1108}
1109
1110static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1111{
1112 struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1113
1114 return ds3231_clk_32khz_control(ds1307, true);
1115}
1116
1117static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1118{
1119 struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1120
1121 ds3231_clk_32khz_control(ds1307, false);
1122}
1123
1124static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1125{
1126 struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1127 int status;
1128
1129 status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1130 if (status < 0)
1131 return status;
1132
1133 return !!(status & DS3231_BIT_EN32KHZ);
1134}
1135
1136static const struct clk_ops ds3231_clk_32khz_ops = {
1137 .prepare = ds3231_clk_32khz_prepare,
1138 .unprepare = ds3231_clk_32khz_unprepare,
1139 .is_prepared = ds3231_clk_32khz_is_prepared,
1140 .recalc_rate = ds3231_clk_32khz_recalc_rate,
1141};
1142
1143static struct clk_init_data ds3231_clks_init[] = {
1144 [DS3231_CLK_SQW] = {
1145 .name = "ds3231_clk_sqw",
1146 .ops = &ds3231_clk_sqw_ops,
1147 .flags = CLK_IS_ROOT,
1148 },
1149 [DS3231_CLK_32KHZ] = {
1150 .name = "ds3231_clk_32khz",
1151 .ops = &ds3231_clk_32khz_ops,
1152 .flags = CLK_IS_ROOT,
1153 },
1154};
1155
1156static int ds3231_clks_register(struct ds1307 *ds1307)
1157{
1158 struct i2c_client *client = ds1307->client;
1159 struct device_node *node = client->dev.of_node;
1160 struct clk_onecell_data *onecell;
1161 int i;
1162
1163 onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1164 if (!onecell)
1165 return -ENOMEM;
1166
1167 onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1168 onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1169 sizeof(onecell->clks[0]), GFP_KERNEL);
1170 if (!onecell->clks)
1171 return -ENOMEM;
1172
1173 for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1174 struct clk_init_data init = ds3231_clks_init[i];
1175
1176 /*
1177 * Interrupt signal due to alarm conditions and square-wave
1178 * output share same pin, so don't initialize both.
1179 */
1180 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1181 continue;
1182
1183 /* optional override of the clockname */
1184 of_property_read_string_index(node, "clock-output-names", i,
1185 &init.name);
1186 ds1307->clks[i].init = &init;
1187
1188 onecell->clks[i] = devm_clk_register(&client->dev,
1189 &ds1307->clks[i]);
1190 if (IS_ERR(onecell->clks[i]))
1191 return PTR_ERR(onecell->clks[i]);
1192 }
1193
1194 if (!node)
1195 return 0;
1196
1197 of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1198
1199 return 0;
1200}
1201
1202static void ds1307_clks_register(struct ds1307 *ds1307)
1203{
1204 int ret;
1205
1206 if (ds1307->type != ds_3231)
1207 return;
1208
1209 ret = ds3231_clks_register(ds1307);
1210 if (ret) {
1211 dev_warn(&ds1307->client->dev,
1212 "unable to register clock device %d\n", ret);
1213 }
1214}
1215
1216#else
1217
1218static void ds1307_clks_register(struct ds1307 *ds1307)
1219{
1220}
1221
1222#endif /* CONFIG_COMMON_CLK */
1223
845static int ds1307_probe(struct i2c_client *client, 1224static int ds1307_probe(struct i2c_client *client,
846 const struct i2c_device_id *id) 1225 const struct i2c_device_id *id)
847{ 1226{
@@ -851,6 +1230,7 @@ static int ds1307_probe(struct i2c_client *client,
851 struct chip_desc *chip = &chips[id->driver_data]; 1230 struct chip_desc *chip = &chips[id->driver_data];
852 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 1231 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
853 bool want_irq = false; 1232 bool want_irq = false;
1233 bool ds1307_can_wakeup_device = false;
854 unsigned char *buf; 1234 unsigned char *buf;
855 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev); 1235 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
856 irq_handler_t irq_handler = ds1307_irq; 1236 irq_handler_t irq_handler = ds1307_irq;
@@ -898,6 +1278,20 @@ static int ds1307_probe(struct i2c_client *client,
898 ds1307->write_block_data = ds1307_write_block_data; 1278 ds1307->write_block_data = ds1307_write_block_data;
899 } 1279 }
900 1280
1281#ifdef CONFIG_OF
1282/*
1283 * For devices with no IRQ directly connected to the SoC, the RTC chip
1284 * can be forced as a wakeup source by stating that explicitly in
1285 * the device's .dts file using the "wakeup-source" boolean property.
1286 * If the "wakeup-source" property is set, don't request an IRQ.
1287 * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1288 * if supported by the RTC.
1289 */
1290 if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1291 ds1307_can_wakeup_device = true;
1292 }
1293#endif
1294
901 switch (ds1307->type) { 1295 switch (ds1307->type) {
902 case ds_1337: 1296 case ds_1337:
903 case ds_1339: 1297 case ds_1339:
@@ -916,11 +1310,13 @@ static int ds1307_probe(struct i2c_client *client,
916 ds1307->regs[0] &= ~DS1337_BIT_nEOSC; 1310 ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
917 1311
918 /* 1312 /*
919 * Using IRQ? Disable the square wave and both alarms. 1313 * Using IRQ or defined as wakeup-source?
1314 * Disable the square wave and both alarms.
920 * For some variants, be sure alarms can trigger when we're 1315 * For some variants, be sure alarms can trigger when we're
921 * running on Vbackup (BBSQI/BBSQW) 1316 * running on Vbackup (BBSQI/BBSQW)
922 */ 1317 */
923 if (ds1307->client->irq > 0 && chip->alarm) { 1318 if (chip->alarm && (ds1307->client->irq > 0 ||
1319 ds1307_can_wakeup_device)) {
924 ds1307->regs[0] |= DS1337_BIT_INTCN 1320 ds1307->regs[0] |= DS1337_BIT_INTCN
925 | bbsqi_bitpos[ds1307->type]; 1321 | bbsqi_bitpos[ds1307->type];
926 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); 1322 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
@@ -1135,6 +1531,14 @@ read_rtc:
1135 return PTR_ERR(ds1307->rtc); 1531 return PTR_ERR(ds1307->rtc);
1136 } 1532 }
1137 1533
1534 if (ds1307_can_wakeup_device) {
1535 /* Disable request for an IRQ */
1536 want_irq = false;
1537 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1538 /* We cannot support UIE mode if we do not have an IRQ line */
1539 ds1307->rtc->uie_unsupported = 1;
1540 }
1541
1138 if (want_irq) { 1542 if (want_irq) {
1139 err = devm_request_threaded_irq(&client->dev, 1543 err = devm_request_threaded_irq(&client->dev,
1140 client->irq, NULL, irq_handler, 1544 client->irq, NULL, irq_handler,
@@ -1182,6 +1586,9 @@ read_rtc:
1182 } 1586 }
1183 } 1587 }
1184 1588
1589 ds1307_hwmon_register(ds1307);
1590 ds1307_clks_register(ds1307);
1591
1185 return 0; 1592 return 0;
1186 1593
1187exit: 1594exit:
diff --git a/drivers/rtc/rtc-ds1685.c b/drivers/rtc/rtc-ds1685.c
index 535050fc5e9f..1e6cfc84b1f6 100644
--- a/drivers/rtc/rtc-ds1685.c
+++ b/drivers/rtc/rtc-ds1685.c
@@ -187,9 +187,9 @@ ds1685_rtc_end_data_access(struct ds1685_priv *rtc)
187 * Only use this where you are certain another lock will not be held. 187 * Only use this where you are certain another lock will not be held.
188 */ 188 */
189static inline void 189static inline void
190ds1685_rtc_begin_ctrl_access(struct ds1685_priv *rtc, unsigned long flags) 190ds1685_rtc_begin_ctrl_access(struct ds1685_priv *rtc, unsigned long *flags)
191{ 191{
192 spin_lock_irqsave(&rtc->lock, flags); 192 spin_lock_irqsave(&rtc->lock, *flags);
193 ds1685_rtc_switch_to_bank1(rtc); 193 ds1685_rtc_switch_to_bank1(rtc);
194} 194}
195 195
@@ -1300,7 +1300,7 @@ ds1685_rtc_sysfs_ctrl_regs_store(struct device *dev,
1300{ 1300{
1301 struct ds1685_priv *rtc = dev_get_drvdata(dev); 1301 struct ds1685_priv *rtc = dev_get_drvdata(dev);
1302 u8 reg = 0, bit = 0, tmp; 1302 u8 reg = 0, bit = 0, tmp;
1303 unsigned long flags = 0; 1303 unsigned long flags;
1304 long int val = 0; 1304 long int val = 0;
1305 const struct ds1685_rtc_ctrl_regs *reg_info = 1305 const struct ds1685_rtc_ctrl_regs *reg_info =
1306 ds1685_rtc_sysfs_ctrl_regs_lookup(attr->attr.name); 1306 ds1685_rtc_sysfs_ctrl_regs_lookup(attr->attr.name);
@@ -1321,7 +1321,7 @@ ds1685_rtc_sysfs_ctrl_regs_store(struct device *dev,
1321 bit = reg_info->bit; 1321 bit = reg_info->bit;
1322 1322
1323 /* Safe to spinlock during a write. */ 1323 /* Safe to spinlock during a write. */
1324 ds1685_rtc_begin_ctrl_access(rtc, flags); 1324 ds1685_rtc_begin_ctrl_access(rtc, &flags);
1325 tmp = rtc->read(rtc, reg); 1325 tmp = rtc->read(rtc, reg);
1326 rtc->write(rtc, reg, (val ? (tmp | bit) : (tmp & ~(bit)))); 1326 rtc->write(rtc, reg, (val ? (tmp | bit) : (tmp & ~(bit))));
1327 ds1685_rtc_end_ctrl_access(rtc, flags); 1327 ds1685_rtc_end_ctrl_access(rtc, flags);
@@ -2161,6 +2161,7 @@ ds1685_rtc_poweroff(struct platform_device *pdev)
2161 /* Check for valid RTC data, else, spin forever. */ 2161 /* Check for valid RTC data, else, spin forever. */
2162 if (unlikely(!pdev)) { 2162 if (unlikely(!pdev)) {
2163 pr_emerg("platform device data not available, spinning forever ...\n"); 2163 pr_emerg("platform device data not available, spinning forever ...\n");
2164 while(1);
2164 unreachable(); 2165 unreachable();
2165 } else { 2166 } else {
2166 /* Get the rtc data. */ 2167 /* Get the rtc data. */
diff --git a/drivers/rtc/rtc-ds3232.c b/drivers/rtc/rtc-ds3232.c
index 4e99ace66f74..7edc889729c5 100644
--- a/drivers/rtc/rtc-ds3232.c
+++ b/drivers/rtc/rtc-ds3232.c
@@ -1,19 +1,15 @@
1/* 1/*
2 * RTC client/driver for the Maxim/Dallas DS3232 Real-Time Clock over I2C 2 * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
3 * 3 *
4 * Copyright (C) 2009-2011 Freescale Semiconductor. 4 * Copyright (C) 2009-2011 Freescale Semiconductor.
5 * Author: Jack Lan <jack.lan@freescale.com> 5 * Author: Jack Lan <jack.lan@freescale.com>
6 * Copyright (C) 2008 MIMOMax Wireless Ltd.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your 10 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version. 11 * option) any later version.
11 */ 12 */
12/*
13 * It would be more efficient to use i2c msgs/i2c_transfer directly but, as
14 * recommened in .../Documentation/i2c/writing-clients section
15 * "Sending and receiving", using SMBus level communication is preferred.
16 */
17 13
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 15
@@ -21,10 +17,11 @@
21#include <linux/module.h> 17#include <linux/module.h>
22#include <linux/interrupt.h> 18#include <linux/interrupt.h>
23#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/spi/spi.h>
24#include <linux/rtc.h> 21#include <linux/rtc.h>
25#include <linux/bcd.h> 22#include <linux/bcd.h>
26#include <linux/workqueue.h>
27#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/regmap.h>
28 25
29#define DS3232_REG_SECONDS 0x00 26#define DS3232_REG_SECONDS 0x00
30#define DS3232_REG_MINUTES 0x01 27#define DS3232_REG_MINUTES 0x01
@@ -50,39 +47,33 @@
50# define DS3232_REG_SR_A1F 0x01 47# define DS3232_REG_SR_A1F 0x01
51 48
52struct ds3232 { 49struct ds3232 {
53 struct i2c_client *client; 50 struct device *dev;
51 struct regmap *regmap;
52 int irq;
54 struct rtc_device *rtc; 53 struct rtc_device *rtc;
55 struct work_struct work;
56 54
57 /* The mutex protects alarm operations, and prevents a race
58 * between the enable_irq() in the workqueue and the free_irq()
59 * in the remove function.
60 */
61 struct mutex mutex;
62 bool suspended; 55 bool suspended;
63 int exiting;
64}; 56};
65 57
66static struct i2c_driver ds3232_driver; 58static int ds3232_check_rtc_status(struct device *dev)
67
68static int ds3232_check_rtc_status(struct i2c_client *client)
69{ 59{
60 struct ds3232 *ds3232 = dev_get_drvdata(dev);
70 int ret = 0; 61 int ret = 0;
71 int control, stat; 62 int control, stat;
72 63
73 stat = i2c_smbus_read_byte_data(client, DS3232_REG_SR); 64 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
74 if (stat < 0) 65 if (ret)
75 return stat; 66 return ret;
76 67
77 if (stat & DS3232_REG_SR_OSF) 68 if (stat & DS3232_REG_SR_OSF)
78 dev_warn(&client->dev, 69 dev_warn(dev,
79 "oscillator discontinuity flagged, " 70 "oscillator discontinuity flagged, "
80 "time unreliable\n"); 71 "time unreliable\n");
81 72
82 stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); 73 stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
83 74
84 ret = i2c_smbus_write_byte_data(client, DS3232_REG_SR, stat); 75 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
85 if (ret < 0) 76 if (ret)
86 return ret; 77 return ret;
87 78
88 /* If the alarm is pending, clear it before requesting 79 /* If the alarm is pending, clear it before requesting
@@ -90,31 +81,28 @@ static int ds3232_check_rtc_status(struct i2c_client *client)
90 * before everything is initialized. 81 * before everything is initialized.
91 */ 82 */
92 83
93 control = i2c_smbus_read_byte_data(client, DS3232_REG_CR); 84 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
94 if (control < 0) 85 if (ret)
95 return control; 86 return ret;
96 87
97 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); 88 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
98 control |= DS3232_REG_CR_INTCN; 89 control |= DS3232_REG_CR_INTCN;
99 90
100 return i2c_smbus_write_byte_data(client, DS3232_REG_CR, control); 91 return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
101} 92}
102 93
103static int ds3232_read_time(struct device *dev, struct rtc_time *time) 94static int ds3232_read_time(struct device *dev, struct rtc_time *time)
104{ 95{
105 struct i2c_client *client = to_i2c_client(dev); 96 struct ds3232 *ds3232 = dev_get_drvdata(dev);
106 int ret; 97 int ret;
107 u8 buf[7]; 98 u8 buf[7];
108 unsigned int year, month, day, hour, minute, second; 99 unsigned int year, month, day, hour, minute, second;
109 unsigned int week, twelve_hr, am_pm; 100 unsigned int week, twelve_hr, am_pm;
110 unsigned int century, add_century = 0; 101 unsigned int century, add_century = 0;
111 102
112 ret = i2c_smbus_read_i2c_block_data(client, DS3232_REG_SECONDS, 7, buf); 103 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
113 104 if (ret)
114 if (ret < 0)
115 return ret; 105 return ret;
116 if (ret < 7)
117 return -EIO;
118 106
119 second = buf[0]; 107 second = buf[0];
120 minute = buf[1]; 108 minute = buf[1];
@@ -159,7 +147,7 @@ static int ds3232_read_time(struct device *dev, struct rtc_time *time)
159 147
160static int ds3232_set_time(struct device *dev, struct rtc_time *time) 148static int ds3232_set_time(struct device *dev, struct rtc_time *time)
161{ 149{
162 struct i2c_client *client = to_i2c_client(dev); 150 struct ds3232 *ds3232 = dev_get_drvdata(dev);
163 u8 buf[7]; 151 u8 buf[7];
164 152
165 /* Extract time from rtc_time and load into ds3232*/ 153 /* Extract time from rtc_time and load into ds3232*/
@@ -179,8 +167,7 @@ static int ds3232_set_time(struct device *dev, struct rtc_time *time)
179 buf[6] = bin2bcd(time->tm_year); 167 buf[6] = bin2bcd(time->tm_year);
180 } 168 }
181 169
182 return i2c_smbus_write_i2c_block_data(client, 170 return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
183 DS3232_REG_SECONDS, 7, buf);
184} 171}
185 172
186/* 173/*
@@ -190,24 +177,19 @@ static int ds3232_set_time(struct device *dev, struct rtc_time *time)
190 */ 177 */
191static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 178static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
192{ 179{
193 struct i2c_client *client = to_i2c_client(dev); 180 struct ds3232 *ds3232 = dev_get_drvdata(dev);
194 struct ds3232 *ds3232 = i2c_get_clientdata(client);
195 int control, stat; 181 int control, stat;
196 int ret; 182 int ret;
197 u8 buf[4]; 183 u8 buf[4];
198 184
199 mutex_lock(&ds3232->mutex); 185 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
200 186 if (ret)
201 ret = i2c_smbus_read_byte_data(client, DS3232_REG_SR);
202 if (ret < 0)
203 goto out; 187 goto out;
204 stat = ret; 188 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
205 ret = i2c_smbus_read_byte_data(client, DS3232_REG_CR); 189 if (ret)
206 if (ret < 0)
207 goto out; 190 goto out;
208 control = ret; 191 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
209 ret = i2c_smbus_read_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf); 192 if (ret)
210 if (ret < 0)
211 goto out; 193 goto out;
212 194
213 alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F); 195 alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
@@ -226,7 +208,6 @@ static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
226 208
227 ret = 0; 209 ret = 0;
228out: 210out:
229 mutex_unlock(&ds3232->mutex);
230 return ret; 211 return ret;
231} 212}
232 213
@@ -236,166 +217,129 @@ out:
236 */ 217 */
237static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 218static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
238{ 219{
239 struct i2c_client *client = to_i2c_client(dev); 220 struct ds3232 *ds3232 = dev_get_drvdata(dev);
240 struct ds3232 *ds3232 = i2c_get_clientdata(client);
241 int control, stat; 221 int control, stat;
242 int ret; 222 int ret;
243 u8 buf[4]; 223 u8 buf[4];
244 224
245 if (client->irq <= 0) 225 if (ds3232->irq <= 0)
246 return -EINVAL; 226 return -EINVAL;
247 227
248 mutex_lock(&ds3232->mutex);
249
250 buf[0] = bin2bcd(alarm->time.tm_sec); 228 buf[0] = bin2bcd(alarm->time.tm_sec);
251 buf[1] = bin2bcd(alarm->time.tm_min); 229 buf[1] = bin2bcd(alarm->time.tm_min);
252 buf[2] = bin2bcd(alarm->time.tm_hour); 230 buf[2] = bin2bcd(alarm->time.tm_hour);
253 buf[3] = bin2bcd(alarm->time.tm_mday); 231 buf[3] = bin2bcd(alarm->time.tm_mday);
254 232
255 /* clear alarm interrupt enable bit */ 233 /* clear alarm interrupt enable bit */
256 ret = i2c_smbus_read_byte_data(client, DS3232_REG_CR); 234 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
257 if (ret < 0) 235 if (ret)
258 goto out; 236 goto out;
259 control = ret;
260 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); 237 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
261 ret = i2c_smbus_write_byte_data(client, DS3232_REG_CR, control); 238 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
262 if (ret < 0) 239 if (ret)
263 goto out; 240 goto out;
264 241
265 /* clear any pending alarm flag */ 242 /* clear any pending alarm flag */
266 ret = i2c_smbus_read_byte_data(client, DS3232_REG_SR); 243 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
267 if (ret < 0) 244 if (ret)
268 goto out; 245 goto out;
269 stat = ret;
270 stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); 246 stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
271 ret = i2c_smbus_write_byte_data(client, DS3232_REG_SR, stat); 247 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
272 if (ret < 0) 248 if (ret)
273 goto out; 249 goto out;
274 250
275 ret = i2c_smbus_write_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf); 251 ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
252 if (ret)
253 goto out;
276 254
277 if (alarm->enabled) { 255 if (alarm->enabled) {
278 control |= DS3232_REG_CR_A1IE; 256 control |= DS3232_REG_CR_A1IE;
279 ret = i2c_smbus_write_byte_data(client, DS3232_REG_CR, control); 257 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
280 } 258 }
281out: 259out:
282 mutex_unlock(&ds3232->mutex);
283 return ret; 260 return ret;
284} 261}
285 262
286static void ds3232_update_alarm(struct i2c_client *client) 263static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
287{ 264{
288 struct ds3232 *ds3232 = i2c_get_clientdata(client); 265 struct ds3232 *ds3232 = dev_get_drvdata(dev);
289 int control; 266 int control;
290 int ret; 267 int ret;
291 u8 buf[4];
292
293 mutex_lock(&ds3232->mutex);
294
295 ret = i2c_smbus_read_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf);
296 if (ret < 0)
297 goto unlock;
298
299 buf[0] = bcd2bin(buf[0]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
300 0x80 : buf[0];
301 buf[1] = bcd2bin(buf[1]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
302 0x80 : buf[1];
303 buf[2] = bcd2bin(buf[2]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
304 0x80 : buf[2];
305 buf[3] = bcd2bin(buf[3]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ?
306 0x80 : buf[3];
307
308 ret = i2c_smbus_write_i2c_block_data(client, DS3232_REG_ALARM1, 4, buf);
309 if (ret < 0)
310 goto unlock;
311 268
312 control = i2c_smbus_read_byte_data(client, DS3232_REG_CR); 269 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
313 if (control < 0) 270 if (ret)
314 goto unlock; 271 return ret;
315 272
316 if (ds3232->rtc->irq_data & (RTC_AF | RTC_UF)) 273 if (enabled)
317 /* enable alarm1 interrupt */ 274 /* enable alarm1 interrupt */
318 control |= DS3232_REG_CR_A1IE; 275 control |= DS3232_REG_CR_A1IE;
319 else 276 else
320 /* disable alarm1 interrupt */ 277 /* disable alarm1 interrupt */
321 control &= ~(DS3232_REG_CR_A1IE); 278 control &= ~(DS3232_REG_CR_A1IE);
322 i2c_smbus_write_byte_data(client, DS3232_REG_CR, control); 279 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
323 280
324unlock: 281 return ret;
325 mutex_unlock(&ds3232->mutex);
326} 282}
327 283
328static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled) 284static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
329{ 285{
330 struct i2c_client *client = to_i2c_client(dev); 286 struct ds3232 *ds3232 = dev_get_drvdata(dev);
331 struct ds3232 *ds3232 = i2c_get_clientdata(client);
332 287
333 if (client->irq <= 0) 288 if (ds3232->irq <= 0)
334 return -EINVAL; 289 return -EINVAL;
335 290
336 if (enabled) 291 return ds3232_update_alarm(dev, enabled);
337 ds3232->rtc->irq_data |= RTC_AF;
338 else
339 ds3232->rtc->irq_data &= ~RTC_AF;
340
341 ds3232_update_alarm(client);
342 return 0;
343} 292}
344 293
345static irqreturn_t ds3232_irq(int irq, void *dev_id) 294static irqreturn_t ds3232_irq(int irq, void *dev_id)
346{ 295{
347 struct i2c_client *client = dev_id; 296 struct device *dev = dev_id;
348 struct ds3232 *ds3232 = i2c_get_clientdata(client); 297 struct ds3232 *ds3232 = dev_get_drvdata(dev);
349 298 struct mutex *lock = &ds3232->rtc->ops_lock;
350 disable_irq_nosync(irq); 299 int ret;
351
352 /*
353 * If rtc as a wakeup source, can't schedule the work
354 * at system resume flow, because at this time the i2c bus
355 * has not been resumed.
356 */
357 if (!ds3232->suspended)
358 schedule_work(&ds3232->work);
359
360 return IRQ_HANDLED;
361}
362
363static void ds3232_work(struct work_struct *work)
364{
365 struct ds3232 *ds3232 = container_of(work, struct ds3232, work);
366 struct i2c_client *client = ds3232->client;
367 int stat, control; 300 int stat, control;
368 301
369 mutex_lock(&ds3232->mutex); 302 mutex_lock(lock);
370 303
371 stat = i2c_smbus_read_byte_data(client, DS3232_REG_SR); 304 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
372 if (stat < 0) 305 if (ret)
373 goto unlock; 306 goto unlock;
374 307
375 if (stat & DS3232_REG_SR_A1F) { 308 if (stat & DS3232_REG_SR_A1F) {
376 control = i2c_smbus_read_byte_data(client, DS3232_REG_CR); 309 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
377 if (control < 0) { 310 if (ret) {
378 pr_warn("Read Control Register error - Disable IRQ%d\n", 311 dev_warn(ds3232->dev,
379 client->irq); 312 "Read Control Register error %d\n", ret);
380 } else { 313 } else {
381 /* disable alarm1 interrupt */ 314 /* disable alarm1 interrupt */
382 control &= ~(DS3232_REG_CR_A1IE); 315 control &= ~(DS3232_REG_CR_A1IE);
383 i2c_smbus_write_byte_data(client, DS3232_REG_CR, 316 ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
384 control); 317 control);
318 if (ret) {
319 dev_warn(ds3232->dev,
320 "Write Control Register error %d\n",
321 ret);
322 goto unlock;
323 }
385 324
386 /* clear the alarm pend flag */ 325 /* clear the alarm pend flag */
387 stat &= ~DS3232_REG_SR_A1F; 326 stat &= ~DS3232_REG_SR_A1F;
388 i2c_smbus_write_byte_data(client, DS3232_REG_SR, stat); 327 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
328 if (ret) {
329 dev_warn(ds3232->dev,
330 "Write Status Register error %d\n",
331 ret);
332 goto unlock;
333 }
389 334
390 rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF); 335 rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF);
391
392 if (!ds3232->exiting)
393 enable_irq(client->irq);
394 } 336 }
395 } 337 }
396 338
397unlock: 339unlock:
398 mutex_unlock(&ds3232->mutex); 340 mutex_unlock(lock);
341
342 return IRQ_HANDLED;
399} 343}
400 344
401static const struct rtc_class_ops ds3232_rtc_ops = { 345static const struct rtc_class_ops ds3232_rtc_ops = {
@@ -406,67 +350,50 @@ static const struct rtc_class_ops ds3232_rtc_ops = {
406 .alarm_irq_enable = ds3232_alarm_irq_enable, 350 .alarm_irq_enable = ds3232_alarm_irq_enable,
407}; 351};
408 352
409static int ds3232_probe(struct i2c_client *client, 353static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
410 const struct i2c_device_id *id) 354 const char *name)
411{ 355{
412 struct ds3232 *ds3232; 356 struct ds3232 *ds3232;
413 int ret; 357 int ret;
414 358
415 ds3232 = devm_kzalloc(&client->dev, sizeof(struct ds3232), GFP_KERNEL); 359 ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
416 if (!ds3232) 360 if (!ds3232)
417 return -ENOMEM; 361 return -ENOMEM;
418 362
419 ds3232->client = client; 363 ds3232->regmap = regmap;
420 i2c_set_clientdata(client, ds3232); 364 ds3232->irq = irq;
421 365 ds3232->dev = dev;
422 INIT_WORK(&ds3232->work, ds3232_work); 366 dev_set_drvdata(dev, ds3232);
423 mutex_init(&ds3232->mutex);
424 367
425 ret = ds3232_check_rtc_status(client); 368 ret = ds3232_check_rtc_status(dev);
426 if (ret) 369 if (ret)
427 return ret; 370 return ret;
428 371
429 if (client->irq > 0) { 372 if (ds3232->irq > 0) {
430 ret = devm_request_irq(&client->dev, client->irq, ds3232_irq, 373 ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
431 IRQF_SHARED, "ds3232", client); 374 ds3232_irq,
375 IRQF_SHARED | IRQF_ONESHOT,
376 name, dev);
432 if (ret) { 377 if (ret) {
433 dev_err(&client->dev, "unable to request IRQ\n"); 378 ds3232->irq = 0;
434 } 379 dev_err(dev, "unable to request IRQ\n");
435 device_init_wakeup(&client->dev, 1); 380 } else
436 } 381 device_init_wakeup(dev, 1);
437 ds3232->rtc = devm_rtc_device_register(&client->dev, client->name,
438 &ds3232_rtc_ops, THIS_MODULE);
439 return PTR_ERR_OR_ZERO(ds3232->rtc);
440}
441
442static int ds3232_remove(struct i2c_client *client)
443{
444 struct ds3232 *ds3232 = i2c_get_clientdata(client);
445
446 if (client->irq > 0) {
447 mutex_lock(&ds3232->mutex);
448 ds3232->exiting = 1;
449 mutex_unlock(&ds3232->mutex);
450
451 devm_free_irq(&client->dev, client->irq, client);
452 cancel_work_sync(&ds3232->work);
453 } 382 }
383 ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
384 THIS_MODULE);
454 385
455 return 0; 386 return PTR_ERR_OR_ZERO(ds3232->rtc);
456} 387}
457 388
458#ifdef CONFIG_PM_SLEEP 389#ifdef CONFIG_PM_SLEEP
459static int ds3232_suspend(struct device *dev) 390static int ds3232_suspend(struct device *dev)
460{ 391{
461 struct ds3232 *ds3232 = dev_get_drvdata(dev); 392 struct ds3232 *ds3232 = dev_get_drvdata(dev);
462 struct i2c_client *client = to_i2c_client(dev);
463 393
464 if (device_can_wakeup(dev)) { 394 if (device_may_wakeup(dev)) {
465 ds3232->suspended = true; 395 if (enable_irq_wake(ds3232->irq))
466 if (irq_set_irq_wake(client->irq, 1)) {
467 dev_warn_once(dev, "Cannot set wakeup source\n"); 396 dev_warn_once(dev, "Cannot set wakeup source\n");
468 ds3232->suspended = false;
469 }
470 } 397 }
471 398
472 return 0; 399 return 0;
@@ -475,16 +402,9 @@ static int ds3232_suspend(struct device *dev)
475static int ds3232_resume(struct device *dev) 402static int ds3232_resume(struct device *dev)
476{ 403{
477 struct ds3232 *ds3232 = dev_get_drvdata(dev); 404 struct ds3232 *ds3232 = dev_get_drvdata(dev);
478 struct i2c_client *client = to_i2c_client(dev);
479 405
480 if (ds3232->suspended) { 406 if (device_may_wakeup(dev))
481 ds3232->suspended = false; 407 disable_irq_wake(ds3232->irq);
482
483 /* Clear the hardware alarm pend flag */
484 schedule_work(&ds3232->work);
485
486 irq_set_irq_wake(client->irq, 0);
487 }
488 408
489 return 0; 409 return 0;
490} 410}
@@ -494,6 +414,27 @@ static const struct dev_pm_ops ds3232_pm_ops = {
494 SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume) 414 SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
495}; 415};
496 416
417#if IS_ENABLED(CONFIG_I2C)
418
419static int ds3232_i2c_probe(struct i2c_client *client,
420 const struct i2c_device_id *id)
421{
422 struct regmap *regmap;
423 static const struct regmap_config config = {
424 .reg_bits = 8,
425 .val_bits = 8,
426 };
427
428 regmap = devm_regmap_init_i2c(client, &config);
429 if (IS_ERR(regmap)) {
430 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
431 __func__, PTR_ERR(regmap));
432 return PTR_ERR(regmap);
433 }
434
435 return ds3232_probe(&client->dev, regmap, client->irq, client->name);
436}
437
497static const struct i2c_device_id ds3232_id[] = { 438static const struct i2c_device_id ds3232_id[] = {
498 { "ds3232", 0 }, 439 { "ds3232", 0 },
499 { } 440 { }
@@ -505,13 +446,162 @@ static struct i2c_driver ds3232_driver = {
505 .name = "rtc-ds3232", 446 .name = "rtc-ds3232",
506 .pm = &ds3232_pm_ops, 447 .pm = &ds3232_pm_ops,
507 }, 448 },
508 .probe = ds3232_probe, 449 .probe = ds3232_i2c_probe,
509 .remove = ds3232_remove,
510 .id_table = ds3232_id, 450 .id_table = ds3232_id,
511}; 451};
512 452
513module_i2c_driver(ds3232_driver); 453static int ds3232_register_driver(void)
454{
455 return i2c_add_driver(&ds3232_driver);
456}
457
458static void ds3232_unregister_driver(void)
459{
460 i2c_del_driver(&ds3232_driver);
461}
462
463#else
464
465static int ds3232_register_driver(void)
466{
467 return 0;
468}
469
470static void ds3232_unregister_driver(void)
471{
472}
473
474#endif
475
476#if IS_ENABLED(CONFIG_SPI_MASTER)
477
478static int ds3234_probe(struct spi_device *spi)
479{
480 int res;
481 unsigned int tmp;
482 static const struct regmap_config config = {
483 .reg_bits = 8,
484 .val_bits = 8,
485 .write_flag_mask = 0x80,
486 };
487 struct regmap *regmap;
488
489 regmap = devm_regmap_init_spi(spi, &config);
490 if (IS_ERR(regmap)) {
491 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
492 __func__, PTR_ERR(regmap));
493 return PTR_ERR(regmap);
494 }
495
496 spi->mode = SPI_MODE_3;
497 spi->bits_per_word = 8;
498 spi_setup(spi);
499
500 res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
501 if (res)
502 return res;
503
504 /* Control settings
505 *
506 * CONTROL_REG
507 * BIT 7 6 5 4 3 2 1 0
508 * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
509 *
510 * 0 0 0 1 1 1 0 0
511 *
512 * CONTROL_STAT_REG
513 * BIT 7 6 5 4 3 2 1 0
514 * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
515 *
516 * 1 0 0 0 1 0 0 0
517 */
518 res = regmap_read(regmap, DS3232_REG_CR, &tmp);
519 if (res)
520 return res;
521 res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
522 if (res)
523 return res;
524
525 res = regmap_read(regmap, DS3232_REG_SR, &tmp);
526 if (res)
527 return res;
528 res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
529 if (res)
530 return res;
531
532 /* Print our settings */
533 res = regmap_read(regmap, DS3232_REG_CR, &tmp);
534 if (res)
535 return res;
536 dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
537
538 res = regmap_read(regmap, DS3232_REG_SR, &tmp);
539 if (res)
540 return res;
541 dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
542
543 return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
544}
545
546static struct spi_driver ds3234_driver = {
547 .driver = {
548 .name = "ds3234",
549 },
550 .probe = ds3234_probe,
551};
552
553static int ds3234_register_driver(void)
554{
555 return spi_register_driver(&ds3234_driver);
556}
557
558static void ds3234_unregister_driver(void)
559{
560 spi_unregister_driver(&ds3234_driver);
561}
562
563#else
564
565static int ds3234_register_driver(void)
566{
567 return 0;
568}
569
570static void ds3234_unregister_driver(void)
571{
572}
573
574#endif
575
576static int __init ds323x_init(void)
577{
578 int ret;
579
580 ret = ds3232_register_driver();
581 if (ret) {
582 pr_err("Failed to register ds3232 driver: %d\n", ret);
583 return ret;
584 }
585
586 ret = ds3234_register_driver();
587 if (ret) {
588 pr_err("Failed to register ds3234 driver: %d\n", ret);
589 ds3232_unregister_driver();
590 }
591
592 return ret;
593}
594module_init(ds323x_init)
595
596static void __exit ds323x_exit(void)
597{
598 ds3234_unregister_driver();
599 ds3232_unregister_driver();
600}
601module_exit(ds323x_exit)
514 602
515MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>"); 603MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>");
516MODULE_DESCRIPTION("Maxim/Dallas DS3232 RTC Driver"); 604MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
605MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
517MODULE_LICENSE("GPL"); 606MODULE_LICENSE("GPL");
607MODULE_ALIAS("spi:ds3234");
diff --git a/drivers/rtc/rtc-ds3234.c b/drivers/rtc/rtc-ds3234.c
deleted file mode 100644
index 570ab28fc354..000000000000
--- a/drivers/rtc/rtc-ds3234.c
+++ /dev/null
@@ -1,171 +0,0 @@
1/* rtc-ds3234.c
2 *
3 * Driver for Dallas Semiconductor (DS3234) SPI RTC with Integrated Crystal
4 * and SRAM.
5 *
6 * Copyright (C) 2008 MIMOMax Wireless Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/platform_device.h>
18#include <linux/rtc.h>
19#include <linux/spi/spi.h>
20#include <linux/bcd.h>
21
22#define DS3234_REG_SECONDS 0x00
23#define DS3234_REG_MINUTES 0x01
24#define DS3234_REG_HOURS 0x02
25#define DS3234_REG_DAY 0x03
26#define DS3234_REG_DATE 0x04
27#define DS3234_REG_MONTH 0x05
28#define DS3234_REG_YEAR 0x06
29#define DS3234_REG_CENTURY (1 << 7) /* Bit 7 of the Month register */
30
31#define DS3234_REG_CONTROL 0x0E
32#define DS3234_REG_CONT_STAT 0x0F
33
34static int ds3234_set_reg(struct device *dev, unsigned char address,
35 unsigned char data)
36{
37 struct spi_device *spi = to_spi_device(dev);
38 unsigned char buf[2];
39
40 /* MSB must be '1' to indicate write */
41 buf[0] = address | 0x80;
42 buf[1] = data;
43
44 return spi_write_then_read(spi, buf, 2, NULL, 0);
45}
46
47static int ds3234_get_reg(struct device *dev, unsigned char address,
48 unsigned char *data)
49{
50 struct spi_device *spi = to_spi_device(dev);
51
52 *data = address & 0x7f;
53
54 return spi_write_then_read(spi, data, 1, data, 1);
55}
56
57static int ds3234_read_time(struct device *dev, struct rtc_time *dt)
58{
59 int err;
60 unsigned char buf[8];
61 struct spi_device *spi = to_spi_device(dev);
62
63 buf[0] = 0x00; /* Start address */
64
65 err = spi_write_then_read(spi, buf, 1, buf, 8);
66 if (err != 0)
67 return err;
68
69 /* Seconds, Minutes, Hours, Day, Date, Month, Year */
70 dt->tm_sec = bcd2bin(buf[0]);
71 dt->tm_min = bcd2bin(buf[1]);
72 dt->tm_hour = bcd2bin(buf[2] & 0x3f);
73 dt->tm_wday = bcd2bin(buf[3]) - 1; /* 0 = Sun */
74 dt->tm_mday = bcd2bin(buf[4]);
75 dt->tm_mon = bcd2bin(buf[5] & 0x1f) - 1; /* 0 = Jan */
76 dt->tm_year = bcd2bin(buf[6] & 0xff) + 100; /* Assume 20YY */
77
78 return rtc_valid_tm(dt);
79}
80
81static int ds3234_set_time(struct device *dev, struct rtc_time *dt)
82{
83 ds3234_set_reg(dev, DS3234_REG_SECONDS, bin2bcd(dt->tm_sec));
84 ds3234_set_reg(dev, DS3234_REG_MINUTES, bin2bcd(dt->tm_min));
85 ds3234_set_reg(dev, DS3234_REG_HOURS, bin2bcd(dt->tm_hour) & 0x3f);
86
87 /* 0 = Sun */
88 ds3234_set_reg(dev, DS3234_REG_DAY, bin2bcd(dt->tm_wday + 1));
89 ds3234_set_reg(dev, DS3234_REG_DATE, bin2bcd(dt->tm_mday));
90
91 /* 0 = Jan */
92 ds3234_set_reg(dev, DS3234_REG_MONTH, bin2bcd(dt->tm_mon + 1));
93
94 /* Assume 20YY although we just want to make sure not to go negative. */
95 if (dt->tm_year > 100)
96 dt->tm_year -= 100;
97
98 ds3234_set_reg(dev, DS3234_REG_YEAR, bin2bcd(dt->tm_year));
99
100 return 0;
101}
102
103static const struct rtc_class_ops ds3234_rtc_ops = {
104 .read_time = ds3234_read_time,
105 .set_time = ds3234_set_time,
106};
107
108static int ds3234_probe(struct spi_device *spi)
109{
110 struct rtc_device *rtc;
111 unsigned char tmp;
112 int res;
113
114 spi->mode = SPI_MODE_3;
115 spi->bits_per_word = 8;
116 spi_setup(spi);
117
118 res = ds3234_get_reg(&spi->dev, DS3234_REG_SECONDS, &tmp);
119 if (res != 0)
120 return res;
121
122 /* Control settings
123 *
124 * CONTROL_REG
125 * BIT 7 6 5 4 3 2 1 0
126 * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
127 *
128 * 0 0 0 1 1 1 0 0
129 *
130 * CONTROL_STAT_REG
131 * BIT 7 6 5 4 3 2 1 0
132 * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
133 *
134 * 1 0 0 0 1 0 0 0
135 */
136 ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp);
137 ds3234_set_reg(&spi->dev, DS3234_REG_CONTROL, tmp & 0x1c);
138
139 ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp);
140 ds3234_set_reg(&spi->dev, DS3234_REG_CONT_STAT, tmp & 0x88);
141
142 /* Print our settings */
143 ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp);
144 dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
145
146 ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp);
147 dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
148
149 rtc = devm_rtc_device_register(&spi->dev, "ds3234",
150 &ds3234_rtc_ops, THIS_MODULE);
151 if (IS_ERR(rtc))
152 return PTR_ERR(rtc);
153
154 spi_set_drvdata(spi, rtc);
155
156 return 0;
157}
158
159static struct spi_driver ds3234_driver = {
160 .driver = {
161 .name = "ds3234",
162 },
163 .probe = ds3234_probe,
164};
165
166module_spi_driver(ds3234_driver);
167
168MODULE_DESCRIPTION("DS3234 SPI RTC driver");
169MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
170MODULE_LICENSE("GPL");
171MODULE_ALIAS("spi:ds3234");
diff --git a/drivers/rtc/rtc-generic.c b/drivers/rtc/rtc-generic.c
index e782ebd719b2..d726c6aa96a8 100644
--- a/drivers/rtc/rtc-generic.c
+++ b/drivers/rtc/rtc-generic.c
@@ -9,6 +9,8 @@
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/rtc.h> 10#include <linux/rtc.h>
11 11
12#if defined(CONFIG_M68K) || defined(CONFIG_PARISC) || \
13 defined(CONFIG_PPC) || defined(CONFIG_SUPERH32)
12#include <asm/rtc.h> 14#include <asm/rtc.h>
13 15
14static int generic_get_time(struct device *dev, struct rtc_time *tm) 16static int generic_get_time(struct device *dev, struct rtc_time *tm)
@@ -33,13 +35,21 @@ static const struct rtc_class_ops generic_rtc_ops = {
33 .read_time = generic_get_time, 35 .read_time = generic_get_time,
34 .set_time = generic_set_time, 36 .set_time = generic_set_time,
35}; 37};
38#else
39#define generic_rtc_ops *(struct rtc_class_ops*)NULL
40#endif
36 41
37static int __init generic_rtc_probe(struct platform_device *dev) 42static int __init generic_rtc_probe(struct platform_device *dev)
38{ 43{
39 struct rtc_device *rtc; 44 struct rtc_device *rtc;
45 const struct rtc_class_ops *ops;
46
47 ops = dev_get_platdata(&dev->dev);
48 if (!ops)
49 ops = &generic_rtc_ops;
40 50
41 rtc = devm_rtc_device_register(&dev->dev, "rtc-generic", 51 rtc = devm_rtc_device_register(&dev->dev, "rtc-generic",
42 &generic_rtc_ops, THIS_MODULE); 52 ops, THIS_MODULE);
43 if (IS_ERR(rtc)) 53 if (IS_ERR(rtc))
44 return PTR_ERR(rtc); 54 return PTR_ERR(rtc);
45 55
diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c
index 097325d96db5..b1b4746a0eab 100644
--- a/drivers/rtc/rtc-hym8563.c
+++ b/drivers/rtc/rtc-hym8563.c
@@ -144,7 +144,7 @@ static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
144 * it does not seem to carry it over a subsequent write/read. 144 * it does not seem to carry it over a subsequent write/read.
145 * So we'll limit ourself to 100 years, starting at 2000 for now. 145 * So we'll limit ourself to 100 years, starting at 2000 for now.
146 */ 146 */
147 buf[6] = tm->tm_year - 100; 147 buf[6] = bin2bcd(tm->tm_year - 100);
148 148
149 /* 149 /*
150 * CTL1 only contains TEST-mode bits apart from stop, 150 * CTL1 only contains TEST-mode bits apart from stop,
diff --git a/drivers/rtc/rtc-max77686.c b/drivers/rtc/rtc-max77686.c
index 7184a0eda793..182fdd00e290 100644
--- a/drivers/rtc/rtc-max77686.c
+++ b/drivers/rtc/rtc-max77686.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * RTC driver for Maxim MAX77686 2 * RTC driver for Maxim MAX77686 and MAX77802
3 * 3 *
4 * Copyright (C) 2012 Samsung Electronics Co.Ltd 4 * Copyright (C) 2012 Samsung Electronics Co.Ltd
5 * 5 *
@@ -12,8 +12,7 @@
12 * 12 *
13 */ 13 */
14 14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 15#include <linux/i2c.h>
16
17#include <linux/slab.h> 16#include <linux/slab.h>
18#include <linux/rtc.h> 17#include <linux/rtc.h>
19#include <linux/delay.h> 18#include <linux/delay.h>
@@ -24,24 +23,38 @@
24#include <linux/irqdomain.h> 23#include <linux/irqdomain.h>
25#include <linux/regmap.h> 24#include <linux/regmap.h>
26 25
26#define MAX77686_I2C_ADDR_RTC (0x0C >> 1)
27#define MAX77620_I2C_ADDR_RTC 0x68
28#define MAX77686_INVALID_I2C_ADDR (-1)
29
30/* Define non existing register */
31#define MAX77686_INVALID_REG (-1)
32
27/* RTC Control Register */ 33/* RTC Control Register */
28#define BCD_EN_SHIFT 0 34#define BCD_EN_SHIFT 0
29#define BCD_EN_MASK (1 << BCD_EN_SHIFT) 35#define BCD_EN_MASK BIT(BCD_EN_SHIFT)
30#define MODEL24_SHIFT 1 36#define MODEL24_SHIFT 1
31#define MODEL24_MASK (1 << MODEL24_SHIFT) 37#define MODEL24_MASK BIT(MODEL24_SHIFT)
32/* RTC Update Register1 */ 38/* RTC Update Register1 */
33#define RTC_UDR_SHIFT 0 39#define RTC_UDR_SHIFT 0
34#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) 40#define RTC_UDR_MASK BIT(RTC_UDR_SHIFT)
35#define RTC_RBUDR_SHIFT 4 41#define RTC_RBUDR_SHIFT 4
36#define RTC_RBUDR_MASK (1 << RTC_RBUDR_SHIFT) 42#define RTC_RBUDR_MASK BIT(RTC_RBUDR_SHIFT)
37/* RTC Hour register */ 43/* RTC Hour register */
38#define HOUR_PM_SHIFT 6 44#define HOUR_PM_SHIFT 6
39#define HOUR_PM_MASK (1 << HOUR_PM_SHIFT) 45#define HOUR_PM_MASK BIT(HOUR_PM_SHIFT)
40/* RTC Alarm Enable */ 46/* RTC Alarm Enable */
41#define ALARM_ENABLE_SHIFT 7 47#define ALARM_ENABLE_SHIFT 7
42#define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT) 48#define ALARM_ENABLE_MASK BIT(ALARM_ENABLE_SHIFT)
43 49
44#define MAX77686_RTC_UPDATE_DELAY 16 50#define REG_RTC_NONE 0xdeadbeef
51
52/*
53 * MAX77802 has separate register (RTCAE1) for alarm enable instead
54 * using 1 bit from registers RTC{SEC,MIN,HOUR,DAY,MONTH,YEAR,DATE}
55 * as in done in MAX77686.
56 */
57#define MAX77802_ALARM_ENABLE_VALUE 0x77
45 58
46enum { 59enum {
47 RTC_SEC = 0, 60 RTC_SEC = 0,
@@ -54,15 +67,38 @@ enum {
54 RTC_NR_TIME 67 RTC_NR_TIME
55}; 68};
56 69
70struct max77686_rtc_driver_data {
71 /* Minimum usecs needed for a RTC update */
72 unsigned long delay;
73 /* Mask used to read RTC registers value */
74 u8 mask;
75 /* Registers offset to I2C addresses map */
76 const unsigned int *map;
77 /* Has a separate alarm enable register? */
78 bool alarm_enable_reg;
79 /* I2C address for RTC block */
80 int rtc_i2c_addr;
81 /* RTC interrupt via platform resource */
82 bool rtc_irq_from_platform;
83 /* Pending alarm status register */
84 int alarm_pending_status_reg;
85 /* RTC IRQ CHIP for regmap */
86 const struct regmap_irq_chip *rtc_irq_chip;
87};
88
57struct max77686_rtc_info { 89struct max77686_rtc_info {
58 struct device *dev; 90 struct device *dev;
59 struct max77686_dev *max77686;
60 struct i2c_client *rtc; 91 struct i2c_client *rtc;
61 struct rtc_device *rtc_dev; 92 struct rtc_device *rtc_dev;
62 struct mutex lock; 93 struct mutex lock;
63 94
64 struct regmap *regmap; 95 struct regmap *regmap;
96 struct regmap *rtc_regmap;
97
98 const struct max77686_rtc_driver_data *drv_data;
99 struct regmap_irq_chip_data *rtc_irq_data;
65 100
101 int rtc_irq;
66 int virq; 102 int virq;
67 int rtc_24hr_mode; 103 int rtc_24hr_mode;
68}; 104};
@@ -72,29 +108,190 @@ enum MAX77686_RTC_OP {
72 MAX77686_RTC_READ, 108 MAX77686_RTC_READ,
73}; 109};
74 110
111/* These are not registers but just offsets that are mapped to addresses */
112enum max77686_rtc_reg_offset {
113 REG_RTC_CONTROLM = 0,
114 REG_RTC_CONTROL,
115 REG_RTC_UPDATE0,
116 REG_WTSR_SMPL_CNTL,
117 REG_RTC_SEC,
118 REG_RTC_MIN,
119 REG_RTC_HOUR,
120 REG_RTC_WEEKDAY,
121 REG_RTC_MONTH,
122 REG_RTC_YEAR,
123 REG_RTC_DATE,
124 REG_ALARM1_SEC,
125 REG_ALARM1_MIN,
126 REG_ALARM1_HOUR,
127 REG_ALARM1_WEEKDAY,
128 REG_ALARM1_MONTH,
129 REG_ALARM1_YEAR,
130 REG_ALARM1_DATE,
131 REG_ALARM2_SEC,
132 REG_ALARM2_MIN,
133 REG_ALARM2_HOUR,
134 REG_ALARM2_WEEKDAY,
135 REG_ALARM2_MONTH,
136 REG_ALARM2_YEAR,
137 REG_ALARM2_DATE,
138 REG_RTC_AE1,
139 REG_RTC_END,
140};
141
142/* Maps RTC registers offset to the MAX77686 register addresses */
143static const unsigned int max77686_map[REG_RTC_END] = {
144 [REG_RTC_CONTROLM] = MAX77686_RTC_CONTROLM,
145 [REG_RTC_CONTROL] = MAX77686_RTC_CONTROL,
146 [REG_RTC_UPDATE0] = MAX77686_RTC_UPDATE0,
147 [REG_WTSR_SMPL_CNTL] = MAX77686_WTSR_SMPL_CNTL,
148 [REG_RTC_SEC] = MAX77686_RTC_SEC,
149 [REG_RTC_MIN] = MAX77686_RTC_MIN,
150 [REG_RTC_HOUR] = MAX77686_RTC_HOUR,
151 [REG_RTC_WEEKDAY] = MAX77686_RTC_WEEKDAY,
152 [REG_RTC_MONTH] = MAX77686_RTC_MONTH,
153 [REG_RTC_YEAR] = MAX77686_RTC_YEAR,
154 [REG_RTC_DATE] = MAX77686_RTC_DATE,
155 [REG_ALARM1_SEC] = MAX77686_ALARM1_SEC,
156 [REG_ALARM1_MIN] = MAX77686_ALARM1_MIN,
157 [REG_ALARM1_HOUR] = MAX77686_ALARM1_HOUR,
158 [REG_ALARM1_WEEKDAY] = MAX77686_ALARM1_WEEKDAY,
159 [REG_ALARM1_MONTH] = MAX77686_ALARM1_MONTH,
160 [REG_ALARM1_YEAR] = MAX77686_ALARM1_YEAR,
161 [REG_ALARM1_DATE] = MAX77686_ALARM1_DATE,
162 [REG_ALARM2_SEC] = MAX77686_ALARM2_SEC,
163 [REG_ALARM2_MIN] = MAX77686_ALARM2_MIN,
164 [REG_ALARM2_HOUR] = MAX77686_ALARM2_HOUR,
165 [REG_ALARM2_WEEKDAY] = MAX77686_ALARM2_WEEKDAY,
166 [REG_ALARM2_MONTH] = MAX77686_ALARM2_MONTH,
167 [REG_ALARM2_YEAR] = MAX77686_ALARM2_YEAR,
168 [REG_ALARM2_DATE] = MAX77686_ALARM2_DATE,
169 [REG_RTC_AE1] = REG_RTC_NONE,
170};
171
172static const struct regmap_irq max77686_rtc_irqs[] = {
173 /* RTC interrupts */
174 REGMAP_IRQ_REG(0, 0, MAX77686_RTCINT_RTC60S_MSK),
175 REGMAP_IRQ_REG(1, 0, MAX77686_RTCINT_RTCA1_MSK),
176 REGMAP_IRQ_REG(2, 0, MAX77686_RTCINT_RTCA2_MSK),
177 REGMAP_IRQ_REG(3, 0, MAX77686_RTCINT_SMPL_MSK),
178 REGMAP_IRQ_REG(4, 0, MAX77686_RTCINT_RTC1S_MSK),
179 REGMAP_IRQ_REG(5, 0, MAX77686_RTCINT_WTSR_MSK),
180};
181
182static const struct regmap_irq_chip max77686_rtc_irq_chip = {
183 .name = "max77686-rtc",
184 .status_base = MAX77686_RTC_INT,
185 .mask_base = MAX77686_RTC_INTM,
186 .num_regs = 1,
187 .irqs = max77686_rtc_irqs,
188 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
189};
190
191static const struct max77686_rtc_driver_data max77686_drv_data = {
192 .delay = 16000,
193 .mask = 0x7f,
194 .map = max77686_map,
195 .alarm_enable_reg = false,
196 .rtc_irq_from_platform = false,
197 .alarm_pending_status_reg = MAX77686_REG_STATUS2,
198 .rtc_i2c_addr = MAX77686_I2C_ADDR_RTC,
199 .rtc_irq_chip = &max77686_rtc_irq_chip,
200};
201
202static const struct max77686_rtc_driver_data max77620_drv_data = {
203 .delay = 16000,
204 .mask = 0x7f,
205 .map = max77686_map,
206 .alarm_enable_reg = false,
207 .rtc_irq_from_platform = true,
208 .alarm_pending_status_reg = MAX77686_INVALID_REG,
209 .rtc_i2c_addr = MAX77620_I2C_ADDR_RTC,
210 .rtc_irq_chip = &max77686_rtc_irq_chip,
211};
212
213static const unsigned int max77802_map[REG_RTC_END] = {
214 [REG_RTC_CONTROLM] = MAX77802_RTC_CONTROLM,
215 [REG_RTC_CONTROL] = MAX77802_RTC_CONTROL,
216 [REG_RTC_UPDATE0] = MAX77802_RTC_UPDATE0,
217 [REG_WTSR_SMPL_CNTL] = MAX77802_WTSR_SMPL_CNTL,
218 [REG_RTC_SEC] = MAX77802_RTC_SEC,
219 [REG_RTC_MIN] = MAX77802_RTC_MIN,
220 [REG_RTC_HOUR] = MAX77802_RTC_HOUR,
221 [REG_RTC_WEEKDAY] = MAX77802_RTC_WEEKDAY,
222 [REG_RTC_MONTH] = MAX77802_RTC_MONTH,
223 [REG_RTC_YEAR] = MAX77802_RTC_YEAR,
224 [REG_RTC_DATE] = MAX77802_RTC_DATE,
225 [REG_ALARM1_SEC] = MAX77802_ALARM1_SEC,
226 [REG_ALARM1_MIN] = MAX77802_ALARM1_MIN,
227 [REG_ALARM1_HOUR] = MAX77802_ALARM1_HOUR,
228 [REG_ALARM1_WEEKDAY] = MAX77802_ALARM1_WEEKDAY,
229 [REG_ALARM1_MONTH] = MAX77802_ALARM1_MONTH,
230 [REG_ALARM1_YEAR] = MAX77802_ALARM1_YEAR,
231 [REG_ALARM1_DATE] = MAX77802_ALARM1_DATE,
232 [REG_ALARM2_SEC] = MAX77802_ALARM2_SEC,
233 [REG_ALARM2_MIN] = MAX77802_ALARM2_MIN,
234 [REG_ALARM2_HOUR] = MAX77802_ALARM2_HOUR,
235 [REG_ALARM2_WEEKDAY] = MAX77802_ALARM2_WEEKDAY,
236 [REG_ALARM2_MONTH] = MAX77802_ALARM2_MONTH,
237 [REG_ALARM2_YEAR] = MAX77802_ALARM2_YEAR,
238 [REG_ALARM2_DATE] = MAX77802_ALARM2_DATE,
239 [REG_RTC_AE1] = MAX77802_RTC_AE1,
240};
241
242static const struct regmap_irq_chip max77802_rtc_irq_chip = {
243 .name = "max77802-rtc",
244 .status_base = MAX77802_RTC_INT,
245 .mask_base = MAX77802_RTC_INTM,
246 .num_regs = 1,
247 .irqs = max77686_rtc_irqs, /* same masks as 77686 */
248 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs),
249};
250
251static const struct max77686_rtc_driver_data max77802_drv_data = {
252 .delay = 200,
253 .mask = 0xff,
254 .map = max77802_map,
255 .alarm_enable_reg = true,
256 .rtc_irq_from_platform = false,
257 .alarm_pending_status_reg = MAX77686_REG_STATUS2,
258 .rtc_i2c_addr = MAX77686_INVALID_I2C_ADDR,
259 .rtc_irq_chip = &max77802_rtc_irq_chip,
260};
261
75static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm, 262static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm,
76 int rtc_24hr_mode) 263 struct max77686_rtc_info *info)
77{ 264{
78 tm->tm_sec = data[RTC_SEC] & 0x7f; 265 u8 mask = info->drv_data->mask;
79 tm->tm_min = data[RTC_MIN] & 0x7f; 266
80 if (rtc_24hr_mode) 267 tm->tm_sec = data[RTC_SEC] & mask;
268 tm->tm_min = data[RTC_MIN] & mask;
269 if (info->rtc_24hr_mode) {
81 tm->tm_hour = data[RTC_HOUR] & 0x1f; 270 tm->tm_hour = data[RTC_HOUR] & 0x1f;
82 else { 271 } else {
83 tm->tm_hour = data[RTC_HOUR] & 0x0f; 272 tm->tm_hour = data[RTC_HOUR] & 0x0f;
84 if (data[RTC_HOUR] & HOUR_PM_MASK) 273 if (data[RTC_HOUR] & HOUR_PM_MASK)
85 tm->tm_hour += 12; 274 tm->tm_hour += 12;
86 } 275 }
87 276
88 /* Only a single bit is set in data[], so fls() would be equivalent */ 277 /* Only a single bit is set in data[], so fls() would be equivalent */
89 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f) - 1; 278 tm->tm_wday = ffs(data[RTC_WEEKDAY] & mask) - 1;
90 tm->tm_mday = data[RTC_DATE] & 0x1f; 279 tm->tm_mday = data[RTC_DATE] & 0x1f;
91 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; 280 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
92 tm->tm_year = (data[RTC_YEAR] & 0x7f) + 100; 281 tm->tm_year = data[RTC_YEAR] & mask;
93 tm->tm_yday = 0; 282 tm->tm_yday = 0;
94 tm->tm_isdst = 0; 283 tm->tm_isdst = 0;
284
285 /*
286 * MAX77686 uses 1 bit from sec/min/hour/etc RTC registers and the
287 * year values are just 0..99 so add 100 to support up to 2099.
288 */
289 if (!info->drv_data->alarm_enable_reg)
290 tm->tm_year += 100;
95} 291}
96 292
97static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data) 293static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data,
294 struct max77686_rtc_info *info)
98{ 295{
99 data[RTC_SEC] = tm->tm_sec; 296 data[RTC_SEC] = tm->tm_sec;
100 data[RTC_MIN] = tm->tm_min; 297 data[RTC_MIN] = tm->tm_min;
@@ -102,35 +299,44 @@ static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
102 data[RTC_WEEKDAY] = 1 << tm->tm_wday; 299 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
103 data[RTC_DATE] = tm->tm_mday; 300 data[RTC_DATE] = tm->tm_mday;
104 data[RTC_MONTH] = tm->tm_mon + 1; 301 data[RTC_MONTH] = tm->tm_mon + 1;
302
303 if (info->drv_data->alarm_enable_reg) {
304 data[RTC_YEAR] = tm->tm_year;
305 return 0;
306 }
307
105 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 308 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
106 309
107 if (tm->tm_year < 100) { 310 if (tm->tm_year < 100) {
108 pr_warn("RTC cannot handle the year %d. Assume it's 2000.\n", 311 dev_err(info->dev, "RTC cannot handle the year %d.\n",
109 1900 + tm->tm_year); 312 1900 + tm->tm_year);
110 return -EINVAL; 313 return -EINVAL;
111 } 314 }
315
112 return 0; 316 return 0;
113} 317}
114 318
115static int max77686_rtc_update(struct max77686_rtc_info *info, 319static int max77686_rtc_update(struct max77686_rtc_info *info,
116 enum MAX77686_RTC_OP op) 320 enum MAX77686_RTC_OP op)
117{ 321{
118 int ret; 322 int ret;
119 unsigned int data; 323 unsigned int data;
324 unsigned long delay = info->drv_data->delay;
120 325
121 if (op == MAX77686_RTC_WRITE) 326 if (op == MAX77686_RTC_WRITE)
122 data = 1 << RTC_UDR_SHIFT; 327 data = 1 << RTC_UDR_SHIFT;
123 else 328 else
124 data = 1 << RTC_RBUDR_SHIFT; 329 data = 1 << RTC_RBUDR_SHIFT;
125 330
126 ret = regmap_update_bits(info->max77686->rtc_regmap, 331 ret = regmap_update_bits(info->rtc_regmap,
127 MAX77686_RTC_UPDATE0, data, data); 332 info->drv_data->map[REG_RTC_UPDATE0],
333 data, data);
128 if (ret < 0) 334 if (ret < 0)
129 dev_err(info->dev, "%s: fail to write update reg(ret=%d, data=0x%x)\n", 335 dev_err(info->dev, "Fail to write update reg(ret=%d, data=0x%x)\n",
130 __func__, ret, data); 336 ret, data);
131 else { 337 else {
132 /* Minimum 16ms delay required before RTC update. */ 338 /* Minimum delay required before RTC update. */
133 msleep(MAX77686_RTC_UPDATE_DELAY); 339 usleep_range(delay, delay * 2);
134 } 340 }
135 341
136 return ret; 342 return ret;
@@ -148,14 +354,15 @@ static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm)
148 if (ret < 0) 354 if (ret < 0)
149 goto out; 355 goto out;
150 356
151 ret = regmap_bulk_read(info->max77686->rtc_regmap, 357 ret = regmap_bulk_read(info->rtc_regmap,
152 MAX77686_RTC_SEC, data, RTC_NR_TIME); 358 info->drv_data->map[REG_RTC_SEC],
359 data, ARRAY_SIZE(data));
153 if (ret < 0) { 360 if (ret < 0) {
154 dev_err(info->dev, "%s: fail to read time reg(%d)\n", __func__, ret); 361 dev_err(info->dev, "Fail to read time reg(%d)\n", ret);
155 goto out; 362 goto out;
156 } 363 }
157 364
158 max77686_rtc_data_to_tm(data, tm, info->rtc_24hr_mode); 365 max77686_rtc_data_to_tm(data, tm, info);
159 366
160 ret = rtc_valid_tm(tm); 367 ret = rtc_valid_tm(tm);
161 368
@@ -170,17 +377,17 @@ static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm)
170 u8 data[RTC_NR_TIME]; 377 u8 data[RTC_NR_TIME];
171 int ret; 378 int ret;
172 379
173 ret = max77686_rtc_tm_to_data(tm, data); 380 ret = max77686_rtc_tm_to_data(tm, data, info);
174 if (ret < 0) 381 if (ret < 0)
175 return ret; 382 return ret;
176 383
177 mutex_lock(&info->lock); 384 mutex_lock(&info->lock);
178 385
179 ret = regmap_bulk_write(info->max77686->rtc_regmap, 386 ret = regmap_bulk_write(info->rtc_regmap,
180 MAX77686_RTC_SEC, data, RTC_NR_TIME); 387 info->drv_data->map[REG_RTC_SEC],
388 data, ARRAY_SIZE(data));
181 if (ret < 0) { 389 if (ret < 0) {
182 dev_err(info->dev, "%s: fail to write time reg(%d)\n", __func__, 390 dev_err(info->dev, "Fail to write time reg(%d)\n", ret);
183 ret);
184 goto out; 391 goto out;
185 } 392 }
186 393
@@ -196,6 +403,7 @@ static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
196 struct max77686_rtc_info *info = dev_get_drvdata(dev); 403 struct max77686_rtc_info *info = dev_get_drvdata(dev);
197 u8 data[RTC_NR_TIME]; 404 u8 data[RTC_NR_TIME];
198 unsigned int val; 405 unsigned int val;
406 const unsigned int *map = info->drv_data->map;
199 int i, ret; 407 int i, ret;
200 408
201 mutex_lock(&info->lock); 409 mutex_lock(&info->lock);
@@ -204,29 +412,53 @@ static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
204 if (ret < 0) 412 if (ret < 0)
205 goto out; 413 goto out;
206 414
207 ret = regmap_bulk_read(info->max77686->rtc_regmap, 415 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
208 MAX77686_ALARM1_SEC, data, RTC_NR_TIME); 416 data, ARRAY_SIZE(data));
209 if (ret < 0) { 417 if (ret < 0) {
210 dev_err(info->dev, "%s:%d fail to read alarm reg(%d)\n", 418 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
211 __func__, __LINE__, ret);
212 goto out; 419 goto out;
213 } 420 }
214 421
215 max77686_rtc_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); 422 max77686_rtc_data_to_tm(data, &alrm->time, info);
216 423
217 alrm->enabled = 0; 424 alrm->enabled = 0;
218 for (i = 0; i < RTC_NR_TIME; i++) { 425
219 if (data[i] & ALARM_ENABLE_MASK) { 426 if (info->drv_data->alarm_enable_reg) {
427 if (map[REG_RTC_AE1] == REG_RTC_NONE) {
428 ret = -EINVAL;
429 dev_err(info->dev,
430 "alarm enable register not set(%d)\n", ret);
431 goto out;
432 }
433
434 ret = regmap_read(info->rtc_regmap, map[REG_RTC_AE1], &val);
435 if (ret < 0) {
436 dev_err(info->dev,
437 "fail to read alarm enable(%d)\n", ret);
438 goto out;
439 }
440
441 if (val)
220 alrm->enabled = 1; 442 alrm->enabled = 1;
221 break; 443 } else {
444 for (i = 0; i < ARRAY_SIZE(data); i++) {
445 if (data[i] & ALARM_ENABLE_MASK) {
446 alrm->enabled = 1;
447 break;
448 }
222 } 449 }
223 } 450 }
224 451
225 alrm->pending = 0; 452 alrm->pending = 0;
226 ret = regmap_read(info->max77686->regmap, MAX77686_REG_STATUS2, &val); 453
454 if (info->drv_data->alarm_pending_status_reg == MAX77686_INVALID_REG)
455 goto out;
456
457 ret = regmap_read(info->regmap,
458 info->drv_data->alarm_pending_status_reg, &val);
227 if (ret < 0) { 459 if (ret < 0) {
228 dev_err(info->dev, "%s:%d fail to read status2 reg(%d)\n", 460 dev_err(info->dev,
229 __func__, __LINE__, ret); 461 "Fail to read alarm pending status reg(%d)\n", ret);
230 goto out; 462 goto out;
231 } 463 }
232 464
@@ -235,7 +467,7 @@ static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
235 467
236out: 468out:
237 mutex_unlock(&info->lock); 469 mutex_unlock(&info->lock);
238 return 0; 470 return ret;
239} 471}
240 472
241static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info) 473static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info)
@@ -243,6 +475,7 @@ static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info)
243 u8 data[RTC_NR_TIME]; 475 u8 data[RTC_NR_TIME];
244 int ret, i; 476 int ret, i;
245 struct rtc_time tm; 477 struct rtc_time tm;
478 const unsigned int *map = info->drv_data->map;
246 479
247 if (!mutex_is_locked(&info->lock)) 480 if (!mutex_is_locked(&info->lock))
248 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 481 dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
@@ -251,24 +484,34 @@ static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info)
251 if (ret < 0) 484 if (ret < 0)
252 goto out; 485 goto out;
253 486
254 ret = regmap_bulk_read(info->max77686->rtc_regmap, 487 if (info->drv_data->alarm_enable_reg) {
255 MAX77686_ALARM1_SEC, data, RTC_NR_TIME); 488 if (map[REG_RTC_AE1] == REG_RTC_NONE) {
256 if (ret < 0) { 489 ret = -EINVAL;
257 dev_err(info->dev, "%s: fail to read alarm reg(%d)\n", 490 dev_err(info->dev,
258 __func__, ret); 491 "alarm enable register not set(%d)\n", ret);
259 goto out; 492 goto out;
260 } 493 }
494
495 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 0);
496 } else {
497 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
498 data, ARRAY_SIZE(data));
499 if (ret < 0) {
500 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
501 goto out;
502 }
261 503
262 max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode); 504 max77686_rtc_data_to_tm(data, &tm, info);
263 505
264 for (i = 0; i < RTC_NR_TIME; i++) 506 for (i = 0; i < ARRAY_SIZE(data); i++)
265 data[i] &= ~ALARM_ENABLE_MASK; 507 data[i] &= ~ALARM_ENABLE_MASK;
508
509 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC],
510 data, ARRAY_SIZE(data));
511 }
266 512
267 ret = regmap_bulk_write(info->max77686->rtc_regmap,
268 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
269 if (ret < 0) { 513 if (ret < 0) {
270 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", 514 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
271 __func__, ret);
272 goto out; 515 goto out;
273 } 516 }
274 517
@@ -282,6 +525,7 @@ static int max77686_rtc_start_alarm(struct max77686_rtc_info *info)
282 u8 data[RTC_NR_TIME]; 525 u8 data[RTC_NR_TIME];
283 int ret; 526 int ret;
284 struct rtc_time tm; 527 struct rtc_time tm;
528 const unsigned int *map = info->drv_data->map;
285 529
286 if (!mutex_is_locked(&info->lock)) 530 if (!mutex_is_locked(&info->lock))
287 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 531 dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
@@ -290,32 +534,36 @@ static int max77686_rtc_start_alarm(struct max77686_rtc_info *info)
290 if (ret < 0) 534 if (ret < 0)
291 goto out; 535 goto out;
292 536
293 ret = regmap_bulk_read(info->max77686->rtc_regmap, 537 if (info->drv_data->alarm_enable_reg) {
294 MAX77686_ALARM1_SEC, data, RTC_NR_TIME); 538 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1],
295 if (ret < 0) { 539 MAX77802_ALARM_ENABLE_VALUE);
296 dev_err(info->dev, "%s: fail to read alarm reg(%d)\n", 540 } else {
297 __func__, ret); 541 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC],
298 goto out; 542 data, ARRAY_SIZE(data));
543 if (ret < 0) {
544 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret);
545 goto out;
546 }
547
548 max77686_rtc_data_to_tm(data, &tm, info);
549
550 data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT);
551 data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT);
552 data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT);
553 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
554 if (data[RTC_MONTH] & 0xf)
555 data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT);
556 if (data[RTC_YEAR] & info->drv_data->mask)
557 data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT);
558 if (data[RTC_DATE] & 0x1f)
559 data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT);
560
561 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC],
562 data, ARRAY_SIZE(data));
299 } 563 }
300 564
301 max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode);
302
303 data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT);
304 data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT);
305 data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT);
306 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
307 if (data[RTC_MONTH] & 0xf)
308 data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT);
309 if (data[RTC_YEAR] & 0x7f)
310 data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT);
311 if (data[RTC_DATE] & 0x1f)
312 data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT);
313
314 ret = regmap_bulk_write(info->max77686->rtc_regmap,
315 MAX77686_ALARM1_SEC, data, RTC_NR_TIME);
316 if (ret < 0) { 565 if (ret < 0) {
317 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", 566 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
318 __func__, ret);
319 goto out; 567 goto out;
320 } 568 }
321 569
@@ -330,7 +578,7 @@ static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
330 u8 data[RTC_NR_TIME]; 578 u8 data[RTC_NR_TIME];
331 int ret; 579 int ret;
332 580
333 ret = max77686_rtc_tm_to_data(&alrm->time, data); 581 ret = max77686_rtc_tm_to_data(&alrm->time, data, info);
334 if (ret < 0) 582 if (ret < 0)
335 return ret; 583 return ret;
336 584
@@ -340,12 +588,12 @@ static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
340 if (ret < 0) 588 if (ret < 0)
341 goto out; 589 goto out;
342 590
343 ret = regmap_bulk_write(info->max77686->rtc_regmap, 591 ret = regmap_bulk_write(info->rtc_regmap,
344 MAX77686_ALARM1_SEC, data, RTC_NR_TIME); 592 info->drv_data->map[REG_ALARM1_SEC],
593 data, ARRAY_SIZE(data));
345 594
346 if (ret < 0) { 595 if (ret < 0) {
347 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", 596 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret);
348 __func__, ret);
349 goto out; 597 goto out;
350 } 598 }
351 599
@@ -361,7 +609,7 @@ out:
361} 609}
362 610
363static int max77686_rtc_alarm_irq_enable(struct device *dev, 611static int max77686_rtc_alarm_irq_enable(struct device *dev,
364 unsigned int enabled) 612 unsigned int enabled)
365{ 613{
366 struct max77686_rtc_info *info = dev_get_drvdata(dev); 614 struct max77686_rtc_info *info = dev_get_drvdata(dev);
367 int ret; 615 int ret;
@@ -380,7 +628,7 @@ static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data)
380{ 628{
381 struct max77686_rtc_info *info = data; 629 struct max77686_rtc_info *info = data;
382 630
383 dev_info(info->dev, "%s:irq(%d)\n", __func__, irq); 631 dev_dbg(info->dev, "RTC alarm IRQ: %d\n", irq);
384 632
385 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); 633 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
386 634
@@ -406,10 +654,11 @@ static int max77686_rtc_init_reg(struct max77686_rtc_info *info)
406 654
407 info->rtc_24hr_mode = 1; 655 info->rtc_24hr_mode = 1;
408 656
409 ret = regmap_bulk_write(info->max77686->rtc_regmap, MAX77686_RTC_CONTROLM, data, 2); 657 ret = regmap_bulk_write(info->rtc_regmap,
658 info->drv_data->map[REG_RTC_CONTROLM],
659 data, ARRAY_SIZE(data));
410 if (ret < 0) { 660 if (ret < 0) {
411 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", 661 dev_err(info->dev, "Fail to write controlm reg(%d)\n", ret);
412 __func__, ret);
413 return ret; 662 return ret;
414 } 663 }
415 664
@@ -417,28 +666,97 @@ static int max77686_rtc_init_reg(struct max77686_rtc_info *info)
417 return ret; 666 return ret;
418} 667}
419 668
669static const struct regmap_config max77686_rtc_regmap_config = {
670 .reg_bits = 8,
671 .val_bits = 8,
672};
673
674static int max77686_init_rtc_regmap(struct max77686_rtc_info *info)
675{
676 struct device *parent = info->dev->parent;
677 struct i2c_client *parent_i2c = to_i2c_client(parent);
678 int ret;
679
680 if (info->drv_data->rtc_irq_from_platform) {
681 struct platform_device *pdev = to_platform_device(info->dev);
682
683 info->rtc_irq = platform_get_irq(pdev, 0);
684 if (info->rtc_irq < 0) {
685 dev_err(info->dev, "Failed to get rtc interrupts: %d\n",
686 info->rtc_irq);
687 return info->rtc_irq;
688 }
689 } else {
690 info->rtc_irq = parent_i2c->irq;
691 }
692
693 info->regmap = dev_get_regmap(parent, NULL);
694 if (!info->regmap) {
695 dev_err(info->dev, "Failed to get rtc regmap\n");
696 return -ENODEV;
697 }
698
699 if (info->drv_data->rtc_i2c_addr == MAX77686_INVALID_I2C_ADDR) {
700 info->rtc_regmap = info->regmap;
701 goto add_rtc_irq;
702 }
703
704 info->rtc = i2c_new_dummy(parent_i2c->adapter,
705 info->drv_data->rtc_i2c_addr);
706 if (!info->rtc) {
707 dev_err(info->dev, "Failed to allocate I2C device for RTC\n");
708 return -ENODEV;
709 }
710
711 info->rtc_regmap = devm_regmap_init_i2c(info->rtc,
712 &max77686_rtc_regmap_config);
713 if (IS_ERR(info->rtc_regmap)) {
714 ret = PTR_ERR(info->rtc_regmap);
715 dev_err(info->dev, "Failed to allocate RTC regmap: %d\n", ret);
716 goto err_unregister_i2c;
717 }
718
719add_rtc_irq:
720 ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq,
721 IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
722 IRQF_SHARED, 0, info->drv_data->rtc_irq_chip,
723 &info->rtc_irq_data);
724 if (ret < 0) {
725 dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret);
726 goto err_unregister_i2c;
727 }
728
729 return 0;
730
731err_unregister_i2c:
732 if (info->rtc)
733 i2c_unregister_device(info->rtc);
734 return ret;
735}
736
420static int max77686_rtc_probe(struct platform_device *pdev) 737static int max77686_rtc_probe(struct platform_device *pdev)
421{ 738{
422 struct max77686_dev *max77686 = dev_get_drvdata(pdev->dev.parent);
423 struct max77686_rtc_info *info; 739 struct max77686_rtc_info *info;
740 const struct platform_device_id *id = platform_get_device_id(pdev);
424 int ret; 741 int ret;
425 742
426 dev_info(&pdev->dev, "%s\n", __func__);
427
428 info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info), 743 info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info),
429 GFP_KERNEL); 744 GFP_KERNEL);
430 if (!info) 745 if (!info)
431 return -ENOMEM; 746 return -ENOMEM;
432 747
433 mutex_init(&info->lock); 748 mutex_init(&info->lock);
434 info->dev = &pdev->dev; 749 info->dev = &pdev->dev;
435 info->max77686 = max77686; 750 info->drv_data = (const struct max77686_rtc_driver_data *)
436 info->rtc = max77686->rtc; 751 id->driver_data;
752
753 ret = max77686_init_rtc_regmap(info);
754 if (ret < 0)
755 return ret;
437 756
438 platform_set_drvdata(pdev, info); 757 platform_set_drvdata(pdev, info);
439 758
440 ret = max77686_rtc_init_reg(info); 759 ret = max77686_rtc_init_reg(info);
441
442 if (ret < 0) { 760 if (ret < 0) {
443 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret); 761 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret);
444 goto err_rtc; 762 goto err_rtc;
@@ -446,7 +764,7 @@ static int max77686_rtc_probe(struct platform_device *pdev)
446 764
447 device_init_wakeup(&pdev->dev, 1); 765 device_init_wakeup(&pdev->dev, 1);
448 766
449 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "max77686-rtc", 767 info->rtc_dev = devm_rtc_device_register(&pdev->dev, id->name,
450 &max77686_rtc_ops, THIS_MODULE); 768 &max77686_rtc_ops, THIS_MODULE);
451 769
452 if (IS_ERR(info->rtc_dev)) { 770 if (IS_ERR(info->rtc_dev)) {
@@ -457,29 +775,43 @@ static int max77686_rtc_probe(struct platform_device *pdev)
457 goto err_rtc; 775 goto err_rtc;
458 } 776 }
459 777
460 if (!max77686->rtc_irq_data) { 778 info->virq = regmap_irq_get_virq(info->rtc_irq_data,
461 ret = -EINVAL;
462 dev_err(&pdev->dev, "%s: no RTC regmap IRQ chip\n", __func__);
463 goto err_rtc;
464 }
465
466 info->virq = regmap_irq_get_virq(max77686->rtc_irq_data,
467 MAX77686_RTCIRQ_RTCA1); 779 MAX77686_RTCIRQ_RTCA1);
468 if (!info->virq) { 780 if (info->virq <= 0) {
469 ret = -ENXIO; 781 ret = -ENXIO;
470 goto err_rtc; 782 goto err_rtc;
471 } 783 }
472 784
473 ret = devm_request_threaded_irq(&pdev->dev, info->virq, NULL, 785 ret = request_threaded_irq(info->virq, NULL, max77686_rtc_alarm_irq, 0,
474 max77686_rtc_alarm_irq, 0, "rtc-alarm1", info); 786 "rtc-alarm1", info);
475 if (ret < 0) 787 if (ret < 0) {
476 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", 788 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
477 info->virq, ret); 789 info->virq, ret);
790 goto err_rtc;
791 }
792
793 return 0;
478 794
479err_rtc: 795err_rtc:
796 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data);
797 if (info->rtc)
798 i2c_unregister_device(info->rtc);
799
480 return ret; 800 return ret;
481} 801}
482 802
803static int max77686_rtc_remove(struct platform_device *pdev)
804{
805 struct max77686_rtc_info *info = platform_get_drvdata(pdev);
806
807 free_irq(info->virq, info);
808 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data);
809 if (info->rtc)
810 i2c_unregister_device(info->rtc);
811
812 return 0;
813}
814
483#ifdef CONFIG_PM_SLEEP 815#ifdef CONFIG_PM_SLEEP
484static int max77686_rtc_suspend(struct device *dev) 816static int max77686_rtc_suspend(struct device *dev)
485{ 817{
@@ -508,7 +840,9 @@ static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops,
508 max77686_rtc_suspend, max77686_rtc_resume); 840 max77686_rtc_suspend, max77686_rtc_resume);
509 841
510static const struct platform_device_id rtc_id[] = { 842static const struct platform_device_id rtc_id[] = {
511 { "max77686-rtc", 0 }, 843 { "max77686-rtc", .driver_data = (kernel_ulong_t)&max77686_drv_data, },
844 { "max77802-rtc", .driver_data = (kernel_ulong_t)&max77802_drv_data, },
845 { "max77620-rtc", .driver_data = (kernel_ulong_t)&max77620_drv_data, },
512 {}, 846 {},
513}; 847};
514MODULE_DEVICE_TABLE(platform, rtc_id); 848MODULE_DEVICE_TABLE(platform, rtc_id);
@@ -519,6 +853,7 @@ static struct platform_driver max77686_rtc_driver = {
519 .pm = &max77686_rtc_pm_ops, 853 .pm = &max77686_rtc_pm_ops,
520 }, 854 },
521 .probe = max77686_rtc_probe, 855 .probe = max77686_rtc_probe,
856 .remove = max77686_rtc_remove,
522 .id_table = rtc_id, 857 .id_table = rtc_id,
523}; 858};
524 859
diff --git a/drivers/rtc/rtc-max77802.c b/drivers/rtc/rtc-max77802.c
deleted file mode 100644
index 82ffcc5a5345..000000000000
--- a/drivers/rtc/rtc-max77802.c
+++ /dev/null
@@ -1,502 +0,0 @@
1/*
2 * RTC driver for Maxim MAX77802
3 *
4 * Copyright (C) 2013 Google, Inc
5 *
6 * Copyright (C) 2012 Samsung Electronics Co.Ltd
7 *
8 * based on rtc-max8997.c
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17#include <linux/slab.h>
18#include <linux/rtc.h>
19#include <linux/delay.h>
20#include <linux/mutex.h>
21#include <linux/module.h>
22#include <linux/platform_device.h>
23#include <linux/mfd/max77686-private.h>
24#include <linux/irqdomain.h>
25#include <linux/regmap.h>
26
27/* RTC Control Register */
28#define BCD_EN_SHIFT 0
29#define BCD_EN_MASK (1 << BCD_EN_SHIFT)
30#define MODEL24_SHIFT 1
31#define MODEL24_MASK (1 << MODEL24_SHIFT)
32/* RTC Update Register1 */
33#define RTC_UDR_SHIFT 0
34#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT)
35#define RTC_RBUDR_SHIFT 4
36#define RTC_RBUDR_MASK (1 << RTC_RBUDR_SHIFT)
37/* RTC Hour register */
38#define HOUR_PM_SHIFT 6
39#define HOUR_PM_MASK (1 << HOUR_PM_SHIFT)
40/* RTC Alarm Enable */
41#define ALARM_ENABLE_SHIFT 7
42#define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT)
43
44/* For the RTCAE1 register, we write this value to enable the alarm */
45#define ALARM_ENABLE_VALUE 0x77
46
47#define MAX77802_RTC_UPDATE_DELAY_US 200
48
49enum {
50 RTC_SEC = 0,
51 RTC_MIN,
52 RTC_HOUR,
53 RTC_WEEKDAY,
54 RTC_MONTH,
55 RTC_YEAR,
56 RTC_DATE,
57 RTC_NR_TIME
58};
59
60struct max77802_rtc_info {
61 struct device *dev;
62 struct max77686_dev *max77802;
63 struct i2c_client *rtc;
64 struct rtc_device *rtc_dev;
65 struct mutex lock;
66
67 struct regmap *regmap;
68
69 int virq;
70 int rtc_24hr_mode;
71};
72
73enum MAX77802_RTC_OP {
74 MAX77802_RTC_WRITE,
75 MAX77802_RTC_READ,
76};
77
78static void max77802_rtc_data_to_tm(u8 *data, struct rtc_time *tm,
79 int rtc_24hr_mode)
80{
81 tm->tm_sec = data[RTC_SEC] & 0xff;
82 tm->tm_min = data[RTC_MIN] & 0xff;
83 if (rtc_24hr_mode)
84 tm->tm_hour = data[RTC_HOUR] & 0x1f;
85 else {
86 tm->tm_hour = data[RTC_HOUR] & 0x0f;
87 if (data[RTC_HOUR] & HOUR_PM_MASK)
88 tm->tm_hour += 12;
89 }
90
91 /* Only a single bit is set in data[], so fls() would be equivalent */
92 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0xff) - 1;
93 tm->tm_mday = data[RTC_DATE] & 0x1f;
94 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
95
96 tm->tm_year = data[RTC_YEAR] & 0xff;
97 tm->tm_yday = 0;
98 tm->tm_isdst = 0;
99}
100
101static int max77802_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
102{
103 data[RTC_SEC] = tm->tm_sec;
104 data[RTC_MIN] = tm->tm_min;
105 data[RTC_HOUR] = tm->tm_hour;
106 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
107 data[RTC_DATE] = tm->tm_mday;
108 data[RTC_MONTH] = tm->tm_mon + 1;
109 data[RTC_YEAR] = tm->tm_year;
110
111 return 0;
112}
113
114static int max77802_rtc_update(struct max77802_rtc_info *info,
115 enum MAX77802_RTC_OP op)
116{
117 int ret;
118 unsigned int data;
119
120 if (op == MAX77802_RTC_WRITE)
121 data = 1 << RTC_UDR_SHIFT;
122 else
123 data = 1 << RTC_RBUDR_SHIFT;
124
125 ret = regmap_update_bits(info->max77802->regmap,
126 MAX77802_RTC_UPDATE0, data, data);
127 if (ret < 0)
128 dev_err(info->dev, "%s: fail to write update reg(ret=%d, data=0x%x)\n",
129 __func__, ret, data);
130 else {
131 /* Minimum delay required before RTC update. */
132 usleep_range(MAX77802_RTC_UPDATE_DELAY_US,
133 MAX77802_RTC_UPDATE_DELAY_US * 2);
134 }
135
136 return ret;
137}
138
139static int max77802_rtc_read_time(struct device *dev, struct rtc_time *tm)
140{
141 struct max77802_rtc_info *info = dev_get_drvdata(dev);
142 u8 data[RTC_NR_TIME];
143 int ret;
144
145 mutex_lock(&info->lock);
146
147 ret = max77802_rtc_update(info, MAX77802_RTC_READ);
148 if (ret < 0)
149 goto out;
150
151 ret = regmap_bulk_read(info->max77802->regmap,
152 MAX77802_RTC_SEC, data, RTC_NR_TIME);
153 if (ret < 0) {
154 dev_err(info->dev, "%s: fail to read time reg(%d)\n", __func__,
155 ret);
156 goto out;
157 }
158
159 max77802_rtc_data_to_tm(data, tm, info->rtc_24hr_mode);
160
161 ret = rtc_valid_tm(tm);
162
163out:
164 mutex_unlock(&info->lock);
165 return ret;
166}
167
168static int max77802_rtc_set_time(struct device *dev, struct rtc_time *tm)
169{
170 struct max77802_rtc_info *info = dev_get_drvdata(dev);
171 u8 data[RTC_NR_TIME];
172 int ret;
173
174 ret = max77802_rtc_tm_to_data(tm, data);
175 if (ret < 0)
176 return ret;
177
178 mutex_lock(&info->lock);
179
180 ret = regmap_bulk_write(info->max77802->regmap,
181 MAX77802_RTC_SEC, data, RTC_NR_TIME);
182 if (ret < 0) {
183 dev_err(info->dev, "%s: fail to write time reg(%d)\n", __func__,
184 ret);
185 goto out;
186 }
187
188 ret = max77802_rtc_update(info, MAX77802_RTC_WRITE);
189
190out:
191 mutex_unlock(&info->lock);
192 return ret;
193}
194
195static int max77802_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
196{
197 struct max77802_rtc_info *info = dev_get_drvdata(dev);
198 u8 data[RTC_NR_TIME];
199 unsigned int val;
200 int ret;
201
202 mutex_lock(&info->lock);
203
204 ret = max77802_rtc_update(info, MAX77802_RTC_READ);
205 if (ret < 0)
206 goto out;
207
208 ret = regmap_bulk_read(info->max77802->regmap,
209 MAX77802_ALARM1_SEC, data, RTC_NR_TIME);
210 if (ret < 0) {
211 dev_err(info->dev, "%s:%d fail to read alarm reg(%d)\n",
212 __func__, __LINE__, ret);
213 goto out;
214 }
215
216 max77802_rtc_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
217
218 alrm->enabled = 0;
219 ret = regmap_read(info->max77802->regmap,
220 MAX77802_RTC_AE1, &val);
221 if (ret < 0) {
222 dev_err(info->dev, "%s:%d fail to read alarm enable(%d)\n",
223 __func__, __LINE__, ret);
224 goto out;
225 }
226 if (val)
227 alrm->enabled = 1;
228
229 alrm->pending = 0;
230 ret = regmap_read(info->max77802->regmap, MAX77802_REG_STATUS2, &val);
231 if (ret < 0) {
232 dev_err(info->dev, "%s:%d fail to read status2 reg(%d)\n",
233 __func__, __LINE__, ret);
234 goto out;
235 }
236
237 if (val & (1 << 2)) /* RTCA1 */
238 alrm->pending = 1;
239
240out:
241 mutex_unlock(&info->lock);
242 return 0;
243}
244
245static int max77802_rtc_stop_alarm(struct max77802_rtc_info *info)
246{
247 int ret;
248
249 if (!mutex_is_locked(&info->lock))
250 dev_warn(info->dev, "%s: should have mutex locked\n", __func__);
251
252 ret = max77802_rtc_update(info, MAX77802_RTC_READ);
253 if (ret < 0)
254 goto out;
255
256 ret = regmap_write(info->max77802->regmap,
257 MAX77802_RTC_AE1, 0);
258 if (ret < 0) {
259 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
260 __func__, ret);
261 goto out;
262 }
263
264 ret = max77802_rtc_update(info, MAX77802_RTC_WRITE);
265out:
266 return ret;
267}
268
269static int max77802_rtc_start_alarm(struct max77802_rtc_info *info)
270{
271 int ret;
272
273 if (!mutex_is_locked(&info->lock))
274 dev_warn(info->dev, "%s: should have mutex locked\n",
275 __func__);
276
277 ret = max77802_rtc_update(info, MAX77802_RTC_READ);
278 if (ret < 0)
279 goto out;
280
281 ret = regmap_write(info->max77802->regmap,
282 MAX77802_RTC_AE1,
283 ALARM_ENABLE_VALUE);
284
285 if (ret < 0) {
286 dev_err(info->dev, "%s: fail to read alarm reg(%d)\n",
287 __func__, ret);
288 goto out;
289 }
290
291 ret = max77802_rtc_update(info, MAX77802_RTC_WRITE);
292out:
293 return ret;
294}
295
296static int max77802_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
297{
298 struct max77802_rtc_info *info = dev_get_drvdata(dev);
299 u8 data[RTC_NR_TIME];
300 int ret;
301
302 ret = max77802_rtc_tm_to_data(&alrm->time, data);
303 if (ret < 0)
304 return ret;
305
306 mutex_lock(&info->lock);
307
308 ret = max77802_rtc_stop_alarm(info);
309 if (ret < 0)
310 goto out;
311
312 ret = regmap_bulk_write(info->max77802->regmap,
313 MAX77802_ALARM1_SEC, data, RTC_NR_TIME);
314
315 if (ret < 0) {
316 dev_err(info->dev, "%s: fail to write alarm reg(%d)\n",
317 __func__, ret);
318 goto out;
319 }
320
321 ret = max77802_rtc_update(info, MAX77802_RTC_WRITE);
322 if (ret < 0)
323 goto out;
324
325 if (alrm->enabled)
326 ret = max77802_rtc_start_alarm(info);
327out:
328 mutex_unlock(&info->lock);
329 return ret;
330}
331
332static int max77802_rtc_alarm_irq_enable(struct device *dev,
333 unsigned int enabled)
334{
335 struct max77802_rtc_info *info = dev_get_drvdata(dev);
336 int ret;
337
338 mutex_lock(&info->lock);
339 if (enabled)
340 ret = max77802_rtc_start_alarm(info);
341 else
342 ret = max77802_rtc_stop_alarm(info);
343 mutex_unlock(&info->lock);
344
345 return ret;
346}
347
348static irqreturn_t max77802_rtc_alarm_irq(int irq, void *data)
349{
350 struct max77802_rtc_info *info = data;
351
352 dev_dbg(info->dev, "%s:irq(%d)\n", __func__, irq);
353
354 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
355
356 return IRQ_HANDLED;
357}
358
359static const struct rtc_class_ops max77802_rtc_ops = {
360 .read_time = max77802_rtc_read_time,
361 .set_time = max77802_rtc_set_time,
362 .read_alarm = max77802_rtc_read_alarm,
363 .set_alarm = max77802_rtc_set_alarm,
364 .alarm_irq_enable = max77802_rtc_alarm_irq_enable,
365};
366
367static int max77802_rtc_init_reg(struct max77802_rtc_info *info)
368{
369 u8 data[2];
370 int ret;
371
372 max77802_rtc_update(info, MAX77802_RTC_READ);
373
374 /* Set RTC control register : Binary mode, 24hour mdoe */
375 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
376 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
377
378 info->rtc_24hr_mode = 1;
379
380 ret = regmap_bulk_write(info->max77802->regmap,
381 MAX77802_RTC_CONTROLM, data, ARRAY_SIZE(data));
382 if (ret < 0) {
383 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
384 __func__, ret);
385 return ret;
386 }
387
388 ret = max77802_rtc_update(info, MAX77802_RTC_WRITE);
389 return ret;
390}
391
392static int max77802_rtc_probe(struct platform_device *pdev)
393{
394 struct max77686_dev *max77802 = dev_get_drvdata(pdev->dev.parent);
395 struct max77802_rtc_info *info;
396 int ret;
397
398 dev_dbg(&pdev->dev, "%s\n", __func__);
399
400 info = devm_kzalloc(&pdev->dev, sizeof(struct max77802_rtc_info),
401 GFP_KERNEL);
402 if (!info)
403 return -ENOMEM;
404
405 mutex_init(&info->lock);
406 info->dev = &pdev->dev;
407 info->max77802 = max77802;
408 info->rtc = max77802->i2c;
409
410 platform_set_drvdata(pdev, info);
411
412 ret = max77802_rtc_init_reg(info);
413
414 if (ret < 0) {
415 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret);
416 return ret;
417 }
418
419 device_init_wakeup(&pdev->dev, 1);
420
421 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "max77802-rtc",
422 &max77802_rtc_ops, THIS_MODULE);
423
424 if (IS_ERR(info->rtc_dev)) {
425 ret = PTR_ERR(info->rtc_dev);
426 dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
427 if (ret == 0)
428 ret = -EINVAL;
429 return ret;
430 }
431
432 if (!max77802->rtc_irq_data) {
433 dev_err(&pdev->dev, "No RTC regmap IRQ chip\n");
434 return -EINVAL;
435 }
436
437 info->virq = regmap_irq_get_virq(max77802->rtc_irq_data,
438 MAX77686_RTCIRQ_RTCA1);
439
440 if (info->virq <= 0) {
441 dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
442 MAX77686_RTCIRQ_RTCA1);
443 return -EINVAL;
444 }
445
446 ret = devm_request_threaded_irq(&pdev->dev, info->virq, NULL,
447 max77802_rtc_alarm_irq, 0, "rtc-alarm1",
448 info);
449 if (ret < 0)
450 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
451 info->virq, ret);
452
453 return ret;
454}
455
456#ifdef CONFIG_PM_SLEEP
457static int max77802_rtc_suspend(struct device *dev)
458{
459 if (device_may_wakeup(dev)) {
460 struct max77802_rtc_info *info = dev_get_drvdata(dev);
461
462 return enable_irq_wake(info->virq);
463 }
464
465 return 0;
466}
467
468static int max77802_rtc_resume(struct device *dev)
469{
470 if (device_may_wakeup(dev)) {
471 struct max77802_rtc_info *info = dev_get_drvdata(dev);
472
473 return disable_irq_wake(info->virq);
474 }
475
476 return 0;
477}
478#endif
479
480static SIMPLE_DEV_PM_OPS(max77802_rtc_pm_ops,
481 max77802_rtc_suspend, max77802_rtc_resume);
482
483static const struct platform_device_id rtc_id[] = {
484 { "max77802-rtc", 0 },
485 {},
486};
487MODULE_DEVICE_TABLE(platform, rtc_id);
488
489static struct platform_driver max77802_rtc_driver = {
490 .driver = {
491 .name = "max77802-rtc",
492 .pm = &max77802_rtc_pm_ops,
493 },
494 .probe = max77802_rtc_probe,
495 .id_table = rtc_id,
496};
497
498module_platform_driver(max77802_rtc_driver);
499
500MODULE_DESCRIPTION("Maxim MAX77802 RTC driver");
501MODULE_AUTHOR("Simon Glass <sjg@chromium.org>");
502MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c
index 06a5c52b292f..44f622c3e048 100644
--- a/drivers/rtc/rtc-mt6397.c
+++ b/drivers/rtc/rtc-mt6397.c
@@ -419,4 +419,3 @@ module_platform_driver(mtk_rtc_driver);
419MODULE_LICENSE("GPL v2"); 419MODULE_LICENSE("GPL v2");
420MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>"); 420MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
421MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC"); 421MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");
422MODULE_ALIAS("platform:mt6397-rtc");
diff --git a/drivers/rtc/rtc-palmas.c b/drivers/rtc/rtc-palmas.c
index 7ea2c471feca..6080e0edef63 100644
--- a/drivers/rtc/rtc-palmas.c
+++ b/drivers/rtc/rtc-palmas.c
@@ -311,8 +311,7 @@ static int palmas_rtc_probe(struct platform_device *pdev)
311 311
312 ret = devm_request_threaded_irq(&pdev->dev, palmas_rtc->irq, NULL, 312 ret = devm_request_threaded_irq(&pdev->dev, palmas_rtc->irq, NULL,
313 palmas_rtc_interrupt, 313 palmas_rtc_interrupt,
314 IRQF_TRIGGER_LOW | IRQF_ONESHOT | 314 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
315 IRQF_EARLY_RESUME,
316 dev_name(&pdev->dev), palmas_rtc); 315 dev_name(&pdev->dev), palmas_rtc);
317 if (ret < 0) { 316 if (ret < 0) {
318 dev_err(&pdev->dev, "IRQ request failed, err = %d\n", ret); 317 dev_err(&pdev->dev, "IRQ request failed, err = %d\n", ret);
diff --git a/drivers/rtc/rtc-pcf2123.c b/drivers/rtc/rtc-pcf2123.c
index ea8a31c91641..da27738b1242 100644
--- a/drivers/rtc/rtc-pcf2123.c
+++ b/drivers/rtc/rtc-pcf2123.c
@@ -48,6 +48,7 @@
48 48
49#define DRV_VERSION "0.6" 49#define DRV_VERSION "0.6"
50 50
51/* REGISTERS */
51#define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */ 52#define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */
52#define PCF2123_REG_CTRL2 (0x01) /* Control Register 2 */ 53#define PCF2123_REG_CTRL2 (0x01) /* Control Register 2 */
53#define PCF2123_REG_SC (0x02) /* datetime */ 54#define PCF2123_REG_SC (0x02) /* datetime */
@@ -57,10 +58,54 @@
57#define PCF2123_REG_DW (0x06) 58#define PCF2123_REG_DW (0x06)
58#define PCF2123_REG_MO (0x07) 59#define PCF2123_REG_MO (0x07)
59#define PCF2123_REG_YR (0x08) 60#define PCF2123_REG_YR (0x08)
61#define PCF2123_REG_ALRM_MN (0x09) /* Alarm Registers */
62#define PCF2123_REG_ALRM_HR (0x0a)
63#define PCF2123_REG_ALRM_DM (0x0b)
64#define PCF2123_REG_ALRM_DW (0x0c)
65#define PCF2123_REG_OFFSET (0x0d) /* Clock Rate Offset Register */
66#define PCF2123_REG_TMR_CLKOUT (0x0e) /* Timer Registers */
67#define PCF2123_REG_CTDWN_TMR (0x0f)
68
69/* PCF2123_REG_CTRL1 BITS */
70#define CTRL1_CLEAR (0) /* Clear */
71#define CTRL1_CORR_INT BIT(1) /* Correction irq enable */
72#define CTRL1_12_HOUR BIT(2) /* 12 hour time */
73#define CTRL1_SW_RESET (BIT(3) | BIT(4) | BIT(6)) /* Software reset */
74#define CTRL1_STOP BIT(5) /* Stop the clock */
75#define CTRL1_EXT_TEST BIT(7) /* External clock test mode */
76
77/* PCF2123_REG_CTRL2 BITS */
78#define CTRL2_TIE BIT(0) /* Countdown timer irq enable */
79#define CTRL2_AIE BIT(1) /* Alarm irq enable */
80#define CTRL2_TF BIT(2) /* Countdown timer flag */
81#define CTRL2_AF BIT(3) /* Alarm flag */
82#define CTRL2_TI_TP BIT(4) /* Irq pin generates pulse */
83#define CTRL2_MSF BIT(5) /* Minute or second irq flag */
84#define CTRL2_SI BIT(6) /* Second irq enable */
85#define CTRL2_MI BIT(7) /* Minute irq enable */
86
87/* PCF2123_REG_SC BITS */
88#define OSC_HAS_STOPPED BIT(7) /* Clock has been stopped */
89
90/* PCF2123_REG_ALRM_XX BITS */
91#define ALRM_ENABLE BIT(7) /* MN, HR, DM, or DW alarm enable */
92
93/* PCF2123_REG_TMR_CLKOUT BITS */
94#define CD_TMR_4096KHZ (0) /* 4096 KHz countdown timer */
95#define CD_TMR_64HZ (1) /* 64 Hz countdown timer */
96#define CD_TMR_1HZ (2) /* 1 Hz countdown timer */
97#define CD_TMR_60th_HZ (3) /* 60th Hz countdown timer */
98#define CD_TMR_TE BIT(3) /* Countdown timer enable */
99
100/* PCF2123_REG_OFFSET BITS */
101#define OFFSET_SIGN_BIT BIT(6) /* 2's complement sign bit */
102#define OFFSET_COARSE BIT(7) /* Coarse mode offset */
103#define OFFSET_STEP (2170) /* Offset step in parts per billion */
104
105/* READ/WRITE ADDRESS BITS */
106#define PCF2123_WRITE BIT(4)
107#define PCF2123_READ (BIT(4) | BIT(7))
60 108
61#define PCF2123_SUBADDR (1 << 4)
62#define PCF2123_WRITE ((0 << 7) | PCF2123_SUBADDR)
63#define PCF2123_READ ((1 << 7) | PCF2123_SUBADDR)
64 109
65static struct spi_driver pcf2123_driver; 110static struct spi_driver pcf2123_driver;
66 111
@@ -84,12 +129,44 @@ static inline void pcf2123_delay_trec(void)
84 ndelay(30); 129 ndelay(30);
85} 130}
86 131
132static int pcf2123_read(struct device *dev, u8 reg, u8 *rxbuf, size_t size)
133{
134 struct spi_device *spi = to_spi_device(dev);
135 int ret;
136
137 reg |= PCF2123_READ;
138 ret = spi_write_then_read(spi, &reg, 1, rxbuf, size);
139 pcf2123_delay_trec();
140
141 return ret;
142}
143
144static int pcf2123_write(struct device *dev, u8 *txbuf, size_t size)
145{
146 struct spi_device *spi = to_spi_device(dev);
147 int ret;
148
149 txbuf[0] |= PCF2123_WRITE;
150 ret = spi_write(spi, txbuf, size);
151 pcf2123_delay_trec();
152
153 return ret;
154}
155
156static int pcf2123_write_reg(struct device *dev, u8 reg, u8 val)
157{
158 u8 txbuf[2];
159
160 txbuf[0] = reg;
161 txbuf[1] = val;
162 return pcf2123_write(dev, txbuf, sizeof(txbuf));
163}
164
87static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr, 165static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr,
88 char *buffer) 166 char *buffer)
89{ 167{
90 struct spi_device *spi = to_spi_device(dev);
91 struct pcf2123_sysfs_reg *r; 168 struct pcf2123_sysfs_reg *r;
92 u8 txbuf[1], rxbuf[1]; 169 u8 rxbuf[1];
93 unsigned long reg; 170 unsigned long reg;
94 int ret; 171 int ret;
95 172
@@ -99,19 +176,16 @@ static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr,
99 if (ret) 176 if (ret)
100 return ret; 177 return ret;
101 178
102 txbuf[0] = PCF2123_READ | reg; 179 ret = pcf2123_read(dev, reg, rxbuf, 1);
103 ret = spi_write_then_read(spi, txbuf, 1, rxbuf, 1);
104 if (ret < 0) 180 if (ret < 0)
105 return -EIO; 181 return -EIO;
106 pcf2123_delay_trec(); 182
107 return sprintf(buffer, "0x%x\n", rxbuf[0]); 183 return sprintf(buffer, "0x%x\n", rxbuf[0]);
108} 184}
109 185
110static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr, 186static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr,
111 const char *buffer, size_t count) { 187 const char *buffer, size_t count) {
112 struct spi_device *spi = to_spi_device(dev);
113 struct pcf2123_sysfs_reg *r; 188 struct pcf2123_sysfs_reg *r;
114 u8 txbuf[2];
115 unsigned long reg; 189 unsigned long reg;
116 unsigned long val; 190 unsigned long val;
117 191
@@ -127,27 +201,78 @@ static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr,
127 if (ret) 201 if (ret)
128 return ret; 202 return ret;
129 203
130 txbuf[0] = PCF2123_WRITE | reg; 204 pcf2123_write_reg(dev, reg, val);
131 txbuf[1] = val;
132 ret = spi_write(spi, txbuf, sizeof(txbuf));
133 if (ret < 0) 205 if (ret < 0)
134 return -EIO; 206 return -EIO;
135 pcf2123_delay_trec();
136 return count; 207 return count;
137} 208}
138 209
210static int pcf2123_read_offset(struct device *dev, long *offset)
211{
212 int ret;
213 s8 reg;
214
215 ret = pcf2123_read(dev, PCF2123_REG_OFFSET, &reg, 1);
216 if (ret < 0)
217 return ret;
218
219 if (reg & OFFSET_COARSE)
220 reg <<= 1; /* multiply by 2 and sign extend */
221 else
222 reg |= (reg & OFFSET_SIGN_BIT) << 1; /* sign extend only */
223
224 *offset = ((long)reg) * OFFSET_STEP;
225
226 return 0;
227}
228
229/*
230 * The offset register is a 7 bit signed value with a coarse bit in bit 7.
231 * The main difference between the two is normal offset adjusts the first
232 * second of n minutes every other hour, with 61, 62 and 63 being shoved
233 * into the 60th minute.
234 * The coarse adjustment does the same, but every hour.
235 * the two overlap, with every even normal offset value corresponding
236 * to a coarse offset. Based on this algorithm, it seems that despite the
237 * name, coarse offset is a better fit for overlapping values.
238 */
239static int pcf2123_set_offset(struct device *dev, long offset)
240{
241 s8 reg;
242
243 if (offset > OFFSET_STEP * 127)
244 reg = 127;
245 else if (offset < OFFSET_STEP * -128)
246 reg = -128;
247 else
248 reg = (s8)((offset + (OFFSET_STEP >> 1)) / OFFSET_STEP);
249
250 /* choose fine offset only for odd values in the normal range */
251 if (reg & 1 && reg <= 63 && reg >= -64) {
252 /* Normal offset. Clear the coarse bit */
253 reg &= ~OFFSET_COARSE;
254 } else {
255 /* Coarse offset. Divide by 2 and set the coarse bit */
256 reg >>= 1;
257 reg |= OFFSET_COARSE;
258 }
259
260 return pcf2123_write_reg(dev, PCF2123_REG_OFFSET, reg);
261}
262
139static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm) 263static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
140{ 264{
141 struct spi_device *spi = to_spi_device(dev); 265 u8 rxbuf[7];
142 u8 txbuf[1], rxbuf[7];
143 int ret; 266 int ret;
144 267
145 txbuf[0] = PCF2123_READ | PCF2123_REG_SC; 268 ret = pcf2123_read(dev, PCF2123_REG_SC, rxbuf, sizeof(rxbuf));
146 ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
147 rxbuf, sizeof(rxbuf));
148 if (ret < 0) 269 if (ret < 0)
149 return ret; 270 return ret;
150 pcf2123_delay_trec(); 271
272 if (rxbuf[0] & OSC_HAS_STOPPED) {
273 dev_info(dev, "clock was stopped. Time is not valid\n");
274 return -EINVAL;
275 }
151 276
152 tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F); 277 tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F);
153 tm->tm_min = bcd2bin(rxbuf[1] & 0x7F); 278 tm->tm_min = bcd2bin(rxbuf[1] & 0x7F);
@@ -170,7 +295,6 @@ static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
170 295
171static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm) 296static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
172{ 297{
173 struct spi_device *spi = to_spi_device(dev);
174 u8 txbuf[8]; 298 u8 txbuf[8];
175 int ret; 299 int ret;
176 300
@@ -181,15 +305,12 @@ static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
181 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 305 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
182 306
183 /* Stop the counter first */ 307 /* Stop the counter first */
184 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 308 ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_STOP);
185 txbuf[1] = 0x20;
186 ret = spi_write(spi, txbuf, 2);
187 if (ret < 0) 309 if (ret < 0)
188 return ret; 310 return ret;
189 pcf2123_delay_trec();
190 311
191 /* Set the new time */ 312 /* Set the new time */
192 txbuf[0] = PCF2123_WRITE | PCF2123_REG_SC; 313 txbuf[0] = PCF2123_REG_SC;
193 txbuf[1] = bin2bcd(tm->tm_sec & 0x7F); 314 txbuf[1] = bin2bcd(tm->tm_sec & 0x7F);
194 txbuf[2] = bin2bcd(tm->tm_min & 0x7F); 315 txbuf[2] = bin2bcd(tm->tm_min & 0x7F);
195 txbuf[3] = bin2bcd(tm->tm_hour & 0x3F); 316 txbuf[3] = bin2bcd(tm->tm_hour & 0x3F);
@@ -198,18 +319,48 @@ static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
198 txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */ 319 txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */
199 txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100); 320 txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100);
200 321
201 ret = spi_write(spi, txbuf, sizeof(txbuf)); 322 ret = pcf2123_write(dev, txbuf, sizeof(txbuf));
202 if (ret < 0) 323 if (ret < 0)
203 return ret; 324 return ret;
204 pcf2123_delay_trec();
205 325
206 /* Start the counter */ 326 /* Start the counter */
207 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 327 ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_CLEAR);
208 txbuf[1] = 0x00; 328 if (ret < 0)
209 ret = spi_write(spi, txbuf, 2); 329 return ret;
330
331 return 0;
332}
333
334static int pcf2123_reset(struct device *dev)
335{
336 int ret;
337 u8 rxbuf[2];
338
339 ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_SW_RESET);
340 if (ret < 0)
341 return ret;
342
343 /* Stop the counter */
344 dev_dbg(dev, "stopping RTC\n");
345 ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_STOP);
346 if (ret < 0)
347 return ret;
348
349 /* See if the counter was actually stopped */
350 dev_dbg(dev, "checking for presence of RTC\n");
351 ret = pcf2123_read(dev, PCF2123_REG_CTRL1, rxbuf, sizeof(rxbuf));
352 if (ret < 0)
353 return ret;
354
355 dev_dbg(dev, "received data from RTC (0x%02X 0x%02X)\n",
356 rxbuf[0], rxbuf[1]);
357 if (!(rxbuf[0] & CTRL1_STOP))
358 return -ENODEV;
359
360 /* Start the counter */
361 ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_CLEAR);
210 if (ret < 0) 362 if (ret < 0)
211 return ret; 363 return ret;
212 pcf2123_delay_trec();
213 364
214 return 0; 365 return 0;
215} 366}
@@ -217,13 +368,16 @@ static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
217static const struct rtc_class_ops pcf2123_rtc_ops = { 368static const struct rtc_class_ops pcf2123_rtc_ops = {
218 .read_time = pcf2123_rtc_read_time, 369 .read_time = pcf2123_rtc_read_time,
219 .set_time = pcf2123_rtc_set_time, 370 .set_time = pcf2123_rtc_set_time,
371 .read_offset = pcf2123_read_offset,
372 .set_offset = pcf2123_set_offset,
373
220}; 374};
221 375
222static int pcf2123_probe(struct spi_device *spi) 376static int pcf2123_probe(struct spi_device *spi)
223{ 377{
224 struct rtc_device *rtc; 378 struct rtc_device *rtc;
379 struct rtc_time tm;
225 struct pcf2123_plat_data *pdata; 380 struct pcf2123_plat_data *pdata;
226 u8 txbuf[2], rxbuf[2];
227 int ret, i; 381 int ret, i;
228 382
229 pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data), 383 pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data),
@@ -232,56 +386,19 @@ static int pcf2123_probe(struct spi_device *spi)
232 return -ENOMEM; 386 return -ENOMEM;
233 spi->dev.platform_data = pdata; 387 spi->dev.platform_data = pdata;
234 388
235 /* Send a software reset command */ 389 ret = pcf2123_rtc_read_time(&spi->dev, &tm);
236 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 390 if (ret < 0) {
237 txbuf[1] = 0x58; 391 ret = pcf2123_reset(&spi->dev);
238 dev_dbg(&spi->dev, "resetting RTC (0x%02X 0x%02X)\n", 392 if (ret < 0) {
239 txbuf[0], txbuf[1]); 393 dev_err(&spi->dev, "chip not found\n");
240 ret = spi_write(spi, txbuf, 2 * sizeof(u8)); 394 goto kfree_exit;
241 if (ret < 0) 395 }
242 goto kfree_exit;
243 pcf2123_delay_trec();
244
245 /* Stop the counter */
246 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
247 txbuf[1] = 0x20;
248 dev_dbg(&spi->dev, "stopping RTC (0x%02X 0x%02X)\n",
249 txbuf[0], txbuf[1]);
250 ret = spi_write(spi, txbuf, 2 * sizeof(u8));
251 if (ret < 0)
252 goto kfree_exit;
253 pcf2123_delay_trec();
254
255 /* See if the counter was actually stopped */
256 txbuf[0] = PCF2123_READ | PCF2123_REG_CTRL1;
257 dev_dbg(&spi->dev, "checking for presence of RTC (0x%02X)\n",
258 txbuf[0]);
259 ret = spi_write_then_read(spi, txbuf, 1 * sizeof(u8),
260 rxbuf, 2 * sizeof(u8));
261 dev_dbg(&spi->dev, "received data from RTC (0x%02X 0x%02X)\n",
262 rxbuf[0], rxbuf[1]);
263 if (ret < 0)
264 goto kfree_exit;
265 pcf2123_delay_trec();
266
267 if (!(rxbuf[0] & 0x20)) {
268 dev_err(&spi->dev, "chip not found\n");
269 ret = -ENODEV;
270 goto kfree_exit;
271 } 396 }
272 397
273 dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n"); 398 dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n");
274 dev_info(&spi->dev, "spiclk %u KHz.\n", 399 dev_info(&spi->dev, "spiclk %u KHz.\n",
275 (spi->max_speed_hz + 500) / 1000); 400 (spi->max_speed_hz + 500) / 1000);
276 401
277 /* Start the counter */
278 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
279 txbuf[1] = 0x00;
280 ret = spi_write(spi, txbuf, sizeof(txbuf));
281 if (ret < 0)
282 goto kfree_exit;
283 pcf2123_delay_trec();
284
285 /* Finalize the initialization */ 402 /* Finalize the initialization */
286 rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name, 403 rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name,
287 &pcf2123_rtc_ops, THIS_MODULE); 404 &pcf2123_rtc_ops, THIS_MODULE);
diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
index 629bfdf8c745..2bfdf638b673 100644
--- a/drivers/rtc/rtc-pcf2127.c
+++ b/drivers/rtc/rtc-pcf2127.c
@@ -1,12 +1,12 @@
1/* 1/*
2 * An I2C driver for the NXP PCF2127 RTC 2 * An I2C and SPI driver for the NXP PCF2127/29 RTC
3 * Copyright 2013 Til-Technologies 3 * Copyright 2013 Til-Technologies
4 * 4 *
5 * Author: Renaud Cerrato <r.cerrato@til-technologies.fr> 5 * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
6 * 6 *
7 * based on the other drivers in this same directory. 7 * based on the other drivers in this same directory.
8 * 8 *
9 * http://www.nxp.com/documents/data_sheet/PCF2127AT.pdf 9 * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
10 * 10 *
11 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
@@ -14,11 +14,13 @@
14 */ 14 */
15 15
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/spi/spi.h>
17#include <linux/bcd.h> 18#include <linux/bcd.h>
18#include <linux/rtc.h> 19#include <linux/rtc.h>
19#include <linux/slab.h> 20#include <linux/slab.h>
20#include <linux/module.h> 21#include <linux/module.h>
21#include <linux/of.h> 22#include <linux/of.h>
23#include <linux/regmap.h>
22 24
23#define PCF2127_REG_CTRL1 (0x00) /* Control Register 1 */ 25#define PCF2127_REG_CTRL1 (0x00) /* Control Register 1 */
24#define PCF2127_REG_CTRL2 (0x01) /* Control Register 2 */ 26#define PCF2127_REG_CTRL2 (0x01) /* Control Register 2 */
@@ -36,29 +38,30 @@
36 38
37#define PCF2127_OSF BIT(7) /* Oscillator Fail flag */ 39#define PCF2127_OSF BIT(7) /* Oscillator Fail flag */
38 40
39static struct i2c_driver pcf2127_driver;
40
41struct pcf2127 { 41struct pcf2127 {
42 struct rtc_device *rtc; 42 struct rtc_device *rtc;
43 struct regmap *regmap;
43}; 44};
44 45
45/* 46/*
46 * In the routines that deal directly with the pcf2127 hardware, we use 47 * In the routines that deal directly with the pcf2127 hardware, we use
47 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch. 48 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
48 */ 49 */
49static int pcf2127_get_datetime(struct i2c_client *client, struct rtc_time *tm) 50static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
50{ 51{
51 unsigned char buf[10] = { PCF2127_REG_CTRL1 }; 52 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
53 unsigned char buf[10];
54 int ret;
52 55
53 /* read registers */ 56 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, buf,
54 if (i2c_master_send(client, buf, 1) != 1 || 57 sizeof(buf));
55 i2c_master_recv(client, buf, sizeof(buf)) != sizeof(buf)) { 58 if (ret) {
56 dev_err(&client->dev, "%s: read error\n", __func__); 59 dev_err(dev, "%s: read error\n", __func__);
57 return -EIO; 60 return ret;
58 } 61 }
59 62
60 if (buf[PCF2127_REG_CTRL3] & PCF2127_REG_CTRL3_BLF) 63 if (buf[PCF2127_REG_CTRL3] & PCF2127_REG_CTRL3_BLF)
61 dev_info(&client->dev, 64 dev_info(dev,
62 "low voltage detected, check/replace RTC battery.\n"); 65 "low voltage detected, check/replace RTC battery.\n");
63 66
64 if (buf[PCF2127_REG_SC] & PCF2127_OSF) { 67 if (buf[PCF2127_REG_SC] & PCF2127_OSF) {
@@ -66,12 +69,12 @@ static int pcf2127_get_datetime(struct i2c_client *client, struct rtc_time *tm)
66 * no need clear the flag here, 69 * no need clear the flag here,
67 * it will be cleared once the new date is saved 70 * it will be cleared once the new date is saved
68 */ 71 */
69 dev_warn(&client->dev, 72 dev_warn(dev,
70 "oscillator stop detected, date/time is not reliable\n"); 73 "oscillator stop detected, date/time is not reliable\n");
71 return -EINVAL; 74 return -EINVAL;
72 } 75 }
73 76
74 dev_dbg(&client->dev, 77 dev_dbg(dev,
75 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, " 78 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, "
76 "sec=%02x, min=%02x, hr=%02x, " 79 "sec=%02x, min=%02x, hr=%02x, "
77 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n", 80 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
@@ -91,7 +94,7 @@ static int pcf2127_get_datetime(struct i2c_client *client, struct rtc_time *tm)
91 if (tm->tm_year < 70) 94 if (tm->tm_year < 70)
92 tm->tm_year += 100; /* assume we are in 1970...2069 */ 95 tm->tm_year += 100; /* assume we are in 1970...2069 */
93 96
94 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 97 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
95 "mday=%d, mon=%d, year=%d, wday=%d\n", 98 "mday=%d, mon=%d, year=%d, wday=%d\n",
96 __func__, 99 __func__,
97 tm->tm_sec, tm->tm_min, tm->tm_hour, 100 tm->tm_sec, tm->tm_min, tm->tm_hour,
@@ -100,20 +103,18 @@ static int pcf2127_get_datetime(struct i2c_client *client, struct rtc_time *tm)
100 return rtc_valid_tm(tm); 103 return rtc_valid_tm(tm);
101} 104}
102 105
103static int pcf2127_set_datetime(struct i2c_client *client, struct rtc_time *tm) 106static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
104{ 107{
105 unsigned char buf[8]; 108 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
109 unsigned char buf[7];
106 int i = 0, err; 110 int i = 0, err;
107 111
108 dev_dbg(&client->dev, "%s: secs=%d, mins=%d, hours=%d, " 112 dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
109 "mday=%d, mon=%d, year=%d, wday=%d\n", 113 "mday=%d, mon=%d, year=%d, wday=%d\n",
110 __func__, 114 __func__,
111 tm->tm_sec, tm->tm_min, tm->tm_hour, 115 tm->tm_sec, tm->tm_min, tm->tm_hour,
112 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 116 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
113 117
114 /* start register address */
115 buf[i++] = PCF2127_REG_SC;
116
117 /* hours, minutes and seconds */ 118 /* hours, minutes and seconds */
118 buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */ 119 buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */
119 buf[i++] = bin2bcd(tm->tm_min); 120 buf[i++] = bin2bcd(tm->tm_min);
@@ -128,11 +129,11 @@ static int pcf2127_set_datetime(struct i2c_client *client, struct rtc_time *tm)
128 buf[i++] = bin2bcd(tm->tm_year % 100); 129 buf[i++] = bin2bcd(tm->tm_year % 100);
129 130
130 /* write register's data */ 131 /* write register's data */
131 err = i2c_master_send(client, buf, i); 132 err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
132 if (err != i) { 133 if (err) {
133 dev_err(&client->dev, 134 dev_err(dev,
134 "%s: err=%d", __func__, err); 135 "%s: err=%d", __func__, err);
135 return -EIO; 136 return err;
136 } 137 }
137 138
138 return 0; 139 return 0;
@@ -142,26 +143,17 @@ static int pcf2127_set_datetime(struct i2c_client *client, struct rtc_time *tm)
142static int pcf2127_rtc_ioctl(struct device *dev, 143static int pcf2127_rtc_ioctl(struct device *dev,
143 unsigned int cmd, unsigned long arg) 144 unsigned int cmd, unsigned long arg)
144{ 145{
145 struct i2c_client *client = to_i2c_client(dev); 146 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
146 unsigned char buf = PCF2127_REG_CTRL3;
147 int touser; 147 int touser;
148 int ret; 148 int ret;
149 149
150 switch (cmd) { 150 switch (cmd) {
151 case RTC_VL_READ: 151 case RTC_VL_READ:
152 ret = i2c_master_send(client, &buf, 1); 152 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &touser);
153 if (!ret) 153 if (ret)
154 ret = -EIO;
155 if (ret < 0)
156 return ret;
157
158 ret = i2c_master_recv(client, &buf, 1);
159 if (!ret)
160 ret = -EIO;
161 if (ret < 0)
162 return ret; 154 return ret;
163 155
164 touser = buf & PCF2127_REG_CTRL3_BLF ? 1 : 0; 156 touser = touser & PCF2127_REG_CTRL3_BLF ? 1 : 0;
165 157
166 if (copy_to_user((void __user *)arg, &touser, sizeof(int))) 158 if (copy_to_user((void __user *)arg, &touser, sizeof(int)))
167 return -EFAULT; 159 return -EFAULT;
@@ -174,71 +166,270 @@ static int pcf2127_rtc_ioctl(struct device *dev,
174#define pcf2127_rtc_ioctl NULL 166#define pcf2127_rtc_ioctl NULL
175#endif 167#endif
176 168
177static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
178{
179 return pcf2127_get_datetime(to_i2c_client(dev), tm);
180}
181
182static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
183{
184 return pcf2127_set_datetime(to_i2c_client(dev), tm);
185}
186
187static const struct rtc_class_ops pcf2127_rtc_ops = { 169static const struct rtc_class_ops pcf2127_rtc_ops = {
188 .ioctl = pcf2127_rtc_ioctl, 170 .ioctl = pcf2127_rtc_ioctl,
189 .read_time = pcf2127_rtc_read_time, 171 .read_time = pcf2127_rtc_read_time,
190 .set_time = pcf2127_rtc_set_time, 172 .set_time = pcf2127_rtc_set_time,
191}; 173};
192 174
193static int pcf2127_probe(struct i2c_client *client, 175static int pcf2127_probe(struct device *dev, struct regmap *regmap,
194 const struct i2c_device_id *id) 176 const char *name)
195{ 177{
196 struct pcf2127 *pcf2127; 178 struct pcf2127 *pcf2127;
197 179
198 dev_dbg(&client->dev, "%s\n", __func__); 180 dev_dbg(dev, "%s\n", __func__);
199 181
200 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 182 pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
201 return -ENODEV;
202
203 pcf2127 = devm_kzalloc(&client->dev, sizeof(struct pcf2127),
204 GFP_KERNEL);
205 if (!pcf2127) 183 if (!pcf2127)
206 return -ENOMEM; 184 return -ENOMEM;
207 185
208 i2c_set_clientdata(client, pcf2127); 186 pcf2127->regmap = regmap;
187
188 dev_set_drvdata(dev, pcf2127);
209 189
210 pcf2127->rtc = devm_rtc_device_register(&client->dev, 190 pcf2127->rtc = devm_rtc_device_register(dev, name, &pcf2127_rtc_ops,
211 pcf2127_driver.driver.name, 191 THIS_MODULE);
212 &pcf2127_rtc_ops, THIS_MODULE);
213 192
214 return PTR_ERR_OR_ZERO(pcf2127->rtc); 193 return PTR_ERR_OR_ZERO(pcf2127->rtc);
215} 194}
216 195
217static const struct i2c_device_id pcf2127_id[] = {
218 { "pcf2127", 0 },
219 { }
220};
221MODULE_DEVICE_TABLE(i2c, pcf2127_id);
222
223#ifdef CONFIG_OF 196#ifdef CONFIG_OF
224static const struct of_device_id pcf2127_of_match[] = { 197static const struct of_device_id pcf2127_of_match[] = {
225 { .compatible = "nxp,pcf2127" }, 198 { .compatible = "nxp,pcf2127" },
199 { .compatible = "nxp,pcf2129" },
226 {} 200 {}
227}; 201};
228MODULE_DEVICE_TABLE(of, pcf2127_of_match); 202MODULE_DEVICE_TABLE(of, pcf2127_of_match);
229#endif 203#endif
230 204
231static struct i2c_driver pcf2127_driver = { 205#if IS_ENABLED(CONFIG_I2C)
206
207static int pcf2127_i2c_write(void *context, const void *data, size_t count)
208{
209 struct device *dev = context;
210 struct i2c_client *client = to_i2c_client(dev);
211 int ret;
212
213 ret = i2c_master_send(client, data, count);
214 if (ret != count)
215 return ret < 0 ? ret : -EIO;
216
217 return 0;
218}
219
220static int pcf2127_i2c_gather_write(void *context,
221 const void *reg, size_t reg_size,
222 const void *val, size_t val_size)
223{
224 struct device *dev = context;
225 struct i2c_client *client = to_i2c_client(dev);
226 int ret;
227 void *buf;
228
229 if (WARN_ON(reg_size != 1))
230 return -EINVAL;
231
232 buf = kmalloc(val_size + 1, GFP_KERNEL);
233 if (!buf)
234 return -ENOMEM;
235
236 memcpy(buf, reg, 1);
237 memcpy(buf + 1, val, val_size);
238
239 ret = i2c_master_send(client, buf, val_size + 1);
240 if (ret != val_size + 1)
241 return ret < 0 ? ret : -EIO;
242
243 return 0;
244}
245
246static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
247 void *val, size_t val_size)
248{
249 struct device *dev = context;
250 struct i2c_client *client = to_i2c_client(dev);
251 int ret;
252
253 if (WARN_ON(reg_size != 1))
254 return -EINVAL;
255
256 ret = i2c_master_send(client, reg, 1);
257 if (ret != 1)
258 return ret < 0 ? ret : -EIO;
259
260 ret = i2c_master_recv(client, val, val_size);
261 if (ret != val_size)
262 return ret < 0 ? ret : -EIO;
263
264 return 0;
265}
266
267/*
268 * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
269 * is that the STOP condition is required between set register address and
270 * read register data when reading from registers.
271 */
272static const struct regmap_bus pcf2127_i2c_regmap = {
273 .write = pcf2127_i2c_write,
274 .gather_write = pcf2127_i2c_gather_write,
275 .read = pcf2127_i2c_read,
276};
277
278static struct i2c_driver pcf2127_i2c_driver;
279
280static int pcf2127_i2c_probe(struct i2c_client *client,
281 const struct i2c_device_id *id)
282{
283 struct regmap *regmap;
284 static const struct regmap_config config = {
285 .reg_bits = 8,
286 .val_bits = 8,
287 };
288
289 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
290 return -ENODEV;
291
292 regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
293 &client->dev, &config);
294 if (IS_ERR(regmap)) {
295 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
296 __func__, PTR_ERR(regmap));
297 return PTR_ERR(regmap);
298 }
299
300 return pcf2127_probe(&client->dev, regmap,
301 pcf2127_i2c_driver.driver.name);
302}
303
304static const struct i2c_device_id pcf2127_i2c_id[] = {
305 { "pcf2127", 0 },
306 { "pcf2129", 0 },
307 { }
308};
309MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
310
311static struct i2c_driver pcf2127_i2c_driver = {
312 .driver = {
313 .name = "rtc-pcf2127-i2c",
314 .of_match_table = of_match_ptr(pcf2127_of_match),
315 },
316 .probe = pcf2127_i2c_probe,
317 .id_table = pcf2127_i2c_id,
318};
319
320static int pcf2127_i2c_register_driver(void)
321{
322 return i2c_add_driver(&pcf2127_i2c_driver);
323}
324
325static void pcf2127_i2c_unregister_driver(void)
326{
327 i2c_del_driver(&pcf2127_i2c_driver);
328}
329
330#else
331
332static int pcf2127_i2c_register_driver(void)
333{
334 return 0;
335}
336
337static void pcf2127_i2c_unregister_driver(void)
338{
339}
340
341#endif
342
343#if IS_ENABLED(CONFIG_SPI_MASTER)
344
345static struct spi_driver pcf2127_spi_driver;
346
347static int pcf2127_spi_probe(struct spi_device *spi)
348{
349 static const struct regmap_config config = {
350 .reg_bits = 8,
351 .val_bits = 8,
352 .read_flag_mask = 0xa0,
353 .write_flag_mask = 0x20,
354 };
355 struct regmap *regmap;
356
357 regmap = devm_regmap_init_spi(spi, &config);
358 if (IS_ERR(regmap)) {
359 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
360 __func__, PTR_ERR(regmap));
361 return PTR_ERR(regmap);
362 }
363
364 return pcf2127_probe(&spi->dev, regmap, pcf2127_spi_driver.driver.name);
365}
366
367static const struct spi_device_id pcf2127_spi_id[] = {
368 { "pcf2127", 0 },
369 { "pcf2129", 0 },
370 { }
371};
372MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
373
374static struct spi_driver pcf2127_spi_driver = {
232 .driver = { 375 .driver = {
233 .name = "rtc-pcf2127", 376 .name = "rtc-pcf2127-spi",
234 .of_match_table = of_match_ptr(pcf2127_of_match), 377 .of_match_table = of_match_ptr(pcf2127_of_match),
235 }, 378 },
236 .probe = pcf2127_probe, 379 .probe = pcf2127_spi_probe,
237 .id_table = pcf2127_id, 380 .id_table = pcf2127_spi_id,
238}; 381};
239 382
240module_i2c_driver(pcf2127_driver); 383static int pcf2127_spi_register_driver(void)
384{
385 return spi_register_driver(&pcf2127_spi_driver);
386}
387
388static void pcf2127_spi_unregister_driver(void)
389{
390 spi_unregister_driver(&pcf2127_spi_driver);
391}
392
393#else
394
395static int pcf2127_spi_register_driver(void)
396{
397 return 0;
398}
399
400static void pcf2127_spi_unregister_driver(void)
401{
402}
403
404#endif
405
406static int __init pcf2127_init(void)
407{
408 int ret;
409
410 ret = pcf2127_i2c_register_driver();
411 if (ret) {
412 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
413 return ret;
414 }
415
416 ret = pcf2127_spi_register_driver();
417 if (ret) {
418 pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
419 pcf2127_i2c_unregister_driver();
420 }
421
422 return ret;
423}
424module_init(pcf2127_init)
425
426static void __exit pcf2127_exit(void)
427{
428 pcf2127_spi_unregister_driver();
429 pcf2127_i2c_unregister_driver();
430}
431module_exit(pcf2127_exit)
241 432
242MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>"); 433MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
243MODULE_DESCRIPTION("NXP PCF2127 RTC driver"); 434MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
244MODULE_LICENSE("GPL v2"); 435MODULE_LICENSE("GPL v2");
diff --git a/drivers/rtc/rtc-pcf85063.c b/drivers/rtc/rtc-pcf85063.c
index 63334cbeca41..e8ddbb359d11 100644
--- a/drivers/rtc/rtc-pcf85063.c
+++ b/drivers/rtc/rtc-pcf85063.c
@@ -16,12 +16,12 @@
16#include <linux/rtc.h> 16#include <linux/rtc.h>
17#include <linux/module.h> 17#include <linux/module.h>
18 18
19#define DRV_VERSION "0.0.1"
20
21#define PCF85063_REG_CTRL1 0x00 /* status */ 19#define PCF85063_REG_CTRL1 0x00 /* status */
20#define PCF85063_REG_CTRL1_STOP BIT(5)
22#define PCF85063_REG_CTRL2 0x01 21#define PCF85063_REG_CTRL2 0x01
23 22
24#define PCF85063_REG_SC 0x04 /* datetime */ 23#define PCF85063_REG_SC 0x04 /* datetime */
24#define PCF85063_REG_SC_OS 0x80
25#define PCF85063_REG_MN 0x05 25#define PCF85063_REG_MN 0x05
26#define PCF85063_REG_HR 0x06 26#define PCF85063_REG_HR 0x06
27#define PCF85063_REG_DM 0x07 27#define PCF85063_REG_DM 0x07
@@ -29,15 +29,31 @@
29#define PCF85063_REG_MO 0x09 29#define PCF85063_REG_MO 0x09
30#define PCF85063_REG_YR 0x0A 30#define PCF85063_REG_YR 0x0A
31 31
32#define PCF85063_MO_C 0x80 /* century */
33
34static struct i2c_driver pcf85063_driver; 32static struct i2c_driver pcf85063_driver;
35 33
36struct pcf85063 { 34static int pcf85063_stop_clock(struct i2c_client *client, u8 *ctrl1)
37 struct rtc_device *rtc; 35{
38 int c_polarity; /* 0: MO_C=1 means 19xx, otherwise MO_C=1 means 20xx */ 36 s32 ret;
39 int voltage_low; /* indicates if a low_voltage was detected */ 37
40}; 38 ret = i2c_smbus_read_byte_data(client, PCF85063_REG_CTRL1);
39 if (ret < 0) {
40 dev_err(&client->dev, "Failing to stop the clock\n");
41 return -EIO;
42 }
43
44 /* stop the clock */
45 ret |= PCF85063_REG_CTRL1_STOP;
46
47 ret = i2c_smbus_write_byte_data(client, PCF85063_REG_CTRL1, ret);
48 if (ret < 0) {
49 dev_err(&client->dev, "Failing to stop the clock\n");
50 return -EIO;
51 }
52
53 *ctrl1 = ret;
54
55 return 0;
56}
41 57
42/* 58/*
43 * In the routines that deal directly with the pcf85063 hardware, we use 59 * In the routines that deal directly with the pcf85063 hardware, we use
@@ -45,81 +61,85 @@ struct pcf85063 {
45 */ 61 */
46static int pcf85063_get_datetime(struct i2c_client *client, struct rtc_time *tm) 62static int pcf85063_get_datetime(struct i2c_client *client, struct rtc_time *tm)
47{ 63{
48 struct pcf85063 *pcf85063 = i2c_get_clientdata(client); 64 int rc;
49 unsigned char buf[13] = { PCF85063_REG_CTRL1 }; 65 u8 regs[7];
50 struct i2c_msg msgs[] = { 66
51 {/* setup read ptr */ 67 /*
52 .addr = client->addr, 68 * while reading, the time/date registers are blocked and not updated
53 .len = 1, 69 * anymore until the access is finished. To not lose a second
54 .buf = buf 70 * event, the access must be finished within one second. So, read all
55 }, 71 * time/date registers in one turn.
56 {/* read status + date */ 72 */
57 .addr = client->addr, 73 rc = i2c_smbus_read_i2c_block_data(client, PCF85063_REG_SC,
58 .flags = I2C_M_RD, 74 sizeof(regs), regs);
59 .len = 13, 75 if (rc != sizeof(regs)) {
60 .buf = buf 76 dev_err(&client->dev, "date/time register read error\n");
61 },
62 };
63
64 /* read registers */
65 if ((i2c_transfer(client->adapter, msgs, 2)) != 2) {
66 dev_err(&client->dev, "%s: read error\n", __func__);
67 return -EIO; 77 return -EIO;
68 } 78 }
69 79
70 tm->tm_sec = bcd2bin(buf[PCF85063_REG_SC] & 0x7F); 80 /* if the clock has lost its power it makes no sense to use its time */
71 tm->tm_min = bcd2bin(buf[PCF85063_REG_MN] & 0x7F); 81 if (regs[0] & PCF85063_REG_SC_OS) {
72 tm->tm_hour = bcd2bin(buf[PCF85063_REG_HR] & 0x3F); /* rtc hr 0-23 */ 82 dev_warn(&client->dev, "Power loss detected, invalid time\n");
73 tm->tm_mday = bcd2bin(buf[PCF85063_REG_DM] & 0x3F); 83 return -EINVAL;
74 tm->tm_wday = buf[PCF85063_REG_DW] & 0x07; 84 }
75 tm->tm_mon = bcd2bin(buf[PCF85063_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */ 85
76 tm->tm_year = bcd2bin(buf[PCF85063_REG_YR]); 86 tm->tm_sec = bcd2bin(regs[0] & 0x7F);
87 tm->tm_min = bcd2bin(regs[1] & 0x7F);
88 tm->tm_hour = bcd2bin(regs[2] & 0x3F); /* rtc hr 0-23 */
89 tm->tm_mday = bcd2bin(regs[3] & 0x3F);
90 tm->tm_wday = regs[4] & 0x07;
91 tm->tm_mon = bcd2bin(regs[5] & 0x1F) - 1; /* rtc mn 1-12 */
92 tm->tm_year = bcd2bin(regs[6]);
77 if (tm->tm_year < 70) 93 if (tm->tm_year < 70)
78 tm->tm_year += 100; /* assume we are in 1970...2069 */ 94 tm->tm_year += 100; /* assume we are in 1970...2069 */
79 /* detect the polarity heuristically. see note above. */
80 pcf85063->c_polarity = (buf[PCF85063_REG_MO] & PCF85063_MO_C) ?
81 (tm->tm_year >= 100) : (tm->tm_year < 100);
82 95
83 return rtc_valid_tm(tm); 96 return rtc_valid_tm(tm);
84} 97}
85 98
86static int pcf85063_set_datetime(struct i2c_client *client, struct rtc_time *tm) 99static int pcf85063_set_datetime(struct i2c_client *client, struct rtc_time *tm)
87{ 100{
88 int i = 0, err = 0; 101 int rc;
89 unsigned char buf[11]; 102 u8 regs[8];
90 103
91 /* Control & status */ 104 /*
92 buf[PCF85063_REG_CTRL1] = 0; 105 * to accurately set the time, reset the divider chain and keep it in
93 buf[PCF85063_REG_CTRL2] = 5; 106 * reset state until all time/date registers are written
107 */
108 rc = pcf85063_stop_clock(client, &regs[7]);
109 if (rc != 0)
110 return rc;
94 111
95 /* hours, minutes and seconds */ 112 /* hours, minutes and seconds */
96 buf[PCF85063_REG_SC] = bin2bcd(tm->tm_sec) & 0x7F; 113 regs[0] = bin2bcd(tm->tm_sec) & 0x7F; /* clear OS flag */
97 114
98 buf[PCF85063_REG_MN] = bin2bcd(tm->tm_min); 115 regs[1] = bin2bcd(tm->tm_min);
99 buf[PCF85063_REG_HR] = bin2bcd(tm->tm_hour); 116 regs[2] = bin2bcd(tm->tm_hour);
100 117
101 /* Day of month, 1 - 31 */ 118 /* Day of month, 1 - 31 */
102 buf[PCF85063_REG_DM] = bin2bcd(tm->tm_mday); 119 regs[3] = bin2bcd(tm->tm_mday);
103 120
104 /* Day, 0 - 6 */ 121 /* Day, 0 - 6 */
105 buf[PCF85063_REG_DW] = tm->tm_wday & 0x07; 122 regs[4] = tm->tm_wday & 0x07;
106 123
107 /* month, 1 - 12 */ 124 /* month, 1 - 12 */
108 buf[PCF85063_REG_MO] = bin2bcd(tm->tm_mon + 1); 125 regs[5] = bin2bcd(tm->tm_mon + 1);
109 126
110 /* year and century */ 127 /* year and century */
111 buf[PCF85063_REG_YR] = bin2bcd(tm->tm_year % 100); 128 regs[6] = bin2bcd(tm->tm_year % 100);
112 129
113 /* write register's data */ 130 /*
114 for (i = 0; i < sizeof(buf); i++) { 131 * after all time/date registers are written, let the 'address auto
115 unsigned char data[2] = { i, buf[i] }; 132 * increment' feature wrap around and write register CTRL1 to re-enable
116 133 * the clock divider chain again
117 err = i2c_master_send(client, data, sizeof(data)); 134 */
118 if (err != sizeof(data)) { 135 regs[7] &= ~PCF85063_REG_CTRL1_STOP;
119 dev_err(&client->dev, "%s: err=%d addr=%02x, data=%02x\n", 136
120 __func__, err, data[0], data[1]); 137 /* write all registers at once */
121 return -EIO; 138 rc = i2c_smbus_write_i2c_block_data(client, PCF85063_REG_SC,
122 } 139 sizeof(regs), regs);
140 if (rc < 0) {
141 dev_err(&client->dev, "date/time register write error\n");
142 return rc;
123 } 143 }
124 144
125 return 0; 145 return 0;
@@ -143,27 +163,18 @@ static const struct rtc_class_ops pcf85063_rtc_ops = {
143static int pcf85063_probe(struct i2c_client *client, 163static int pcf85063_probe(struct i2c_client *client,
144 const struct i2c_device_id *id) 164 const struct i2c_device_id *id)
145{ 165{
146 struct pcf85063 *pcf85063; 166 struct rtc_device *rtc;
147 167
148 dev_dbg(&client->dev, "%s\n", __func__); 168 dev_dbg(&client->dev, "%s\n", __func__);
149 169
150 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 170 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
151 return -ENODEV; 171 return -ENODEV;
152 172
153 pcf85063 = devm_kzalloc(&client->dev, sizeof(struct pcf85063), 173 rtc = devm_rtc_device_register(&client->dev,
154 GFP_KERNEL); 174 pcf85063_driver.driver.name,
155 if (!pcf85063) 175 &pcf85063_rtc_ops, THIS_MODULE);
156 return -ENOMEM;
157
158 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
159
160 i2c_set_clientdata(client, pcf85063);
161
162 pcf85063->rtc = devm_rtc_device_register(&client->dev,
163 pcf85063_driver.driver.name,
164 &pcf85063_rtc_ops, THIS_MODULE);
165 176
166 return PTR_ERR_OR_ZERO(pcf85063->rtc); 177 return PTR_ERR_OR_ZERO(rtc);
167} 178}
168 179
169static const struct i2c_device_id pcf85063_id[] = { 180static const struct i2c_device_id pcf85063_id[] = {
@@ -194,4 +205,3 @@ module_i2c_driver(pcf85063_driver);
194MODULE_AUTHOR("Søren Andersen <san@rosetechnology.dk>"); 205MODULE_AUTHOR("Søren Andersen <san@rosetechnology.dk>");
195MODULE_DESCRIPTION("PCF85063 RTC driver"); 206MODULE_DESCRIPTION("PCF85063 RTC driver");
196MODULE_LICENSE("GPL"); 207MODULE_LICENSE("GPL");
197MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/rtc/rtc-pcf8523.c b/drivers/rtc/rtc-pcf8523.c
index 988566caaaa6..28c48b3c1946 100644
--- a/drivers/rtc/rtc-pcf8523.c
+++ b/drivers/rtc/rtc-pcf8523.c
@@ -178,28 +178,8 @@ static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
178 if (err < 0) 178 if (err < 0)
179 return err; 179 return err;
180 180
181 if (regs[0] & REG_SECONDS_OS) { 181 if (regs[0] & REG_SECONDS_OS)
182 /* 182 return -EINVAL;
183 * If the oscillator was stopped, try to clear the flag. Upon
184 * power-up the flag is always set, but if we cannot clear it
185 * the oscillator isn't running properly for some reason. The
186 * sensible thing therefore is to return an error, signalling
187 * that the clock cannot be assumed to be correct.
188 */
189
190 regs[0] &= ~REG_SECONDS_OS;
191
192 err = pcf8523_write(client, REG_SECONDS, regs[0]);
193 if (err < 0)
194 return err;
195
196 err = pcf8523_read(client, REG_SECONDS, &regs[0]);
197 if (err < 0)
198 return err;
199
200 if (regs[0] & REG_SECONDS_OS)
201 return -EAGAIN;
202 }
203 183
204 tm->tm_sec = bcd2bin(regs[0] & 0x7f); 184 tm->tm_sec = bcd2bin(regs[0] & 0x7f);
205 tm->tm_min = bcd2bin(regs[1] & 0x7f); 185 tm->tm_min = bcd2bin(regs[1] & 0x7f);
@@ -235,6 +215,7 @@ static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
235 return err; 215 return err;
236 216
237 regs[0] = REG_SECONDS; 217 regs[0] = REG_SECONDS;
218 /* This will purposely overwrite REG_SECONDS_OS */
238 regs[1] = bin2bcd(tm->tm_sec); 219 regs[1] = bin2bcd(tm->tm_sec);
239 regs[2] = bin2bcd(tm->tm_min); 220 regs[2] = bin2bcd(tm->tm_min);
240 regs[3] = bin2bcd(tm->tm_hour); 221 regs[3] = bin2bcd(tm->tm_hour);
diff --git a/drivers/rtc/rtc-pic32.c b/drivers/rtc/rtc-pic32.c
new file mode 100644
index 000000000000..64e1e4578492
--- /dev/null
+++ b/drivers/rtc/rtc-pic32.c
@@ -0,0 +1,411 @@
1/*
2 * PIC32 RTC driver
3 *
4 * Joshua Henderson <joshua.henderson@microchip.com>
5 * Copyright (C) 2016 Microchip Technology Inc. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 */
17#include <linux/init.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/slab.h>
23#include <linux/clk.h>
24#include <linux/rtc.h>
25#include <linux/bcd.h>
26
27#include <asm/mach-pic32/pic32.h>
28
29#define PIC32_RTCCON 0x00
30#define PIC32_RTCCON_ON BIT(15)
31#define PIC32_RTCCON_SIDL BIT(13)
32#define PIC32_RTCCON_RTCCLKSEL (3 << 9)
33#define PIC32_RTCCON_RTCCLKON BIT(6)
34#define PIC32_RTCCON_RTCWREN BIT(3)
35#define PIC32_RTCCON_RTCSYNC BIT(2)
36#define PIC32_RTCCON_HALFSEC BIT(1)
37#define PIC32_RTCCON_RTCOE BIT(0)
38
39#define PIC32_RTCALRM 0x10
40#define PIC32_RTCALRM_ALRMEN BIT(15)
41#define PIC32_RTCALRM_CHIME BIT(14)
42#define PIC32_RTCALRM_PIV BIT(13)
43#define PIC32_RTCALRM_ALARMSYNC BIT(12)
44#define PIC32_RTCALRM_AMASK 0x0F00
45#define PIC32_RTCALRM_ARPT 0xFF
46
47#define PIC32_RTCHOUR 0x23
48#define PIC32_RTCMIN 0x22
49#define PIC32_RTCSEC 0x21
50#define PIC32_RTCYEAR 0x33
51#define PIC32_RTCMON 0x32
52#define PIC32_RTCDAY 0x31
53
54#define PIC32_ALRMTIME 0x40
55#define PIC32_ALRMDATE 0x50
56
57#define PIC32_ALRMHOUR 0x43
58#define PIC32_ALRMMIN 0x42
59#define PIC32_ALRMSEC 0x41
60#define PIC32_ALRMYEAR 0x53
61#define PIC32_ALRMMON 0x52
62#define PIC32_ALRMDAY 0x51
63
64struct pic32_rtc_dev {
65 struct rtc_device *rtc;
66 void __iomem *reg_base;
67 struct clk *clk;
68 spinlock_t alarm_lock;
69 int alarm_irq;
70 bool alarm_clk_enabled;
71};
72
73static void pic32_rtc_alarm_clk_enable(struct pic32_rtc_dev *pdata,
74 bool enable)
75{
76 unsigned long flags;
77
78 spin_lock_irqsave(&pdata->alarm_lock, flags);
79 if (enable) {
80 if (!pdata->alarm_clk_enabled) {
81 clk_enable(pdata->clk);
82 pdata->alarm_clk_enabled = true;
83 }
84 } else {
85 if (pdata->alarm_clk_enabled) {
86 clk_disable(pdata->clk);
87 pdata->alarm_clk_enabled = false;
88 }
89 }
90 spin_unlock_irqrestore(&pdata->alarm_lock, flags);
91}
92
93static irqreturn_t pic32_rtc_alarmirq(int irq, void *id)
94{
95 struct pic32_rtc_dev *pdata = (struct pic32_rtc_dev *)id;
96
97 clk_enable(pdata->clk);
98 rtc_update_irq(pdata->rtc, 1, RTC_AF | RTC_IRQF);
99 clk_disable(pdata->clk);
100
101 pic32_rtc_alarm_clk_enable(pdata, false);
102
103 return IRQ_HANDLED;
104}
105
106static int pic32_rtc_setaie(struct device *dev, unsigned int enabled)
107{
108 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
109 void __iomem *base = pdata->reg_base;
110
111 clk_enable(pdata->clk);
112
113 writel(PIC32_RTCALRM_ALRMEN,
114 base + (enabled ? PIC32_SET(PIC32_RTCALRM) :
115 PIC32_CLR(PIC32_RTCALRM)));
116
117 clk_disable(pdata->clk);
118
119 pic32_rtc_alarm_clk_enable(pdata, enabled);
120
121 return 0;
122}
123
124static int pic32_rtc_setfreq(struct device *dev, int freq)
125{
126 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
127 void __iomem *base = pdata->reg_base;
128
129 clk_enable(pdata->clk);
130
131 writel(PIC32_RTCALRM_AMASK, base + PIC32_CLR(PIC32_RTCALRM));
132 writel(freq << 8, base + PIC32_SET(PIC32_RTCALRM));
133 writel(PIC32_RTCALRM_CHIME, base + PIC32_SET(PIC32_RTCALRM));
134
135 clk_disable(pdata->clk);
136
137 return 0;
138}
139
140static int pic32_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
141{
142 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
143 void __iomem *base = pdata->reg_base;
144 unsigned int tries = 0;
145
146 clk_enable(pdata->clk);
147
148 do {
149 rtc_tm->tm_hour = readb(base + PIC32_RTCHOUR);
150 rtc_tm->tm_min = readb(base + PIC32_RTCMIN);
151 rtc_tm->tm_mon = readb(base + PIC32_RTCMON);
152 rtc_tm->tm_mday = readb(base + PIC32_RTCDAY);
153 rtc_tm->tm_year = readb(base + PIC32_RTCYEAR);
154 rtc_tm->tm_sec = readb(base + PIC32_RTCSEC);
155
156 /*
157 * The only way to work out whether the system was mid-update
158 * when we read it is to check the second counter, and if it
159 * is zero, then we re-try the entire read.
160 */
161 tries += 1;
162 } while (rtc_tm->tm_sec == 0 && tries < 2);
163
164 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
165 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
166 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
167 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
168 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon) - 1;
169 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
170
171 rtc_tm->tm_year += 100;
172
173 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
174 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
175 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
176
177 clk_disable(pdata->clk);
178 return rtc_valid_tm(rtc_tm);
179}
180
181static int pic32_rtc_settime(struct device *dev, struct rtc_time *tm)
182{
183 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
184 void __iomem *base = pdata->reg_base;
185 int year = tm->tm_year - 100;
186
187 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
188 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
189 tm->tm_hour, tm->tm_min, tm->tm_sec);
190
191 if (year < 0 || year >= 100) {
192 dev_err(dev, "rtc only supports 100 years\n");
193 return -EINVAL;
194 }
195
196 clk_enable(pdata->clk);
197 writeb(bin2bcd(tm->tm_sec), base + PIC32_RTCSEC);
198 writeb(bin2bcd(tm->tm_min), base + PIC32_RTCMIN);
199 writeb(bin2bcd(tm->tm_hour), base + PIC32_RTCHOUR);
200 writeb(bin2bcd(tm->tm_mday), base + PIC32_RTCDAY);
201 writeb(bin2bcd(tm->tm_mon + 1), base + PIC32_RTCMON);
202 writeb(bin2bcd(year), base + PIC32_RTCYEAR);
203 clk_disable(pdata->clk);
204
205 return 0;
206}
207
208static int pic32_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
209{
210 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
211 struct rtc_time *alm_tm = &alrm->time;
212 void __iomem *base = pdata->reg_base;
213 unsigned int alm_en;
214
215 clk_enable(pdata->clk);
216 alm_tm->tm_sec = readb(base + PIC32_ALRMSEC);
217 alm_tm->tm_min = readb(base + PIC32_ALRMMIN);
218 alm_tm->tm_hour = readb(base + PIC32_ALRMHOUR);
219 alm_tm->tm_mon = readb(base + PIC32_ALRMMON);
220 alm_tm->tm_mday = readb(base + PIC32_ALRMDAY);
221 alm_tm->tm_year = readb(base + PIC32_ALRMYEAR);
222
223 alm_en = readb(base + PIC32_RTCALRM);
224
225 alrm->enabled = (alm_en & PIC32_RTCALRM_ALRMEN) ? 1 : 0;
226
227 dev_dbg(dev, "getalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
228 alm_en,
229 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
230 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
231
232 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
233 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
234 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
235 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
236 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon) - 1;
237 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
238
239 clk_disable(pdata->clk);
240 return 0;
241}
242
243static int pic32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
244{
245 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
246 struct rtc_time *tm = &alrm->time;
247 void __iomem *base = pdata->reg_base;
248
249 clk_enable(pdata->clk);
250 dev_dbg(dev, "setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
251 alrm->enabled,
252 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
253 tm->tm_hour, tm->tm_min, tm->tm_sec);
254
255 writel(0x00, base + PIC32_ALRMTIME);
256 writel(0x00, base + PIC32_ALRMDATE);
257
258 pic32_rtc_setaie(dev, alrm->enabled);
259
260 clk_disable(pdata->clk);
261 return 0;
262}
263
264static int pic32_rtc_proc(struct device *dev, struct seq_file *seq)
265{
266 struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
267 void __iomem *base = pdata->reg_base;
268 unsigned int repeat;
269
270 clk_enable(pdata->clk);
271
272 repeat = readw(base + PIC32_RTCALRM);
273 repeat &= PIC32_RTCALRM_ARPT;
274 seq_printf(seq, "periodic_IRQ\t: %s\n", repeat ? "yes" : "no");
275
276 clk_disable(pdata->clk);
277 return 0;
278}
279
280static const struct rtc_class_ops pic32_rtcops = {
281 .read_time = pic32_rtc_gettime,
282 .set_time = pic32_rtc_settime,
283 .read_alarm = pic32_rtc_getalarm,
284 .set_alarm = pic32_rtc_setalarm,
285 .proc = pic32_rtc_proc,
286 .alarm_irq_enable = pic32_rtc_setaie,
287};
288
289static void pic32_rtc_enable(struct pic32_rtc_dev *pdata, int en)
290{
291 void __iomem *base = pdata->reg_base;
292
293 if (!base)
294 return;
295
296 clk_enable(pdata->clk);
297 if (!en) {
298 writel(PIC32_RTCCON_ON, base + PIC32_CLR(PIC32_RTCCON));
299 } else {
300 pic32_syskey_unlock();
301
302 writel(PIC32_RTCCON_RTCWREN, base + PIC32_SET(PIC32_RTCCON));
303 writel(3 << 9, base + PIC32_CLR(PIC32_RTCCON));
304
305 if (!(readl(base + PIC32_RTCCON) & PIC32_RTCCON_ON))
306 writel(PIC32_RTCCON_ON, base + PIC32_SET(PIC32_RTCCON));
307 }
308 clk_disable(pdata->clk);
309}
310
311static int pic32_rtc_remove(struct platform_device *pdev)
312{
313 struct pic32_rtc_dev *pdata = platform_get_drvdata(pdev);
314
315 pic32_rtc_setaie(&pdev->dev, 0);
316 clk_unprepare(pdata->clk);
317 pdata->clk = NULL;
318
319 return 0;
320}
321
322static int pic32_rtc_probe(struct platform_device *pdev)
323{
324 struct pic32_rtc_dev *pdata;
325 struct resource *res;
326 int ret;
327
328 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
329 if (!pdata)
330 return -ENOMEM;
331
332 platform_set_drvdata(pdev, pdata);
333
334 pdata->alarm_irq = platform_get_irq(pdev, 0);
335 if (pdata->alarm_irq < 0) {
336 dev_err(&pdev->dev, "no irq for alarm\n");
337 return pdata->alarm_irq;
338 }
339
340 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
341 pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
342 if (IS_ERR(pdata->reg_base))
343 return PTR_ERR(pdata->reg_base);
344
345 pdata->clk = devm_clk_get(&pdev->dev, NULL);
346 if (IS_ERR(pdata->clk)) {
347 dev_err(&pdev->dev, "failed to find rtc clock source\n");
348 ret = PTR_ERR(pdata->clk);
349 pdata->clk = NULL;
350 return ret;
351 }
352
353 spin_lock_init(&pdata->alarm_lock);
354
355 clk_prepare_enable(pdata->clk);
356
357 pic32_rtc_enable(pdata, 1);
358
359 device_init_wakeup(&pdev->dev, 1);
360
361 pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
362 &pic32_rtcops,
363 THIS_MODULE);
364 if (IS_ERR(pdata->rtc)) {
365 ret = PTR_ERR(pdata->rtc);
366 goto err_nortc;
367 }
368
369 pdata->rtc->max_user_freq = 128;
370
371 pic32_rtc_setfreq(&pdev->dev, 1);
372 ret = devm_request_irq(&pdev->dev, pdata->alarm_irq,
373 pic32_rtc_alarmirq, 0,
374 dev_name(&pdev->dev), pdata);
375 if (ret) {
376 dev_err(&pdev->dev,
377 "IRQ %d error %d\n", pdata->alarm_irq, ret);
378 goto err_nortc;
379 }
380
381 clk_disable(pdata->clk);
382
383 return 0;
384
385err_nortc:
386 pic32_rtc_enable(pdata, 0);
387 clk_disable_unprepare(pdata->clk);
388
389 return ret;
390}
391
392static const struct of_device_id pic32_rtc_dt_ids[] = {
393 { .compatible = "microchip,pic32mzda-rtc" },
394 { /* sentinel */ }
395};
396MODULE_DEVICE_TABLE(of, pic32_rtc_dt_ids);
397
398static struct platform_driver pic32_rtc_driver = {
399 .probe = pic32_rtc_probe,
400 .remove = pic32_rtc_remove,
401 .driver = {
402 .name = "pic32-rtc",
403 .owner = THIS_MODULE,
404 .of_match_table = of_match_ptr(pic32_rtc_dt_ids),
405 },
406};
407module_platform_driver(pic32_rtc_driver);
408
409MODULE_DESCRIPTION("Microchip PIC32 RTC Driver");
410MODULE_AUTHOR("Joshua Henderson <joshua.henderson@microchip.com>");
411MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-rv3029c2.c b/drivers/rtc/rtc-rv3029c2.c
index e9ac5a43be1a..d0cbf08040cd 100644
--- a/drivers/rtc/rtc-rv3029c2.c
+++ b/drivers/rtc/rtc-rv3029c2.c
@@ -1,7 +1,8 @@
1/* 1/*
2 * Micro Crystal RV-3029C2 rtc class driver 2 * Micro Crystal RV-3029 rtc class driver
3 * 3 *
4 * Author: Gregory Hermant <gregory.hermant@calao-systems.com> 4 * Author: Gregory Hermant <gregory.hermant@calao-systems.com>
5 * Michael Buesch <m@bues.ch>
5 * 6 *
6 * based on previously existing rtc class drivers 7 * based on previously existing rtc class drivers
7 * 8 *
@@ -9,89 +10,120 @@
9 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
11 * 12 *
12 * NOTE: Currently this driver only supports the bare minimum for read
13 * and write the RTC and alarms. The extra features provided by this chip
14 * (trickle charger, eeprom, T° compensation) are unavailable.
15 */ 13 */
16 14
17#include <linux/module.h> 15#include <linux/module.h>
18#include <linux/i2c.h> 16#include <linux/i2c.h>
19#include <linux/bcd.h> 17#include <linux/bcd.h>
20#include <linux/rtc.h> 18#include <linux/rtc.h>
19#include <linux/delay.h>
20#include <linux/of.h>
21#include <linux/hwmon.h>
22#include <linux/hwmon-sysfs.h>
23
21 24
22/* Register map */ 25/* Register map */
23/* control section */ 26/* control section */
24#define RV3029C2_ONOFF_CTRL 0x00 27#define RV3029_ONOFF_CTRL 0x00
25#define RV3029C2_IRQ_CTRL 0x01 28#define RV3029_ONOFF_CTRL_WE BIT(0)
26#define RV3029C2_IRQ_CTRL_AIE (1 << 0) 29#define RV3029_ONOFF_CTRL_TE BIT(1)
27#define RV3029C2_IRQ_FLAGS 0x02 30#define RV3029_ONOFF_CTRL_TAR BIT(2)
28#define RV3029C2_IRQ_FLAGS_AF (1 << 0) 31#define RV3029_ONOFF_CTRL_EERE BIT(3)
29#define RV3029C2_STATUS 0x03 32#define RV3029_ONOFF_CTRL_SRON BIT(4)
30#define RV3029C2_STATUS_VLOW1 (1 << 2) 33#define RV3029_ONOFF_CTRL_TD0 BIT(5)
31#define RV3029C2_STATUS_VLOW2 (1 << 3) 34#define RV3029_ONOFF_CTRL_TD1 BIT(6)
32#define RV3029C2_STATUS_SR (1 << 4) 35#define RV3029_ONOFF_CTRL_CLKINT BIT(7)
33#define RV3029C2_STATUS_PON (1 << 5) 36#define RV3029_IRQ_CTRL 0x01
34#define RV3029C2_STATUS_EEBUSY (1 << 7) 37#define RV3029_IRQ_CTRL_AIE BIT(0)
35#define RV3029C2_RST_CTRL 0x04 38#define RV3029_IRQ_CTRL_TIE BIT(1)
36#define RV3029C2_CONTROL_SECTION_LEN 0x05 39#define RV3029_IRQ_CTRL_V1IE BIT(2)
40#define RV3029_IRQ_CTRL_V2IE BIT(3)
41#define RV3029_IRQ_CTRL_SRIE BIT(4)
42#define RV3029_IRQ_FLAGS 0x02
43#define RV3029_IRQ_FLAGS_AF BIT(0)
44#define RV3029_IRQ_FLAGS_TF BIT(1)
45#define RV3029_IRQ_FLAGS_V1IF BIT(2)
46#define RV3029_IRQ_FLAGS_V2IF BIT(3)
47#define RV3029_IRQ_FLAGS_SRF BIT(4)
48#define RV3029_STATUS 0x03
49#define RV3029_STATUS_VLOW1 BIT(2)
50#define RV3029_STATUS_VLOW2 BIT(3)
51#define RV3029_STATUS_SR BIT(4)
52#define RV3029_STATUS_PON BIT(5)
53#define RV3029_STATUS_EEBUSY BIT(7)
54#define RV3029_RST_CTRL 0x04
55#define RV3029_RST_CTRL_SYSR BIT(4)
56#define RV3029_CONTROL_SECTION_LEN 0x05
37 57
38/* watch section */ 58/* watch section */
39#define RV3029C2_W_SEC 0x08 59#define RV3029_W_SEC 0x08
40#define RV3029C2_W_MINUTES 0x09 60#define RV3029_W_MINUTES 0x09
41#define RV3029C2_W_HOURS 0x0A 61#define RV3029_W_HOURS 0x0A
42#define RV3029C2_REG_HR_12_24 (1<<6) /* 24h/12h mode */ 62#define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */
43#define RV3029C2_REG_HR_PM (1<<5) /* PM/AM bit in 12h mode */ 63#define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */
44#define RV3029C2_W_DATE 0x0B 64#define RV3029_W_DATE 0x0B
45#define RV3029C2_W_DAYS 0x0C 65#define RV3029_W_DAYS 0x0C
46#define RV3029C2_W_MONTHS 0x0D 66#define RV3029_W_MONTHS 0x0D
47#define RV3029C2_W_YEARS 0x0E 67#define RV3029_W_YEARS 0x0E
48#define RV3029C2_WATCH_SECTION_LEN 0x07 68#define RV3029_WATCH_SECTION_LEN 0x07
49 69
50/* alarm section */ 70/* alarm section */
51#define RV3029C2_A_SC 0x10 71#define RV3029_A_SC 0x10
52#define RV3029C2_A_MN 0x11 72#define RV3029_A_MN 0x11
53#define RV3029C2_A_HR 0x12 73#define RV3029_A_HR 0x12
54#define RV3029C2_A_DT 0x13 74#define RV3029_A_DT 0x13
55#define RV3029C2_A_DW 0x14 75#define RV3029_A_DW 0x14
56#define RV3029C2_A_MO 0x15 76#define RV3029_A_MO 0x15
57#define RV3029C2_A_YR 0x16 77#define RV3029_A_YR 0x16
58#define RV3029C2_ALARM_SECTION_LEN 0x07 78#define RV3029_ALARM_SECTION_LEN 0x07
59 79
60/* timer section */ 80/* timer section */
61#define RV3029C2_TIMER_LOW 0x18 81#define RV3029_TIMER_LOW 0x18
62#define RV3029C2_TIMER_HIGH 0x19 82#define RV3029_TIMER_HIGH 0x19
63 83
64/* temperature section */ 84/* temperature section */
65#define RV3029C2_TEMP_PAGE 0x20 85#define RV3029_TEMP_PAGE 0x20
66 86
67/* eeprom data section */ 87/* eeprom data section */
68#define RV3029C2_E2P_EEDATA1 0x28 88#define RV3029_E2P_EEDATA1 0x28
69#define RV3029C2_E2P_EEDATA2 0x29 89#define RV3029_E2P_EEDATA2 0x29
90#define RV3029_E2PDATA_SECTION_LEN 0x02
70 91
71/* eeprom control section */ 92/* eeprom control section */
72#define RV3029C2_CONTROL_E2P_EECTRL 0x30 93#define RV3029_CONTROL_E2P_EECTRL 0x30
73#define RV3029C2_TRICKLE_1K (1<<0) /* 1K resistance */ 94#define RV3029_EECTRL_THP BIT(0) /* temp scan interval */
74#define RV3029C2_TRICKLE_5K (1<<1) /* 5K resistance */ 95#define RV3029_EECTRL_THE BIT(1) /* thermometer enable */
75#define RV3029C2_TRICKLE_20K (1<<2) /* 20K resistance */ 96#define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */
76#define RV3029C2_TRICKLE_80K (1<<3) /* 80K resistance */ 97#define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */
77#define RV3029C2_CONTROL_E2P_XTALOFFSET 0x31 98#define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */
78#define RV3029C2_CONTROL_E2P_QCOEF 0x32 99#define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */
79#define RV3029C2_CONTROL_E2P_TURNOVER 0x33 100#define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */
101#define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */
102#define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\
103 RV3029_TRICKLE_5K |\
104 RV3029_TRICKLE_20K |\
105 RV3029_TRICKLE_80K)
106#define RV3029_TRICKLE_SHIFT 4
107#define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */
108#define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
109#define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */
110#define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */
111#define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */
80 112
81/* user ram section */ 113/* user ram section */
82#define RV3029C2_USR1_RAM_PAGE 0x38 114#define RV3029_USR1_RAM_PAGE 0x38
83#define RV3029C2_USR1_SECTION_LEN 0x04 115#define RV3029_USR1_SECTION_LEN 0x04
84#define RV3029C2_USR2_RAM_PAGE 0x3C 116#define RV3029_USR2_RAM_PAGE 0x3C
85#define RV3029C2_USR2_SECTION_LEN 0x04 117#define RV3029_USR2_SECTION_LEN 0x04
86 118
87static int 119static int
88rv3029c2_i2c_read_regs(struct i2c_client *client, u8 reg, u8 *buf, 120rv3029_i2c_read_regs(struct i2c_client *client, u8 reg, u8 *buf,
89 unsigned len) 121 unsigned len)
90{ 122{
91 int ret; 123 int ret;
92 124
93 if ((reg > RV3029C2_USR1_RAM_PAGE + 7) || 125 if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
94 (reg + len > RV3029C2_USR1_RAM_PAGE + 8)) 126 (reg + len > RV3029_USR1_RAM_PAGE + 8))
95 return -EINVAL; 127 return -EINVAL;
96 128
97 ret = i2c_smbus_read_i2c_block_data(client, reg, len, buf); 129 ret = i2c_smbus_read_i2c_block_data(client, reg, len, buf);
@@ -103,20 +135,38 @@ rv3029c2_i2c_read_regs(struct i2c_client *client, u8 reg, u8 *buf,
103} 135}
104 136
105static int 137static int
106rv3029c2_i2c_write_regs(struct i2c_client *client, u8 reg, u8 const buf[], 138rv3029_i2c_write_regs(struct i2c_client *client, u8 reg, u8 const buf[],
107 unsigned len) 139 unsigned len)
108{ 140{
109 if ((reg > RV3029C2_USR1_RAM_PAGE + 7) || 141 if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
110 (reg + len > RV3029C2_USR1_RAM_PAGE + 8)) 142 (reg + len > RV3029_USR1_RAM_PAGE + 8))
111 return -EINVAL; 143 return -EINVAL;
112 144
113 return i2c_smbus_write_i2c_block_data(client, reg, len, buf); 145 return i2c_smbus_write_i2c_block_data(client, reg, len, buf);
114} 146}
115 147
116static int 148static int
117rv3029c2_i2c_get_sr(struct i2c_client *client, u8 *buf) 149rv3029_i2c_update_bits(struct i2c_client *client, u8 reg, u8 mask, u8 set)
150{
151 u8 buf;
152 int ret;
153
154 ret = rv3029_i2c_read_regs(client, reg, &buf, 1);
155 if (ret < 0)
156 return ret;
157 buf &= ~mask;
158 buf |= set & mask;
159 ret = rv3029_i2c_write_regs(client, reg, &buf, 1);
160 if (ret < 0)
161 return ret;
162
163 return 0;
164}
165
166static int
167rv3029_i2c_get_sr(struct i2c_client *client, u8 *buf)
118{ 168{
119 int ret = rv3029c2_i2c_read_regs(client, RV3029C2_STATUS, buf, 1); 169 int ret = rv3029_i2c_read_regs(client, RV3029_STATUS, buf, 1);
120 170
121 if (ret < 0) 171 if (ret < 0)
122 return -EIO; 172 return -EIO;
@@ -125,83 +175,224 @@ rv3029c2_i2c_get_sr(struct i2c_client *client, u8 *buf)
125} 175}
126 176
127static int 177static int
128rv3029c2_i2c_set_sr(struct i2c_client *client, u8 val) 178rv3029_i2c_set_sr(struct i2c_client *client, u8 val)
129{ 179{
130 u8 buf[1]; 180 u8 buf[1];
131 int sr; 181 int sr;
132 182
133 buf[0] = val; 183 buf[0] = val;
134 sr = rv3029c2_i2c_write_regs(client, RV3029C2_STATUS, buf, 1); 184 sr = rv3029_i2c_write_regs(client, RV3029_STATUS, buf, 1);
135 dev_dbg(&client->dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]); 185 dev_dbg(&client->dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
136 if (sr < 0) 186 if (sr < 0)
137 return -EIO; 187 return -EIO;
138 return 0; 188 return 0;
139} 189}
140 190
191static int rv3029_eeprom_busywait(struct i2c_client *client)
192{
193 int i, ret;
194 u8 sr;
195
196 for (i = 100; i > 0; i--) {
197 ret = rv3029_i2c_get_sr(client, &sr);
198 if (ret < 0)
199 break;
200 if (!(sr & RV3029_STATUS_EEBUSY))
201 break;
202 usleep_range(1000, 10000);
203 }
204 if (i <= 0) {
205 dev_err(&client->dev, "EEPROM busy wait timeout.\n");
206 return -ETIMEDOUT;
207 }
208
209 return ret;
210}
211
212static int rv3029_eeprom_exit(struct i2c_client *client)
213{
214 /* Re-enable eeprom refresh */
215 return rv3029_i2c_update_bits(client, RV3029_ONOFF_CTRL,
216 RV3029_ONOFF_CTRL_EERE,
217 RV3029_ONOFF_CTRL_EERE);
218}
219
220static int rv3029_eeprom_enter(struct i2c_client *client)
221{
222 int ret;
223 u8 sr;
224
225 /* Check whether we are in the allowed voltage range. */
226 ret = rv3029_i2c_get_sr(client, &sr);
227 if (ret < 0)
228 return ret;
229 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
230 /* We clear the bits and retry once just in case
231 * we had a brown out in early startup.
232 */
233 sr &= ~RV3029_STATUS_VLOW1;
234 sr &= ~RV3029_STATUS_VLOW2;
235 ret = rv3029_i2c_set_sr(client, sr);
236 if (ret < 0)
237 return ret;
238 usleep_range(1000, 10000);
239 ret = rv3029_i2c_get_sr(client, &sr);
240 if (ret < 0)
241 return ret;
242 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
243 dev_err(&client->dev,
244 "Supply voltage is too low to safely access the EEPROM.\n");
245 return -ENODEV;
246 }
247 }
248
249 /* Disable eeprom refresh. */
250 ret = rv3029_i2c_update_bits(client, RV3029_ONOFF_CTRL,
251 RV3029_ONOFF_CTRL_EERE, 0);
252 if (ret < 0)
253 return ret;
254
255 /* Wait for any previous eeprom accesses to finish. */
256 ret = rv3029_eeprom_busywait(client);
257 if (ret < 0)
258 rv3029_eeprom_exit(client);
259
260 return ret;
261}
262
263static int rv3029_eeprom_read(struct i2c_client *client, u8 reg,
264 u8 buf[], size_t len)
265{
266 int ret, err;
267
268 err = rv3029_eeprom_enter(client);
269 if (err < 0)
270 return err;
271
272 ret = rv3029_i2c_read_regs(client, reg, buf, len);
273
274 err = rv3029_eeprom_exit(client);
275 if (err < 0)
276 return err;
277
278 return ret;
279}
280
281static int rv3029_eeprom_write(struct i2c_client *client, u8 reg,
282 u8 const buf[], size_t len)
283{
284 int ret, err;
285 size_t i;
286 u8 tmp;
287
288 err = rv3029_eeprom_enter(client);
289 if (err < 0)
290 return err;
291
292 for (i = 0; i < len; i++, reg++) {
293 ret = rv3029_i2c_read_regs(client, reg, &tmp, 1);
294 if (ret < 0)
295 break;
296 if (tmp != buf[i]) {
297 ret = rv3029_i2c_write_regs(client, reg, &buf[i], 1);
298 if (ret < 0)
299 break;
300 }
301 ret = rv3029_eeprom_busywait(client);
302 if (ret < 0)
303 break;
304 }
305
306 err = rv3029_eeprom_exit(client);
307 if (err < 0)
308 return err;
309
310 return ret;
311}
312
313static int rv3029_eeprom_update_bits(struct i2c_client *client,
314 u8 reg, u8 mask, u8 set)
315{
316 u8 buf;
317 int ret;
318
319 ret = rv3029_eeprom_read(client, reg, &buf, 1);
320 if (ret < 0)
321 return ret;
322 buf &= ~mask;
323 buf |= set & mask;
324 ret = rv3029_eeprom_write(client, reg, &buf, 1);
325 if (ret < 0)
326 return ret;
327
328 return 0;
329}
330
141static int 331static int
142rv3029c2_i2c_read_time(struct i2c_client *client, struct rtc_time *tm) 332rv3029_i2c_read_time(struct i2c_client *client, struct rtc_time *tm)
143{ 333{
144 u8 buf[1]; 334 u8 buf[1];
145 int ret; 335 int ret;
146 u8 regs[RV3029C2_WATCH_SECTION_LEN] = { 0, }; 336 u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, };
147 337
148 ret = rv3029c2_i2c_get_sr(client, buf); 338 ret = rv3029_i2c_get_sr(client, buf);
149 if (ret < 0) { 339 if (ret < 0) {
150 dev_err(&client->dev, "%s: reading SR failed\n", __func__); 340 dev_err(&client->dev, "%s: reading SR failed\n", __func__);
151 return -EIO; 341 return -EIO;
152 } 342 }
153 343
154 ret = rv3029c2_i2c_read_regs(client, RV3029C2_W_SEC , regs, 344 ret = rv3029_i2c_read_regs(client, RV3029_W_SEC, regs,
155 RV3029C2_WATCH_SECTION_LEN); 345 RV3029_WATCH_SECTION_LEN);
156 if (ret < 0) { 346 if (ret < 0) {
157 dev_err(&client->dev, "%s: reading RTC section failed\n", 347 dev_err(&client->dev, "%s: reading RTC section failed\n",
158 __func__); 348 __func__);
159 return ret; 349 return ret;
160 } 350 }
161 351
162 tm->tm_sec = bcd2bin(regs[RV3029C2_W_SEC-RV3029C2_W_SEC]); 352 tm->tm_sec = bcd2bin(regs[RV3029_W_SEC-RV3029_W_SEC]);
163 tm->tm_min = bcd2bin(regs[RV3029C2_W_MINUTES-RV3029C2_W_SEC]); 353 tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES-RV3029_W_SEC]);
164 354
165 /* HR field has a more complex interpretation */ 355 /* HR field has a more complex interpretation */
166 { 356 {
167 const u8 _hr = regs[RV3029C2_W_HOURS-RV3029C2_W_SEC]; 357 const u8 _hr = regs[RV3029_W_HOURS-RV3029_W_SEC];
168 if (_hr & RV3029C2_REG_HR_12_24) { 358
359 if (_hr & RV3029_REG_HR_12_24) {
169 /* 12h format */ 360 /* 12h format */
170 tm->tm_hour = bcd2bin(_hr & 0x1f); 361 tm->tm_hour = bcd2bin(_hr & 0x1f);
171 if (_hr & RV3029C2_REG_HR_PM) /* PM flag set */ 362 if (_hr & RV3029_REG_HR_PM) /* PM flag set */
172 tm->tm_hour += 12; 363 tm->tm_hour += 12;
173 } else /* 24h format */ 364 } else /* 24h format */
174 tm->tm_hour = bcd2bin(_hr & 0x3f); 365 tm->tm_hour = bcd2bin(_hr & 0x3f);
175 } 366 }
176 367
177 tm->tm_mday = bcd2bin(regs[RV3029C2_W_DATE-RV3029C2_W_SEC]); 368 tm->tm_mday = bcd2bin(regs[RV3029_W_DATE-RV3029_W_SEC]);
178 tm->tm_mon = bcd2bin(regs[RV3029C2_W_MONTHS-RV3029C2_W_SEC]) - 1; 369 tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS-RV3029_W_SEC]) - 1;
179 tm->tm_year = bcd2bin(regs[RV3029C2_W_YEARS-RV3029C2_W_SEC]) + 100; 370 tm->tm_year = bcd2bin(regs[RV3029_W_YEARS-RV3029_W_SEC]) + 100;
180 tm->tm_wday = bcd2bin(regs[RV3029C2_W_DAYS-RV3029C2_W_SEC]) - 1; 371 tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS-RV3029_W_SEC]) - 1;
181 372
182 return 0; 373 return 0;
183} 374}
184 375
185static int rv3029c2_rtc_read_time(struct device *dev, struct rtc_time *tm) 376static int rv3029_rtc_read_time(struct device *dev, struct rtc_time *tm)
186{ 377{
187 return rv3029c2_i2c_read_time(to_i2c_client(dev), tm); 378 return rv3029_i2c_read_time(to_i2c_client(dev), tm);
188} 379}
189 380
190static int 381static int
191rv3029c2_i2c_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm) 382rv3029_i2c_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm)
192{ 383{
193 struct rtc_time *const tm = &alarm->time; 384 struct rtc_time *const tm = &alarm->time;
194 int ret; 385 int ret;
195 u8 regs[8]; 386 u8 regs[8];
196 387
197 ret = rv3029c2_i2c_get_sr(client, regs); 388 ret = rv3029_i2c_get_sr(client, regs);
198 if (ret < 0) { 389 if (ret < 0) {
199 dev_err(&client->dev, "%s: reading SR failed\n", __func__); 390 dev_err(&client->dev, "%s: reading SR failed\n", __func__);
200 return -EIO; 391 return -EIO;
201 } 392 }
202 393
203 ret = rv3029c2_i2c_read_regs(client, RV3029C2_A_SC, regs, 394 ret = rv3029_i2c_read_regs(client, RV3029_A_SC, regs,
204 RV3029C2_ALARM_SECTION_LEN); 395 RV3029_ALARM_SECTION_LEN);
205 396
206 if (ret < 0) { 397 if (ret < 0) {
207 dev_err(&client->dev, "%s: reading alarm section failed\n", 398 dev_err(&client->dev, "%s: reading alarm section failed\n",
@@ -209,51 +400,42 @@ rv3029c2_i2c_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm)
209 return ret; 400 return ret;
210 } 401 }
211 402
212 tm->tm_sec = bcd2bin(regs[RV3029C2_A_SC-RV3029C2_A_SC] & 0x7f); 403 tm->tm_sec = bcd2bin(regs[RV3029_A_SC-RV3029_A_SC] & 0x7f);
213 tm->tm_min = bcd2bin(regs[RV3029C2_A_MN-RV3029C2_A_SC] & 0x7f); 404 tm->tm_min = bcd2bin(regs[RV3029_A_MN-RV3029_A_SC] & 0x7f);
214 tm->tm_hour = bcd2bin(regs[RV3029C2_A_HR-RV3029C2_A_SC] & 0x3f); 405 tm->tm_hour = bcd2bin(regs[RV3029_A_HR-RV3029_A_SC] & 0x3f);
215 tm->tm_mday = bcd2bin(regs[RV3029C2_A_DT-RV3029C2_A_SC] & 0x3f); 406 tm->tm_mday = bcd2bin(regs[RV3029_A_DT-RV3029_A_SC] & 0x3f);
216 tm->tm_mon = bcd2bin(regs[RV3029C2_A_MO-RV3029C2_A_SC] & 0x1f) - 1; 407 tm->tm_mon = bcd2bin(regs[RV3029_A_MO-RV3029_A_SC] & 0x1f) - 1;
217 tm->tm_year = bcd2bin(regs[RV3029C2_A_YR-RV3029C2_A_SC] & 0x7f) + 100; 408 tm->tm_year = bcd2bin(regs[RV3029_A_YR-RV3029_A_SC] & 0x7f) + 100;
218 tm->tm_wday = bcd2bin(regs[RV3029C2_A_DW-RV3029C2_A_SC] & 0x07) - 1; 409 tm->tm_wday = bcd2bin(regs[RV3029_A_DW-RV3029_A_SC] & 0x07) - 1;
219 410
220 return 0; 411 return 0;
221} 412}
222 413
223static int 414static int
224rv3029c2_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 415rv3029_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
225{ 416{
226 return rv3029c2_i2c_read_alarm(to_i2c_client(dev), alarm); 417 return rv3029_i2c_read_alarm(to_i2c_client(dev), alarm);
227} 418}
228 419
229static int rv3029c2_rtc_i2c_alarm_set_irq(struct i2c_client *client, 420static int rv3029_rtc_i2c_alarm_set_irq(struct i2c_client *client,
230 int enable) 421 int enable)
231{ 422{
232 int ret; 423 int ret;
233 u8 buf[1];
234
235 /* enable AIE irq */
236 ret = rv3029c2_i2c_read_regs(client, RV3029C2_IRQ_CTRL, buf, 1);
237 if (ret < 0) {
238 dev_err(&client->dev, "can't read INT reg\n");
239 return ret;
240 }
241 if (enable)
242 buf[0] |= RV3029C2_IRQ_CTRL_AIE;
243 else
244 buf[0] &= ~RV3029C2_IRQ_CTRL_AIE;
245 424
246 ret = rv3029c2_i2c_write_regs(client, RV3029C2_IRQ_CTRL, buf, 1); 425 /* enable/disable AIE irq */
426 ret = rv3029_i2c_update_bits(client, RV3029_IRQ_CTRL,
427 RV3029_IRQ_CTRL_AIE,
428 (enable ? RV3029_IRQ_CTRL_AIE : 0));
247 if (ret < 0) { 429 if (ret < 0) {
248 dev_err(&client->dev, "can't set INT reg\n"); 430 dev_err(&client->dev, "can't update INT reg\n");
249 return ret; 431 return ret;
250 } 432 }
251 433
252 return 0; 434 return 0;
253} 435}
254 436
255static int rv3029c2_rtc_i2c_set_alarm(struct i2c_client *client, 437static int rv3029_rtc_i2c_set_alarm(struct i2c_client *client,
256 struct rtc_wkalrm *alarm) 438 struct rtc_wkalrm *alarm)
257{ 439{
258 struct rtc_time *const tm = &alarm->time; 440 struct rtc_time *const tm = &alarm->time;
259 int ret; 441 int ret;
@@ -267,50 +449,41 @@ static int rv3029c2_rtc_i2c_set_alarm(struct i2c_client *client,
267 if (tm->tm_year < 100) 449 if (tm->tm_year < 100)
268 return -EINVAL; 450 return -EINVAL;
269 451
270 ret = rv3029c2_i2c_get_sr(client, regs); 452 ret = rv3029_i2c_get_sr(client, regs);
271 if (ret < 0) { 453 if (ret < 0) {
272 dev_err(&client->dev, "%s: reading SR failed\n", __func__); 454 dev_err(&client->dev, "%s: reading SR failed\n", __func__);
273 return -EIO; 455 return -EIO;
274 } 456 }
275 regs[RV3029C2_A_SC-RV3029C2_A_SC] = bin2bcd(tm->tm_sec & 0x7f); 457 regs[RV3029_A_SC-RV3029_A_SC] = bin2bcd(tm->tm_sec & 0x7f);
276 regs[RV3029C2_A_MN-RV3029C2_A_SC] = bin2bcd(tm->tm_min & 0x7f); 458 regs[RV3029_A_MN-RV3029_A_SC] = bin2bcd(tm->tm_min & 0x7f);
277 regs[RV3029C2_A_HR-RV3029C2_A_SC] = bin2bcd(tm->tm_hour & 0x3f); 459 regs[RV3029_A_HR-RV3029_A_SC] = bin2bcd(tm->tm_hour & 0x3f);
278 regs[RV3029C2_A_DT-RV3029C2_A_SC] = bin2bcd(tm->tm_mday & 0x3f); 460 regs[RV3029_A_DT-RV3029_A_SC] = bin2bcd(tm->tm_mday & 0x3f);
279 regs[RV3029C2_A_MO-RV3029C2_A_SC] = bin2bcd((tm->tm_mon & 0x1f) - 1); 461 regs[RV3029_A_MO-RV3029_A_SC] = bin2bcd((tm->tm_mon & 0x1f) - 1);
280 regs[RV3029C2_A_DW-RV3029C2_A_SC] = bin2bcd((tm->tm_wday & 7) - 1); 462 regs[RV3029_A_DW-RV3029_A_SC] = bin2bcd((tm->tm_wday & 7) - 1);
281 regs[RV3029C2_A_YR-RV3029C2_A_SC] = bin2bcd((tm->tm_year & 0x7f) - 100); 463 regs[RV3029_A_YR-RV3029_A_SC] = bin2bcd((tm->tm_year & 0x7f) - 100);
282 464
283 ret = rv3029c2_i2c_write_regs(client, RV3029C2_A_SC, regs, 465 ret = rv3029_i2c_write_regs(client, RV3029_A_SC, regs,
284 RV3029C2_ALARM_SECTION_LEN); 466 RV3029_ALARM_SECTION_LEN);
285 if (ret < 0) 467 if (ret < 0)
286 return ret; 468 return ret;
287 469
288 if (alarm->enabled) { 470 if (alarm->enabled) {
289 u8 buf[1];
290
291 /* clear AF flag */ 471 /* clear AF flag */
292 ret = rv3029c2_i2c_read_regs(client, RV3029C2_IRQ_FLAGS, 472 ret = rv3029_i2c_update_bits(client, RV3029_IRQ_FLAGS,
293 buf, 1); 473 RV3029_IRQ_FLAGS_AF, 0);
294 if (ret < 0) {
295 dev_err(&client->dev, "can't read alarm flag\n");
296 return ret;
297 }
298 buf[0] &= ~RV3029C2_IRQ_FLAGS_AF;
299 ret = rv3029c2_i2c_write_regs(client, RV3029C2_IRQ_FLAGS,
300 buf, 1);
301 if (ret < 0) { 474 if (ret < 0) {
302 dev_err(&client->dev, "can't set alarm flag\n"); 475 dev_err(&client->dev, "can't clear alarm flag\n");
303 return ret; 476 return ret;
304 } 477 }
305 /* enable AIE irq */ 478 /* enable AIE irq */
306 ret = rv3029c2_rtc_i2c_alarm_set_irq(client, 1); 479 ret = rv3029_rtc_i2c_alarm_set_irq(client, 1);
307 if (ret) 480 if (ret)
308 return ret; 481 return ret;
309 482
310 dev_dbg(&client->dev, "alarm IRQ armed\n"); 483 dev_dbg(&client->dev, "alarm IRQ armed\n");
311 } else { 484 } else {
312 /* disable AIE irq */ 485 /* disable AIE irq */
313 ret = rv3029c2_rtc_i2c_alarm_set_irq(client, 0); 486 ret = rv3029_rtc_i2c_alarm_set_irq(client, 0);
314 if (ret) 487 if (ret)
315 return ret; 488 return ret;
316 489
@@ -320,13 +493,13 @@ static int rv3029c2_rtc_i2c_set_alarm(struct i2c_client *client,
320 return 0; 493 return 0;
321} 494}
322 495
323static int rv3029c2_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 496static int rv3029_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
324{ 497{
325 return rv3029c2_rtc_i2c_set_alarm(to_i2c_client(dev), alarm); 498 return rv3029_rtc_i2c_set_alarm(to_i2c_client(dev), alarm);
326} 499}
327 500
328static int 501static int
329rv3029c2_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm) 502rv3029_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm)
330{ 503{
331 u8 regs[8]; 504 u8 regs[8];
332 int ret; 505 int ret;
@@ -339,26 +512,26 @@ rv3029c2_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm)
339 if (tm->tm_year < 100) 512 if (tm->tm_year < 100)
340 return -EINVAL; 513 return -EINVAL;
341 514
342 regs[RV3029C2_W_SEC-RV3029C2_W_SEC] = bin2bcd(tm->tm_sec); 515 regs[RV3029_W_SEC-RV3029_W_SEC] = bin2bcd(tm->tm_sec);
343 regs[RV3029C2_W_MINUTES-RV3029C2_W_SEC] = bin2bcd(tm->tm_min); 516 regs[RV3029_W_MINUTES-RV3029_W_SEC] = bin2bcd(tm->tm_min);
344 regs[RV3029C2_W_HOURS-RV3029C2_W_SEC] = bin2bcd(tm->tm_hour); 517 regs[RV3029_W_HOURS-RV3029_W_SEC] = bin2bcd(tm->tm_hour);
345 regs[RV3029C2_W_DATE-RV3029C2_W_SEC] = bin2bcd(tm->tm_mday); 518 regs[RV3029_W_DATE-RV3029_W_SEC] = bin2bcd(tm->tm_mday);
346 regs[RV3029C2_W_MONTHS-RV3029C2_W_SEC] = bin2bcd(tm->tm_mon+1); 519 regs[RV3029_W_MONTHS-RV3029_W_SEC] = bin2bcd(tm->tm_mon+1);
347 regs[RV3029C2_W_DAYS-RV3029C2_W_SEC] = bin2bcd((tm->tm_wday & 7)+1); 520 regs[RV3029_W_DAYS-RV3029_W_SEC] = bin2bcd((tm->tm_wday & 7)+1);
348 regs[RV3029C2_W_YEARS-RV3029C2_W_SEC] = bin2bcd(tm->tm_year - 100); 521 regs[RV3029_W_YEARS-RV3029_W_SEC] = bin2bcd(tm->tm_year - 100);
349 522
350 ret = rv3029c2_i2c_write_regs(client, RV3029C2_W_SEC, regs, 523 ret = rv3029_i2c_write_regs(client, RV3029_W_SEC, regs,
351 RV3029C2_WATCH_SECTION_LEN); 524 RV3029_WATCH_SECTION_LEN);
352 if (ret < 0) 525 if (ret < 0)
353 return ret; 526 return ret;
354 527
355 ret = rv3029c2_i2c_get_sr(client, regs); 528 ret = rv3029_i2c_get_sr(client, regs);
356 if (ret < 0) { 529 if (ret < 0) {
357 dev_err(&client->dev, "%s: reading SR failed\n", __func__); 530 dev_err(&client->dev, "%s: reading SR failed\n", __func__);
358 return ret; 531 return ret;
359 } 532 }
360 /* clear PON bit */ 533 /* clear PON bit */
361 ret = rv3029c2_i2c_set_sr(client, (regs[0] & ~RV3029C2_STATUS_PON)); 534 ret = rv3029_i2c_set_sr(client, (regs[0] & ~RV3029_STATUS_PON));
362 if (ret < 0) { 535 if (ret < 0) {
363 dev_err(&client->dev, "%s: reading SR failed\n", __func__); 536 dev_err(&client->dev, "%s: reading SR failed\n", __func__);
364 return ret; 537 return ret;
@@ -367,26 +540,238 @@ rv3029c2_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm)
367 return 0; 540 return 0;
368} 541}
369 542
370static int rv3029c2_rtc_set_time(struct device *dev, struct rtc_time *tm) 543static int rv3029_rtc_set_time(struct device *dev, struct rtc_time *tm)
371{ 544{
372 return rv3029c2_i2c_set_time(to_i2c_client(dev), tm); 545 return rv3029_i2c_set_time(to_i2c_client(dev), tm);
373} 546}
374 547
375static const struct rtc_class_ops rv3029c2_rtc_ops = { 548static const struct rv3029_trickle_tab_elem {
376 .read_time = rv3029c2_rtc_read_time, 549 u32 r; /* resistance in ohms */
377 .set_time = rv3029c2_rtc_set_time, 550 u8 conf; /* trickle config bits */
378 .read_alarm = rv3029c2_rtc_read_alarm, 551} rv3029_trickle_tab[] = {
379 .set_alarm = rv3029c2_rtc_set_alarm, 552 {
553 .r = 1076,
554 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
555 RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
556 }, {
557 .r = 1091,
558 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
559 RV3029_TRICKLE_20K,
560 }, {
561 .r = 1137,
562 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
563 RV3029_TRICKLE_80K,
564 }, {
565 .r = 1154,
566 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K,
567 }, {
568 .r = 1371,
569 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K |
570 RV3029_TRICKLE_80K,
571 }, {
572 .r = 1395,
573 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K,
574 }, {
575 .r = 1472,
576 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K,
577 }, {
578 .r = 1500,
579 .conf = RV3029_TRICKLE_1K,
580 }, {
581 .r = 3810,
582 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K |
583 RV3029_TRICKLE_80K,
584 }, {
585 .r = 4000,
586 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K,
587 }, {
588 .r = 4706,
589 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K,
590 }, {
591 .r = 5000,
592 .conf = RV3029_TRICKLE_5K,
593 }, {
594 .r = 16000,
595 .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
596 }, {
597 .r = 20000,
598 .conf = RV3029_TRICKLE_20K,
599 }, {
600 .r = 80000,
601 .conf = RV3029_TRICKLE_80K,
602 },
380}; 603};
381 604
382static struct i2c_device_id rv3029c2_id[] = { 605static void rv3029_trickle_config(struct i2c_client *client)
606{
607 struct device_node *of_node = client->dev.of_node;
608 const struct rv3029_trickle_tab_elem *elem;
609 int i, err;
610 u32 ohms;
611 u8 trickle_set_bits;
612
613 if (!of_node)
614 return;
615
616 /* Configure the trickle charger. */
617 err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms);
618 if (err) {
619 /* Disable trickle charger. */
620 trickle_set_bits = 0;
621 } else {
622 /* Enable trickle charger. */
623 for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) {
624 elem = &rv3029_trickle_tab[i];
625 if (elem->r >= ohms)
626 break;
627 }
628 trickle_set_bits = elem->conf;
629 dev_info(&client->dev,
630 "Trickle charger enabled at %d ohms resistance.\n",
631 elem->r);
632 }
633 err = rv3029_eeprom_update_bits(client, RV3029_CONTROL_E2P_EECTRL,
634 RV3029_TRICKLE_MASK,
635 trickle_set_bits);
636 if (err < 0) {
637 dev_err(&client->dev,
638 "Failed to update trickle charger config\n");
639 }
640}
641
642#ifdef CONFIG_RTC_DRV_RV3029_HWMON
643
644static int rv3029_read_temp(struct i2c_client *client, int *temp_mC)
645{
646 int ret;
647 u8 temp;
648
649 ret = rv3029_i2c_read_regs(client, RV3029_TEMP_PAGE, &temp, 1);
650 if (ret < 0)
651 return ret;
652
653 *temp_mC = ((int)temp - 60) * 1000;
654
655 return 0;
656}
657
658static ssize_t rv3029_hwmon_show_temp(struct device *dev,
659 struct device_attribute *attr,
660 char *buf)
661{
662 struct i2c_client *client = dev_get_drvdata(dev);
663 int ret, temp_mC;
664
665 ret = rv3029_read_temp(client, &temp_mC);
666 if (ret < 0)
667 return ret;
668
669 return sprintf(buf, "%d\n", temp_mC);
670}
671
672static ssize_t rv3029_hwmon_set_update_interval(struct device *dev,
673 struct device_attribute *attr,
674 const char *buf,
675 size_t count)
676{
677 struct i2c_client *client = dev_get_drvdata(dev);
678 unsigned long interval_ms;
679 int ret;
680 u8 th_set_bits = 0;
681
682 ret = kstrtoul(buf, 10, &interval_ms);
683 if (ret < 0)
684 return ret;
685
686 if (interval_ms != 0) {
687 th_set_bits |= RV3029_EECTRL_THE;
688 if (interval_ms >= 16000)
689 th_set_bits |= RV3029_EECTRL_THP;
690 }
691 ret = rv3029_eeprom_update_bits(client, RV3029_CONTROL_E2P_EECTRL,
692 RV3029_EECTRL_THE | RV3029_EECTRL_THP,
693 th_set_bits);
694 if (ret < 0)
695 return ret;
696
697 return count;
698}
699
700static ssize_t rv3029_hwmon_show_update_interval(struct device *dev,
701 struct device_attribute *attr,
702 char *buf)
703{
704 struct i2c_client *client = dev_get_drvdata(dev);
705 int ret, interval_ms;
706 u8 eectrl;
707
708 ret = rv3029_eeprom_read(client, RV3029_CONTROL_E2P_EECTRL,
709 &eectrl, 1);
710 if (ret < 0)
711 return ret;
712
713 if (eectrl & RV3029_EECTRL_THE) {
714 if (eectrl & RV3029_EECTRL_THP)
715 interval_ms = 16000;
716 else
717 interval_ms = 1000;
718 } else {
719 interval_ms = 0;
720 }
721
722 return sprintf(buf, "%d\n", interval_ms);
723}
724
725static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp,
726 NULL, 0);
727static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO,
728 rv3029_hwmon_show_update_interval,
729 rv3029_hwmon_set_update_interval, 0);
730
731static struct attribute *rv3029_hwmon_attrs[] = {
732 &sensor_dev_attr_temp1_input.dev_attr.attr,
733 &sensor_dev_attr_update_interval.dev_attr.attr,
734 NULL,
735};
736ATTRIBUTE_GROUPS(rv3029_hwmon);
737
738static void rv3029_hwmon_register(struct i2c_client *client)
739{
740 struct device *hwmon_dev;
741
742 hwmon_dev = devm_hwmon_device_register_with_groups(
743 &client->dev, client->name, client, rv3029_hwmon_groups);
744 if (IS_ERR(hwmon_dev)) {
745 dev_warn(&client->dev,
746 "unable to register hwmon device %ld\n",
747 PTR_ERR(hwmon_dev));
748 }
749}
750
751#else /* CONFIG_RTC_DRV_RV3029_HWMON */
752
753static void rv3029_hwmon_register(struct i2c_client *client)
754{
755}
756
757#endif /* CONFIG_RTC_DRV_RV3029_HWMON */
758
759static const struct rtc_class_ops rv3029_rtc_ops = {
760 .read_time = rv3029_rtc_read_time,
761 .set_time = rv3029_rtc_set_time,
762 .read_alarm = rv3029_rtc_read_alarm,
763 .set_alarm = rv3029_rtc_set_alarm,
764};
765
766static struct i2c_device_id rv3029_id[] = {
767 { "rv3029", 0 },
383 { "rv3029c2", 0 }, 768 { "rv3029c2", 0 },
384 { } 769 { }
385}; 770};
386MODULE_DEVICE_TABLE(i2c, rv3029c2_id); 771MODULE_DEVICE_TABLE(i2c, rv3029_id);
387 772
388static int rv3029c2_probe(struct i2c_client *client, 773static int rv3029_probe(struct i2c_client *client,
389 const struct i2c_device_id *id) 774 const struct i2c_device_id *id)
390{ 775{
391 struct rtc_device *rtc; 776 struct rtc_device *rtc;
392 int rc = 0; 777 int rc = 0;
@@ -395,14 +780,17 @@ static int rv3029c2_probe(struct i2c_client *client,
395 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_EMUL)) 780 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_EMUL))
396 return -ENODEV; 781 return -ENODEV;
397 782
398 rc = rv3029c2_i2c_get_sr(client, buf); 783 rc = rv3029_i2c_get_sr(client, buf);
399 if (rc < 0) { 784 if (rc < 0) {
400 dev_err(&client->dev, "reading status failed\n"); 785 dev_err(&client->dev, "reading status failed\n");
401 return rc; 786 return rc;
402 } 787 }
403 788
789 rv3029_trickle_config(client);
790 rv3029_hwmon_register(client);
791
404 rtc = devm_rtc_device_register(&client->dev, client->name, 792 rtc = devm_rtc_device_register(&client->dev, client->name,
405 &rv3029c2_rtc_ops, THIS_MODULE); 793 &rv3029_rtc_ops, THIS_MODULE);
406 794
407 if (IS_ERR(rtc)) 795 if (IS_ERR(rtc))
408 return PTR_ERR(rtc); 796 return PTR_ERR(rtc);
@@ -412,16 +800,17 @@ static int rv3029c2_probe(struct i2c_client *client,
412 return 0; 800 return 0;
413} 801}
414 802
415static struct i2c_driver rv3029c2_driver = { 803static struct i2c_driver rv3029_driver = {
416 .driver = { 804 .driver = {
417 .name = "rtc-rv3029c2", 805 .name = "rtc-rv3029c2",
418 }, 806 },
419 .probe = rv3029c2_probe, 807 .probe = rv3029_probe,
420 .id_table = rv3029c2_id, 808 .id_table = rv3029_id,
421}; 809};
422 810
423module_i2c_driver(rv3029c2_driver); 811module_i2c_driver(rv3029_driver);
424 812
425MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>"); 813MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>");
426MODULE_DESCRIPTION("Micro Crystal RV3029C2 RTC driver"); 814MODULE_AUTHOR("Michael Buesch <m@bues.ch>");
815MODULE_DESCRIPTION("Micro Crystal RV3029 RTC driver");
427MODULE_LICENSE("GPL"); 816MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-rv8803.c b/drivers/rtc/rtc-rv8803.c
index 7155c0816aa6..8d9f35ceb808 100644
--- a/drivers/rtc/rtc-rv8803.c
+++ b/drivers/rtc/rtc-rv8803.c
@@ -52,7 +52,7 @@
52struct rv8803_data { 52struct rv8803_data {
53 struct i2c_client *client; 53 struct i2c_client *client;
54 struct rtc_device *rtc; 54 struct rtc_device *rtc;
55 spinlock_t flags_lock; 55 struct mutex flags_lock;
56 u8 ctrl; 56 u8 ctrl;
57}; 57};
58 58
@@ -63,11 +63,11 @@ static irqreturn_t rv8803_handle_irq(int irq, void *dev_id)
63 unsigned long events = 0; 63 unsigned long events = 0;
64 int flags; 64 int flags;
65 65
66 spin_lock(&rv8803->flags_lock); 66 mutex_lock(&rv8803->flags_lock);
67 67
68 flags = i2c_smbus_read_byte_data(client, RV8803_FLAG); 68 flags = i2c_smbus_read_byte_data(client, RV8803_FLAG);
69 if (flags <= 0) { 69 if (flags <= 0) {
70 spin_unlock(&rv8803->flags_lock); 70 mutex_unlock(&rv8803->flags_lock);
71 return IRQ_NONE; 71 return IRQ_NONE;
72 } 72 }
73 73
@@ -102,7 +102,7 @@ static irqreturn_t rv8803_handle_irq(int irq, void *dev_id)
102 rv8803->ctrl); 102 rv8803->ctrl);
103 } 103 }
104 104
105 spin_unlock(&rv8803->flags_lock); 105 mutex_unlock(&rv8803->flags_lock);
106 106
107 return IRQ_HANDLED; 107 return IRQ_HANDLED;
108} 108}
@@ -155,7 +155,6 @@ static int rv8803_set_time(struct device *dev, struct rtc_time *tm)
155 struct rv8803_data *rv8803 = dev_get_drvdata(dev); 155 struct rv8803_data *rv8803 = dev_get_drvdata(dev);
156 u8 date[7]; 156 u8 date[7];
157 int flags, ret; 157 int flags, ret;
158 unsigned long irqflags;
159 158
160 if ((tm->tm_year < 100) || (tm->tm_year > 199)) 159 if ((tm->tm_year < 100) || (tm->tm_year > 199))
161 return -EINVAL; 160 return -EINVAL;
@@ -173,18 +172,18 @@ static int rv8803_set_time(struct device *dev, struct rtc_time *tm)
173 if (ret < 0) 172 if (ret < 0)
174 return ret; 173 return ret;
175 174
176 spin_lock_irqsave(&rv8803->flags_lock, irqflags); 175 mutex_lock(&rv8803->flags_lock);
177 176
178 flags = i2c_smbus_read_byte_data(rv8803->client, RV8803_FLAG); 177 flags = i2c_smbus_read_byte_data(rv8803->client, RV8803_FLAG);
179 if (flags < 0) { 178 if (flags < 0) {
180 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 179 mutex_unlock(&rv8803->flags_lock);
181 return flags; 180 return flags;
182 } 181 }
183 182
184 ret = i2c_smbus_write_byte_data(rv8803->client, RV8803_FLAG, 183 ret = i2c_smbus_write_byte_data(rv8803->client, RV8803_FLAG,
185 flags & ~RV8803_FLAG_V2F); 184 flags & ~RV8803_FLAG_V2F);
186 185
187 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 186 mutex_unlock(&rv8803->flags_lock);
188 187
189 return ret; 188 return ret;
190} 189}
@@ -226,7 +225,6 @@ static int rv8803_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
226 u8 alarmvals[3]; 225 u8 alarmvals[3];
227 u8 ctrl[2]; 226 u8 ctrl[2];
228 int ret, err; 227 int ret, err;
229 unsigned long irqflags;
230 228
231 /* The alarm has no seconds, round up to nearest minute */ 229 /* The alarm has no seconds, round up to nearest minute */
232 if (alrm->time.tm_sec) { 230 if (alrm->time.tm_sec) {
@@ -236,11 +234,11 @@ static int rv8803_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
236 rtc_time64_to_tm(alarm_time, &alrm->time); 234 rtc_time64_to_tm(alarm_time, &alrm->time);
237 } 235 }
238 236
239 spin_lock_irqsave(&rv8803->flags_lock, irqflags); 237 mutex_lock(&rv8803->flags_lock);
240 238
241 ret = i2c_smbus_read_i2c_block_data(client, RV8803_FLAG, 2, ctrl); 239 ret = i2c_smbus_read_i2c_block_data(client, RV8803_FLAG, 2, ctrl);
242 if (ret != 2) { 240 if (ret != 2) {
243 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 241 mutex_unlock(&rv8803->flags_lock);
244 return ret < 0 ? ret : -EIO; 242 return ret < 0 ? ret : -EIO;
245 } 243 }
246 244
@@ -253,14 +251,14 @@ static int rv8803_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
253 err = i2c_smbus_write_byte_data(rv8803->client, RV8803_CTRL, 251 err = i2c_smbus_write_byte_data(rv8803->client, RV8803_CTRL,
254 rv8803->ctrl); 252 rv8803->ctrl);
255 if (err) { 253 if (err) {
256 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 254 mutex_unlock(&rv8803->flags_lock);
257 return err; 255 return err;
258 } 256 }
259 } 257 }
260 258
261 ctrl[1] &= ~RV8803_FLAG_AF; 259 ctrl[1] &= ~RV8803_FLAG_AF;
262 err = i2c_smbus_write_byte_data(rv8803->client, RV8803_FLAG, ctrl[1]); 260 err = i2c_smbus_write_byte_data(rv8803->client, RV8803_FLAG, ctrl[1]);
263 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 261 mutex_unlock(&rv8803->flags_lock);
264 if (err) 262 if (err)
265 return err; 263 return err;
266 264
@@ -289,7 +287,6 @@ static int rv8803_alarm_irq_enable(struct device *dev, unsigned int enabled)
289 struct i2c_client *client = to_i2c_client(dev); 287 struct i2c_client *client = to_i2c_client(dev);
290 struct rv8803_data *rv8803 = dev_get_drvdata(dev); 288 struct rv8803_data *rv8803 = dev_get_drvdata(dev);
291 int ctrl, flags, err; 289 int ctrl, flags, err;
292 unsigned long irqflags;
293 290
294 ctrl = rv8803->ctrl; 291 ctrl = rv8803->ctrl;
295 292
@@ -305,15 +302,15 @@ static int rv8803_alarm_irq_enable(struct device *dev, unsigned int enabled)
305 ctrl &= ~RV8803_CTRL_AIE; 302 ctrl &= ~RV8803_CTRL_AIE;
306 } 303 }
307 304
308 spin_lock_irqsave(&rv8803->flags_lock, irqflags); 305 mutex_lock(&rv8803->flags_lock);
309 flags = i2c_smbus_read_byte_data(client, RV8803_FLAG); 306 flags = i2c_smbus_read_byte_data(client, RV8803_FLAG);
310 if (flags < 0) { 307 if (flags < 0) {
311 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 308 mutex_unlock(&rv8803->flags_lock);
312 return flags; 309 return flags;
313 } 310 }
314 flags &= ~(RV8803_FLAG_AF | RV8803_FLAG_UF); 311 flags &= ~(RV8803_FLAG_AF | RV8803_FLAG_UF);
315 err = i2c_smbus_write_byte_data(client, RV8803_FLAG, flags); 312 err = i2c_smbus_write_byte_data(client, RV8803_FLAG, flags);
316 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 313 mutex_unlock(&rv8803->flags_lock);
317 if (err) 314 if (err)
318 return err; 315 return err;
319 316
@@ -333,7 +330,6 @@ static int rv8803_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
333 struct i2c_client *client = to_i2c_client(dev); 330 struct i2c_client *client = to_i2c_client(dev);
334 struct rv8803_data *rv8803 = dev_get_drvdata(dev); 331 struct rv8803_data *rv8803 = dev_get_drvdata(dev);
335 int flags, ret = 0; 332 int flags, ret = 0;
336 unsigned long irqflags;
337 333
338 switch (cmd) { 334 switch (cmd) {
339 case RTC_VL_READ: 335 case RTC_VL_READ:
@@ -355,16 +351,16 @@ static int rv8803_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
355 return 0; 351 return 0;
356 352
357 case RTC_VL_CLR: 353 case RTC_VL_CLR:
358 spin_lock_irqsave(&rv8803->flags_lock, irqflags); 354 mutex_lock(&rv8803->flags_lock);
359 flags = i2c_smbus_read_byte_data(client, RV8803_FLAG); 355 flags = i2c_smbus_read_byte_data(client, RV8803_FLAG);
360 if (flags < 0) { 356 if (flags < 0) {
361 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 357 mutex_unlock(&rv8803->flags_lock);
362 return flags; 358 return flags;
363 } 359 }
364 360
365 flags &= ~(RV8803_FLAG_V1F | RV8803_FLAG_V2F); 361 flags &= ~(RV8803_FLAG_V1F | RV8803_FLAG_V2F);
366 ret = i2c_smbus_write_byte_data(client, RV8803_FLAG, flags); 362 ret = i2c_smbus_write_byte_data(client, RV8803_FLAG, flags);
367 spin_unlock_irqrestore(&rv8803->flags_lock, irqflags); 363 mutex_unlock(&rv8803->flags_lock);
368 if (ret < 0) 364 if (ret < 0)
369 return ret; 365 return ret;
370 366
@@ -441,6 +437,7 @@ static int rv8803_probe(struct i2c_client *client,
441 if (!rv8803) 437 if (!rv8803)
442 return -ENOMEM; 438 return -ENOMEM;
443 439
440 mutex_init(&rv8803->flags_lock);
444 rv8803->client = client; 441 rv8803->client = client;
445 i2c_set_clientdata(client, rv8803); 442 i2c_set_clientdata(client, rv8803);
446 443
diff --git a/drivers/rtc/rtc-rx6110.c b/drivers/rtc/rtc-rx6110.c
new file mode 100644
index 000000000000..bbad00b233bc
--- /dev/null
+++ b/drivers/rtc/rtc-rx6110.c
@@ -0,0 +1,402 @@
1/*
2 * Driver for the Epson RTC module RX-6110 SA
3 *
4 * Copyright(C) 2015 Pengutronix, Steffen Trumtrar <kernel@pengutronix.de>
5 * Copyright(C) SEIKO EPSON CORPORATION 2013. All rights reserved.
6 *
7 * This driver software is distributed as is, without any warranty of any kind,
8 * either express or implied as further specified in the GNU Public License.
9 * This software may be used and distributed according to the terms of the GNU
10 * Public License, version 2 as published by the Free Software Foundation.
11 * See the file COPYING in the main directory of this archive for more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/bcd.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/of_gpio.h>
22#include <linux/regmap.h>
23#include <linux/rtc.h>
24#include <linux/spi/spi.h>
25
26/* RX-6110 Register definitions */
27#define RX6110_REG_SEC 0x10
28#define RX6110_REG_MIN 0x11
29#define RX6110_REG_HOUR 0x12
30#define RX6110_REG_WDAY 0x13
31#define RX6110_REG_MDAY 0x14
32#define RX6110_REG_MONTH 0x15
33#define RX6110_REG_YEAR 0x16
34#define RX6110_REG_RES1 0x17
35#define RX6110_REG_ALMIN 0x18
36#define RX6110_REG_ALHOUR 0x19
37#define RX6110_REG_ALWDAY 0x1A
38#define RX6110_REG_TCOUNT0 0x1B
39#define RX6110_REG_TCOUNT1 0x1C
40#define RX6110_REG_EXT 0x1D
41#define RX6110_REG_FLAG 0x1E
42#define RX6110_REG_CTRL 0x1F
43#define RX6110_REG_USER0 0x20
44#define RX6110_REG_USER1 0x21
45#define RX6110_REG_USER2 0x22
46#define RX6110_REG_USER3 0x23
47#define RX6110_REG_USER4 0x24
48#define RX6110_REG_USER5 0x25
49#define RX6110_REG_USER6 0x26
50#define RX6110_REG_USER7 0x27
51#define RX6110_REG_USER8 0x28
52#define RX6110_REG_USER9 0x29
53#define RX6110_REG_USERA 0x2A
54#define RX6110_REG_USERB 0x2B
55#define RX6110_REG_USERC 0x2C
56#define RX6110_REG_USERD 0x2D
57#define RX6110_REG_USERE 0x2E
58#define RX6110_REG_USERF 0x2F
59#define RX6110_REG_RES2 0x30
60#define RX6110_REG_RES3 0x31
61#define RX6110_REG_IRQ 0x32
62
63#define RX6110_BIT_ALARM_EN BIT(7)
64
65/* Extension Register (1Dh) bit positions */
66#define RX6110_BIT_EXT_TSEL0 BIT(0)
67#define RX6110_BIT_EXT_TSEL1 BIT(1)
68#define RX6110_BIT_EXT_TSEL2 BIT(2)
69#define RX6110_BIT_EXT_WADA BIT(3)
70#define RX6110_BIT_EXT_TE BIT(4)
71#define RX6110_BIT_EXT_USEL BIT(5)
72#define RX6110_BIT_EXT_FSEL0 BIT(6)
73#define RX6110_BIT_EXT_FSEL1 BIT(7)
74
75/* Flag Register (1Eh) bit positions */
76#define RX6110_BIT_FLAG_VLF BIT(1)
77#define RX6110_BIT_FLAG_AF BIT(3)
78#define RX6110_BIT_FLAG_TF BIT(4)
79#define RX6110_BIT_FLAG_UF BIT(5)
80
81/* Control Register (1Fh) bit positions */
82#define RX6110_BIT_CTRL_TBKE BIT(0)
83#define RX6110_BIT_CTRL_TBKON BIT(1)
84#define RX6110_BIT_CTRL_TSTP BIT(2)
85#define RX6110_BIT_CTRL_AIE BIT(3)
86#define RX6110_BIT_CTRL_TIE BIT(4)
87#define RX6110_BIT_CTRL_UIE BIT(5)
88#define RX6110_BIT_CTRL_STOP BIT(6)
89#define RX6110_BIT_CTRL_TEST BIT(7)
90
91enum {
92 RTC_SEC = 0,
93 RTC_MIN,
94 RTC_HOUR,
95 RTC_WDAY,
96 RTC_MDAY,
97 RTC_MONTH,
98 RTC_YEAR,
99 RTC_NR_TIME
100};
101
102#define RX6110_DRIVER_NAME "rx6110"
103
104struct rx6110_data {
105 struct rtc_device *rtc;
106 struct regmap *regmap;
107};
108
109/**
110 * rx6110_rtc_tm_to_data - convert rtc_time to native time encoding
111 *
112 * @tm: holds date and time
113 * @data: holds the encoding in rx6110 native form
114 */
115static int rx6110_rtc_tm_to_data(struct rtc_time *tm, u8 *data)
116{
117 pr_debug("%s: date %ds %dm %dh %dmd %dm %dy\n", __func__,
118 tm->tm_sec, tm->tm_min, tm->tm_hour,
119 tm->tm_mday, tm->tm_mon, tm->tm_year);
120
121 /*
122 * The year in the RTC is a value between 0 and 99.
123 * Assume that this represents the current century
124 * and disregard all other values.
125 */
126 if (tm->tm_year < 100 || tm->tm_year >= 200)
127 return -EINVAL;
128
129 data[RTC_SEC] = bin2bcd(tm->tm_sec);
130 data[RTC_MIN] = bin2bcd(tm->tm_min);
131 data[RTC_HOUR] = bin2bcd(tm->tm_hour);
132 data[RTC_WDAY] = BIT(bin2bcd(tm->tm_wday));
133 data[RTC_MDAY] = bin2bcd(tm->tm_mday);
134 data[RTC_MONTH] = bin2bcd(tm->tm_mon + 1);
135 data[RTC_YEAR] = bin2bcd(tm->tm_year % 100);
136
137 return 0;
138}
139
140/**
141 * rx6110_data_to_rtc_tm - convert native time encoding to rtc_time
142 *
143 * @data: holds the encoding in rx6110 native form
144 * @tm: holds date and time
145 */
146static int rx6110_data_to_rtc_tm(u8 *data, struct rtc_time *tm)
147{
148 tm->tm_sec = bcd2bin(data[RTC_SEC] & 0x7f);
149 tm->tm_min = bcd2bin(data[RTC_MIN] & 0x7f);
150 /* only 24-hour clock */
151 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
152 tm->tm_wday = ffs(data[RTC_WDAY] & 0x7f);
153 tm->tm_mday = bcd2bin(data[RTC_MDAY] & 0x3f);
154 tm->tm_mon = bcd2bin(data[RTC_MONTH] & 0x1f) - 1;
155 tm->tm_year = bcd2bin(data[RTC_YEAR]) + 100;
156
157 pr_debug("%s: date %ds %dm %dh %dmd %dm %dy\n", __func__,
158 tm->tm_sec, tm->tm_min, tm->tm_hour,
159 tm->tm_mday, tm->tm_mon, tm->tm_year);
160
161 /*
162 * The year in the RTC is a value between 0 and 99.
163 * Assume that this represents the current century
164 * and disregard all other values.
165 */
166 if (tm->tm_year < 100 || tm->tm_year >= 200)
167 return -EINVAL;
168
169 return 0;
170}
171
172/**
173 * rx6110_set_time - set the current time in the rx6110 registers
174 *
175 * @dev: the rtc device in use
176 * @tm: holds date and time
177 *
178 * BUG: The HW assumes every year that is a multiple of 4 to be a leap
179 * year. Next time this is wrong is 2100, which will not be a leap year
180 *
181 * Note: If STOP is not set/cleared, the clock will start when the seconds
182 * register is written
183 *
184 */
185static int rx6110_set_time(struct device *dev, struct rtc_time *tm)
186{
187 struct rx6110_data *rx6110 = dev_get_drvdata(dev);
188 u8 data[RTC_NR_TIME];
189 int ret;
190
191 ret = rx6110_rtc_tm_to_data(tm, data);
192 if (ret < 0)
193 return ret;
194
195 /* set STOP bit before changing clock/calendar */
196 ret = regmap_update_bits(rx6110->regmap, RX6110_REG_CTRL,
197 RX6110_BIT_CTRL_STOP, RX6110_BIT_CTRL_STOP);
198 if (ret)
199 return ret;
200
201 ret = regmap_bulk_write(rx6110->regmap, RX6110_REG_SEC, data,
202 RTC_NR_TIME);
203 if (ret)
204 return ret;
205
206 /* The time in the RTC is valid. Be sure to have VLF cleared. */
207 ret = regmap_update_bits(rx6110->regmap, RX6110_REG_FLAG,
208 RX6110_BIT_FLAG_VLF, 0);
209 if (ret)
210 return ret;
211
212 /* clear STOP bit after changing clock/calendar */
213 ret = regmap_update_bits(rx6110->regmap, RX6110_REG_CTRL,
214 RX6110_BIT_CTRL_STOP, 0);
215
216 return ret;
217}
218
219/**
220 * rx6110_get_time - get the current time from the rx6110 registers
221 * @dev: the rtc device in use
222 * @tm: holds date and time
223 */
224static int rx6110_get_time(struct device *dev, struct rtc_time *tm)
225{
226 struct rx6110_data *rx6110 = dev_get_drvdata(dev);
227 u8 data[RTC_NR_TIME];
228 int flags;
229 int ret;
230
231 ret = regmap_read(rx6110->regmap, RX6110_REG_FLAG, &flags);
232 if (ret)
233 return -EINVAL;
234
235 /* check for VLF Flag (set at power-on) */
236 if ((flags & RX6110_BIT_FLAG_VLF)) {
237 dev_warn(dev, "Voltage low, data is invalid.\n");
238 return -EINVAL;
239 }
240
241 /* read registers to date */
242 ret = regmap_bulk_read(rx6110->regmap, RX6110_REG_SEC, data,
243 RTC_NR_TIME);
244 if (ret)
245 return ret;
246
247 ret = rx6110_data_to_rtc_tm(data, tm);
248 if (ret)
249 return ret;
250
251 dev_dbg(dev, "%s: date %ds %dm %dh %dmd %dm %dy\n", __func__,
252 tm->tm_sec, tm->tm_min, tm->tm_hour,
253 tm->tm_mday, tm->tm_mon, tm->tm_year);
254
255 return rtc_valid_tm(tm);
256}
257
258static const struct reg_sequence rx6110_default_regs[] = {
259 { RX6110_REG_RES1, 0xB8 },
260 { RX6110_REG_RES2, 0x00 },
261 { RX6110_REG_RES3, 0x10 },
262 { RX6110_REG_IRQ, 0x00 },
263 { RX6110_REG_ALMIN, 0x00 },
264 { RX6110_REG_ALHOUR, 0x00 },
265 { RX6110_REG_ALWDAY, 0x00 },
266};
267
268/**
269 * rx6110_init - initialize the rx6110 registers
270 *
271 * @rx6110: pointer to the rx6110 struct in use
272 *
273 */
274static int rx6110_init(struct rx6110_data *rx6110)
275{
276 struct rtc_device *rtc = rx6110->rtc;
277 int flags;
278 int ret;
279
280 ret = regmap_update_bits(rx6110->regmap, RX6110_REG_EXT,
281 RX6110_BIT_EXT_TE, 0);
282 if (ret)
283 return ret;
284
285 ret = regmap_register_patch(rx6110->regmap, rx6110_default_regs,
286 ARRAY_SIZE(rx6110_default_regs));
287 if (ret)
288 return ret;
289
290 ret = regmap_read(rx6110->regmap, RX6110_REG_FLAG, &flags);
291 if (ret)
292 return ret;
293
294 /* check for VLF Flag (set at power-on) */
295 if ((flags & RX6110_BIT_FLAG_VLF))
296 dev_warn(&rtc->dev, "Voltage low, data loss detected.\n");
297
298 /* check for Alarm Flag */
299 if (flags & RX6110_BIT_FLAG_AF)
300 dev_warn(&rtc->dev, "An alarm may have been missed.\n");
301
302 /* check for Periodic Timer Flag */
303 if (flags & RX6110_BIT_FLAG_TF)
304 dev_warn(&rtc->dev, "Periodic timer was detected\n");
305
306 /* check for Update Timer Flag */
307 if (flags & RX6110_BIT_FLAG_UF)
308 dev_warn(&rtc->dev, "Update timer was detected\n");
309
310 /* clear all flags BUT VLF */
311 ret = regmap_update_bits(rx6110->regmap, RX6110_REG_FLAG,
312 RX6110_BIT_FLAG_AF |
313 RX6110_BIT_FLAG_UF |
314 RX6110_BIT_FLAG_TF,
315 0);
316
317 return ret;
318}
319
320static struct rtc_class_ops rx6110_rtc_ops = {
321 .read_time = rx6110_get_time,
322 .set_time = rx6110_set_time,
323};
324
325static struct regmap_config regmap_spi_config = {
326 .reg_bits = 8,
327 .val_bits = 8,
328 .max_register = RX6110_REG_IRQ,
329 .read_flag_mask = 0x80,
330};
331
332/**
333 * rx6110_probe - initialize rtc driver
334 * @spi: pointer to spi device
335 */
336static int rx6110_probe(struct spi_device *spi)
337{
338 struct rx6110_data *rx6110;
339 int err;
340
341 if ((spi->bits_per_word && spi->bits_per_word != 8) ||
342 (spi->max_speed_hz > 2000000) ||
343 (spi->mode != (SPI_CS_HIGH | SPI_CPOL | SPI_CPHA))) {
344 dev_warn(&spi->dev, "SPI settings: bits_per_word: %d, max_speed_hz: %d, mode: %xh\n",
345 spi->bits_per_word, spi->max_speed_hz, spi->mode);
346 dev_warn(&spi->dev, "driving device in an unsupported mode");
347 }
348
349 rx6110 = devm_kzalloc(&spi->dev, sizeof(*rx6110), GFP_KERNEL);
350 if (!rx6110)
351 return -ENOMEM;
352
353 rx6110->regmap = devm_regmap_init_spi(spi, &regmap_spi_config);
354 if (IS_ERR(rx6110->regmap)) {
355 dev_err(&spi->dev, "regmap init failed for rtc rx6110\n");
356 return PTR_ERR(rx6110->regmap);
357 }
358
359 spi_set_drvdata(spi, rx6110);
360
361 rx6110->rtc = devm_rtc_device_register(&spi->dev,
362 RX6110_DRIVER_NAME,
363 &rx6110_rtc_ops, THIS_MODULE);
364
365 if (IS_ERR(rx6110->rtc))
366 return PTR_ERR(rx6110->rtc);
367
368 err = rx6110_init(rx6110);
369 if (err)
370 return err;
371
372 rx6110->rtc->max_user_freq = 1;
373
374 return 0;
375}
376
377static int rx6110_remove(struct spi_device *spi)
378{
379 return 0;
380}
381
382static const struct spi_device_id rx6110_id[] = {
383 { "rx6110", 0 },
384 { }
385};
386MODULE_DEVICE_TABLE(spi, rx6110_id);
387
388static struct spi_driver rx6110_driver = {
389 .driver = {
390 .name = RX6110_DRIVER_NAME,
391 .owner = THIS_MODULE,
392 },
393 .probe = rx6110_probe,
394 .remove = rx6110_remove,
395 .id_table = rx6110_id,
396};
397
398module_spi_driver(rx6110_driver);
399
400MODULE_AUTHOR("Val Krutov <val.krutov@erd.epson.com>");
401MODULE_DESCRIPTION("RX-6110 SA RTC driver");
402MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-rx8025.c b/drivers/rtc/rtc-rx8025.c
index bd911bafb809..b69647e0be23 100644
--- a/drivers/rtc/rtc-rx8025.c
+++ b/drivers/rtc/rtc-rx8025.c
@@ -65,7 +65,6 @@
65 65
66static const struct i2c_device_id rx8025_id[] = { 66static const struct i2c_device_id rx8025_id[] = {
67 { "rx8025", 0 }, 67 { "rx8025", 0 },
68 { "rv8803", 1 },
69 { } 68 { }
70}; 69};
71MODULE_DEVICE_TABLE(i2c, rx8025_id); 70MODULE_DEVICE_TABLE(i2c, rx8025_id);
@@ -147,8 +146,10 @@ static irqreturn_t rx8025_handle_irq(int irq, void *dev_id)
147{ 146{
148 struct i2c_client *client = dev_id; 147 struct i2c_client *client = dev_id;
149 struct rx8025_data *rx8025 = i2c_get_clientdata(client); 148 struct rx8025_data *rx8025 = i2c_get_clientdata(client);
149 struct mutex *lock = &rx8025->rtc->ops_lock;
150 int status; 150 int status;
151 151
152 mutex_lock(lock);
152 status = rx8025_read_reg(client, RX8025_REG_CTRL2); 153 status = rx8025_read_reg(client, RX8025_REG_CTRL2);
153 if (status < 0) 154 if (status < 0)
154 goto out; 155 goto out;
@@ -173,6 +174,8 @@ static irqreturn_t rx8025_handle_irq(int irq, void *dev_id)
173 } 174 }
174 175
175out: 176out:
177 mutex_unlock(lock);
178
176 return IRQ_HANDLED; 179 return IRQ_HANDLED;
177} 180}
178 181
@@ -341,7 +344,17 @@ static int rx8025_set_alarm(struct device *dev, struct rtc_wkalrm *t)
341 if (client->irq <= 0) 344 if (client->irq <= 0)
342 return -EINVAL; 345 return -EINVAL;
343 346
344 /* Hardware alarm precision is 1 minute! */ 347 /*
348 * Hardware alarm precision is 1 minute!
349 * round up to nearest minute
350 */
351 if (t->time.tm_sec) {
352 time64_t alarm_time = rtc_tm_to_time64(&t->time);
353
354 alarm_time += 60 - t->time.tm_sec;
355 rtc_time64_to_tm(alarm_time, &t->time);
356 }
357
345 ald[0] = bin2bcd(t->time.tm_min); 358 ald[0] = bin2bcd(t->time.tm_min);
346 if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224) 359 if (rx8025->ctrl1 & RX8025_BIT_CTRL1_1224)
347 ald[1] = bin2bcd(t->time.tm_hour); 360 ald[1] = bin2bcd(t->time.tm_hour);
@@ -539,8 +552,9 @@ static int rx8025_probe(struct i2c_client *client,
539 if (client->irq > 0) { 552 if (client->irq > 0) {
540 dev_info(&client->dev, "IRQ %d supplied\n", client->irq); 553 dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
541 err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 554 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
542 rx8025_handle_irq, 0, "rx8025", 555 rx8025_handle_irq,
543 client); 556 IRQF_ONESHOT,
557 "rx8025", client);
544 if (err) { 558 if (err) {
545 dev_err(&client->dev, "unable to request IRQ, alarms disabled\n"); 559 dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
546 client->irq = 0; 560 client->irq = 0;
@@ -549,6 +563,9 @@ static int rx8025_probe(struct i2c_client *client,
549 563
550 rx8025->rtc->max_user_freq = 1; 564 rx8025->rtc->max_user_freq = 1;
551 565
566 /* the rx8025 alarm only supports a minute accuracy */
567 rx8025->rtc->uie_unsupported = 1;
568
552 err = rx8025_sysfs_register(&client->dev); 569 err = rx8025_sysfs_register(&client->dev);
553 return err; 570 return err;
554} 571}
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
index 7407d7394bb4..0477678d968f 100644
--- a/drivers/rtc/rtc-s5m.c
+++ b/drivers/rtc/rtc-s5m.c
@@ -216,7 +216,7 @@ static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
216 * Read RTC_UDR_CON register and wait till UDR field is cleared. 216 * Read RTC_UDR_CON register and wait till UDR field is cleared.
217 * This indicates that time/alarm update ended. 217 * This indicates that time/alarm update ended.
218 */ 218 */
219static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info) 219static int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
220{ 220{
221 int ret, retry = UDR_READ_RETRY_CNT; 221 int ret, retry = UDR_READ_RETRY_CNT;
222 unsigned int data; 222 unsigned int data;
@@ -231,7 +231,7 @@ static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
231 return ret; 231 return ret;
232} 232}
233 233
234static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info, 234static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
235 struct rtc_wkalrm *alarm) 235 struct rtc_wkalrm *alarm)
236{ 236{
237 int ret; 237 int ret;
@@ -264,7 +264,7 @@ static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
264 return 0; 264 return 0;
265} 265}
266 266
267static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) 267static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
268{ 268{
269 int ret; 269 int ret;
270 unsigned int data; 270 unsigned int data;
@@ -288,7 +288,7 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
288 return ret; 288 return ret;
289} 289}
290 290
291static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) 291static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
292{ 292{
293 int ret; 293 int ret;
294 unsigned int data; 294 unsigned int data;
diff --git a/drivers/rtc/rtc-sysfs.c b/drivers/rtc/rtc-sysfs.c
index 463e286064ab..63b9fb1318c2 100644
--- a/drivers/rtc/rtc-sysfs.c
+++ b/drivers/rtc/rtc-sysfs.c
@@ -218,6 +218,34 @@ wakealarm_store(struct device *dev, struct device_attribute *attr,
218} 218}
219static DEVICE_ATTR_RW(wakealarm); 219static DEVICE_ATTR_RW(wakealarm);
220 220
221static ssize_t
222offset_show(struct device *dev, struct device_attribute *attr, char *buf)
223{
224 ssize_t retval;
225 long offset;
226
227 retval = rtc_read_offset(to_rtc_device(dev), &offset);
228 if (retval == 0)
229 retval = sprintf(buf, "%ld\n", offset);
230
231 return retval;
232}
233
234static ssize_t
235offset_store(struct device *dev, struct device_attribute *attr,
236 const char *buf, size_t n)
237{
238 ssize_t retval;
239 long offset;
240
241 retval = kstrtol(buf, 10, &offset);
242 if (retval == 0)
243 retval = rtc_set_offset(to_rtc_device(dev), offset);
244
245 return (retval < 0) ? retval : n;
246}
247static DEVICE_ATTR_RW(offset);
248
221static struct attribute *rtc_attrs[] = { 249static struct attribute *rtc_attrs[] = {
222 &dev_attr_name.attr, 250 &dev_attr_name.attr,
223 &dev_attr_date.attr, 251 &dev_attr_date.attr,
@@ -226,6 +254,7 @@ static struct attribute *rtc_attrs[] = {
226 &dev_attr_max_user_freq.attr, 254 &dev_attr_max_user_freq.attr,
227 &dev_attr_hctosys.attr, 255 &dev_attr_hctosys.attr,
228 &dev_attr_wakealarm.attr, 256 &dev_attr_wakealarm.attr,
257 &dev_attr_offset.attr,
229 NULL, 258 NULL,
230}; 259};
231 260
@@ -249,9 +278,13 @@ static umode_t rtc_attr_is_visible(struct kobject *kobj,
249 struct rtc_device *rtc = to_rtc_device(dev); 278 struct rtc_device *rtc = to_rtc_device(dev);
250 umode_t mode = attr->mode; 279 umode_t mode = attr->mode;
251 280
252 if (attr == &dev_attr_wakealarm.attr) 281 if (attr == &dev_attr_wakealarm.attr) {
253 if (!rtc_does_wakealarm(rtc)) 282 if (!rtc_does_wakealarm(rtc))
254 mode = 0; 283 mode = 0;
284 } else if (attr == &dev_attr_offset.attr) {
285 if (!rtc->ops->set_offset)
286 mode = 0;
287 }
255 288
256 return mode; 289 return mode;
257} 290}
diff --git a/drivers/rtc/rtc-tps6586x.c b/drivers/rtc/rtc-tps6586x.c
index 3b6ce80a769c..e404faac6851 100644
--- a/drivers/rtc/rtc-tps6586x.c
+++ b/drivers/rtc/rtc-tps6586x.c
@@ -286,7 +286,7 @@ static int tps6586x_rtc_probe(struct platform_device *pdev)
286 286
287 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, 287 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
288 tps6586x_rtc_irq, 288 tps6586x_rtc_irq,
289 IRQF_ONESHOT | IRQF_EARLY_RESUME, 289 IRQF_ONESHOT,
290 dev_name(&pdev->dev), rtc); 290 dev_name(&pdev->dev), rtc);
291 if (ret < 0) { 291 if (ret < 0) {
292 dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n", 292 dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
diff --git a/drivers/rtc/rtc-tps65910.c b/drivers/rtc/rtc-tps65910.c
index f42aa2b2dcba..5a3d53caa485 100644
--- a/drivers/rtc/rtc-tps65910.c
+++ b/drivers/rtc/rtc-tps65910.c
@@ -268,7 +268,7 @@ static int tps65910_rtc_probe(struct platform_device *pdev)
268 } 268 }
269 269
270 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, 270 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
271 tps65910_rtc_interrupt, IRQF_TRIGGER_LOW | IRQF_EARLY_RESUME, 271 tps65910_rtc_interrupt, IRQF_TRIGGER_LOW,
272 dev_name(&pdev->dev), &pdev->dev); 272 dev_name(&pdev->dev), &pdev->dev);
273 if (ret < 0) { 273 if (ret < 0) {
274 dev_err(&pdev->dev, "IRQ is not free.\n"); 274 dev_err(&pdev->dev, "IRQ is not free.\n");
diff --git a/drivers/rtc/rtc-tps80031.c b/drivers/rtc/rtc-tps80031.c
index 27e254cde715..737f26eb284a 100644
--- a/drivers/rtc/rtc-tps80031.c
+++ b/drivers/rtc/rtc-tps80031.c
@@ -287,7 +287,7 @@ static int tps80031_rtc_probe(struct platform_device *pdev)
287 287
288 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, 288 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
289 tps80031_rtc_irq, 289 tps80031_rtc_irq,
290 IRQF_ONESHOT | IRQF_EARLY_RESUME, 290 IRQF_ONESHOT,
291 dev_name(&pdev->dev), rtc); 291 dev_name(&pdev->dev), rtc);
292 if (ret < 0) { 292 if (ret < 0) {
293 dev_err(&pdev->dev, "request IRQ:%d failed, err = %d\n", 293 dev_err(&pdev->dev, "request IRQ:%d failed, err = %d\n",
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c
index f64c282275b3..e1b86bb01062 100644
--- a/drivers/rtc/rtc-vr41xx.c
+++ b/drivers/rtc/rtc-vr41xx.c
@@ -272,12 +272,13 @@ static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
272} 272}
273 273
274static const struct rtc_class_ops vr41xx_rtc_ops = { 274static const struct rtc_class_ops vr41xx_rtc_ops = {
275 .release = vr41xx_rtc_release, 275 .release = vr41xx_rtc_release,
276 .ioctl = vr41xx_rtc_ioctl, 276 .ioctl = vr41xx_rtc_ioctl,
277 .read_time = vr41xx_rtc_read_time, 277 .read_time = vr41xx_rtc_read_time,
278 .set_time = vr41xx_rtc_set_time, 278 .set_time = vr41xx_rtc_set_time,
279 .read_alarm = vr41xx_rtc_read_alarm, 279 .read_alarm = vr41xx_rtc_read_alarm,
280 .set_alarm = vr41xx_rtc_set_alarm, 280 .set_alarm = vr41xx_rtc_set_alarm,
281 .alarm_irq_enable = vr41xx_rtc_alarm_irq_enable,
281}; 282};
282 283
283static int rtc_probe(struct platform_device *pdev) 284static int rtc_probe(struct platform_device *pdev)
diff --git a/include/linux/mfd/max77686-private.h b/include/linux/mfd/max77686-private.h
index f5043490d67c..643dae777b43 100644
--- a/include/linux/mfd/max77686-private.h
+++ b/include/linux/mfd/max77686-private.h
@@ -437,14 +437,11 @@ enum max77686_irq {
437struct max77686_dev { 437struct max77686_dev {
438 struct device *dev; 438 struct device *dev;
439 struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */ 439 struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
440 struct i2c_client *rtc; /* slave addr 0x0c */
441 440
442 unsigned long type; 441 unsigned long type;
443 442
444 struct regmap *regmap; /* regmap for mfd */ 443 struct regmap *regmap; /* regmap for mfd */
445 struct regmap *rtc_regmap; /* regmap for rtc */
446 struct regmap_irq_chip_data *irq_data; 444 struct regmap_irq_chip_data *irq_data;
447 struct regmap_irq_chip_data *rtc_irq_data;
448 445
449 int irq; 446 int irq;
450 struct mutex irqlock; 447 struct mutex irqlock;
diff --git a/include/linux/rtc.h b/include/linux/rtc.h
index 3359f0422c6b..b693adac853b 100644
--- a/include/linux/rtc.h
+++ b/include/linux/rtc.h
@@ -89,6 +89,8 @@ struct rtc_class_ops {
89 int (*set_mmss)(struct device *, unsigned long secs); 89 int (*set_mmss)(struct device *, unsigned long secs);
90 int (*read_callback)(struct device *, int data); 90 int (*read_callback)(struct device *, int data);
91 int (*alarm_irq_enable)(struct device *, unsigned int enabled); 91 int (*alarm_irq_enable)(struct device *, unsigned int enabled);
92 int (*read_offset)(struct device *, long *offset);
93 int (*set_offset)(struct device *, long offset);
92}; 94};
93 95
94#define RTC_DEVICE_NAME_SIZE 20 96#define RTC_DEVICE_NAME_SIZE 20
@@ -208,6 +210,8 @@ void rtc_timer_init(struct rtc_timer *timer, void (*f)(void *p), void *data);
208int rtc_timer_start(struct rtc_device *rtc, struct rtc_timer *timer, 210int rtc_timer_start(struct rtc_device *rtc, struct rtc_timer *timer,
209 ktime_t expires, ktime_t period); 211 ktime_t expires, ktime_t period);
210void rtc_timer_cancel(struct rtc_device *rtc, struct rtc_timer *timer); 212void rtc_timer_cancel(struct rtc_device *rtc, struct rtc_timer *timer);
213int rtc_read_offset(struct rtc_device *rtc, long *offset);
214int rtc_set_offset(struct rtc_device *rtc, long offset);
211void rtc_timer_do_work(struct work_struct *work); 215void rtc_timer_do_work(struct work_struct *work);
212 216
213static inline bool is_leap_year(unsigned int year) 217static inline bool is_leap_year(unsigned int year)