diff options
| author | Neil Armstrong <narmstrong@baylibre.com> | 2019-03-21 05:20:10 -0400 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2019-04-01 04:45:11 -0400 |
| commit | 133bb341b99d096d332108f412234d0cf641c15d (patch) | |
| tree | 88c71863a8856b9af812e680338890fdd43789c5 | |
| parent | 23e9ae2826466f17d4733b80bf1cc98645e90ef2 (diff) | |
dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN
When submitted v2 of the G12A AO-CLK IDs, the CLKID_AO_CTS_OSCIN was moved
to the internal non-exported bindings, but this clock is necessary for
the second AO-CEC-B module since it embeds the 32768Hz dual-divider
clock generator unlike the AO-CEC-A module.
Export it back to the public bindings.
Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20190321092010.14382-1-narmstrong@baylibre.com
| -rw-r--r-- | drivers/clk/meson/g12a-aoclk.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/g12a-aoclkc.h | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/meson/g12a-aoclk.h b/drivers/clk/meson/g12a-aoclk.h index 666b4493822c..a67c8a7cd7c4 100644 --- a/drivers/clk/meson/g12a-aoclk.h +++ b/drivers/clk/meson/g12a-aoclk.h | |||
| @@ -17,7 +17,6 @@ | |||
| 17 | * will remain defined here. | 17 | * will remain defined here. |
| 18 | */ | 18 | */ |
| 19 | #define CLKID_AO_SAR_ADC_DIV 17 | 19 | #define CLKID_AO_SAR_ADC_DIV 17 |
| 20 | #define CLKID_AO_CTS_OSCIN 19 | ||
| 21 | #define CLKID_AO_32K_PRE 20 | 20 | #define CLKID_AO_32K_PRE 20 |
| 22 | #define CLKID_AO_32K_DIV 21 | 21 | #define CLKID_AO_32K_DIV 21 |
| 23 | #define CLKID_AO_32K_SEL 22 | 22 | #define CLKID_AO_32K_SEL 22 |
diff --git a/include/dt-bindings/clock/g12a-aoclkc.h b/include/dt-bindings/clock/g12a-aoclkc.h index 5ac66a2eee0f..e916e49ff288 100644 --- a/include/dt-bindings/clock/g12a-aoclkc.h +++ b/include/dt-bindings/clock/g12a-aoclkc.h | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #define CLKID_AO_CLK81 15 | 28 | #define CLKID_AO_CLK81 15 |
| 29 | #define CLKID_AO_SAR_ADC_SEL 16 | 29 | #define CLKID_AO_SAR_ADC_SEL 16 |
| 30 | #define CLKID_AO_SAR_ADC_CLK 18 | 30 | #define CLKID_AO_SAR_ADC_CLK 18 |
| 31 | #define CLKID_AO_CTS_OSCIN 19 | ||
| 31 | #define CLKID_AO_32K 23 | 32 | #define CLKID_AO_32K 23 |
| 32 | #define CLKID_AO_CEC 27 | 33 | #define CLKID_AO_CEC 27 |
| 33 | #define CLKID_AO_CTS_RTC_OSCIN 28 | 34 | #define CLKID_AO_CTS_RTC_OSCIN 28 |
