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authorLinus Torvalds <torvalds@linux-foundation.org>2016-03-18 13:15:11 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-03-18 13:15:11 -0400
commit12e7b0a62752234497de51356903f5f4e6bd2f77 (patch)
tree700601b833bf3e4097eb9307ed3fcc5d32d8d117
parent021f163d696caed5a336fa1569efdd22216da340 (diff)
parent0343b2f4e4a52c907d7676ce3159e0b5e7f0301c (diff)
Merge tag 'mfd-for-linus-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones: "New Drivers: - Freescale Touch Screen ADC - X-Powers AXP PMIC with RSB - TI TPS65086 Power Management IC (PMIC) New Device Support: - Supply device PCI IDs for Intel Broxton Fix-ups: - Move to clkdev_create() API; intel_quark_i2c_gpio - Complete re-write of TI's TPS65912 Power Management IC (PMIC) - Remove unnecessary function argument; axp20x - Separate out bus related code; axp20x - Coding Style changes; axp20x - Allow more drivers to be compiled as modules - Work around false positive 'used uninitialised' warning; db8500-prcmu Bug Fixes: - Remove do_div(); fsl-imx25-gcq - Fix driver init when built-in; tps65010 - Fix clock-unregister leak; intel-lpss" * tag 'mfd-for-linus-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (53 commits) mfd: intel-lpss: Pass I2C configuration via properties on BXT mfd: imx6sx: Add PCIe register definitions for iomuxc gpr mfd: ipaq-micro: Use __maybe_unused to hide pm functions mfd: max77686: Add max77802 to I2C device ID table mfd: max77686: Export OF module alias information mfd: max77686: Allow driver to be built as a module mfd: stmpe: Add the proper PWM resources mfd: tps65090: Set regmap config reg counts properly mfd: syscon: Return ENOTSUPP instead of ENOSYS when disabled mfd: as3711: Set regmap config reg counts properly mfd: rc5t583: Set regmap config reg counts properly gpio: tps65086: Add GPO driver for the TPS65086 PMIC mfd: mt6397: Add platform device ID table mfd: da9063: Fix missing volatile registers in the core regmap_range volatile lists mfd: mt6397: Add MT6323 support to MT6397 driver mfd: mt6397: Add support for different Slave types mfd: mt6397: int_con and int_status may vary in location dt-bindings: mfd: Add bindings for the MediaTek MT6323 PMIC mfd: da9062: Fix missing volatile registers in the core regmap_range volatile lists mfd: Add documentation for ACT8945A DT bindings ...
Diffstat
-rw-r--r--Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt58
-rw-r--r--Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt35
-rw-r--r--Documentation/devicetree/bindings/mfd/act8945a.txt76
-rw-r--r--Documentation/devicetree/bindings/mfd/axp20x.txt7
-rw-r--r--Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt47
-rw-r--r--Documentation/devicetree/bindings/mfd/mt6397.txt10
-rw-r--r--Documentation/devicetree/bindings/mfd/tps65086.txt55
-rw-r--r--drivers/gpio/Kconfig6
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/gpio-tps65086.c139
-rw-r--r--drivers/iio/adc/Kconfig7
-rw-r--r--drivers/iio/adc/Makefile1
-rw-r--r--drivers/iio/adc/fsl-imx25-gcq.c417
-rw-r--r--drivers/input/touchscreen/Kconfig9
-rw-r--r--drivers/input/touchscreen/Makefile1
-rw-r--r--drivers/input/touchscreen/fsl-imx25-tcq.c596
-rw-r--r--drivers/mfd/Kconfig80
-rw-r--r--drivers/mfd/Makefile6
-rw-r--r--drivers/mfd/act8945a.c102
-rw-r--r--drivers/mfd/as3711.c4
-rw-r--r--drivers/mfd/axp20x-i2c.c104
-rw-r--r--drivers/mfd/axp20x-rsb.c80
-rw-r--r--drivers/mfd/axp20x.c105
-rw-r--r--drivers/mfd/cs47l24-tables.c10
-rw-r--r--drivers/mfd/da9062-core.c23
-rw-r--r--drivers/mfd/da9063-i2c.c36
-rw-r--r--drivers/mfd/db8500-prcmu.c7
-rw-r--r--drivers/mfd/fsl-imx25-tsadc.c203
-rw-r--r--drivers/mfd/intel-lpss-acpi.c12
-rw-r--r--drivers/mfd/intel-lpss-pci.c31
-rw-r--r--drivers/mfd/intel-lpss.c1
-rw-r--r--drivers/mfd/intel_quark_i2c_gpio.c26
-rw-r--r--drivers/mfd/ipaq-micro.c2
-rw-r--r--drivers/mfd/max77686.c2
-rw-r--r--drivers/mfd/mt6397-core.c105
-rw-r--r--drivers/mfd/rc5t583.c4
-rw-r--r--drivers/mfd/stmpe.c35
-rw-r--r--drivers/mfd/syscon.c19
-rw-r--r--drivers/mfd/tps65010.c21
-rw-r--r--drivers/mfd/tps65086.c149
-rw-r--r--drivers/mfd/tps65090.c5
-rw-r--r--drivers/mfd/wm5102-tables.c16
-rw-r--r--drivers/mfd/wm5110-tables.c82
-rw-r--r--drivers/mfd/wm8998-tables.c12
-rw-r--r--drivers/regulator/axp20x-regulator.c3
-rw-r--r--include/dt-bindings/iio/adc/fsl-imx25-gcq.h18
-rw-r--r--include/linux/mfd/as3711.h3
-rw-r--r--include/linux/mfd/axp20x.h34
-rw-r--r--include/linux/mfd/cros_ec.h2
-rw-r--r--include/linux/mfd/imx25-tsadc.h140
-rw-r--r--include/linux/mfd/mt6323/core.h36
-rw-r--r--include/linux/mfd/mt6323/registers.h408
-rw-r--r--include/linux/mfd/mt6397/core.h2
-rw-r--r--include/linux/mfd/rc5t583.h5
-rw-r--r--include/linux/mfd/syscon.h8
-rw-r--r--include/linux/mfd/syscon/imx6q-iomuxc-gpr.h5
-rw-r--r--include/linux/mfd/tps65086.h117
-rw-r--r--include/linux/mfd/tps65090.h5
58 files changed, 3256 insertions, 277 deletions
diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
new file mode 100644
index 000000000000..b0866d36a307
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
@@ -0,0 +1,58 @@
1Freescale i.MX25 ADC GCQ device
2
3This is a generic conversion queue device that can convert any of the
4analog inputs using the ADC unit of the i.MX25.
5
6Required properties:
7 - compatible: Should be "fsl,imx25-gcq".
8 - reg: Should be the register range of the module.
9 - interrupts: Should be the interrupt number of the module.
10 Typically this is <1>.
11 - interrupt-parent: phandle to the tsadc module of the i.MX25.
12 - #address-cells: Should be <1> (setting for the subnodes)
13 - #size-cells: Should be <0> (setting for the subnodes)
14
15Optional properties:
16 - vref-ext-supply: The regulator supplying the ADC reference voltage.
17 Required when at least one subnode uses the this reference.
18 - vref-xp-supply: The regulator supplying the ADC reference voltage on pin XP.
19 Required when at least one subnode uses this reference.
20 - vref-yp-supply: The regulator supplying the ADC reference voltage on pin YP.
21 Required when at least one subnode uses this reference.
22
23Sub-nodes:
24Optionally you can define subnodes which define the reference voltage
25for the analog inputs.
26
27Required properties for subnodes:
28 - reg: Should be the number of the analog input.
29 0: xp
30 1: yp
31 2: xn
32 3: yn
33 4: wiper
34 5: inaux0
35 6: inaux1
36 7: inaux2
37Optional properties for subnodes:
38 - fsl,adc-refp: specifies the positive reference input as defined in
39 <dt-bindings/iio/adc/fsl-imx25-gcq.h>
40 - fsl,adc-refn: specifies the negative reference input as defined in
41 <dt-bindings/iio/adc/fsl-imx25-gcq.h>
42
43Example:
44
45 adc: adc@50030800 {
46 compatible = "fsl,imx25-gcq";
47 reg = <0x50030800 0x60>;
48 interrupt-parent = <&tscadc>;
49 interrupts = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
52
53 inaux@5 {
54 reg = <5>;
55 fsl,adc-refp = <MX25_ADC_REFP_INT>;
56 fsl,adc-refn = <MX25_ADC_REFN_NGND>;
57 };
58 };
diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
new file mode 100644
index 000000000000..cdf05f9b2329
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
@@ -0,0 +1,35 @@
1Freescale mx25 TS conversion queue module
2
3mx25 touchscreen conversion queue module which controls the ADC unit of the
4mx25 for attached touchscreens.
5
6Required properties:
7 - compatible: Should be "fsl,imx25-tcq".
8 - reg: Memory range of the device.
9 - interrupts: Should be the interrupt number associated with this module within
10 the tscadc unit (<0>).
11 - interrupt-parent: Should be a phandle to the tscadc unit.
12 - fsl,wires: Should be '<4>' or '<5>'
13
14Optional properties:
15 - fsl,pen-debounce-ns: Pen debounce time in nanoseconds.
16 - fsl,pen-threshold: Pen-down threshold for the touchscreen. This is a value
17 between 1 and 4096. It is the ratio between the internal reference voltage
18 and the measured voltage after the plate was precharged. Resistence between
19 plates and therefore the voltage decreases with pressure so that a smaller
20 value is equivalent to a higher pressure.
21 - fsl,settling-time-ns: Settling time in nanoseconds. The settling time is before
22 the actual touch detection to wait for an even charge distribution in the
23 plate.
24
25This device includes two conversion queues which can be added as subnodes.
26The first queue is for the touchscreen, the second for general purpose ADC.
27
28Example:
29 tsc: tcq@50030400 {
30 compatible = "fsl,imx25-tcq";
31 reg = <0x50030400 0x60>;
32 interrupt-parent = <&tscadc>;
33 interrupts = <0>;
34 fsl,wires = <4>;
35 };
diff --git a/Documentation/devicetree/bindings/mfd/act8945a.txt b/Documentation/devicetree/bindings/mfd/act8945a.txt
new file mode 100644
index 000000000000..f71283055685
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/act8945a.txt
@@ -0,0 +1,76 @@
1Device-Tree bindings for Active-semi ACT8945A MFD driver
2
3Required properties:
4 - compatible: "active-semi,act8945a".
5 - reg: the I2C slave address for the ACT8945A chip
6
7The chip exposes two subdevices:
8 - a regulators: see ../regulator/act8945a-regulator.txt
9 - a charger: see ../power/act8945a-charger.txt
10
11Example:
12 pmic@5b {
13 compatible = "active-semi,act8945a";
14 reg = <0x5b>;
15 status = "okay";
16
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_charger_chglev>;
19 active-semi,chglev-gpio = <&pioA 12 GPIO_ACTIVE_HIGH>;
20 active-semi,input-voltage-threshold-microvolt = <6600>;
21 active-semi,precondition-timeout = <40>;
22 active-semi,total-timeout = <3>;
23
24 active-semi,vsel-high;
25
26 regulators {
27 vdd_1v35_reg: REG_DCDC1 {
28 regulator-name = "VDD_1V35";
29 regulator-min-microvolt = <1350000>;
30 regulator-max-microvolt = <1350000>;
31 regulator-always-on;
32 };
33
34 vdd_1v2_reg: REG_DCDC2 {
35 regulator-name = "VDD_1V2";
36 regulator-min-microvolt = <1100000>;
37 regulator-max-microvolt = <1300000>;
38 regulator-always-on;
39 };
40
41 vdd_3v3_reg: REG_DCDC3 {
42 regulator-name = "VDD_3V3";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
46 };
47
48 vdd_fuse_reg: REG_LDO1 {
49 regulator-name = "VDD_FUSE";
50 regulator-min-microvolt = <2500000>;
51 regulator-max-microvolt = <2500000>;
52 regulator-always-on;
53 };
54
55 vdd_3v3_lp_reg: REG_LDO2 {
56 regulator-name = "VDD_3V3_LP";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 regulator-always-on;
60 };
61
62 vdd_led_reg: REG_LDO3 {
63 regulator-name = "VDD_LED";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-always-on;
67 };
68
69 vdd_sdhc_1v8_reg: REG_LDO4 {
70 regulator-name = "VDD_SDHC_1V8";
71 regulator-min-microvolt = <1800000>;
72 regulator-max-microvolt = <1800000>;
73 regulator-always-on;
74 };
75 };
76 };
diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index a474359dd206..fd39fa54571b 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -5,11 +5,12 @@ axp152 (X-Powers)
5axp202 (X-Powers) 5axp202 (X-Powers)
6axp209 (X-Powers) 6axp209 (X-Powers)
7axp221 (X-Powers) 7axp221 (X-Powers)
8axp223 (X-Powers)
8 9
9Required properties: 10Required properties:
10- compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209", 11- compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209",
11 "x-powers,axp221" 12 "x-powers,axp221", "x-powers,axp223"
12- reg: The I2C slave address for the AXP chip 13- reg: The I2C slave address or RSB hardware address for the AXP chip
13- interrupt-parent: The parent interrupt controller 14- interrupt-parent: The parent interrupt controller
14- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin 15- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
15- interrupt-controller: The PMIC has its own internal IRQs 16- interrupt-controller: The PMIC has its own internal IRQs
@@ -51,7 +52,7 @@ LDO3 : LDO : ldo3in-supply
51LDO4 : LDO : ldo24in-supply : shared supply 52LDO4 : LDO : ldo24in-supply : shared supply
52LDO5 : LDO : ldo5in-supply 53LDO5 : LDO : ldo5in-supply
53 54
54AXP221 regulators, type, and corresponding input supply names: 55AXP221/AXP223 regulators, type, and corresponding input supply names:
55 56
56Regulator Type Supply Name Notes 57Regulator Type Supply Name Notes
57--------- ---- ----------- ----- 58--------- ---- ----------- -----
diff --git a/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
new file mode 100644
index 000000000000..b03505286997
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
@@ -0,0 +1,47 @@
1Freescale MX25 ADC/TSC MultiFunction Device (MFD)
2
3This device combines two general purpose conversion queues one used for general
4ADC and the other used for touchscreens.
5
6Required properties:
7 - compatible: Should be "fsl,imx25-tsadc".
8 - reg: Start address and size of the memory area of
9 the device
10 - interrupts: Interrupt for this device
11 (See: ../interrupt-controller/interrupts.txt)
12 - clocks: An 'ipg' clock (See: ../clock/clock-bindings.txt)
13 - interrupt-controller: This device is an interrupt controller. It
14 controls the interrupts of both
15 conversion queues.
16 - #interrupt-cells: Should be '<1>'.
17 - #address-cells: Should be '<1>'.
18 - #size-cells: Should be '<1>'.
19
20This device includes two conversion queues which can be added as subnodes.
21The first queue is for the touchscreen, the second for general purpose ADC.
22
23Example:
24 tscadc: tscadc@50030000 {
25 compatible = "fsl,imx25-tsadc";
26 reg = <0x50030000 0xc>;
27 interrupts = <46>;
28 clocks = <&clks 119>;
29 clock-names = "ipg";
30 interrupt-controller;
31 #interrupt-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <1>;
34 ranges;
35
36 tsc: tcq@50030400 {
37 compatible = "fsl,imx25-tcq";
38 reg = <0x50030400 0x60>;
39 ...
40 };
41
42 adc: gcq@50030800 {
43 compatible = "fsl,imx25-gcq";
44 reg = <0x50030800 0x60>;
45 ...
46 };
47 };
diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt
index 15043e652699..949c85f8d02c 100644
--- a/Documentation/devicetree/bindings/mfd/mt6397.txt
+++ b/Documentation/devicetree/bindings/mfd/mt6397.txt
@@ -1,6 +1,6 @@
1MediaTek MT6397 Multifunction Device Driver 1MediaTek MT6397/MT6323 Multifunction Device Driver
2 2
3MT6397 is a multifunction device with the following sub modules: 3MT6397/MT6323 is a multifunction device with the following sub modules:
4- Regulator 4- Regulator
5- RTC 5- RTC
6- Audio codec 6- Audio codec
@@ -8,14 +8,14 @@ MT6397 is a multifunction device with the following sub modules:
8- Clock 8- Clock
9 9
10It is interfaced to host controller using SPI interface by a proprietary hardware 10It is interfaced to host controller using SPI interface by a proprietary hardware
11called PMIC wrapper or pwrap. MT6397 MFD is a child device of pwrap. 11called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap.
12See the following for pwarp node definitions: 12See the following for pwarp node definitions:
13Documentation/devicetree/bindings/soc/pwrap.txt 13Documentation/devicetree/bindings/soc/pwrap.txt
14 14
15This document describes the binding for MFD device and its sub module. 15This document describes the binding for MFD device and its sub module.
16 16
17Required properties: 17Required properties:
18compatible: "mediatek,mt6397" 18compatible: "mediatek,mt6397" or "mediatek,mt6323"
19 19
20Optional subnodes: 20Optional subnodes:
21 21
@@ -26,6 +26,8 @@ Optional subnodes:
26 Required properties: 26 Required properties:
27 - compatible: "mediatek,mt6397-regulator" 27 - compatible: "mediatek,mt6397-regulator"
28 see Documentation/devicetree/bindings/regulator/mt6397-regulator.txt 28 see Documentation/devicetree/bindings/regulator/mt6397-regulator.txt
29 - compatible: "mediatek,mt6323-regulator"
30 see Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
29- codec 31- codec
30 Required properties: 32 Required properties:
31 - compatible: "mediatek,mt6397-codec" 33 - compatible: "mediatek,mt6397-codec"
diff --git a/Documentation/devicetree/bindings/mfd/tps65086.txt b/Documentation/devicetree/bindings/mfd/tps65086.txt
new file mode 100644
index 000000000000..d3705612a846
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/tps65086.txt
@@ -0,0 +1,55 @@
1* TPS65086 Power Management Integrated Circuit (PMIC) bindings
2
3Required properties:
4 - compatible : Should be "ti,tps65086".
5 - reg : I2C slave address.
6 - interrupt-parent : Phandle to the parent interrupt controller.
7 - interrupts : The interrupt line the device is connected to.
8 - interrupt-controller : Marks the device node as an interrupt controller.
9 - #interrupt-cells : The number of cells to describe an IRQ, should be 2.
10 The first cell is the IRQ number.
11 The second cell is the flags, encoded as trigger
12 masks from ../interrupt-controller/interrupts.txt.
13 - gpio-controller : Marks the device node as a GPIO Controller.
14 - #gpio-cells : Should be two. The first cell is the pin number and
15 the second cell is used to specify flags.
16 See ../gpio/gpio.txt for more information.
17 - regulators: : List of child nodes that specify the regulator
18 initialization data. Child nodes must be named
19 after their hardware counterparts: buck[1-6],
20 ldoa[1-3], swa1, swb[1-2], and vtt. Each child
21 node is defined using the standard binding for
22 regulators and the optional regulator properties
23 defined below.
24
25Optional regulator properties:
26 - ti,regulator-step-size-25mv : This is applicable for buck[1,2,6], set this
27 if the regulator is factory set with a 25mv
28 step voltage mapping.
29 - ti,regulator-decay : This is applicable for buck[1-6], set this if
30 the output needs to decay, default is for
31 the output to slew down.
32
33Example:
34
35 pmic: tps65086@5e {
36 compatible = "ti,tps65086";
37 reg = <0x5e>;
38 interrupt-parent = <&gpio1>;
39 interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 gpio-controller;
43 #gpio-cells = <2>;
44
45 regulators {
46 buck1 {
47 regulator-name = "vcc1";
48 regulator-min-microvolt = <1600000>;
49 regulator-max-microvolt = <1600000>;
50 regulator-boot-on;
51 ti,regulator-decay;
52 ti,regulator-step-size-25mv;
53 };
54 };
55 };
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 4808e4657de5..5f3429f0bf46 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -898,6 +898,12 @@ config GPIO_TIMBERDALE
898 ---help--- 898 ---help---
899 Add support for the GPIO IP in the timberdale FPGA. 899 Add support for the GPIO IP in the timberdale FPGA.
900 900
901config GPIO_TPS65086
902 tristate "TI TPS65086 GPO"
903 depends on MFD_TPS65086
904 help
905 This driver supports the GPO on TI TPS65086x PMICs.
906
901config GPIO_TPS65218 907config GPIO_TPS65218
902 tristate "TPS65218 GPIO" 908 tristate "TPS65218 GPIO"
903 depends on MFD_TPS65218 909 depends on MFD_TPS65218
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 25decedba943..1e0b74f3b1ed 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -99,6 +99,7 @@ obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o
99obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o 99obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o
100obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o 100obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o
101obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o 101obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o
102obj-$(CONFIG_GPIO_TPS65086) += gpio-tps65086.o
102obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o 103obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o
103obj-$(CONFIG_GPIO_TPS6586X) += gpio-tps6586x.o 104obj-$(CONFIG_GPIO_TPS6586X) += gpio-tps6586x.o
104obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o 105obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
diff --git a/drivers/gpio/gpio-tps65086.c b/drivers/gpio/gpio-tps65086.c
new file mode 100644
index 000000000000..8e25f01ac314
--- /dev/null
+++ b/drivers/gpio/gpio-tps65086.c
@@ -0,0 +1,139 @@
1/*
2 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
3 * Andrew F. Davis <afd@ti.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10 * kind, whether expressed or implied; without even the implied warranty
11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License version 2 for more details.
13 *
14 * Based on the TPS65912 driver
15 */
16
17#include <linux/gpio.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20
21#include <linux/mfd/tps65086.h>
22
23struct tps65086_gpio {
24 struct gpio_chip chip;
25 struct tps65086 *tps;
26};
27
28static int tps65086_gpio_get_direction(struct gpio_chip *chip,
29 unsigned offset)
30{
31 /* This device is output only */
32 return 0;
33}
34
35static int tps65086_gpio_direction_input(struct gpio_chip *chip,
36 unsigned offset)
37{
38 /* This device is output only */
39 return -EINVAL;
40}
41
42static int tps65086_gpio_direction_output(struct gpio_chip *chip,
43 unsigned offset, int value)
44{
45 struct tps65086_gpio *gpio = gpiochip_get_data(chip);
46
47 /* Set the initial value */
48 regmap_update_bits(gpio->tps->regmap, TPS65086_GPOCTRL,
49 BIT(4 + offset), value ? BIT(4 + offset) : 0);
50
51 return 0;
52}
53
54static int tps65086_gpio_get(struct gpio_chip *chip, unsigned offset)
55{
56 struct tps65086_gpio *gpio = gpiochip_get_data(chip);
57 int ret, val;
58
59 ret = regmap_read(gpio->tps->regmap, TPS65086_GPOCTRL, &val);
60 if (ret < 0)
61 return ret;
62
63 return val & BIT(4 + offset);
64}
65
66static void tps65086_gpio_set(struct gpio_chip *chip, unsigned offset,
67 int value)
68{
69 struct tps65086_gpio *gpio = gpiochip_get_data(chip);
70
71 regmap_update_bits(gpio->tps->regmap, TPS65086_GPOCTRL,
72 BIT(4 + offset), value ? BIT(4 + offset) : 0);
73}
74
75static struct gpio_chip template_chip = {
76 .label = "tps65086-gpio",
77 .owner = THIS_MODULE,
78 .get_direction = tps65086_gpio_get_direction,
79 .direction_input = tps65086_gpio_direction_input,
80 .direction_output = tps65086_gpio_direction_output,
81 .get = tps65086_gpio_get,
82 .set = tps65086_gpio_set,
83 .base = -1,
84 .ngpio = 4,
85 .can_sleep = true,
86};
87
88static int tps65086_gpio_probe(struct platform_device *pdev)
89{
90 struct tps65086_gpio *gpio;
91 int ret;
92
93 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
94 if (!gpio)
95 return -ENOMEM;
96
97 platform_set_drvdata(pdev, gpio);
98
99 gpio->tps = dev_get_drvdata(pdev->dev.parent);
100 gpio->chip = template_chip;
101 gpio->chip.parent = gpio->tps->dev;
102
103 ret = gpiochip_add_data(&gpio->chip, gpio);
104 if (ret < 0) {
105 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
106 return ret;
107 }
108
109 return 0;
110}
111
112static int tps65086_gpio_remove(struct platform_device *pdev)
113{
114 struct tps65086_gpio *gpio = platform_get_drvdata(pdev);
115
116 gpiochip_remove(&gpio->chip);
117
118 return 0;
119}
120
121static const struct platform_device_id tps65086_gpio_id_table[] = {
122 { "tps65086-gpio", },
123 { /* sentinel */ }
124};
125MODULE_DEVICE_TABLE(platform, tps65086_gpio_id_table);
126
127static struct platform_driver tps65086_gpio_driver = {
128 .driver = {
129 .name = "tps65086-gpio",
130 },
131 .probe = tps65086_gpio_probe,
132 .remove = tps65086_gpio_remove,
133 .id_table = tps65086_gpio_id_table,
134};
135module_platform_driver(tps65086_gpio_driver);
136
137MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
138MODULE_DESCRIPTION("TPS65086 GPIO driver");
139MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 932de1f9d1e7..af4aea7b20f9 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -194,6 +194,13 @@ config EXYNOS_ADC
194 To compile this driver as a module, choose M here: the module will be 194 To compile this driver as a module, choose M here: the module will be
195 called exynos_adc. 195 called exynos_adc.
196 196
197config FSL_MX25_ADC
198 tristate "Freescale MX25 ADC driver"
199 depends on MFD_MX25_TSADC
200 help
201 Generic Conversion Queue driver used for general purpose ADC in the
202 MX25. This driver supports single measurements using the MX25 ADC.
203
197config HI8435 204config HI8435
198 tristate "Holt Integrated Circuits HI-8435 threshold detector" 205 tristate "Holt Integrated Circuits HI-8435 threshold detector"
199 select IIO_TRIGGERED_EVENT 206 select IIO_TRIGGERED_EVENT
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index b1aa456e6af3..0cb79210a4b0 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_BERLIN2_ADC) += berlin2-adc.o
20obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o 20obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
21obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o 21obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o
22obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o 22obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
23obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
23obj-$(CONFIG_HI8435) += hi8435.o 24obj-$(CONFIG_HI8435) += hi8435.o
24obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o 25obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
25obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o 26obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
new file mode 100644
index 000000000000..72b32c1ab257
--- /dev/null
+++ b/drivers/iio/adc/fsl-imx25-gcq.c
@@ -0,0 +1,417 @@
1/*
2 * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 *
8 * This is the driver for the imx25 GCQ (Generic Conversion Queue)
9 * connected to the imx25 ADC.
10 */
11
12#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
13#include <linux/clk.h>
14#include <linux/iio/iio.h>
15#include <linux/interrupt.h>
16#include <linux/mfd/imx25-tsadc.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/platform_device.h>
20#include <linux/regmap.h>
21#include <linux/regulator/consumer.h>
22
23#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
24
25static const char * const driver_name = "mx25-gcq";
26
27enum mx25_gcq_cfgs {
28 MX25_CFG_XP = 0,
29 MX25_CFG_YP,
30 MX25_CFG_XN,
31 MX25_CFG_YN,
32 MX25_CFG_WIPER,
33 MX25_CFG_INAUX0,
34 MX25_CFG_INAUX1,
35 MX25_CFG_INAUX2,
36 MX25_NUM_CFGS,
37};
38
39struct mx25_gcq_priv {
40 struct regmap *regs;
41 struct completion completed;
42 struct clk *clk;
43 int irq;
44 struct regulator *vref[4];
45 u32 channel_vref_mv[MX25_NUM_CFGS];
46};
47
48#define MX25_CQG_CHAN(chan, id) {\
49 .type = IIO_VOLTAGE,\
50 .indexed = 1,\
51 .channel = chan,\
52 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
53 BIT(IIO_CHAN_INFO_SCALE),\
54 .datasheet_name = id,\
55}
56
57static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
58 MX25_CQG_CHAN(MX25_CFG_XP, "xp"),
59 MX25_CQG_CHAN(MX25_CFG_YP, "yp"),
60 MX25_CQG_CHAN(MX25_CFG_XN, "xn"),
61 MX25_CQG_CHAN(MX25_CFG_YN, "yn"),
62 MX25_CQG_CHAN(MX25_CFG_WIPER, "wiper"),
63 MX25_CQG_CHAN(MX25_CFG_INAUX0, "inaux0"),
64 MX25_CQG_CHAN(MX25_CFG_INAUX1, "inaux1"),
65 MX25_CQG_CHAN(MX25_CFG_INAUX2, "inaux2"),
66};
67
68static const char * const mx25_gcq_refp_names[] = {
69 [MX25_ADC_REFP_YP] = "yp",
70 [MX25_ADC_REFP_XP] = "xp",
71 [MX25_ADC_REFP_INT] = "int",
72 [MX25_ADC_REFP_EXT] = "ext",
73};
74
75static irqreturn_t mx25_gcq_irq(int irq, void *data)
76{
77 struct mx25_gcq_priv *priv = data;
78 u32 stats;
79
80 regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
81
82 if (stats & MX25_ADCQ_SR_EOQ) {
83 regmap_update_bits(priv->regs, MX25_ADCQ_MR,
84 MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ);
85 complete(&priv->completed);
86 }
87
88 /* Disable conversion queue run */
89 regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
90
91 /* Acknowledge all possible irqs */
92 regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
93 MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
94 MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD);
95
96 return IRQ_HANDLED;
97}
98
99static int mx25_gcq_get_raw_value(struct device *dev,
100 struct iio_chan_spec const *chan,
101 struct mx25_gcq_priv *priv,
102 int *val)
103{
104 long timeout;
105 u32 data;
106
107 /* Setup the configuration we want to use */
108 regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
109 MX25_ADCQ_ITEM(0, chan->channel));
110
111 regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
112
113 /* Trigger queue for one run */
114 regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
115 MX25_ADCQ_CR_FQS);
116
117 timeout = wait_for_completion_interruptible_timeout(
118 &priv->completed, MX25_GCQ_TIMEOUT);
119 if (timeout < 0) {
120 dev_err(dev, "ADC wait for measurement failed\n");
121 return timeout;
122 } else if (timeout == 0) {
123 dev_err(dev, "ADC timed out\n");
124 return -ETIMEDOUT;
125 }
126
127 regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
128
129 *val = MX25_ADCQ_FIFO_DATA(data);
130
131 return IIO_VAL_INT;
132}
133
134static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
135 struct iio_chan_spec const *chan, int *val,
136 int *val2, long mask)
137{
138 struct mx25_gcq_priv *priv = iio_priv(indio_dev);
139 int ret;
140
141 switch (mask) {
142 case IIO_CHAN_INFO_RAW:
143 mutex_lock(&indio_dev->mlock);
144 ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);
145 mutex_unlock(&indio_dev->mlock);
146 return ret;
147
148 case IIO_CHAN_INFO_SCALE:
149 *val = priv->channel_vref_mv[chan->channel];
150 *val2 = 12;
151 return IIO_VAL_FRACTIONAL_LOG2;
152
153 default:
154 return -EINVAL;
155 }
156}
157
158static const struct iio_info mx25_gcq_iio_info = {
159 .read_raw = mx25_gcq_read_raw,
160};
161
162static const struct regmap_config mx25_gcq_regconfig = {
163 .max_register = 0x5c,
164 .reg_bits = 32,
165 .val_bits = 32,
166 .reg_stride = 4,
167};
168
169static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
170 struct mx25_gcq_priv *priv)
171{
172 struct device_node *np = pdev->dev.of_node;
173 struct device_node *child;
174 struct device *dev = &pdev->dev;
175 unsigned int refp_used[4] = {};
176 int ret, i;
177
178 /*
179 * Setup all configurations registers with a default conversion
180 * configuration for each input
181 */
182 for (i = 0; i < MX25_NUM_CFGS; ++i)
183 regmap_write(priv->regs, MX25_ADCQ_CFG(i),
184 MX25_ADCQ_CFG_YPLL_OFF |
185 MX25_ADCQ_CFG_XNUR_OFF |
186 MX25_ADCQ_CFG_XPUL_OFF |
187 MX25_ADCQ_CFG_REFP_INT |
188 MX25_ADCQ_CFG_IN(i) |
189 MX25_ADCQ_CFG_REFN_NGND2);
190
191 /*
192 * First get all regulators to store them in channel_vref_mv if
193 * necessary. Later we use that information for proper IIO scale
194 * information.
195 */
196 priv->vref[MX25_ADC_REFP_INT] = NULL;
197 priv->vref[MX25_ADC_REFP_EXT] =
198 devm_regulator_get_optional(&pdev->dev, "vref-ext");
199 priv->vref[MX25_ADC_REFP_XP] =
200 devm_regulator_get_optional(&pdev->dev, "vref-xp");
201 priv->vref[MX25_ADC_REFP_YP] =
202 devm_regulator_get_optional(&pdev->dev, "vref-yp");
203
204 for_each_child_of_node(np, child) {
205 u32 reg;
206 u32 refp = MX25_ADCQ_CFG_REFP_INT;
207 u32 refn = MX25_ADCQ_CFG_REFN_NGND2;
208
209 ret = of_property_read_u32(child, "reg", &reg);
210 if (ret) {
211 dev_err(dev, "Failed to get reg property\n");
212 return ret;
213 }
214
215 if (reg >= MX25_NUM_CFGS) {
216 dev_err(dev,
217 "reg value is greater than the number of available configuration registers\n");
218 return -EINVAL;
219 }
220
221 of_property_read_u32(child, "fsl,adc-refp", &refp);
222 of_property_read_u32(child, "fsl,adc-refn", &refn);
223
224 switch (refp) {
225 case MX25_ADC_REFP_EXT:
226 case MX25_ADC_REFP_XP:
227 case MX25_ADC_REFP_YP:
228 if (IS_ERR(priv->vref[refp])) {
229 dev_err(dev, "Error, trying to use external voltage reference without a vref-%s regulator.",
230 mx25_gcq_refp_names[refp]);
231 return PTR_ERR(priv->vref[refp]);
232 }
233 priv->channel_vref_mv[reg] =
234 regulator_get_voltage(priv->vref[refp]);
235 /* Conversion from uV to mV */
236 priv->channel_vref_mv[reg] /= 1000;
237 break;
238 case MX25_ADC_REFP_INT:
239 priv->channel_vref_mv[reg] = 2500;
240 break;
241 default:
242 dev_err(dev, "Invalid positive reference %d\n", refp);
243 return -EINVAL;
244 }
245
246 ++refp_used[refp];
247
248 /*
249 * Shift the read values to the correct positions within the
250 * register.
251 */
252 refp = MX25_ADCQ_CFG_REFP(refp);
253 refn = MX25_ADCQ_CFG_REFN(refn);
254
255 if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) {
256 dev_err(dev, "Invalid fsl,adc-refp property value\n");
257 return -EINVAL;
258 }
259 if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) {
260 dev_err(dev, "Invalid fsl,adc-refn property value\n");
261 return -EINVAL;
262 }
263
264 regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
265 MX25_ADCQ_CFG_REFP_MASK |
266 MX25_ADCQ_CFG_REFN_MASK,
267 refp | refn);
268 }
269 regmap_update_bits(priv->regs, MX25_ADCQ_CR,
270 MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
271 MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
272
273 regmap_write(priv->regs, MX25_ADCQ_CR,
274 MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS);
275
276 /* Remove unused regulators */
277 for (i = 0; i != 4; ++i) {
278 if (!refp_used[i]) {
279 if (!IS_ERR_OR_NULL(priv->vref[i]))
280 devm_regulator_put(priv->vref[i]);
281 priv->vref[i] = NULL;
282 }
283 }
284
285 return 0;
286}
287
288static int mx25_gcq_probe(struct platform_device *pdev)
289{
290 struct iio_dev *indio_dev;
291 struct mx25_gcq_priv *priv;
292 struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
293 struct device *dev = &pdev->dev;
294 struct resource *res;
295 void __iomem *mem;
296 int ret;
297 int i;
298
299 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
300 if (!indio_dev)
301 return -ENOMEM;
302
303 priv = iio_priv(indio_dev);
304
305 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
306 mem = devm_ioremap_resource(dev, res);
307 if (IS_ERR(mem))
308 return PTR_ERR(mem);
309
310 priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
311 if (IS_ERR(priv->regs)) {
312 dev_err(dev, "Failed to initialize regmap\n");
313 return PTR_ERR(priv->regs);
314 }
315
316 init_completion(&priv->completed);
317
318 ret = mx25_gcq_setup_cfgs(pdev, priv);
319 if (ret)
320 return ret;
321
322 for (i = 0; i != 4; ++i) {
323 if (!priv->vref[i])
324 continue;
325
326 ret = regulator_enable(priv->vref[i]);
327 if (ret)
328 goto err_regulator_disable;
329 }
330
331 priv->clk = tsadc->clk;
332 ret = clk_prepare_enable(priv->clk);
333 if (ret) {
334 dev_err(dev, "Failed to enable clock\n");
335 goto err_vref_disable;
336 }
337
338 priv->irq = platform_get_irq(pdev, 0);
339 if (priv->irq <= 0) {
340 dev_err(dev, "Failed to get IRQ\n");
341 ret = priv->irq;
342 if (!ret)
343 ret = -ENXIO;
344 goto err_clk_unprepare;
345 }
346
347 ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name, priv);
348 if (ret) {
349 dev_err(dev, "Failed requesting IRQ\n");
350 goto err_clk_unprepare;
351 }
352
353 indio_dev->dev.parent = &pdev->dev;
354 indio_dev->channels = mx25_gcq_channels;
355 indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
356 indio_dev->info = &mx25_gcq_iio_info;
357 indio_dev->name = driver_name;
358
359 ret = iio_device_register(indio_dev);
360 if (ret) {
361 dev_err(dev, "Failed to register iio device\n");
362 goto err_irq_free;
363 }
364
365 platform_set_drvdata(pdev, indio_dev);
366
367 return 0;
368
369err_irq_free:
370 free_irq(priv->irq, priv);
371err_clk_unprepare:
372 clk_disable_unprepare(priv->clk);
373err_vref_disable:
374 i = 4;
375err_regulator_disable:
376 for (; i-- > 0;) {
377 if (priv->vref[i])
378 regulator_disable(priv->vref[i]);
379 }
380 return ret;
381}
382
383static int mx25_gcq_remove(struct platform_device *pdev)
384{
385 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
386 struct mx25_gcq_priv *priv = iio_priv(indio_dev);
387 int i;
388
389 iio_device_unregister(indio_dev);
390 free_irq(priv->irq, priv);
391 clk_disable_unprepare(priv->clk);
392 for (i = 4; i-- > 0;) {
393 if (priv->vref[i])
394 regulator_disable(priv->vref[i]);
395 }
396
397 return 0;
398}
399
400static const struct of_device_id mx25_gcq_ids[] = {
401 { .compatible = "fsl,imx25-gcq", },
402 { /* Sentinel */ }
403};
404
405static struct platform_driver mx25_gcq_driver = {
406 .driver = {
407 .name = "mx25-gcq",
408 .of_match_table = mx25_gcq_ids,
409 },
410 .probe = mx25_gcq_probe,
411 .remove = mx25_gcq_remove,
412};
413module_platform_driver(mx25_gcq_driver);
414
415MODULE_DESCRIPTION("ADC driver for Freescale mx25");
416MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
417MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 1f99e7f30e27..8ecdc38fd489 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -833,6 +833,15 @@ config TOUCHSCREEN_USB_COMPOSITE
833 To compile this driver as a module, choose M here: the 833 To compile this driver as a module, choose M here: the
834 module will be called usbtouchscreen. 834 module will be called usbtouchscreen.
835 835
836config TOUCHSCREEN_MX25
837 tristate "Freescale i.MX25 touchscreen input driver"
838 depends on MFD_MX25_TSADC
839 help
840 Enable support for touchscreen connected to your i.MX25.
841
842 To compile this driver as a module, choose M here: the
843 module will be called fsl-imx25-tcq.
844
836config TOUCHSCREEN_MC13783 845config TOUCHSCREEN_MC13783
837 tristate "Freescale MC13783 touchscreen input driver" 846 tristate "Freescale MC13783 touchscreen input driver"
838 depends on MFD_MC13XXX 847 depends on MFD_MC13XXX
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index 4b518c76e0d7..f42975e719e0 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_TOUCHSCREEN_INTEL_MID) += intel-mid-touch.o
46obj-$(CONFIG_TOUCHSCREEN_IPROC) += bcm_iproc_tsc.o 46obj-$(CONFIG_TOUCHSCREEN_IPROC) += bcm_iproc_tsc.o
47obj-$(CONFIG_TOUCHSCREEN_LPC32XX) += lpc32xx_ts.o 47obj-$(CONFIG_TOUCHSCREEN_LPC32XX) += lpc32xx_ts.o
48obj-$(CONFIG_TOUCHSCREEN_MAX11801) += max11801_ts.o 48obj-$(CONFIG_TOUCHSCREEN_MAX11801) += max11801_ts.o
49obj-$(CONFIG_TOUCHSCREEN_MX25) += fsl-imx25-tcq.o
49obj-$(CONFIG_TOUCHSCREEN_MC13783) += mc13783_ts.o 50obj-$(CONFIG_TOUCHSCREEN_MC13783) += mc13783_ts.o
50obj-$(CONFIG_TOUCHSCREEN_MCS5000) += mcs5000_ts.o 51obj-$(CONFIG_TOUCHSCREEN_MCS5000) += mcs5000_ts.o
51obj-$(CONFIG_TOUCHSCREEN_MELFAS_MIP4) += melfas_mip4.o 52obj-$(CONFIG_TOUCHSCREEN_MELFAS_MIP4) += melfas_mip4.o
diff --git a/drivers/input/touchscreen/fsl-imx25-tcq.c b/drivers/input/touchscreen/fsl-imx25-tcq.c
new file mode 100644
index 000000000000..fe9877a6af9e
--- /dev/null
+++ b/drivers/input/touchscreen/fsl-imx25-tcq.c
@@ -0,0 +1,596 @@
1/*
2 * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 *
8 * Based on driver from 2011:
9 * Juergen Beisert, Pengutronix <kernel@pengutronix.de>
10 *
11 * This is the driver for the imx25 TCQ (Touchscreen Conversion Queue)
12 * connected to the imx25 ADC.
13 */
14
15#include <linux/clk.h>
16#include <linux/device.h>
17#include <linux/input.h>
18#include <linux/interrupt.h>
19#include <linux/mfd/imx25-tsadc.h>
20#include <linux/module.h>
21#include <linux/of.h>
22#include <linux/platform_device.h>
23#include <linux/regmap.h>
24
25static const char mx25_tcq_name[] = "mx25-tcq";
26
27enum mx25_tcq_mode {
28 MX25_TS_4WIRE,
29};
30
31struct mx25_tcq_priv {
32 struct regmap *regs;
33 struct regmap *core_regs;
34 struct input_dev *idev;
35 enum mx25_tcq_mode mode;
36 unsigned int pen_threshold;
37 unsigned int sample_count;
38 unsigned int expected_samples;
39 unsigned int pen_debounce;
40 unsigned int settling_time;
41 struct clk *clk;
42 int irq;
43 struct device *dev;
44};
45
46static struct regmap_config mx25_tcq_regconfig = {
47 .fast_io = true,
48 .max_register = 0x5c,
49 .reg_bits = 32,
50 .val_bits = 32,
51 .reg_stride = 4,
52};
53
54static const struct of_device_id mx25_tcq_ids[] = {
55 { .compatible = "fsl,imx25-tcq", },
56 { /* Sentinel */ }
57};
58
59#define TSC_4WIRE_PRE_INDEX 0
60#define TSC_4WIRE_X_INDEX 1
61#define TSC_4WIRE_Y_INDEX 2
62#define TSC_4WIRE_POST_INDEX 3
63#define TSC_4WIRE_LEAVE 4
64
65#define MX25_TSC_DEF_THRESHOLD 80
66#define TSC_MAX_SAMPLES 16
67
68#define MX25_TSC_REPEAT_WAIT 14
69
70enum mx25_adc_configurations {
71 MX25_CFG_PRECHARGE = 0,
72 MX25_CFG_TOUCH_DETECT,
73 MX25_CFG_X_MEASUREMENT,
74 MX25_CFG_Y_MEASUREMENT,
75};
76
77#define MX25_PRECHARGE_VALUE (\
78 MX25_ADCQ_CFG_YPLL_OFF | \
79 MX25_ADCQ_CFG_XNUR_OFF | \
80 MX25_ADCQ_CFG_XPUL_HIGH | \
81 MX25_ADCQ_CFG_REFP_INT | \
82 MX25_ADCQ_CFG_IN_XP | \
83 MX25_ADCQ_CFG_REFN_NGND2 | \
84 MX25_ADCQ_CFG_IGS)
85
86#define MX25_TOUCH_DETECT_VALUE (\
87 MX25_ADCQ_CFG_YNLR | \
88 MX25_ADCQ_CFG_YPLL_OFF | \
89 MX25_ADCQ_CFG_XNUR_OFF | \
90 MX25_ADCQ_CFG_XPUL_OFF | \
91 MX25_ADCQ_CFG_REFP_INT | \
92 MX25_ADCQ_CFG_IN_XP | \
93 MX25_ADCQ_CFG_REFN_NGND2 | \
94 MX25_ADCQ_CFG_PENIACK)
95
96static void imx25_setup_queue_cfgs(struct mx25_tcq_priv *priv,
97 unsigned int settling_cnt)
98{
99 u32 precharge_cfg =
100 MX25_PRECHARGE_VALUE |
101 MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt);
102 u32 touch_detect_cfg =
103 MX25_TOUCH_DETECT_VALUE |
104 MX25_ADCQ_CFG_NOS(1) |
105 MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt);
106
107 regmap_write(priv->core_regs, MX25_TSC_TICR, precharge_cfg);
108
109 /* PRECHARGE */
110 regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_PRECHARGE),
111 precharge_cfg);
112
113 /* TOUCH_DETECT */
114 regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_TOUCH_DETECT),
115 touch_detect_cfg);
116
117 /* X Measurement */
118 regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_X_MEASUREMENT),
119 MX25_ADCQ_CFG_YPLL_OFF |
120 MX25_ADCQ_CFG_XNUR_LOW |
121 MX25_ADCQ_CFG_XPUL_HIGH |
122 MX25_ADCQ_CFG_REFP_XP |
123 MX25_ADCQ_CFG_IN_YP |
124 MX25_ADCQ_CFG_REFN_XN |
125 MX25_ADCQ_CFG_NOS(priv->sample_count) |
126 MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt));
127
128 /* Y Measurement */
129 regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_Y_MEASUREMENT),
130 MX25_ADCQ_CFG_YNLR |
131 MX25_ADCQ_CFG_YPLL_HIGH |
132 MX25_ADCQ_CFG_XNUR_OFF |
133 MX25_ADCQ_CFG_XPUL_OFF |
134 MX25_ADCQ_CFG_REFP_YP |
135 MX25_ADCQ_CFG_IN_XP |
136 MX25_ADCQ_CFG_REFN_YN |
137 MX25_ADCQ_CFG_NOS(priv->sample_count) |
138 MX25_ADCQ_CFG_SETTLING_TIME(settling_cnt));
139
140 /* Enable the touch detection right now */
141 regmap_write(priv->core_regs, MX25_TSC_TICR, touch_detect_cfg |
142 MX25_ADCQ_CFG_IGS);
143}
144
145static int imx25_setup_queue_4wire(struct mx25_tcq_priv *priv,
146 unsigned settling_cnt, int *items)
147{
148 imx25_setup_queue_cfgs(priv, settling_cnt);
149
150 /* Setup the conversion queue */
151 regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
152 MX25_ADCQ_ITEM(0, MX25_CFG_PRECHARGE) |
153 MX25_ADCQ_ITEM(1, MX25_CFG_TOUCH_DETECT) |
154 MX25_ADCQ_ITEM(2, MX25_CFG_X_MEASUREMENT) |
155 MX25_ADCQ_ITEM(3, MX25_CFG_Y_MEASUREMENT) |
156 MX25_ADCQ_ITEM(4, MX25_CFG_PRECHARGE) |
157 MX25_ADCQ_ITEM(5, MX25_CFG_TOUCH_DETECT));
158
159 /*
160 * We measure X/Y with 'sample_count' number of samples and execute a
161 * touch detection twice, with 1 sample each
162 */
163 priv->expected_samples = priv->sample_count * 2 + 2;
164 *items = 6;
165
166 return 0;
167}
168
169static void mx25_tcq_disable_touch_irq(struct mx25_tcq_priv *priv)
170{
171 regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK,
172 MX25_ADCQ_CR_PDMSK);
173}
174
175static void mx25_tcq_enable_touch_irq(struct mx25_tcq_priv *priv)
176{
177 regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK, 0);
178}
179
180static void mx25_tcq_disable_fifo_irq(struct mx25_tcq_priv *priv)
181{
182 regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ,
183 MX25_ADCQ_MR_FDRY_IRQ);
184}
185
186static void mx25_tcq_enable_fifo_irq(struct mx25_tcq_priv *priv)
187{
188 regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ, 0);
189}
190
191static void mx25_tcq_force_queue_start(struct mx25_tcq_priv *priv)
192{
193 regmap_update_bits(priv->regs, MX25_ADCQ_CR,
194 MX25_ADCQ_CR_FQS,
195 MX25_ADCQ_CR_FQS);
196}
197
198static void mx25_tcq_force_queue_stop(struct mx25_tcq_priv *priv)
199{
200 regmap_update_bits(priv->regs, MX25_ADCQ_CR,
201 MX25_ADCQ_CR_FQS, 0);
202}
203
204static void mx25_tcq_fifo_reset(struct mx25_tcq_priv *priv)
205{
206 u32 tcqcr;
207
208 regmap_read(priv->regs, MX25_ADCQ_CR, &tcqcr);
209 regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST,
210 MX25_ADCQ_CR_FRST);
211 regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST, 0);
212 regmap_write(priv->regs, MX25_ADCQ_CR, tcqcr);
213}
214
215static void mx25_tcq_re_enable_touch_detection(struct mx25_tcq_priv *priv)
216{
217 /* stop the queue from looping */
218 mx25_tcq_force_queue_stop(priv);
219
220 /* for a clean touch detection, preload the X plane */
221 regmap_write(priv->core_regs, MX25_TSC_TICR, MX25_PRECHARGE_VALUE);
222
223 /* waste some time now to pre-load the X plate to high voltage */
224 mx25_tcq_fifo_reset(priv);
225
226 /* re-enable the detection right now */
227 regmap_write(priv->core_regs, MX25_TSC_TICR,
228 MX25_TOUCH_DETECT_VALUE | MX25_ADCQ_CFG_IGS);
229
230 regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_PD,
231 MX25_ADCQ_SR_PD);
232
233 /* enable the pen down event to be a source for the interrupt */
234 regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_PD_IRQ, 0);
235
236 /* lets fire the next IRQ if someone touches the touchscreen */
237 mx25_tcq_enable_touch_irq(priv);
238}
239
240static void mx25_tcq_create_event_for_4wire(struct mx25_tcq_priv *priv,
241 u32 *sample_buf,
242 unsigned int samples)
243{
244 unsigned int x_pos = 0;
245 unsigned int y_pos = 0;
246 unsigned int touch_pre = 0;
247 unsigned int touch_post = 0;
248 unsigned int i;
249
250 for (i = 0; i < samples; i++) {
251 unsigned int index = MX25_ADCQ_FIFO_ID(sample_buf[i]);
252 unsigned int val = MX25_ADCQ_FIFO_DATA(sample_buf[i]);
253
254 switch (index) {
255 case 1:
256 touch_pre = val;
257 break;
258 case 2:
259 x_pos = val;
260 break;
261 case 3:
262 y_pos = val;
263 break;
264 case 5:
265 touch_post = val;
266 break;
267 default:
268 dev_dbg(priv->dev, "Dropped samples because of invalid index %d\n",
269 index);
270 return;
271 }
272 }
273
274 if (samples != 0) {
275 /*
276 * only if both touch measures are below a threshold,
277 * the position is valid
278 */
279 if (touch_pre < priv->pen_threshold &&
280 touch_post < priv->pen_threshold) {
281 /* valid samples, generate a report */
282 x_pos /= priv->sample_count;
283 y_pos /= priv->sample_count;
284 input_report_abs(priv->idev, ABS_X, x_pos);
285 input_report_abs(priv->idev, ABS_Y, y_pos);
286 input_report_key(priv->idev, BTN_TOUCH, 1);
287 input_sync(priv->idev);
288
289 /* get next sample */
290 mx25_tcq_enable_fifo_irq(priv);
291 } else if (touch_pre >= priv->pen_threshold &&
292 touch_post >= priv->pen_threshold) {
293 /*
294 * if both samples are invalid,
295 * generate a release report
296 */
297 input_report_key(priv->idev, BTN_TOUCH, 0);
298 input_sync(priv->idev);
299 mx25_tcq_re_enable_touch_detection(priv);
300 } else {
301 /*
302 * if only one of both touch measurements are
303 * below the threshold, still some bouncing
304 * happens. Take additional samples in this
305 * case to be sure
306 */
307 mx25_tcq_enable_fifo_irq(priv);
308 }
309 }
310}
311
312static irqreturn_t mx25_tcq_irq_thread(int irq, void *dev_id)
313{
314 struct mx25_tcq_priv *priv = dev_id;
315 u32 sample_buf[TSC_MAX_SAMPLES];
316 unsigned int samples;
317 u32 stats;
318 unsigned int i;
319
320 /*
321 * Check how many samples are available. We always have to read exactly
322 * sample_count samples from the fifo, or a multiple of sample_count.
323 * Otherwise we mixup samples into different touch events.
324 */
325 regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
326 samples = MX25_ADCQ_SR_FDN(stats);
327 samples -= samples % priv->sample_count;
328
329 if (!samples)
330 return IRQ_HANDLED;
331
332 for (i = 0; i != samples; ++i)
333 regmap_read(priv->regs, MX25_ADCQ_FIFO, &sample_buf[i]);
334
335 mx25_tcq_create_event_for_4wire(priv, sample_buf, samples);
336
337 return IRQ_HANDLED;
338}
339
340static irqreturn_t mx25_tcq_irq(int irq, void *dev_id)
341{
342 struct mx25_tcq_priv *priv = dev_id;
343 u32 stat;
344 int ret = IRQ_HANDLED;
345
346 regmap_read(priv->regs, MX25_ADCQ_SR, &stat);
347
348 if (stat & (MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR))
349 mx25_tcq_re_enable_touch_detection(priv);
350
351 if (stat & MX25_ADCQ_SR_PD) {
352 mx25_tcq_disable_touch_irq(priv);
353 mx25_tcq_force_queue_start(priv);
354 mx25_tcq_enable_fifo_irq(priv);
355 }
356
357 if (stat & MX25_ADCQ_SR_FDRY) {
358 mx25_tcq_disable_fifo_irq(priv);
359 ret = IRQ_WAKE_THREAD;
360 }
361
362 regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
363 MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
364 MX25_ADCQ_SR_PD,
365 MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR |
366 MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_PD);
367
368 return ret;
369}
370
371/* configure the state machine for a 4-wire touchscreen */
372static int mx25_tcq_init(struct mx25_tcq_priv *priv)
373{
374 u32 tgcr;
375 unsigned int ipg_div;
376 unsigned int adc_period;
377 unsigned int debounce_cnt;
378 unsigned int settling_cnt;
379 int itemct;
380 int error;
381
382 regmap_read(priv->core_regs, MX25_TSC_TGCR, &tgcr);
383 ipg_div = max_t(unsigned int, 4, MX25_TGCR_GET_ADCCLK(tgcr));
384 adc_period = USEC_PER_SEC * ipg_div * 2 + 2;
385 adc_period /= clk_get_rate(priv->clk) / 1000 + 1;
386 debounce_cnt = DIV_ROUND_UP(priv->pen_debounce, adc_period * 8) - 1;
387 settling_cnt = DIV_ROUND_UP(priv->settling_time, adc_period * 8) - 1;
388
389 /* Reset */
390 regmap_write(priv->regs, MX25_ADCQ_CR,
391 MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST);
392 regmap_update_bits(priv->regs, MX25_ADCQ_CR,
393 MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST, 0);
394
395 /* up to 128 * 8 ADC clocks are possible */
396 if (debounce_cnt > 127)
397 debounce_cnt = 127;
398
399 /* up to 255 * 8 ADC clocks are possible */
400 if (settling_cnt > 255)
401 settling_cnt = 255;
402
403 error = imx25_setup_queue_4wire(priv, settling_cnt, &itemct);
404 if (error)
405 return error;
406
407 regmap_update_bits(priv->regs, MX25_ADCQ_CR,
408 MX25_ADCQ_CR_LITEMID_MASK | MX25_ADCQ_CR_WMRK_MASK,
409 MX25_ADCQ_CR_LITEMID(itemct - 1) |
410 MX25_ADCQ_CR_WMRK(priv->expected_samples - 1));
411
412 /* setup debounce count */
413 regmap_update_bits(priv->core_regs, MX25_TSC_TGCR,
414 MX25_TGCR_PDBTIME_MASK,
415 MX25_TGCR_PDBTIME(debounce_cnt));
416
417 /* enable debounce */
418 regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDBEN,
419 MX25_TGCR_PDBEN);
420 regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDEN,
421 MX25_TGCR_PDEN);
422
423 /* enable the engine on demand */
424 regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_QSM_MASK,
425 MX25_ADCQ_CR_QSM_FQS);
426
427 /* Enable repeat and repeat wait */
428 regmap_update_bits(priv->regs, MX25_ADCQ_CR,
429 MX25_ADCQ_CR_RPT | MX25_ADCQ_CR_RWAIT_MASK,
430 MX25_ADCQ_CR_RPT |
431 MX25_ADCQ_CR_RWAIT(MX25_TSC_REPEAT_WAIT));
432
433 return 0;
434}
435
436static int mx25_tcq_parse_dt(struct platform_device *pdev,
437 struct mx25_tcq_priv *priv)
438{
439 struct device_node *np = pdev->dev.of_node;
440 u32 wires;
441 int error;
442
443 /* Setup defaults */
444 priv->pen_threshold = 500;
445 priv->sample_count = 3;
446 priv->pen_debounce = 1000000;
447 priv->settling_time = 250000;
448
449 error = of_property_read_u32(np, "fsl,wires", &wires);
450 if (error) {
451 dev_err(&pdev->dev, "Failed to find fsl,wires properties\n");
452 return error;
453 }
454
455 if (wires == 4) {
456 priv->mode = MX25_TS_4WIRE;
457 } else {
458 dev_err(&pdev->dev, "%u-wire mode not supported\n", wires);
459 return -EINVAL;
460 }
461
462 /* These are optional, we don't care about the return values */
463 of_property_read_u32(np, "fsl,pen-threshold", &priv->pen_threshold);
464 of_property_read_u32(np, "fsl,settling-time-ns", &priv->settling_time);
465 of_property_read_u32(np, "fsl,pen-debounce-ns", &priv->pen_debounce);
466
467 return 0;
468}
469
470static int mx25_tcq_open(struct input_dev *idev)
471{
472 struct device *dev = &idev->dev;
473 struct mx25_tcq_priv *priv = dev_get_drvdata(dev);
474 int error;
475
476 error = clk_prepare_enable(priv->clk);
477 if (error) {
478 dev_err(dev, "Failed to enable ipg clock\n");
479 return error;
480 }
481
482 error = mx25_tcq_init(priv);
483 if (error) {
484 dev_err(dev, "Failed to init tcq\n");
485 clk_disable_unprepare(priv->clk);
486 return error;
487 }
488
489 mx25_tcq_re_enable_touch_detection(priv);
490
491 return 0;
492}
493
494static void mx25_tcq_close(struct input_dev *idev)
495{
496 struct mx25_tcq_priv *priv = input_get_drvdata(idev);
497
498 mx25_tcq_force_queue_stop(priv);
499 mx25_tcq_disable_touch_irq(priv);
500 mx25_tcq_disable_fifo_irq(priv);
501 clk_disable_unprepare(priv->clk);
502}
503
504static int mx25_tcq_probe(struct platform_device *pdev)
505{
506 struct device *dev = &pdev->dev;
507 struct input_dev *idev;
508 struct mx25_tcq_priv *priv;
509 struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
510 struct resource *res;
511 void __iomem *mem;
512 int error;
513
514 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
515 if (!priv)
516 return -ENOMEM;
517 priv->dev = dev;
518
519 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
520 mem = devm_ioremap_resource(dev, res);
521 if (IS_ERR(mem))
522 return PTR_ERR(mem);
523
524 error = mx25_tcq_parse_dt(pdev, priv);
525 if (error)
526 return error;
527
528 priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_tcq_regconfig);
529 if (IS_ERR(priv->regs)) {
530 dev_err(dev, "Failed to initialize regmap\n");
531 return PTR_ERR(priv->regs);
532 }
533
534 priv->irq = platform_get_irq(pdev, 0);
535 if (priv->irq <= 0) {
536 dev_err(dev, "Failed to get IRQ\n");
537 return priv->irq;
538 }
539
540 idev = devm_input_allocate_device(dev);
541 if (!idev) {
542 dev_err(dev, "Failed to allocate input device\n");
543 return -ENOMEM;
544 }
545
546 idev->name = mx25_tcq_name;
547 input_set_capability(idev, EV_KEY, BTN_TOUCH);
548 input_set_abs_params(idev, ABS_X, 0, 0xfff, 0, 0);
549 input_set_abs_params(idev, ABS_Y, 0, 0xfff, 0, 0);
550
551 idev->id.bustype = BUS_HOST;
552 idev->open = mx25_tcq_open;
553 idev->close = mx25_tcq_close;
554
555 priv->idev = idev;
556 input_set_drvdata(idev, priv);
557
558 priv->core_regs = tsadc->regs;
559 if (!priv->core_regs)
560 return -EINVAL;
561
562 priv->clk = tsadc->clk;
563 if (!priv->clk)
564 return -EINVAL;
565
566 platform_set_drvdata(pdev, priv);
567
568 error = devm_request_threaded_irq(dev, priv->irq, mx25_tcq_irq,
569 mx25_tcq_irq_thread, 0, pdev->name,
570 priv);
571 if (error) {
572 dev_err(dev, "Failed requesting IRQ\n");
573 return error;
574 }
575
576 error = input_register_device(idev);
577 if (error) {
578 dev_err(dev, "Failed to register input device\n");
579 return error;
580 }
581
582 return 0;
583}
584
585static struct platform_driver mx25_tcq_driver = {
586 .driver = {
587 .name = "mx25-tcq",
588 .of_match_table = mx25_tcq_ids,
589 },
590 .probe = mx25_tcq_probe,
591};
592module_platform_driver(mx25_tcq_driver);
593
594MODULE_DESCRIPTION("TS input driver for Freescale mx25");
595MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
596MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 1bc97c2761e4..eea61e349e26 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -18,6 +18,17 @@ config MFD_CS5535
18 This is the core driver for CS5535/CS5536 MFD functions. This is 18 This is the core driver for CS5535/CS5536 MFD functions. This is
19 necessary for using the board's GPIO and MFGPT functionality. 19 necessary for using the board's GPIO and MFGPT functionality.
20 20
21config MFD_ACT8945A
22 tristate "Active-semi ACT8945A"
23 select MFD_CORE
24 select REGMAP_I2C
25 depends on I2C && OF
26 help
27 Support for the ACT8945A PMIC from Active-semi. This device
28 features three step-down DC/DC converters and four low-dropout
29 linear regulators, along with a complete ActivePath battery
30 charger.
31
21config MFD_AS3711 32config MFD_AS3711
22 bool "AMS AS3711" 33 bool "AMS AS3711"
23 select MFD_CORE 34 select MFD_CORE
@@ -91,14 +102,29 @@ config MFD_BCM590XX
91 Support for the BCM590xx PMUs from Broadcom 102 Support for the BCM590xx PMUs from Broadcom
92 103
93config MFD_AXP20X 104config MFD_AXP20X
94 bool "X-Powers AXP20X" 105 tristate
95 select MFD_CORE 106 select MFD_CORE
96 select REGMAP_I2C
97 select REGMAP_IRQ 107 select REGMAP_IRQ
98 depends on I2C=y 108
109config MFD_AXP20X_I2C
110 tristate "X-Powers AXP series PMICs with I2C"
111 select MFD_AXP20X
112 select REGMAP_I2C
113 depends on I2C
114 help
115 If you say Y here you get support for the X-Powers AXP series power
116 management ICs (PMICs) controlled with I2C.
117 This driver include only the core APIs. You have to select individual
118 components like regulators or the PEK (Power Enable Key) under the
119 corresponding menus.
120
121config MFD_AXP20X_RSB
122 tristate "X-Powers AXP series PMICs with RSB"
123 select MFD_AXP20X
124 depends on SUNXI_RSB
99 help 125 help
100 If you say Y here you get support for the X-Powers AXP202, AXP209 and 126 If you say Y here you get support for the X-Powers AXP series power
101 AXP288 power management IC (PMIC). 127 management ICs (PMICs) controlled with RSB.
102 This driver include only the core APIs. You have to select individual 128 This driver include only the core APIs. You have to select individual
103 components like regulators or the PEK (Power Enable Key) under the 129 components like regulators or the PEK (Power Enable Key) under the
104 corresponding menus. 130 corresponding menus.
@@ -203,7 +229,7 @@ config MFD_DA9062
203 select MFD_CORE 229 select MFD_CORE
204 select REGMAP_I2C 230 select REGMAP_I2C
205 select REGMAP_IRQ 231 select REGMAP_IRQ
206 depends on I2C=y 232 depends on I2C
207 help 233 help
208 Say yes here for support for the Dialog Semiconductor DA9062 PMIC. 234 Say yes here for support for the Dialog Semiconductor DA9062 PMIC.
209 This includes the I2C driver and core APIs. 235 This includes the I2C driver and core APIs.
@@ -215,7 +241,7 @@ config MFD_DA9063
215 select MFD_CORE 241 select MFD_CORE
216 select REGMAP_I2C 242 select REGMAP_I2C
217 select REGMAP_IRQ 243 select REGMAP_IRQ
218 depends on I2C=y 244 depends on I2C
219 help 245 help
220 Say yes here for support for the Dialog Semiconductor DA9063 PMIC. 246 Say yes here for support for the Dialog Semiconductor DA9063 PMIC.
221 This includes the I2C driver and core APIs. 247 This includes the I2C driver and core APIs.
@@ -224,7 +250,7 @@ config MFD_DA9063
224 250
225config MFD_DA9150 251config MFD_DA9150
226 tristate "Dialog Semiconductor DA9150 Charger Fuel-Gauge chip" 252 tristate "Dialog Semiconductor DA9150 Charger Fuel-Gauge chip"
227 depends on I2C=y 253 depends on I2C
228 select MFD_CORE 254 select MFD_CORE
229 select REGMAP_I2C 255 select REGMAP_I2C
230 select REGMAP_IRQ 256 select REGMAP_IRQ
@@ -271,6 +297,15 @@ config MFD_MC13XXX_I2C
271 help 297 help
272 Select this if your MC13xxx is connected via an I2C bus. 298 Select this if your MC13xxx is connected via an I2C bus.
273 299
300config MFD_MX25_TSADC
301 tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"
302 select REGMAP_MMIO
303 depends on (SOC_IMX25 && OF) || COMPILE_TEST
304 help
305 Enable support for the integrated Touchscreen and ADC unit of the
306 i.MX25 processors. They consist of a conversion queue for general
307 purpose ADC and a queue for Touchscreens.
308
274config MFD_HI6421_PMIC 309config MFD_HI6421_PMIC
275 tristate "HiSilicon Hi6421 PMU/Codec IC" 310 tristate "HiSilicon Hi6421 PMU/Codec IC"
276 depends on OF 311 depends on OF
@@ -445,7 +480,7 @@ config MFD_KEMPLD
445 480
446config MFD_88PM800 481config MFD_88PM800
447 tristate "Marvell 88PM800" 482 tristate "Marvell 88PM800"
448 depends on I2C=y 483 depends on I2C
449 select REGMAP_I2C 484 select REGMAP_I2C
450 select REGMAP_IRQ 485 select REGMAP_IRQ
451 select MFD_CORE 486 select MFD_CORE
@@ -457,7 +492,7 @@ config MFD_88PM800
457 492
458config MFD_88PM805 493config MFD_88PM805
459 tristate "Marvell 88PM805" 494 tristate "Marvell 88PM805"
460 depends on I2C=y 495 depends on I2C
461 select REGMAP_I2C 496 select REGMAP_I2C
462 select REGMAP_IRQ 497 select REGMAP_IRQ
463 select MFD_CORE 498 select MFD_CORE
@@ -493,8 +528,8 @@ config MFD_MAX14577
493 of the device. 528 of the device.
494 529
495config MFD_MAX77686 530config MFD_MAX77686
496 bool "Maxim Semiconductor MAX77686/802 PMIC Support" 531 tristate "Maxim Semiconductor MAX77686/802 PMIC Support"
497 depends on I2C=y 532 depends on I2C
498 depends on OF 533 depends on OF
499 select MFD_CORE 534 select MFD_CORE
500 select REGMAP_I2C 535 select REGMAP_I2C
@@ -538,7 +573,7 @@ config MFD_MAX77843
538config MFD_MAX8907 573config MFD_MAX8907
539 tristate "Maxim Semiconductor MAX8907 PMIC Support" 574 tristate "Maxim Semiconductor MAX8907 PMIC Support"
540 select MFD_CORE 575 select MFD_CORE
541 depends on I2C=y 576 depends on I2C
542 select REGMAP_I2C 577 select REGMAP_I2C
543 select REGMAP_IRQ 578 select REGMAP_IRQ
544 help 579 help
@@ -743,7 +778,7 @@ config MFD_RTSX_PCI
743 778
744config MFD_RT5033 779config MFD_RT5033
745 tristate "Richtek RT5033 Power Management IC" 780 tristate "Richtek RT5033 Power Management IC"
746 depends on I2C=y 781 depends on I2C
747 select MFD_CORE 782 select MFD_CORE
748 select REGMAP_I2C 783 select REGMAP_I2C
749 select REGMAP_IRQ 784 select REGMAP_IRQ
@@ -1106,6 +1141,19 @@ config TPS6507X
1106 This driver can also be built as a module. If so, the module 1141 This driver can also be built as a module. If so, the module
1107 will be called tps6507x. 1142 will be called tps6507x.
1108 1143
1144config MFD_TPS65086
1145 tristate "TI TPS65086 Power Management Integrated Chips (PMICs)"
1146 select REGMAP
1147 select REGMAP_IRQ
1148 select REGMAP_I2C
1149 depends on I2C
1150 help
1151 If you say yes here you get support for the TPS65086 series of
1152 Power Management chips.
1153 This driver provides common support for accessing the device,
1154 additional drivers must be enabled in order to use the
1155 functionality of the device.
1156
1109config TPS65911_COMPARATOR 1157config TPS65911_COMPARATOR
1110 tristate 1158 tristate
1111 1159
@@ -1370,7 +1418,6 @@ config MFD_ARIZONA
1370config MFD_ARIZONA_I2C 1418config MFD_ARIZONA_I2C
1371 tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with I2C" 1419 tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with I2C"
1372 select MFD_ARIZONA 1420 select MFD_ARIZONA
1373 select MFD_CORE
1374 select REGMAP_I2C 1421 select REGMAP_I2C
1375 depends on I2C 1422 depends on I2C
1376 help 1423 help
@@ -1380,12 +1427,11 @@ config MFD_ARIZONA_I2C
1380config MFD_ARIZONA_SPI 1427config MFD_ARIZONA_SPI
1381 tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with SPI" 1428 tristate "Cirrus Logic/Wolfson Microelectronics Arizona platform with SPI"
1382 select MFD_ARIZONA 1429 select MFD_ARIZONA
1383 select MFD_CORE
1384 select REGMAP_SPI 1430 select REGMAP_SPI
1385 depends on SPI_MASTER 1431 depends on SPI_MASTER
1386 help 1432 help
1387 Support for the Cirrus Logic/Wolfson Microelectronics Arizona platform 1433 Support for the Cirrus Logic/Wolfson Microelectronics Arizona platform
1388 audio SoC core functionality controlled via I2C. 1434 audio SoC core functionality controlled via SPI.
1389 1435
1390config MFD_CS47L24 1436config MFD_CS47L24
1391 bool "Cirrus Logic CS47L24 and WM1831" 1437 bool "Cirrus Logic CS47L24 and WM1831"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 1811202cee19..5eaa6465d0a6 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -6,6 +6,7 @@
6obj-$(CONFIG_MFD_88PM860X) += 88pm860x.o 6obj-$(CONFIG_MFD_88PM860X) += 88pm860x.o
7obj-$(CONFIG_MFD_88PM800) += 88pm800.o 88pm80x.o 7obj-$(CONFIG_MFD_88PM800) += 88pm800.o 88pm80x.o
8obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o 8obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o
9obj-$(CONFIG_MFD_ACT8945A) += act8945a.o
9obj-$(CONFIG_MFD_SM501) += sm501.o 10obj-$(CONFIG_MFD_SM501) += sm501.o
10obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o 11obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o
11obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o 12obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o
@@ -70,6 +71,7 @@ obj-$(CONFIG_MFD_WM8994) += wm8994.o
70obj-$(CONFIG_TPS6105X) += tps6105x.o 71obj-$(CONFIG_TPS6105X) += tps6105x.o
71obj-$(CONFIG_TPS65010) += tps65010.o 72obj-$(CONFIG_TPS65010) += tps65010.o
72obj-$(CONFIG_TPS6507X) += tps6507x.o 73obj-$(CONFIG_TPS6507X) += tps6507x.o
74obj-$(CONFIG_MFD_TPS65086) += tps65086.o
73obj-$(CONFIG_MFD_TPS65217) += tps65217.o 75obj-$(CONFIG_MFD_TPS65217) += tps65217.o
74obj-$(CONFIG_MFD_TPS65218) += tps65218.o 76obj-$(CONFIG_MFD_TPS65218) += tps65218.o
75obj-$(CONFIG_MFD_TPS65910) += tps65910.o 77obj-$(CONFIG_MFD_TPS65910) += tps65910.o
@@ -84,6 +86,8 @@ obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o
84obj-$(CONFIG_MFD_TWL4030_AUDIO) += twl4030-audio.o 86obj-$(CONFIG_MFD_TWL4030_AUDIO) += twl4030-audio.o
85obj-$(CONFIG_TWL6040_CORE) += twl6040.o 87obj-$(CONFIG_TWL6040_CORE) += twl6040.o
86 88
89obj-$(CONFIG_MFD_MX25_TSADC) += fsl-imx25-tsadc.o
90
87obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o 91obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o
88obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o 92obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o
89obj-$(CONFIG_MFD_MC13XXX_I2C) += mc13xxx-i2c.o 93obj-$(CONFIG_MFD_MC13XXX_I2C) += mc13xxx-i2c.o
@@ -110,6 +114,8 @@ obj-$(CONFIG_PMIC_DA9052) += da9052-core.o
110obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o 114obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o
111obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o 115obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
112obj-$(CONFIG_MFD_AXP20X) += axp20x.o 116obj-$(CONFIG_MFD_AXP20X) += axp20x.o
117obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o
118obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o
113 119
114obj-$(CONFIG_MFD_LP3943) += lp3943.o 120obj-$(CONFIG_MFD_LP3943) += lp3943.o
115obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o 121obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o
diff --git a/drivers/mfd/act8945a.c b/drivers/mfd/act8945a.c
new file mode 100644
index 000000000000..525b546ba42f
--- /dev/null
+++ b/drivers/mfd/act8945a.c
@@ -0,0 +1,102 @@
1/*
2 * MFD driver for Active-semi ACT8945a PMIC
3 *
4 * Copyright (C) 2015 Atmel Corporation.
5 *
6 * Author: Wenyou Yang <wenyou.yang@atmel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/i2c.h>
15#include <linux/mfd/core.h>
16#include <linux/module.h>
17#include <linux/of_device.h>
18#include <linux/regmap.h>
19
20static const struct mfd_cell act8945a_devs[] = {
21 {
22 .name = "act8945a-regulator",
23 },
24 {
25 .name = "act8945a-charger",
26 },
27};
28
29static const struct regmap_config act8945a_regmap_config = {
30 .reg_bits = 8,
31 .val_bits = 8,
32};
33
34static int act8945a_i2c_probe(struct i2c_client *i2c,
35 const struct i2c_device_id *id)
36{
37 int ret;
38 struct regmap *regmap;
39
40 regmap = devm_regmap_init_i2c(i2c, &act8945a_regmap_config);
41 if (IS_ERR(regmap)) {
42 ret = PTR_ERR(regmap);
43 dev_err(&i2c->dev, "regmap init failed: %d\n", ret);
44 return ret;
45 }
46
47 i2c_set_clientdata(i2c, regmap);
48
49 ret = mfd_add_devices(&i2c->dev, PLATFORM_DEVID_NONE, act8945a_devs,
50 ARRAY_SIZE(act8945a_devs), NULL, 0, NULL);
51 if (ret) {
52 dev_err(&i2c->dev, "Failed to add sub devices\n");
53 return ret;
54 }
55
56 return 0;
57}
58
59static int act8945a_i2c_remove(struct i2c_client *i2c)
60{
61 mfd_remove_devices(&i2c->dev);
62
63 return 0;
64}
65
66static const struct i2c_device_id act8945a_i2c_id[] = {
67 { "act8945a", 0 },
68 {}
69};
70MODULE_DEVICE_TABLE(i2c, act8945a_i2c_id);
71
72static const struct of_device_id act8945a_of_match[] = {
73 { .compatible = "active-semi,act8945a", },
74 {},
75};
76MODULE_DEVICE_TABLE(of, act8945a_of_match);
77
78static struct i2c_driver act8945a_i2c_driver = {
79 .driver = {
80 .name = "act8945a",
81 .of_match_table = of_match_ptr(act8945a_of_match),
82 },
83 .probe = act8945a_i2c_probe,
84 .remove = act8945a_i2c_remove,
85 .id_table = act8945a_i2c_id,
86};
87
88static int __init act8945a_i2c_init(void)
89{
90 return i2c_add_driver(&act8945a_i2c_driver);
91}
92subsys_initcall(act8945a_i2c_init);
93
94static void __exit act8945a_i2c_exit(void)
95{
96 i2c_del_driver(&act8945a_i2c_driver);
97}
98module_exit(act8945a_i2c_exit);
99
100MODULE_DESCRIPTION("ACT8945A PMIC multi-function driver");
101MODULE_AUTHOR("Wenyou Yang <wenyou.yang@atmel.com>");
102MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/as3711.c b/drivers/mfd/as3711.c
index 94d67a6e1eb7..09e1483b99bc 100644
--- a/drivers/mfd/as3711.c
+++ b/drivers/mfd/as3711.c
@@ -108,8 +108,8 @@ static const struct regmap_config as3711_regmap_config = {
108 .volatile_reg = as3711_volatile_reg, 108 .volatile_reg = as3711_volatile_reg,
109 .readable_reg = as3711_readable_reg, 109 .readable_reg = as3711_readable_reg,
110 .precious_reg = as3711_precious_reg, 110 .precious_reg = as3711_precious_reg,
111 .max_register = AS3711_MAX_REGS, 111 .max_register = AS3711_MAX_REG,
112 .num_reg_defaults_raw = AS3711_MAX_REGS, 112 .num_reg_defaults_raw = AS3711_NUM_REGS,
113 .cache_type = REGCACHE_RBTREE, 113 .cache_type = REGCACHE_RBTREE,
114}; 114};
115 115
diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c
new file mode 100644
index 000000000000..b1b865822c07
--- /dev/null
+++ b/drivers/mfd/axp20x-i2c.c
@@ -0,0 +1,104 @@
1/*
2 * I2C driver for the X-Powers' Power Management ICs
3 *
4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
7 *
8 * This driver supports the I2C variants.
9 *
10 * Copyright (C) 2014 Carlo Caione
11 *
12 * Author: Carlo Caione <carlo@caione.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/acpi.h>
20#include <linux/err.h>
21#include <linux/i2c.h>
22#include <linux/module.h>
23#include <linux/mfd/axp20x.h>
24#include <linux/of.h>
25#include <linux/regmap.h>
26#include <linux/slab.h>
27
28static int axp20x_i2c_probe(struct i2c_client *i2c,
29 const struct i2c_device_id *id)
30{
31 struct axp20x_dev *axp20x;
32 int ret;
33
34 axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL);
35 if (!axp20x)
36 return -ENOMEM;
37
38 axp20x->dev = &i2c->dev;
39 axp20x->irq = i2c->irq;
40 dev_set_drvdata(axp20x->dev, axp20x);
41
42 ret = axp20x_match_device(axp20x);
43 if (ret)
44 return ret;
45
46 axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg);
47 if (IS_ERR(axp20x->regmap)) {
48 ret = PTR_ERR(axp20x->regmap);
49 dev_err(&i2c->dev, "regmap init failed: %d\n", ret);
50 return ret;
51 }
52
53 return axp20x_device_probe(axp20x);
54}
55
56static int axp20x_i2c_remove(struct i2c_client *i2c)
57{
58 struct axp20x_dev *axp20x = i2c_get_clientdata(i2c);
59
60 return axp20x_device_remove(axp20x);
61}
62
63static const struct of_device_id axp20x_i2c_of_match[] = {
64 { .compatible = "x-powers,axp152", .data = (void *)AXP152_ID },
65 { .compatible = "x-powers,axp202", .data = (void *)AXP202_ID },
66 { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID },
67 { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID },
68 { },
69};
70MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match);
71
72/*
73 * This is useless for OF-enabled devices, but it is needed by I2C subsystem
74 */
75static const struct i2c_device_id axp20x_i2c_id[] = {
76 { },
77};
78MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
79
80static const struct acpi_device_id axp20x_i2c_acpi_match[] = {
81 {
82 .id = "INT33F4",
83 .driver_data = AXP288_ID,
84 },
85 { },
86};
87MODULE_DEVICE_TABLE(acpi, axp20x_i2c_acpi_match);
88
89static struct i2c_driver axp20x_i2c_driver = {
90 .driver = {
91 .name = "axp20x-i2c",
92 .of_match_table = of_match_ptr(axp20x_i2c_of_match),
93 .acpi_match_table = ACPI_PTR(axp20x_i2c_acpi_match),
94 },
95 .probe = axp20x_i2c_probe,
96 .remove = axp20x_i2c_remove,
97 .id_table = axp20x_i2c_id,
98};
99
100module_i2c_driver(axp20x_i2c_driver);
101
102MODULE_DESCRIPTION("PMIC MFD I2C driver for AXP20X");
103MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
104MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c
new file mode 100644
index 000000000000..28c20247c112
--- /dev/null
+++ b/drivers/mfd/axp20x-rsb.c
@@ -0,0 +1,80 @@
1/*
2 * RSB driver for the X-Powers' Power Management ICs
3 *
4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
7 *
8 * This driver supports the RSB variants.
9 *
10 * Copyright (C) 2015 Chen-Yu Tsai
11 *
12 * Author: Chen-Yu Tsai <wens@csie.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/acpi.h>
20#include <linux/err.h>
21#include <linux/mfd/axp20x.h>
22#include <linux/module.h>
23#include <linux/of.h>
24#include <linux/regmap.h>
25#include <linux/slab.h>
26#include <linux/sunxi-rsb.h>
27
28static int axp20x_rsb_probe(struct sunxi_rsb_device *rdev)
29{
30 struct axp20x_dev *axp20x;
31 int ret;
32
33 axp20x = devm_kzalloc(&rdev->dev, sizeof(*axp20x), GFP_KERNEL);
34 if (!axp20x)
35 return -ENOMEM;
36
37 axp20x->dev = &rdev->dev;
38 axp20x->irq = rdev->irq;
39 dev_set_drvdata(&rdev->dev, axp20x);
40
41 ret = axp20x_match_device(axp20x);
42 if (ret)
43 return ret;
44
45 axp20x->regmap = devm_regmap_init_sunxi_rsb(rdev, axp20x->regmap_cfg);
46 if (IS_ERR(axp20x->regmap)) {
47 ret = PTR_ERR(axp20x->regmap);
48 dev_err(&rdev->dev, "regmap init failed: %d\n", ret);
49 return ret;
50 }
51
52 return axp20x_device_probe(axp20x);
53}
54
55static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev)
56{
57 struct axp20x_dev *axp20x = sunxi_rsb_device_get_drvdata(rdev);
58
59 return axp20x_device_remove(axp20x);
60}
61
62static const struct of_device_id axp20x_rsb_of_match[] = {
63 { .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
64 { },
65};
66MODULE_DEVICE_TABLE(of, axp20x_rsb_of_match);
67
68static struct sunxi_rsb_driver axp20x_rsb_driver = {
69 .driver = {
70 .name = "axp20x-rsb",
71 .of_match_table = of_match_ptr(axp20x_rsb_of_match),
72 },
73 .probe = axp20x_rsb_probe,
74 .remove = axp20x_rsb_remove,
75};
76module_sunxi_rsb_driver(axp20x_rsb_driver);
77
78MODULE_DESCRIPTION("PMIC MFD sunXi RSB driver for AXP20X");
79MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
80MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 9842199e2e6c..a57d6e940610 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -1,10 +1,14 @@
1/* 1/*
2 * axp20x.c - MFD core driver for the X-Powers' Power Management ICs 2 * MFD core driver for the X-Powers' Power Management ICs
3 * 3 *
4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs. 6 * as well as configurable GPIOs.
7 * 7 *
8 * This file contains the interface independent core functions.
9 *
10 * Copyright (C) 2014 Carlo Caione
11 *
8 * Author: Carlo Caione <carlo@caione.org> 12 * Author: Carlo Caione <carlo@caione.org>
9 * 13 *
10 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
@@ -13,18 +17,15 @@
13 */ 17 */
14 18
15#include <linux/err.h> 19#include <linux/err.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h> 20#include <linux/interrupt.h>
18#include <linux/kernel.h> 21#include <linux/kernel.h>
19#include <linux/module.h> 22#include <linux/module.h>
20#include <linux/pm_runtime.h> 23#include <linux/pm_runtime.h>
21#include <linux/regmap.h> 24#include <linux/regmap.h>
22#include <linux/slab.h>
23#include <linux/regulator/consumer.h> 25#include <linux/regulator/consumer.h>
24#include <linux/mfd/axp20x.h> 26#include <linux/mfd/axp20x.h>
25#include <linux/mfd/core.h> 27#include <linux/mfd/core.h>
26#include <linux/of_device.h> 28#include <linux/of_device.h>
27#include <linux/of_irq.h>
28#include <linux/acpi.h> 29#include <linux/acpi.h>
29 30
30#define AXP20X_OFF 0x80 31#define AXP20X_OFF 0x80
@@ -34,6 +35,7 @@ static const char * const axp20x_model_names[] = {
34 "AXP202", 35 "AXP202",
35 "AXP209", 36 "AXP209",
36 "AXP221", 37 "AXP221",
38 "AXP223",
37 "AXP288", 39 "AXP288",
38}; 40};
39 41
@@ -376,32 +378,6 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
376 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 378 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
377}; 379};
378 380
379static const struct of_device_id axp20x_of_match[] = {
380 { .compatible = "x-powers,axp152", .data = (void *) AXP152_ID },
381 { .compatible = "x-powers,axp202", .data = (void *) AXP202_ID },
382 { .compatible = "x-powers,axp209", .data = (void *) AXP209_ID },
383 { .compatible = "x-powers,axp221", .data = (void *) AXP221_ID },
384 { },
385};
386MODULE_DEVICE_TABLE(of, axp20x_of_match);
387
388/*
389 * This is useless for OF-enabled devices, but it is needed by I2C subsystem
390 */
391static const struct i2c_device_id axp20x_i2c_id[] = {
392 { },
393};
394MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
395
396static const struct acpi_device_id axp20x_acpi_match[] = {
397 {
398 .id = "INT33F4",
399 .driver_data = AXP288_ID,
400 },
401 { },
402};
403MODULE_DEVICE_TABLE(acpi, axp20x_acpi_match);
404
405static const struct regmap_irq_chip axp152_regmap_irq_chip = { 381static const struct regmap_irq_chip axp152_regmap_irq_chip = {
406 .name = "axp152_irq_chip", 382 .name = "axp152_irq_chip",
407 .status_base = AXP152_IRQ1_STATE, 383 .status_base = AXP152_IRQ1_STATE,
@@ -606,25 +582,26 @@ static void axp20x_power_off(void)
606 AXP20X_OFF); 582 AXP20X_OFF);
607} 583}
608 584
609static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev) 585int axp20x_match_device(struct axp20x_dev *axp20x)
610{ 586{
587 struct device *dev = axp20x->dev;
611 const struct acpi_device_id *acpi_id; 588 const struct acpi_device_id *acpi_id;
612 const struct of_device_id *of_id; 589 const struct of_device_id *of_id;
613 590
614 if (dev->of_node) { 591 if (dev->of_node) {
615 of_id = of_match_device(axp20x_of_match, dev); 592 of_id = of_match_device(dev->driver->of_match_table, dev);
616 if (!of_id) { 593 if (!of_id) {
617 dev_err(dev, "Unable to match OF ID\n"); 594 dev_err(dev, "Unable to match OF ID\n");
618 return -ENODEV; 595 return -ENODEV;
619 } 596 }
620 axp20x->variant = (long) of_id->data; 597 axp20x->variant = (long)of_id->data;
621 } else { 598 } else {
622 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 599 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
623 if (!acpi_id || !acpi_id->driver_data) { 600 if (!acpi_id || !acpi_id->driver_data) {
624 dev_err(dev, "Unable to match ACPI ID and data\n"); 601 dev_err(dev, "Unable to match ACPI ID and data\n");
625 return -ENODEV; 602 return -ENODEV;
626 } 603 }
627 axp20x->variant = (long) acpi_id->driver_data; 604 axp20x->variant = (long)acpi_id->driver_data;
628 } 605 }
629 606
630 switch (axp20x->variant) { 607 switch (axp20x->variant) {
@@ -642,6 +619,7 @@ static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev)
642 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 619 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
643 break; 620 break;
644 case AXP221_ID: 621 case AXP221_ID:
622 case AXP223_ID:
645 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells); 623 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
646 axp20x->cells = axp22x_cells; 624 axp20x->cells = axp22x_cells;
647 axp20x->regmap_cfg = &axp22x_regmap_config; 625 axp20x->regmap_cfg = &axp22x_regmap_config;
@@ -658,51 +636,31 @@ static int axp20x_match_device(struct axp20x_dev *axp20x, struct device *dev)
658 return -EINVAL; 636 return -EINVAL;
659 } 637 }
660 dev_info(dev, "AXP20x variant %s found\n", 638 dev_info(dev, "AXP20x variant %s found\n",
661 axp20x_model_names[axp20x->variant]); 639 axp20x_model_names[axp20x->variant]);
662 640
663 return 0; 641 return 0;
664} 642}
643EXPORT_SYMBOL(axp20x_match_device);
665 644
666static int axp20x_i2c_probe(struct i2c_client *i2c, 645int axp20x_device_probe(struct axp20x_dev *axp20x)
667 const struct i2c_device_id *id)
668{ 646{
669 struct axp20x_dev *axp20x;
670 int ret; 647 int ret;
671 648
672 axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); 649 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
673 if (!axp20x)
674 return -ENOMEM;
675
676 ret = axp20x_match_device(axp20x, &i2c->dev);
677 if (ret)
678 return ret;
679
680 axp20x->i2c_client = i2c;
681 axp20x->dev = &i2c->dev;
682 dev_set_drvdata(axp20x->dev, axp20x);
683
684 axp20x->regmap = devm_regmap_init_i2c(i2c, axp20x->regmap_cfg);
685 if (IS_ERR(axp20x->regmap)) {
686 ret = PTR_ERR(axp20x->regmap);
687 dev_err(&i2c->dev, "regmap init failed: %d\n", ret);
688 return ret;
689 }
690
691 ret = regmap_add_irq_chip(axp20x->regmap, i2c->irq,
692 IRQF_ONESHOT | IRQF_SHARED, -1, 650 IRQF_ONESHOT | IRQF_SHARED, -1,
693 axp20x->regmap_irq_chip, 651 axp20x->regmap_irq_chip,
694 &axp20x->regmap_irqc); 652 &axp20x->regmap_irqc);
695 if (ret) { 653 if (ret) {
696 dev_err(&i2c->dev, "failed to add irq chip: %d\n", ret); 654 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
697 return ret; 655 return ret;
698 } 656 }
699 657
700 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 658 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
701 axp20x->nr_cells, NULL, 0, NULL); 659 axp20x->nr_cells, NULL, 0, NULL);
702 660
703 if (ret) { 661 if (ret) {
704 dev_err(&i2c->dev, "failed to add MFD devices: %d\n", ret); 662 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
705 regmap_del_irq_chip(i2c->irq, axp20x->regmap_irqc); 663 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
706 return ret; 664 return ret;
707 } 665 }
708 666
@@ -711,38 +669,25 @@ static int axp20x_i2c_probe(struct i2c_client *i2c,
711 pm_power_off = axp20x_power_off; 669 pm_power_off = axp20x_power_off;
712 } 670 }
713 671
714 dev_info(&i2c->dev, "AXP20X driver loaded\n"); 672 dev_info(axp20x->dev, "AXP20X driver loaded\n");
715 673
716 return 0; 674 return 0;
717} 675}
676EXPORT_SYMBOL(axp20x_device_probe);
718 677
719static int axp20x_i2c_remove(struct i2c_client *i2c) 678int axp20x_device_remove(struct axp20x_dev *axp20x)
720{ 679{
721 struct axp20x_dev *axp20x = i2c_get_clientdata(i2c);
722
723 if (axp20x == axp20x_pm_power_off) { 680 if (axp20x == axp20x_pm_power_off) {
724 axp20x_pm_power_off = NULL; 681 axp20x_pm_power_off = NULL;
725 pm_power_off = NULL; 682 pm_power_off = NULL;
726 } 683 }
727 684
728 mfd_remove_devices(axp20x->dev); 685 mfd_remove_devices(axp20x->dev);
729 regmap_del_irq_chip(axp20x->i2c_client->irq, axp20x->regmap_irqc); 686 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
730 687
731 return 0; 688 return 0;
732} 689}
733 690EXPORT_SYMBOL(axp20x_device_remove);
734static struct i2c_driver axp20x_i2c_driver = {
735 .driver = {
736 .name = "axp20x",
737 .of_match_table = of_match_ptr(axp20x_of_match),
738 .acpi_match_table = ACPI_PTR(axp20x_acpi_match),
739 },
740 .probe = axp20x_i2c_probe,
741 .remove = axp20x_i2c_remove,
742 .id_table = axp20x_i2c_id,
743};
744
745module_i2c_driver(axp20x_i2c_driver);
746 691
747MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 692MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
748MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 693MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c
index 870800657594..f6b78aafdb55 100644
--- a/drivers/mfd/cs47l24-tables.c
+++ b/drivers/mfd/cs47l24-tables.c
@@ -227,8 +227,6 @@ static const struct reg_default cs47l24_reg_default[] = {
227 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ 227 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */
228 { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */ 228 { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */
229 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ 229 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */
230 { 0x00000177, 0x0281 }, /* R375 - FLL1 Loop Filter Test 1 */
231 { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */
232 { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */ 230 { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */
233 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ 231 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */
234 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ 232 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */
@@ -245,8 +243,6 @@ static const struct reg_default cs47l24_reg_default[] = {
245 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ 243 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */
246 { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */ 244 { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */
247 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ 245 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */
248 { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */
249 { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */
250 { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */ 246 { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */
251 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ 247 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */
252 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ 248 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */
@@ -678,7 +674,7 @@ static const struct reg_default cs47l24_reg_default[] = {
678 { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ 674 { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */
679 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ 675 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */
680 { 0x00000C20, 0x0002 }, /* R3104 - Misc Pad Ctrl 1 */ 676 { 0x00000C20, 0x0002 }, /* R3104 - Misc Pad Ctrl 1 */
681 { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ 677 { 0x00000C21, 0x0000 }, /* R3105 - Misc Pad Ctrl 2 */
682 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ 678 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */
683 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ 679 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */
684 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ 680 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */
@@ -858,8 +854,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
858 case ARIZONA_FLL1_CONTROL_5: 854 case ARIZONA_FLL1_CONTROL_5:
859 case ARIZONA_FLL1_CONTROL_6: 855 case ARIZONA_FLL1_CONTROL_6:
860 case ARIZONA_FLL1_CONTROL_7: 856 case ARIZONA_FLL1_CONTROL_7:
861 case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
862 case ARIZONA_FLL1_NCO_TEST_0:
863 case ARIZONA_FLL1_SYNCHRONISER_1: 857 case ARIZONA_FLL1_SYNCHRONISER_1:
864 case ARIZONA_FLL1_SYNCHRONISER_2: 858 case ARIZONA_FLL1_SYNCHRONISER_2:
865 case ARIZONA_FLL1_SYNCHRONISER_3: 859 case ARIZONA_FLL1_SYNCHRONISER_3:
@@ -876,8 +870,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
876 case ARIZONA_FLL2_CONTROL_5: 870 case ARIZONA_FLL2_CONTROL_5:
877 case ARIZONA_FLL2_CONTROL_6: 871 case ARIZONA_FLL2_CONTROL_6:
878 case ARIZONA_FLL2_CONTROL_7: 872 case ARIZONA_FLL2_CONTROL_7:
879 case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
880 case ARIZONA_FLL2_NCO_TEST_0:
881 case ARIZONA_FLL2_SYNCHRONISER_1: 873 case ARIZONA_FLL2_SYNCHRONISER_1:
882 case ARIZONA_FLL2_SYNCHRONISER_2: 874 case ARIZONA_FLL2_SYNCHRONISER_2:
883 case ARIZONA_FLL2_SYNCHRONISER_3: 875 case ARIZONA_FLL2_SYNCHRONISER_3:
diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c
index a9ad024ec6b0..8f873866ea60 100644
--- a/drivers/mfd/da9062-core.c
+++ b/drivers/mfd/da9062-core.c
@@ -388,11 +388,32 @@ static const struct regmap_range da9062_aa_volatile_ranges[] = {
388 .range_min = DA9062AA_STATUS_D, 388 .range_min = DA9062AA_STATUS_D,
389 .range_max = DA9062AA_EVENT_C, 389 .range_max = DA9062AA_EVENT_C,
390 }, { 390 }, {
391 .range_min = DA9062AA_CONTROL_F, 391 .range_min = DA9062AA_CONTROL_A,
392 .range_max = DA9062AA_CONTROL_B,
393 }, {
394 .range_min = DA9062AA_CONTROL_E,
392 .range_max = DA9062AA_CONTROL_F, 395 .range_max = DA9062AA_CONTROL_F,
393 }, { 396 }, {
397 .range_min = DA9062AA_BUCK2_CONT,
398 .range_max = DA9062AA_BUCK4_CONT,
399 }, {
400 .range_min = DA9062AA_BUCK3_CONT,
401 .range_max = DA9062AA_BUCK3_CONT,
402 }, {
403 .range_min = DA9062AA_LDO1_CONT,
404 .range_max = DA9062AA_LDO4_CONT,
405 }, {
406 .range_min = DA9062AA_DVC_1,
407 .range_max = DA9062AA_DVC_1,
408 }, {
394 .range_min = DA9062AA_COUNT_S, 409 .range_min = DA9062AA_COUNT_S,
395 .range_max = DA9062AA_SECOND_D, 410 .range_max = DA9062AA_SECOND_D,
411 }, {
412 .range_min = DA9062AA_SEQ,
413 .range_max = DA9062AA_SEQ,
414 }, {
415 .range_min = DA9062AA_EN_32K,
416 .range_max = DA9062AA_EN_32K,
396 }, 417 },
397}; 418};
398 419
diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c
index 2d4e3e0f4e94..73901084945f 100644
--- a/drivers/mfd/da9063-i2c.c
+++ b/drivers/mfd/da9063-i2c.c
@@ -74,18 +74,30 @@ static const struct regmap_range da9063_ad_writeable_ranges[] = {
74 74
75static const struct regmap_range da9063_ad_volatile_ranges[] = { 75static const struct regmap_range da9063_ad_volatile_ranges[] = {
76 { 76 {
77 .range_min = DA9063_REG_STATUS_A, 77 .range_min = DA9063_REG_PAGE_CON,
78 .range_max = DA9063_REG_EVENT_D, 78 .range_max = DA9063_REG_EVENT_D,
79 }, { 79 }, {
80 .range_min = DA9063_REG_CONTROL_F, 80 .range_min = DA9063_REG_CONTROL_A,
81 .range_max = DA9063_REG_CONTROL_B,
82 }, {
83 .range_min = DA9063_REG_CONTROL_E,
81 .range_max = DA9063_REG_CONTROL_F, 84 .range_max = DA9063_REG_CONTROL_F,
82 }, { 85 }, {
83 .range_min = DA9063_REG_ADC_MAN, 86 .range_min = DA9063_REG_BCORE2_CONT,
87 .range_max = DA9063_REG_LDO11_CONT,
88 }, {
89 .range_min = DA9063_REG_DVC_1,
84 .range_max = DA9063_REG_ADC_MAN, 90 .range_max = DA9063_REG_ADC_MAN,
85 }, { 91 }, {
86 .range_min = DA9063_REG_ADC_RES_L, 92 .range_min = DA9063_REG_ADC_RES_L,
87 .range_max = DA9063_AD_REG_SECOND_D, 93 .range_max = DA9063_AD_REG_SECOND_D,
88 }, { 94 }, {
95 .range_min = DA9063_REG_SEQ,
96 .range_max = DA9063_REG_SEQ,
97 }, {
98 .range_min = DA9063_REG_EN_32K,
99 .range_max = DA9063_REG_EN_32K,
100 }, {
89 .range_min = DA9063_AD_REG_MON_REG_5, 101 .range_min = DA9063_AD_REG_MON_REG_5,
90 .range_max = DA9063_AD_REG_MON_REG_6, 102 .range_max = DA9063_AD_REG_MON_REG_6,
91 }, 103 },
@@ -152,18 +164,30 @@ static const struct regmap_range da9063_bb_writeable_ranges[] = {
152 164
153static const struct regmap_range da9063_bb_volatile_ranges[] = { 165static const struct regmap_range da9063_bb_volatile_ranges[] = {
154 { 166 {
155 .range_min = DA9063_REG_STATUS_A, 167 .range_min = DA9063_REG_PAGE_CON,
156 .range_max = DA9063_REG_EVENT_D, 168 .range_max = DA9063_REG_EVENT_D,
157 }, { 169 }, {
158 .range_min = DA9063_REG_CONTROL_F, 170 .range_min = DA9063_REG_CONTROL_A,
171 .range_max = DA9063_REG_CONTROL_B,
172 }, {
173 .range_min = DA9063_REG_CONTROL_E,
159 .range_max = DA9063_REG_CONTROL_F, 174 .range_max = DA9063_REG_CONTROL_F,
160 }, { 175 }, {
161 .range_min = DA9063_REG_ADC_MAN, 176 .range_min = DA9063_REG_BCORE2_CONT,
177 .range_max = DA9063_REG_LDO11_CONT,
178 }, {
179 .range_min = DA9063_REG_DVC_1,
162 .range_max = DA9063_REG_ADC_MAN, 180 .range_max = DA9063_REG_ADC_MAN,
163 }, { 181 }, {
164 .range_min = DA9063_REG_ADC_RES_L, 182 .range_min = DA9063_REG_ADC_RES_L,
165 .range_max = DA9063_BB_REG_SECOND_D, 183 .range_max = DA9063_BB_REG_SECOND_D,
166 }, { 184 }, {
185 .range_min = DA9063_REG_SEQ,
186 .range_max = DA9063_REG_SEQ,
187 }, {
188 .range_min = DA9063_REG_EN_32K,
189 .range_max = DA9063_REG_EN_32K,
190 }, {
167 .range_min = DA9063_BB_REG_MON_REG_5, 191 .range_min = DA9063_BB_REG_MON_REG_5,
168 .range_max = DA9063_BB_REG_MON_REG_6, 192 .range_max = DA9063_BB_REG_MON_REG_6,
169 }, 193 },
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 12099b09a9a7..c0a86aeb1733 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -739,20 +739,17 @@ int prcmu_config_clkout(u8 clkout, u8 source, u8 div)
739 if (!div && !requests[clkout]) 739 if (!div && !requests[clkout])
740 return -EINVAL; 740 return -EINVAL;
741 741
742 switch (clkout) { 742 if (clkout == 0) {
743 case 0:
744 div_mask = PRCM_CLKOCR_CLKODIV0_MASK; 743 div_mask = PRCM_CLKOCR_CLKODIV0_MASK;
745 mask = (PRCM_CLKOCR_CLKODIV0_MASK | PRCM_CLKOCR_CLKOSEL0_MASK); 744 mask = (PRCM_CLKOCR_CLKODIV0_MASK | PRCM_CLKOCR_CLKOSEL0_MASK);
746 bits = ((source << PRCM_CLKOCR_CLKOSEL0_SHIFT) | 745 bits = ((source << PRCM_CLKOCR_CLKOSEL0_SHIFT) |
747 (div << PRCM_CLKOCR_CLKODIV0_SHIFT)); 746 (div << PRCM_CLKOCR_CLKODIV0_SHIFT));
748 break; 747 } else {
749 case 1:
750 div_mask = PRCM_CLKOCR_CLKODIV1_MASK; 748 div_mask = PRCM_CLKOCR_CLKODIV1_MASK;
751 mask = (PRCM_CLKOCR_CLKODIV1_MASK | PRCM_CLKOCR_CLKOSEL1_MASK | 749 mask = (PRCM_CLKOCR_CLKODIV1_MASK | PRCM_CLKOCR_CLKOSEL1_MASK |
752 PRCM_CLKOCR_CLK1TYPE); 750 PRCM_CLKOCR_CLK1TYPE);
753 bits = ((source << PRCM_CLKOCR_CLKOSEL1_SHIFT) | 751 bits = ((source << PRCM_CLKOCR_CLKOSEL1_SHIFT) |
754 (div << PRCM_CLKOCR_CLKODIV1_SHIFT)); 752 (div << PRCM_CLKOCR_CLKODIV1_SHIFT));
755 break;
756 } 753 }
757 bits &= mask; 754 bits &= mask;
758 755
diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
new file mode 100644
index 000000000000..77b2675cf8f5
--- /dev/null
+++ b/drivers/mfd/fsl-imx25-tsadc.c
@@ -0,0 +1,203 @@
1/*
2 * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8
9#include <linux/clk.h>
10#include <linux/interrupt.h>
11#include <linux/irqchip/chained_irq.h>
12#include <linux/irqdesc.h>
13#include <linux/irqdomain.h>
14#include <linux/irq.h>
15#include <linux/mfd/imx25-tsadc.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/of_platform.h>
19#include <linux/platform_device.h>
20#include <linux/regmap.h>
21
22static struct regmap_config mx25_tsadc_regmap_config = {
23 .fast_io = true,
24 .max_register = 8,
25 .reg_bits = 32,
26 .val_bits = 32,
27 .reg_stride = 4,
28};
29
30static void mx25_tsadc_irq_handler(struct irq_desc *desc)
31{
32 struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);
33 struct irq_chip *chip = irq_desc_get_chip(desc);
34 u32 status;
35
36 chained_irq_enter(chip, desc);
37
38 regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);
39
40 if (status & MX25_TGSR_GCQ_INT)
41 generic_handle_irq(irq_find_mapping(tsadc->domain, 1));
42
43 if (status & MX25_TGSR_TCQ_INT)
44 generic_handle_irq(irq_find_mapping(tsadc->domain, 0));
45
46 chained_irq_exit(chip, desc);
47}
48
49static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
50 irq_hw_number_t hwirq)
51{
52 struct mx25_tsadc *tsadc = d->host_data;
53
54 irq_set_chip_data(irq, tsadc);
55 irq_set_chip_and_handler(irq, &dummy_irq_chip,
56 handle_level_irq);
57 irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
58
59 return 0;
60}
61
62static struct irq_domain_ops mx25_tsadc_domain_ops = {
63 .map = mx25_tsadc_domain_map,
64 .xlate = irq_domain_xlate_onecell,
65};
66
67static int mx25_tsadc_setup_irq(struct platform_device *pdev,
68 struct mx25_tsadc *tsadc)
69{
70 struct device *dev = &pdev->dev;
71 struct device_node *np = dev->of_node;
72 int irq;
73
74 irq = platform_get_irq(pdev, 0);
75 if (irq <= 0) {
76 dev_err(dev, "Failed to get irq\n");
77 return irq;
78 }
79
80 tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
81 tsadc);
82 if (!tsadc->domain) {
83 dev_err(dev, "Failed to add irq domain\n");
84 return -ENOMEM;
85 }
86
87 irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
88 irq_set_handler_data(irq, tsadc);
89
90 return 0;
91}
92
93static void mx25_tsadc_setup_clk(struct platform_device *pdev,
94 struct mx25_tsadc *tsadc)
95{
96 unsigned clk_div;
97
98 /*
99 * According to the datasheet the ADC clock should never
100 * exceed 1,75 MHz. Base clock is the IPG and the ADC unit uses
101 * a funny clock divider. To keep the ADC conversion time constant
102 * adapt the ADC internal clock divider to the IPG clock rate.
103 */
104
105 dev_dbg(&pdev->dev, "Found master clock at %lu Hz\n",
106 clk_get_rate(tsadc->clk));
107
108 clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000);
109 dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div);
110
111 /* adc clock = IPG clock / (2 * div + 2) */
112 clk_div -= 2;
113 clk_div /= 2;
114
115 /*
116 * the ADC clock divider changes its behaviour when values below 4
117 * are used: it is fixed to "/ 10" in this case
118 */
119 clk_div = max_t(unsigned, 4, clk_div);
120
121 dev_dbg(&pdev->dev, "Resulting ADC conversion clock at %lu Hz\n",
122 clk_get_rate(tsadc->clk) / (2 * clk_div + 2));
123
124 regmap_update_bits(tsadc->regs, MX25_TSC_TGCR,
125 MX25_TGCR_ADCCLKCFG(0x1f),
126 MX25_TGCR_ADCCLKCFG(clk_div));
127}
128
129static int mx25_tsadc_probe(struct platform_device *pdev)
130{
131 struct device *dev = &pdev->dev;
132 struct device_node *np = dev->of_node;
133 struct mx25_tsadc *tsadc;
134 struct resource *res;
135 int ret;
136 void __iomem *iomem;
137
138 tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);
139 if (!tsadc)
140 return -ENOMEM;
141
142 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
143 iomem = devm_ioremap_resource(dev, res);
144 if (IS_ERR(iomem))
145 return PTR_ERR(iomem);
146
147 tsadc->regs = devm_regmap_init_mmio(dev, iomem,
148 &mx25_tsadc_regmap_config);
149 if (IS_ERR(tsadc->regs)) {
150 dev_err(dev, "Failed to initialize regmap\n");
151 return PTR_ERR(tsadc->regs);
152 }
153
154 tsadc->clk = devm_clk_get(dev, "ipg");
155 if (IS_ERR(tsadc->clk)) {
156 dev_err(dev, "Failed to get ipg clock\n");
157 return PTR_ERR(tsadc->clk);
158 }
159
160 /* setup clock according to the datasheet */
161 mx25_tsadc_setup_clk(pdev, tsadc);
162
163 /* Enable clock and reset the component */
164 regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
165 MX25_TGCR_CLK_EN);
166 regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
167 MX25_TGCR_TSC_RST);
168
169 /* Setup powersaving mode, but enable internal reference voltage */
170 regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
171 MX25_TGCR_POWERMODE_SAVE);
172 regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
173 MX25_TGCR_INTREFEN);
174
175 ret = mx25_tsadc_setup_irq(pdev, tsadc);
176 if (ret)
177 return ret;
178
179 platform_set_drvdata(pdev, tsadc);
180
181 of_platform_populate(np, NULL, NULL, dev);
182
183 return 0;
184}
185
186static const struct of_device_id mx25_tsadc_ids[] = {
187 { .compatible = "fsl,imx25-tsadc" },
188 { /* Sentinel */ }
189};
190
191static struct platform_driver mx25_tsadc_driver = {
192 .driver = {
193 .name = "mx25-tsadc",
194 .of_match_table = of_match_ptr(mx25_tsadc_ids),
195 },
196 .probe = mx25_tsadc_probe,
197};
198module_platform_driver(mx25_tsadc_driver);
199
200MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
201MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
202MODULE_LICENSE("GPL v2");
203MODULE_ALIAS("platform:mx25-tsadc");
diff --git a/drivers/mfd/intel-lpss-acpi.c b/drivers/mfd/intel-lpss-acpi.c
index 06f00d60be46..5a8d9c766633 100644
--- a/drivers/mfd/intel-lpss-acpi.c
+++ b/drivers/mfd/intel-lpss-acpi.c
@@ -44,8 +44,20 @@ static const struct intel_lpss_platform_info bxt_info = {
44 .clk_rate = 100000000, 44 .clk_rate = 100000000,
45}; 45};
46 46
47static struct property_entry bxt_i2c_properties[] = {
48 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
49 PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
50 PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
51 { },
52};
53
54static struct property_set bxt_i2c_pset = {
55 .properties = bxt_i2c_properties,
56};
57
47static const struct intel_lpss_platform_info bxt_i2c_info = { 58static const struct intel_lpss_platform_info bxt_i2c_info = {
48 .clk_rate = 133000000, 59 .clk_rate = 133000000,
60 .pset = &bxt_i2c_pset,
49}; 61};
50 62
51static const struct acpi_device_id intel_lpss_acpi_ids[] = { 63static const struct acpi_device_id intel_lpss_acpi_ids[] = {
diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
index a7136c7ae9fb..a19e57118641 100644
--- a/drivers/mfd/intel-lpss-pci.c
+++ b/drivers/mfd/intel-lpss-pci.c
@@ -107,12 +107,24 @@ static const struct intel_lpss_platform_info bxt_uart_info = {
107 .pset = &uart_pset, 107 .pset = &uart_pset,
108}; 108};
109 109
110static struct property_entry bxt_i2c_properties[] = {
111 PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
112 PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
113 PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
114 { },
115};
116
117static struct property_set bxt_i2c_pset = {
118 .properties = bxt_i2c_properties,
119};
120
110static const struct intel_lpss_platform_info bxt_i2c_info = { 121static const struct intel_lpss_platform_info bxt_i2c_info = {
111 .clk_rate = 133000000, 122 .clk_rate = 133000000,
123 .pset = &bxt_i2c_pset,
112}; 124};
113 125
114static const struct pci_device_id intel_lpss_pci_ids[] = { 126static const struct pci_device_id intel_lpss_pci_ids[] = {
115 /* BXT */ 127 /* BXT A-Step */
116 { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info }, 128 { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
117 { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info }, 129 { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
118 { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info }, 130 { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
@@ -128,6 +140,23 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
128 { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info }, 140 { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
129 { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info }, 141 { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
130 { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info }, 142 { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
143 /* BXT B-Step */
144 { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info },
145 { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info },
146 { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info },
147 { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info },
148 { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info },
149 { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info },
150 { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info },
151 { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info },
152 { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info },
153 { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info },
154 { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info },
155 { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info },
156 { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
157 { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
158 { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
159
131 /* APL */ 160 /* APL */
132 { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&bxt_i2c_info }, 161 { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&bxt_i2c_info },
133 { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&bxt_i2c_info }, 162 { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&bxt_i2c_info },
diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c
index 1743788f1595..1bbbe877ba7e 100644
--- a/drivers/mfd/intel-lpss.c
+++ b/drivers/mfd/intel-lpss.c
@@ -453,6 +453,7 @@ int intel_lpss_probe(struct device *dev,
453err_remove_ltr: 453err_remove_ltr:
454 intel_lpss_debugfs_remove(lpss); 454 intel_lpss_debugfs_remove(lpss);
455 intel_lpss_ltr_hide(lpss); 455 intel_lpss_ltr_hide(lpss);
456 intel_lpss_unregister_clock(lpss);
456 457
457err_clk_register: 458err_clk_register:
458 ida_simple_remove(&intel_lpss_devid_ida, lpss->devid); 459 ida_simple_remove(&intel_lpss_devid_ida, lpss->devid);
diff --git a/drivers/mfd/intel_quark_i2c_gpio.c b/drivers/mfd/intel_quark_i2c_gpio.c
index 042137465300..bdc5e27222c0 100644
--- a/drivers/mfd/intel_quark_i2c_gpio.c
+++ b/drivers/mfd/intel_quark_i2c_gpio.c
@@ -52,8 +52,6 @@
52/* The Quark I2C controller source clock */ 52/* The Quark I2C controller source clock */
53#define INTEL_QUARK_I2C_CLK_HZ 33000000 53#define INTEL_QUARK_I2C_CLK_HZ 33000000
54 54
55#define INTEL_QUARK_I2C_NCLK 1
56
57struct intel_quark_mfd { 55struct intel_quark_mfd {
58 struct pci_dev *pdev; 56 struct pci_dev *pdev;
59 struct clk *i2c_clk; 57 struct clk *i2c_clk;
@@ -128,30 +126,24 @@ MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
128static int intel_quark_register_i2c_clk(struct intel_quark_mfd *quark_mfd) 126static int intel_quark_register_i2c_clk(struct intel_quark_mfd *quark_mfd)
129{ 127{
130 struct pci_dev *pdev = quark_mfd->pdev; 128 struct pci_dev *pdev = quark_mfd->pdev;
131 struct clk_lookup *i2c_clk_lookup;
132 struct clk *i2c_clk; 129 struct clk *i2c_clk;
133 int ret;
134
135 i2c_clk_lookup = devm_kcalloc(&pdev->dev, INTEL_QUARK_I2C_NCLK,
136 sizeof(*i2c_clk_lookup), GFP_KERNEL);
137 if (!i2c_clk_lookup)
138 return -ENOMEM;
139
140 i2c_clk_lookup[0].dev_id = INTEL_QUARK_I2C_CONTROLLER_CLK;
141 130
142 i2c_clk = clk_register_fixed_rate(&pdev->dev, 131 i2c_clk = clk_register_fixed_rate(&pdev->dev,
143 INTEL_QUARK_I2C_CONTROLLER_CLK, NULL, 132 INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
144 CLK_IS_ROOT, INTEL_QUARK_I2C_CLK_HZ); 133 CLK_IS_ROOT, INTEL_QUARK_I2C_CLK_HZ);
134 if (IS_ERR(i2c_clk))
135 return PTR_ERR(i2c_clk);
145 136
146 quark_mfd->i2c_clk_lookup = i2c_clk_lookup;
147 quark_mfd->i2c_clk = i2c_clk; 137 quark_mfd->i2c_clk = i2c_clk;
138 quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
139 INTEL_QUARK_I2C_CONTROLLER_CLK);
148 140
149 ret = clk_register_clkdevs(i2c_clk, i2c_clk_lookup, 141 if (!quark_mfd->i2c_clk_lookup) {
150 INTEL_QUARK_I2C_NCLK); 142 dev_err(&pdev->dev, "Fixed clk register failed\n");
151 if (ret) 143 return -ENOMEM;
152 dev_err(&pdev->dev, "Fixed clk register failed: %d\n", ret); 144 }
153 145
154 return ret; 146 return 0;
155} 147}
156 148
157static void intel_quark_unregister_i2c_clk(struct pci_dev *pdev) 149static void intel_quark_unregister_i2c_clk(struct pci_dev *pdev)
diff --git a/drivers/mfd/ipaq-micro.c b/drivers/mfd/ipaq-micro.c
index a41859c55bda..df16fd1df68b 100644
--- a/drivers/mfd/ipaq-micro.c
+++ b/drivers/mfd/ipaq-micro.c
@@ -376,7 +376,7 @@ static const struct mfd_cell micro_cells[] = {
376 { .name = "ipaq-micro-leds", }, 376 { .name = "ipaq-micro-leds", },
377}; 377};
378 378
379static int micro_resume(struct device *dev) 379static int __maybe_unused micro_resume(struct device *dev)
380{ 380{
381 struct ipaq_micro *micro = dev_get_drvdata(dev); 381 struct ipaq_micro *micro = dev_get_drvdata(dev);
382 382
diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
index 98ecd136a21b..c1aff46e89d9 100644
--- a/drivers/mfd/max77686.c
+++ b/drivers/mfd/max77686.c
@@ -169,6 +169,7 @@ static const struct of_device_id max77686_pmic_dt_match[] = {
169 }, 169 },
170 { }, 170 { },
171}; 171};
172MODULE_DEVICE_TABLE(of, max77686_pmic_dt_match);
172 173
173static int max77686_i2c_probe(struct i2c_client *i2c, 174static int max77686_i2c_probe(struct i2c_client *i2c,
174 const struct i2c_device_id *id) 175 const struct i2c_device_id *id)
@@ -265,6 +266,7 @@ static int max77686_i2c_remove(struct i2c_client *i2c)
265 266
266static const struct i2c_device_id max77686_i2c_id[] = { 267static const struct i2c_device_id max77686_i2c_id[] = {
267 { "max77686", TYPE_MAX77686 }, 268 { "max77686", TYPE_MAX77686 },
269 { "max77802", TYPE_MAX77802 },
268 { } 270 { }
269}; 271};
270MODULE_DEVICE_TABLE(i2c, max77686_i2c_id); 272MODULE_DEVICE_TABLE(i2c, max77686_i2c_id);
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index 1749c1c9f405..8e8d93249c09 100644
--- a/drivers/mfd/mt6397-core.c
+++ b/drivers/mfd/mt6397-core.c
@@ -19,11 +19,17 @@
19#include <linux/regmap.h> 19#include <linux/regmap.h>
20#include <linux/mfd/core.h> 20#include <linux/mfd/core.h>
21#include <linux/mfd/mt6397/core.h> 21#include <linux/mfd/mt6397/core.h>
22#include <linux/mfd/mt6323/core.h>
22#include <linux/mfd/mt6397/registers.h> 23#include <linux/mfd/mt6397/registers.h>
24#include <linux/mfd/mt6323/registers.h>
23 25
24#define MT6397_RTC_BASE 0xe000 26#define MT6397_RTC_BASE 0xe000
25#define MT6397_RTC_SIZE 0x3e 27#define MT6397_RTC_SIZE 0x3e
26 28
29#define MT6323_CID_CODE 0x23
30#define MT6391_CID_CODE 0x91
31#define MT6397_CID_CODE 0x97
32
27static const struct resource mt6397_rtc_resources[] = { 33static const struct resource mt6397_rtc_resources[] = {
28 { 34 {
29 .start = MT6397_RTC_BASE, 35 .start = MT6397_RTC_BASE,
@@ -37,6 +43,13 @@ static const struct resource mt6397_rtc_resources[] = {
37 }, 43 },
38}; 44};
39 45
46static const struct mfd_cell mt6323_devs[] = {
47 {
48 .name = "mt6323-regulator",
49 .of_compatible = "mediatek,mt6323-regulator"
50 },
51};
52
40static const struct mfd_cell mt6397_devs[] = { 53static const struct mfd_cell mt6397_devs[] = {
41 { 54 {
42 .name = "mt6397-rtc", 55 .name = "mt6397-rtc",
@@ -69,8 +82,10 @@ static void mt6397_irq_sync_unlock(struct irq_data *data)
69{ 82{
70 struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data); 83 struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
71 84
72 regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]); 85 regmap_write(mt6397->regmap, mt6397->int_con[0],
73 regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]); 86 mt6397->irq_masks_cur[0]);
87 regmap_write(mt6397->regmap, mt6397->int_con[1],
88 mt6397->irq_masks_cur[1]);
74 89
75 mutex_unlock(&mt6397->irqlock); 90 mutex_unlock(&mt6397->irqlock);
76} 91}
@@ -147,8 +162,8 @@ static irqreturn_t mt6397_irq_thread(int irq, void *data)
147{ 162{
148 struct mt6397_chip *mt6397 = data; 163 struct mt6397_chip *mt6397 = data;
149 164
150 mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS0, 0); 165 mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
151 mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS1, 16); 166 mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
152 167
153 return IRQ_HANDLED; 168 return IRQ_HANDLED;
154} 169}
@@ -177,8 +192,8 @@ static int mt6397_irq_init(struct mt6397_chip *mt6397)
177 mutex_init(&mt6397->irqlock); 192 mutex_init(&mt6397->irqlock);
178 193
179 /* Mask all interrupt sources */ 194 /* Mask all interrupt sources */
180 regmap_write(mt6397->regmap, MT6397_INT_CON0, 0x0); 195 regmap_write(mt6397->regmap, mt6397->int_con[0], 0x0);
181 regmap_write(mt6397->regmap, MT6397_INT_CON1, 0x0); 196 regmap_write(mt6397->regmap, mt6397->int_con[1], 0x0);
182 197
183 mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node, 198 mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
184 MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397); 199 MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
@@ -203,8 +218,8 @@ static int mt6397_irq_suspend(struct device *dev)
203{ 218{
204 struct mt6397_chip *chip = dev_get_drvdata(dev); 219 struct mt6397_chip *chip = dev_get_drvdata(dev);
205 220
206 regmap_write(chip->regmap, MT6397_INT_CON0, chip->wake_mask[0]); 221 regmap_write(chip->regmap, chip->int_con[0], chip->wake_mask[0]);
207 regmap_write(chip->regmap, MT6397_INT_CON1, chip->wake_mask[1]); 222 regmap_write(chip->regmap, chip->int_con[1], chip->wake_mask[1]);
208 223
209 enable_irq_wake(chip->irq); 224 enable_irq_wake(chip->irq);
210 225
@@ -215,8 +230,8 @@ static int mt6397_irq_resume(struct device *dev)
215{ 230{
216 struct mt6397_chip *chip = dev_get_drvdata(dev); 231 struct mt6397_chip *chip = dev_get_drvdata(dev);
217 232
218 regmap_write(chip->regmap, MT6397_INT_CON0, chip->irq_masks_cur[0]); 233 regmap_write(chip->regmap, chip->int_con[0], chip->irq_masks_cur[0]);
219 regmap_write(chip->regmap, MT6397_INT_CON1, chip->irq_masks_cur[1]); 234 regmap_write(chip->regmap, chip->int_con[1], chip->irq_masks_cur[1]);
220 235
221 disable_irq_wake(chip->irq); 236 disable_irq_wake(chip->irq);
222 237
@@ -230,34 +245,69 @@ static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_irq_suspend,
230static int mt6397_probe(struct platform_device *pdev) 245static int mt6397_probe(struct platform_device *pdev)
231{ 246{
232 int ret; 247 int ret;
233 struct mt6397_chip *mt6397; 248 unsigned int id;
249 struct mt6397_chip *pmic;
234 250
235 mt6397 = devm_kzalloc(&pdev->dev, sizeof(*mt6397), GFP_KERNEL); 251 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
236 if (!mt6397) 252 if (!pmic)
237 return -ENOMEM; 253 return -ENOMEM;
238 254
239 mt6397->dev = &pdev->dev; 255 pmic->dev = &pdev->dev;
256
240 /* 257 /*
241 * mt6397 MFD is child device of soc pmic wrapper. 258 * mt6397 MFD is child device of soc pmic wrapper.
242 * Regmap is set from its parent. 259 * Regmap is set from its parent.
243 */ 260 */
244 mt6397->regmap = dev_get_regmap(pdev->dev.parent, NULL); 261 pmic->regmap = dev_get_regmap(pdev->dev.parent, NULL);
245 if (!mt6397->regmap) 262 if (!pmic->regmap)
246 return -ENODEV; 263 return -ENODEV;
247 264
248 platform_set_drvdata(pdev, mt6397); 265 platform_set_drvdata(pdev, pmic);
249 266
250 mt6397->irq = platform_get_irq(pdev, 0); 267 ret = regmap_read(pmic->regmap, MT6397_CID, &id);
251 if (mt6397->irq > 0) { 268 if (ret) {
252 ret = mt6397_irq_init(mt6397); 269 dev_err(pmic->dev, "Failed to read chip id: %d\n", ret);
270 goto fail_irq;
271 }
272
273 switch (id & 0xff) {
274 case MT6323_CID_CODE:
275 pmic->int_con[0] = MT6323_INT_CON0;
276 pmic->int_con[1] = MT6323_INT_CON1;
277 pmic->int_status[0] = MT6323_INT_STATUS0;
278 pmic->int_status[1] = MT6323_INT_STATUS1;
279 ret = mfd_add_devices(&pdev->dev, -1, mt6323_devs,
280 ARRAY_SIZE(mt6323_devs), NULL, 0, NULL);
281 break;
282
283 case MT6397_CID_CODE:
284 case MT6391_CID_CODE:
285 pmic->int_con[0] = MT6397_INT_CON0;
286 pmic->int_con[1] = MT6397_INT_CON1;
287 pmic->int_status[0] = MT6397_INT_STATUS0;
288 pmic->int_status[1] = MT6397_INT_STATUS1;
289 ret = mfd_add_devices(&pdev->dev, -1, mt6397_devs,
290 ARRAY_SIZE(mt6397_devs), NULL, 0, NULL);
291 break;
292
293 default:
294 dev_err(&pdev->dev, "unsupported chip: %d\n", id);
295 ret = -ENODEV;
296 break;
297 }
298
299 pmic->irq = platform_get_irq(pdev, 0);
300 if (pmic->irq > 0) {
301 ret = mt6397_irq_init(pmic);
253 if (ret) 302 if (ret)
254 return ret; 303 return ret;
255 } 304 }
256 305
257 ret = mfd_add_devices(&pdev->dev, -1, mt6397_devs, 306fail_irq:
258 ARRAY_SIZE(mt6397_devs), NULL, 0, NULL); 307 if (ret) {
259 if (ret) 308 irq_domain_remove(pmic->irq_domain);
260 dev_err(&pdev->dev, "failed to add child devices: %d\n", ret); 309 dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
310 }
261 311
262 return ret; 312 return ret;
263} 313}
@@ -271,10 +321,17 @@ static int mt6397_remove(struct platform_device *pdev)
271 321
272static const struct of_device_id mt6397_of_match[] = { 322static const struct of_device_id mt6397_of_match[] = {
273 { .compatible = "mediatek,mt6397" }, 323 { .compatible = "mediatek,mt6397" },
324 { .compatible = "mediatek,mt6323" },
274 { } 325 { }
275}; 326};
276MODULE_DEVICE_TABLE(of, mt6397_of_match); 327MODULE_DEVICE_TABLE(of, mt6397_of_match);
277 328
329static const struct platform_device_id mt6397_id[] = {
330 { "mt6397", 0 },
331 { },
332};
333MODULE_DEVICE_TABLE(platform, mt6397_id);
334
278static struct platform_driver mt6397_driver = { 335static struct platform_driver mt6397_driver = {
279 .probe = mt6397_probe, 336 .probe = mt6397_probe,
280 .remove = mt6397_remove, 337 .remove = mt6397_remove,
@@ -283,6 +340,7 @@ static struct platform_driver mt6397_driver = {
283 .of_match_table = of_match_ptr(mt6397_of_match), 340 .of_match_table = of_match_ptr(mt6397_of_match),
284 .pm = &mt6397_pm_ops, 341 .pm = &mt6397_pm_ops,
285 }, 342 },
343 .id_table = mt6397_id,
286}; 344};
287 345
288module_platform_driver(mt6397_driver); 346module_platform_driver(mt6397_driver);
@@ -290,4 +348,3 @@ module_platform_driver(mt6397_driver);
290MODULE_AUTHOR("Flora Fu, MediaTek"); 348MODULE_AUTHOR("Flora Fu, MediaTek");
291MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC"); 349MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
292MODULE_LICENSE("GPL"); 350MODULE_LICENSE("GPL");
293MODULE_ALIAS("platform:mt6397");
diff --git a/drivers/mfd/rc5t583.c b/drivers/mfd/rc5t583.c
index e10f02f5d551..fc2b2d93f354 100644
--- a/drivers/mfd/rc5t583.c
+++ b/drivers/mfd/rc5t583.c
@@ -241,8 +241,8 @@ static const struct regmap_config rc5t583_regmap_config = {
241 .reg_bits = 8, 241 .reg_bits = 8,
242 .val_bits = 8, 242 .val_bits = 8,
243 .volatile_reg = volatile_reg, 243 .volatile_reg = volatile_reg,
244 .max_register = RC5T583_MAX_REGS, 244 .max_register = RC5T583_MAX_REG,
245 .num_reg_defaults_raw = RC5T583_MAX_REGS, 245 .num_reg_defaults_raw = RC5T583_NUM_REGS,
246 .cache_type = REGCACHE_RBTREE, 246 .cache_type = REGCACHE_RBTREE,
247}; 247};
248 248
diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c
index 8222e374e4b1..fb8f9e8b75df 100644
--- a/drivers/mfd/stmpe.c
+++ b/drivers/mfd/stmpe.c
@@ -334,6 +334,31 @@ static const struct mfd_cell stmpe_keypad_cell = {
334}; 334};
335 335
336/* 336/*
337 * PWM (1601, 2401, 2403)
338 */
339static struct resource stmpe_pwm_resources[] = {
340 {
341 .name = "PWM0",
342 .flags = IORESOURCE_IRQ,
343 },
344 {
345 .name = "PWM1",
346 .flags = IORESOURCE_IRQ,
347 },
348 {
349 .name = "PWM2",
350 .flags = IORESOURCE_IRQ,
351 },
352};
353
354static const struct mfd_cell stmpe_pwm_cell = {
355 .name = "stmpe-pwm",
356 .of_compatible = "st,stmpe-pwm",
357 .resources = stmpe_pwm_resources,
358 .num_resources = ARRAY_SIZE(stmpe_pwm_resources),
359};
360
361/*
337 * STMPE801 362 * STMPE801
338 */ 363 */
339static const u8 stmpe801_regs[] = { 364static const u8 stmpe801_regs[] = {
@@ -537,6 +562,11 @@ static struct stmpe_variant_block stmpe1601_blocks[] = {
537 .irq = STMPE1601_IRQ_KEYPAD, 562 .irq = STMPE1601_IRQ_KEYPAD,
538 .block = STMPE_BLOCK_KEYPAD, 563 .block = STMPE_BLOCK_KEYPAD,
539 }, 564 },
565 {
566 .cell = &stmpe_pwm_cell,
567 .irq = STMPE1601_IRQ_PWM0,
568 .block = STMPE_BLOCK_PWM,
569 },
540}; 570};
541 571
542/* supported autosleep timeout delay (in msecs) */ 572/* supported autosleep timeout delay (in msecs) */
@@ -771,6 +801,11 @@ static struct stmpe_variant_block stmpe24xx_blocks[] = {
771 .irq = STMPE24XX_IRQ_KEYPAD, 801 .irq = STMPE24XX_IRQ_KEYPAD,
772 .block = STMPE_BLOCK_KEYPAD, 802 .block = STMPE_BLOCK_KEYPAD,
773 }, 803 },
804 {
805 .cell = &stmpe_pwm_cell,
806 .irq = STMPE24XX_IRQ_PWM0,
807 .block = STMPE_BLOCK_PWM,
808 },
774}; 809};
775 810
776static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, 811static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
index b7aabeefab07..2f2225e845ef 100644
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -36,7 +36,7 @@ struct syscon {
36 struct list_head list; 36 struct list_head list;
37}; 37};
38 38
39static struct regmap_config syscon_regmap_config = { 39static const struct regmap_config syscon_regmap_config = {
40 .reg_bits = 32, 40 .reg_bits = 32,
41 .val_bits = 32, 41 .val_bits = 32,
42 .reg_stride = 4, 42 .reg_stride = 4,
@@ -50,6 +50,7 @@ static struct syscon *of_syscon_register(struct device_node *np)
50 u32 reg_io_width; 50 u32 reg_io_width;
51 int ret; 51 int ret;
52 struct regmap_config syscon_config = syscon_regmap_config; 52 struct regmap_config syscon_config = syscon_regmap_config;
53 struct resource res;
53 54
54 if (!of_device_is_compatible(np, "syscon")) 55 if (!of_device_is_compatible(np, "syscon"))
55 return ERR_PTR(-EINVAL); 56 return ERR_PTR(-EINVAL);
@@ -58,7 +59,12 @@ static struct syscon *of_syscon_register(struct device_node *np)
58 if (!syscon) 59 if (!syscon)
59 return ERR_PTR(-ENOMEM); 60 return ERR_PTR(-ENOMEM);
60 61
61 base = of_iomap(np, 0); 62 if (of_address_to_resource(np, 0, &res)) {
63 ret = -ENOMEM;
64 goto err_map;
65 }
66
67 base = ioremap(res.start, resource_size(&res));
62 if (!base) { 68 if (!base) {
63 ret = -ENOMEM; 69 ret = -ENOMEM;
64 goto err_map; 70 goto err_map;
@@ -81,6 +87,7 @@ static struct syscon *of_syscon_register(struct device_node *np)
81 87
82 syscon_config.reg_stride = reg_io_width; 88 syscon_config.reg_stride = reg_io_width;
83 syscon_config.val_bits = reg_io_width * 8; 89 syscon_config.val_bits = reg_io_width * 8;
90 syscon_config.max_register = resource_size(&res) - reg_io_width;
84 91
85 regmap = regmap_init_mmio(NULL, base, &syscon_config); 92 regmap = regmap_init_mmio(NULL, base, &syscon_config);
86 if (IS_ERR(regmap)) { 93 if (IS_ERR(regmap)) {
@@ -192,6 +199,7 @@ static int syscon_probe(struct platform_device *pdev)
192 struct device *dev = &pdev->dev; 199 struct device *dev = &pdev->dev;
193 struct syscon_platform_data *pdata = dev_get_platdata(dev); 200 struct syscon_platform_data *pdata = dev_get_platdata(dev);
194 struct syscon *syscon; 201 struct syscon *syscon;
202 struct regmap_config syscon_config = syscon_regmap_config;
195 struct resource *res; 203 struct resource *res;
196 void __iomem *base; 204 void __iomem *base;
197 205
@@ -207,11 +215,10 @@ static int syscon_probe(struct platform_device *pdev)
207 if (!base) 215 if (!base)
208 return -ENOMEM; 216 return -ENOMEM;
209 217
210 syscon_regmap_config.max_register = res->end - res->start - 3; 218 syscon_config.max_register = res->end - res->start - 3;
211 if (pdata) 219 if (pdata)
212 syscon_regmap_config.name = pdata->label; 220 syscon_config.name = pdata->label;
213 syscon->regmap = devm_regmap_init_mmio(dev, base, 221 syscon->regmap = devm_regmap_init_mmio(dev, base, &syscon_config);
214 &syscon_regmap_config);
215 if (IS_ERR(syscon->regmap)) { 222 if (IS_ERR(syscon->regmap)) {
216 dev_err(dev, "regmap init failed\n"); 223 dev_err(dev, "regmap init failed\n");
217 return PTR_ERR(syscon->regmap); 224 return PTR_ERR(syscon->regmap);
diff --git a/drivers/mfd/tps65010.c b/drivers/mfd/tps65010.c
index 83e615ed100a..495e4518fc29 100644
--- a/drivers/mfd/tps65010.c
+++ b/drivers/mfd/tps65010.c
@@ -1059,26 +1059,7 @@ EXPORT_SYMBOL(tps65013_set_low_pwr);
1059 1059
1060static int __init tps_init(void) 1060static int __init tps_init(void)
1061{ 1061{
1062 u32 tries = 3; 1062 return i2c_add_driver(&tps65010_driver);
1063 int status = -ENODEV;
1064
1065 printk(KERN_INFO "%s: version %s\n", DRIVER_NAME, DRIVER_VERSION);
1066
1067 /* some boards have startup glitches */
1068 while (tries--) {
1069 status = i2c_add_driver(&tps65010_driver);
1070 if (the_tps)
1071 break;
1072 i2c_del_driver(&tps65010_driver);
1073 if (!tries) {
1074 printk(KERN_ERR "%s: no chip?\n", DRIVER_NAME);
1075 return -ENODEV;
1076 }
1077 pr_debug("%s: re-probe ...\n", DRIVER_NAME);
1078 msleep(10);
1079 }
1080
1081 return status;
1082} 1063}
1083/* NOTE: this MUST be initialized before the other parts of the system 1064/* NOTE: this MUST be initialized before the other parts of the system
1084 * that rely on it ... but after the i2c bus on which this relies. 1065 * that rely on it ... but after the i2c bus on which this relies.
diff --git a/drivers/mfd/tps65086.c b/drivers/mfd/tps65086.c
new file mode 100644
index 000000000000..43119a6867fe
--- /dev/null
+++ b/drivers/mfd/tps65086.c
@@ -0,0 +1,149 @@
1/*
2 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
3 * Andrew F. Davis <afd@ti.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10 * kind, whether expressed or implied; without even the implied warranty
11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License version 2 for more details.
13 *
14 * Based on the TPS65912 driver
15 */
16
17#include <linux/i2c.h>
18#include <linux/interrupt.h>
19#include <linux/mfd/core.h>
20#include <linux/module.h>
21
22#include <linux/mfd/tps65086.h>
23
24static const struct mfd_cell tps65086_cells[] = {
25 { .name = "tps65086-regulator", },
26 { .name = "tps65086-gpio", },
27};
28
29static const struct regmap_range tps65086_yes_ranges[] = {
30 regmap_reg_range(TPS65086_IRQ, TPS65086_IRQ),
31 regmap_reg_range(TPS65086_PMICSTAT, TPS65086_SHUTDNSRC),
32 regmap_reg_range(TPS65086_GPOCTRL, TPS65086_GPOCTRL),
33 regmap_reg_range(TPS65086_PG_STATUS1, TPS65086_OC_STATUS),
34};
35
36static const struct regmap_access_table tps65086_volatile_table = {
37 .yes_ranges = tps65086_yes_ranges,
38 .n_yes_ranges = ARRAY_SIZE(tps65086_yes_ranges),
39};
40
41static const struct regmap_config tps65086_regmap_config = {
42 .reg_bits = 8,
43 .val_bits = 8,
44 .cache_type = REGCACHE_RBTREE,
45 .volatile_table = &tps65086_volatile_table,
46};
47
48static const struct regmap_irq tps65086_irqs[] = {
49 REGMAP_IRQ_REG(TPS65086_IRQ_DIETEMP, 0, TPS65086_IRQ_DIETEMP_MASK),
50 REGMAP_IRQ_REG(TPS65086_IRQ_SHUTDN, 0, TPS65086_IRQ_SHUTDN_MASK),
51 REGMAP_IRQ_REG(TPS65086_IRQ_FAULT, 0, TPS65086_IRQ_FAULT_MASK),
52};
53
54static struct regmap_irq_chip tps65086_irq_chip = {
55 .name = "tps65086",
56 .status_base = TPS65086_IRQ,
57 .mask_base = TPS65086_IRQ_MASK,
58 .ack_base = TPS65086_IRQ,
59 .init_ack_masked = true,
60 .num_regs = 1,
61 .irqs = tps65086_irqs,
62 .num_irqs = ARRAY_SIZE(tps65086_irqs),
63};
64
65static const struct of_device_id tps65086_of_match_table[] = {
66 { .compatible = "ti,tps65086", },
67 { /* sentinel */ }
68};
69MODULE_DEVICE_TABLE(of, tps65086_of_match_table);
70
71static int tps65086_probe(struct i2c_client *client,
72 const struct i2c_device_id *ids)
73{
74 struct tps65086 *tps;
75 unsigned int version;
76 int ret;
77
78 tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
79 if (!tps)
80 return -ENOMEM;
81
82 i2c_set_clientdata(client, tps);
83 tps->dev = &client->dev;
84 tps->irq = client->irq;
85
86 tps->regmap = devm_regmap_init_i2c(client, &tps65086_regmap_config);
87 if (IS_ERR(tps->regmap)) {
88 dev_err(tps->dev, "Failed to initialize register map\n");
89 return PTR_ERR(tps->regmap);
90 }
91
92 ret = regmap_read(tps->regmap, TPS65086_DEVICEID, &version);
93 if (ret) {
94 dev_err(tps->dev, "Failed to read revision register\n");
95 return ret;
96 }
97
98 dev_info(tps->dev, "Device: TPS65086%01lX, OTP: %c, Rev: %ld\n",
99 (version & TPS65086_DEVICEID_PART_MASK),
100 (char)((version & TPS65086_DEVICEID_OTP_MASK) >> 4) + 'A',
101 (version & TPS65086_DEVICEID_REV_MASK) >> 6);
102
103 ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0,
104 &tps65086_irq_chip, &tps->irq_data);
105 if (ret) {
106 dev_err(tps->dev, "Failed to register IRQ chip\n");
107 return ret;
108 }
109
110 ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65086_cells,
111 ARRAY_SIZE(tps65086_cells), NULL, 0,
112 regmap_irq_get_domain(tps->irq_data));
113 if (ret) {
114 regmap_del_irq_chip(tps->irq, tps->irq_data);
115 return ret;
116 }
117
118 return 0;
119}
120
121static int tps65086_remove(struct i2c_client *client)
122{
123 struct tps65086 *tps = i2c_get_clientdata(client);
124
125 regmap_del_irq_chip(tps->irq, tps->irq_data);
126
127 return 0;
128}
129
130static const struct i2c_device_id tps65086_id_table[] = {
131 { "tps65086", 0 },
132 { /* sentinel */ }
133};
134MODULE_DEVICE_TABLE(i2c, tps65086_id_table);
135
136static struct i2c_driver tps65086_driver = {
137 .driver = {
138 .name = "tps65086",
139 .of_match_table = tps65086_of_match_table,
140 },
141 .probe = tps65086_probe,
142 .remove = tps65086_remove,
143 .id_table = tps65086_id_table,
144};
145module_i2c_driver(tps65086_driver);
146
147MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
148MODULE_DESCRIPTION("TPS65086 PMIC Driver");
149MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c
index f88085ad9772..d7ec318c40c3 100644
--- a/drivers/mfd/tps65090.c
+++ b/drivers/mfd/tps65090.c
@@ -30,7 +30,6 @@
30#include <linux/err.h> 30#include <linux/err.h>
31 31
32#define NUM_INT_REG 2 32#define NUM_INT_REG 2
33#define TOTAL_NUM_REG 0x18
34 33
35#define TPS65090_INT1_MASK_VAC_STATUS_CHANGE 1 34#define TPS65090_INT1_MASK_VAC_STATUS_CHANGE 1
36#define TPS65090_INT1_MASK_VSYS_STATUS_CHANGE 2 35#define TPS65090_INT1_MASK_VSYS_STATUS_CHANGE 2
@@ -161,8 +160,8 @@ static bool is_volatile_reg(struct device *dev, unsigned int reg)
161static const struct regmap_config tps65090_regmap_config = { 160static const struct regmap_config tps65090_regmap_config = {
162 .reg_bits = 8, 161 .reg_bits = 8,
163 .val_bits = 8, 162 .val_bits = 8,
164 .max_register = TOTAL_NUM_REG, 163 .max_register = TPS65090_MAX_REG,
165 .num_reg_defaults_raw = TOTAL_NUM_REG, 164 .num_reg_defaults_raw = TPS65090_NUM_REGS,
166 .cache_type = REGCACHE_RBTREE, 165 .cache_type = REGCACHE_RBTREE,
167 .volatile_reg = is_volatile_reg, 166 .volatile_reg = is_volatile_reg,
168}; 167};
diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c
index 0386eaf6be32..ab8b23b5bd22 100644
--- a/drivers/mfd/wm5102-tables.c
+++ b/drivers/mfd/wm5102-tables.c
@@ -297,7 +297,6 @@ static const struct reg_default wm5102_reg_default[] = {
297 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ 297 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */
298 { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ 298 { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */
299 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ 299 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */
300 { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */
301 { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ 300 { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */
302 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ 301 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */
303 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ 302 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */
@@ -314,7 +313,6 @@ static const struct reg_default wm5102_reg_default[] = {
314 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ 313 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */
315 { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ 314 { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */
316 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ 315 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */
317 { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */
318 { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ 316 { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */
319 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ 317 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */
320 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ 318 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */
@@ -338,7 +336,7 @@ static const struct reg_default wm5102_reg_default[] = {
338 { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ 336 { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */
339 { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ 337 { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */
340 { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ 338 { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */
341 { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ 339 { 0x000002A7, 0x2C37 }, /* R679 - Mic Detect Level 2 */
342 { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ 340 { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */
343 { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */ 341 { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */
344 { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ 342 { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */
@@ -402,7 +400,7 @@ static const struct reg_default wm5102_reg_default[] = {
402 { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ 400 { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */
403 { 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */ 401 { 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */
404 { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ 402 { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */
405 { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ 403 { 0x00000440, 0x0FFF }, /* R1088 - DRE Enable */
406 { 0x00000442, 0x3F0A }, /* R1090 - DRE Control 2 */ 404 { 0x00000442, 0x3F0A }, /* R1090 - DRE Control 2 */
407 { 0x00000443, 0xDC1F }, /* R1090 - DRE Control 3 */ 405 { 0x00000443, 0xDC1F }, /* R1090 - DRE Control 3 */
408 { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ 406 { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */
@@ -863,7 +861,7 @@ static const struct reg_default wm5102_reg_default[] = {
863 { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ 861 { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */
864 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ 862 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */
865 { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ 863 { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */
866 { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ 864 { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */
867 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ 865 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */
868 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ 866 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */
869 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ 867 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */
@@ -984,7 +982,7 @@ static const struct reg_default wm5102_reg_default[] = {
984 { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ 982 { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */
985 { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ 983 { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */
986 { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ 984 { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */
987 { 0x00000EE3, 0x0400 }, /* R3811 - ASRC_RATE2 */ 985 { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */
988 { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ 986 { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */
989 { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */ 987 { 0x00000EF1, 0x0000 }, /* R3825 - ISRC 1 CTRL 2 */
990 { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ 988 { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */
@@ -1062,8 +1060,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
1062 case ARIZONA_FLL1_CONTROL_4: 1060 case ARIZONA_FLL1_CONTROL_4:
1063 case ARIZONA_FLL1_CONTROL_5: 1061 case ARIZONA_FLL1_CONTROL_5:
1064 case ARIZONA_FLL1_CONTROL_6: 1062 case ARIZONA_FLL1_CONTROL_6:
1065 case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
1066 case ARIZONA_FLL1_NCO_TEST_0:
1067 case ARIZONA_FLL1_CONTROL_7: 1063 case ARIZONA_FLL1_CONTROL_7:
1068 case ARIZONA_FLL1_SYNCHRONISER_1: 1064 case ARIZONA_FLL1_SYNCHRONISER_1:
1069 case ARIZONA_FLL1_SYNCHRONISER_2: 1065 case ARIZONA_FLL1_SYNCHRONISER_2:
@@ -1080,8 +1076,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
1080 case ARIZONA_FLL2_CONTROL_4: 1076 case ARIZONA_FLL2_CONTROL_4:
1081 case ARIZONA_FLL2_CONTROL_5: 1077 case ARIZONA_FLL2_CONTROL_5:
1082 case ARIZONA_FLL2_CONTROL_6: 1078 case ARIZONA_FLL2_CONTROL_6:
1083 case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
1084 case ARIZONA_FLL2_NCO_TEST_0:
1085 case ARIZONA_FLL2_CONTROL_7: 1079 case ARIZONA_FLL2_CONTROL_7:
1086 case ARIZONA_FLL2_SYNCHRONISER_1: 1080 case ARIZONA_FLL2_SYNCHRONISER_1:
1087 case ARIZONA_FLL2_SYNCHRONISER_2: 1081 case ARIZONA_FLL2_SYNCHRONISER_2:
@@ -1849,8 +1843,6 @@ static bool wm5102_volatile_register(struct device *dev, unsigned int reg)
1849 case ARIZONA_HAPTICS_STATUS: 1843 case ARIZONA_HAPTICS_STATUS:
1850 case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: 1844 case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS:
1851 case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: 1845 case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS:
1852 case ARIZONA_FLL1_NCO_TEST_0:
1853 case ARIZONA_FLL2_NCO_TEST_0:
1854 case ARIZONA_DAC_COMP_1: 1846 case ARIZONA_DAC_COMP_1:
1855 case ARIZONA_DAC_COMP_2: 1847 case ARIZONA_DAC_COMP_2:
1856 case ARIZONA_DAC_COMP_3: 1848 case ARIZONA_DAC_COMP_3:
diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c
index c18e11f42b3f..8e74e71507e7 100644
--- a/drivers/mfd/wm5110-tables.c
+++ b/drivers/mfd/wm5110-tables.c
@@ -676,8 +676,8 @@ static const struct reg_default wm5110_reg_default[] = {
676 { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */ 676 { 0x00000008, 0x0019 }, /* R8 - Ctrl IF SPI CFG 1 */
677 { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ 677 { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */
678 { 0x0000000A, 0x0001 }, /* R10 - Ctrl IF I2C2 CFG 1 */ 678 { 0x0000000A, 0x0001 }, /* R10 - Ctrl IF I2C2 CFG 1 */
679 { 0x0000000B, 0x0036 }, /* R11 - Ctrl IF I2C1 CFG 2 */ 679 { 0x0000000B, 0x001A }, /* R11 - Ctrl IF I2C1 CFG 2 */
680 { 0x0000000C, 0x0036 }, /* R12 - Ctrl IF I2C2 CFG 2 */ 680 { 0x0000000C, 0x001A }, /* R12 - Ctrl IF I2C2 CFG 2 */
681 { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ 681 { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */
682 { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ 682 { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */
683 { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ 683 { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */
@@ -723,14 +723,12 @@ static const struct reg_default wm5110_reg_default[] = {
723 { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */ 723 { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */
724 { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */ 724 { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */
725 { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */ 725 { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */
726 { 0x00000171, 0x0000 }, /* R369 - FLL1 Control 1 */ 726 { 0x00000171, 0x0002 }, /* R369 - FLL1 Control 1 */
727 { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */ 727 { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */
728 { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */ 728 { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */
729 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ 729 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */
730 { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */ 730 { 0x00000175, 0x0006 }, /* R373 - FLL1 Control 5 */
731 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ 731 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */
732 { 0x00000177, 0x0281 }, /* R375 - FLL1 Loop Filter Test 1 */
733 { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */
734 { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */ 732 { 0x00000179, 0x0000 }, /* R376 - FLL1 Control 7 */
735 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ 733 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */
736 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ 734 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */
@@ -740,15 +738,13 @@ static const struct reg_default wm5110_reg_default[] = {
740 { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ 738 { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */
741 { 0x00000187, 0x0001 }, /* R390 - FLL1 Synchroniser 7 */ 739 { 0x00000187, 0x0001 }, /* R390 - FLL1 Synchroniser 7 */
742 { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ 740 { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */
743 { 0x0000018A, 0x0004 }, /* R394 - FLL1 GPIO Clock */ 741 { 0x0000018A, 0x000C }, /* R394 - FLL1 GPIO Clock */
744 { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */ 742 { 0x00000191, 0x0002 }, /* R401 - FLL2 Control 1 */
745 { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ 743 { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */
746 { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ 744 { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */
747 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ 745 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */
748 { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */ 746 { 0x00000195, 0x000C }, /* R405 - FLL2 Control 5 */
749 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ 747 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */
750 { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */
751 { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */
752 { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */ 748 { 0x00000199, 0x0000 }, /* R408 - FLL2 Control 7 */
753 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ 749 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */
754 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ 750 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */
@@ -758,7 +754,7 @@ static const struct reg_default wm5110_reg_default[] = {
758 { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ 754 { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */
759 { 0x000001A7, 0x0001 }, /* R422 - FLL2 Synchroniser 7 */ 755 { 0x000001A7, 0x0001 }, /* R422 - FLL2 Synchroniser 7 */
760 { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ 756 { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */
761 { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ 757 { 0x000001AA, 0x000C }, /* R426 - FLL2 GPIO Clock */
762 { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ 758 { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */
763 { 0x00000210, 0x0184 }, /* R528 - LDO1 Control 1 */ 759 { 0x00000210, 0x0184 }, /* R528 - LDO1 Control 1 */
764 { 0x00000213, 0x03E4 }, /* R531 - LDO2 Control 1 */ 760 { 0x00000213, 0x03E4 }, /* R531 - LDO2 Control 1 */
@@ -771,9 +767,9 @@ static const struct reg_default wm5110_reg_default[] = {
771 { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ 767 { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */
772 { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ 768 { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */
773 { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ 769 { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */
774 { 0x000002A7, 0x372C }, /* R679 - Mic Detect Level 2 */ 770 { 0x000002A7, 0x2C37 }, /* R679 - Mic Detect Level 2 */
775 { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ 771 { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */
776 { 0x000002A9, 0x300A }, /* R681 - Mic Detect Level 4 */ 772 { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */
777 { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */ 773 { 0x000002C3, 0x0000 }, /* R707 - Mic noise mix control 1 */
778 { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ 774 { 0x000002CB, 0x0000 }, /* R715 - Isolation control */
779 { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ 775 { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */
@@ -810,53 +806,53 @@ static const struct reg_default wm5110_reg_default[] = {
810 { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */ 806 { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */
811 { 0x00000410, 0x0080 }, /* R1040 - Output Path Config 1L */ 807 { 0x00000410, 0x0080 }, /* R1040 - Output Path Config 1L */
812 { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ 808 { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */
813 { 0x00000412, 0x0080 }, /* R1042 - DAC Volume Limit 1L */ 809 { 0x00000412, 0x0081 }, /* R1042 - DAC Volume Limit 1L */
814 { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ 810 { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */
815 { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */ 811 { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */
816 { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ 812 { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */
817 { 0x00000416, 0x0080 }, /* R1046 - DAC Volume Limit 1R */ 813 { 0x00000416, 0x0081 }, /* R1046 - DAC Volume Limit 1R */
818 { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ 814 { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */
819 { 0x00000418, 0x0080 }, /* R1048 - Output Path Config 2L */ 815 { 0x00000418, 0x0080 }, /* R1048 - Output Path Config 2L */
820 { 0x00000419, 0x0180 }, /* R1049 - DAC Digital Volume 2L */ 816 { 0x00000419, 0x0180 }, /* R1049 - DAC Digital Volume 2L */
821 { 0x0000041A, 0x0080 }, /* R1050 - DAC Volume Limit 2L */ 817 { 0x0000041A, 0x0081 }, /* R1050 - DAC Volume Limit 2L */
822 { 0x0000041B, 0x0004 }, /* R1051 - Noise Gate Select 2L */ 818 { 0x0000041B, 0x0004 }, /* R1051 - Noise Gate Select 2L */
823 { 0x0000041C, 0x0080 }, /* R1052 - Output Path Config 2R */ 819 { 0x0000041C, 0x0080 }, /* R1052 - Output Path Config 2R */
824 { 0x0000041D, 0x0180 }, /* R1053 - DAC Digital Volume 2R */ 820 { 0x0000041D, 0x0180 }, /* R1053 - DAC Digital Volume 2R */
825 { 0x0000041E, 0x0080 }, /* R1054 - DAC Volume Limit 2R */ 821 { 0x0000041E, 0x0081 }, /* R1054 - DAC Volume Limit 2R */
826 { 0x0000041F, 0x0008 }, /* R1055 - Noise Gate Select 2R */ 822 { 0x0000041F, 0x0008 }, /* R1055 - Noise Gate Select 2R */
827 { 0x00000420, 0x0080 }, /* R1056 - Output Path Config 3L */ 823 { 0x00000420, 0x0080 }, /* R1056 - Output Path Config 3L */
828 { 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */ 824 { 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */
829 { 0x00000422, 0x0080 }, /* R1058 - DAC Volume Limit 3L */ 825 { 0x00000422, 0x0081 }, /* R1058 - DAC Volume Limit 3L */
830 { 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */ 826 { 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */
831 { 0x00000424, 0x0080 }, /* R1060 - Output Path Config 3R */ 827 { 0x00000424, 0x0080 }, /* R1060 - Output Path Config 3R */
832 { 0x00000425, 0x0180 }, /* R1061 - DAC Digital Volume 3R */ 828 { 0x00000425, 0x0180 }, /* R1061 - DAC Digital Volume 3R */
833 { 0x00000426, 0x0080 }, /* R1062 - DAC Volume Limit 3R */ 829 { 0x00000426, 0x0081 }, /* R1062 - DAC Volume Limit 3R */
834 { 0x00000427, 0x0020 }, /* R1063 - Noise Gate Select 3R */ 830 { 0x00000427, 0x0020 }, /* R1063 - Noise Gate Select 3R */
835 { 0x00000428, 0x0000 }, /* R1064 - Output Path Config 4L */ 831 { 0x00000428, 0x0000 }, /* R1064 - Output Path Config 4L */
836 { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */ 832 { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */
837 { 0x0000042A, 0x0080 }, /* R1066 - Out Volume 4L */ 833 { 0x0000042A, 0x0081 }, /* R1066 - Out Volume 4L */
838 { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */ 834 { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */
839 { 0x0000042C, 0x0000 }, /* R1068 - Output Path Config 4R */ 835 { 0x0000042C, 0x0000 }, /* R1068 - Output Path Config 4R */
840 { 0x0000042D, 0x0180 }, /* R1069 - DAC Digital Volume 4R */ 836 { 0x0000042D, 0x0180 }, /* R1069 - DAC Digital Volume 4R */
841 { 0x0000042E, 0x0080 }, /* R1070 - Out Volume 4R */ 837 { 0x0000042E, 0x0081 }, /* R1070 - Out Volume 4R */
842 { 0x0000042F, 0x0080 }, /* R1071 - Noise Gate Select 4R */ 838 { 0x0000042F, 0x0080 }, /* R1071 - Noise Gate Select 4R */
843 { 0x00000430, 0x0000 }, /* R1072 - Output Path Config 5L */ 839 { 0x00000430, 0x0000 }, /* R1072 - Output Path Config 5L */
844 { 0x00000431, 0x0180 }, /* R1073 - DAC Digital Volume 5L */ 840 { 0x00000431, 0x0180 }, /* R1073 - DAC Digital Volume 5L */
845 { 0x00000432, 0x0080 }, /* R1074 - DAC Volume Limit 5L */ 841 { 0x00000432, 0x0081 }, /* R1074 - DAC Volume Limit 5L */
846 { 0x00000433, 0x0100 }, /* R1075 - Noise Gate Select 5L */ 842 { 0x00000433, 0x0100 }, /* R1075 - Noise Gate Select 5L */
847 { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ 843 { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */
848 { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ 844 { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */
849 { 0x00000436, 0x0080 }, /* R1078 - DAC Volume Limit 5R */ 845 { 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */
850 { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ 846 { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */
851 { 0x00000438, 0x0000 }, /* R1080 - Output Path Config 6L */ 847 { 0x00000438, 0x0000 }, /* R1080 - Output Path Config 6L */
852 { 0x00000439, 0x0180 }, /* R1081 - DAC Digital Volume 6L */ 848 { 0x00000439, 0x0180 }, /* R1081 - DAC Digital Volume 6L */
853 { 0x0000043A, 0x0080 }, /* R1082 - DAC Volume Limit 6L */ 849 { 0x0000043A, 0x0081 }, /* R1082 - DAC Volume Limit 6L */
854 { 0x0000043B, 0x0400 }, /* R1083 - Noise Gate Select 6L */ 850 { 0x0000043B, 0x0400 }, /* R1083 - Noise Gate Select 6L */
855 { 0x0000043C, 0x0000 }, /* R1084 - Output Path Config 6R */ 851 { 0x0000043C, 0x0000 }, /* R1084 - Output Path Config 6R */
856 { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */ 852 { 0x0000043D, 0x0180 }, /* R1085 - DAC Digital Volume 6R */
857 { 0x0000043E, 0x0080 }, /* R1086 - DAC Volume Limit 6R */ 853 { 0x0000043E, 0x0081 }, /* R1086 - DAC Volume Limit 6R */
858 { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */ 854 { 0x0000043F, 0x0800 }, /* R1087 - Noise Gate Select 6R */
859 { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ 855 { 0x00000440, 0x003F }, /* R1088 - DRE Enable */
860 { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ 856 { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */
861 { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ 857 { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */
862 { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ 858 { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */
@@ -864,8 +860,8 @@ static const struct reg_default wm5110_reg_default[] = {
864 { 0x00000492, 0x0069 }, /* R1170 - PDM SPK2 CTRL 1 */ 860 { 0x00000492, 0x0069 }, /* R1170 - PDM SPK2 CTRL 1 */
865 { 0x00000493, 0x0000 }, /* R1171 - PDM SPK2 CTRL 2 */ 861 { 0x00000493, 0x0000 }, /* R1171 - PDM SPK2 CTRL 2 */
866 { 0x000004A0, 0x3480 }, /* R1184 - HP1 Short Circuit Ctrl */ 862 { 0x000004A0, 0x3480 }, /* R1184 - HP1 Short Circuit Ctrl */
867 { 0x000004A1, 0x3480 }, /* R1185 - HP2 Short Circuit Ctrl */ 863 { 0x000004A1, 0x3400 }, /* R1185 - HP2 Short Circuit Ctrl */
868 { 0x000004A2, 0x3480 }, /* R1186 - HP3 Short Circuit Ctrl */ 864 { 0x000004A2, 0x3400 }, /* R1186 - HP3 Short Circuit Ctrl */
869 { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ 865 { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */
870 { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ 866 { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */
871 { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ 867 { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */
@@ -1483,23 +1479,23 @@ static const struct reg_default wm5110_reg_default[] = {
1483 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ 1479 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */
1484 { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ 1480 { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */
1485 { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ 1481 { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */
1486 { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ 1482 { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */
1487 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ 1483 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */
1488 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ 1484 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */
1489 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ 1485 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */
1490 { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */ 1486 { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */
1491 { 0x00000C30, 0x8282 }, /* R3120 - Misc Pad Ctrl 7 */ 1487 { 0x00000C30, 0x0404 }, /* R3120 - Misc Pad Ctrl 7 */
1492 { 0x00000C31, 0x0082 }, /* R3121 - Misc Pad Ctrl 8 */ 1488 { 0x00000C31, 0x0004 }, /* R3121 - Misc Pad Ctrl 8 */
1493 { 0x00000C32, 0x8282 }, /* R3122 - Misc Pad Ctrl 9 */ 1489 { 0x00000C32, 0x0404 }, /* R3122 - Misc Pad Ctrl 9 */
1494 { 0x00000C33, 0x8282 }, /* R3123 - Misc Pad Ctrl 10 */ 1490 { 0x00000C33, 0x0404 }, /* R3123 - Misc Pad Ctrl 10 */
1495 { 0x00000C34, 0x8282 }, /* R3124 - Misc Pad Ctrl 11 */ 1491 { 0x00000C34, 0x0404 }, /* R3124 - Misc Pad Ctrl 11 */
1496 { 0x00000C35, 0x8282 }, /* R3125 - Misc Pad Ctrl 12 */ 1492 { 0x00000C35, 0x0404 }, /* R3125 - Misc Pad Ctrl 12 */
1497 { 0x00000C36, 0x8282 }, /* R3126 - Misc Pad Ctrl 13 */ 1493 { 0x00000C36, 0x0404 }, /* R3126 - Misc Pad Ctrl 13 */
1498 { 0x00000C37, 0x8282 }, /* R3127 - Misc Pad Ctrl 14 */ 1494 { 0x00000C37, 0x0404 }, /* R3127 - Misc Pad Ctrl 14 */
1499 { 0x00000C38, 0x8282 }, /* R3128 - Misc Pad Ctrl 15 */ 1495 { 0x00000C38, 0x0004 }, /* R3128 - Misc Pad Ctrl 15 */
1500 { 0x00000C39, 0x8282 }, /* R3129 - Misc Pad Ctrl 16 */ 1496 { 0x00000C39, 0x0404 }, /* R3129 - Misc Pad Ctrl 16 */
1501 { 0x00000C3A, 0x8282 }, /* R3130 - Misc Pad Ctrl 17 */ 1497 { 0x00000C3A, 0x0404 }, /* R3130 - Misc Pad Ctrl 17 */
1502 { 0x00000C3B, 0x8282 }, /* R3131 - Misc Pad Ctrl 18 */ 1498 { 0x00000C3B, 0x0404 }, /* R3131 - Misc Pad Ctrl 18 */
1503 { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */ 1499 { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */
1504 { 0x00000D09, 0xFFFF }, /* R3337 - Interrupt Status 2 Mask */ 1500 { 0x00000D09, 0xFFFF }, /* R3337 - Interrupt Status 2 Mask */
1505 { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */ 1501 { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */
@@ -1641,7 +1637,7 @@ static const struct reg_default wm5110_reg_default[] = {
1641 { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */ 1637 { 0x00000F0D, 0x0000 }, /* R3853 - ANC Coefficient */
1642 { 0x00000F0E, 0x0000 }, /* R3854 - ANC Coefficient */ 1638 { 0x00000F0E, 0x0000 }, /* R3854 - ANC Coefficient */
1643 { 0x00000F0F, 0x0000 }, /* R3855 - ANC Coefficient */ 1639 { 0x00000F0F, 0x0000 }, /* R3855 - ANC Coefficient */
1644 { 0x00000F10, 0x0000 }, /* R3856 - ANC Coefficient */ 1640 { 0x00000F10, 0x0001 }, /* R3856 - ANC Coefficient */
1645 { 0x00000F11, 0x0000 }, /* R3857 - ANC Coefficient */ 1641 { 0x00000F11, 0x0000 }, /* R3857 - ANC Coefficient */
1646 { 0x00000F12, 0x0000 }, /* R3858 - ANC Coefficient */ 1642 { 0x00000F12, 0x0000 }, /* R3858 - ANC Coefficient */
1647 { 0x00000F15, 0x0000 }, /* R3861 - FCL Filter Control */ 1643 { 0x00000F15, 0x0000 }, /* R3861 - FCL Filter Control */
@@ -1947,8 +1943,6 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
1947 case ARIZONA_FLL1_CONTROL_5: 1943 case ARIZONA_FLL1_CONTROL_5:
1948 case ARIZONA_FLL1_CONTROL_6: 1944 case ARIZONA_FLL1_CONTROL_6:
1949 case ARIZONA_FLL1_CONTROL_7: 1945 case ARIZONA_FLL1_CONTROL_7:
1950 case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
1951 case ARIZONA_FLL1_NCO_TEST_0:
1952 case ARIZONA_FLL1_SYNCHRONISER_1: 1946 case ARIZONA_FLL1_SYNCHRONISER_1:
1953 case ARIZONA_FLL1_SYNCHRONISER_2: 1947 case ARIZONA_FLL1_SYNCHRONISER_2:
1954 case ARIZONA_FLL1_SYNCHRONISER_3: 1948 case ARIZONA_FLL1_SYNCHRONISER_3:
@@ -1965,8 +1959,6 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
1965 case ARIZONA_FLL2_CONTROL_5: 1959 case ARIZONA_FLL2_CONTROL_5:
1966 case ARIZONA_FLL2_CONTROL_6: 1960 case ARIZONA_FLL2_CONTROL_6:
1967 case ARIZONA_FLL2_CONTROL_7: 1961 case ARIZONA_FLL2_CONTROL_7:
1968 case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
1969 case ARIZONA_FLL2_NCO_TEST_0:
1970 case ARIZONA_FLL2_SYNCHRONISER_1: 1962 case ARIZONA_FLL2_SYNCHRONISER_1:
1971 case ARIZONA_FLL2_SYNCHRONISER_2: 1963 case ARIZONA_FLL2_SYNCHRONISER_2:
1972 case ARIZONA_FLL2_SYNCHRONISER_3: 1964 case ARIZONA_FLL2_SYNCHRONISER_3:
diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c
index 4c2dce77cdfc..a0de3002cdad 100644
--- a/drivers/mfd/wm8998-tables.c
+++ b/drivers/mfd/wm8998-tables.c
@@ -229,8 +229,6 @@ static const struct reg_default wm8998_reg_default[] = {
229 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ 229 { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */
230 { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ 230 { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */
231 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ 231 { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */
232 { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */
233 { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */
234 { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ 232 { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */
235 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ 233 { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */
236 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ 234 { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */
@@ -247,8 +245,6 @@ static const struct reg_default wm8998_reg_default[] = {
247 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ 245 { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */
248 { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ 246 { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */
249 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ 247 { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */
250 { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */
251 { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */
252 { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ 248 { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */
253 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ 249 { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */
254 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ 250 { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */
@@ -320,7 +316,7 @@ static const struct reg_default wm8998_reg_default[] = {
320 { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ 316 { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */
321 { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ 317 { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */
322 { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ 318 { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */
323 { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ 319 { 0x00000440, 0x002F }, /* R1088 - DRE Enable */
324 { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ 320 { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */
325 { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ 321 { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */
326 { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ 322 { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */
@@ -686,7 +682,7 @@ static const struct reg_default wm8998_reg_default[] = {
686 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ 682 { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */
687 { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ 683 { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */
688 { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ 684 { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */
689 { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ 685 { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */
690 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ 686 { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */
691 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ 687 { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */
692 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ 688 { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */
@@ -888,8 +884,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg)
888 case ARIZONA_FLL1_CONTROL_5: 884 case ARIZONA_FLL1_CONTROL_5:
889 case ARIZONA_FLL1_CONTROL_6: 885 case ARIZONA_FLL1_CONTROL_6:
890 case ARIZONA_FLL1_CONTROL_7: 886 case ARIZONA_FLL1_CONTROL_7:
891 case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
892 case ARIZONA_FLL1_NCO_TEST_0:
893 case ARIZONA_FLL1_SYNCHRONISER_1: 887 case ARIZONA_FLL1_SYNCHRONISER_1:
894 case ARIZONA_FLL1_SYNCHRONISER_2: 888 case ARIZONA_FLL1_SYNCHRONISER_2:
895 case ARIZONA_FLL1_SYNCHRONISER_3: 889 case ARIZONA_FLL1_SYNCHRONISER_3:
@@ -906,8 +900,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg)
906 case ARIZONA_FLL2_CONTROL_5: 900 case ARIZONA_FLL2_CONTROL_5:
907 case ARIZONA_FLL2_CONTROL_6: 901 case ARIZONA_FLL2_CONTROL_6:
908 case ARIZONA_FLL2_CONTROL_7: 902 case ARIZONA_FLL2_CONTROL_7:
909 case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
910 case ARIZONA_FLL2_NCO_TEST_0:
911 case ARIZONA_FLL2_SYNCHRONISER_1: 903 case ARIZONA_FLL2_SYNCHRONISER_1:
912 case ARIZONA_FLL2_SYNCHRONISER_2: 904 case ARIZONA_FLL2_SYNCHRONISER_2:
913 case ARIZONA_FLL2_SYNCHRONISER_3: 905 case ARIZONA_FLL2_SYNCHRONISER_3:
diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
index 214e815e98eb..40cd894e4df5 100644
--- a/drivers/regulator/axp20x-regulator.c
+++ b/drivers/regulator/axp20x-regulator.c
@@ -238,6 +238,7 @@ static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
238 step = 75; 238 step = 75;
239 break; 239 break;
240 case AXP221_ID: 240 case AXP221_ID:
241 case AXP223_ID:
241 min = 1800; 242 min = 1800;
242 max = 4050; 243 max = 4050;
243 def = 3000; 244 def = 3000;
@@ -316,6 +317,7 @@ static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 work
316 break; 317 break;
317 318
318 case AXP221_ID: 319 case AXP221_ID:
320 case AXP223_ID:
319 if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5) 321 if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5)
320 return -EINVAL; 322 return -EINVAL;
321 323
@@ -354,6 +356,7 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
354 nregulators = AXP20X_REG_ID_MAX; 356 nregulators = AXP20X_REG_ID_MAX;
355 break; 357 break;
356 case AXP221_ID: 358 case AXP221_ID:
359 case AXP223_ID:
357 regulators = axp22x_regulators; 360 regulators = axp22x_regulators;
358 nregulators = AXP22X_REG_ID_MAX; 361 nregulators = AXP22X_REG_ID_MAX;
359 break; 362 break;
diff --git a/include/dt-bindings/iio/adc/fsl-imx25-gcq.h b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
new file mode 100644
index 000000000000..87abdd4a7674
--- /dev/null
+++ b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
@@ -0,0 +1,18 @@
1/*
2 * This header provides constants for configuring the I.MX25 ADC
3 */
4
5#ifndef _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
6#define _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
7
8#define MX25_ADC_REFP_YP 0 /* YP voltage reference */
9#define MX25_ADC_REFP_XP 1 /* XP voltage reference */
10#define MX25_ADC_REFP_EXT 2 /* External voltage reference */
11#define MX25_ADC_REFP_INT 3 /* Internal voltage reference */
12
13#define MX25_ADC_REFN_XN 0 /* XN ground reference */
14#define MX25_ADC_REFN_YN 1 /* YN ground reference */
15#define MX25_ADC_REFN_NGND 2 /* Internal ground reference */
16#define MX25_ADC_REFN_NGND2 3 /* External ground reference */
17
18#endif
diff --git a/include/linux/mfd/as3711.h b/include/linux/mfd/as3711.h
index 38452ce1e892..34cc85864be5 100644
--- a/include/linux/mfd/as3711.h
+++ b/include/linux/mfd/as3711.h
@@ -51,7 +51,8 @@
51#define AS3711_ASIC_ID_1 0x90 51#define AS3711_ASIC_ID_1 0x90
52#define AS3711_ASIC_ID_2 0x91 52#define AS3711_ASIC_ID_2 0x91
53 53
54#define AS3711_MAX_REGS 0x92 54#define AS3711_MAX_REG AS3711_ASIC_ID_2
55#define AS3711_NUM_REGS (AS3711_MAX_REG + 1)
55 56
56/* Regulators */ 57/* Regulators */
57enum { 58enum {
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index b24c771cebd5..d82e7d51372b 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -18,6 +18,7 @@ enum {
18 AXP202_ID, 18 AXP202_ID,
19 AXP209_ID, 19 AXP209_ID,
20 AXP221_ID, 20 AXP221_ID,
21 AXP223_ID,
21 AXP288_ID, 22 AXP288_ID,
22 NR_AXP20X_VARIANTS, 23 NR_AXP20X_VARIANTS,
23}; 24};
@@ -396,7 +397,7 @@ enum axp288_irqs {
396 397
397struct axp20x_dev { 398struct axp20x_dev {
398 struct device *dev; 399 struct device *dev;
399 struct i2c_client *i2c_client; 400 int irq;
400 struct regmap *regmap; 401 struct regmap *regmap;
401 struct regmap_irq_chip_data *regmap_irqc; 402 struct regmap_irq_chip_data *regmap_irqc;
402 long variant; 403 long variant;
@@ -462,4 +463,35 @@ static inline int axp20x_read_variable_width(struct regmap *regmap,
462 return result; 463 return result;
463} 464}
464 465
466/**
467 * axp20x_match_device(): Setup axp20x variant related fields
468 *
469 * @axp20x: axp20x device to setup (.dev field must be set)
470 * @dev: device associated with this axp20x device
471 *
472 * This lets the axp20x core configure the mfd cells and register maps
473 * for later use.
474 */
475int axp20x_match_device(struct axp20x_dev *axp20x);
476
477/**
478 * axp20x_device_probe(): Probe a configured axp20x device
479 *
480 * @axp20x: axp20x device to probe (must be configured)
481 *
482 * This function lets the axp20x core register the axp20x mfd devices
483 * and irqchip. The axp20x device passed in must be fully configured
484 * with axp20x_match_device, its irq set, and regmap created.
485 */
486int axp20x_device_probe(struct axp20x_dev *axp20x);
487
488/**
489 * axp20x_device_probe(): Remove a axp20x device
490 *
491 * @axp20x: axp20x device to remove
492 *
493 * This tells the axp20x core to remove the associated mfd devices
494 */
495int axp20x_device_remove(struct axp20x_dev *axp20x);
496
465#endif /* __LINUX_MFD_AXP20X_H */ 497#endif /* __LINUX_MFD_AXP20X_H */
diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h
index 494682ce4bf3..a677c2bd485c 100644
--- a/include/linux/mfd/cros_ec.h
+++ b/include/linux/mfd/cros_ec.h
@@ -245,7 +245,7 @@ int cros_ec_remove(struct cros_ec_device *ec_dev);
245int cros_ec_register(struct cros_ec_device *ec_dev); 245int cros_ec_register(struct cros_ec_device *ec_dev);
246 246
247/** 247/**
248 * cros_ec_register - Query the protocol version supported by the ChromeOS EC 248 * cros_ec_query_all - Query the protocol version supported by the ChromeOS EC
249 * 249 *
250 * @ec_dev: Device to register 250 * @ec_dev: Device to register
251 * @return 0 if ok, -ve on error 251 * @return 0 if ok, -ve on error
diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
new file mode 100644
index 000000000000..7fe4b8c3baac
--- /dev/null
+++ b/include/linux/mfd/imx25-tsadc.h
@@ -0,0 +1,140 @@
1#ifndef _LINUX_INCLUDE_MFD_IMX25_TSADC_H_
2#define _LINUX_INCLUDE_MFD_IMX25_TSADC_H_
3
4struct regmap;
5struct clk;
6
7struct mx25_tsadc {
8 struct regmap *regs;
9 struct irq_domain *domain;
10 struct clk *clk;
11};
12
13#define MX25_TSC_TGCR 0x00
14#define MX25_TSC_TGSR 0x04
15#define MX25_TSC_TICR 0x08
16
17/* The same register layout for TC and GC queue */
18#define MX25_ADCQ_FIFO 0x00
19#define MX25_ADCQ_CR 0x04
20#define MX25_ADCQ_SR 0x08
21#define MX25_ADCQ_MR 0x0c
22#define MX25_ADCQ_ITEM_7_0 0x20
23#define MX25_ADCQ_ITEM_15_8 0x24
24#define MX25_ADCQ_CFG(n) (0x40 + ((n) * 0x4))
25
26#define MX25_ADCQ_MR_MASK 0xffffffff
27
28/* TGCR */
29#define MX25_TGCR_PDBTIME(x) ((x) << 25)
30#define MX25_TGCR_PDBTIME_MASK GENMASK(31, 25)
31#define MX25_TGCR_PDBEN BIT(24)
32#define MX25_TGCR_PDEN BIT(23)
33#define MX25_TGCR_ADCCLKCFG(x) ((x) << 16)
34#define MX25_TGCR_GET_ADCCLK(x) (((x) >> 16) & 0x1f)
35#define MX25_TGCR_INTREFEN BIT(10)
36#define MX25_TGCR_POWERMODE_MASK GENMASK(9, 8)
37#define MX25_TGCR_POWERMODE_SAVE (1 << 8)
38#define MX25_TGCR_POWERMODE_ON (2 << 8)
39#define MX25_TGCR_STLC BIT(5)
40#define MX25_TGCR_SLPC BIT(4)
41#define MX25_TGCR_FUNC_RST BIT(2)
42#define MX25_TGCR_TSC_RST BIT(1)
43#define MX25_TGCR_CLK_EN BIT(0)
44
45/* TGSR */
46#define MX25_TGSR_SLP_INT BIT(2)
47#define MX25_TGSR_GCQ_INT BIT(1)
48#define MX25_TGSR_TCQ_INT BIT(0)
49
50/* ADCQ_ITEM_* */
51#define _MX25_ADCQ_ITEM(item, x) ((x) << ((item) * 4))
52#define MX25_ADCQ_ITEM(item, x) ((item) >= 8 ? \
53 _MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
54
55/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
56#define MX25_ADCQ_FIFO_DATA(x) (((x) >> 4) & 0xfff)
57#define MX25_ADCQ_FIFO_ID(x) ((x) & 0xf)
58
59/* ADCQ_CR (TCQR and GCQR) */
60#define MX25_ADCQ_CR_PDCFG_LEVEL BIT(19)
61#define MX25_ADCQ_CR_PDMSK BIT(18)
62#define MX25_ADCQ_CR_FRST BIT(17)
63#define MX25_ADCQ_CR_QRST BIT(16)
64#define MX25_ADCQ_CR_RWAIT_MASK GENMASK(15, 12)
65#define MX25_ADCQ_CR_RWAIT(x) ((x) << 12)
66#define MX25_ADCQ_CR_WMRK_MASK GENMASK(11, 8)
67#define MX25_ADCQ_CR_WMRK(x) ((x) << 8)
68#define MX25_ADCQ_CR_LITEMID_MASK (0xf << 4)
69#define MX25_ADCQ_CR_LITEMID(x) ((x) << 4)
70#define MX25_ADCQ_CR_RPT BIT(3)
71#define MX25_ADCQ_CR_FQS BIT(2)
72#define MX25_ADCQ_CR_QSM_MASK GENMASK(1, 0)
73#define MX25_ADCQ_CR_QSM_PD 0x1
74#define MX25_ADCQ_CR_QSM_FQS 0x2
75#define MX25_ADCQ_CR_QSM_FQS_PD 0x3
76
77/* ADCQ_SR (TCQSR and GCQSR) */
78#define MX25_ADCQ_SR_FDRY BIT(15)
79#define MX25_ADCQ_SR_FULL BIT(14)
80#define MX25_ADCQ_SR_EMPT BIT(13)
81#define MX25_ADCQ_SR_FDN(x) (((x) >> 8) & 0x1f)
82#define MX25_ADCQ_SR_FRR BIT(6)
83#define MX25_ADCQ_SR_FUR BIT(5)
84#define MX25_ADCQ_SR_FOR BIT(4)
85#define MX25_ADCQ_SR_EOQ BIT(1)
86#define MX25_ADCQ_SR_PD BIT(0)
87
88/* ADCQ_MR (TCQMR and GCQMR) */
89#define MX25_ADCQ_MR_FDRY_DMA BIT(31)
90#define MX25_ADCQ_MR_FER_DMA BIT(22)
91#define MX25_ADCQ_MR_FUR_DMA BIT(21)
92#define MX25_ADCQ_MR_FOR_DMA BIT(20)
93#define MX25_ADCQ_MR_EOQ_DMA BIT(17)
94#define MX25_ADCQ_MR_PD_DMA BIT(16)
95#define MX25_ADCQ_MR_FDRY_IRQ BIT(15)
96#define MX25_ADCQ_MR_FER_IRQ BIT(6)
97#define MX25_ADCQ_MR_FUR_IRQ BIT(5)
98#define MX25_ADCQ_MR_FOR_IRQ BIT(4)
99#define MX25_ADCQ_MR_EOQ_IRQ BIT(1)
100#define MX25_ADCQ_MR_PD_IRQ BIT(0)
101
102/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
103#define MX25_ADCQ_CFG_SETTLING_TIME(x) ((x) << 24)
104#define MX25_ADCQ_CFG_IGS (1 << 20)
105#define MX25_ADCQ_CFG_NOS_MASK GENMASK(19, 16)
106#define MX25_ADCQ_CFG_NOS(x) (((x) - 1) << 16)
107#define MX25_ADCQ_CFG_WIPER (1 << 15)
108#define MX25_ADCQ_CFG_YNLR (1 << 14)
109#define MX25_ADCQ_CFG_YPLL_HIGH (0 << 12)
110#define MX25_ADCQ_CFG_YPLL_OFF (1 << 12)
111#define MX25_ADCQ_CFG_YPLL_LOW (3 << 12)
112#define MX25_ADCQ_CFG_XNUR_HIGH (0 << 10)
113#define MX25_ADCQ_CFG_XNUR_OFF (1 << 10)
114#define MX25_ADCQ_CFG_XNUR_LOW (3 << 10)
115#define MX25_ADCQ_CFG_XPUL_HIGH (0 << 9)
116#define MX25_ADCQ_CFG_XPUL_OFF (1 << 9)
117#define MX25_ADCQ_CFG_REFP(sel) ((sel) << 7)
118#define MX25_ADCQ_CFG_REFP_YP MX25_ADCQ_CFG_REFP(0)
119#define MX25_ADCQ_CFG_REFP_XP MX25_ADCQ_CFG_REFP(1)
120#define MX25_ADCQ_CFG_REFP_EXT MX25_ADCQ_CFG_REFP(2)
121#define MX25_ADCQ_CFG_REFP_INT MX25_ADCQ_CFG_REFP(3)
122#define MX25_ADCQ_CFG_REFP_MASK GENMASK(8, 7)
123#define MX25_ADCQ_CFG_IN(sel) ((sel) << 4)
124#define MX25_ADCQ_CFG_IN_XP MX25_ADCQ_CFG_IN(0)
125#define MX25_ADCQ_CFG_IN_YP MX25_ADCQ_CFG_IN(1)
126#define MX25_ADCQ_CFG_IN_XN MX25_ADCQ_CFG_IN(2)
127#define MX25_ADCQ_CFG_IN_YN MX25_ADCQ_CFG_IN(3)
128#define MX25_ADCQ_CFG_IN_WIPER MX25_ADCQ_CFG_IN(4)
129#define MX25_ADCQ_CFG_IN_AUX0 MX25_ADCQ_CFG_IN(5)
130#define MX25_ADCQ_CFG_IN_AUX1 MX25_ADCQ_CFG_IN(6)
131#define MX25_ADCQ_CFG_IN_AUX2 MX25_ADCQ_CFG_IN(7)
132#define MX25_ADCQ_CFG_REFN(sel) ((sel) << 2)
133#define MX25_ADCQ_CFG_REFN_XN MX25_ADCQ_CFG_REFN(0)
134#define MX25_ADCQ_CFG_REFN_YN MX25_ADCQ_CFG_REFN(1)
135#define MX25_ADCQ_CFG_REFN_NGND MX25_ADCQ_CFG_REFN(2)
136#define MX25_ADCQ_CFG_REFN_NGND2 MX25_ADCQ_CFG_REFN(3)
137#define MX25_ADCQ_CFG_REFN_MASK GENMASK(3, 2)
138#define MX25_ADCQ_CFG_PENIACK (1 << 1)
139
140#endif /* _LINUX_INCLUDE_MFD_IMX25_TSADC_H_ */
diff --git a/include/linux/mfd/mt6323/core.h b/include/linux/mfd/mt6323/core.h
new file mode 100644
index 000000000000..06d0ec3b1f8f
--- /dev/null
+++ b/include/linux/mfd/mt6323/core.h
@@ -0,0 +1,36 @@
1/*
2 * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __MFD_MT6323_CORE_H__
10#define __MFD_MT6323_CORE_H__
11
12enum MT6323_IRQ_STATUS_numbers {
13 MT6323_IRQ_STATUS_SPKL_AB = 0,
14 MT6323_IRQ_STATUS_SPKL,
15 MT6323_IRQ_STATUS_BAT_L,
16 MT6323_IRQ_STATUS_BAT_H,
17 MT6323_IRQ_STATUS_WATCHDOG,
18 MT6323_IRQ_STATUS_PWRKEY,
19 MT6323_IRQ_STATUS_THR_L,
20 MT6323_IRQ_STATUS_THR_H,
21 MT6323_IRQ_STATUS_VBATON_UNDET,
22 MT6323_IRQ_STATUS_BVALID_DET,
23 MT6323_IRQ_STATUS_CHRDET,
24 MT6323_IRQ_STATUS_OV,
25 MT6323_IRQ_STATUS_LDO = 16,
26 MT6323_IRQ_STATUS_FCHRKEY,
27 MT6323_IRQ_STATUS_ACCDET,
28 MT6323_IRQ_STATUS_AUDIO,
29 MT6323_IRQ_STATUS_RTC,
30 MT6323_IRQ_STATUS_VPROC,
31 MT6323_IRQ_STATUS_VSYS,
32 MT6323_IRQ_STATUS_VPA,
33 MT6323_IRQ_STATUS_NR,
34};
35
36#endif /* __MFD_MT6323_CORE_H__ */
diff --git a/include/linux/mfd/mt6323/registers.h b/include/linux/mfd/mt6323/registers.h
new file mode 100644
index 000000000000..160f3c0e2589
--- /dev/null
+++ b/include/linux/mfd/mt6323/registers.h
@@ -0,0 +1,408 @@
1/*
2 * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __MFD_MT6323_REGISTERS_H__
10#define __MFD_MT6323_REGISTERS_H__
11
12/* PMIC Registers */
13#define MT6323_CHR_CON0 0x0000
14#define MT6323_CHR_CON1 0x0002
15#define MT6323_CHR_CON2 0x0004
16#define MT6323_CHR_CON3 0x0006
17#define MT6323_CHR_CON4 0x0008
18#define MT6323_CHR_CON5 0x000A
19#define MT6323_CHR_CON6 0x000C
20#define MT6323_CHR_CON7 0x000E
21#define MT6323_CHR_CON8 0x0010
22#define MT6323_CHR_CON9 0x0012
23#define MT6323_CHR_CON10 0x0014
24#define MT6323_CHR_CON11 0x0016
25#define MT6323_CHR_CON12 0x0018
26#define MT6323_CHR_CON13 0x001A
27#define MT6323_CHR_CON14 0x001C
28#define MT6323_CHR_CON15 0x001E
29#define MT6323_CHR_CON16 0x0020
30#define MT6323_CHR_CON17 0x0022
31#define MT6323_CHR_CON18 0x0024
32#define MT6323_CHR_CON19 0x0026
33#define MT6323_CHR_CON20 0x0028
34#define MT6323_CHR_CON21 0x002A
35#define MT6323_CHR_CON22 0x002C
36#define MT6323_CHR_CON23 0x002E
37#define MT6323_CHR_CON24 0x0030
38#define MT6323_CHR_CON25 0x0032
39#define MT6323_CHR_CON26 0x0034
40#define MT6323_CHR_CON27 0x0036
41#define MT6323_CHR_CON28 0x0038
42#define MT6323_CHR_CON29 0x003A
43#define MT6323_STRUP_CON0 0x003C
44#define MT6323_STRUP_CON2 0x003E
45#define MT6323_STRUP_CON3 0x0040
46#define MT6323_STRUP_CON4 0x0042
47#define MT6323_STRUP_CON5 0x0044
48#define MT6323_STRUP_CON6 0x0046
49#define MT6323_STRUP_CON7 0x0048
50#define MT6323_STRUP_CON8 0x004A
51#define MT6323_STRUP_CON9 0x004C
52#define MT6323_STRUP_CON10 0x004E
53#define MT6323_STRUP_CON11 0x0050
54#define MT6323_SPK_CON0 0x0052
55#define MT6323_SPK_CON1 0x0054
56#define MT6323_SPK_CON2 0x0056
57#define MT6323_SPK_CON6 0x005E
58#define MT6323_SPK_CON7 0x0060
59#define MT6323_SPK_CON8 0x0062
60#define MT6323_SPK_CON9 0x0064
61#define MT6323_SPK_CON10 0x0066
62#define MT6323_SPK_CON11 0x0068
63#define MT6323_SPK_CON12 0x006A
64#define MT6323_CID 0x0100
65#define MT6323_TOP_CKPDN0 0x0102
66#define MT6323_TOP_CKPDN0_SET 0x0104
67#define MT6323_TOP_CKPDN0_CLR 0x0106
68#define MT6323_TOP_CKPDN1 0x0108
69#define MT6323_TOP_CKPDN1_SET 0x010A
70#define MT6323_TOP_CKPDN1_CLR 0x010C
71#define MT6323_TOP_CKPDN2 0x010E
72#define MT6323_TOP_CKPDN2_SET 0x0110
73#define MT6323_TOP_CKPDN2_CLR 0x0112
74#define MT6323_TOP_RST_CON 0x0114
75#define MT6323_TOP_RST_CON_SET 0x0116
76#define MT6323_TOP_RST_CON_CLR 0x0118
77#define MT6323_TOP_RST_MISC 0x011A
78#define MT6323_TOP_RST_MISC_SET 0x011C
79#define MT6323_TOP_RST_MISC_CLR 0x011E
80#define MT6323_TOP_CKCON0 0x0120
81#define MT6323_TOP_CKCON0_SET 0x0122
82#define MT6323_TOP_CKCON0_CLR 0x0124
83#define MT6323_TOP_CKCON1 0x0126
84#define MT6323_TOP_CKCON1_SET 0x0128
85#define MT6323_TOP_CKCON1_CLR 0x012A
86#define MT6323_TOP_CKTST0 0x012C
87#define MT6323_TOP_CKTST1 0x012E
88#define MT6323_TOP_CKTST2 0x0130
89#define MT6323_TEST_OUT 0x0132
90#define MT6323_TEST_CON0 0x0134
91#define MT6323_TEST_CON1 0x0136
92#define MT6323_EN_STATUS0 0x0138
93#define MT6323_EN_STATUS1 0x013A
94#define MT6323_OCSTATUS0 0x013C
95#define MT6323_OCSTATUS1 0x013E
96#define MT6323_PGSTATUS 0x0140
97#define MT6323_CHRSTATUS 0x0142
98#define MT6323_TDSEL_CON 0x0144
99#define MT6323_RDSEL_CON 0x0146
100#define MT6323_SMT_CON0 0x0148
101#define MT6323_SMT_CON1 0x014A
102#define MT6323_SMT_CON2 0x014C
103#define MT6323_SMT_CON3 0x014E
104#define MT6323_SMT_CON4 0x0150
105#define MT6323_DRV_CON0 0x0152
106#define MT6323_DRV_CON1 0x0154
107#define MT6323_DRV_CON2 0x0156
108#define MT6323_DRV_CON3 0x0158
109#define MT6323_DRV_CON4 0x015A
110#define MT6323_SIMLS1_CON 0x015C
111#define MT6323_SIMLS2_CON 0x015E
112#define MT6323_INT_CON0 0x0160
113#define MT6323_INT_CON0_SET 0x0162
114#define MT6323_INT_CON0_CLR 0x0164
115#define MT6323_INT_CON1 0x0166
116#define MT6323_INT_CON1_SET 0x0168
117#define MT6323_INT_CON1_CLR 0x016A
118#define MT6323_INT_MISC_CON 0x016C
119#define MT6323_INT_MISC_CON_SET 0x016E
120#define MT6323_INT_MISC_CON_CLR 0x0170
121#define MT6323_INT_STATUS0 0x0172
122#define MT6323_INT_STATUS1 0x0174
123#define MT6323_OC_GEAR_0 0x0176
124#define MT6323_OC_GEAR_1 0x0178
125#define MT6323_OC_GEAR_2 0x017A
126#define MT6323_OC_CTL_VPROC 0x017C
127#define MT6323_OC_CTL_VSYS 0x017E
128#define MT6323_OC_CTL_VPA 0x0180
129#define MT6323_FQMTR_CON0 0x0182
130#define MT6323_FQMTR_CON1 0x0184
131#define MT6323_FQMTR_CON2 0x0186
132#define MT6323_RG_SPI_CON 0x0188
133#define MT6323_DEW_DIO_EN 0x018A
134#define MT6323_DEW_READ_TEST 0x018C
135#define MT6323_DEW_WRITE_TEST 0x018E
136#define MT6323_DEW_CRC_SWRST 0x0190
137#define MT6323_DEW_CRC_EN 0x0192
138#define MT6323_DEW_CRC_VAL 0x0194
139#define MT6323_DEW_DBG_MON_SEL 0x0196
140#define MT6323_DEW_CIPHER_KEY_SEL 0x0198
141#define MT6323_DEW_CIPHER_IV_SEL 0x019A
142#define MT6323_DEW_CIPHER_EN 0x019C
143#define MT6323_DEW_CIPHER_RDY 0x019E
144#define MT6323_DEW_CIPHER_MODE 0x01A0
145#define MT6323_DEW_CIPHER_SWRST 0x01A2
146#define MT6323_DEW_RDDMY_NO 0x01A4
147#define MT6323_DEW_RDATA_DLY_SEL 0x01A6
148#define MT6323_BUCK_CON0 0x0200
149#define MT6323_BUCK_CON1 0x0202
150#define MT6323_BUCK_CON2 0x0204
151#define MT6323_BUCK_CON3 0x0206
152#define MT6323_BUCK_CON4 0x0208
153#define MT6323_BUCK_CON5 0x020A
154#define MT6323_VPROC_CON0 0x020C
155#define MT6323_VPROC_CON1 0x020E
156#define MT6323_VPROC_CON2 0x0210
157#define MT6323_VPROC_CON3 0x0212
158#define MT6323_VPROC_CON4 0x0214
159#define MT6323_VPROC_CON5 0x0216
160#define MT6323_VPROC_CON7 0x021A
161#define MT6323_VPROC_CON8 0x021C
162#define MT6323_VPROC_CON9 0x021E
163#define MT6323_VPROC_CON10 0x0220
164#define MT6323_VPROC_CON11 0x0222
165#define MT6323_VPROC_CON12 0x0224
166#define MT6323_VPROC_CON13 0x0226
167#define MT6323_VPROC_CON14 0x0228
168#define MT6323_VPROC_CON15 0x022A
169#define MT6323_VPROC_CON18 0x0230
170#define MT6323_VSYS_CON0 0x0232
171#define MT6323_VSYS_CON1 0x0234
172#define MT6323_VSYS_CON2 0x0236
173#define MT6323_VSYS_CON3 0x0238
174#define MT6323_VSYS_CON4 0x023A
175#define MT6323_VSYS_CON5 0x023C
176#define MT6323_VSYS_CON7 0x0240
177#define MT6323_VSYS_CON8 0x0242
178#define MT6323_VSYS_CON9 0x0244
179#define MT6323_VSYS_CON10 0x0246
180#define MT6323_VSYS_CON11 0x0248
181#define MT6323_VSYS_CON12 0x024A
182#define MT6323_VSYS_CON13 0x024C
183#define MT6323_VSYS_CON14 0x024E
184#define MT6323_VSYS_CON15 0x0250
185#define MT6323_VSYS_CON18 0x0256
186#define MT6323_VPA_CON0 0x0300
187#define MT6323_VPA_CON1 0x0302
188#define MT6323_VPA_CON2 0x0304
189#define MT6323_VPA_CON3 0x0306
190#define MT6323_VPA_CON4 0x0308
191#define MT6323_VPA_CON5 0x030A
192#define MT6323_VPA_CON7 0x030E
193#define MT6323_VPA_CON8 0x0310
194#define MT6323_VPA_CON9 0x0312
195#define MT6323_VPA_CON10 0x0314
196#define MT6323_VPA_CON11 0x0316
197#define MT6323_VPA_CON12 0x0318
198#define MT6323_VPA_CON14 0x031C
199#define MT6323_VPA_CON16 0x0320
200#define MT6323_VPA_CON17 0x0322
201#define MT6323_VPA_CON18 0x0324
202#define MT6323_VPA_CON19 0x0326
203#define MT6323_VPA_CON20 0x0328
204#define MT6323_BUCK_K_CON0 0x032A
205#define MT6323_BUCK_K_CON1 0x032C
206#define MT6323_BUCK_K_CON2 0x032E
207#define MT6323_ISINK0_CON0 0x0330
208#define MT6323_ISINK0_CON1 0x0332
209#define MT6323_ISINK0_CON2 0x0334
210#define MT6323_ISINK0_CON3 0x0336
211#define MT6323_ISINK1_CON0 0x0338
212#define MT6323_ISINK1_CON1 0x033A
213#define MT6323_ISINK1_CON2 0x033C
214#define MT6323_ISINK1_CON3 0x033E
215#define MT6323_ISINK2_CON0 0x0340
216#define MT6323_ISINK2_CON1 0x0342
217#define MT6323_ISINK2_CON2 0x0344
218#define MT6323_ISINK2_CON3 0x0346
219#define MT6323_ISINK3_CON0 0x0348
220#define MT6323_ISINK3_CON1 0x034A
221#define MT6323_ISINK3_CON2 0x034C
222#define MT6323_ISINK3_CON3 0x034E
223#define MT6323_ISINK_ANA0 0x0350
224#define MT6323_ISINK_ANA1 0x0352
225#define MT6323_ISINK_PHASE_DLY 0x0354
226#define MT6323_ISINK_EN_CTRL 0x0356
227#define MT6323_ANALDO_CON0 0x0400
228#define MT6323_ANALDO_CON1 0x0402
229#define MT6323_ANALDO_CON2 0x0404
230#define MT6323_ANALDO_CON3 0x0406
231#define MT6323_ANALDO_CON4 0x0408
232#define MT6323_ANALDO_CON5 0x040A
233#define MT6323_ANALDO_CON6 0x040C
234#define MT6323_ANALDO_CON7 0x040E
235#define MT6323_ANALDO_CON8 0x0410
236#define MT6323_ANALDO_CON10 0x0412
237#define MT6323_ANALDO_CON15 0x0414
238#define MT6323_ANALDO_CON16 0x0416
239#define MT6323_ANALDO_CON17 0x0418
240#define MT6323_ANALDO_CON18 0x041A
241#define MT6323_ANALDO_CON19 0x041C
242#define MT6323_ANALDO_CON20 0x041E
243#define MT6323_ANALDO_CON21 0x0420
244#define MT6323_DIGLDO_CON0 0x0500
245#define MT6323_DIGLDO_CON2 0x0502
246#define MT6323_DIGLDO_CON3 0x0504
247#define MT6323_DIGLDO_CON5 0x0506
248#define MT6323_DIGLDO_CON6 0x0508
249#define MT6323_DIGLDO_CON7 0x050A
250#define MT6323_DIGLDO_CON8 0x050C
251#define MT6323_DIGLDO_CON9 0x050E
252#define MT6323_DIGLDO_CON10 0x0510
253#define MT6323_DIGLDO_CON11 0x0512
254#define MT6323_DIGLDO_CON12 0x0514
255#define MT6323_DIGLDO_CON13 0x0516
256#define MT6323_DIGLDO_CON14 0x0518
257#define MT6323_DIGLDO_CON15 0x051A
258#define MT6323_DIGLDO_CON16 0x051C
259#define MT6323_DIGLDO_CON17 0x051E
260#define MT6323_DIGLDO_CON18 0x0520
261#define MT6323_DIGLDO_CON19 0x0522
262#define MT6323_DIGLDO_CON20 0x0524
263#define MT6323_DIGLDO_CON21 0x0526
264#define MT6323_DIGLDO_CON23 0x0528
265#define MT6323_DIGLDO_CON24 0x052A
266#define MT6323_DIGLDO_CON26 0x052C
267#define MT6323_DIGLDO_CON27 0x052E
268#define MT6323_DIGLDO_CON28 0x0530
269#define MT6323_DIGLDO_CON29 0x0532
270#define MT6323_DIGLDO_CON30 0x0534
271#define MT6323_DIGLDO_CON31 0x0536
272#define MT6323_DIGLDO_CON32 0x0538
273#define MT6323_DIGLDO_CON33 0x053A
274#define MT6323_DIGLDO_CON34 0x053C
275#define MT6323_DIGLDO_CON35 0x053E
276#define MT6323_DIGLDO_CON36 0x0540
277#define MT6323_DIGLDO_CON39 0x0542
278#define MT6323_DIGLDO_CON40 0x0544
279#define MT6323_DIGLDO_CON41 0x0546
280#define MT6323_DIGLDO_CON42 0x0548
281#define MT6323_DIGLDO_CON43 0x054A
282#define MT6323_DIGLDO_CON44 0x054C
283#define MT6323_DIGLDO_CON45 0x054E
284#define MT6323_DIGLDO_CON46 0x0550
285#define MT6323_DIGLDO_CON47 0x0552
286#define MT6323_DIGLDO_CON48 0x0554
287#define MT6323_DIGLDO_CON49 0x0556
288#define MT6323_DIGLDO_CON50 0x0558
289#define MT6323_DIGLDO_CON51 0x055A
290#define MT6323_DIGLDO_CON52 0x055C
291#define MT6323_DIGLDO_CON53 0x055E
292#define MT6323_DIGLDO_CON54 0x0560
293#define MT6323_EFUSE_CON0 0x0600
294#define MT6323_EFUSE_CON1 0x0602
295#define MT6323_EFUSE_CON2 0x0604
296#define MT6323_EFUSE_CON3 0x0606
297#define MT6323_EFUSE_CON4 0x0608
298#define MT6323_EFUSE_CON5 0x060A
299#define MT6323_EFUSE_CON6 0x060C
300#define MT6323_EFUSE_VAL_0_15 0x060E
301#define MT6323_EFUSE_VAL_16_31 0x0610
302#define MT6323_EFUSE_VAL_32_47 0x0612
303#define MT6323_EFUSE_VAL_48_63 0x0614
304#define MT6323_EFUSE_VAL_64_79 0x0616
305#define MT6323_EFUSE_VAL_80_95 0x0618
306#define MT6323_EFUSE_VAL_96_111 0x061A
307#define MT6323_EFUSE_VAL_112_127 0x061C
308#define MT6323_EFUSE_VAL_128_143 0x061E
309#define MT6323_EFUSE_VAL_144_159 0x0620
310#define MT6323_EFUSE_VAL_160_175 0x0622
311#define MT6323_EFUSE_VAL_176_191 0x0624
312#define MT6323_EFUSE_DOUT_0_15 0x0626
313#define MT6323_EFUSE_DOUT_16_31 0x0628
314#define MT6323_EFUSE_DOUT_32_47 0x062A
315#define MT6323_EFUSE_DOUT_48_63 0x062C
316#define MT6323_EFUSE_DOUT_64_79 0x062E
317#define MT6323_EFUSE_DOUT_80_95 0x0630
318#define MT6323_EFUSE_DOUT_96_111 0x0632
319#define MT6323_EFUSE_DOUT_112_127 0x0634
320#define MT6323_EFUSE_DOUT_128_143 0x0636
321#define MT6323_EFUSE_DOUT_144_159 0x0638
322#define MT6323_EFUSE_DOUT_160_175 0x063A
323#define MT6323_EFUSE_DOUT_176_191 0x063C
324#define MT6323_EFUSE_CON7 0x063E
325#define MT6323_EFUSE_CON8 0x0640
326#define MT6323_EFUSE_CON9 0x0642
327#define MT6323_RTC_MIX_CON0 0x0644
328#define MT6323_RTC_MIX_CON1 0x0646
329#define MT6323_AUDTOP_CON0 0x0700
330#define MT6323_AUDTOP_CON1 0x0702
331#define MT6323_AUDTOP_CON2 0x0704
332#define MT6323_AUDTOP_CON3 0x0706
333#define MT6323_AUDTOP_CON4 0x0708
334#define MT6323_AUDTOP_CON5 0x070A
335#define MT6323_AUDTOP_CON6 0x070C
336#define MT6323_AUDTOP_CON7 0x070E
337#define MT6323_AUDTOP_CON8 0x0710
338#define MT6323_AUDTOP_CON9 0x0712
339#define MT6323_AUXADC_ADC0 0x0714
340#define MT6323_AUXADC_ADC1 0x0716
341#define MT6323_AUXADC_ADC2 0x0718
342#define MT6323_AUXADC_ADC3 0x071A
343#define MT6323_AUXADC_ADC4 0x071C
344#define MT6323_AUXADC_ADC5 0x071E
345#define MT6323_AUXADC_ADC6 0x0720
346#define MT6323_AUXADC_ADC7 0x0722
347#define MT6323_AUXADC_ADC8 0x0724
348#define MT6323_AUXADC_ADC9 0x0726
349#define MT6323_AUXADC_ADC10 0x0728
350#define MT6323_AUXADC_ADC11 0x072A
351#define MT6323_AUXADC_ADC12 0x072C
352#define MT6323_AUXADC_ADC13 0x072E
353#define MT6323_AUXADC_ADC14 0x0730
354#define MT6323_AUXADC_ADC15 0x0732
355#define MT6323_AUXADC_ADC16 0x0734
356#define MT6323_AUXADC_ADC17 0x0736
357#define MT6323_AUXADC_ADC18 0x0738
358#define MT6323_AUXADC_ADC19 0x073A
359#define MT6323_AUXADC_ADC20 0x073C
360#define MT6323_AUXADC_RSV1 0x073E
361#define MT6323_AUXADC_RSV2 0x0740
362#define MT6323_AUXADC_CON0 0x0742
363#define MT6323_AUXADC_CON1 0x0744
364#define MT6323_AUXADC_CON2 0x0746
365#define MT6323_AUXADC_CON3 0x0748
366#define MT6323_AUXADC_CON4 0x074A
367#define MT6323_AUXADC_CON5 0x074C
368#define MT6323_AUXADC_CON6 0x074E
369#define MT6323_AUXADC_CON7 0x0750
370#define MT6323_AUXADC_CON8 0x0752
371#define MT6323_AUXADC_CON9 0x0754
372#define MT6323_AUXADC_CON10 0x0756
373#define MT6323_AUXADC_CON11 0x0758
374#define MT6323_AUXADC_CON12 0x075A
375#define MT6323_AUXADC_CON13 0x075C
376#define MT6323_AUXADC_CON14 0x075E
377#define MT6323_AUXADC_CON15 0x0760
378#define MT6323_AUXADC_CON16 0x0762
379#define MT6323_AUXADC_CON17 0x0764
380#define MT6323_AUXADC_CON18 0x0766
381#define MT6323_AUXADC_CON19 0x0768
382#define MT6323_AUXADC_CON20 0x076A
383#define MT6323_AUXADC_CON21 0x076C
384#define MT6323_AUXADC_CON22 0x076E
385#define MT6323_AUXADC_CON23 0x0770
386#define MT6323_AUXADC_CON24 0x0772
387#define MT6323_AUXADC_CON25 0x0774
388#define MT6323_AUXADC_CON26 0x0776
389#define MT6323_AUXADC_CON27 0x0778
390#define MT6323_ACCDET_CON0 0x077A
391#define MT6323_ACCDET_CON1 0x077C
392#define MT6323_ACCDET_CON2 0x077E
393#define MT6323_ACCDET_CON3 0x0780
394#define MT6323_ACCDET_CON4 0x0782
395#define MT6323_ACCDET_CON5 0x0784
396#define MT6323_ACCDET_CON6 0x0786
397#define MT6323_ACCDET_CON7 0x0788
398#define MT6323_ACCDET_CON8 0x078A
399#define MT6323_ACCDET_CON9 0x078C
400#define MT6323_ACCDET_CON10 0x078E
401#define MT6323_ACCDET_CON11 0x0790
402#define MT6323_ACCDET_CON12 0x0792
403#define MT6323_ACCDET_CON13 0x0794
404#define MT6323_ACCDET_CON14 0x0796
405#define MT6323_ACCDET_CON15 0x0798
406#define MT6323_ACCDET_CON16 0x079A
407
408#endif /* __MFD_MT6323_REGISTERS_H__ */
diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h
index 45b8e8aa1fbf..d678f526e498 100644
--- a/include/linux/mfd/mt6397/core.h
+++ b/include/linux/mfd/mt6397/core.h
@@ -60,6 +60,8 @@ struct mt6397_chip {
60 u16 wake_mask[2]; 60 u16 wake_mask[2];
61 u16 irq_masks_cur[2]; 61 u16 irq_masks_cur[2];
62 u16 irq_masks_cache[2]; 62 u16 irq_masks_cache[2];
63 u16 int_con[2];
64 u16 int_status[2];
63}; 65};
64 66
65#endif /* __MFD_MT6397_CORE_H__ */ 67#endif /* __MFD_MT6397_CORE_H__ */
diff --git a/include/linux/mfd/rc5t583.h b/include/linux/mfd/rc5t583.h
index fd413ccab915..8d0a392e0a7f 100644
--- a/include/linux/mfd/rc5t583.h
+++ b/include/linux/mfd/rc5t583.h
@@ -28,8 +28,6 @@
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/regmap.h> 29#include <linux/regmap.h>
30 30
31#define RC5T583_MAX_REGS 0xF8
32
33/* Maximum number of main interrupts */ 31/* Maximum number of main interrupts */
34#define MAX_MAIN_INTERRUPT 5 32#define MAX_MAIN_INTERRUPT 5
35#define RC5T583_MAX_GPEDGE_REG 2 33#define RC5T583_MAX_GPEDGE_REG 2
@@ -169,6 +167,9 @@
169#define RC5T583_RTC_AY_MONTH 0xF3 167#define RC5T583_RTC_AY_MONTH 0xF3
170#define RC5T583_RTC_AY_YEAR 0xF4 168#define RC5T583_RTC_AY_YEAR 0xF4
171 169
170#define RC5T583_MAX_REG 0xF7
171#define RC5T583_NUM_REGS (RC5T583_MAX_REG + 1)
172
172/* RICOH_RC5T583 IRQ definitions */ 173/* RICOH_RC5T583 IRQ definitions */
173enum { 174enum {
174 RC5T583_IRQ_ONKEY, 175 RC5T583_IRQ_ONKEY,
diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h
index 75e543b78f53..1088149be0c9 100644
--- a/include/linux/mfd/syscon.h
+++ b/include/linux/mfd/syscon.h
@@ -29,24 +29,24 @@ extern struct regmap *syscon_regmap_lookup_by_phandle(
29#else 29#else
30static inline struct regmap *syscon_node_to_regmap(struct device_node *np) 30static inline struct regmap *syscon_node_to_regmap(struct device_node *np)
31{ 31{
32 return ERR_PTR(-ENOSYS); 32 return ERR_PTR(-ENOTSUPP);
33} 33}
34 34
35static inline struct regmap *syscon_regmap_lookup_by_compatible(const char *s) 35static inline struct regmap *syscon_regmap_lookup_by_compatible(const char *s)
36{ 36{
37 return ERR_PTR(-ENOSYS); 37 return ERR_PTR(-ENOTSUPP);
38} 38}
39 39
40static inline struct regmap *syscon_regmap_lookup_by_pdevname(const char *s) 40static inline struct regmap *syscon_regmap_lookup_by_pdevname(const char *s)
41{ 41{
42 return ERR_PTR(-ENOSYS); 42 return ERR_PTR(-ENOTSUPP);
43} 43}
44 44
45static inline struct regmap *syscon_regmap_lookup_by_phandle( 45static inline struct regmap *syscon_regmap_lookup_by_phandle(
46 struct device_node *np, 46 struct device_node *np,
47 const char *property) 47 const char *property)
48{ 48{
49 return ERR_PTR(-ENOSYS); 49 return ERR_PTR(-ENOTSUPP);
50} 50}
51#endif 51#endif
52 52
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index 558a485d03ab..238c8db953eb 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -422,6 +422,7 @@
422#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_MASK (0x1 << 26) 422#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_MASK (0x1 << 26)
423#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_ENABLE (0x1 << 26) 423#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_ENABLE (0x1 << 26)
424#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_DISABLE (0x0 << 26) 424#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_DISABLE (0x0 << 26)
425#define IMX6SX_GPR5_PCIE_BTNRST_RESET BIT(19)
425#define IMX6SX_GPR5_CSI1_MUX_CTRL_MASK (0x3 << 4) 426#define IMX6SX_GPR5_CSI1_MUX_CTRL_MASK (0x3 << 4)
426#define IMX6SX_GPR5_CSI1_MUX_CTRL_EXT_PIN (0x0 << 4) 427#define IMX6SX_GPR5_CSI1_MUX_CTRL_EXT_PIN (0x0 << 4)
427#define IMX6SX_GPR5_CSI1_MUX_CTRL_CVD (0x1 << 4) 428#define IMX6SX_GPR5_CSI1_MUX_CTRL_CVD (0x1 << 4)
@@ -435,6 +436,10 @@
435#define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1) 436#define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1)
436#define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1) 437#define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1)
437 438
439#define IMX6SX_GPR12_PCIE_TEST_POWERDOWN BIT(30)
440#define IMX6SX_GPR12_PCIE_RX_EQ_MASK (0x7 << 0)
441#define IMX6SX_GPR12_PCIE_RX_EQ_2 (0x2 << 0)
442
438/* For imx6ul iomux gpr register field define */ 443/* For imx6ul iomux gpr register field define */
439#define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17) 444#define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17)
440#define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18) 445#define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18)
diff --git a/include/linux/mfd/tps65086.h b/include/linux/mfd/tps65086.h
new file mode 100644
index 000000000000..a228ae4c88d9
--- /dev/null
+++ b/include/linux/mfd/tps65086.h
@@ -0,0 +1,117 @@
1/*
2 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
3 * Andrew F. Davis <afd@ti.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10 * kind, whether expressed or implied; without even the implied warranty
11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License version 2 for more details.
13 *
14 * Based on the TPS65912 driver
15 */
16
17#ifndef __LINUX_MFD_TPS65086_H
18#define __LINUX_MFD_TPS65086_H
19
20#include <linux/device.h>
21#include <linux/regmap.h>
22
23/* List of registers for TPS65086 */
24#define TPS65086_DEVICEID 0x01
25#define TPS65086_IRQ 0x02
26#define TPS65086_IRQ_MASK 0x03
27#define TPS65086_PMICSTAT 0x04
28#define TPS65086_SHUTDNSRC 0x05
29#define TPS65086_BUCK1CTRL 0x20
30#define TPS65086_BUCK2CTRL 0x21
31#define TPS65086_BUCK3DECAY 0x22
32#define TPS65086_BUCK3VID 0x23
33#define TPS65086_BUCK3SLPCTRL 0x24
34#define TPS65086_BUCK4CTRL 0x25
35#define TPS65086_BUCK5CTRL 0x26
36#define TPS65086_BUCK6CTRL 0x27
37#define TPS65086_LDOA2CTRL 0x28
38#define TPS65086_LDOA3CTRL 0x29
39#define TPS65086_DISCHCTRL1 0x40
40#define TPS65086_DISCHCTRL2 0x41
41#define TPS65086_DISCHCTRL3 0x42
42#define TPS65086_PG_DELAY1 0x43
43#define TPS65086_FORCESHUTDN 0x91
44#define TPS65086_BUCK1SLPCTRL 0x92
45#define TPS65086_BUCK2SLPCTRL 0x93
46#define TPS65086_BUCK4VID 0x94
47#define TPS65086_BUCK4SLPVID 0x95
48#define TPS65086_BUCK5VID 0x96
49#define TPS65086_BUCK5SLPVID 0x97
50#define TPS65086_BUCK6VID 0x98
51#define TPS65086_BUCK6SLPVID 0x99
52#define TPS65086_LDOA2VID 0x9A
53#define TPS65086_LDOA3VID 0x9B
54#define TPS65086_BUCK123CTRL 0x9C
55#define TPS65086_PG_DELAY2 0x9D
56#define TPS65086_PIN_EN_MASK1 0x9E
57#define TPS65086_PIN_EN_MASK2 0x9F
58#define TPS65086_SWVTT_EN 0x9F
59#define TPS65086_PIN_EN_OVR1 0xA0
60#define TPS65086_PIN_EN_OVR2 0xA1
61#define TPS65086_GPOCTRL 0xA1
62#define TPS65086_PWR_FAULT_MASK1 0xA2
63#define TPS65086_PWR_FAULT_MASK2 0xA3
64#define TPS65086_GPO1PG_CTRL1 0xA4
65#define TPS65086_GPO1PG_CTRL2 0xA5
66#define TPS65086_GPO4PG_CTRL1 0xA6
67#define TPS65086_GPO4PG_CTRL2 0xA7
68#define TPS65086_GPO2PG_CTRL1 0xA8
69#define TPS65086_GPO2PG_CTRL2 0xA9
70#define TPS65086_GPO3PG_CTRL1 0xAA
71#define TPS65086_GPO3PG_CTRL2 0xAB
72#define TPS65086_LDOA1CTRL 0xAE
73#define TPS65086_PG_STATUS1 0xB0
74#define TPS65086_PG_STATUS2 0xB1
75#define TPS65086_PWR_FAULT_STATUS1 0xB2
76#define TPS65086_PWR_FAULT_STATUS2 0xB3
77#define TPS65086_TEMPCRIT 0xB4
78#define TPS65086_TEMPHOT 0xB5
79#define TPS65086_OC_STATUS 0xB6
80
81/* IRQ Register field definitions */
82#define TPS65086_IRQ_DIETEMP_MASK BIT(0)
83#define TPS65086_IRQ_SHUTDN_MASK BIT(3)
84#define TPS65086_IRQ_FAULT_MASK BIT(7)
85
86/* DEVICEID Register field definitions */
87#define TPS65086_DEVICEID_PART_MASK GENMASK(3, 0)
88#define TPS65086_DEVICEID_OTP_MASK GENMASK(5, 4)
89#define TPS65086_DEVICEID_REV_MASK GENMASK(7, 6)
90
91/* VID Masks */
92#define BUCK_VID_MASK GENMASK(7, 1)
93#define VDOA1_VID_MASK GENMASK(4, 1)
94#define VDOA23_VID_MASK GENMASK(3, 0)
95
96/* Define the TPS65086 IRQ numbers */
97enum tps65086_irqs {
98 TPS65086_IRQ_DIETEMP,
99 TPS65086_IRQ_SHUTDN,
100 TPS65086_IRQ_FAULT,
101};
102
103/**
104 * struct tps65086 - state holder for the tps65086 driver
105 *
106 * Device data may be used to access the TPS65086 chip
107 */
108struct tps65086 {
109 struct device *dev;
110 struct regmap *regmap;
111
112 /* IRQ Data */
113 int irq;
114 struct regmap_irq_chip_data *irq_data;
115};
116
117#endif /* __LINUX_MFD_TPS65086_H */
diff --git a/include/linux/mfd/tps65090.h b/include/linux/mfd/tps65090.h
index 0bf2708df150..67d144b3b8f9 100644
--- a/include/linux/mfd/tps65090.h
+++ b/include/linux/mfd/tps65090.h
@@ -77,6 +77,11 @@ enum {
77#define TPS65090_REG_CG_CTRL5 0x09 77#define TPS65090_REG_CG_CTRL5 0x09
78#define TPS65090_REG_CG_STATUS1 0x0a 78#define TPS65090_REG_CG_STATUS1 0x0a
79#define TPS65090_REG_CG_STATUS2 0x0b 79#define TPS65090_REG_CG_STATUS2 0x0b
80#define TPS65090_REG_AD_OUT1 0x17
81#define TPS65090_REG_AD_OUT2 0x18
82
83#define TPS65090_MAX_REG TPS65090_REG_AD_OUT2
84#define TPS65090_NUM_REGS (TPS65090_MAX_REG + 1)
80 85
81struct tps65090 { 86struct tps65090 {
82 struct device *dev; 87 struct device *dev;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-23 09:43:50 -0400