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authorYuval Mintz <Yuval.Mintz@qlogic.com>2016-03-02 13:26:01 -0500
committerDavid S. Miller <davem@davemloft.net>2016-03-02 14:04:18 -0500
commit12e09c694a68a3d71c7c655eeb689b7fe43b09f5 (patch)
treeac098c4cc4936e0f21f87240b8b99aa0a1de832d
parentc2035eea3e9e1df768285fc8d72808469687aec0 (diff)
qed: Support B0 instead of A0
BB_A0 is a development model that is will not reach actual clients. In fact, future firmware would simply fail to initialize such chip. This changes the configuration into B0 instead of A0, and adds a safeguard against the slim chance someone would actually try this with an A0 adapter in which case probe would gracefully fail. Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/qlogic/qed/qed_dev.c41
-rw-r--r--drivers/net/ethernet/qlogic/qed/qed_hsi.h2
2 files changed, 24 insertions, 19 deletions
diff --git a/drivers/net/ethernet/qlogic/qed/qed_dev.c b/drivers/net/ethernet/qlogic/qed/qed_dev.c
index 706c61431e51..2e02e052cb87 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_dev.c
+++ b/drivers/net/ethernet/qlogic/qed/qed_dev.c
@@ -420,7 +420,7 @@ static void qed_calc_hw_mode(struct qed_hwfn *p_hwfn)
420{ 420{
421 int hw_mode = 0; 421 int hw_mode = 0;
422 422
423 hw_mode = (1 << MODE_BB_A0); 423 hw_mode = (1 << MODE_BB_B0);
424 424
425 switch (p_hwfn->cdev->num_ports_in_engines) { 425 switch (p_hwfn->cdev->num_ports_in_engines) {
426 case 1: 426 case 1:
@@ -976,18 +976,8 @@ static void qed_hw_hwfn_free(struct qed_hwfn *p_hwfn)
976} 976}
977 977
978/* Setup bar access */ 978/* Setup bar access */
979static int qed_hw_hwfn_prepare(struct qed_hwfn *p_hwfn) 979static void qed_hw_hwfn_prepare(struct qed_hwfn *p_hwfn)
980{ 980{
981 int rc;
982
983 /* Allocate PTT pool */
984 rc = qed_ptt_pool_alloc(p_hwfn);
985 if (rc)
986 return rc;
987
988 /* Allocate the main PTT */
989 p_hwfn->p_main_ptt = qed_get_reserved_ptt(p_hwfn, RESERVED_PTT_MAIN);
990
991 /* clear indirect access */ 981 /* clear indirect access */
992 qed_wr(p_hwfn, p_hwfn->p_main_ptt, PGLUE_B_REG_PGL_ADDR_88_F0, 0); 982 qed_wr(p_hwfn, p_hwfn->p_main_ptt, PGLUE_B_REG_PGL_ADDR_88_F0, 0);
993 qed_wr(p_hwfn, p_hwfn->p_main_ptt, PGLUE_B_REG_PGL_ADDR_8C_F0, 0); 983 qed_wr(p_hwfn, p_hwfn->p_main_ptt, PGLUE_B_REG_PGL_ADDR_8C_F0, 0);
@@ -1002,8 +992,6 @@ static int qed_hw_hwfn_prepare(struct qed_hwfn *p_hwfn)
1002 /* enable internal target-read */ 992 /* enable internal target-read */
1003 qed_wr(p_hwfn, p_hwfn->p_main_ptt, 993 qed_wr(p_hwfn, p_hwfn->p_main_ptt,
1004 PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1); 994 PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ, 1);
1005
1006 return 0;
1007} 995}
1008 996
1009static void get_function_id(struct qed_hwfn *p_hwfn) 997static void get_function_id(struct qed_hwfn *p_hwfn)
@@ -1311,7 +1299,7 @@ qed_get_hw_info(struct qed_hwfn *p_hwfn,
1311 return rc; 1299 return rc;
1312} 1300}
1313 1301
1314static void qed_get_dev_info(struct qed_dev *cdev) 1302static int qed_get_dev_info(struct qed_dev *cdev)
1315{ 1303{
1316 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 1304 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
1317 u32 tmp; 1305 u32 tmp;
@@ -1350,6 +1338,14 @@ static void qed_get_dev_info(struct qed_dev *cdev)
1350 "Chip details - Num: %04x Rev: %04x Bond id: %04x Metal: %04x\n", 1338 "Chip details - Num: %04x Rev: %04x Bond id: %04x Metal: %04x\n",
1351 cdev->chip_num, cdev->chip_rev, 1339 cdev->chip_num, cdev->chip_rev,
1352 cdev->chip_bond_id, cdev->chip_metal); 1340 cdev->chip_bond_id, cdev->chip_metal);
1341
1342 if (QED_IS_BB(cdev) && CHIP_REV_IS_A0(cdev)) {
1343 DP_NOTICE(cdev->hwfns,
1344 "The chip type/rev (BB A0) is not supported!\n");
1345 return -EINVAL;
1346 }
1347
1348 return 0;
1353} 1349}
1354 1350
1355static int qed_hw_prepare_single(struct qed_hwfn *p_hwfn, 1351static int qed_hw_prepare_single(struct qed_hwfn *p_hwfn,
@@ -1372,15 +1368,24 @@ static int qed_hw_prepare_single(struct qed_hwfn *p_hwfn,
1372 1368
1373 get_function_id(p_hwfn); 1369 get_function_id(p_hwfn);
1374 1370
1375 rc = qed_hw_hwfn_prepare(p_hwfn); 1371 /* Allocate PTT pool */
1372 rc = qed_ptt_pool_alloc(p_hwfn);
1376 if (rc) { 1373 if (rc) {
1377 DP_NOTICE(p_hwfn, "Failed to prepare hwfn's hw\n"); 1374 DP_NOTICE(p_hwfn, "Failed to prepare hwfn's hw\n");
1378 goto err0; 1375 goto err0;
1379 } 1376 }
1380 1377
1378 /* Allocate the main PTT */
1379 p_hwfn->p_main_ptt = qed_get_reserved_ptt(p_hwfn, RESERVED_PTT_MAIN);
1380
1381 /* First hwfn learns basic information, e.g., number of hwfns */ 1381 /* First hwfn learns basic information, e.g., number of hwfns */
1382 if (!p_hwfn->my_id) 1382 if (!p_hwfn->my_id) {
1383 qed_get_dev_info(p_hwfn->cdev); 1383 rc = qed_get_dev_info(p_hwfn->cdev);
1384 if (rc != 0)
1385 goto err1;
1386 }
1387
1388 qed_hw_hwfn_prepare(p_hwfn);
1384 1389
1385 /* Initialize MCP structure */ 1390 /* Initialize MCP structure */
1386 rc = qed_mcp_cmd_init(p_hwfn, p_hwfn->p_main_ptt); 1391 rc = qed_mcp_cmd_init(p_hwfn, p_hwfn->p_main_ptt);
diff --git a/drivers/net/ethernet/qlogic/qed/qed_hsi.h b/drivers/net/ethernet/qlogic/qed/qed_hsi.h
index 49bbf696a16d..592e0e6d9b42 100644
--- a/drivers/net/ethernet/qlogic/qed/qed_hsi.h
+++ b/drivers/net/ethernet/qlogic/qed/qed_hsi.h
@@ -968,7 +968,7 @@ struct igu_msix_vector {
968 968
969enum init_modes { 969enum init_modes {
970 MODE_BB_A0, 970 MODE_BB_A0,
971 MODE_RESERVED, 971 MODE_BB_B0,
972 MODE_RESERVED2, 972 MODE_RESERVED2,
973 MODE_ASIC, 973 MODE_ASIC,
974 MODE_RESERVED3, 974 MODE_RESERVED3,