aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChristophe Leroy <christophe.leroy@c-s.fr>2019-08-26 11:52:14 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2019-08-28 09:19:33 -0400
commit12c3f1fd87bf4e55f06d079a45d6f15e2f6f9750 (patch)
tree8cd4c0d6eb39af3c7eec61d2f6667477a3de622b
parentf7a0bf7d904e902e13024986b7b357181ee30849 (diff)
powerpc/32s: get rid of CPU_FTR_601 feature
Now that 601 is exclusive from other 6xx, CPU_FTR_601 and associated fixups are useless. Drop this feature and use #ifdefs instead. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/ecdb7194a17dbfa01865df6a82979533adc2c70b.1566834712.git.christophe.leroy@c-s.fr
-rw-r--r--arch/powerpc/configs/pmac32_defconfig1
-rw-r--r--arch/powerpc/include/asm/cputable.h14
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h28
-rw-r--r--arch/powerpc/include/asm/ptrace.h6
-rw-r--r--arch/powerpc/include/asm/timex.h34
-rw-r--r--arch/powerpc/kernel/cputable.c6
-rw-r--r--arch/powerpc/kernel/entry_32.S22
-rw-r--r--arch/powerpc/mm/book3s32/mmu.c15
-rw-r--r--arch/powerpc/mm/ptdump/bats.c2
-rw-r--r--arch/powerpc/platforms/Kconfig3
10 files changed, 52 insertions, 79 deletions
diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig
index 7e6654848531..4e6e95f92646 100644
--- a/arch/powerpc/configs/pmac32_defconfig
+++ b/arch/powerpc/configs/pmac32_defconfig
@@ -20,7 +20,6 @@ CONFIG_CPU_FREQ=y
20CONFIG_CPU_FREQ_GOV_POWERSAVE=y 20CONFIG_CPU_FREQ_GOV_POWERSAVE=y
21CONFIG_CPU_FREQ_GOV_USERSPACE=y 21CONFIG_CPU_FREQ_GOV_USERSPACE=y
22CONFIG_CPU_FREQ_PMAC=y 22CONFIG_CPU_FREQ_PMAC=y
23CONFIG_PPC601_SYNC_FIX=y
24CONFIG_GEN_RTC=y 23CONFIG_GEN_RTC=y
25CONFIG_HIGHMEM=y 24CONFIG_HIGHMEM=y
26CONFIG_BINFMT_MISC=m 25CONFIG_BINFMT_MISC=m
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index d05f0c28e515..0aad095896d6 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -145,7 +145,6 @@ static inline void cpu_feature_keys_init(void) { }
145 145
146/* Definitions for features that only exist on 32-bit chips */ 146/* Definitions for features that only exist on 32-bit chips */
147#ifdef CONFIG_PPC32 147#ifdef CONFIG_PPC32
148#define CPU_FTR_601 ASM_CONST(0x00001000)
149#define CPU_FTR_L2CR ASM_CONST(0x00002000) 148#define CPU_FTR_L2CR ASM_CONST(0x00002000)
150#define CPU_FTR_SPEC7450 ASM_CONST(0x00004000) 149#define CPU_FTR_SPEC7450 ASM_CONST(0x00004000)
151#define CPU_FTR_TAU ASM_CONST(0x00008000) 150#define CPU_FTR_TAU ASM_CONST(0x00008000)
@@ -167,7 +166,6 @@ static inline void cpu_feature_keys_init(void) { }
167 166
168#else /* CONFIG_PPC32 */ 167#else /* CONFIG_PPC32 */
169/* Define these to 0 for the sake of tests in common code */ 168/* Define these to 0 for the sake of tests in common code */
170#define CPU_FTR_601 (0)
171#define CPU_FTR_PPC_LE (0) 169#define CPU_FTR_PPC_LE (0)
172#endif 170#endif
173 171
@@ -294,7 +292,7 @@ static inline void cpu_feature_keys_init(void) { }
294#define CPU_FTR_MAYBE_CAN_NAP 0 292#define CPU_FTR_MAYBE_CAN_NAP 0
295#endif 293#endif
296 294
297#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | \ 295#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | \
298 CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_USE_RTC) 296 CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_USE_RTC)
299#define CPU_FTRS_603 (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \ 297#define CPU_FTRS_603 (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \
300 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE | CPU_FTR_NOEXECUTE) 298 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE | CPU_FTR_NOEXECUTE)
@@ -498,7 +496,9 @@ static inline void cpu_feature_keys_init(void) { }
498#else 496#else
499enum { 497enum {
500 CPU_FTRS_POSSIBLE = 498 CPU_FTRS_POSSIBLE =
501#ifdef CONFIG_PPC_BOOK3S_32 499#ifdef CONFIG_PPC_BOOK3S_601
500 CPU_FTRS_PPC601 |
501#elif defined(CONFIG_PPC_BOOK3S_32)
502 CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU | 502 CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU |
503 CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 | 503 CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 |
504 CPU_FTRS_750FX2 | CPU_FTRS_750FX | CPU_FTRS_750GX | 504 CPU_FTRS_750FX2 | CPU_FTRS_750FX | CPU_FTRS_750GX |
@@ -574,8 +574,10 @@ enum {
574#else 574#else
575enum { 575enum {
576 CPU_FTRS_ALWAYS = 576 CPU_FTRS_ALWAYS =
577#ifdef CONFIG_PPC_BOOK3S_32 577#ifdef CONFIG_PPC_BOOK3S_601
578 CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU & 578 CPU_FTRS_PPC601 &
579#elif defined(CONFIG_PPC_BOOK3S_32)
580 CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU &
579 CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 & 581 CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 &
580 CPU_FTRS_750FX2 & CPU_FTRS_750FX & CPU_FTRS_750GX & 582 CPU_FTRS_750FX2 & CPU_FTRS_750FX & CPU_FTRS_750GX &
581 CPU_FTRS_7400_NOTAU & CPU_FTRS_7400 & CPU_FTRS_7450_20 & 583 CPU_FTRS_7400_NOTAU & CPU_FTRS_7400 & CPU_FTRS_7450_20 &
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index dd3b191bdcea..6b03dff61a05 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -383,19 +383,9 @@ n:
383 383
384/* various errata or part fixups */ 384/* various errata or part fixups */
385#ifdef CONFIG_PPC601_SYNC_FIX 385#ifdef CONFIG_PPC601_SYNC_FIX
386#define SYNC \ 386#define SYNC sync; isync
387BEGIN_FTR_SECTION \ 387#define SYNC_601 sync
388 sync; \ 388#define ISYNC_601 isync
389 isync; \
390END_FTR_SECTION_IFSET(CPU_FTR_601)
391#define SYNC_601 \
392BEGIN_FTR_SECTION \
393 sync; \
394END_FTR_SECTION_IFSET(CPU_FTR_601)
395#define ISYNC_601 \
396BEGIN_FTR_SECTION \
397 isync; \
398END_FTR_SECTION_IFSET(CPU_FTR_601)
399#else 389#else
400#define SYNC 390#define SYNC
401#define SYNC_601 391#define SYNC_601
@@ -421,15 +411,11 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
421#define MFTBU(dest) mfspr dest, SPRN_TBRU 411#define MFTBU(dest) mfspr dest, SPRN_TBRU
422#endif 412#endif
423 413
424#ifndef CONFIG_SMP
425#define TLBSYNC
426#else /* CONFIG_SMP */
427/* tlbsync is not implemented on 601 */ 414/* tlbsync is not implemented on 601 */
428#define TLBSYNC \ 415#if !defined(CONFIG_SMP) || defined(CONFIG_PPC_BOOK3S_601)
429BEGIN_FTR_SECTION \ 416#define TLBSYNC
430 tlbsync; \ 417#else
431 sync; \ 418#define TLBSYNC tlbsync; sync
432END_FTR_SECTION_IFCLR(CPU_FTR_601)
433#endif 419#endif
434 420
435#ifdef CONFIG_PPC64 421#ifdef CONFIG_PPC64
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index feee1b21bbd5..ee3ada66deb5 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -203,7 +203,11 @@ do { \
203#endif /* __powerpc64__ */ 203#endif /* __powerpc64__ */
204 204
205#define arch_has_single_step() (1) 205#define arch_has_single_step() (1)
206#define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601)) 206#ifndef CONFIG_BOOK3S_601
207#define arch_has_block_step() (true)
208#else
209#define arch_has_block_step() (false)
210#endif
207#define ARCH_HAS_USER_SINGLE_STEP_REPORT 211#define ARCH_HAS_USER_SINGLE_STEP_REPORT
208 212
209/* 213/*
diff --git a/arch/powerpc/include/asm/timex.h b/arch/powerpc/include/asm/timex.h
index 926b9f91a3ef..d2d2c4bd8435 100644
--- a/arch/powerpc/include/asm/timex.h
+++ b/arch/powerpc/include/asm/timex.h
@@ -17,38 +17,10 @@ typedef unsigned long cycles_t;
17 17
18static inline cycles_t get_cycles(void) 18static inline cycles_t get_cycles(void)
19{ 19{
20#ifdef __powerpc64__ 20 if (IS_ENABLED(CONFIG_BOOK3S_601))
21 return 0;
22
21 return mftb(); 23 return mftb();
22#else
23 cycles_t ret;
24
25 /*
26 * For the "cycle" counter we use the timebase lower half.
27 * Currently only used on SMP.
28 */
29
30 ret = 0;
31
32 __asm__ __volatile__(
33#ifdef CONFIG_PPC_8xx
34 "97: mftb %0\n"
35#else
36 "97: mfspr %0, %2\n"
37#endif
38 "99:\n"
39 ".section __ftr_fixup,\"a\"\n"
40 ".align 2\n"
41 "98:\n"
42 " .long %1\n"
43 " .long 0\n"
44 " .long 97b-98b\n"
45 " .long 99b-98b\n"
46 " .long 0\n"
47 " .long 0\n"
48 ".previous"
49 : "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
50 return ret;
51#endif
52} 24}
53 25
54#endif /* __KERNEL__ */ 26#endif /* __KERNEL__ */
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index bfe5f4a2886b..e745abc5457a 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -569,7 +569,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
569#endif /* CONFIG_PPC_BOOK3S_64 */ 569#endif /* CONFIG_PPC_BOOK3S_64 */
570 570
571#ifdef CONFIG_PPC32 571#ifdef CONFIG_PPC32
572#ifdef CONFIG_PPC_BOOK3S_32 572#ifdef CONFIG_PPC_BOOK3S_601
573 { /* 601 */ 573 { /* 601 */
574 .pvr_mask = 0xffff0000, 574 .pvr_mask = 0xffff0000,
575 .pvr_value = 0x00010000, 575 .pvr_value = 0x00010000,
@@ -583,6 +583,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
583 .machine_check = machine_check_generic, 583 .machine_check = machine_check_generic,
584 .platform = "ppc601", 584 .platform = "ppc601",
585 }, 585 },
586#endif /* CONFIG_PPC_BOOK3S_601 */
587#ifdef CONFIG_PPC_BOOK3S_6xx
586 { /* 603 */ 588 { /* 603 */
587 .pvr_mask = 0xffff0000, 589 .pvr_mask = 0xffff0000,
588 .pvr_value = 0x00030000, 590 .pvr_value = 0x00030000,
@@ -1212,7 +1214,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
1212 .machine_check = machine_check_generic, 1214 .machine_check = machine_check_generic,
1213 .platform = "ppc603", 1215 .platform = "ppc603",
1214 }, 1216 },
1215#endif /* CONFIG_PPC_BOOK3S_32 */ 1217#endif /* CONFIG_PPC_BOOK3S_6xx */
1216#ifdef CONFIG_PPC_8xx 1218#ifdef CONFIG_PPC_8xx
1217 { /* 8xx */ 1219 { /* 8xx */
1218 .pvr_mask = 0xffff0000, 1220 .pvr_mask = 0xffff0000,
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 972b05504a0a..d60908ea37fb 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -777,11 +777,19 @@ fast_exception_return:
7771: lis r3,exc_exit_restart_end@ha 7771: lis r3,exc_exit_restart_end@ha
778 addi r3,r3,exc_exit_restart_end@l 778 addi r3,r3,exc_exit_restart_end@l
779 cmplw r12,r3 779 cmplw r12,r3
780#if CONFIG_PPC_BOOK3S_601
781 bge 2b
782#else
780 bge 3f 783 bge 3f
784#endif
781 lis r4,exc_exit_restart@ha 785 lis r4,exc_exit_restart@ha
782 addi r4,r4,exc_exit_restart@l 786 addi r4,r4,exc_exit_restart@l
783 cmplw r12,r4 787 cmplw r12,r4
788#if CONFIG_PPC_BOOK3S_601
789 blt 2b
790#else
784 blt 3f 791 blt 3f
792#endif
785 lis r3,fee_restarts@ha 793 lis r3,fee_restarts@ha
786 tophys(r3,r3) 794 tophys(r3,r3)
787 lwz r5,fee_restarts@l(r3) 795 lwz r5,fee_restarts@l(r3)
@@ -800,9 +808,6 @@ fee_restarts:
800/* aargh, we don't know which trap this is */ 808/* aargh, we don't know which trap this is */
801/* but the 601 doesn't implement the RI bit, so assume it's OK */ 809/* but the 601 doesn't implement the RI bit, so assume it's OK */
8023: 8103:
803BEGIN_FTR_SECTION
804 b 2b
805END_FTR_SECTION_IFSET(CPU_FTR_601)
806 li r10,-1 811 li r10,-1
807 stw r10,_TRAP(r11) 812 stw r10,_TRAP(r11)
808 addi r3,r1,STACK_FRAME_OVERHEAD 813 addi r3,r1,STACK_FRAME_OVERHEAD
@@ -1270,11 +1275,19 @@ nonrecoverable:
1270 lis r10,exc_exit_restart_end@ha 1275 lis r10,exc_exit_restart_end@ha
1271 addi r10,r10,exc_exit_restart_end@l 1276 addi r10,r10,exc_exit_restart_end@l
1272 cmplw r12,r10 1277 cmplw r12,r10
1278#ifdef CONFIG_PPC_BOOK3S_601
1279 bgelr
1280#else
1273 bge 3f 1281 bge 3f
1282#endif
1274 lis r11,exc_exit_restart@ha 1283 lis r11,exc_exit_restart@ha
1275 addi r11,r11,exc_exit_restart@l 1284 addi r11,r11,exc_exit_restart@l
1276 cmplw r12,r11 1285 cmplw r12,r11
1286#ifdef CONFIG_PPC_BOOK3S_601
1287 bltlr
1288#else
1277 blt 3f 1289 blt 3f
1290#endif
1278 lis r10,ee_restarts@ha 1291 lis r10,ee_restarts@ha
1279 lwz r12,ee_restarts@l(r10) 1292 lwz r12,ee_restarts@l(r10)
1280 addi r12,r12,1 1293 addi r12,r12,1
@@ -1283,9 +1296,6 @@ nonrecoverable:
1283 blr 1296 blr
12843: /* OK, we can't recover, kill this process */ 12973: /* OK, we can't recover, kill this process */
1285 /* but the 601 doesn't implement the RI bit, so assume it's OK */ 1298 /* but the 601 doesn't implement the RI bit, so assume it's OK */
1286BEGIN_FTR_SECTION
1287 blr
1288END_FTR_SECTION_IFSET(CPU_FTR_601)
1289 lwz r3,_TRAP(r1) 1299 lwz r3,_TRAP(r1)
1290 andi. r0,r3,1 1300 andi. r0,r3,1
1291 beq 5f 1301 beq 5f
diff --git a/arch/powerpc/mm/book3s32/mmu.c b/arch/powerpc/mm/book3s32/mmu.c
index 50a1991d257f..84d5fab94f8f 100644
--- a/arch/powerpc/mm/book3s32/mmu.c
+++ b/arch/powerpc/mm/book3s32/mmu.c
@@ -74,7 +74,7 @@ static int find_free_bat(void)
74{ 74{
75 int b; 75 int b;
76 76
77 if (cpu_has_feature(CPU_FTR_601)) { 77 if (IS_ENABLED(CONFIG_PPC_BOOK3S_601)) {
78 for (b = 0; b < 4; b++) { 78 for (b = 0; b < 4; b++) {
79 struct ppc_bat *bat = BATS[b]; 79 struct ppc_bat *bat = BATS[b];
80 80
@@ -106,7 +106,7 @@ static int find_free_bat(void)
106 */ 106 */
107static unsigned int block_size(unsigned long base, unsigned long top) 107static unsigned int block_size(unsigned long base, unsigned long top)
108{ 108{
109 unsigned int max_size = (cpu_has_feature(CPU_FTR_601) ? 8 : 256) << 20; 109 unsigned int max_size = IS_ENABLED(CONFIG_PPC_BOOK3S_601) ? SZ_8M : SZ_256M;
110 unsigned int base_shift = (ffs(base) - 1) & 31; 110 unsigned int base_shift = (ffs(base) - 1) & 31;
111 unsigned int block_shift = (fls(top - base) - 1) & 31; 111 unsigned int block_shift = (fls(top - base) - 1) & 31;
112 112
@@ -189,7 +189,7 @@ void mmu_mark_initmem_nx(void)
189 unsigned long top = (unsigned long)_etext - PAGE_OFFSET; 189 unsigned long top = (unsigned long)_etext - PAGE_OFFSET;
190 unsigned long size; 190 unsigned long size;
191 191
192 if (cpu_has_feature(CPU_FTR_601)) 192 if (IS_ENABLED(CONFIG_PPC_BOOK3S_601))
193 return; 193 return;
194 194
195 for (i = 0; i < nb - 1 && base < top && top - base > (128 << 10);) { 195 for (i = 0; i < nb - 1 && base < top && top - base > (128 << 10);) {
@@ -227,7 +227,7 @@ void mmu_mark_rodata_ro(void)
227 int nb = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4; 227 int nb = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4;
228 int i; 228 int i;
229 229
230 if (cpu_has_feature(CPU_FTR_601)) 230 if (IS_ENABLED(CONFIG_PPC_BOOK3S_601))
231 return; 231 return;
232 232
233 for (i = 0; i < nb; i++) { 233 for (i = 0; i < nb; i++) {
@@ -259,7 +259,7 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
259 flags &= ~_PAGE_COHERENT; 259 flags &= ~_PAGE_COHERENT;
260 260
261 bl = (size >> 17) - 1; 261 bl = (size >> 17) - 1;
262 if (PVR_VER(mfspr(SPRN_PVR)) != 1) { 262 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_601)) {
263 /* 603, 604, etc. */ 263 /* 603, 604, etc. */
264 /* Do DBAT first */ 264 /* Do DBAT first */
265 wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE 265 wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
@@ -441,7 +441,7 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
441 BUG_ON(first_memblock_base != 0); 441 BUG_ON(first_memblock_base != 0);
442 442
443 /* 601 can only access 16MB at the moment */ 443 /* 601 can only access 16MB at the moment */
444 if (PVR_VER(mfspr(SPRN_PVR)) == 1) 444 if (IS_ENABLED(CONFIG_PPC_BOOK3S_601))
445 memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01000000)); 445 memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01000000));
446 else /* Anything else has 256M mapped */ 446 else /* Anything else has 256M mapped */
447 memblock_set_current_limit(min_t(u64, first_memblock_size, 0x10000000)); 447 memblock_set_current_limit(min_t(u64, first_memblock_size, 0x10000000));
@@ -459,9 +459,6 @@ void __init setup_kuep(bool disabled)
459{ 459{
460 pr_info("Activating Kernel Userspace Execution Prevention\n"); 460 pr_info("Activating Kernel Userspace Execution Prevention\n");
461 461
462 if (cpu_has_feature(CPU_FTR_601))
463 pr_warn("KUEP is not working on powerpc 601 (No NX bit in Seg Regs)\n");
464
465 if (disabled) 462 if (disabled)
466 pr_warn("KUEP cannot be disabled yet on 6xx when compiled in\n"); 463 pr_warn("KUEP cannot be disabled yet on 6xx when compiled in\n");
467} 464}
diff --git a/arch/powerpc/mm/ptdump/bats.c b/arch/powerpc/mm/ptdump/bats.c
index a0d23e96e841..4154feac1da3 100644
--- a/arch/powerpc/mm/ptdump/bats.c
+++ b/arch/powerpc/mm/ptdump/bats.c
@@ -149,7 +149,7 @@ static int bats_show_603(struct seq_file *m, void *v)
149 149
150static int bats_open(struct inode *inode, struct file *file) 150static int bats_open(struct inode *inode, struct file *file)
151{ 151{
152 if (cpu_has_feature(CPU_FTR_601)) 152 if (IS_ENABLED(CONFIG_PPC_BOOK3S_601))
153 return single_open(file, bats_show_601, NULL); 153 return single_open(file, bats_show_601, NULL);
154 154
155 return single_open(file, bats_show_603, NULL); 155 return single_open(file, bats_show_603, NULL);
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index f3fb79fccc72..d82e3664ffdf 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -197,7 +197,8 @@ endmenu
197 197
198config PPC601_SYNC_FIX 198config PPC601_SYNC_FIX
199 bool "Workarounds for PPC601 bugs" 199 bool "Workarounds for PPC601 bugs"
200 depends on PPC_BOOK3S_32 && PPC_PMAC 200 depends on PPC_BOOK3S_601 && PPC_PMAC
201 default y
201 help 202 help
202 Some versions of the PPC601 (the first PowerPC chip) have bugs which 203 Some versions of the PPC601 (the first PowerPC chip) have bugs which
203 mean that extra synchronization instructions are required near 204 mean that extra synchronization instructions are required near