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authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2017-06-28 16:14:01 -0400
committerBjorn Helgaas <bhelgaas@google.com>2017-07-02 17:14:27 -0400
commit123db533072e58838e32ba9ffc102c476788ec2b (patch)
treedb319009ee9c7a81341d904b8f8609de39e2ecb6
parentae13cb9b1926e821ab8b5f00995f829f10d9fa20 (diff)
PCI: xilinx-nwl: Convert PCI scan API to pci_scan_root_bus_bridge()
The introduction of pci_scan_root_bus_bridge() provides a PCI core API to scan a PCI root bus backed by an already initialized struct pci_host_bridge object, which simplifies the bus scan interface and makes the PCI scan root bus interface easier to generalize as members are added to the struct pci_host_bridge. Convert PCI xilinx-nwl host code to pci_scan_root_bus_bridge() to improve the PCI root bus scanning interface. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
-rw-r--r--drivers/pci/host/pcie-xilinx-nwl.c28
1 files changed, 18 insertions, 10 deletions
diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
index 26e66e8eebbb..e8a589431008 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -791,13 +791,16 @@ static int nwl_pcie_probe(struct platform_device *pdev)
791 struct nwl_pcie *pcie; 791 struct nwl_pcie *pcie;
792 struct pci_bus *bus; 792 struct pci_bus *bus;
793 struct pci_bus *child; 793 struct pci_bus *child;
794 struct pci_host_bridge *bridge;
794 int err; 795 int err;
795 resource_size_t iobase = 0; 796 resource_size_t iobase = 0;
796 LIST_HEAD(res); 797 LIST_HEAD(res);
797 798
798 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); 799 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie));
799 if (!pcie) 800 if (!bridge)
800 return -ENOMEM; 801 return -ENODEV;
802
803 pcie = pci_host_bridge_priv(bridge);
801 804
802 pcie->dev = dev; 805 pcie->dev = dev;
803 pcie->ecam_value = NWL_ECAM_VALUE_DEFAULT; 806 pcie->ecam_value = NWL_ECAM_VALUE_DEFAULT;
@@ -830,12 +833,11 @@ static int nwl_pcie_probe(struct platform_device *pdev)
830 goto error; 833 goto error;
831 } 834 }
832 835
833 bus = pci_create_root_bus(dev, pcie->root_busno, 836 list_splice_init(&res, &bridge->windows);
834 &nwl_pcie_ops, pcie, &res); 837 bridge->dev.parent = dev;
835 if (!bus) { 838 bridge->sysdata = pcie;
836 err = -ENOMEM; 839 bridge->busnr = pcie->root_busno;
837 goto error; 840 bridge->ops = &nwl_pcie_ops;
838 }
839 841
840 if (IS_ENABLED(CONFIG_PCI_MSI)) { 842 if (IS_ENABLED(CONFIG_PCI_MSI)) {
841 err = nwl_pcie_enable_msi(pcie); 843 err = nwl_pcie_enable_msi(pcie);
@@ -844,7 +846,13 @@ static int nwl_pcie_probe(struct platform_device *pdev)
844 goto error; 846 goto error;
845 } 847 }
846 } 848 }
847 pci_scan_child_bus(bus); 849
850 err = pci_scan_root_bus_bridge(bridge);
851 if (err)
852 goto error;
853
854 bus = bridge->bus;
855
848 pci_assign_unassigned_bus_resources(bus); 856 pci_assign_unassigned_bus_resources(bus);
849 list_for_each_entry(child, &bus->children, node) 857 list_for_each_entry(child, &bus->children, node)
850 pcie_bus_configure_settings(child); 858 pcie_bus_configure_settings(child);