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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2013-05-17 10:55:14 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-06-12 08:07:38 -0400
commit111fad56a8e6b0478a5156a82f5f3709150f93a9 (patch)
tree8f7d9201aeb064f357d2475bea9cf5e0b8d77421
parent31b2eaccd60c3480ad81a3302faed463fdc5df12 (diff)
ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF and SDHI
Add MSTP clock definitions and fix aliases for the two MMCIF and three SDHI interfaces on r8a73a4 (APE6). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/clock-r8a73a4.c22
1 files changed, 17 insertions, 5 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
index f6227bb10aca..5f7fe628b8a1 100644
--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
@@ -29,6 +29,7 @@
29#define CPG_LEN 0x270 29#define CPG_LEN 0x270
30 30
31#define SMSTPCR2 0xe6150138 31#define SMSTPCR2 0xe6150138
32#define SMSTPCR3 0xe615013c
32#define SMSTPCR5 0xe6150144 33#define SMSTPCR5 0xe6150144
33 34
34#define FRQCRA 0xE6150000 35#define FRQCRA 0xE6150000
@@ -348,6 +349,7 @@ static struct clk div6_clks[DIV6_NR] = {
348/* MSTP */ 349/* MSTP */
349enum { 350enum {
350 MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, 351 MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
352 MSTP315, MSTP314, MSTP313, MSTP312, MSTP305,
351 MSTP522, 353 MSTP522,
352 MSTP_NR 354 MSTP_NR
353}; 355};
@@ -359,6 +361,11 @@ static struct clk mstp_clks[MSTP_NR] = {
359 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */ 361 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
360 [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */ 362 [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
361 [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */ 363 [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
364 [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
365 [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
366 [MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
367 [MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
368 [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
362 [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */ 369 [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
363}; 370};
364 371
@@ -381,11 +388,6 @@ static struct clk_lookup lookups[] = {
381 388
382 /* DIV6 */ 389 /* DIV6 */
383 CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), 390 CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
384 CLKDEV_CON_ID("sdhi0", &div6_clks[DIV6_SDHI0]),
385 CLKDEV_CON_ID("sdhi1", &div6_clks[DIV6_SDHI1]),
386 CLKDEV_CON_ID("sdhi2", &div6_clks[DIV6_SDHI2]),
387 CLKDEV_CON_ID("mmc0", &div6_clks[DIV6_MMC0]),
388 CLKDEV_CON_ID("mmc1", &div6_clks[DIV6_MMC1]),
389 CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]), 391 CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]),
390 CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]), 392 CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]),
391 CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]), 393 CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]),
@@ -406,6 +408,16 @@ static struct clk_lookup lookups[] = {
406 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), 408 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
407 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]), 409 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
408 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), 410 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
411 CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
412 CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
413 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
414 CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
415 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
416 CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
417 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
418 CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
419 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
420 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
409 421
410 /* for DT */ 422 /* for DT */
411 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), 423 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),