diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-10-04 12:18:44 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-10-04 12:18:44 -0400 |
commit | 10be83cc641884e7c5dfcc0d3e74ba9f3b332e27 (patch) | |
tree | e7c91156b438cffa7172f23a4b44a81dcc8a9cd0 | |
parent | 1b0350c355b2f32bcbd453310bf6dfb50cbe965f (diff) | |
parent | d8938c981f58ee344687b7910a611ac345960045 (diff) |
Merge tag 'drm-fixes-2018-10-04' of git://anongit.freedesktop.org/drm/drm
Dave writes:
"drm exynos, tda9950 and intel fixes
3 i915 fixes:
compressed error handling zlib fix
compiler warning cleanup
and a minor code cleanup
2 tda9950:
Two fixes for the HDMI CEC
1 exynos:
A fix required for IOMMU interaction."
* tag 'drm-fixes-2018-10-04' of git://anongit.freedesktop.org/drm/drm:
drm/i915: Handle incomplete Z_FINISH for compressed error states
drm/i915: Avoid compiler warning for maybe unused gu_misc_iir
drm/i915: Do not redefine the has_csr parameter.
drm/exynos: Use selected dma_dev default iommu domain instead of a fake one
drm/i2c: tda9950: set MAX_RETRIES for errors only
drm/i2c: tda9950: fix timeout counter check
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_iommu.h | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/i2c/tda9950.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gpu_error.c | 88 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gpu_error.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 1 |
6 files changed, 85 insertions, 77 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_iommu.h b/drivers/gpu/drm/exynos/exynos_drm_iommu.h index 87f6b5672e11..797d9ee5f15a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_iommu.h +++ b/drivers/gpu/drm/exynos/exynos_drm_iommu.h | |||
@@ -55,37 +55,12 @@ static inline void __exynos_iommu_detach(struct exynos_drm_private *priv, | |||
55 | static inline int __exynos_iommu_create_mapping(struct exynos_drm_private *priv, | 55 | static inline int __exynos_iommu_create_mapping(struct exynos_drm_private *priv, |
56 | unsigned long start, unsigned long size) | 56 | unsigned long start, unsigned long size) |
57 | { | 57 | { |
58 | struct iommu_domain *domain; | 58 | priv->mapping = iommu_get_domain_for_dev(priv->dma_dev); |
59 | int ret; | ||
60 | |||
61 | domain = iommu_domain_alloc(priv->dma_dev->bus); | ||
62 | if (!domain) | ||
63 | return -ENOMEM; | ||
64 | |||
65 | ret = iommu_get_dma_cookie(domain); | ||
66 | if (ret) | ||
67 | goto free_domain; | ||
68 | |||
69 | ret = iommu_dma_init_domain(domain, start, size, NULL); | ||
70 | if (ret) | ||
71 | goto put_cookie; | ||
72 | |||
73 | priv->mapping = domain; | ||
74 | return 0; | 59 | return 0; |
75 | |||
76 | put_cookie: | ||
77 | iommu_put_dma_cookie(domain); | ||
78 | free_domain: | ||
79 | iommu_domain_free(domain); | ||
80 | return ret; | ||
81 | } | 60 | } |
82 | 61 | ||
83 | static inline void __exynos_iommu_release_mapping(struct exynos_drm_private *priv) | 62 | static inline void __exynos_iommu_release_mapping(struct exynos_drm_private *priv) |
84 | { | 63 | { |
85 | struct iommu_domain *domain = priv->mapping; | ||
86 | |||
87 | iommu_put_dma_cookie(domain); | ||
88 | iommu_domain_free(domain); | ||
89 | priv->mapping = NULL; | 64 | priv->mapping = NULL; |
90 | } | 65 | } |
91 | 66 | ||
@@ -94,7 +69,9 @@ static inline int __exynos_iommu_attach(struct exynos_drm_private *priv, | |||
94 | { | 69 | { |
95 | struct iommu_domain *domain = priv->mapping; | 70 | struct iommu_domain *domain = priv->mapping; |
96 | 71 | ||
97 | return iommu_attach_device(domain, dev); | 72 | if (dev != priv->dma_dev) |
73 | return iommu_attach_device(domain, dev); | ||
74 | return 0; | ||
98 | } | 75 | } |
99 | 76 | ||
100 | static inline void __exynos_iommu_detach(struct exynos_drm_private *priv, | 77 | static inline void __exynos_iommu_detach(struct exynos_drm_private *priv, |
@@ -102,7 +79,8 @@ static inline void __exynos_iommu_detach(struct exynos_drm_private *priv, | |||
102 | { | 79 | { |
103 | struct iommu_domain *domain = priv->mapping; | 80 | struct iommu_domain *domain = priv->mapping; |
104 | 81 | ||
105 | iommu_detach_device(domain, dev); | 82 | if (dev != priv->dma_dev) |
83 | iommu_detach_device(domain, dev); | ||
106 | } | 84 | } |
107 | #else | 85 | #else |
108 | #error Unsupported architecture and IOMMU/DMA-mapping glue code | 86 | #error Unsupported architecture and IOMMU/DMA-mapping glue code |
diff --git a/drivers/gpu/drm/i2c/tda9950.c b/drivers/gpu/drm/i2c/tda9950.c index 5d2f0d548469..250b5e02a314 100644 --- a/drivers/gpu/drm/i2c/tda9950.c +++ b/drivers/gpu/drm/i2c/tda9950.c | |||
@@ -191,7 +191,8 @@ static irqreturn_t tda9950_irq(int irq, void *data) | |||
191 | break; | 191 | break; |
192 | } | 192 | } |
193 | /* TDA9950 executes all retries for us */ | 193 | /* TDA9950 executes all retries for us */ |
194 | tx_status |= CEC_TX_STATUS_MAX_RETRIES; | 194 | if (tx_status != CEC_TX_STATUS_OK) |
195 | tx_status |= CEC_TX_STATUS_MAX_RETRIES; | ||
195 | cec_transmit_done(priv->adap, tx_status, arb_lost_cnt, | 196 | cec_transmit_done(priv->adap, tx_status, arb_lost_cnt, |
196 | nack_cnt, 0, err_cnt); | 197 | nack_cnt, 0, err_cnt); |
197 | break; | 198 | break; |
@@ -310,7 +311,7 @@ static void tda9950_release(struct tda9950_priv *priv) | |||
310 | /* Wait up to .5s for it to signal non-busy */ | 311 | /* Wait up to .5s for it to signal non-busy */ |
311 | do { | 312 | do { |
312 | csr = tda9950_read(client, REG_CSR); | 313 | csr = tda9950_read(client, REG_CSR); |
313 | if (!(csr & CSR_BUSY) || --timeout) | 314 | if (!(csr & CSR_BUSY) || !--timeout) |
314 | break; | 315 | break; |
315 | msleep(10); | 316 | msleep(10); |
316 | } while (1); | 317 | } while (1); |
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index f7f2aa71d8d9..a262a64f5625 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c | |||
@@ -232,6 +232,20 @@ static bool compress_init(struct compress *c) | |||
232 | return true; | 232 | return true; |
233 | } | 233 | } |
234 | 234 | ||
235 | static void *compress_next_page(struct drm_i915_error_object *dst) | ||
236 | { | ||
237 | unsigned long page; | ||
238 | |||
239 | if (dst->page_count >= dst->num_pages) | ||
240 | return ERR_PTR(-ENOSPC); | ||
241 | |||
242 | page = __get_free_page(GFP_ATOMIC | __GFP_NOWARN); | ||
243 | if (!page) | ||
244 | return ERR_PTR(-ENOMEM); | ||
245 | |||
246 | return dst->pages[dst->page_count++] = (void *)page; | ||
247 | } | ||
248 | |||
235 | static int compress_page(struct compress *c, | 249 | static int compress_page(struct compress *c, |
236 | void *src, | 250 | void *src, |
237 | struct drm_i915_error_object *dst) | 251 | struct drm_i915_error_object *dst) |
@@ -245,19 +259,14 @@ static int compress_page(struct compress *c, | |||
245 | 259 | ||
246 | do { | 260 | do { |
247 | if (zstream->avail_out == 0) { | 261 | if (zstream->avail_out == 0) { |
248 | unsigned long page; | 262 | zstream->next_out = compress_next_page(dst); |
249 | 263 | if (IS_ERR(zstream->next_out)) | |
250 | page = __get_free_page(GFP_ATOMIC | __GFP_NOWARN); | 264 | return PTR_ERR(zstream->next_out); |
251 | if (!page) | ||
252 | return -ENOMEM; | ||
253 | 265 | ||
254 | dst->pages[dst->page_count++] = (void *)page; | ||
255 | |||
256 | zstream->next_out = (void *)page; | ||
257 | zstream->avail_out = PAGE_SIZE; | 266 | zstream->avail_out = PAGE_SIZE; |
258 | } | 267 | } |
259 | 268 | ||
260 | if (zlib_deflate(zstream, Z_SYNC_FLUSH) != Z_OK) | 269 | if (zlib_deflate(zstream, Z_NO_FLUSH) != Z_OK) |
261 | return -EIO; | 270 | return -EIO; |
262 | } while (zstream->avail_in); | 271 | } while (zstream->avail_in); |
263 | 272 | ||
@@ -268,19 +277,42 @@ static int compress_page(struct compress *c, | |||
268 | return 0; | 277 | return 0; |
269 | } | 278 | } |
270 | 279 | ||
271 | static void compress_fini(struct compress *c, | 280 | static int compress_flush(struct compress *c, |
272 | struct drm_i915_error_object *dst) | 281 | struct drm_i915_error_object *dst) |
273 | { | 282 | { |
274 | struct z_stream_s *zstream = &c->zstream; | 283 | struct z_stream_s *zstream = &c->zstream; |
275 | 284 | ||
276 | if (dst) { | 285 | do { |
277 | zlib_deflate(zstream, Z_FINISH); | 286 | switch (zlib_deflate(zstream, Z_FINISH)) { |
278 | dst->unused = zstream->avail_out; | 287 | case Z_OK: /* more space requested */ |
279 | } | 288 | zstream->next_out = compress_next_page(dst); |
289 | if (IS_ERR(zstream->next_out)) | ||
290 | return PTR_ERR(zstream->next_out); | ||
291 | |||
292 | zstream->avail_out = PAGE_SIZE; | ||
293 | break; | ||
294 | |||
295 | case Z_STREAM_END: | ||
296 | goto end; | ||
297 | |||
298 | default: /* any error */ | ||
299 | return -EIO; | ||
300 | } | ||
301 | } while (1); | ||
302 | |||
303 | end: | ||
304 | memset(zstream->next_out, 0, zstream->avail_out); | ||
305 | dst->unused = zstream->avail_out; | ||
306 | return 0; | ||
307 | } | ||
308 | |||
309 | static void compress_fini(struct compress *c, | ||
310 | struct drm_i915_error_object *dst) | ||
311 | { | ||
312 | struct z_stream_s *zstream = &c->zstream; | ||
280 | 313 | ||
281 | zlib_deflateEnd(zstream); | 314 | zlib_deflateEnd(zstream); |
282 | kfree(zstream->workspace); | 315 | kfree(zstream->workspace); |
283 | |||
284 | if (c->tmp) | 316 | if (c->tmp) |
285 | free_page((unsigned long)c->tmp); | 317 | free_page((unsigned long)c->tmp); |
286 | } | 318 | } |
@@ -319,6 +351,12 @@ static int compress_page(struct compress *c, | |||
319 | return 0; | 351 | return 0; |
320 | } | 352 | } |
321 | 353 | ||
354 | static int compress_flush(struct compress *c, | ||
355 | struct drm_i915_error_object *dst) | ||
356 | { | ||
357 | return 0; | ||
358 | } | ||
359 | |||
322 | static void compress_fini(struct compress *c, | 360 | static void compress_fini(struct compress *c, |
323 | struct drm_i915_error_object *dst) | 361 | struct drm_i915_error_object *dst) |
324 | { | 362 | { |
@@ -917,6 +955,7 @@ i915_error_object_create(struct drm_i915_private *i915, | |||
917 | unsigned long num_pages; | 955 | unsigned long num_pages; |
918 | struct sgt_iter iter; | 956 | struct sgt_iter iter; |
919 | dma_addr_t dma; | 957 | dma_addr_t dma; |
958 | int ret; | ||
920 | 959 | ||
921 | if (!vma) | 960 | if (!vma) |
922 | return NULL; | 961 | return NULL; |
@@ -930,6 +969,7 @@ i915_error_object_create(struct drm_i915_private *i915, | |||
930 | 969 | ||
931 | dst->gtt_offset = vma->node.start; | 970 | dst->gtt_offset = vma->node.start; |
932 | dst->gtt_size = vma->node.size; | 971 | dst->gtt_size = vma->node.size; |
972 | dst->num_pages = num_pages; | ||
933 | dst->page_count = 0; | 973 | dst->page_count = 0; |
934 | dst->unused = 0; | 974 | dst->unused = 0; |
935 | 975 | ||
@@ -938,28 +978,26 @@ i915_error_object_create(struct drm_i915_private *i915, | |||
938 | return NULL; | 978 | return NULL; |
939 | } | 979 | } |
940 | 980 | ||
981 | ret = -EINVAL; | ||
941 | for_each_sgt_dma(dma, iter, vma->pages) { | 982 | for_each_sgt_dma(dma, iter, vma->pages) { |
942 | void __iomem *s; | 983 | void __iomem *s; |
943 | int ret; | ||
944 | 984 | ||
945 | ggtt->vm.insert_page(&ggtt->vm, dma, slot, I915_CACHE_NONE, 0); | 985 | ggtt->vm.insert_page(&ggtt->vm, dma, slot, I915_CACHE_NONE, 0); |
946 | 986 | ||
947 | s = io_mapping_map_atomic_wc(&ggtt->iomap, slot); | 987 | s = io_mapping_map_atomic_wc(&ggtt->iomap, slot); |
948 | ret = compress_page(&compress, (void __force *)s, dst); | 988 | ret = compress_page(&compress, (void __force *)s, dst); |
949 | io_mapping_unmap_atomic(s); | 989 | io_mapping_unmap_atomic(s); |
950 | |||
951 | if (ret) | 990 | if (ret) |
952 | goto unwind; | 991 | break; |
953 | } | 992 | } |
954 | goto out; | ||
955 | 993 | ||
956 | unwind: | 994 | if (ret || compress_flush(&compress, dst)) { |
957 | while (dst->page_count--) | 995 | while (dst->page_count--) |
958 | free_page((unsigned long)dst->pages[dst->page_count]); | 996 | free_page((unsigned long)dst->pages[dst->page_count]); |
959 | kfree(dst); | 997 | kfree(dst); |
960 | dst = NULL; | 998 | dst = NULL; |
999 | } | ||
961 | 1000 | ||
962 | out: | ||
963 | compress_fini(&compress, dst); | 1001 | compress_fini(&compress, dst); |
964 | ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE); | 1002 | ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE); |
965 | return dst; | 1003 | return dst; |
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index f893a4e8b783..8710fb18ed74 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h | |||
@@ -135,6 +135,7 @@ struct i915_gpu_state { | |||
135 | struct drm_i915_error_object { | 135 | struct drm_i915_error_object { |
136 | u64 gtt_offset; | 136 | u64 gtt_offset; |
137 | u64 gtt_size; | 137 | u64 gtt_size; |
138 | int num_pages; | ||
138 | int page_count; | 139 | int page_count; |
139 | int unused; | 140 | int unused; |
140 | u32 *pages[0]; | 141 | u32 *pages[0]; |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 90628a47ae17..29877969310d 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -3091,36 +3091,27 @@ gen11_gt_irq_handler(struct drm_i915_private * const i915, | |||
3091 | spin_unlock(&i915->irq_lock); | 3091 | spin_unlock(&i915->irq_lock); |
3092 | } | 3092 | } |
3093 | 3093 | ||
3094 | static void | 3094 | static u32 |
3095 | gen11_gu_misc_irq_ack(struct drm_i915_private *dev_priv, const u32 master_ctl, | 3095 | gen11_gu_misc_irq_ack(struct drm_i915_private *dev_priv, const u32 master_ctl) |
3096 | u32 *iir) | ||
3097 | { | 3096 | { |
3098 | void __iomem * const regs = dev_priv->regs; | 3097 | void __iomem * const regs = dev_priv->regs; |
3098 | u32 iir; | ||
3099 | 3099 | ||
3100 | if (!(master_ctl & GEN11_GU_MISC_IRQ)) | 3100 | if (!(master_ctl & GEN11_GU_MISC_IRQ)) |
3101 | return; | 3101 | return 0; |
3102 | |||
3103 | iir = raw_reg_read(regs, GEN11_GU_MISC_IIR); | ||
3104 | if (likely(iir)) | ||
3105 | raw_reg_write(regs, GEN11_GU_MISC_IIR, iir); | ||
3102 | 3106 | ||
3103 | *iir = raw_reg_read(regs, GEN11_GU_MISC_IIR); | 3107 | return iir; |
3104 | if (likely(*iir)) | ||
3105 | raw_reg_write(regs, GEN11_GU_MISC_IIR, *iir); | ||
3106 | } | 3108 | } |
3107 | 3109 | ||
3108 | static void | 3110 | static void |
3109 | gen11_gu_misc_irq_handler(struct drm_i915_private *dev_priv, | 3111 | gen11_gu_misc_irq_handler(struct drm_i915_private *dev_priv, const u32 iir) |
3110 | const u32 master_ctl, const u32 iir) | ||
3111 | { | 3112 | { |
3112 | if (!(master_ctl & GEN11_GU_MISC_IRQ)) | ||
3113 | return; | ||
3114 | |||
3115 | if (unlikely(!iir)) { | ||
3116 | DRM_ERROR("GU_MISC iir blank!\n"); | ||
3117 | return; | ||
3118 | } | ||
3119 | |||
3120 | if (iir & GEN11_GU_MISC_GSE) | 3113 | if (iir & GEN11_GU_MISC_GSE) |
3121 | intel_opregion_asle_intr(dev_priv); | 3114 | intel_opregion_asle_intr(dev_priv); |
3122 | else | ||
3123 | DRM_ERROR("Unexpected GU_MISC interrupt 0x%x\n", iir); | ||
3124 | } | 3115 | } |
3125 | 3116 | ||
3126 | static irqreturn_t gen11_irq_handler(int irq, void *arg) | 3117 | static irqreturn_t gen11_irq_handler(int irq, void *arg) |
@@ -3157,12 +3148,12 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) | |||
3157 | enable_rpm_wakeref_asserts(i915); | 3148 | enable_rpm_wakeref_asserts(i915); |
3158 | } | 3149 | } |
3159 | 3150 | ||
3160 | gen11_gu_misc_irq_ack(i915, master_ctl, &gu_misc_iir); | 3151 | gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl); |
3161 | 3152 | ||
3162 | /* Acknowledge and enable interrupts. */ | 3153 | /* Acknowledge and enable interrupts. */ |
3163 | raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ | master_ctl); | 3154 | raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ | master_ctl); |
3164 | 3155 | ||
3165 | gen11_gu_misc_irq_handler(i915, master_ctl, gu_misc_iir); | 3156 | gen11_gu_misc_irq_handler(i915, gu_misc_iir); |
3166 | 3157 | ||
3167 | return IRQ_HANDLED; | 3158 | return IRQ_HANDLED; |
3168 | } | 3159 | } |
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 6a4d1388ad2d..1df3ce134cd0 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c | |||
@@ -592,7 +592,6 @@ static const struct intel_device_info intel_cannonlake_info = { | |||
592 | GEN10_FEATURES, \ | 592 | GEN10_FEATURES, \ |
593 | GEN(11), \ | 593 | GEN(11), \ |
594 | .ddb_size = 2048, \ | 594 | .ddb_size = 2048, \ |
595 | .has_csr = 0, \ | ||
596 | .has_logical_ring_elsq = 1 | 595 | .has_logical_ring_elsq = 1 |
597 | 596 | ||
598 | static const struct intel_device_info intel_icelake_11_info = { | 597 | static const struct intel_device_info intel_icelake_11_info = { |