aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2015-06-23 16:34:02 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-06-23 16:34:02 -0400
commit10b4b096d0c7e9f1b5f84c2a0658b2963e1e6ed0 (patch)
tree5fce399661c128dddc2668ab1ffdb3f66c4f4e3f
parentc70c5fb2b96dae0996fb0877d996458d3ca57eda (diff)
parent38e003f4b5dc405158b9ce625d8cc2b336d45497 (diff)
Merge tag 'gpio-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull gpio updates from Linus Walleij: "This is the big bulk of GPIO changes queued for the v4.2 kernel series: - a big set of cleanups to the aged sysfs interface from Johan Hovold. To get these in, v4.1-rc3 was merged into the tree as the first patch in that series had to go into stable. This makes the locking much more fine-grained (get rid of the "big GPIO lock(s)" and store states in the GPIO descriptors. - rename gpiod_[g|s]et_array() to gpiod_[g|s]et_array_value() to avoid confusions. - New drivers for: * NXP LPC18xx (currently LPC1850) * NetLogic XLP * Broadcom STB SoC's * Axis ETRAXFS * Zynq Ultrascale+ (subdriver) - ACPI: * make it possible to retrieve GpioInt resources from a GPIO device using acpi_dev_gpio_irq_get() * merge some dependent I2C changes exploiting this. * support the ARM X-Gene GPIO standby driver. - make it possible for the generic GPIO driver to read back the value set registers to reflect current status. - loads of OMAP IRQ handling fixes. - incremental improvements to Kona, max732x, OMAP, MXC, RCAR, PCA953x, STP-XWAY, PCF857x, Crystalcove, TB10x. - janitorial (constification, checkpatch cleanups)" * tag 'gpio-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (71 commits) gpio: Fix checkpatch.pl issues gpio: pcf857x: handle only enabled irqs gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found GPIO / ACPI: export acpi_gpiochip_request(free)_interrupts for module use gpio: improve error reporting on own descriptors gpio: promote own request failure to pr_err() gpio: Added support to Zynq Ultrascale+ MPSoC gpio: add ETRAXFS GPIO driver fix documentation after renaming gpiod_set_array to gpiod_set_array_value gpio: Add GPIO support for Broadcom STB SoCs gpio: xgene: add ACPI support for APM X-Gene GPIO standby driver gpio: tb10x: Drop unneeded free_irq() call gpio: crystalcove: set IRQCHIP_SKIP_SET_WAKE for the irqchip gpio: stp-xway: Use the of_property_read_u32 helper gpio: pcf857x: Check for irq_set_irq_wake() failures gpio-stp-xway: Fix enabling the highest bit of the PHY LEDs gpio: Prevent an integer overflow in the pca953x driver gpio: omap: rework omap_gpio_irq_startup to handle current pin state properly gpio: omap: rework omap_gpio_request to touch only gpio specific registers gpio: omap: rework omap_x_irq_shutdown to touch only irqs specific registers ...
Diffstat
-rw-r--r--Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt65
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt21
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-xlp.txt47
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-zynq.txt2
-rw-r--r--Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt39
-rw-r--r--Documentation/gpio/consumer.txt28
-rw-r--r--Documentation/gpio/gpio-legacy.txt9
-rw-r--r--Documentation/gpio/sysfs.txt8
-rw-r--r--Documentation/zh_CN/gpio.txt8
-rw-r--r--MAINTAINERS7
-rw-r--r--drivers/gpio/Kconfig39
-rw-r--r--drivers/gpio/Makefile4
-rw-r--r--drivers/gpio/gpio-altera.c3
-rw-r--r--drivers/gpio/gpio-bcm-kona.c26
-rw-r--r--drivers/gpio/gpio-brcmstb.c252
-rw-r--r--drivers/gpio/gpio-crystalcove.c5
-rw-r--r--drivers/gpio/gpio-dln2.c1
-rw-r--r--drivers/gpio/gpio-etraxfs.c176
-rw-r--r--drivers/gpio/gpio-f7188x.c4
-rw-r--r--drivers/gpio/gpio-generic.c22
-rw-r--r--drivers/gpio/gpio-it8761e.c2
-rw-r--r--drivers/gpio/gpio-lpc18xx.c180
-rw-r--r--drivers/gpio/gpio-lynxpoint.c2
-rw-r--r--drivers/gpio/gpio-max732x.c21
-rw-r--r--drivers/gpio/gpio-moxart.c17
-rw-r--r--drivers/gpio/gpio-mxc.c5
-rw-r--r--drivers/gpio/gpio-mxs.c2
-rw-r--r--drivers/gpio/gpio-omap.c83
-rw-r--r--drivers/gpio/gpio-pca953x.c23
-rw-r--r--drivers/gpio/gpio-pcf857x.c56
-rw-r--r--drivers/gpio/gpio-rcar.c13
-rw-r--r--drivers/gpio/gpio-stp-xway.c29
-rw-r--r--drivers/gpio/gpio-tb10x.c1
-rw-r--r--drivers/gpio/gpio-tegra.c2
-rw-r--r--drivers/gpio/gpio-ts5500.c2
-rw-r--r--drivers/gpio/gpio-xgene-sb.c22
-rw-r--r--drivers/gpio/gpio-xilinx.c4
-rw-r--r--drivers/gpio/gpio-xlp.c427
-rw-r--r--drivers/gpio/gpio-zynq.c193
-rw-r--r--drivers/gpio/gpiolib-acpi.c40
-rw-r--r--drivers/gpio/gpiolib-of.c2
-rw-r--r--drivers/gpio/gpiolib-sysfs.c567
-rw-r--r--drivers/gpio/gpiolib.c112
-rw-r--r--drivers/gpio/gpiolib.h16
-rw-r--r--drivers/i2c/i2c-core.c12
-rw-r--r--drivers/net/phy/mdio-mux-gpio.c3
-rw-r--r--drivers/tty/serial/serial_mctrl_gpio.c2
-rw-r--r--include/asm-generic/gpio.h5
-rw-r--r--include/linux/acpi.h7
-rw-r--r--include/linux/basic_mmio_gpio.h1
-rw-r--r--include/linux/gpio.h7
-rw-r--r--include/linux/gpio/consumer.h43
-rw-r--r--include/linux/gpio/driver.h13
-rw-r--r--include/linux/platform_data/gpio-omap.h12
54 files changed, 2047 insertions, 645 deletions
diff --git a/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt b/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt
new file mode 100644
index 000000000000..435f1bcca341
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt
@@ -0,0 +1,65 @@
1Broadcom STB "UPG GIO" GPIO controller
2
3The controller's registers are organized as sets of eight 32-bit
4registers with each set controlling a bank of up to 32 pins. A single
5interrupt is shared for all of the banks handled by the controller.
6
7Required properties:
8
9- compatible:
10 Must be "brcm,brcmstb-gpio"
11
12- reg:
13 Define the base and range of the I/O address space containing
14 the brcmstb GPIO controller registers
15
16- #gpio-cells:
17 Should be <2>. The first cell is the pin number (within the controller's
18 pin space), and the second is used for the following:
19 bit[0]: polarity (0 for active-high, 1 for active-low)
20
21- gpio-controller:
22 Specifies that the node is a GPIO controller.
23
24- brcm,gpio-bank-widths:
25 Number of GPIO lines for each bank. Number of elements must
26 correspond to number of banks suggested by the 'reg' property.
27
28Optional properties:
29
30- interrupts:
31 The interrupt shared by all GPIO lines for this controller.
32
33- interrupt-parent:
34 phandle of the parent interrupt controller
35
36- #interrupt-cells:
37 Should be <2>. The first cell is the GPIO number, the second should specify
38 flags. The following subset of flags is supported:
39 - bits[3:0] trigger type and level flags
40 1 = low-to-high edge triggered
41 2 = high-to-low edge triggered
42 4 = active high level-sensitive
43 8 = active low level-sensitive
44 Valid combinations are 1, 2, 3, 4, 8.
45 See also Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
46
47- interrupt-controller:
48 Marks the device node as an interrupt controller
49
50- interrupt-names:
51 The name of the IRQ resource used by this controller
52
53Example:
54 upg_gio: gpio@f040a700 {
55 #gpio-cells = <0x2>;
56 #interrupt-cells = <0x2>;
57 compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
58 gpio-controller;
59 interrupt-controller;
60 reg = <0xf040a700 0x80>;
61 interrupt-parent = <0xf>;
62 interrupts = <0x6>;
63 interrupt-names = "upg_gio";
64 brcm,gpio-bank-widths = <0x20 0x20 0x20 0x18>;
65 };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt b/Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt
new file mode 100644
index 000000000000..abf4db736c6e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt
@@ -0,0 +1,21 @@
1Axis ETRAX FS General I/O controller bindings
2
3Required properties:
4
5- compatible:
6 - "axis,etraxfs-gio"
7- reg: Physical base address and length of the controller's registers.
8- #gpio-cells: Should be 3
9 - The first cell is the gpio offset number.
10 - The second cell is reserved and is currently unused.
11 - The third cell is the port number (hex).
12- gpio-controller: Marks the device node as a GPIO controller.
13
14Example:
15
16 gio: gpio@b001a000 {
17 compatible = "axis,etraxfs-gio";
18 reg = <0xb001a000 0x1000>;
19 gpio-controller;
20 #gpio-cells = <3>;
21 };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-xlp.txt b/Documentation/devicetree/bindings/gpio/gpio-xlp.txt
new file mode 100644
index 000000000000..262ee4ddf2cb
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-xlp.txt
@@ -0,0 +1,47 @@
1Netlogic XLP Family GPIO
2========================
3
4This GPIO driver is used for following Netlogic XLP SoCs:
5 XLP832, XLP316, XLP208, XLP980, XLP532
6
7Required properties:
8-------------------
9
10- compatible: Should be one of the following:
11 - "netlogic,xlp832-gpio": For Netlogic XLP832
12 - "netlogic,xlp316-gpio": For Netlogic XLP316
13 - "netlogic,xlp208-gpio": For Netlogic XLP208
14 - "netlogic,xlp980-gpio": For Netlogic XLP980
15 - "netlogic,xlp532-gpio": For Netlogic XLP532
16- reg: Physical base address and length of the controller's registers.
17- #gpio-cells: Should be two. The first cell is the pin number and the second
18 cell is used to specify optional parameters (currently unused).
19- gpio-controller: Marks the device node as a GPIO controller.
20- nr-gpios: Number of GPIO pins supported by the controller.
21- interrupt-cells: Should be two. The first cell is the GPIO Number. The
22 second cell is used to specify flags. The following subset of flags is
23 supported:
24 - trigger type:
25 1 = low to high edge triggered.
26 2 = high to low edge triggered.
27 4 = active high level-sensitive.
28 8 = active low level-sensitive.
29- interrupts: Interrupt number for this device.
30- interrupt-parent: phandle of the parent interrupt controller.
31- interrupt-controller: Identifies the node as an interrupt controller.
32
33Example:
34
35 gpio: xlp_gpio@34000 {
36 compatible = "netlogic,xlp316-gpio";
37 reg = <0 0x34100 0x1000
38 0 0x35100 0x1000>;
39 #gpio-cells = <2>;
40 gpio-controller;
41 nr-gpios = <57>;
42
43 #interrupt-cells = <2>;
44 interrupt-parent = <&pic>;
45 interrupts = <39>;
46 interrupt-controller;
47 };
diff --git a/Documentation/devicetree/bindings/gpio/gpio-zynq.txt b/Documentation/devicetree/bindings/gpio/gpio-zynq.txt
index 986371a4be2c..db4c6a663c03 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-zynq.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-zynq.txt
@@ -6,7 +6,7 @@ Required properties:
6 - First cell is the GPIO line number 6 - First cell is the GPIO line number
7 - Second cell is used to specify optional 7 - Second cell is used to specify optional
8 parameters (unused) 8 parameters (unused)
9- compatible : Should be "xlnx,zynq-gpio-1.0" 9- compatible : Should be "xlnx,zynq-gpio-1.0" or "xlnx,zynqmp-gpio-1.0"
10- clocks : Clock specifier (see clock bindings for details) 10- clocks : Clock specifier (see clock bindings for details)
11- gpio-controller : Marks the device node as a GPIO controller. 11- gpio-controller : Marks the device node as a GPIO controller.
12- interrupts : Interrupt specifier (see interrupt bindings for 12- interrupts : Interrupt specifier (see interrupt bindings for
diff --git a/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt b/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt
new file mode 100644
index 000000000000..eb7cdd69e10b
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt
@@ -0,0 +1,39 @@
1NXP LPC18xx/43xx GPIO controller Device Tree Bindings
2-----------------------------------------------------
3
4Required properties:
5- compatible : Should be "nxp,lpc1850-gpio"
6- reg : Address and length of the register set for the device
7- clocks : Clock specifier (see clock bindings for details)
8- gpio-controller : Marks the device node as a GPIO controller.
9- #gpio-cells : Should be two
10 - First cell is the GPIO line number
11 - Second cell is used to specify polarity
12
13Optional properties:
14- gpio-ranges : Mapping between GPIO and pinctrl
15
16Example:
17#define LPC_GPIO(port, pin) (port * 32 + pin)
18#define LPC_PIN(port, pin) (0x##port * 32 + pin)
19
20gpio: gpio@400f4000 {
21 compatible = "nxp,lpc1850-gpio";
22 reg = <0x400f4000 0x4000>;
23 clocks = <&ccu1 CLK_CPU_GPIO>;
24 gpio-controller;
25 #gpio-cells = <2>;
26 gpio-ranges = <&pinctrl LPC_GPIO(0,0) LPC_PIN(0,0) 2>,
27 ...
28 <&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5) 7>;
29};
30
31gpio_joystick {
32 compatible = "gpio-keys-polled";
33 ...
34
35 button@0 {
36 ...
37 gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>;
38 };
39};
diff --git a/Documentation/gpio/consumer.txt b/Documentation/gpio/consumer.txt
index c21c1313f09e..bbc8b5888b80 100644
--- a/Documentation/gpio/consumer.txt
+++ b/Documentation/gpio/consumer.txt
@@ -241,18 +241,18 @@ Set multiple GPIO outputs with a single function call
241----------------------------------------------------- 241-----------------------------------------------------
242The following functions set the output values of an array of GPIOs: 242The following functions set the output values of an array of GPIOs:
243 243
244 void gpiod_set_array(unsigned int array_size, 244 void gpiod_set_array_value(unsigned int array_size,
245 struct gpio_desc **desc_array, 245 struct gpio_desc **desc_array,
246 int *value_array) 246 int *value_array)
247 void gpiod_set_raw_array(unsigned int array_size, 247 void gpiod_set_raw_array_value(unsigned int array_size,
248 struct gpio_desc **desc_array, 248 struct gpio_desc **desc_array,
249 int *value_array) 249 int *value_array)
250 void gpiod_set_array_cansleep(unsigned int array_size, 250 void gpiod_set_array_value_cansleep(unsigned int array_size,
251 struct gpio_desc **desc_array, 251 struct gpio_desc **desc_array,
252 int *value_array) 252 int *value_array)
253 void gpiod_set_raw_array_cansleep(unsigned int array_size, 253 void gpiod_set_raw_array_value_cansleep(unsigned int array_size,
254 struct gpio_desc **desc_array, 254 struct gpio_desc **desc_array,
255 int *value_array) 255 int *value_array)
256 256
257The array can be an arbitrary set of GPIOs. The functions will try to set 257The array can be an arbitrary set of GPIOs. The functions will try to set
258GPIOs belonging to the same bank or chip simultaneously if supported by the 258GPIOs belonging to the same bank or chip simultaneously if supported by the
@@ -271,8 +271,8 @@ matches the desired group of GPIOs, those GPIOs can be set by simply using
271the struct gpio_descs returned by gpiod_get_array(): 271the struct gpio_descs returned by gpiod_get_array():
272 272
273 struct gpio_descs *my_gpio_descs = gpiod_get_array(...); 273 struct gpio_descs *my_gpio_descs = gpiod_get_array(...);
274 gpiod_set_array(my_gpio_descs->ndescs, my_gpio_descs->desc, 274 gpiod_set_array_value(my_gpio_descs->ndescs, my_gpio_descs->desc,
275 my_gpio_values); 275 my_gpio_values);
276 276
277It is also possible to set a completely arbitrary array of descriptors. The 277It is also possible to set a completely arbitrary array of descriptors. The
278descriptors may be obtained using any combination of gpiod_get() and 278descriptors may be obtained using any combination of gpiod_get() and
diff --git a/Documentation/gpio/gpio-legacy.txt b/Documentation/gpio/gpio-legacy.txt
index 6f83fa965b4b..79ab5648d69b 100644
--- a/Documentation/gpio/gpio-legacy.txt
+++ b/Documentation/gpio/gpio-legacy.txt
@@ -751,9 +751,6 @@ requested using gpio_request():
751 int gpio_export_link(struct device *dev, const char *name, 751 int gpio_export_link(struct device *dev, const char *name,
752 unsigned gpio) 752 unsigned gpio)
753 753
754 /* change the polarity of a GPIO node in sysfs */
755 int gpio_sysfs_set_active_low(unsigned gpio, int value);
756
757After a kernel driver requests a GPIO, it may only be made available in 754After a kernel driver requests a GPIO, it may only be made available in
758the sysfs interface by gpio_export(). The driver can control whether the 755the sysfs interface by gpio_export(). The driver can control whether the
759signal direction may change. This helps drivers prevent userspace code 756signal direction may change. This helps drivers prevent userspace code
@@ -767,9 +764,3 @@ After the GPIO has been exported, gpio_export_link() allows creating
767symlinks from elsewhere in sysfs to the GPIO sysfs node. Drivers can 764symlinks from elsewhere in sysfs to the GPIO sysfs node. Drivers can
768use this to provide the interface under their own device in sysfs with 765use this to provide the interface under their own device in sysfs with
769a descriptive name. 766a descriptive name.
770
771Drivers can use gpio_sysfs_set_active_low() to hide GPIO line polarity
772differences between boards from user space. This only affects the
773sysfs interface. Polarity change can be done both before and after
774gpio_export(), and previously enabled poll(2) support for either
775rising or falling edge will be reconfigured to follow this setting.
diff --git a/Documentation/gpio/sysfs.txt b/Documentation/gpio/sysfs.txt
index c2c3a97f8ff7..535b6a8a7a7c 100644
--- a/Documentation/gpio/sysfs.txt
+++ b/Documentation/gpio/sysfs.txt
@@ -132,9 +132,6 @@ requested using gpio_request():
132 int gpiod_export_link(struct device *dev, const char *name, 132 int gpiod_export_link(struct device *dev, const char *name,
133 struct gpio_desc *desc); 133 struct gpio_desc *desc);
134 134
135 /* change the polarity of a GPIO node in sysfs */
136 int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value);
137
138After a kernel driver requests a GPIO, it may only be made available in 135After a kernel driver requests a GPIO, it may only be made available in
139the sysfs interface by gpiod_export(). The driver can control whether the 136the sysfs interface by gpiod_export(). The driver can control whether the
140signal direction may change. This helps drivers prevent userspace code 137signal direction may change. This helps drivers prevent userspace code
@@ -148,8 +145,3 @@ After the GPIO has been exported, gpiod_export_link() allows creating
148symlinks from elsewhere in sysfs to the GPIO sysfs node. Drivers can 145symlinks from elsewhere in sysfs to the GPIO sysfs node. Drivers can
149use this to provide the interface under their own device in sysfs with 146use this to provide the interface under their own device in sysfs with
150a descriptive name. 147a descriptive name.
151
152Drivers can use gpiod_sysfs_set_active_low() to hide GPIO line polarity
153differences between boards from user space. Polarity change can be done both
154before and after gpiod_export(), and previously enabled poll(2) support for
155either rising or falling edge will be reconfigured to follow this setting.
diff --git a/Documentation/zh_CN/gpio.txt b/Documentation/zh_CN/gpio.txt
index d5b8f01833f4..bce972521065 100644
--- a/Documentation/zh_CN/gpio.txt
+++ b/Documentation/zh_CN/gpio.txt
@@ -638,9 +638,6 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO
638 int gpio_export_link(struct device *dev, const char *name, 638 int gpio_export_link(struct device *dev, const char *name,
639 unsigned gpio) 639 unsigned gpio)
640 640
641 /* 改变 sysfs 中的一个 GPIO 节点的极性 */
642 int gpio_sysfs_set_active_low(unsigned gpio, int value);
643
644在一个内核驱动申请一个 GPIO 之后，它可以通过 gpio_export()使其在 sysfs 641在一个内核驱动申请一个 GPIO 之后，它可以通过 gpio_export()使其在 sysfs
645接口中可见。该驱动可以控制信号方向是否可修改。这有助于防止用户空间代码无意间 642接口中可见。该驱动可以控制信号方向是否可修改。这有助于防止用户空间代码无意间
646破坏重要的系统状态。 643破坏重要的系统状态。
@@ -651,8 +648,3 @@ GPIO 控制器的路径类似 /sys/class/gpio/gpiochip42/ (对于从#42 GPIO
651在 GPIO 被导出之后，gpio_export_link()允许在 sysfs 文件系统的任何地方 648在 GPIO 被导出之后，gpio_export_link()允许在 sysfs 文件系统的任何地方
652创建一个到这个 GPIO sysfs 节点的符号链接。这样驱动就可以通过一个描述性的 649创建一个到这个 GPIO sysfs 节点的符号链接。这样驱动就可以通过一个描述性的
653名字，在 sysfs 中他们所拥有的设备下提供一个(到这个 GPIO sysfs 节点的)接口。 650名字，在 sysfs 中他们所拥有的设备下提供一个(到这个 GPIO sysfs 节点的)接口。
654
655驱动可以使用 gpio_sysfs_set_active_low() 来在用户空间隐藏电路板之间
656GPIO 线的极性差异。这个仅对 sysfs 接口起作用。极性的改变可以在 gpio_export()
657前后进行,且之前使能的轮询操作(poll(2))支持(上升或下降沿)将会被重新配置来遵循
658这个设置。
diff --git a/MAINTAINERS b/MAINTAINERS
index 4f1e79b52cc5..8de3a7b0bf2d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2250,6 +2250,13 @@ N: bcm9583*
2250N: bcm583* 2250N: bcm583*
2251N: bcm113* 2251N: bcm113*
2252 2252
2253BROADCOM BRCMSTB GPIO DRIVER
2254M: Gregory Fong <gregory.0xf0@gmail.com>
2255L: bcm-kernel-feedback-list@broadcom.com>
2256S: Supported
2257F: drivers/gpio/gpio-brcmstb.c
2258F: Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt
2259
2253BROADCOM KONA GPIO DRIVER 2260BROADCOM KONA GPIO DRIVER
2254M: Ray Jui <rjui@broadcom.com> 2261M: Ray Jui <rjui@broadcom.com>
2255L: bcm-kernel-feedback-list@broadcom.com 2262L: bcm-kernel-feedback-list@broadcom.com
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index caefe806db5e..8f1fe739c985 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -126,6 +126,14 @@ config GPIO_BCM_KONA
126 help 126 help
127 Turn on GPIO support for Broadcom "Kona" chips. 127 Turn on GPIO support for Broadcom "Kona" chips.
128 128
129config GPIO_BRCMSTB
130 tristate "BRCMSTB GPIO support"
131 default y if ARCH_BRCMSTB
132 depends on OF_GPIO && (ARCH_BRCMSTB || COMPILE_TEST)
133 select GPIO_GENERIC
134 help
135 Say yes here to enable GPIO support for Broadcom STB (BCM7XXX) SoCs.
136
129config GPIO_CLPS711X 137config GPIO_CLPS711X
130 tristate "CLPS711X GPIO support" 138 tristate "CLPS711X GPIO support"
131 depends on ARCH_CLPS711X || COMPILE_TEST 139 depends on ARCH_CLPS711X || COMPILE_TEST
@@ -159,6 +167,14 @@ config GPIO_EP93XX
159 depends on ARCH_EP93XX 167 depends on ARCH_EP93XX
160 select GPIO_GENERIC 168 select GPIO_GENERIC
161 169
170config GPIO_ETRAXFS
171 bool "Axis ETRAX FS General I/O"
172 depends on CRIS || COMPILE_TEST
173 depends on OF
174 select GPIO_GENERIC
175 help
176 Say yes here to support the GPIO controller on Axis ETRAX FS SoCs.
177
162config GPIO_F7188X 178config GPIO_F7188X
163 tristate "F71869, F71869A, F71882FG and F71889F GPIO support" 179 tristate "F71869, F71869A, F71882FG and F71889F GPIO support"
164 depends on X86 180 depends on X86
@@ -230,6 +246,14 @@ config GPIO_LOONGSON
230 help 246 help
231 driver for GPIO functionality on Loongson-2F/3A/3B processors. 247 driver for GPIO functionality on Loongson-2F/3A/3B processors.
232 248
249config GPIO_LPC18XX
250 bool "NXP LPC18XX/43XX GPIO support"
251 default y if ARCH_LPC18XX
252 depends on OF_GPIO && (ARCH_LPC18XX || COMPILE_TEST)
253 help
254 Select this option to enable GPIO driver for
255 NXP LPC18XX/43XX devices.
256
233config GPIO_LYNXPOINT 257config GPIO_LYNXPOINT
234 tristate "Intel Lynxpoint GPIO support" 258 tristate "Intel Lynxpoint GPIO support"
235 depends on ACPI && X86 259 depends on ACPI && X86
@@ -308,7 +332,7 @@ config GPIO_OCTEON
308 family of SOCs. 332 family of SOCs.
309 333
310config GPIO_OMAP 334config GPIO_OMAP
311 bool "TI OMAP GPIO support" if COMPILE_TEST && !ARCH_OMAP2PLUS 335 tristate "TI OMAP GPIO support" if ARCH_OMAP2PLUS || COMPILE_TEST
312 default y if ARCH_OMAP 336 default y if ARCH_OMAP
313 depends on ARM 337 depends on ARM
314 select GENERIC_IRQ_CHIP 338 select GENERIC_IRQ_CHIP
@@ -488,6 +512,17 @@ config GPIO_XILINX
488 help 512 help
489 Say yes here to support the Xilinx FPGA GPIO device 513 Say yes here to support the Xilinx FPGA GPIO device
490 514
515config GPIO_XLP
516 tristate "Netlogic XLP GPIO support"
517 depends on CPU_XLP
518 select GPIOLIB_IRQCHIP
519 help
520 This driver provides support for GPIO interface on Netlogic XLP MIPS64
521 SoCs. Currently supported XLP variants are XLP8XX, XLP3XX, XLP2XX,
522 XLP9XX and XLP5XX.
523
524 If unsure, say N.
525
491config GPIO_XTENSA 526config GPIO_XTENSA
492 bool "Xtensa GPIO32 support" 527 bool "Xtensa GPIO32 support"
493 depends on XTENSA 528 depends on XTENSA
@@ -505,7 +540,7 @@ config GPIO_ZEVIO
505 540
506config GPIO_ZYNQ 541config GPIO_ZYNQ
507 tristate "Xilinx Zynq GPIO support" 542 tristate "Xilinx Zynq GPIO support"
508 depends on ARCH_ZYNQ 543 depends on ARCH_ZYNQ || ARCH_ZYNQMP
509 select GPIOLIB_IRQCHIP 544 select GPIOLIB_IRQCHIP
510 help 545 help
511 Say yes here to support Xilinx Zynq GPIO controller. 546 Say yes here to support Xilinx Zynq GPIO controller.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index f71bb971329c..f82cd678ce08 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_GPIO_ALTERA) += gpio-altera.o
21obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o 21obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
22obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o 22obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
23obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o 23obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
24obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
24obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o 25obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
25obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o 26obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
26obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o 27obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o
@@ -32,6 +33,7 @@ obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o
32obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o 33obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o
33obj-$(CONFIG_GPIO_EM) += gpio-em.o 34obj-$(CONFIG_GPIO_EM) += gpio-em.o
34obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o 35obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
36obj-$(CONFIG_GPIO_ETRAXFS) += gpio-etraxfs.o
35obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o 37obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o
36obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o 38obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o
37obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o 39obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o
@@ -44,6 +46,7 @@ obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o
44obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o 46obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o
45obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o 47obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
46obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o 48obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o
49obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o
47obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o 50obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
48obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o 51obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o
49obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o 52obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o
@@ -109,6 +112,7 @@ obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o
109obj-$(CONFIG_GPIO_XGENE) += gpio-xgene.o 112obj-$(CONFIG_GPIO_XGENE) += gpio-xgene.o
110obj-$(CONFIG_GPIO_XGENE_SB) += gpio-xgene-sb.o 113obj-$(CONFIG_GPIO_XGENE_SB) += gpio-xgene-sb.o
111obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o 114obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o
115obj-$(CONFIG_GPIO_XLP) += gpio-xlp.o
112obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o 116obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o
113obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o 117obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o
114obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o 118obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o
diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c
index 449fb46cb8a0..0f3d336d6303 100644
--- a/drivers/gpio/gpio-altera.c
+++ b/drivers/gpio/gpio-altera.c
@@ -107,7 +107,8 @@ static int altera_gpio_irq_set_type(struct irq_data *d,
107 return -EINVAL; 107 return -EINVAL;
108} 108}
109 109
110static unsigned int altera_gpio_irq_startup(struct irq_data *d) { 110static unsigned int altera_gpio_irq_startup(struct irq_data *d)
111{
111 altera_gpio_irq_unmask(d); 112 altera_gpio_irq_unmask(d);
112 113
113 return 0; 114 return 0;
diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c
index b164ce837b43..a6e79225886d 100644
--- a/drivers/gpio/gpio-bcm-kona.c
+++ b/drivers/gpio/gpio-bcm-kona.c
@@ -122,6 +122,16 @@ static void bcm_kona_gpio_unlock_gpio(struct bcm_kona_gpio *kona_gpio,
122 spin_unlock_irqrestore(&kona_gpio->lock, flags); 122 spin_unlock_irqrestore(&kona_gpio->lock, flags);
123} 123}
124 124
125static int bcm_kona_gpio_get_dir(struct gpio_chip *chip, unsigned gpio)
126{
127 struct bcm_kona_gpio *kona_gpio = to_kona_gpio(chip);
128 void __iomem *reg_base = kona_gpio->reg_base;
129 u32 val;
130
131 val = readl(reg_base + GPIO_CONTROL(gpio)) & GPIO_GPCTR0_IOTR_MASK;
132 return val ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
133}
134
125static void bcm_kona_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) 135static void bcm_kona_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
126{ 136{
127 struct bcm_kona_gpio *kona_gpio; 137 struct bcm_kona_gpio *kona_gpio;
@@ -135,12 +145,8 @@ static void bcm_kona_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
135 reg_base = kona_gpio->reg_base; 145 reg_base = kona_gpio->reg_base;
136 spin_lock_irqsave(&kona_gpio->lock, flags); 146 spin_lock_irqsave(&kona_gpio->lock, flags);
137 147
138 /* determine the GPIO pin direction */
139 val = readl(reg_base + GPIO_CONTROL(gpio));
140 val &= GPIO_GPCTR0_IOTR_MASK;
141
142 /* this function only applies to output pin */ 148 /* this function only applies to output pin */
143 if (GPIO_GPCTR0_IOTR_CMD_INPUT == val) 149 if (bcm_kona_gpio_get_dir(chip, gpio) == GPIOF_DIR_IN)
144 goto out; 150 goto out;
145 151
146 reg_offset = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id); 152 reg_offset = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
@@ -166,13 +172,12 @@ static int bcm_kona_gpio_get(struct gpio_chip *chip, unsigned gpio)
166 reg_base = kona_gpio->reg_base; 172 reg_base = kona_gpio->reg_base;
167 spin_lock_irqsave(&kona_gpio->lock, flags); 173 spin_lock_irqsave(&kona_gpio->lock, flags);
168 174
169 /* determine the GPIO pin direction */ 175 if (bcm_kona_gpio_get_dir(chip, gpio) == GPIOF_DIR_IN)
170 val = readl(reg_base + GPIO_CONTROL(gpio)); 176 reg_offset = GPIO_IN_STATUS(bank_id);
171 val &= GPIO_GPCTR0_IOTR_MASK; 177 else
178 reg_offset = GPIO_OUT_STATUS(bank_id);
172 179
173 /* read the GPIO bank status */ 180 /* read the GPIO bank status */
174 reg_offset = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
175 GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
176 val = readl(reg_base + reg_offset); 181 val = readl(reg_base + reg_offset);
177 182
178 spin_unlock_irqrestore(&kona_gpio->lock, flags); 183 spin_unlock_irqrestore(&kona_gpio->lock, flags);
@@ -310,6 +315,7 @@ static struct gpio_chip template_chip = {
310 .owner = THIS_MODULE, 315 .owner = THIS_MODULE,
311 .request = bcm_kona_gpio_request, 316 .request = bcm_kona_gpio_request,
312 .free = bcm_kona_gpio_free, 317 .free = bcm_kona_gpio_free,
318 .get_direction = bcm_kona_gpio_get_dir,
313 .direction_input = bcm_kona_gpio_direction_input, 319 .direction_input = bcm_kona_gpio_direction_input,
314 .get = bcm_kona_gpio_get, 320 .get = bcm_kona_gpio_get,
315 .direction_output = bcm_kona_gpio_direction_output, 321 .direction_output = bcm_kona_gpio_direction_output,
diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
new file mode 100644
index 000000000000..7a3cb1fa0a76
--- /dev/null
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -0,0 +1,252 @@
1/*
2 * Copyright (C) 2015 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/bitops.h>
15#include <linux/gpio/driver.h>
16#include <linux/of_device.h>
17#include <linux/of_irq.h>
18#include <linux/module.h>
19#include <linux/basic_mmio_gpio.h>
20
21#define GIO_BANK_SIZE 0x20
22#define GIO_ODEN(bank) (((bank) * GIO_BANK_SIZE) + 0x00)
23#define GIO_DATA(bank) (((bank) * GIO_BANK_SIZE) + 0x04)
24#define GIO_IODIR(bank) (((bank) * GIO_BANK_SIZE) + 0x08)
25#define GIO_EC(bank) (((bank) * GIO_BANK_SIZE) + 0x0c)
26#define GIO_EI(bank) (((bank) * GIO_BANK_SIZE) + 0x10)
27#define GIO_MASK(bank) (((bank) * GIO_BANK_SIZE) + 0x14)
28#define GIO_LEVEL(bank) (((bank) * GIO_BANK_SIZE) + 0x18)
29#define GIO_STAT(bank) (((bank) * GIO_BANK_SIZE) + 0x1c)
30
31struct brcmstb_gpio_bank {
32 struct list_head node;
33 int id;
34 struct bgpio_chip bgc;
35 struct brcmstb_gpio_priv *parent_priv;
36 u32 width;
37};
38
39struct brcmstb_gpio_priv {
40 struct list_head bank_list;
41 void __iomem *reg_base;
42 int num_banks;
43 struct platform_device *pdev;
44 int gpio_base;
45};
46
47#define MAX_GPIO_PER_BANK 32
48#define GPIO_BANK(gpio) ((gpio) >> 5)
49/* assumes MAX_GPIO_PER_BANK is a multiple of 2 */
50#define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1))
51
52static inline struct brcmstb_gpio_bank *
53brcmstb_gpio_gc_to_bank(struct gpio_chip *gc)
54{
55 struct bgpio_chip *bgc = to_bgpio_chip(gc);
56 return container_of(bgc, struct brcmstb_gpio_bank, bgc);
57}
58
59static inline struct brcmstb_gpio_priv *
60brcmstb_gpio_gc_to_priv(struct gpio_chip *gc)
61{
62 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
63 return bank->parent_priv;
64}
65
66/* Make sure that the number of banks matches up between properties */
67static int brcmstb_gpio_sanity_check_banks(struct device *dev,
68 struct device_node *np, struct resource *res)
69{
70 int res_num_banks = resource_size(res) / GIO_BANK_SIZE;
71 int num_banks =
72 of_property_count_u32_elems(np, "brcm,gpio-bank-widths");
73
74 if (res_num_banks != num_banks) {
75 dev_err(dev, "Mismatch in banks: res had %d, bank-widths had %d\n",
76 res_num_banks, num_banks);
77 return -EINVAL;
78 } else {
79 return 0;
80 }
81}
82
83static int brcmstb_gpio_remove(struct platform_device *pdev)
84{
85 struct brcmstb_gpio_priv *priv = platform_get_drvdata(pdev);
86 struct list_head *pos;
87 struct brcmstb_gpio_bank *bank;
88 int ret = 0;
89
90 list_for_each(pos, &priv->bank_list) {
91 bank = list_entry(pos, struct brcmstb_gpio_bank, node);
92 ret = bgpio_remove(&bank->bgc);
93 if (ret)
94 dev_err(&pdev->dev, "gpiochip_remove fail in cleanup");
95 }
96 return ret;
97}
98
99static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
100 const struct of_phandle_args *gpiospec, u32 *flags)
101{
102 struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
103 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
104 int offset;
105
106 if (gc->of_gpio_n_cells != 2) {
107 WARN_ON(1);
108 return -EINVAL;
109 }
110
111 if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells))
112 return -EINVAL;
113
114 offset = gpiospec->args[0] - (gc->base - priv->gpio_base);
115 if (offset >= gc->ngpio)
116 return -EINVAL;
117
118 if (unlikely(offset >= bank->width)) {
119 dev_warn_ratelimited(&priv->pdev->dev,
120 "Received request for invalid GPIO offset %d\n",
121 gpiospec->args[0]);
122 }
123
124 if (flags)
125 *flags = gpiospec->args[1];
126
127 return offset;
128}
129
130static int brcmstb_gpio_probe(struct platform_device *pdev)
131{
132 struct device *dev = &pdev->dev;
133 struct device_node *np = dev->of_node;
134 void __iomem *reg_base;
135 struct brcmstb_gpio_priv *priv;
136 struct resource *res;
137 struct property *prop;
138 const __be32 *p;
139 u32 bank_width;
140 int err;
141 static int gpio_base;
142
143 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
144 if (!priv)
145 return -ENOMEM;
146
147 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
148 reg_base = devm_ioremap_resource(dev, res);
149 if (IS_ERR(reg_base))
150 return PTR_ERR(reg_base);
151
152 priv->gpio_base = gpio_base;
153 priv->reg_base = reg_base;
154 priv->pdev = pdev;
155
156 INIT_LIST_HEAD(&priv->bank_list);
157 if (brcmstb_gpio_sanity_check_banks(dev, np, res))
158 return -EINVAL;
159
160 of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p,
161 bank_width) {
162 struct brcmstb_gpio_bank *bank;
163 struct bgpio_chip *bgc;
164 struct gpio_chip *gc;
165
166 bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL);
167 if (!bank) {
168 err = -ENOMEM;
169 goto fail;
170 }
171
172 bank->parent_priv = priv;
173 bank->id = priv->num_banks;
174 if (bank_width <= 0 || bank_width > MAX_GPIO_PER_BANK) {
175 dev_err(dev, "Invalid bank width %d\n", bank_width);
176 goto fail;
177 } else {
178 bank->width = bank_width;
179 }
180
181 /*
182 * Regs are 4 bytes wide, have data reg, no set/clear regs,
183 * and direction bits have 0 = output and 1 = input
184 */
185 bgc = &bank->bgc;
186 err = bgpio_init(bgc, dev, 4,
187 reg_base + GIO_DATA(bank->id),
188 NULL, NULL, NULL,
189 reg_base + GIO_IODIR(bank->id), 0);
190 if (err) {
191 dev_err(dev, "bgpio_init() failed\n");
192 goto fail;
193 }
194
195 gc = &bgc->gc;
196 gc->of_node = np;
197 gc->owner = THIS_MODULE;
198 gc->label = np->full_name;
199 gc->base = gpio_base;
200 gc->of_gpio_n_cells = 2;
201 gc->of_xlate = brcmstb_gpio_of_xlate;
202 /* not all ngpio lines are valid, will use bank width later */
203 gc->ngpio = MAX_GPIO_PER_BANK;
204
205 err = gpiochip_add(gc);
206 if (err) {
207 dev_err(dev, "Could not add gpiochip for bank %d\n",
208 bank->id);
209 goto fail;
210 }
211 gpio_base += gc->ngpio;
212 dev_dbg(dev, "bank=%d, base=%d, ngpio=%d, width=%d\n", bank->id,
213 gc->base, gc->ngpio, bank->width);
214
215 /* Everything looks good, so add bank to list */
216 list_add(&bank->node, &priv->bank_list);
217
218 priv->num_banks++;
219 }
220
221 dev_info(dev, "Registered %d banks (GPIO(s): %d-%d)\n",
222 priv->num_banks, priv->gpio_base, gpio_base - 1);
223
224 platform_set_drvdata(pdev, priv);
225
226 return 0;
227
228fail:
229 (void) brcmstb_gpio_remove(pdev);
230 return err;
231}
232
233static const struct of_device_id brcmstb_gpio_of_match[] = {
234 { .compatible = "brcm,brcmstb-gpio" },
235 {},
236};
237
238MODULE_DEVICE_TABLE(of, brcmstb_gpio_of_match);
239
240static struct platform_driver brcmstb_gpio_driver = {
241 .driver = {
242 .name = "brcmstb-gpio",
243 .of_match_table = brcmstb_gpio_of_match,
244 },
245 .probe = brcmstb_gpio_probe,
246 .remove = brcmstb_gpio_remove,
247};
248module_platform_driver(brcmstb_gpio_driver);
249
250MODULE_AUTHOR("Gregory Fong");
251MODULE_DESCRIPTION("Driver for Broadcom BRCMSTB SoC UPG GPIO");
252MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c
index 91a7ffe83135..fddd204dc9b6 100644
--- a/drivers/gpio/gpio-crystalcove.c
+++ b/drivers/gpio/gpio-crystalcove.c
@@ -16,6 +16,7 @@
16 */ 16 */
17 17
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/module.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
21#include <linux/seq_file.h> 22#include <linux/seq_file.h>
@@ -94,9 +95,8 @@ static inline int to_reg(int gpio, enum ctrl_register reg_type)
94{ 95{
95 int reg; 96 int reg;
96 97
97 if (gpio == 94) { 98 if (gpio == 94)
98 return GPIOPANELCTL; 99 return GPIOPANELCTL;
99 }
100 100
101 if (reg_type == CTRL_IN) { 101 if (reg_type == CTRL_IN) {
102 if (gpio < 8) 102 if (gpio < 8)
@@ -255,6 +255,7 @@ static struct irq_chip crystalcove_irqchip = {
255 .irq_set_type = crystalcove_irq_type, 255 .irq_set_type = crystalcove_irq_type,
256 .irq_bus_lock = crystalcove_bus_lock, 256 .irq_bus_lock = crystalcove_bus_lock,
257 .irq_bus_sync_unlock = crystalcove_bus_sync_unlock, 257 .irq_bus_sync_unlock = crystalcove_bus_sync_unlock,
258 .flags = IRQCHIP_SKIP_SET_WAKE,
258}; 259};
259 260
260static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data) 261static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)
diff --git a/drivers/gpio/gpio-dln2.c b/drivers/gpio/gpio-dln2.c
index dbdb4de82c6d..6685712c15cf 100644
--- a/drivers/gpio/gpio-dln2.c
+++ b/drivers/gpio/gpio-dln2.c
@@ -466,7 +466,6 @@ static int dln2_gpio_probe(struct platform_device *pdev)
466 dln2->gpio.owner = THIS_MODULE; 466 dln2->gpio.owner = THIS_MODULE;
467 dln2->gpio.base = -1; 467 dln2->gpio.base = -1;
468 dln2->gpio.ngpio = pins; 468 dln2->gpio.ngpio = pins;
469 dln2->gpio.exported = true;
470 dln2->gpio.can_sleep = true; 469 dln2->gpio.can_sleep = true;
471 dln2->gpio.irq_not_threaded = true; 470 dln2->gpio.irq_not_threaded = true;
472 dln2->gpio.set = dln2_gpio_set; 471 dln2->gpio.set = dln2_gpio_set;
diff --git a/drivers/gpio/gpio-etraxfs.c b/drivers/gpio/gpio-etraxfs.c
new file mode 100644
index 000000000000..28071f4a5672
--- /dev/null
+++ b/drivers/gpio/gpio-etraxfs.c
@@ -0,0 +1,176 @@
1#include <linux/kernel.h>
2#include <linux/init.h>
3#include <linux/gpio.h>
4#include <linux/of_gpio.h>
5#include <linux/io.h>
6#include <linux/platform_device.h>
7#include <linux/basic_mmio_gpio.h>
8
9#define ETRAX_FS_rw_pa_dout 0
10#define ETRAX_FS_r_pa_din 4
11#define ETRAX_FS_rw_pa_oe 8
12#define ETRAX_FS_rw_intr_cfg 12
13#define ETRAX_FS_rw_intr_mask 16
14#define ETRAX_FS_rw_ack_intr 20
15#define ETRAX_FS_r_intr 24
16#define ETRAX_FS_rw_pb_dout 32
17#define ETRAX_FS_r_pb_din 36
18#define ETRAX_FS_rw_pb_oe 40
19#define ETRAX_FS_rw_pc_dout 48
20#define ETRAX_FS_r_pc_din 52
21#define ETRAX_FS_rw_pc_oe 56
22#define ETRAX_FS_rw_pd_dout 64
23#define ETRAX_FS_r_pd_din 68
24#define ETRAX_FS_rw_pd_oe 72
25#define ETRAX_FS_rw_pe_dout 80
26#define ETRAX_FS_r_pe_din 84
27#define ETRAX_FS_rw_pe_oe 88
28
29struct etraxfs_gpio_port {
30 const char *label;
31 unsigned int oe;
32 unsigned int dout;
33 unsigned int din;
34 unsigned int ngpio;
35};
36
37struct etraxfs_gpio_info {
38 unsigned int num_ports;
39 const struct etraxfs_gpio_port *ports;
40};
41
42static const struct etraxfs_gpio_port etraxfs_gpio_etraxfs_ports[] = {
43 {
44 .label = "A",
45 .ngpio = 8,
46 .oe = ETRAX_FS_rw_pa_oe,
47 .dout = ETRAX_FS_rw_pa_dout,
48 .din = ETRAX_FS_r_pa_din,
49 },
50 {
51 .label = "B",
52 .ngpio = 18,
53 .oe = ETRAX_FS_rw_pb_oe,
54 .dout = ETRAX_FS_rw_pb_dout,
55 .din = ETRAX_FS_r_pb_din,
56 },
57 {
58 .label = "C",
59 .ngpio = 18,
60 .oe = ETRAX_FS_rw_pc_oe,
61 .dout = ETRAX_FS_rw_pc_dout,
62 .din = ETRAX_FS_r_pc_din,
63 },
64 {
65 .label = "D",
66 .ngpio = 18,
67 .oe = ETRAX_FS_rw_pd_oe,
68 .dout = ETRAX_FS_rw_pd_dout,
69 .din = ETRAX_FS_r_pd_din,
70 },
71 {
72 .label = "E",
73 .ngpio = 18,
74 .oe = ETRAX_FS_rw_pe_oe,
75 .dout = ETRAX_FS_rw_pe_dout,
76 .din = ETRAX_FS_r_pe_din,
77 },
78};
79
80static const struct etraxfs_gpio_info etraxfs_gpio_etraxfs = {
81 .num_ports = ARRAY_SIZE(etraxfs_gpio_etraxfs_ports),
82 .ports = etraxfs_gpio_etraxfs_ports,
83};
84
85static int etraxfs_gpio_of_xlate(struct gpio_chip *gc,
86 const struct of_phandle_args *gpiospec,
87 u32 *flags)
88{
89 /*
90 * Port numbers are A to E, and the properties are integers, so we
91 * specify them as 0xA - 0xE.
92 */
93 if (gc->label[0] - 'A' + 0xA != gpiospec->args[2])
94 return -EINVAL;
95
96 return of_gpio_simple_xlate(gc, gpiospec, flags);
97}
98
99static const struct of_device_id etraxfs_gpio_of_table[] = {
100 {
101 .compatible = "axis,etraxfs-gio",
102 .data = &etraxfs_gpio_etraxfs,
103 },
104 {},
105};
106
107static int etraxfs_gpio_probe(struct platform_device *pdev)
108{
109 struct device *dev = &pdev->dev;
110 const struct etraxfs_gpio_info *info;
111 const struct of_device_id *match;
112 struct bgpio_chip *chips;
113 struct resource *res;
114 void __iomem *regs;
115 int ret;
116 int i;
117
118 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
119 regs = devm_ioremap_resource(dev, res);
120 if (!regs)
121 return -ENOMEM;
122
123 match = of_match_node(etraxfs_gpio_of_table, dev->of_node);
124 if (!match)
125 return -EINVAL;
126
127 info = match->data;
128
129 chips = devm_kzalloc(dev, sizeof(*chips) * info->num_ports, GFP_KERNEL);
130 if (!chips)
131 return -ENOMEM;
132
133 for (i = 0; i < info->num_ports; i++) {
134 struct bgpio_chip *bgc = &chips[i];
135 const struct etraxfs_gpio_port *port = &info->ports[i];
136
137 ret = bgpio_init(bgc, dev, 4,
138 regs + port->din, /* dat */
139 regs + port->dout, /* set */
140 NULL, /* clr */
141 regs + port->oe, /* dirout */
142 NULL, /* dirin */
143 BGPIOF_UNREADABLE_REG_SET);
144 if (ret)
145 return ret;
146
147 bgc->gc.ngpio = port->ngpio;
148 bgc->gc.label = port->label;
149
150 bgc->gc.of_node = dev->of_node;
151 bgc->gc.of_gpio_n_cells = 3;
152 bgc->gc.of_xlate = etraxfs_gpio_of_xlate;
153
154 ret = gpiochip_add(&bgc->gc);
155 if (ret)
156 dev_err(dev, "Unable to register port %s\n",
157 bgc->gc.label);
158 }
159
160 return 0;
161}
162
163static struct platform_driver etraxfs_gpio_driver = {
164 .driver = {
165 .name = "etraxfs-gpio",
166 .of_match_table = of_match_ptr(etraxfs_gpio_of_table),
167 },
168 .probe = etraxfs_gpio_probe,
169};
170
171static int __init etraxfs_gpio_init(void)
172{
173 return platform_driver_register(&etraxfs_gpio_driver);
174}
175
176device_initcall(etraxfs_gpio_init);
diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
index dbda8433c4f7..5e3c4fa67d82 100644
--- a/drivers/gpio/gpio-f7188x.c
+++ b/drivers/gpio/gpio-f7188x.c
@@ -172,7 +172,7 @@ static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
172}; 172};
173 173
174static struct f7188x_gpio_bank f71882_gpio_bank[] = { 174static struct f7188x_gpio_bank f71882_gpio_bank[] = {
175 F7188X_GPIO_BANK(0 , 8, 0xF0), 175 F7188X_GPIO_BANK(0, 8, 0xF0),
176 F7188X_GPIO_BANK(10, 8, 0xE0), 176 F7188X_GPIO_BANK(10, 8, 0xE0),
177 F7188X_GPIO_BANK(20, 8, 0xD0), 177 F7188X_GPIO_BANK(20, 8, 0xD0),
178 F7188X_GPIO_BANK(30, 4, 0xC0), 178 F7188X_GPIO_BANK(30, 4, 0xC0),
@@ -180,7 +180,7 @@ static struct f7188x_gpio_bank f71882_gpio_bank[] = {
180}; 180};
181 181
182static struct f7188x_gpio_bank f71889_gpio_bank[] = { 182static struct f7188x_gpio_bank f71889_gpio_bank[] = {
183 F7188X_GPIO_BANK(0 , 7, 0xF0), 183 F7188X_GPIO_BANK(0, 7, 0xF0),
184 F7188X_GPIO_BANK(10, 7, 0xE0), 184 F7188X_GPIO_BANK(10, 7, 0xE0),
185 F7188X_GPIO_BANK(20, 8, 0xD0), 185 F7188X_GPIO_BANK(20, 8, 0xD0),
186 F7188X_GPIO_BANK(30, 8, 0xC0), 186 F7188X_GPIO_BANK(30, 8, 0xC0),
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c
index b92a690f5765..9bda3727fac1 100644
--- a/drivers/gpio/gpio-generic.c
+++ b/drivers/gpio/gpio-generic.c
@@ -135,6 +135,17 @@ static unsigned long bgpio_pin2mask_be(struct bgpio_chip *bgc,
135 return 1 << (bgc->bits - 1 - pin); 135 return 1 << (bgc->bits - 1 - pin);
136} 136}
137 137
138static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio)
139{
140 struct bgpio_chip *bgc = to_bgpio_chip(gc);
141 unsigned long pinmask = bgc->pin2mask(bgc, gpio);
142
143 if (bgc->dir & pinmask)
144 return bgc->read_reg(bgc->reg_set) & pinmask;
145 else
146 return bgc->read_reg(bgc->reg_dat) & pinmask;
147}
148
138static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) 149static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
139{ 150{
140 struct bgpio_chip *bgc = to_bgpio_chip(gc); 151 struct bgpio_chip *bgc = to_bgpio_chip(gc);
@@ -416,7 +427,8 @@ static int bgpio_setup_accessors(struct device *dev,
416static int bgpio_setup_io(struct bgpio_chip *bgc, 427static int bgpio_setup_io(struct bgpio_chip *bgc,
417 void __iomem *dat, 428 void __iomem *dat,
418 void __iomem *set, 429 void __iomem *set,
419 void __iomem *clr) 430 void __iomem *clr,
431 unsigned long flags)
420{ 432{
421 433
422 bgc->reg_dat = dat; 434 bgc->reg_dat = dat;
@@ -437,7 +449,11 @@ static int bgpio_setup_io(struct bgpio_chip *bgc,
437 bgc->gc.set_multiple = bgpio_set_multiple; 449 bgc->gc.set_multiple = bgpio_set_multiple;
438 } 450 }
439 451
440 bgc->gc.get = bgpio_get; 452 if (!(flags & BGPIOF_UNREADABLE_REG_SET) &&
453 (flags & BGPIOF_READ_OUTPUT_REG_SET))
454 bgc->gc.get = bgpio_get_set;
455 else
456 bgc->gc.get = bgpio_get;
441 457
442 return 0; 458 return 0;
443} 459}
@@ -500,7 +516,7 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
500 bgc->gc.ngpio = bgc->bits; 516 bgc->gc.ngpio = bgc->bits;
501 bgc->gc.request = bgpio_request; 517 bgc->gc.request = bgpio_request;
502 518
503 ret = bgpio_setup_io(bgc, dat, set, clr); 519 ret = bgpio_setup_io(bgc, dat, set, clr, flags);
504 if (ret) 520 if (ret)
505 return ret; 521 return ret;
506 522
diff --git a/drivers/gpio/gpio-it8761e.c b/drivers/gpio/gpio-it8761e.c
index dadfc245cf09..30a8f24c92c5 100644
--- a/drivers/gpio/gpio-it8761e.c
+++ b/drivers/gpio/gpio-it8761e.c
@@ -123,7 +123,7 @@ static void it8761e_gpio_set(struct gpio_chip *gc,
123 123
124 curr_vals = inb(reg); 124 curr_vals = inb(reg);
125 if (val) 125 if (val)
126 outb(curr_vals | (1 << bit) , reg); 126 outb(curr_vals | (1 << bit), reg);
127 else 127 else
128 outb(curr_vals & ~(1 << bit), reg); 128 outb(curr_vals & ~(1 << bit), reg);
129 129
diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c
new file mode 100644
index 000000000000..eb68603136b0
--- /dev/null
+++ b/drivers/gpio/gpio-lpc18xx.c
@@ -0,0 +1,180 @@
1/*
2 * GPIO driver for NXP LPC18xx/43xx.
3 *
4 * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/clk.h>
13#include <linux/gpio/driver.h>
14#include <linux/io.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/of_gpio.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/platform_device.h>
20
21/* LPC18xx GPIO register offsets */
22#define LPC18XX_REG_DIR(n) (0x2000 + n * sizeof(u32))
23
24#define LPC18XX_MAX_PORTS 8
25#define LPC18XX_PINS_PER_PORT 32
26
27struct lpc18xx_gpio_chip {
28 struct gpio_chip gpio;
29 void __iomem *base;
30 struct clk *clk;
31 spinlock_t lock;
32};
33
34static inline struct lpc18xx_gpio_chip *to_lpc18xx_gpio(struct gpio_chip *chip)
35{
36 return container_of(chip, struct lpc18xx_gpio_chip, gpio);
37}
38
39static int lpc18xx_gpio_request(struct gpio_chip *chip, unsigned offset)
40{
41 return pinctrl_request_gpio(offset);
42}
43
44static void lpc18xx_gpio_free(struct gpio_chip *chip, unsigned offset)
45{
46 pinctrl_free_gpio(offset);
47}
48
49static void lpc18xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
50{
51 struct lpc18xx_gpio_chip *gc = to_lpc18xx_gpio(chip);
52 writeb(value ? 1 : 0, gc->base + offset);
53}
54
55static int lpc18xx_gpio_get(struct gpio_chip *chip, unsigned offset)
56{
57 struct lpc18xx_gpio_chip *gc = to_lpc18xx_gpio(chip);
58 return !!readb(gc->base + offset);
59}
60
61static int lpc18xx_gpio_direction(struct gpio_chip *chip, unsigned offset,
62 bool out)
63{
64 struct lpc18xx_gpio_chip *gc = to_lpc18xx_gpio(chip);
65 unsigned long flags;
66 u32 port, pin, dir;
67
68 port = offset / LPC18XX_PINS_PER_PORT;
69 pin = offset % LPC18XX_PINS_PER_PORT;
70
71 spin_lock_irqsave(&gc->lock, flags);
72 dir = readl(gc->base + LPC18XX_REG_DIR(port));
73 if (out)
74 dir |= BIT(pin);
75 else
76 dir &= ~BIT(pin);
77 writel(dir, gc->base + LPC18XX_REG_DIR(port));
78 spin_unlock_irqrestore(&gc->lock, flags);
79
80 return 0;
81}
82
83static int lpc18xx_gpio_direction_input(struct gpio_chip *chip,
84 unsigned offset)
85{
86 return lpc18xx_gpio_direction(chip, offset, false);
87}
88
89static int lpc18xx_gpio_direction_output(struct gpio_chip *chip,
90 unsigned offset, int value)
91{
92 lpc18xx_gpio_set(chip, offset, value);
93 return lpc18xx_gpio_direction(chip, offset, true);
94}
95
96static struct gpio_chip lpc18xx_chip = {
97 .label = "lpc18xx/43xx-gpio",
98 .request = lpc18xx_gpio_request,
99 .free = lpc18xx_gpio_free,
100 .direction_input = lpc18xx_gpio_direction_input,
101 .direction_output = lpc18xx_gpio_direction_output,
102 .set = lpc18xx_gpio_set,
103 .get = lpc18xx_gpio_get,
104 .ngpio = LPC18XX_MAX_PORTS * LPC18XX_PINS_PER_PORT,
105 .owner = THIS_MODULE,
106};
107
108static int lpc18xx_gpio_probe(struct platform_device *pdev)
109{
110 struct lpc18xx_gpio_chip *gc;
111 struct resource *res;
112 int ret;
113
114 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
115 if (!gc)
116 return -ENOMEM;
117
118 gc->gpio = lpc18xx_chip;
119 platform_set_drvdata(pdev, gc);
120
121 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
122 gc->base = devm_ioremap_resource(&pdev->dev, res);
123 if (IS_ERR(gc->base))
124 return PTR_ERR(gc->base);
125
126 gc->clk = devm_clk_get(&pdev->dev, NULL);
127 if (IS_ERR(gc->clk)) {
128 dev_err(&pdev->dev, "input clock not found\n");
129 return PTR_ERR(gc->clk);
130 }
131
132 ret = clk_prepare_enable(gc->clk);
133 if (ret) {
134 dev_err(&pdev->dev, "unable to enable clock\n");
135 return ret;
136 }
137
138 spin_lock_init(&gc->lock);
139
140 gc->gpio.dev = &pdev->dev;
141
142 ret = gpiochip_add(&gc->gpio);
143 if (ret) {
144 dev_err(&pdev->dev, "failed to add gpio chip\n");
145 clk_disable_unprepare(gc->clk);
146 return ret;
147 }
148
149 return 0;
150}
151
152static int lpc18xx_gpio_remove(struct platform_device *pdev)
153{
154 struct lpc18xx_gpio_chip *gc = platform_get_drvdata(pdev);
155
156 gpiochip_remove(&gc->gpio);
157 clk_disable_unprepare(gc->clk);
158
159 return 0;
160}
161
162static const struct of_device_id lpc18xx_gpio_match[] = {
163 { .compatible = "nxp,lpc1850-gpio" },
164 { }
165};
166MODULE_DEVICE_TABLE(of, lpc18xx_gpio_match);
167
168static struct platform_driver lpc18xx_gpio_driver = {
169 .probe = lpc18xx_gpio_probe,
170 .remove = lpc18xx_gpio_remove,
171 .driver = {
172 .name = "lpc18xx-gpio",
173 .of_match_table = lpc18xx_gpio_match,
174 },
175};
176module_platform_driver(lpc18xx_gpio_driver);
177
178MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
179MODULE_DESCRIPTION("GPIO driver for LPC18xx/43xx");
180MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c
index 127c755b38dc..153af464c7a7 100644
--- a/drivers/gpio/gpio-lynxpoint.c
+++ b/drivers/gpio/gpio-lynxpoint.c
@@ -72,7 +72,7 @@ struct lp_gpio {
72 * 72 *
73 * per gpio specific registers consist of two 32bit registers per gpio 73 * per gpio specific registers consist of two 32bit registers per gpio
74 * (LP_CONFIG1 and LP_CONFIG2), with 94 gpios there's a total of 74 * (LP_CONFIG1 and LP_CONFIG2), with 94 gpios there's a total of
75 * 188 config registes. 75 * 188 config registers.
76 * 76 *
77 * A simplified view of the register layout look like this: 77 * A simplified view of the register layout look like this:
78 * 78 *
diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c
index 0fa4543c5e02..aed4ca9338bc 100644
--- a/drivers/gpio/gpio-max732x.c
+++ b/drivers/gpio/gpio-max732x.c
@@ -429,6 +429,14 @@ static int max732x_irq_set_type(struct irq_data *d, unsigned int type)
429 return 0; 429 return 0;
430} 430}
431 431
432static int max732x_irq_set_wake(struct irq_data *data, unsigned int on)
433{
434 struct max732x_chip *chip = irq_data_get_irq_chip_data(data);
435
436 irq_set_irq_wake(chip->client->irq, on);
437 return 0;
438}
439
432static struct irq_chip max732x_irq_chip = { 440static struct irq_chip max732x_irq_chip = {
433 .name = "max732x", 441 .name = "max732x",
434 .irq_mask = max732x_irq_mask, 442 .irq_mask = max732x_irq_mask,
@@ -436,6 +444,7 @@ static struct irq_chip max732x_irq_chip = {
436 .irq_bus_lock = max732x_irq_bus_lock, 444 .irq_bus_lock = max732x_irq_bus_lock,
437 .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock, 445 .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock,
438 .irq_set_type = max732x_irq_set_type, 446 .irq_set_type = max732x_irq_set_type,
447 .irq_set_wake = max732x_irq_set_wake,
439}; 448};
440 449
441static uint8_t max732x_irq_pending(struct max732x_chip *chip) 450static uint8_t max732x_irq_pending(struct max732x_chip *chip)
@@ -507,12 +516,10 @@ static int max732x_irq_setup(struct max732x_chip *chip,
507 chip->irq_features = has_irq; 516 chip->irq_features = has_irq;
508 mutex_init(&chip->irq_lock); 517 mutex_init(&chip->irq_lock);
509 518
510 ret = devm_request_threaded_irq(&client->dev, 519 ret = devm_request_threaded_irq(&client->dev, client->irq,
511 client->irq, 520 NULL, max732x_irq_handler, IRQF_ONESHOT |
512 NULL, 521 IRQF_TRIGGER_FALLING | IRQF_SHARED,
513 max732x_irq_handler, 522 dev_name(&client->dev), chip);
514 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
515 dev_name(&client->dev), chip);
516 if (ret) { 523 if (ret) {
517 dev_err(&client->dev, "failed to request irq %d\n", 524 dev_err(&client->dev, "failed to request irq %d\n",
518 client->irq); 525 client->irq);
@@ -521,7 +528,7 @@ static int max732x_irq_setup(struct max732x_chip *chip,
521 ret = gpiochip_irqchip_add(&chip->gpio_chip, 528 ret = gpiochip_irqchip_add(&chip->gpio_chip,
522 &max732x_irq_chip, 529 &max732x_irq_chip,
523 irq_base, 530 irq_base,
524 handle_edge_irq, 531 handle_simple_irq,
525 IRQ_TYPE_NONE); 532 IRQ_TYPE_NONE);
526 if (ret) { 533 if (ret) {
527 dev_err(&client->dev, 534 dev_err(&client->dev,
diff --git a/drivers/gpio/gpio-moxart.c b/drivers/gpio/gpio-moxart.c
index c3ab46e595da..abd8676ce2b6 100644
--- a/drivers/gpio/gpio-moxart.c
+++ b/drivers/gpio/gpio-moxart.c
@@ -39,17 +39,6 @@ static void moxart_gpio_free(struct gpio_chip *chip, unsigned offset)
39 pinctrl_free_gpio(offset); 39 pinctrl_free_gpio(offset);
40} 40}
41 41
42static int moxart_gpio_get(struct gpio_chip *chip, unsigned offset)
43{
44 struct bgpio_chip *bgc = to_bgpio_chip(chip);
45 u32 ret = bgc->read_reg(bgc->reg_dir);
46
47 if (ret & BIT(offset))
48 return !!(bgc->read_reg(bgc->reg_set) & BIT(offset));
49 else
50 return !!(bgc->read_reg(bgc->reg_dat) & BIT(offset));
51}
52
53static int moxart_gpio_probe(struct platform_device *pdev) 42static int moxart_gpio_probe(struct platform_device *pdev)
54{ 43{
55 struct device *dev = &pdev->dev; 44 struct device *dev = &pdev->dev;
@@ -68,8 +57,9 @@ static int moxart_gpio_probe(struct platform_device *pdev)
68 return PTR_ERR(base); 57 return PTR_ERR(base);
69 58
70 ret = bgpio_init(bgc, dev, 4, base + GPIO_DATA_IN, 59 ret = bgpio_init(bgc, dev, 4, base + GPIO_DATA_IN,
71 base + GPIO_DATA_OUT, NULL, 60 base + GPIO_DATA_OUT, NULL,
72 base + GPIO_PIN_DIRECTION, NULL, 0); 61 base + GPIO_PIN_DIRECTION, NULL,
62 BGPIOF_READ_OUTPUT_REG_SET);
73 if (ret) { 63 if (ret) {
74 dev_err(&pdev->dev, "bgpio_init failed\n"); 64 dev_err(&pdev->dev, "bgpio_init failed\n");
75 return ret; 65 return ret;
@@ -78,7 +68,6 @@ static int moxart_gpio_probe(struct platform_device *pdev)
78 bgc->gc.label = "moxart-gpio"; 68 bgc->gc.label = "moxart-gpio";
79 bgc->gc.request = moxart_gpio_request; 69 bgc->gc.request = moxart_gpio_request;
80 bgc->gc.free = moxart_gpio_free; 70 bgc->gc.free = moxart_gpio_free;
81 bgc->gc.get = moxart_gpio_get;
82 bgc->data = bgc->read_reg(bgc->reg_set); 71 bgc->data = bgc->read_reg(bgc->reg_set);
83 bgc->gc.base = 0; 72 bgc->gc.base = 0;
84 bgc->gc.ngpio = 32; 73 bgc->gc.ngpio = 32;
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index e4f42c95c320..ec1eb1b7250f 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -131,7 +131,7 @@ static struct mxc_gpio_hwdata *mxc_gpio_hwdata;
131#define GPIO_INT_FALL_EDGE (mxc_gpio_hwdata->fall_edge) 131#define GPIO_INT_FALL_EDGE (mxc_gpio_hwdata->fall_edge)
132#define GPIO_INT_BOTH_EDGES 0x4 132#define GPIO_INT_BOTH_EDGES 0x4
133 133
134static struct platform_device_id mxc_gpio_devtype[] = { 134static const struct platform_device_id mxc_gpio_devtype[] = {
135 { 135 {
136 .name = "imx1-gpio", 136 .name = "imx1-gpio",
137 .driver_data = IMX1_GPIO, 137 .driver_data = IMX1_GPIO,
@@ -449,7 +449,8 @@ static int mxc_gpio_probe(struct platform_device *pdev)
449 err = bgpio_init(&port->bgc, &pdev->dev, 4, 449 err = bgpio_init(&port->bgc, &pdev->dev, 4,
450 port->base + GPIO_PSR, 450 port->base + GPIO_PSR,
451 port->base + GPIO_DR, NULL, 451 port->base + GPIO_DR, NULL,
452 port->base + GPIO_GDIR, NULL, 0); 452 port->base + GPIO_GDIR, NULL,
453 BGPIOF_READ_OUTPUT_REG_SET);
453 if (err) 454 if (err)
454 goto out_bgio; 455 goto out_bgio;
455 456
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index eac872748ee7..551d15d7c369 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -239,7 +239,7 @@ static int mxs_gpio_get_direction(struct gpio_chip *gc, unsigned offset)
239 return !(dir & mask); 239 return !(dir & mask);
240} 240}
241 241
242static struct platform_device_id mxs_gpio_ids[] = { 242static const struct platform_device_id mxs_gpio_ids[] = {
243 { 243 {
244 .name = "imx23-gpio", 244 .name = "imx23-gpio",
245 .driver_data = IMX23_GPIO, 245 .driver_data = IMX23_GPIO,
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index b232397ad7ec..b0c57d505be7 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -488,9 +488,6 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned type)
488 unsigned long flags; 488 unsigned long flags;
489 unsigned offset = d->hwirq; 489 unsigned offset = d->hwirq;
490 490
491 if (!BANK_USED(bank))
492 pm_runtime_get_sync(bank->dev);
493
494 if (type & ~IRQ_TYPE_SENSE_MASK) 491 if (type & ~IRQ_TYPE_SENSE_MASK)
495 return -EINVAL; 492 return -EINVAL;
496 493
@@ -498,12 +495,18 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned type)
498 (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) 495 (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
499 return -EINVAL; 496 return -EINVAL;
500 497
498 if (!BANK_USED(bank))
499 pm_runtime_get_sync(bank->dev);
500
501 spin_lock_irqsave(&bank->lock, flags); 501 spin_lock_irqsave(&bank->lock, flags);
502 retval = omap_set_gpio_triggering(bank, offset, type); 502 retval = omap_set_gpio_triggering(bank, offset, type);
503 if (retval)
504 goto error;
503 omap_gpio_init_irq(bank, offset); 505 omap_gpio_init_irq(bank, offset);
504 if (!omap_gpio_is_input(bank, offset)) { 506 if (!omap_gpio_is_input(bank, offset)) {
505 spin_unlock_irqrestore(&bank->lock, flags); 507 spin_unlock_irqrestore(&bank->lock, flags);
506 return -EINVAL; 508 retval = -EINVAL;
509 goto error;
507 } 510 }
508 spin_unlock_irqrestore(&bank->lock, flags); 511 spin_unlock_irqrestore(&bank->lock, flags);
509 512
@@ -512,6 +515,11 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned type)
512 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 515 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
513 __irq_set_handler_locked(d->irq, handle_edge_irq); 516 __irq_set_handler_locked(d->irq, handle_edge_irq);
514 517
518 return 0;
519
520error:
521 if (!BANK_USED(bank))
522 pm_runtime_put(bank->dev);
515 return retval; 523 return retval;
516} 524}
517 525
@@ -638,15 +646,6 @@ static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset,
638 return 0; 646 return 0;
639} 647}
640 648
641static void omap_reset_gpio(struct gpio_bank *bank, unsigned offset)
642{
643 omap_set_gpio_direction(bank, offset, 1);
644 omap_set_gpio_irqenable(bank, offset, 0);
645 omap_clear_gpio_irqstatus(bank, offset);
646 omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
647 omap_clear_gpio_debounce(bank, offset);
648}
649
650/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ 649/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
651static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) 650static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable)
652{ 651{
@@ -669,14 +668,7 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
669 pm_runtime_get_sync(bank->dev); 668 pm_runtime_get_sync(bank->dev);
670 669
671 spin_lock_irqsave(&bank->lock, flags); 670 spin_lock_irqsave(&bank->lock, flags);
672 /* Set trigger to none. You need to enable the desired trigger with 671 omap_enable_gpio_module(bank, offset);
673 * request_irq() or set_irq_type(). Only do this if the IRQ line has
674 * not already been requested.
675 */
676 if (!LINE_USED(bank->irq_usage, offset)) {
677 omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
678 omap_enable_gpio_module(bank, offset);
679 }
680 bank->mod_usage |= BIT(offset); 672 bank->mod_usage |= BIT(offset);
681 spin_unlock_irqrestore(&bank->lock, flags); 673 spin_unlock_irqrestore(&bank->lock, flags);
682 674
@@ -690,8 +682,11 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
690 682
691 spin_lock_irqsave(&bank->lock, flags); 683 spin_lock_irqsave(&bank->lock, flags);
692 bank->mod_usage &= ~(BIT(offset)); 684 bank->mod_usage &= ~(BIT(offset));
685 if (!LINE_USED(bank->irq_usage, offset)) {
686 omap_set_gpio_direction(bank, offset, 1);
687 omap_clear_gpio_debounce(bank, offset);
688 }
693 omap_disable_gpio_module(bank, offset); 689 omap_disable_gpio_module(bank, offset);
694 omap_reset_gpio(bank, offset);
695 spin_unlock_irqrestore(&bank->lock, flags); 690 spin_unlock_irqrestore(&bank->lock, flags);
696 691
697 /* 692 /*
@@ -795,11 +790,23 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d)
795 pm_runtime_get_sync(bank->dev); 790 pm_runtime_get_sync(bank->dev);
796 791
797 spin_lock_irqsave(&bank->lock, flags); 792 spin_lock_irqsave(&bank->lock, flags);
798 omap_gpio_init_irq(bank, offset); 793
794 if (!LINE_USED(bank->mod_usage, offset))
795 omap_set_gpio_direction(bank, offset, 1);
796 else if (!omap_gpio_is_input(bank, offset))
797 goto err;
798 omap_enable_gpio_module(bank, offset);
799 bank->irq_usage |= BIT(offset);
800
799 spin_unlock_irqrestore(&bank->lock, flags); 801 spin_unlock_irqrestore(&bank->lock, flags);
800 omap_gpio_unmask_irq(d); 802 omap_gpio_unmask_irq(d);
801 803
802 return 0; 804 return 0;
805err:
806 spin_unlock_irqrestore(&bank->lock, flags);
807 if (!BANK_USED(bank))
808 pm_runtime_put(bank->dev);
809 return -EINVAL;
803} 810}
804 811
805static void omap_gpio_irq_shutdown(struct irq_data *d) 812static void omap_gpio_irq_shutdown(struct irq_data *d)
@@ -810,8 +817,12 @@ static void omap_gpio_irq_shutdown(struct irq_data *d)
810 817
811 spin_lock_irqsave(&bank->lock, flags); 818 spin_lock_irqsave(&bank->lock, flags);
812 bank->irq_usage &= ~(BIT(offset)); 819 bank->irq_usage &= ~(BIT(offset));
820 omap_set_gpio_irqenable(bank, offset, 0);
821 omap_clear_gpio_irqstatus(bank, offset);
822 omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
823 if (!LINE_USED(bank->mod_usage, offset))
824 omap_clear_gpio_debounce(bank, offset);
813 omap_disable_gpio_module(bank, offset); 825 omap_disable_gpio_module(bank, offset);
814 omap_reset_gpio(bank, offset);
815 spin_unlock_irqrestore(&bank->lock, flags); 826 spin_unlock_irqrestore(&bank->lock, flags);
816 827
817 /* 828 /*
@@ -1233,6 +1244,17 @@ static int omap_gpio_probe(struct platform_device *pdev)
1233 return 0; 1244 return 0;
1234} 1245}
1235 1246
1247static int omap_gpio_remove(struct platform_device *pdev)
1248{
1249 struct gpio_bank *bank = platform_get_drvdata(pdev);
1250
1251 list_del(&bank->node);
1252 gpiochip_remove(&bank->chip);
1253 pm_runtime_disable(bank->dev);
1254
1255 return 0;
1256}
1257
1236#ifdef CONFIG_ARCH_OMAP2PLUS 1258#ifdef CONFIG_ARCH_OMAP2PLUS
1237 1259
1238#if defined(CONFIG_PM) 1260#if defined(CONFIG_PM)
@@ -1418,6 +1440,7 @@ static int omap_gpio_runtime_resume(struct device *dev)
1418} 1440}
1419#endif /* CONFIG_PM */ 1441#endif /* CONFIG_PM */
1420 1442
1443#if IS_BUILTIN(CONFIG_GPIO_OMAP)
1421void omap2_gpio_prepare_for_idle(int pwr_mode) 1444void omap2_gpio_prepare_for_idle(int pwr_mode)
1422{ 1445{
1423 struct gpio_bank *bank; 1446 struct gpio_bank *bank;
@@ -1443,6 +1466,7 @@ void omap2_gpio_resume_after_idle(void)
1443 pm_runtime_get_sync(bank->dev); 1466 pm_runtime_get_sync(bank->dev);
1444 } 1467 }
1445} 1468}
1469#endif
1446 1470
1447#if defined(CONFIG_PM) 1471#if defined(CONFIG_PM)
1448static void omap_gpio_init_context(struct gpio_bank *p) 1472static void omap_gpio_init_context(struct gpio_bank *p)
@@ -1598,6 +1622,7 @@ MODULE_DEVICE_TABLE(of, omap_gpio_match);
1598 1622
1599static struct platform_driver omap_gpio_driver = { 1623static struct platform_driver omap_gpio_driver = {
1600 .probe = omap_gpio_probe, 1624 .probe = omap_gpio_probe,
1625 .remove = omap_gpio_remove,
1601 .driver = { 1626 .driver = {
1602 .name = "omap_gpio", 1627 .name = "omap_gpio",
1603 .pm = &gpio_pm_ops, 1628 .pm = &gpio_pm_ops,
@@ -1615,3 +1640,13 @@ static int __init omap_gpio_drv_reg(void)
1615 return platform_driver_register(&omap_gpio_driver); 1640 return platform_driver_register(&omap_gpio_driver);
1616} 1641}
1617postcore_initcall(omap_gpio_drv_reg); 1642postcore_initcall(omap_gpio_drv_reg);
1643
1644static void __exit omap_gpio_exit(void)
1645{
1646 platform_driver_unregister(&omap_gpio_driver);
1647}
1648module_exit(omap_gpio_exit);
1649
1650MODULE_DESCRIPTION("omap gpio driver");
1651MODULE_ALIAS("platform:gpio-omap");
1652MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index e2da64abbccd..d233eb3b8132 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -443,12 +443,13 @@ static struct irq_chip pca953x_irq_chip = {
443 .irq_set_type = pca953x_irq_set_type, 443 .irq_set_type = pca953x_irq_set_type,
444}; 444};
445 445
446static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 446static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
447{ 447{
448 u8 cur_stat[MAX_BANK]; 448 u8 cur_stat[MAX_BANK];
449 u8 old_stat[MAX_BANK]; 449 u8 old_stat[MAX_BANK];
450 u8 pendings = 0; 450 bool pending_seen = false;
451 u8 trigger[MAX_BANK], triggers = 0; 451 bool trigger_seen = false;
452 u8 trigger[MAX_BANK];
452 int ret, i, offset = 0; 453 int ret, i, offset = 0;
453 454
454 switch (chip->chip_type) { 455 switch (chip->chip_type) {
@@ -461,7 +462,7 @@ static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
461 } 462 }
462 ret = pca953x_read_regs(chip, offset, cur_stat); 463 ret = pca953x_read_regs(chip, offset, cur_stat);
463 if (ret) 464 if (ret)
464 return 0; 465 return false;
465 466
466 /* Remove output pins from the equation */ 467 /* Remove output pins from the equation */
467 for (i = 0; i < NBANK(chip); i++) 468 for (i = 0; i < NBANK(chip); i++)
@@ -471,11 +472,12 @@ static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
471 472
472 for (i = 0; i < NBANK(chip); i++) { 473 for (i = 0; i < NBANK(chip); i++) {
473 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 474 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
474 triggers += trigger[i]; 475 if (trigger[i])
476 trigger_seen = true;
475 } 477 }
476 478
477 if (!triggers) 479 if (!trigger_seen)
478 return 0; 480 return false;
479 481
480 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 482 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
481 483
@@ -483,10 +485,11 @@ static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
483 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 485 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
484 (cur_stat[i] & chip->irq_trig_raise[i]); 486 (cur_stat[i] & chip->irq_trig_raise[i]);
485 pending[i] &= trigger[i]; 487 pending[i] &= trigger[i];
486 pendings += pending[i]; 488 if (pending[i])
489 pending_seen = true;
487 } 490 }
488 491
489 return pendings; 492 return pending_seen;
490} 493}
491 494
492static irqreturn_t pca953x_irq_handler(int irq, void *devid) 495static irqreturn_t pca953x_irq_handler(int irq, void *devid)
@@ -630,7 +633,7 @@ static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
630 memset(val, 0, NBANK(chip)); 633 memset(val, 0, NBANK(chip));
631 pca953x_write_regs(chip, PCA957X_INVRT, val); 634 pca953x_write_regs(chip, PCA957X_INVRT, val);
632 635
633 /* To enable register 6, 7 to controll pull up and pull down */ 636 /* To enable register 6, 7 to control pull up and pull down */
634 memset(val, 0x02, NBANK(chip)); 637 memset(val, 0x02, NBANK(chip));
635 pca953x_write_regs(chip, PCA957X_BKEN, val); 638 pca953x_write_regs(chip, PCA957X_BKEN, val);
636 639
diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c
index 945f0cda8529..404f3c61ef9b 100644
--- a/drivers/gpio/gpio-pcf857x.c
+++ b/drivers/gpio/gpio-pcf857x.c
@@ -91,6 +91,8 @@ struct pcf857x {
91 spinlock_t slock; /* protect irq demux */ 91 spinlock_t slock; /* protect irq demux */
92 unsigned out; /* software latch */ 92 unsigned out; /* software latch */
93 unsigned status; /* current status */ 93 unsigned status; /* current status */
94 unsigned int irq_parent;
95 unsigned irq_enabled; /* enabled irqs */
94 96
95 int (*write)(struct i2c_client *client, unsigned data); 97 int (*write)(struct i2c_client *client, unsigned data);
96 int (*read)(struct i2c_client *client); 98 int (*read)(struct i2c_client *client);
@@ -194,7 +196,7 @@ static irqreturn_t pcf857x_irq(int irq, void *data)
194 * interrupt source, just to avoid bad irqs 196 * interrupt source, just to avoid bad irqs
195 */ 197 */
196 198
197 change = (gpio->status ^ status); 199 change = (gpio->status ^ status) & gpio->irq_enabled;
198 for_each_set_bit(i, &change, gpio->chip.ngpio) 200 for_each_set_bit(i, &change, gpio->chip.ngpio)
199 handle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i)); 201 handle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i));
200 gpio->status = status; 202 gpio->status = status;
@@ -209,29 +211,62 @@ static irqreturn_t pcf857x_irq(int irq, void *data)
209 */ 211 */
210static void noop(struct irq_data *data) { } 212static void noop(struct irq_data *data) { }
211 213
212static unsigned int noop_ret(struct irq_data *data) 214static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
213{ 215{
214 return 0; 216 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
217
218 int error = 0;
219
220 if (gpio->irq_parent) {
221 error = irq_set_irq_wake(gpio->irq_parent, on);
222 if (error) {
223 dev_dbg(&gpio->client->dev,
224 "irq %u doesn't support irq_set_wake\n",
225 gpio->irq_parent);
226 gpio->irq_parent = 0;
227 }
228 }
229 return error;
215} 230}
216 231
217static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on) 232static void pcf857x_irq_enable(struct irq_data *data)
218{ 233{
219 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 234 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
220 235
221 irq_set_irq_wake(gpio->client->irq, on); 236 gpio->irq_enabled |= (1 << data->hwirq);
222 return 0; 237}
238
239static void pcf857x_irq_disable(struct irq_data *data)
240{
241 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
242
243 gpio->irq_enabled &= ~(1 << data->hwirq);
244}
245
246static void pcf857x_irq_bus_lock(struct irq_data *data)
247{
248 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
249
250 mutex_lock(&gpio->lock);
251}
252
253static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
254{
255 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
256
257 mutex_unlock(&gpio->lock);
223} 258}
224 259
225static struct irq_chip pcf857x_irq_chip = { 260static struct irq_chip pcf857x_irq_chip = {
226 .name = "pcf857x", 261 .name = "pcf857x",
227 .irq_startup = noop_ret, 262 .irq_enable = pcf857x_irq_enable,
228 .irq_shutdown = noop, 263 .irq_disable = pcf857x_irq_disable,
229 .irq_enable = noop,
230 .irq_disable = noop,
231 .irq_ack = noop, 264 .irq_ack = noop,
232 .irq_mask = noop, 265 .irq_mask = noop,
233 .irq_unmask = noop, 266 .irq_unmask = noop,
234 .irq_set_wake = pcf857x_irq_set_wake, 267 .irq_set_wake = pcf857x_irq_set_wake,
268 .irq_bus_lock = pcf857x_irq_bus_lock,
269 .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock,
235}; 270};
236 271
237/*-------------------------------------------------------------------------*/ 272/*-------------------------------------------------------------------------*/
@@ -364,6 +399,7 @@ static int pcf857x_probe(struct i2c_client *client,
364 399
365 gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip, 400 gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip,
366 client->irq, NULL); 401 client->irq, NULL);
402 gpio->irq_parent = client->irq;
367 } 403 }
368 404
369 /* Let platform code set up the GPIOs and their users. 405 /* Let platform code set up the GPIOs and their users.
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index fd3977465948..1e14a6c74ed1 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -177,8 +177,17 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on)
177 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 177 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
178 struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv, 178 struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
179 gpio_chip); 179 gpio_chip);
180 180 int error;
181 irq_set_irq_wake(p->irq_parent, on); 181
182 if (p->irq_parent) {
183 error = irq_set_irq_wake(p->irq_parent, on);
184 if (error) {
185 dev_dbg(&p->pdev->dev,
186 "irq %u doesn't support irq_set_wake\n",
187 p->irq_parent);
188 p->irq_parent = 0;
189 }
190 }
182 191
183 if (!p->clk) 192 if (!p->clk)
184 return 0; 193 return 0;
diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c
index 202361eb7279..81bdbe7ba2a4 100644
--- a/drivers/gpio/gpio-stp-xway.c
+++ b/drivers/gpio/gpio-stp-xway.c
@@ -58,7 +58,7 @@
58#define XWAY_STP_ADSL_MASK 0x3 58#define XWAY_STP_ADSL_MASK 0x3
59 59
60/* 2 groups of 3 bits can be driven by the phys */ 60/* 2 groups of 3 bits can be driven by the phys */
61#define XWAY_STP_PHY_MASK 0x3 61#define XWAY_STP_PHY_MASK 0x7
62#define XWAY_STP_PHY1_SHIFT 27 62#define XWAY_STP_PHY1_SHIFT 27
63#define XWAY_STP_PHY2_SHIFT 15 63#define XWAY_STP_PHY2_SHIFT 15
64 64
@@ -200,7 +200,7 @@ static int xway_stp_hw_init(struct xway_stp *chip)
200static int xway_stp_probe(struct platform_device *pdev) 200static int xway_stp_probe(struct platform_device *pdev)
201{ 201{
202 struct resource *res; 202 struct resource *res;
203 const __be32 *shadow, *groups, *dsl, *phy; 203 u32 shadow, groups, dsl, phy;
204 struct xway_stp *chip; 204 struct xway_stp *chip;
205 struct clk *clk; 205 struct clk *clk;
206 int ret = 0; 206 int ret = 0;
@@ -223,33 +223,28 @@ static int xway_stp_probe(struct platform_device *pdev)
223 chip->gc.owner = THIS_MODULE; 223 chip->gc.owner = THIS_MODULE;
224 224
225 /* store the shadow value if one was passed by the devicetree */ 225 /* store the shadow value if one was passed by the devicetree */
226 shadow = of_get_property(pdev->dev.of_node, "lantiq,shadow", NULL); 226 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow))
227 if (shadow) 227 chip->shadow = shadow;
228 chip->shadow = be32_to_cpu(*shadow);
229 228
230 /* find out which gpio groups should be enabled */ 229 /* find out which gpio groups should be enabled */
231 groups = of_get_property(pdev->dev.of_node, "lantiq,groups", NULL); 230 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,groups", &groups))
232 if (groups) 231 chip->groups = groups & XWAY_STP_GROUP_MASK;
233 chip->groups = be32_to_cpu(*groups) & XWAY_STP_GROUP_MASK;
234 else 232 else
235 chip->groups = XWAY_STP_GROUP0; 233 chip->groups = XWAY_STP_GROUP0;
236 chip->gc.ngpio = fls(chip->groups) * 8; 234 chip->gc.ngpio = fls(chip->groups) * 8;
237 235
238 /* find out which gpios are controlled by the dsl core */ 236 /* find out which gpios are controlled by the dsl core */
239 dsl = of_get_property(pdev->dev.of_node, "lantiq,dsl", NULL); 237 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,dsl", &dsl))
240 if (dsl) 238 chip->dsl = dsl & XWAY_STP_ADSL_MASK;
241 chip->dsl = be32_to_cpu(*dsl) & XWAY_STP_ADSL_MASK;
242 239
243 /* find out which gpios are controlled by the phys */ 240 /* find out which gpios are controlled by the phys */
244 if (of_machine_is_compatible("lantiq,ar9") || 241 if (of_machine_is_compatible("lantiq,ar9") ||
245 of_machine_is_compatible("lantiq,gr9") || 242 of_machine_is_compatible("lantiq,gr9") ||
246 of_machine_is_compatible("lantiq,vr9")) { 243 of_machine_is_compatible("lantiq,vr9")) {
247 phy = of_get_property(pdev->dev.of_node, "lantiq,phy1", NULL); 244 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,phy1", &phy))
248 if (phy) 245 chip->phy1 = phy & XWAY_STP_PHY_MASK;
249 chip->phy1 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK; 246 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,phy2", &phy))
250 phy = of_get_property(pdev->dev.of_node, "lantiq,phy2", NULL); 247 chip->phy2 = phy & XWAY_STP_PHY_MASK;
251 if (phy)
252 chip->phy2 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK;
253 } 248 }
254 249
255 /* check which edge trigger we should use, default to a falling edge */ 250 /* check which edge trigger we should use, default to a falling edge */
diff --git a/drivers/gpio/gpio-tb10x.c b/drivers/gpio/gpio-tb10x.c
index 46b89614aa91..12c99d969b98 100644
--- a/drivers/gpio/gpio-tb10x.c
+++ b/drivers/gpio/gpio-tb10x.c
@@ -292,7 +292,6 @@ static int tb10x_gpio_remove(struct platform_device *pdev)
292 BIT(tb10x_gpio->gc.ngpio) - 1, 0, 0); 292 BIT(tb10x_gpio->gc.ngpio) - 1, 0, 0);
293 kfree(tb10x_gpio->domain->gc); 293 kfree(tb10x_gpio->domain->gc);
294 irq_domain_remove(tb10x_gpio->domain); 294 irq_domain_remove(tb10x_gpio->domain);
295 free_irq(tb10x_gpio->irq, tb10x_gpio);
296 } 295 }
297 gpiochip_remove(&tb10x_gpio->gc); 296 gpiochip_remove(&tb10x_gpio->gc);
298 297
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 56dcc8ed98de..9b25c90f725c 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -288,7 +288,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
288 tegra_gpio_writel(1 << pin, GPIO_INT_CLR(gpio)); 288 tegra_gpio_writel(1 << pin, GPIO_INT_CLR(gpio));
289 289
290 /* if gpio is edge triggered, clear condition 290 /* if gpio is edge triggered, clear condition
291 * before executing the hander so that we don't 291 * before executing the handler so that we don't
292 * miss edges 292 * miss edges
293 */ 293 */
294 if (lvl & (0x100 << pin)) { 294 if (lvl & (0x100 << pin)) {
diff --git a/drivers/gpio/gpio-ts5500.c b/drivers/gpio/gpio-ts5500.c
index 92fbabd82879..b29a102d136b 100644
--- a/drivers/gpio/gpio-ts5500.c
+++ b/drivers/gpio/gpio-ts5500.c
@@ -440,7 +440,7 @@ static int ts5500_dio_remove(struct platform_device *pdev)
440 return 0; 440 return 0;
441} 441}
442 442
443static struct platform_device_id ts5500_dio_ids[] = { 443static const struct platform_device_id ts5500_dio_ids[] = {
444 { "ts5500-dio1", TS5500_DIO1 }, 444 { "ts5500-dio1", TS5500_DIO1 },
445 { "ts5500-dio2", TS5500_DIO2 }, 445 { "ts5500-dio2", TS5500_DIO2 },
446 { "ts5500-dio-lcd", TS5500_LCD }, 446 { "ts5500-dio-lcd", TS5500_LCD },
diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c
index fb9d29a5d584..d57068b9083e 100644
--- a/drivers/gpio/gpio-xgene-sb.c
+++ b/drivers/gpio/gpio-xgene-sb.c
@@ -25,8 +25,11 @@
25#include <linux/of_gpio.h> 25#include <linux/of_gpio.h>
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/gpio/driver.h> 27#include <linux/gpio/driver.h>
28#include <linux/acpi.h>
28#include <linux/basic_mmio_gpio.h> 29#include <linux/basic_mmio_gpio.h>
29 30
31#include "gpiolib.h"
32
30#define XGENE_MAX_GPIO_DS 22 33#define XGENE_MAX_GPIO_DS 22
31#define XGENE_MAX_GPIO_DS_IRQ 6 34#define XGENE_MAX_GPIO_DS_IRQ 6
32 35
@@ -112,7 +115,6 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev)
112 GFP_KERNEL); 115 GFP_KERNEL);
113 if (!priv->irq) 116 if (!priv->irq)
114 return -ENOMEM; 117 return -ENOMEM;
115 memset(priv->irq, 0, sizeof(u32) * XGENE_MAX_GPIO_DS);
116 118
117 for (i = 0; i < priv->nirq; i++) { 119 for (i = 0; i < priv->nirq; i++) {
118 priv->irq[default_lines[i]] = platform_get_irq(pdev, i); 120 priv->irq[default_lines[i]] = platform_get_irq(pdev, i);
@@ -129,6 +131,11 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev)
129 else 131 else
130 dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n"); 132 dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n");
131 133
134 if (priv->nirq > 0) {
135 /* Register interrupt handlers for gpio signaled acpi events */
136 acpi_gpiochip_request_interrupts(&priv->bgc.gc);
137 }
138
132 return ret; 139 return ret;
133} 140}
134 141
@@ -136,6 +143,10 @@ static int xgene_gpio_sb_remove(struct platform_device *pdev)
136{ 143{
137 struct xgene_gpio_sb *priv = platform_get_drvdata(pdev); 144 struct xgene_gpio_sb *priv = platform_get_drvdata(pdev);
138 145
146 if (priv->nirq > 0) {
147 acpi_gpiochip_free_interrupts(&priv->bgc.gc);
148 }
149
139 return bgpio_remove(&priv->bgc); 150 return bgpio_remove(&priv->bgc);
140} 151}
141 152
@@ -145,10 +156,19 @@ static const struct of_device_id xgene_gpio_sb_of_match[] = {
145}; 156};
146MODULE_DEVICE_TABLE(of, xgene_gpio_sb_of_match); 157MODULE_DEVICE_TABLE(of, xgene_gpio_sb_of_match);
147 158
159#ifdef CONFIG_ACPI
160static const struct acpi_device_id xgene_gpio_sb_acpi_match[] = {
161 {"APMC0D15", 0},
162 {},
163};
164MODULE_DEVICE_TABLE(acpi, xgene_gpio_sb_acpi_match);
165#endif
166
148static struct platform_driver xgene_gpio_sb_driver = { 167static struct platform_driver xgene_gpio_sb_driver = {
149 .driver = { 168 .driver = {
150 .name = "xgene-gpio-sb", 169 .name = "xgene-gpio-sb",
151 .of_match_table = xgene_gpio_sb_of_match, 170 .of_match_table = xgene_gpio_sb_of_match,
171 .acpi_match_table = ACPI_PTR(xgene_gpio_sb_acpi_match),
152 }, 172 },
153 .probe = xgene_gpio_sb_probe, 173 .probe = xgene_gpio_sb_probe,
154 .remove = xgene_gpio_sb_remove, 174 .remove = xgene_gpio_sb_remove,
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index 61243d177740..77fe5d3cb105 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -41,10 +41,10 @@
41/** 41/**
42 * struct xgpio_instance - Stores information about GPIO device 42 * struct xgpio_instance - Stores information about GPIO device
43 * @mmchip: OF GPIO chip for memory mapped banks 43 * @mmchip: OF GPIO chip for memory mapped banks
44 * @gpio_width: GPIO width for every channel
44 * @gpio_state: GPIO state shadow register 45 * @gpio_state: GPIO state shadow register
45 * @gpio_dir: GPIO direction shadow register 46 * @gpio_dir: GPIO direction shadow register
46 * @gpio_lock: Lock used for synchronization 47 * @gpio_lock: Lock used for synchronization
47 * @inited: True if the port has been inited
48 */ 48 */
49struct xgpio_instance { 49struct xgpio_instance {
50 struct of_mm_gpio_chip mmchip; 50 struct of_mm_gpio_chip mmchip;
@@ -231,6 +231,8 @@ static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
231 * @pdev: pointer to the platform device 231 * @pdev: pointer to the platform device
232 * 232 *
233 * This function remove gpiochips and frees all the allocated resources. 233 * This function remove gpiochips and frees all the allocated resources.
234 *
235 * Return: 0 always
234 */ 236 */
235static int xgpio_remove(struct platform_device *pdev) 237static int xgpio_remove(struct platform_device *pdev)
236{ 238{
diff --git a/drivers/gpio/gpio-xlp.c b/drivers/gpio/gpio-xlp.c
new file mode 100644
index 000000000000..9bdab7203d65
--- /dev/null
+++ b/drivers/gpio/gpio-xlp.c
@@ -0,0 +1,427 @@
1/*
2 * Copyright (C) 2003-2015 Broadcom Corporation
3 * All Rights Reserved
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/gpio.h>
16#include <linux/platform_device.h>
17#include <linux/of_device.h>
18#include <linux/module.h>
19#include <linux/irq.h>
20#include <linux/interrupt.h>
21
22/*
23 * XLP GPIO has multiple 32 bit registers for each feature where each register
24 * controls 32 pins. So, pins up to 64 require 2 32-bit registers and up to 96
25 * require 3 32-bit registers for each feature.
26 * Here we only define offset of the first register for each feature. Offset of
27 * the registers for pins greater than 32 can be calculated as following(Use
28 * GPIO_INT_STAT as example):
29 *
30 * offset = (gpio / XLP_GPIO_REGSZ) * 4;
31 * reg_addr = addr + offset;
32 *
33 * where addr is base address of the that feature register and gpio is the pin.
34 */
35#define GPIO_OUTPUT_EN 0x00
36#define GPIO_PADDRV 0x08
37#define GPIO_INT_EN00 0x18
38#define GPIO_INT_EN10 0x20
39#define GPIO_INT_EN20 0x28
40#define GPIO_INT_EN30 0x30
41#define GPIO_INT_POL 0x38
42#define GPIO_INT_TYPE 0x40
43#define GPIO_INT_STAT 0x48
44
45#define GPIO_9XX_BYTESWAP 0X00
46#define GPIO_9XX_CTRL 0X04
47#define GPIO_9XX_OUTPUT_EN 0x14
48#define GPIO_9XX_PADDRV 0x24
49/*
50 * Only for 4 interrupt enable reg are defined for now,
51 * total reg available are 12.
52 */
53#define GPIO_9XX_INT_EN00 0x44
54#define GPIO_9XX_INT_EN10 0x54
55#define GPIO_9XX_INT_EN20 0x64
56#define GPIO_9XX_INT_EN30 0x74
57#define GPIO_9XX_INT_POL 0x104
58#define GPIO_9XX_INT_TYPE 0x114
59#define GPIO_9XX_INT_STAT 0x124
60
61#define GPIO_3XX_INT_EN00 0x18
62#define GPIO_3XX_INT_EN10 0x20
63#define GPIO_3XX_INT_EN20 0x28
64#define GPIO_3XX_INT_EN30 0x30
65#define GPIO_3XX_INT_POL 0x78
66#define GPIO_3XX_INT_TYPE 0x80
67#define GPIO_3XX_INT_STAT 0x88
68
69/* Interrupt type register mask */
70#define XLP_GPIO_IRQ_TYPE_LVL 0x0
71#define XLP_GPIO_IRQ_TYPE_EDGE 0x1
72
73/* Interrupt polarity register mask */
74#define XLP_GPIO_IRQ_POL_HIGH 0x0
75#define XLP_GPIO_IRQ_POL_LOW 0x1
76
77#define XLP_GPIO_REGSZ 32
78#define XLP_GPIO_IRQ_BASE 768
79#define XLP_MAX_NR_GPIO 96
80
81/* XLP variants supported by this driver */
82enum {
83 XLP_GPIO_VARIANT_XLP832 = 1,
84 XLP_GPIO_VARIANT_XLP316,
85 XLP_GPIO_VARIANT_XLP208,
86 XLP_GPIO_VARIANT_XLP980,
87 XLP_GPIO_VARIANT_XLP532
88};
89
90struct xlp_gpio_priv {
91 struct gpio_chip chip;
92 DECLARE_BITMAP(gpio_enabled_mask, XLP_MAX_NR_GPIO);
93 void __iomem *gpio_intr_en; /* pointer to first intr enable reg */
94 void __iomem *gpio_intr_stat; /* pointer to first intr status reg */
95 void __iomem *gpio_intr_type; /* pointer to first intr type reg */
96 void __iomem *gpio_intr_pol; /* pointer to first intr polarity reg */
97 void __iomem *gpio_out_en; /* pointer to first output enable reg */
98 void __iomem *gpio_paddrv; /* pointer to first pad drive reg */
99 spinlock_t lock;
100};
101
102static struct xlp_gpio_priv *gpio_chip_to_xlp_priv(struct gpio_chip *gc)
103{
104 return container_of(gc, struct xlp_gpio_priv, chip);
105}
106
107static int xlp_gpio_get_reg(void __iomem *addr, unsigned gpio)
108{
109 u32 pos, regset;
110
111 pos = gpio % XLP_GPIO_REGSZ;
112 regset = (gpio / XLP_GPIO_REGSZ) * 4;
113 return !!(readl(addr + regset) & BIT(pos));
114}
115
116static void xlp_gpio_set_reg(void __iomem *addr, unsigned gpio, int state)
117{
118 u32 value, pos, regset;
119
120 pos = gpio % XLP_GPIO_REGSZ;
121 regset = (gpio / XLP_GPIO_REGSZ) * 4;
122 value = readl(addr + regset);
123
124 if (state)
125 value |= BIT(pos);
126 else
127 value &= ~BIT(pos);
128
129 writel(value, addr + regset);
130}
131
132static void xlp_gpio_irq_disable(struct irq_data *d)
133{
134 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
135 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
136 unsigned long flags;
137
138 spin_lock_irqsave(&priv->lock, flags);
139 xlp_gpio_set_reg(priv->gpio_intr_en, d->hwirq, 0x0);
140 __clear_bit(d->hwirq, priv->gpio_enabled_mask);
141 spin_unlock_irqrestore(&priv->lock, flags);
142}
143
144static void xlp_gpio_irq_mask_ack(struct irq_data *d)
145{
146 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
147 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
148 unsigned long flags;
149
150 spin_lock_irqsave(&priv->lock, flags);
151 xlp_gpio_set_reg(priv->gpio_intr_en, d->hwirq, 0x0);
152 xlp_gpio_set_reg(priv->gpio_intr_stat, d->hwirq, 0x1);
153 __clear_bit(d->hwirq, priv->gpio_enabled_mask);
154 spin_unlock_irqrestore(&priv->lock, flags);
155}
156
157static void xlp_gpio_irq_unmask(struct irq_data *d)
158{
159 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
160 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
161 unsigned long flags;
162
163 spin_lock_irqsave(&priv->lock, flags);
164 xlp_gpio_set_reg(priv->gpio_intr_en, d->hwirq, 0x1);
165 __set_bit(d->hwirq, priv->gpio_enabled_mask);
166 spin_unlock_irqrestore(&priv->lock, flags);
167}
168
169static int xlp_gpio_set_irq_type(struct irq_data *d, unsigned int type)
170{
171 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
172 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
173 int pol, irq_type;
174
175 switch (type) {
176 case IRQ_TYPE_EDGE_RISING:
177 irq_type = XLP_GPIO_IRQ_TYPE_EDGE;
178 pol = XLP_GPIO_IRQ_POL_HIGH;
179 break;
180 case IRQ_TYPE_EDGE_FALLING:
181 irq_type = XLP_GPIO_IRQ_TYPE_EDGE;
182 pol = XLP_GPIO_IRQ_POL_LOW;
183 break;
184 case IRQ_TYPE_LEVEL_HIGH:
185 irq_type = XLP_GPIO_IRQ_TYPE_LVL;
186 pol = XLP_GPIO_IRQ_POL_HIGH;
187 break;
188 case IRQ_TYPE_LEVEL_LOW:
189 irq_type = XLP_GPIO_IRQ_TYPE_LVL;
190 pol = XLP_GPIO_IRQ_POL_LOW;
191 break;
192 default:
193 return -EINVAL;
194 }
195
196 xlp_gpio_set_reg(priv->gpio_intr_type, d->hwirq, irq_type);
197 xlp_gpio_set_reg(priv->gpio_intr_pol, d->hwirq, pol);
198
199 return 0;
200}
201
202static struct irq_chip xlp_gpio_irq_chip = {
203 .name = "XLP-GPIO",
204 .irq_mask_ack = xlp_gpio_irq_mask_ack,
205 .irq_disable = xlp_gpio_irq_disable,
206 .irq_set_type = xlp_gpio_set_irq_type,
207 .irq_unmask = xlp_gpio_irq_unmask,
208 .flags = IRQCHIP_ONESHOT_SAFE,
209};
210
211static irqreturn_t xlp_gpio_generic_handler(int irq, void *data)
212{
213 struct xlp_gpio_priv *priv = data;
214 int gpio, regoff;
215 u32 gpio_stat;
216
217 regoff = -1;
218 gpio_stat = 0;
219 for_each_set_bit(gpio, priv->gpio_enabled_mask, XLP_MAX_NR_GPIO) {
220 if (regoff != gpio / XLP_GPIO_REGSZ) {
221 regoff = gpio / XLP_GPIO_REGSZ;
222 gpio_stat = readl(priv->gpio_intr_stat + regoff * 4);
223 }
224 if (gpio_stat & BIT(gpio % XLP_GPIO_REGSZ))
225 generic_handle_irq(irq_find_mapping(
226 priv->chip.irqdomain, gpio));
227 }
228
229 return IRQ_HANDLED;
230}
231
232static int xlp_gpio_dir_output(struct gpio_chip *gc, unsigned gpio, int state)
233{
234 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
235
236 BUG_ON(gpio >= gc->ngpio);
237 xlp_gpio_set_reg(priv->gpio_out_en, gpio, 0x1);
238
239 return 0;
240}
241
242static int xlp_gpio_dir_input(struct gpio_chip *gc, unsigned gpio)
243{
244 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
245
246 BUG_ON(gpio >= gc->ngpio);
247 xlp_gpio_set_reg(priv->gpio_out_en, gpio, 0x0);
248
249 return 0;
250}
251
252static int xlp_gpio_get(struct gpio_chip *gc, unsigned gpio)
253{
254 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
255
256 BUG_ON(gpio >= gc->ngpio);
257 return xlp_gpio_get_reg(priv->gpio_paddrv, gpio);
258}
259
260static void xlp_gpio_set(struct gpio_chip *gc, unsigned gpio, int state)
261{
262 struct xlp_gpio_priv *priv = gpio_chip_to_xlp_priv(gc);
263
264 BUG_ON(gpio >= gc->ngpio);
265 xlp_gpio_set_reg(priv->gpio_paddrv, gpio, state);
266}
267
268static const struct of_device_id xlp_gpio_of_ids[] = {
269 {
270 .compatible = "netlogic,xlp832-gpio",
271 .data = (void *)XLP_GPIO_VARIANT_XLP832,
272 },
273 {
274 .compatible = "netlogic,xlp316-gpio",
275 .data = (void *)XLP_GPIO_VARIANT_XLP316,
276 },
277 {
278 .compatible = "netlogic,xlp208-gpio",
279 .data = (void *)XLP_GPIO_VARIANT_XLP208,
280 },
281 {
282 .compatible = "netlogic,xlp980-gpio",
283 .data = (void *)XLP_GPIO_VARIANT_XLP980,
284 },
285 {
286 .compatible = "netlogic,xlp532-gpio",
287 .data = (void *)XLP_GPIO_VARIANT_XLP532,
288 },
289 { /* sentinel */ },
290};
291MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids);
292
293static int xlp_gpio_probe(struct platform_device *pdev)
294{
295 struct gpio_chip *gc;
296 struct resource *iores;
297 struct xlp_gpio_priv *priv;
298 const struct of_device_id *of_id;
299 void __iomem *gpio_base;
300 int irq_base, irq, err;
301 int ngpio;
302 u32 soc_type;
303
304 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
305 if (!iores)
306 return -ENODEV;
307
308 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
309 if (!priv)
310 return -ENOMEM;
311
312 gpio_base = devm_ioremap_resource(&pdev->dev, iores);
313 if (IS_ERR(gpio_base))
314 return PTR_ERR(gpio_base);
315
316 irq = platform_get_irq(pdev, 0);
317 if (irq < 0)
318 return irq;
319
320 of_id = of_match_device(xlp_gpio_of_ids, &pdev->dev);
321 if (!of_id) {
322 dev_err(&pdev->dev, "Failed to get soc type!\n");
323 return -ENODEV;
324 }
325
326 soc_type = (uintptr_t) of_id->data;
327
328 switch (soc_type) {
329 case XLP_GPIO_VARIANT_XLP832:
330 priv->gpio_out_en = gpio_base + GPIO_OUTPUT_EN;
331 priv->gpio_paddrv = gpio_base + GPIO_PADDRV;
332 priv->gpio_intr_stat = gpio_base + GPIO_INT_STAT;
333 priv->gpio_intr_type = gpio_base + GPIO_INT_TYPE;
334 priv->gpio_intr_pol = gpio_base + GPIO_INT_POL;
335 priv->gpio_intr_en = gpio_base + GPIO_INT_EN00;
336 ngpio = 41;
337 break;
338 case XLP_GPIO_VARIANT_XLP208:
339 case XLP_GPIO_VARIANT_XLP316:
340 priv->gpio_out_en = gpio_base + GPIO_OUTPUT_EN;
341 priv->gpio_paddrv = gpio_base + GPIO_PADDRV;
342 priv->gpio_intr_stat = gpio_base + GPIO_3XX_INT_STAT;
343 priv->gpio_intr_type = gpio_base + GPIO_3XX_INT_TYPE;
344 priv->gpio_intr_pol = gpio_base + GPIO_3XX_INT_POL;
345 priv->gpio_intr_en = gpio_base + GPIO_3XX_INT_EN00;
346
347 ngpio = (soc_type == XLP_GPIO_VARIANT_XLP208) ? 42 : 57;
348 break;
349 case XLP_GPIO_VARIANT_XLP980:
350 case XLP_GPIO_VARIANT_XLP532:
351 priv->gpio_out_en = gpio_base + GPIO_9XX_OUTPUT_EN;
352 priv->gpio_paddrv = gpio_base + GPIO_9XX_PADDRV;
353 priv->gpio_intr_stat = gpio_base + GPIO_9XX_INT_STAT;
354 priv->gpio_intr_type = gpio_base + GPIO_9XX_INT_TYPE;
355 priv->gpio_intr_pol = gpio_base + GPIO_9XX_INT_POL;
356 priv->gpio_intr_en = gpio_base + GPIO_9XX_INT_EN00;
357
358 ngpio = (soc_type == XLP_GPIO_VARIANT_XLP980) ? 66 : 67;
359 break;
360 default:
361 dev_err(&pdev->dev, "Unknown Processor type!\n");
362 return -ENODEV;
363 }
364
365 bitmap_zero(priv->gpio_enabled_mask, XLP_MAX_NR_GPIO);
366
367 gc = &priv->chip;
368
369 gc->owner = THIS_MODULE;
370 gc->label = dev_name(&pdev->dev);
371 gc->base = 0;
372 gc->dev = &pdev->dev;
373 gc->ngpio = ngpio;
374 gc->of_node = pdev->dev.of_node;
375 gc->direction_output = xlp_gpio_dir_output;
376 gc->direction_input = xlp_gpio_dir_input;
377 gc->set = xlp_gpio_set;
378 gc->get = xlp_gpio_get;
379
380 spin_lock_init(&priv->lock);
381
382 err = devm_request_irq(&pdev->dev, irq, xlp_gpio_generic_handler,
383 IRQ_TYPE_NONE, pdev->name, priv);
384 if (err)
385 return err;
386
387 irq_base = irq_alloc_descs(-1, XLP_GPIO_IRQ_BASE, gc->ngpio, 0);
388 if (irq_base < 0) {
389 dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n");
390 return err;
391 }
392
393 err = gpiochip_add(gc);
394 if (err < 0)
395 goto out_free_desc;
396
397 err = gpiochip_irqchip_add(gc, &xlp_gpio_irq_chip, irq_base,
398 handle_level_irq, IRQ_TYPE_NONE);
399 if (err) {
400 dev_err(&pdev->dev, "Could not connect irqchip to gpiochip!\n");
401 goto out_gpio_remove;
402 }
403
404 dev_info(&pdev->dev, "registered %d GPIOs\n", gc->ngpio);
405
406 return 0;
407
408out_gpio_remove:
409 gpiochip_remove(gc);
410out_free_desc:
411 irq_free_descs(irq_base, gc->ngpio);
412 return err;
413}
414
415static struct platform_driver xlp_gpio_driver = {
416 .driver = {
417 .name = "xlp-gpio",
418 .of_match_table = xlp_gpio_of_ids,
419 },
420 .probe = xlp_gpio_probe,
421};
422module_platform_driver(xlp_gpio_driver);
423
424MODULE_AUTHOR("Kamlakant Patel <kamlakant.patel@broadcom.com>");
425MODULE_AUTHOR("Ganesan Ramalingam <ganesanr@broadcom.com>");
426MODULE_DESCRIPTION("Netlogic XLP GPIO Driver");
427MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 184c4b1b2558..2e87c4b8da26 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c
@@ -18,34 +18,47 @@
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/pm_runtime.h> 20#include <linux/pm_runtime.h>
21#include <linux/of.h>
21 22
22#define DRIVER_NAME "zynq-gpio" 23#define DRIVER_NAME "zynq-gpio"
23 24
24/* Maximum banks */ 25/* Maximum banks */
25#define ZYNQ_GPIO_MAX_BANK 4 26#define ZYNQ_GPIO_MAX_BANK 4
27#define ZYNQMP_GPIO_MAX_BANK 6
26 28
27#define ZYNQ_GPIO_BANK0_NGPIO 32 29#define ZYNQ_GPIO_BANK0_NGPIO 32
28#define ZYNQ_GPIO_BANK1_NGPIO 22 30#define ZYNQ_GPIO_BANK1_NGPIO 22
29#define ZYNQ_GPIO_BANK2_NGPIO 32 31#define ZYNQ_GPIO_BANK2_NGPIO 32
30#define ZYNQ_GPIO_BANK3_NGPIO 32 32#define ZYNQ_GPIO_BANK3_NGPIO 32
31 33
32#define ZYNQ_GPIO_NR_GPIOS (ZYNQ_GPIO_BANK0_NGPIO + \ 34#define ZYNQMP_GPIO_BANK0_NGPIO 26
33 ZYNQ_GPIO_BANK1_NGPIO + \ 35#define ZYNQMP_GPIO_BANK1_NGPIO 26
34 ZYNQ_GPIO_BANK2_NGPIO + \ 36#define ZYNQMP_GPIO_BANK2_NGPIO 26
35 ZYNQ_GPIO_BANK3_NGPIO) 37#define ZYNQMP_GPIO_BANK3_NGPIO 32
36 38#define ZYNQMP_GPIO_BANK4_NGPIO 32
37#define ZYNQ_GPIO_BANK0_PIN_MIN 0 39#define ZYNQMP_GPIO_BANK5_NGPIO 32
38#define ZYNQ_GPIO_BANK0_PIN_MAX (ZYNQ_GPIO_BANK0_PIN_MIN + \ 40
39 ZYNQ_GPIO_BANK0_NGPIO - 1) 41#define ZYNQ_GPIO_NR_GPIOS 118
40#define ZYNQ_GPIO_BANK1_PIN_MIN (ZYNQ_GPIO_BANK0_PIN_MAX + 1) 42#define ZYNQMP_GPIO_NR_GPIOS 174
41#define ZYNQ_GPIO_BANK1_PIN_MAX (ZYNQ_GPIO_BANK1_PIN_MIN + \ 43
42 ZYNQ_GPIO_BANK1_NGPIO - 1) 44#define ZYNQ_GPIO_BANK0_PIN_MIN(str) 0
43#define ZYNQ_GPIO_BANK2_PIN_MIN (ZYNQ_GPIO_BANK1_PIN_MAX + 1) 45#define ZYNQ_GPIO_BANK0_PIN_MAX(str) (ZYNQ_GPIO_BANK0_PIN_MIN(str) + \
44#define ZYNQ_GPIO_BANK2_PIN_MAX (ZYNQ_GPIO_BANK2_PIN_MIN + \ 46 ZYNQ##str##_GPIO_BANK0_NGPIO - 1)
45 ZYNQ_GPIO_BANK2_NGPIO - 1) 47#define ZYNQ_GPIO_BANK1_PIN_MIN(str) (ZYNQ_GPIO_BANK0_PIN_MAX(str) + 1)
46#define ZYNQ_GPIO_BANK3_PIN_MIN (ZYNQ_GPIO_BANK2_PIN_MAX + 1) 48#define ZYNQ_GPIO_BANK1_PIN_MAX(str) (ZYNQ_GPIO_BANK1_PIN_MIN(str) + \
47#define ZYNQ_GPIO_BANK3_PIN_MAX (ZYNQ_GPIO_BANK3_PIN_MIN + \ 49 ZYNQ##str##_GPIO_BANK1_NGPIO - 1)
48 ZYNQ_GPIO_BANK3_NGPIO - 1) 50#define ZYNQ_GPIO_BANK2_PIN_MIN(str) (ZYNQ_GPIO_BANK1_PIN_MAX(str) + 1)
51#define ZYNQ_GPIO_BANK2_PIN_MAX(str) (ZYNQ_GPIO_BANK2_PIN_MIN(str) + \
52 ZYNQ##str##_GPIO_BANK2_NGPIO - 1)
53#define ZYNQ_GPIO_BANK3_PIN_MIN(str) (ZYNQ_GPIO_BANK2_PIN_MAX(str) + 1)
54#define ZYNQ_GPIO_BANK3_PIN_MAX(str) (ZYNQ_GPIO_BANK3_PIN_MIN(str) + \
55 ZYNQ##str##_GPIO_BANK3_NGPIO - 1)
56#define ZYNQ_GPIO_BANK4_PIN_MIN(str) (ZYNQ_GPIO_BANK3_PIN_MAX(str) + 1)
57#define ZYNQ_GPIO_BANK4_PIN_MAX(str) (ZYNQ_GPIO_BANK4_PIN_MIN(str) + \
58 ZYNQ##str##_GPIO_BANK4_NGPIO - 1)
59#define ZYNQ_GPIO_BANK5_PIN_MIN(str) (ZYNQ_GPIO_BANK4_PIN_MAX(str) + 1)
60#define ZYNQ_GPIO_BANK5_PIN_MAX(str) (ZYNQ_GPIO_BANK5_PIN_MIN(str) + \
61 ZYNQ##str##_GPIO_BANK5_NGPIO - 1)
49 62
50 63
51/* Register offsets for the GPIO device */ 64/* Register offsets for the GPIO device */
@@ -89,12 +102,30 @@
89 * @base_addr: base address of the GPIO device 102 * @base_addr: base address of the GPIO device
90 * @clk: clock resource for this controller 103 * @clk: clock resource for this controller
91 * @irq: interrupt for the GPIO device 104 * @irq: interrupt for the GPIO device
105 * @p_data: pointer to platform data
92 */ 106 */
93struct zynq_gpio { 107struct zynq_gpio {
94 struct gpio_chip chip; 108 struct gpio_chip chip;
95 void __iomem *base_addr; 109 void __iomem *base_addr;
96 struct clk *clk; 110 struct clk *clk;
97 int irq; 111 int irq;
112 const struct zynq_platform_data *p_data;
113};
114
115/**
116 * struct zynq_platform_data - zynq gpio platform data structure
117 * @label: string to store in gpio->label
118 * @ngpio: max number of gpio pins
119 * @max_bank: maximum number of gpio banks
120 * @bank_min: this array represents bank's min pin
121 * @bank_max: this array represents bank's max pin
122*/
123struct zynq_platform_data {
124 const char *label;
125 u16 ngpio;
126 int max_bank;
127 int bank_min[ZYNQMP_GPIO_MAX_BANK];
128 int bank_max[ZYNQMP_GPIO_MAX_BANK];
98}; 129};
99 130
100static struct irq_chip zynq_gpio_level_irqchip; 131static struct irq_chip zynq_gpio_level_irqchip;
@@ -112,39 +143,26 @@ static struct irq_chip zynq_gpio_edge_irqchip;
112 */ 143 */
113static inline void zynq_gpio_get_bank_pin(unsigned int pin_num, 144static inline void zynq_gpio_get_bank_pin(unsigned int pin_num,
114 unsigned int *bank_num, 145 unsigned int *bank_num,
115 unsigned int *bank_pin_num) 146 unsigned int *bank_pin_num,
147 struct zynq_gpio *gpio)
116{ 148{
117 switch (pin_num) { 149 int bank;
118 case ZYNQ_GPIO_BANK0_PIN_MIN ... ZYNQ_GPIO_BANK0_PIN_MAX: 150
119 *bank_num = 0; 151 for (bank = 0; bank < gpio->p_data->max_bank; bank++) {
120 *bank_pin_num = pin_num; 152 if ((pin_num >= gpio->p_data->bank_min[bank]) &&
121 break; 153 (pin_num <= gpio->p_data->bank_max[bank])) {
122 case ZYNQ_GPIO_BANK1_PIN_MIN ... ZYNQ_GPIO_BANK1_PIN_MAX: 154 *bank_num = bank;
123 *bank_num = 1; 155 *bank_pin_num = pin_num -
124 *bank_pin_num = pin_num - ZYNQ_GPIO_BANK1_PIN_MIN; 156 gpio->p_data->bank_min[bank];
125 break; 157 return;
126 case ZYNQ_GPIO_BANK2_PIN_MIN ... ZYNQ_GPIO_BANK2_PIN_MAX: 158 }
127 *bank_num = 2;
128 *bank_pin_num = pin_num - ZYNQ_GPIO_BANK2_PIN_MIN;
129 break;
130 case ZYNQ_GPIO_BANK3_PIN_MIN ... ZYNQ_GPIO_BANK3_PIN_MAX:
131 *bank_num = 3;
132 *bank_pin_num = pin_num - ZYNQ_GPIO_BANK3_PIN_MIN;
133 break;
134 default:
135 WARN(true, "invalid GPIO pin number: %u", pin_num);
136 *bank_num = 0;
137 *bank_pin_num = 0;
138 break;
139 } 159 }
140}
141 160
142static const unsigned int zynq_gpio_bank_offset[] = { 161 /* default */
143 ZYNQ_GPIO_BANK0_PIN_MIN, 162 WARN(true, "invalid GPIO pin number: %u", pin_num);
144 ZYNQ_GPIO_BANK1_PIN_MIN, 163 *bank_num = 0;
145 ZYNQ_GPIO_BANK2_PIN_MIN, 164 *bank_pin_num = 0;
146 ZYNQ_GPIO_BANK3_PIN_MIN, 165}
147};
148 166
149/** 167/**
150 * zynq_gpio_get_value - Get the state of the specified pin of GPIO device 168 * zynq_gpio_get_value - Get the state of the specified pin of GPIO device
@@ -161,7 +179,7 @@ static int zynq_gpio_get_value(struct gpio_chip *chip, unsigned int pin)
161 unsigned int bank_num, bank_pin_num; 179 unsigned int bank_num, bank_pin_num;
162 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); 180 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
163 181
164 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); 182 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
165 183
166 data = readl_relaxed(gpio->base_addr + 184 data = readl_relaxed(gpio->base_addr +
167 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); 185 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
@@ -185,7 +203,7 @@ static void zynq_gpio_set_value(struct gpio_chip *chip, unsigned int pin,
185 unsigned int reg_offset, bank_num, bank_pin_num; 203 unsigned int reg_offset, bank_num, bank_pin_num;
186 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); 204 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
187 205
188 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); 206 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
189 207
190 if (bank_pin_num >= ZYNQ_GPIO_MID_PIN_NUM) { 208 if (bank_pin_num >= ZYNQ_GPIO_MID_PIN_NUM) {
191 /* only 16 data bits in bit maskable reg */ 209 /* only 16 data bits in bit maskable reg */
@@ -222,7 +240,7 @@ static int zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin)
222 unsigned int bank_num, bank_pin_num; 240 unsigned int bank_num, bank_pin_num;
223 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); 241 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
224 242
225 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); 243 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
226 244
227 /* bank 0 pins 7 and 8 are special and cannot be used as inputs */ 245 /* bank 0 pins 7 and 8 are special and cannot be used as inputs */
228 if (bank_num == 0 && (bank_pin_num == 7 || bank_pin_num == 8)) 246 if (bank_num == 0 && (bank_pin_num == 7 || bank_pin_num == 8))
@@ -255,7 +273,7 @@ static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin,
255 unsigned int bank_num, bank_pin_num; 273 unsigned int bank_num, bank_pin_num;
256 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip); 274 struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
257 275
258 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num); 276 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
259 277
260 /* set the GPIO pin as output */ 278 /* set the GPIO pin as output */
261 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); 279 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
@@ -286,7 +304,7 @@ static void zynq_gpio_irq_mask(struct irq_data *irq_data)
286 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); 304 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
287 305
288 device_pin_num = irq_data->hwirq; 306 device_pin_num = irq_data->hwirq;
289 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); 307 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
290 writel_relaxed(BIT(bank_pin_num), 308 writel_relaxed(BIT(bank_pin_num),
291 gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); 309 gpio->base_addr + ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
292} 310}
@@ -306,7 +324,7 @@ static void zynq_gpio_irq_unmask(struct irq_data *irq_data)
306 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); 324 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
307 325
308 device_pin_num = irq_data->hwirq; 326 device_pin_num = irq_data->hwirq;
309 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); 327 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
310 writel_relaxed(BIT(bank_pin_num), 328 writel_relaxed(BIT(bank_pin_num),
311 gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num)); 329 gpio->base_addr + ZYNQ_GPIO_INTEN_OFFSET(bank_num));
312} 330}
@@ -325,7 +343,7 @@ static void zynq_gpio_irq_ack(struct irq_data *irq_data)
325 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); 343 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
326 344
327 device_pin_num = irq_data->hwirq; 345 device_pin_num = irq_data->hwirq;
328 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); 346 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
329 writel_relaxed(BIT(bank_pin_num), 347 writel_relaxed(BIT(bank_pin_num),
330 gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); 348 gpio->base_addr + ZYNQ_GPIO_INTSTS_OFFSET(bank_num));
331} 349}
@@ -335,7 +353,7 @@ static void zynq_gpio_irq_ack(struct irq_data *irq_data)
335 * @irq_data: irq data containing irq number of gpio pin for the interrupt 353 * @irq_data: irq data containing irq number of gpio pin for the interrupt
336 * to enable 354 * to enable
337 * 355 *
338 * Clears the INTSTS bit and unmasks the given interrrupt. 356 * Clears the INTSTS bit and unmasks the given interrupt.
339 */ 357 */
340static void zynq_gpio_irq_enable(struct irq_data *irq_data) 358static void zynq_gpio_irq_enable(struct irq_data *irq_data)
341{ 359{
@@ -375,7 +393,7 @@ static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type)
375 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data); 393 struct zynq_gpio *gpio = irq_data_get_irq_chip_data(irq_data);
376 394
377 device_pin_num = irq_data->hwirq; 395 device_pin_num = irq_data->hwirq;
378 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num); 396 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio);
379 397
380 int_type = readl_relaxed(gpio->base_addr + 398 int_type = readl_relaxed(gpio->base_addr +
381 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num)); 399 ZYNQ_GPIO_INTTYPE_OFFSET(bank_num));
@@ -470,7 +488,7 @@ static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,
470 unsigned int bank_num, 488 unsigned int bank_num,
471 unsigned long pending) 489 unsigned long pending)
472{ 490{
473 unsigned int bank_offset = zynq_gpio_bank_offset[bank_num]; 491 unsigned int bank_offset = gpio->p_data->bank_min[bank_num];
474 struct irq_domain *irqdomain = gpio->chip.irqdomain; 492 struct irq_domain *irqdomain = gpio->chip.irqdomain;
475 int offset; 493 int offset;
476 494
@@ -505,7 +523,7 @@ static void zynq_gpio_irqhandler(unsigned int irq, struct irq_desc *desc)
505 523
506 chained_irq_enter(irqchip, desc); 524 chained_irq_enter(irqchip, desc);
507 525
508 for (bank_num = 0; bank_num < ZYNQ_GPIO_MAX_BANK; bank_num++) { 526 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {
509 int_sts = readl_relaxed(gpio->base_addr + 527 int_sts = readl_relaxed(gpio->base_addr +
510 ZYNQ_GPIO_INTSTS_OFFSET(bank_num)); 528 ZYNQ_GPIO_INTSTS_OFFSET(bank_num));
511 int_enb = readl_relaxed(gpio->base_addr + 529 int_enb = readl_relaxed(gpio->base_addr +
@@ -582,6 +600,46 @@ static const struct dev_pm_ops zynq_gpio_dev_pm_ops = {
582 zynq_gpio_runtime_resume, NULL) 600 zynq_gpio_runtime_resume, NULL)
583}; 601};
584 602
603static const struct zynq_platform_data zynqmp_gpio_def = {
604 .label = "zynqmp_gpio",
605 .ngpio = ZYNQMP_GPIO_NR_GPIOS,
606 .max_bank = ZYNQMP_GPIO_MAX_BANK,
607 .bank_min[0] = ZYNQ_GPIO_BANK0_PIN_MIN(MP),
608 .bank_max[0] = ZYNQ_GPIO_BANK0_PIN_MAX(MP),
609 .bank_min[1] = ZYNQ_GPIO_BANK1_PIN_MIN(MP),
610 .bank_max[1] = ZYNQ_GPIO_BANK1_PIN_MAX(MP),
611 .bank_min[2] = ZYNQ_GPIO_BANK2_PIN_MIN(MP),
612 .bank_max[2] = ZYNQ_GPIO_BANK2_PIN_MAX(MP),
613 .bank_min[3] = ZYNQ_GPIO_BANK3_PIN_MIN(MP),
614 .bank_max[3] = ZYNQ_GPIO_BANK3_PIN_MAX(MP),
615 .bank_min[4] = ZYNQ_GPIO_BANK4_PIN_MIN(MP),
616 .bank_max[4] = ZYNQ_GPIO_BANK4_PIN_MAX(MP),
617 .bank_min[5] = ZYNQ_GPIO_BANK5_PIN_MIN(MP),
618 .bank_max[5] = ZYNQ_GPIO_BANK5_PIN_MAX(MP),
619};
620
621static const struct zynq_platform_data zynq_gpio_def = {
622 .label = "zynq_gpio",
623 .ngpio = ZYNQ_GPIO_NR_GPIOS,
624 .max_bank = ZYNQ_GPIO_MAX_BANK,
625 .bank_min[0] = ZYNQ_GPIO_BANK0_PIN_MIN(),
626 .bank_max[0] = ZYNQ_GPIO_BANK0_PIN_MAX(),
627 .bank_min[1] = ZYNQ_GPIO_BANK1_PIN_MIN(),
628 .bank_max[1] = ZYNQ_GPIO_BANK1_PIN_MAX(),
629 .bank_min[2] = ZYNQ_GPIO_BANK2_PIN_MIN(),
630 .bank_max[2] = ZYNQ_GPIO_BANK2_PIN_MAX(),
631 .bank_min[3] = ZYNQ_GPIO_BANK3_PIN_MIN(),
632 .bank_max[3] = ZYNQ_GPIO_BANK3_PIN_MAX(),
633};
634
635static const struct of_device_id zynq_gpio_of_match[] = {
636 { .compatible = "xlnx,zynq-gpio-1.0", .data = (void *)&zynq_gpio_def },
637 { .compatible = "xlnx,zynqmp-gpio-1.0",
638 .data = (void *)&zynqmp_gpio_def },
639 { /* end of table */ }
640};
641MODULE_DEVICE_TABLE(of, zynq_gpio_of_match);
642
585/** 643/**
586 * zynq_gpio_probe - Initialization method for a zynq_gpio device 644 * zynq_gpio_probe - Initialization method for a zynq_gpio device
587 * @pdev: platform device instance 645 * @pdev: platform device instance
@@ -599,11 +657,18 @@ static int zynq_gpio_probe(struct platform_device *pdev)
599 struct zynq_gpio *gpio; 657 struct zynq_gpio *gpio;
600 struct gpio_chip *chip; 658 struct gpio_chip *chip;
601 struct resource *res; 659 struct resource *res;
660 const struct of_device_id *match;
602 661
603 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 662 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
604 if (!gpio) 663 if (!gpio)
605 return -ENOMEM; 664 return -ENOMEM;
606 665
666 match = of_match_node(zynq_gpio_of_match, pdev->dev.of_node);
667 if (!match) {
668 dev_err(&pdev->dev, "of_match_node() failed\n");
669 return -EINVAL;
670 }
671 gpio->p_data = match->data;
607 platform_set_drvdata(pdev, gpio); 672 platform_set_drvdata(pdev, gpio);
608 673
609 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 674 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -619,7 +684,7 @@ static int zynq_gpio_probe(struct platform_device *pdev)
619 684
620 /* configure the gpio chip */ 685 /* configure the gpio chip */
621 chip = &gpio->chip; 686 chip = &gpio->chip;
622 chip->label = "zynq_gpio"; 687 chip->label = gpio->p_data->label;
623 chip->owner = THIS_MODULE; 688 chip->owner = THIS_MODULE;
624 chip->dev = &pdev->dev; 689 chip->dev = &pdev->dev;
625 chip->get = zynq_gpio_get_value; 690 chip->get = zynq_gpio_get_value;
@@ -629,7 +694,7 @@ static int zynq_gpio_probe(struct platform_device *pdev)
629 chip->direction_input = zynq_gpio_dir_in; 694 chip->direction_input = zynq_gpio_dir_in;
630 chip->direction_output = zynq_gpio_dir_out; 695 chip->direction_output = zynq_gpio_dir_out;
631 chip->base = -1; 696 chip->base = -1;
632 chip->ngpio = ZYNQ_GPIO_NR_GPIOS; 697 chip->ngpio = gpio->p_data->ngpio;
633 698
634 /* Enable GPIO clock */ 699 /* Enable GPIO clock */
635 gpio->clk = devm_clk_get(&pdev->dev, NULL); 700 gpio->clk = devm_clk_get(&pdev->dev, NULL);
@@ -651,7 +716,7 @@ static int zynq_gpio_probe(struct platform_device *pdev)
651 } 716 }
652 717
653 /* disable interrupts for all banks */ 718 /* disable interrupts for all banks */
654 for (bank_num = 0; bank_num < ZYNQ_GPIO_MAX_BANK; bank_num++) 719 for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++)
655 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr + 720 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr +
656 ZYNQ_GPIO_INTDIS_OFFSET(bank_num)); 721 ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
657 722
@@ -695,12 +760,6 @@ static int zynq_gpio_remove(struct platform_device *pdev)
695 return 0; 760 return 0;
696} 761}
697 762
698static struct of_device_id zynq_gpio_of_match[] = {
699 { .compatible = "xlnx,zynq-gpio-1.0", },
700 { /* end of table */ }
701};
702MODULE_DEVICE_TABLE(of, zynq_gpio_of_match);
703
704static struct platform_driver zynq_gpio_driver = { 763static struct platform_driver zynq_gpio_driver = {
705 .driver = { 764 .driver = {
706 .name = DRIVER_NAME, 765 .name = DRIVER_NAME,
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index 725d16138b74..533fe5dbe6f8 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -114,10 +114,11 @@ static inline int acpi_gpiochip_pin_to_gpio_offset(struct gpio_chip *chip,
114 * @path: ACPI GPIO controller full path name, (e.g. "\\_SB.GPO1") 114 * @path: ACPI GPIO controller full path name, (e.g. "\\_SB.GPO1")
115 * @pin: ACPI GPIO pin number (0-based, controller-relative) 115 * @pin: ACPI GPIO pin number (0-based, controller-relative)
116 * 116 *
117 * Returns GPIO descriptor to use with Linux generic GPIO API, or ERR_PTR 117 * Return: GPIO descriptor to use with Linux generic GPIO API, or ERR_PTR
118 * error value 118 * error value. Specifically returns %-EPROBE_DEFER if the referenced GPIO
119 * controller does not have gpiochip registered at the moment. This is to
120 * support probe deferral.
119 */ 121 */
120
121static struct gpio_desc *acpi_get_gpiod(char *path, int pin) 122static struct gpio_desc *acpi_get_gpiod(char *path, int pin)
122{ 123{
123 struct gpio_chip *chip; 124 struct gpio_chip *chip;
@@ -131,7 +132,7 @@ static struct gpio_desc *acpi_get_gpiod(char *path, int pin)
131 132
132 chip = gpiochip_find(handle, acpi_gpiochip_find); 133 chip = gpiochip_find(handle, acpi_gpiochip_find);
133 if (!chip) 134 if (!chip)
134 return ERR_PTR(-ENODEV); 135 return ERR_PTR(-EPROBE_DEFER);
135 136
136 offset = acpi_gpiochip_pin_to_gpio_offset(chip, pin); 137 offset = acpi_gpiochip_pin_to_gpio_offset(chip, pin);
137 if (offset < 0) 138 if (offset < 0)
@@ -307,6 +308,7 @@ void acpi_gpiochip_request_interrupts(struct gpio_chip *chip)
307 acpi_walk_resources(handle, "_AEI", 308 acpi_walk_resources(handle, "_AEI",
308 acpi_gpiochip_request_interrupt, acpi_gpio); 309 acpi_gpiochip_request_interrupt, acpi_gpio);
309} 310}
311EXPORT_SYMBOL_GPL(acpi_gpiochip_request_interrupts);
310 312
311/** 313/**
312 * acpi_gpiochip_free_interrupts() - Free GPIO ACPI event interrupts. 314 * acpi_gpiochip_free_interrupts() - Free GPIO ACPI event interrupts.
@@ -346,6 +348,7 @@ void acpi_gpiochip_free_interrupts(struct gpio_chip *chip)
346 kfree(event); 348 kfree(event);
347 } 349 }
348} 350}
351EXPORT_SYMBOL_GPL(acpi_gpiochip_free_interrupts);
349 352
350int acpi_dev_add_driver_gpios(struct acpi_device *adev, 353int acpi_dev_add_driver_gpios(struct acpi_device *adev,
351 const struct acpi_gpio_mapping *gpios) 354 const struct acpi_gpio_mapping *gpios)
@@ -514,6 +517,35 @@ struct gpio_desc *acpi_get_gpiod_by_index(struct acpi_device *adev,
514 return lookup.desc ? lookup.desc : ERR_PTR(-ENOENT); 517 return lookup.desc ? lookup.desc : ERR_PTR(-ENOENT);
515} 518}
516 519
520/**
521 * acpi_dev_gpio_irq_get() - Find GpioInt and translate it to Linux IRQ number
522 * @adev: pointer to a ACPI device to get IRQ from
523 * @index: index of GpioInt resource (starting from %0)
524 *
525 * If the device has one or more GpioInt resources, this function can be
526 * used to translate from the GPIO offset in the resource to the Linux IRQ
527 * number.
528 *
529 * Return: Linux IRQ number (>%0) on success, negative errno on failure.
530 */
531int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index)
532{
533 int idx, i;
534
535 for (i = 0, idx = 0; idx <= index; i++) {
536 struct acpi_gpio_info info;
537 struct gpio_desc *desc;
538
539 desc = acpi_get_gpiod_by_index(adev, NULL, i, &info);
540 if (IS_ERR(desc))
541 break;
542 if (info.gpioint && idx++ == index)
543 return gpiod_to_irq(desc);
544 }
545 return -ENOENT;
546}
547EXPORT_SYMBOL_GPL(acpi_dev_gpio_irq_get);
548
517static acpi_status 549static acpi_status
518acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, 550acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address,
519 u32 bits, u64 *value, void *handler_context, 551 u32 bits, u64 *value, void *handler_context,
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index a6c67c6b4680..9a0ec48a4737 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -242,7 +242,7 @@ int of_gpio_simple_xlate(struct gpio_chip *gc,
242{ 242{
243 /* 243 /*
244 * We're discouraging gpio_cells < 2, since that way you'll have to 244 * We're discouraging gpio_cells < 2, since that way you'll have to
245 * write your own xlate function (that will have to retrive the GPIO 245 * write your own xlate function (that will have to retrieve the GPIO
246 * number and the flags from a single gpio cell -- this is possible, 246 * number and the flags from a single gpio cell -- this is possible,
247 * but not recommended). 247 * but not recommended).
248 */ 248 */
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
index af3bc7a8033b..b57ed8e55ab5 100644
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c
@@ -6,14 +6,29 @@
6#include <linux/gpio/driver.h> 6#include <linux/gpio/driver.h>
7#include <linux/interrupt.h> 7#include <linux/interrupt.h>
8#include <linux/kdev_t.h> 8#include <linux/kdev_t.h>
9#include <linux/slab.h>
9 10
10#include "gpiolib.h" 11#include "gpiolib.h"
11 12
12static DEFINE_IDR(dirent_idr); 13#define GPIO_IRQF_TRIGGER_FALLING BIT(0)
14#define GPIO_IRQF_TRIGGER_RISING BIT(1)
15#define GPIO_IRQF_TRIGGER_BOTH (GPIO_IRQF_TRIGGER_FALLING | \
16 GPIO_IRQF_TRIGGER_RISING)
13 17
18struct gpiod_data {
19 struct gpio_desc *desc;
20
21 struct mutex mutex;
22 struct kernfs_node *value_kn;
23 int irq;
24 unsigned char irq_flags;
14 25
15/* lock protects against unexport_gpio() being called while 26 bool direction_can_change;
16 * sysfs files are active. 27};
28
29/*
30 * Lock to serialise gpiod export and unexport, and prevent re-export of
31 * gpiod whose chip is being unregistered.
17 */ 32 */
18static DEFINE_MUTEX(sysfs_lock); 33static DEFINE_MUTEX(sysfs_lock);
19 34
@@ -38,38 +53,35 @@ static DEFINE_MUTEX(sysfs_lock);
38 * /edge configuration 53 * /edge configuration
39 */ 54 */
40 55
41static ssize_t gpio_direction_show(struct device *dev, 56static ssize_t direction_show(struct device *dev,
42 struct device_attribute *attr, char *buf) 57 struct device_attribute *attr, char *buf)
43{ 58{
44 struct gpio_desc *desc = dev_get_drvdata(dev); 59 struct gpiod_data *data = dev_get_drvdata(dev);
60 struct gpio_desc *desc = data->desc;
45 ssize_t status; 61 ssize_t status;
46 62
47 mutex_lock(&sysfs_lock); 63 mutex_lock(&data->mutex);
48 64
49 if (!test_bit(FLAG_EXPORT, &desc->flags)) { 65 gpiod_get_direction(desc);
50 status = -EIO; 66 status = sprintf(buf, "%s\n",
51 } else {
52 gpiod_get_direction(desc);
53 status = sprintf(buf, "%s\n",
54 test_bit(FLAG_IS_OUT, &desc->flags) 67 test_bit(FLAG_IS_OUT, &desc->flags)
55 ? "out" : "in"); 68 ? "out" : "in");
56 }
57 69
58 mutex_unlock(&sysfs_lock); 70 mutex_unlock(&data->mutex);
71
59 return status; 72 return status;
60} 73}
61 74
62static ssize_t gpio_direction_store(struct device *dev, 75static ssize_t direction_store(struct device *dev,
63 struct device_attribute *attr, const char *buf, size_t size) 76 struct device_attribute *attr, const char *buf, size_t size)
64{ 77{
65 struct gpio_desc *desc = dev_get_drvdata(dev); 78 struct gpiod_data *data = dev_get_drvdata(dev);
79 struct gpio_desc *desc = data->desc;
66 ssize_t status; 80 ssize_t status;
67 81
68 mutex_lock(&sysfs_lock); 82 mutex_lock(&data->mutex);
69 83
70 if (!test_bit(FLAG_EXPORT, &desc->flags)) 84 if (sysfs_streq(buf, "high"))
71 status = -EIO;
72 else if (sysfs_streq(buf, "high"))
73 status = gpiod_direction_output_raw(desc, 1); 85 status = gpiod_direction_output_raw(desc, 1);
74 else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low")) 86 else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low"))
75 status = gpiod_direction_output_raw(desc, 0); 87 status = gpiod_direction_output_raw(desc, 0);
@@ -78,43 +90,40 @@ static ssize_t gpio_direction_store(struct device *dev,
78 else 90 else
79 status = -EINVAL; 91 status = -EINVAL;
80 92
81 mutex_unlock(&sysfs_lock); 93 mutex_unlock(&data->mutex);
94
82 return status ? : size; 95 return status ? : size;
83} 96}
97static DEVICE_ATTR_RW(direction);
84 98
85static /* const */ DEVICE_ATTR(direction, 0644, 99static ssize_t value_show(struct device *dev,
86 gpio_direction_show, gpio_direction_store);
87
88static ssize_t gpio_value_show(struct device *dev,
89 struct device_attribute *attr, char *buf) 100 struct device_attribute *attr, char *buf)
90{ 101{
91 struct gpio_desc *desc = dev_get_drvdata(dev); 102 struct gpiod_data *data = dev_get_drvdata(dev);
103 struct gpio_desc *desc = data->desc;
92 ssize_t status; 104 ssize_t status;
93 105
94 mutex_lock(&sysfs_lock); 106 mutex_lock(&data->mutex);
95 107
96 if (!test_bit(FLAG_EXPORT, &desc->flags)) 108 status = sprintf(buf, "%d\n", gpiod_get_value_cansleep(desc));
97 status = -EIO; 109
98 else 110 mutex_unlock(&data->mutex);
99 status = sprintf(buf, "%d\n", gpiod_get_value_cansleep(desc));
100 111
101 mutex_unlock(&sysfs_lock);
102 return status; 112 return status;
103} 113}
104 114
105static ssize_t gpio_value_store(struct device *dev, 115static ssize_t value_store(struct device *dev,
106 struct device_attribute *attr, const char *buf, size_t size) 116 struct device_attribute *attr, const char *buf, size_t size)
107{ 117{
108 struct gpio_desc *desc = dev_get_drvdata(dev); 118 struct gpiod_data *data = dev_get_drvdata(dev);
119 struct gpio_desc *desc = data->desc;
109 ssize_t status; 120 ssize_t status;
110 121
111 mutex_lock(&sysfs_lock); 122 mutex_lock(&data->mutex);
112 123
113 if (!test_bit(FLAG_EXPORT, &desc->flags)) 124 if (!test_bit(FLAG_IS_OUT, &desc->flags)) {
114 status = -EIO;
115 else if (!test_bit(FLAG_IS_OUT, &desc->flags))
116 status = -EPERM; 125 status = -EPERM;
117 else { 126 } else {
118 long value; 127 long value;
119 128
120 status = kstrtol(buf, 0, &value); 129 status = kstrtol(buf, 0, &value);
@@ -124,172 +133,168 @@ static ssize_t gpio_value_store(struct device *dev,
124 } 133 }
125 } 134 }
126 135
127 mutex_unlock(&sysfs_lock); 136 mutex_unlock(&data->mutex);
137
128 return status; 138 return status;
129} 139}
130 140static DEVICE_ATTR_RW(value);
131static DEVICE_ATTR(value, 0644,
132 gpio_value_show, gpio_value_store);
133 141
134static irqreturn_t gpio_sysfs_irq(int irq, void *priv) 142static irqreturn_t gpio_sysfs_irq(int irq, void *priv)
135{ 143{
136 struct kernfs_node *value_sd = priv; 144 struct gpiod_data *data = priv;
145
146 sysfs_notify_dirent(data->value_kn);
137 147
138 sysfs_notify_dirent(value_sd);
139 return IRQ_HANDLED; 148 return IRQ_HANDLED;
140} 149}
141 150
142static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev, 151/* Caller holds gpiod-data mutex. */
143 unsigned long gpio_flags) 152static int gpio_sysfs_request_irq(struct device *dev, unsigned char flags)
144{ 153{
145 struct kernfs_node *value_sd; 154 struct gpiod_data *data = dev_get_drvdata(dev);
155 struct gpio_desc *desc = data->desc;
146 unsigned long irq_flags; 156 unsigned long irq_flags;
147 int ret, irq, id; 157 int ret;
148 158
149 if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags) 159 data->irq = gpiod_to_irq(desc);
150 return 0; 160 if (data->irq < 0)
151
152 irq = gpiod_to_irq(desc);
153 if (irq < 0)
154 return -EIO; 161 return -EIO;
155 162
156 id = desc->flags >> ID_SHIFT; 163 data->value_kn = sysfs_get_dirent(dev->kobj.sd, "value");
157 value_sd = idr_find(&dirent_idr, id); 164 if (!data->value_kn)
158 if (value_sd) 165 return -ENODEV;
159 free_irq(irq, value_sd);
160
161 desc->flags &= ~GPIO_TRIGGER_MASK;
162
163 if (!gpio_flags) {
164 gpiochip_unlock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
165 ret = 0;
166 goto free_id;
167 }
168 166
169 irq_flags = IRQF_SHARED; 167 irq_flags = IRQF_SHARED;
170 if (test_bit(FLAG_TRIG_FALL, &gpio_flags)) 168 if (flags & GPIO_IRQF_TRIGGER_FALLING)
171 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? 169 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
172 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; 170 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
173 if (test_bit(FLAG_TRIG_RISE, &gpio_flags)) 171 if (flags & GPIO_IRQF_TRIGGER_RISING)
174 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? 172 irq_flags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
175 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING; 173 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
176 174
177 if (!value_sd) { 175 /*
178 value_sd = sysfs_get_dirent(dev->kobj.sd, "value"); 176 * FIXME: This should be done in the irq_request_resources callback
179 if (!value_sd) { 177 * when the irq is requested, but a few drivers currently fail
180 ret = -ENODEV; 178 * to do so.
181 goto err_out; 179 *
182 } 180 * Remove this redundant call (along with the corresponding
183 181 * unlock) when those drivers have been fixed.
184 ret = idr_alloc(&dirent_idr, value_sd, 1, 0, GFP_KERNEL); 182 */
185 if (ret < 0) 183 ret = gpiochip_lock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
186 goto free_sd; 184 if (ret < 0)
187 id = ret; 185 goto err_put_kn;
188
189 desc->flags &= GPIO_FLAGS_MASK;
190 desc->flags |= (unsigned long)id << ID_SHIFT;
191
192 if (desc->flags >> ID_SHIFT != id) {
193 ret = -ERANGE;
194 goto free_id;
195 }
196 }
197 186
198 ret = request_any_context_irq(irq, gpio_sysfs_irq, irq_flags, 187 ret = request_any_context_irq(data->irq, gpio_sysfs_irq, irq_flags,
199 "gpiolib", value_sd); 188 "gpiolib", data);
200 if (ret < 0) 189 if (ret < 0)
201 goto free_id; 190 goto err_unlock;
202 191
203 ret = gpiochip_lock_as_irq(desc->chip, gpio_chip_hwgpio(desc)); 192 data->irq_flags = flags;
204 if (ret < 0) {
205 gpiod_warn(desc, "failed to flag the GPIO for IRQ\n");
206 goto free_id;
207 }
208 193
209 desc->flags |= gpio_flags;
210 return 0; 194 return 0;
211 195
212free_id: 196err_unlock:
213 idr_remove(&dirent_idr, id); 197 gpiochip_unlock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
214 desc->flags &= GPIO_FLAGS_MASK; 198err_put_kn:
215free_sd: 199 sysfs_put(data->value_kn);
216 if (value_sd) 200
217 sysfs_put(value_sd);
218err_out:
219 return ret; 201 return ret;
220} 202}
221 203
204/*
205 * Caller holds gpiod-data mutex (unless called after class-device
206 * deregistration).
207 */
208static void gpio_sysfs_free_irq(struct device *dev)
209{
210 struct gpiod_data *data = dev_get_drvdata(dev);
211 struct gpio_desc *desc = data->desc;
212
213 data->irq_flags = 0;
214 free_irq(data->irq, data);
215 gpiochip_unlock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
216 sysfs_put(data->value_kn);
217}
218
222static const struct { 219static const struct {
223 const char *name; 220 const char *name;
224 unsigned long flags; 221 unsigned char flags;
225} trigger_types[] = { 222} trigger_types[] = {
226 { "none", 0 }, 223 { "none", 0 },
227 { "falling", BIT(FLAG_TRIG_FALL) }, 224 { "falling", GPIO_IRQF_TRIGGER_FALLING },
228 { "rising", BIT(FLAG_TRIG_RISE) }, 225 { "rising", GPIO_IRQF_TRIGGER_RISING },
229 { "both", BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE) }, 226 { "both", GPIO_IRQF_TRIGGER_BOTH },
230}; 227};
231 228
232static ssize_t gpio_edge_show(struct device *dev, 229static ssize_t edge_show(struct device *dev,
233 struct device_attribute *attr, char *buf) 230 struct device_attribute *attr, char *buf)
234{ 231{
235 const struct gpio_desc *desc = dev_get_drvdata(dev); 232 struct gpiod_data *data = dev_get_drvdata(dev);
236 ssize_t status; 233 ssize_t status = 0;
234 int i;
237 235
238 mutex_lock(&sysfs_lock); 236 mutex_lock(&data->mutex);
239
240 if (!test_bit(FLAG_EXPORT, &desc->flags))
241 status = -EIO;
242 else {
243 int i;
244 237
245 status = 0; 238 for (i = 0; i < ARRAY_SIZE(trigger_types); i++) {
246 for (i = 0; i < ARRAY_SIZE(trigger_types); i++) 239 if (data->irq_flags == trigger_types[i].flags) {
247 if ((desc->flags & GPIO_TRIGGER_MASK) 240 status = sprintf(buf, "%s\n", trigger_types[i].name);
248 == trigger_types[i].flags) { 241 break;
249 status = sprintf(buf, "%s\n", 242 }
250 trigger_types[i].name);
251 break;
252 }
253 } 243 }
254 244
255 mutex_unlock(&sysfs_lock); 245 mutex_unlock(&data->mutex);
246
256 return status; 247 return status;
257} 248}
258 249
259static ssize_t gpio_edge_store(struct device *dev, 250static ssize_t edge_store(struct device *dev,
260 struct device_attribute *attr, const char *buf, size_t size) 251 struct device_attribute *attr, const char *buf, size_t size)
261{ 252{
262 struct gpio_desc *desc = dev_get_drvdata(dev); 253 struct gpiod_data *data = dev_get_drvdata(dev);
263 ssize_t status; 254 unsigned char flags;
264 int i; 255 ssize_t status = size;
256 int i;
265 257
266 for (i = 0; i < ARRAY_SIZE(trigger_types); i++) 258 for (i = 0; i < ARRAY_SIZE(trigger_types); i++) {
267 if (sysfs_streq(trigger_types[i].name, buf)) 259 if (sysfs_streq(trigger_types[i].name, buf))
268 goto found; 260 break;
269 return -EINVAL; 261 }
270 262
271found: 263 if (i == ARRAY_SIZE(trigger_types))
272 mutex_lock(&sysfs_lock); 264 return -EINVAL;
273 265
274 if (!test_bit(FLAG_EXPORT, &desc->flags)) 266 flags = trigger_types[i].flags;
275 status = -EIO; 267
276 else { 268 mutex_lock(&data->mutex);
277 status = gpio_setup_irq(desc, dev, trigger_types[i].flags); 269
270 if (flags == data->irq_flags) {
271 status = size;
272 goto out_unlock;
273 }
274
275 if (data->irq_flags)
276 gpio_sysfs_free_irq(dev);
277
278 if (flags) {
279 status = gpio_sysfs_request_irq(dev, flags);
278 if (!status) 280 if (!status)
279 status = size; 281 status = size;
280 } 282 }
281 283
282 mutex_unlock(&sysfs_lock); 284out_unlock:
285 mutex_unlock(&data->mutex);
283 286
284 return status; 287 return status;
285} 288}
289static DEVICE_ATTR_RW(edge);
286 290
287static DEVICE_ATTR(edge, 0644, gpio_edge_show, gpio_edge_store); 291/* Caller holds gpiod-data mutex. */
288 292static int gpio_sysfs_set_active_low(struct device *dev, int value)
289static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev,
290 int value)
291{ 293{
294 struct gpiod_data *data = dev_get_drvdata(dev);
295 struct gpio_desc *desc = data->desc;
292 int status = 0; 296 int status = 0;
297 unsigned int flags = data->irq_flags;
293 298
294 if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value) 299 if (!!test_bit(FLAG_ACTIVE_LOW, &desc->flags) == !!value)
295 return 0; 300 return 0;
@@ -300,69 +305,59 @@ static int sysfs_set_active_low(struct gpio_desc *desc, struct device *dev,
300 clear_bit(FLAG_ACTIVE_LOW, &desc->flags); 305 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
301 306
302 /* reconfigure poll(2) support if enabled on one edge only */ 307 /* reconfigure poll(2) support if enabled on one edge only */
303 if (dev != NULL && (!!test_bit(FLAG_TRIG_RISE, &desc->flags) ^ 308 if (flags == GPIO_IRQF_TRIGGER_FALLING ||
304 !!test_bit(FLAG_TRIG_FALL, &desc->flags))) { 309 flags == GPIO_IRQF_TRIGGER_RISING) {
305 unsigned long trigger_flags = desc->flags & GPIO_TRIGGER_MASK; 310 gpio_sysfs_free_irq(dev);
306 311 status = gpio_sysfs_request_irq(dev, flags);
307 gpio_setup_irq(desc, dev, 0);
308 status = gpio_setup_irq(desc, dev, trigger_flags);
309 } 312 }
310 313
311 return status; 314 return status;
312} 315}
313 316
314static ssize_t gpio_active_low_show(struct device *dev, 317static ssize_t active_low_show(struct device *dev,
315 struct device_attribute *attr, char *buf) 318 struct device_attribute *attr, char *buf)
316{ 319{
317 const struct gpio_desc *desc = dev_get_drvdata(dev); 320 struct gpiod_data *data = dev_get_drvdata(dev);
321 struct gpio_desc *desc = data->desc;
318 ssize_t status; 322 ssize_t status;
319 323
320 mutex_lock(&sysfs_lock); 324 mutex_lock(&data->mutex);
321 325
322 if (!test_bit(FLAG_EXPORT, &desc->flags)) 326 status = sprintf(buf, "%d\n",
323 status = -EIO;
324 else
325 status = sprintf(buf, "%d\n",
326 !!test_bit(FLAG_ACTIVE_LOW, &desc->flags)); 327 !!test_bit(FLAG_ACTIVE_LOW, &desc->flags));
327 328
328 mutex_unlock(&sysfs_lock); 329 mutex_unlock(&data->mutex);
329 330
330 return status; 331 return status;
331} 332}
332 333
333static ssize_t gpio_active_low_store(struct device *dev, 334static ssize_t active_low_store(struct device *dev,
334 struct device_attribute *attr, const char *buf, size_t size) 335 struct device_attribute *attr, const char *buf, size_t size)
335{ 336{
336 struct gpio_desc *desc = dev_get_drvdata(dev); 337 struct gpiod_data *data = dev_get_drvdata(dev);
337 ssize_t status; 338 ssize_t status;
339 long value;
338 340
339 mutex_lock(&sysfs_lock); 341 mutex_lock(&data->mutex);
340 342
341 if (!test_bit(FLAG_EXPORT, &desc->flags)) { 343 status = kstrtol(buf, 0, &value);
342 status = -EIO; 344 if (status == 0)
343 } else { 345 status = gpio_sysfs_set_active_low(dev, value);
344 long value;
345 346
346 status = kstrtol(buf, 0, &value); 347 mutex_unlock(&data->mutex);
347 if (status == 0)
348 status = sysfs_set_active_low(desc, dev, value != 0);
349 }
350
351 mutex_unlock(&sysfs_lock);
352 348
353 return status ? : size; 349 return status ? : size;
354} 350}
355 351static DEVICE_ATTR_RW(active_low);
356static DEVICE_ATTR(active_low, 0644,
357 gpio_active_low_show, gpio_active_low_store);
358 352
359static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr, 353static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
360 int n) 354 int n)
361{ 355{
362 struct device *dev = container_of(kobj, struct device, kobj); 356 struct device *dev = container_of(kobj, struct device, kobj);
363 struct gpio_desc *desc = dev_get_drvdata(dev); 357 struct gpiod_data *data = dev_get_drvdata(dev);
358 struct gpio_desc *desc = data->desc;
364 umode_t mode = attr->mode; 359 umode_t mode = attr->mode;
365 bool show_direction = test_bit(FLAG_SYSFS_DIR, &desc->flags); 360 bool show_direction = data->direction_can_change;
366 361
367 if (attr == &dev_attr_direction.attr) { 362 if (attr == &dev_attr_direction.attr) {
368 if (!show_direction) 363 if (!show_direction)
@@ -402,32 +397,32 @@ static const struct attribute_group *gpio_groups[] = {
402 * /ngpio ... matching gpio_chip.ngpio 397 * /ngpio ... matching gpio_chip.ngpio
403 */ 398 */
404 399
405static ssize_t chip_base_show(struct device *dev, 400static ssize_t base_show(struct device *dev,
406 struct device_attribute *attr, char *buf) 401 struct device_attribute *attr, char *buf)
407{ 402{
408 const struct gpio_chip *chip = dev_get_drvdata(dev); 403 const struct gpio_chip *chip = dev_get_drvdata(dev);
409 404
410 return sprintf(buf, "%d\n", chip->base); 405 return sprintf(buf, "%d\n", chip->base);
411} 406}
412static DEVICE_ATTR(base, 0444, chip_base_show, NULL); 407static DEVICE_ATTR_RO(base);
413 408
414static ssize_t chip_label_show(struct device *dev, 409static ssize_t label_show(struct device *dev,
415 struct device_attribute *attr, char *buf) 410 struct device_attribute *attr, char *buf)
416{ 411{
417 const struct gpio_chip *chip = dev_get_drvdata(dev); 412 const struct gpio_chip *chip = dev_get_drvdata(dev);
418 413
419 return sprintf(buf, "%s\n", chip->label ? : ""); 414 return sprintf(buf, "%s\n", chip->label ? : "");
420} 415}
421static DEVICE_ATTR(label, 0444, chip_label_show, NULL); 416static DEVICE_ATTR_RO(label);
422 417
423static ssize_t chip_ngpio_show(struct device *dev, 418static ssize_t ngpio_show(struct device *dev,
424 struct device_attribute *attr, char *buf) 419 struct device_attribute *attr, char *buf)
425{ 420{
426 const struct gpio_chip *chip = dev_get_drvdata(dev); 421 const struct gpio_chip *chip = dev_get_drvdata(dev);
427 422
428 return sprintf(buf, "%u\n", chip->ngpio); 423 return sprintf(buf, "%u\n", chip->ngpio);
429} 424}
430static DEVICE_ATTR(ngpio, 0444, chip_ngpio_show, NULL); 425static DEVICE_ATTR_RO(ngpio);
431 426
432static struct attribute *gpiochip_attrs[] = { 427static struct attribute *gpiochip_attrs[] = {
433 &dev_attr_base.attr, 428 &dev_attr_base.attr,
@@ -552,6 +547,7 @@ static struct class gpio_class = {
552int gpiod_export(struct gpio_desc *desc, bool direction_may_change) 547int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
553{ 548{
554 struct gpio_chip *chip; 549 struct gpio_chip *chip;
550 struct gpiod_data *data;
555 unsigned long flags; 551 unsigned long flags;
556 int status; 552 int status;
557 const char *ioname = NULL; 553 const char *ioname = NULL;
@@ -574,9 +570,9 @@ int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
574 mutex_lock(&sysfs_lock); 570 mutex_lock(&sysfs_lock);
575 571
576 /* check if chip is being removed */ 572 /* check if chip is being removed */
577 if (!chip || !chip->exported) { 573 if (!chip || !chip->cdev) {
578 status = -ENODEV; 574 status = -ENODEV;
579 goto fail_unlock; 575 goto err_unlock;
580 } 576 }
581 577
582 spin_lock_irqsave(&gpio_lock, flags); 578 spin_lock_irqsave(&gpio_lock, flags);
@@ -588,43 +584,54 @@ int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
588 test_bit(FLAG_REQUESTED, &desc->flags), 584 test_bit(FLAG_REQUESTED, &desc->flags),
589 test_bit(FLAG_EXPORT, &desc->flags)); 585 test_bit(FLAG_EXPORT, &desc->flags));
590 status = -EPERM; 586 status = -EPERM;
591 goto fail_unlock; 587 goto err_unlock;
592 } 588 }
589 spin_unlock_irqrestore(&gpio_lock, flags);
593 590
594 if (desc->chip->direction_input && desc->chip->direction_output && 591 data = kzalloc(sizeof(*data), GFP_KERNEL);
595 direction_may_change) { 592 if (!data) {
596 set_bit(FLAG_SYSFS_DIR, &desc->flags); 593 status = -ENOMEM;
594 goto err_unlock;
597 } 595 }
598 596
599 spin_unlock_irqrestore(&gpio_lock, flags); 597 data->desc = desc;
598 mutex_init(&data->mutex);
599 if (chip->direction_input && chip->direction_output)
600 data->direction_can_change = direction_may_change;
601 else
602 data->direction_can_change = false;
600 603
601 offset = gpio_chip_hwgpio(desc); 604 offset = gpio_chip_hwgpio(desc);
602 if (desc->chip->names && desc->chip->names[offset]) 605 if (chip->names && chip->names[offset])
603 ioname = desc->chip->names[offset]; 606 ioname = chip->names[offset];
604 607
605 dev = device_create_with_groups(&gpio_class, desc->chip->dev, 608 dev = device_create_with_groups(&gpio_class, chip->dev,
606 MKDEV(0, 0), desc, gpio_groups, 609 MKDEV(0, 0), data, gpio_groups,
607 ioname ? ioname : "gpio%u", 610 ioname ? ioname : "gpio%u",
608 desc_to_gpio(desc)); 611 desc_to_gpio(desc));
609 if (IS_ERR(dev)) { 612 if (IS_ERR(dev)) {
610 status = PTR_ERR(dev); 613 status = PTR_ERR(dev);
611 goto fail_unlock; 614 goto err_free_data;
612 } 615 }
613 616
614 set_bit(FLAG_EXPORT, &desc->flags); 617 set_bit(FLAG_EXPORT, &desc->flags);
615 mutex_unlock(&sysfs_lock); 618 mutex_unlock(&sysfs_lock);
616 return 0; 619 return 0;
617 620
618fail_unlock: 621err_free_data:
622 kfree(data);
623err_unlock:
619 mutex_unlock(&sysfs_lock); 624 mutex_unlock(&sysfs_lock);
620 gpiod_dbg(desc, "%s: status %d\n", __func__, status); 625 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
621 return status; 626 return status;
622} 627}
623EXPORT_SYMBOL_GPL(gpiod_export); 628EXPORT_SYMBOL_GPL(gpiod_export);
624 629
625static int match_export(struct device *dev, const void *data) 630static int match_export(struct device *dev, const void *desc)
626{ 631{
627 return dev_get_drvdata(dev) == data; 632 struct gpiod_data *data = dev_get_drvdata(dev);
633
634 return data->desc == desc;
628} 635}
629 636
630/** 637/**
@@ -641,82 +648,26 @@ static int match_export(struct device *dev, const void *data)
641int gpiod_export_link(struct device *dev, const char *name, 648int gpiod_export_link(struct device *dev, const char *name,
642 struct gpio_desc *desc) 649 struct gpio_desc *desc)
643{ 650{
644 int status = -EINVAL; 651 struct device *cdev;
652 int ret;
645 653
646 if (!desc) { 654 if (!desc) {
647 pr_warn("%s: invalid GPIO\n", __func__); 655 pr_warn("%s: invalid GPIO\n", __func__);
648 return -EINVAL; 656 return -EINVAL;
649 } 657 }
650 658
651 mutex_lock(&sysfs_lock); 659 cdev = class_find_device(&gpio_class, NULL, desc, match_export);
652 660 if (!cdev)
653 if (test_bit(FLAG_EXPORT, &desc->flags)) { 661 return -ENODEV;
654 struct device *tdev;
655
656 tdev = class_find_device(&gpio_class, NULL, desc, match_export);
657 if (tdev != NULL) {
658 status = sysfs_create_link(&dev->kobj, &tdev->kobj,
659 name);
660 put_device(tdev);
661 } else {
662 status = -ENODEV;
663 }
664 }
665
666 mutex_unlock(&sysfs_lock);
667 662
668 if (status) 663 ret = sysfs_create_link(&dev->kobj, &cdev->kobj, name);
669 gpiod_dbg(desc, "%s: status %d\n", __func__, status); 664 put_device(cdev);
670 665
671 return status; 666 return ret;
672} 667}
673EXPORT_SYMBOL_GPL(gpiod_export_link); 668EXPORT_SYMBOL_GPL(gpiod_export_link);
674 669
675/** 670/**
676 * gpiod_sysfs_set_active_low - set the polarity of gpio sysfs value
677 * @gpio: gpio to change
678 * @value: non-zero to use active low, i.e. inverted values
679 *
680 * Set the polarity of /sys/class/gpio/gpioN/value sysfs attribute.
681 * The GPIO does not have to be exported yet. If poll(2) support has
682 * been enabled for either rising or falling edge, it will be
683 * reconfigured to follow the new polarity.
684 *
685 * Returns zero on success, else an error.
686 */
687int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value)
688{
689 struct device *dev = NULL;
690 int status = -EINVAL;
691
692 if (!desc) {
693 pr_warn("%s: invalid GPIO\n", __func__);
694 return -EINVAL;
695 }
696
697 mutex_lock(&sysfs_lock);
698
699 if (test_bit(FLAG_EXPORT, &desc->flags)) {
700 dev = class_find_device(&gpio_class, NULL, desc, match_export);
701 if (dev == NULL) {
702 status = -ENODEV;
703 goto unlock;
704 }
705 }
706
707 status = sysfs_set_active_low(desc, dev, value);
708 put_device(dev);
709unlock:
710 mutex_unlock(&sysfs_lock);
711
712 if (status)
713 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
714
715 return status;
716}
717EXPORT_SYMBOL_GPL(gpiod_sysfs_set_active_low);
718
719/**
720 * gpiod_unexport - reverse effect of gpio_export() 671 * gpiod_unexport - reverse effect of gpio_export()
721 * @gpio: gpio to make unavailable 672 * @gpio: gpio to make unavailable
722 * 673 *
@@ -724,8 +675,8 @@ EXPORT_SYMBOL_GPL(gpiod_sysfs_set_active_low);
724 */ 675 */
725void gpiod_unexport(struct gpio_desc *desc) 676void gpiod_unexport(struct gpio_desc *desc)
726{ 677{
727 int status = 0; 678 struct gpiod_data *data;
728 struct device *dev = NULL; 679 struct device *dev;
729 680
730 if (!desc) { 681 if (!desc) {
731 pr_warn("%s: invalid GPIO\n", __func__); 682 pr_warn("%s: invalid GPIO\n", __func__);
@@ -734,82 +685,79 @@ void gpiod_unexport(struct gpio_desc *desc)
734 685
735 mutex_lock(&sysfs_lock); 686 mutex_lock(&sysfs_lock);
736 687
737 if (test_bit(FLAG_EXPORT, &desc->flags)) { 688 if (!test_bit(FLAG_EXPORT, &desc->flags))
689 goto err_unlock;
738 690
739 dev = class_find_device(&gpio_class, NULL, desc, match_export); 691 dev = class_find_device(&gpio_class, NULL, desc, match_export);
740 if (dev) { 692 if (!dev)
741 gpio_setup_irq(desc, dev, 0); 693 goto err_unlock;
742 clear_bit(FLAG_SYSFS_DIR, &desc->flags); 694
743 clear_bit(FLAG_EXPORT, &desc->flags); 695 data = dev_get_drvdata(dev);
744 } else 696
745 status = -ENODEV; 697 clear_bit(FLAG_EXPORT, &desc->flags);
746 } 698
699 device_unregister(dev);
700
701 /*
702 * Release irq after deregistration to prevent race with edge_store.
703 */
704 if (data->irq_flags)
705 gpio_sysfs_free_irq(dev);
747 706
748 mutex_unlock(&sysfs_lock); 707 mutex_unlock(&sysfs_lock);
749 708
750 if (dev) { 709 put_device(dev);
751 device_unregister(dev); 710 kfree(data);
752 put_device(dev);
753 }
754 711
755 if (status) 712 return;
756 gpiod_dbg(desc, "%s: status %d\n", __func__, status); 713
714err_unlock:
715 mutex_unlock(&sysfs_lock);
757} 716}
758EXPORT_SYMBOL_GPL(gpiod_unexport); 717EXPORT_SYMBOL_GPL(gpiod_unexport);
759 718
760int gpiochip_export(struct gpio_chip *chip) 719int gpiochip_sysfs_register(struct gpio_chip *chip)
761{ 720{
762 int status;
763 struct device *dev; 721 struct device *dev;
764 722
765 /* Many systems register gpio chips for SOC support very early, 723 /*
724 * Many systems add gpio chips for SOC support very early,
766 * before driver model support is available. In those cases we 725 * before driver model support is available. In those cases we
767 * export this later, in gpiolib_sysfs_init() ... here we just 726 * register later, in gpiolib_sysfs_init() ... here we just
768 * verify that _some_ field of gpio_class got initialized. 727 * verify that _some_ field of gpio_class got initialized.
769 */ 728 */
770 if (!gpio_class.p) 729 if (!gpio_class.p)
771 return 0; 730 return 0;
772 731
773 /* use chip->base for the ID; it's already known to be unique */ 732 /* use chip->base for the ID; it's already known to be unique */
774 mutex_lock(&sysfs_lock);
775 dev = device_create_with_groups(&gpio_class, chip->dev, MKDEV(0, 0), 733 dev = device_create_with_groups(&gpio_class, chip->dev, MKDEV(0, 0),
776 chip, gpiochip_groups, 734 chip, gpiochip_groups,
777 "gpiochip%d", chip->base); 735 "gpiochip%d", chip->base);
778 if (IS_ERR(dev)) 736 if (IS_ERR(dev))
779 status = PTR_ERR(dev); 737 return PTR_ERR(dev);
780 else
781 status = 0;
782 chip->exported = (status == 0);
783 mutex_unlock(&sysfs_lock);
784 738
785 if (status) 739 mutex_lock(&sysfs_lock);
786 chip_dbg(chip, "%s: status %d\n", __func__, status); 740 chip->cdev = dev;
741 mutex_unlock(&sysfs_lock);
787 742
788 return status; 743 return 0;
789} 744}
790 745
791void gpiochip_unexport(struct gpio_chip *chip) 746void gpiochip_sysfs_unregister(struct gpio_chip *chip)
792{ 747{
793 int status;
794 struct device *dev;
795 struct gpio_desc *desc; 748 struct gpio_desc *desc;
796 unsigned int i; 749 unsigned int i;
797 750
751 if (!chip->cdev)
752 return;
753
754 device_unregister(chip->cdev);
755
756 /* prevent further gpiod exports */
798 mutex_lock(&sysfs_lock); 757 mutex_lock(&sysfs_lock);
799 dev = class_find_device(&gpio_class, NULL, chip, match_export); 758 chip->cdev = NULL;
800 if (dev) {
801 put_device(dev);
802 device_unregister(dev);
803 /* prevent further gpiod exports */
804 chip->exported = false;
805 status = 0;
806 } else
807 status = -ENODEV;
808 mutex_unlock(&sysfs_lock); 759 mutex_unlock(&sysfs_lock);
809 760
810 if (status)
811 chip_dbg(chip, "%s: status %d\n", __func__, status);
812
813 /* unregister gpiod class devices owned by sysfs */ 761 /* unregister gpiod class devices owned by sysfs */
814 for (i = 0; i < chip->ngpio; i++) { 762 for (i = 0; i < chip->ngpio; i++) {
815 desc = &chip->desc[i]; 763 desc = &chip->desc[i];
@@ -836,19 +784,20 @@ static int __init gpiolib_sysfs_init(void)
836 */ 784 */
837 spin_lock_irqsave(&gpio_lock, flags); 785 spin_lock_irqsave(&gpio_lock, flags);
838 list_for_each_entry(chip, &gpio_chips, list) { 786 list_for_each_entry(chip, &gpio_chips, list) {
839 if (chip->exported) 787 if (chip->cdev)
840 continue; 788 continue;
841 789
842 /* 790 /*
843 * TODO we yield gpio_lock here because gpiochip_export() 791 * TODO we yield gpio_lock here because
844 * acquires a mutex. This is unsafe and needs to be fixed. 792 * gpiochip_sysfs_register() acquires a mutex. This is unsafe
793 * and needs to be fixed.
845 * 794 *
846 * Also it would be nice to use gpiochip_find() here so we 795 * Also it would be nice to use gpiochip_find() here so we
847 * can keep gpio_chips local to gpiolib.c, but the yield of 796 * can keep gpio_chips local to gpiolib.c, but the yield of
848 * gpio_lock prevents us from doing this. 797 * gpio_lock prevents us from doing this.
849 */ 798 */
850 spin_unlock_irqrestore(&gpio_lock, flags); 799 spin_unlock_irqrestore(&gpio_lock, flags);
851 status = gpiochip_export(chip); 800 status = gpiochip_sysfs_register(chip);
852 spin_lock_irqsave(&gpio_lock, flags); 801 spin_lock_irqsave(&gpio_lock, flags);
853 } 802 }
854 spin_unlock_irqrestore(&gpio_lock, flags); 803 spin_unlock_irqrestore(&gpio_lock, flags);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 6bc612b8a49f..be42ab368a80 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -290,7 +290,7 @@ int gpiochip_add(struct gpio_chip *chip)
290 of_gpiochip_add(chip); 290 of_gpiochip_add(chip);
291 acpi_gpiochip_add(chip); 291 acpi_gpiochip_add(chip);
292 292
293 status = gpiochip_export(chip); 293 status = gpiochip_sysfs_register(chip);
294 if (status) 294 if (status)
295 goto err_remove_chip; 295 goto err_remove_chip;
296 296
@@ -327,10 +327,12 @@ EXPORT_SYMBOL_GPL(gpiochip_add);
327 */ 327 */
328void gpiochip_remove(struct gpio_chip *chip) 328void gpiochip_remove(struct gpio_chip *chip)
329{ 329{
330 struct gpio_desc *desc;
330 unsigned long flags; 331 unsigned long flags;
331 unsigned id; 332 unsigned id;
333 bool requested = false;
332 334
333 gpiochip_unexport(chip); 335 gpiochip_sysfs_unregister(chip);
334 336
335 gpiochip_irqchip_remove(chip); 337 gpiochip_irqchip_remove(chip);
336 338
@@ -341,15 +343,17 @@ void gpiochip_remove(struct gpio_chip *chip)
341 343
342 spin_lock_irqsave(&gpio_lock, flags); 344 spin_lock_irqsave(&gpio_lock, flags);
343 for (id = 0; id < chip->ngpio; id++) { 345 for (id = 0; id < chip->ngpio; id++) {
344 if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags)) 346 desc = &chip->desc[id];
345 dev_crit(chip->dev, "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); 347 desc->chip = NULL;
348 if (test_bit(FLAG_REQUESTED, &desc->flags))
349 requested = true;
346 } 350 }
347 for (id = 0; id < chip->ngpio; id++)
348 chip->desc[id].chip = NULL;
349
350 list_del(&chip->list); 351 list_del(&chip->list);
351 spin_unlock_irqrestore(&gpio_lock, flags); 352 spin_unlock_irqrestore(&gpio_lock, flags);
352 353
354 if (requested)
355 dev_crit(chip->dev, "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
356
353 kfree(chip->desc); 357 kfree(chip->desc);
354 chip->desc = NULL; 358 chip->desc = NULL;
355} 359}
@@ -441,6 +445,8 @@ void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
441 */ 445 */
442 irq_set_handler_data(parent_irq, gpiochip); 446 irq_set_handler_data(parent_irq, gpiochip);
443 irq_set_chained_handler(parent_irq, parent_handler); 447 irq_set_chained_handler(parent_irq, parent_handler);
448
449 gpiochip->irq_parent = parent_irq;
444 } 450 }
445 451
446 /* Set the parent IRQ for all affected IRQs */ 452 /* Set the parent IRQ for all affected IRQs */
@@ -549,6 +555,11 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
549 555
550 acpi_gpiochip_free_interrupts(gpiochip); 556 acpi_gpiochip_free_interrupts(gpiochip);
551 557
558 if (gpiochip->irq_parent) {
559 irq_set_chained_handler(gpiochip->irq_parent, NULL);
560 irq_set_handler_data(gpiochip->irq_parent, NULL);
561 }
562
552 /* Remove all IRQ mappings and delete the domain */ 563 /* Remove all IRQ mappings and delete the domain */
553 if (gpiochip->irqdomain) { 564 if (gpiochip->irqdomain) {
554 for (offset = 0; offset < gpiochip->ngpio; offset++) 565 for (offset = 0; offset < gpiochip->ngpio; offset++)
@@ -608,7 +619,7 @@ int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
608 of_node = gpiochip->dev->of_node; 619 of_node = gpiochip->dev->of_node;
609#ifdef CONFIG_OF_GPIO 620#ifdef CONFIG_OF_GPIO
610 /* 621 /*
611 * If the gpiochip has an assigned OF node this takes precendence 622 * If the gpiochip has an assigned OF node this takes precedence
612 * FIXME: get rid of this and use gpiochip->dev->of_node everywhere 623 * FIXME: get rid of this and use gpiochip->dev->of_node everywhere
613 */ 624 */
614 if (gpiochip->of_node) 625 if (gpiochip->of_node)
@@ -1211,7 +1222,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_value);
1211/* 1222/*
1212 * _gpio_set_open_drain_value() - Set the open drain gpio's value. 1223 * _gpio_set_open_drain_value() - Set the open drain gpio's value.
1213 * @desc: gpio descriptor whose state need to be set. 1224 * @desc: gpio descriptor whose state need to be set.
1214 * @value: Non-zero for setting it HIGH otherise it will set to LOW. 1225 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
1215 */ 1226 */
1216static void _gpio_set_open_drain_value(struct gpio_desc *desc, bool value) 1227static void _gpio_set_open_drain_value(struct gpio_desc *desc, bool value)
1217{ 1228{
@@ -1238,7 +1249,7 @@ static void _gpio_set_open_drain_value(struct gpio_desc *desc, bool value)
1238/* 1249/*
1239 * _gpio_set_open_source_value() - Set the open source gpio's value. 1250 * _gpio_set_open_source_value() - Set the open source gpio's value.
1240 * @desc: gpio descriptor whose state need to be set. 1251 * @desc: gpio descriptor whose state need to be set.
1241 * @value: Non-zero for setting it HIGH otherise it will set to LOW. 1252 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
1242 */ 1253 */
1243static void _gpio_set_open_source_value(struct gpio_desc *desc, bool value) 1254static void _gpio_set_open_source_value(struct gpio_desc *desc, bool value)
1244{ 1255{
@@ -1300,17 +1311,16 @@ static void gpio_chip_set_multiple(struct gpio_chip *chip,
1300 continue; 1311 continue;
1301 } 1312 }
1302 /* set outputs if the corresponding mask bit is set */ 1313 /* set outputs if the corresponding mask bit is set */
1303 if (__test_and_clear_bit(i, mask)) { 1314 if (__test_and_clear_bit(i, mask))
1304 chip->set(chip, i, test_bit(i, bits)); 1315 chip->set(chip, i, test_bit(i, bits));
1305 }
1306 } 1316 }
1307 } 1317 }
1308} 1318}
1309 1319
1310static void gpiod_set_array_priv(bool raw, bool can_sleep, 1320static void gpiod_set_array_value_priv(bool raw, bool can_sleep,
1311 unsigned int array_size, 1321 unsigned int array_size,
1312 struct gpio_desc **desc_array, 1322 struct gpio_desc **desc_array,
1313 int *value_array) 1323 int *value_array)
1314{ 1324{
1315 int i = 0; 1325 int i = 0;
1316 1326
@@ -1320,9 +1330,9 @@ static void gpiod_set_array_priv(bool raw, bool can_sleep,
1320 unsigned long bits[BITS_TO_LONGS(chip->ngpio)]; 1330 unsigned long bits[BITS_TO_LONGS(chip->ngpio)];
1321 int count = 0; 1331 int count = 0;
1322 1332
1323 if (!can_sleep) { 1333 if (!can_sleep)
1324 WARN_ON(chip->can_sleep); 1334 WARN_ON(chip->can_sleep);
1325 } 1335
1326 memset(mask, 0, sizeof(mask)); 1336 memset(mask, 0, sizeof(mask));
1327 do { 1337 do {
1328 struct gpio_desc *desc = desc_array[i]; 1338 struct gpio_desc *desc = desc_array[i];
@@ -1337,24 +1347,22 @@ static void gpiod_set_array_priv(bool raw, bool can_sleep,
1337 * open drain and open source outputs are set individually 1347 * open drain and open source outputs are set individually
1338 */ 1348 */
1339 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { 1349 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
1340 _gpio_set_open_drain_value(desc,value); 1350 _gpio_set_open_drain_value(desc, value);
1341 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { 1351 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
1342 _gpio_set_open_source_value(desc, value); 1352 _gpio_set_open_source_value(desc, value);
1343 } else { 1353 } else {
1344 __set_bit(hwgpio, mask); 1354 __set_bit(hwgpio, mask);
1345 if (value) { 1355 if (value)
1346 __set_bit(hwgpio, bits); 1356 __set_bit(hwgpio, bits);
1347 } else { 1357 else
1348 __clear_bit(hwgpio, bits); 1358 __clear_bit(hwgpio, bits);
1349 }
1350 count++; 1359 count++;
1351 } 1360 }
1352 i++; 1361 i++;
1353 } while ((i < array_size) && (desc_array[i]->chip == chip)); 1362 } while ((i < array_size) && (desc_array[i]->chip == chip));
1354 /* push collected bits to outputs */ 1363 /* push collected bits to outputs */
1355 if (count != 0) { 1364 if (count != 0)
1356 gpio_chip_set_multiple(chip, mask, bits); 1365 gpio_chip_set_multiple(chip, mask, bits);
1357 }
1358 } 1366 }
1359} 1367}
1360 1368
@@ -1403,7 +1411,7 @@ void gpiod_set_value(struct gpio_desc *desc, int value)
1403EXPORT_SYMBOL_GPL(gpiod_set_value); 1411EXPORT_SYMBOL_GPL(gpiod_set_value);
1404 1412
1405/** 1413/**
1406 * gpiod_set_raw_array() - assign values to an array of GPIOs 1414 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
1407 * @array_size: number of elements in the descriptor / value arrays 1415 * @array_size: number of elements in the descriptor / value arrays
1408 * @desc_array: array of GPIO descriptors whose values will be assigned 1416 * @desc_array: array of GPIO descriptors whose values will be assigned
1409 * @value_array: array of values to assign 1417 * @value_array: array of values to assign
@@ -1414,17 +1422,18 @@ EXPORT_SYMBOL_GPL(gpiod_set_value);
1414 * This function should be called from contexts where we cannot sleep, and will 1422 * This function should be called from contexts where we cannot sleep, and will
1415 * complain if the GPIO chip functions potentially sleep. 1423 * complain if the GPIO chip functions potentially sleep.
1416 */ 1424 */
1417void gpiod_set_raw_array(unsigned int array_size, 1425void gpiod_set_raw_array_value(unsigned int array_size,
1418 struct gpio_desc **desc_array, int *value_array) 1426 struct gpio_desc **desc_array, int *value_array)
1419{ 1427{
1420 if (!desc_array) 1428 if (!desc_array)
1421 return; 1429 return;
1422 gpiod_set_array_priv(true, false, array_size, desc_array, value_array); 1430 gpiod_set_array_value_priv(true, false, array_size, desc_array,
1431 value_array);
1423} 1432}
1424EXPORT_SYMBOL_GPL(gpiod_set_raw_array); 1433EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
1425 1434
1426/** 1435/**
1427 * gpiod_set_array() - assign values to an array of GPIOs 1436 * gpiod_set_array_value() - assign values to an array of GPIOs
1428 * @array_size: number of elements in the descriptor / value arrays 1437 * @array_size: number of elements in the descriptor / value arrays
1429 * @desc_array: array of GPIO descriptors whose values will be assigned 1438 * @desc_array: array of GPIO descriptors whose values will be assigned
1430 * @value_array: array of values to assign 1439 * @value_array: array of values to assign
@@ -1435,14 +1444,15 @@ EXPORT_SYMBOL_GPL(gpiod_set_raw_array);
1435 * This function should be called from contexts where we cannot sleep, and will 1444 * This function should be called from contexts where we cannot sleep, and will
1436 * complain if the GPIO chip functions potentially sleep. 1445 * complain if the GPIO chip functions potentially sleep.
1437 */ 1446 */
1438void gpiod_set_array(unsigned int array_size, 1447void gpiod_set_array_value(unsigned int array_size,
1439 struct gpio_desc **desc_array, int *value_array) 1448 struct gpio_desc **desc_array, int *value_array)
1440{ 1449{
1441 if (!desc_array) 1450 if (!desc_array)
1442 return; 1451 return;
1443 gpiod_set_array_priv(false, false, array_size, desc_array, value_array); 1452 gpiod_set_array_value_priv(false, false, array_size, desc_array,
1453 value_array);
1444} 1454}
1445EXPORT_SYMBOL_GPL(gpiod_set_array); 1455EXPORT_SYMBOL_GPL(gpiod_set_array_value);
1446 1456
1447/** 1457/**
1448 * gpiod_cansleep() - report whether gpio value access may sleep 1458 * gpiod_cansleep() - report whether gpio value access may sleep
@@ -1604,7 +1614,7 @@ void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
1604EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); 1614EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
1605 1615
1606/** 1616/**
1607 * gpiod_set_raw_array_cansleep() - assign values to an array of GPIOs 1617 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
1608 * @array_size: number of elements in the descriptor / value arrays 1618 * @array_size: number of elements in the descriptor / value arrays
1609 * @desc_array: array of GPIO descriptors whose values will be assigned 1619 * @desc_array: array of GPIO descriptors whose values will be assigned
1610 * @value_array: array of values to assign 1620 * @value_array: array of values to assign
@@ -1614,19 +1624,20 @@ EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
1614 * 1624 *
1615 * This function is to be called from contexts that can sleep. 1625 * This function is to be called from contexts that can sleep.
1616 */ 1626 */
1617void gpiod_set_raw_array_cansleep(unsigned int array_size, 1627void gpiod_set_raw_array_value_cansleep(unsigned int array_size,
1618 struct gpio_desc **desc_array, 1628 struct gpio_desc **desc_array,
1619 int *value_array) 1629 int *value_array)
1620{ 1630{
1621 might_sleep_if(extra_checks); 1631 might_sleep_if(extra_checks);
1622 if (!desc_array) 1632 if (!desc_array)
1623 return; 1633 return;
1624 gpiod_set_array_priv(true, true, array_size, desc_array, value_array); 1634 gpiod_set_array_value_priv(true, true, array_size, desc_array,
1635 value_array);
1625} 1636}
1626EXPORT_SYMBOL_GPL(gpiod_set_raw_array_cansleep); 1637EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
1627 1638
1628/** 1639/**
1629 * gpiod_set_array_cansleep() - assign values to an array of GPIOs 1640 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
1630 * @array_size: number of elements in the descriptor / value arrays 1641 * @array_size: number of elements in the descriptor / value arrays
1631 * @desc_array: array of GPIO descriptors whose values will be assigned 1642 * @desc_array: array of GPIO descriptors whose values will be assigned
1632 * @value_array: array of values to assign 1643 * @value_array: array of values to assign
@@ -1636,16 +1647,17 @@ EXPORT_SYMBOL_GPL(gpiod_set_raw_array_cansleep);
1636 * 1647 *
1637 * This function is to be called from contexts that can sleep. 1648 * This function is to be called from contexts that can sleep.
1638 */ 1649 */
1639void gpiod_set_array_cansleep(unsigned int array_size, 1650void gpiod_set_array_value_cansleep(unsigned int array_size,
1640 struct gpio_desc **desc_array, 1651 struct gpio_desc **desc_array,
1641 int *value_array) 1652 int *value_array)
1642{ 1653{
1643 might_sleep_if(extra_checks); 1654 might_sleep_if(extra_checks);
1644 if (!desc_array) 1655 if (!desc_array)
1645 return; 1656 return;
1646 gpiod_set_array_priv(false, true, array_size, desc_array, value_array); 1657 gpiod_set_array_value_priv(false, true, array_size, desc_array,
1658 value_array);
1647} 1659}
1648EXPORT_SYMBOL_GPL(gpiod_set_array_cansleep); 1660EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
1649 1661
1650/** 1662/**
1651 * gpiod_add_lookup_table() - register GPIO device consumers 1663 * gpiod_add_lookup_table() - register GPIO device consumers
@@ -1880,7 +1892,7 @@ EXPORT_SYMBOL_GPL(gpiod_count);
1880 * 1892 *
1881 * Return the GPIO descriptor corresponding to the function con_id of device 1893 * Return the GPIO descriptor corresponding to the function con_id of device
1882 * dev, -ENOENT if no GPIO has been assigned to the requested function, or 1894 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
1883 * another IS_ERR() code if an error occured while trying to acquire the GPIO. 1895 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
1884 */ 1896 */
1885struct gpio_desc *__must_check __gpiod_get(struct device *dev, const char *con_id, 1897struct gpio_desc *__must_check __gpiod_get(struct device *dev, const char *con_id,
1886 enum gpiod_flags flags) 1898 enum gpiod_flags flags)
@@ -1960,7 +1972,7 @@ static int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
1960 * 1972 *
1961 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the 1973 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
1962 * requested function and/or index, or another IS_ERR() code if an error 1974 * requested function and/or index, or another IS_ERR() code if an error
1963 * occured while trying to acquire the GPIO. 1975 * occurred while trying to acquire the GPIO.
1964 */ 1976 */
1965struct gpio_desc *__must_check __gpiod_get_index(struct device *dev, 1977struct gpio_desc *__must_check __gpiod_get_index(struct device *dev,
1966 const char *con_id, 1978 const char *con_id,
@@ -2118,13 +2130,15 @@ int gpiod_hog(struct gpio_desc *desc, const char *name,
2118 2130
2119 local_desc = gpiochip_request_own_desc(chip, hwnum, name); 2131 local_desc = gpiochip_request_own_desc(chip, hwnum, name);
2120 if (IS_ERR(local_desc)) { 2132 if (IS_ERR(local_desc)) {
2121 pr_debug("requesting own GPIO %s failed\n", name); 2133 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed\n",
2134 name, chip->label, hwnum);
2122 return PTR_ERR(local_desc); 2135 return PTR_ERR(local_desc);
2123 } 2136 }
2124 2137
2125 status = gpiod_configure_flags(desc, name, lflags, dflags); 2138 status = gpiod_configure_flags(desc, name, lflags, dflags);
2126 if (status < 0) { 2139 if (status < 0) {
2127 pr_debug("setup of GPIO %s failed\n", name); 2140 pr_err("setup of hog GPIO %s (chip %s, offset %d) failed\n",
2141 name, chip->label, hwnum);
2128 gpiochip_free_own_desc(desc); 2142 gpiochip_free_own_desc(desc);
2129 return status; 2143 return status;
2130 } 2144 }
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index 594b1798c0e7..bf343004b008 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -83,20 +83,12 @@ struct gpio_desc {
83#define FLAG_IS_OUT 1 83#define FLAG_IS_OUT 1
84#define FLAG_EXPORT 2 /* protected by sysfs_lock */ 84#define FLAG_EXPORT 2 /* protected by sysfs_lock */
85#define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */ 85#define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */
86#define FLAG_TRIG_FALL 4 /* trigger on falling edge */
87#define FLAG_TRIG_RISE 5 /* trigger on rising edge */
88#define FLAG_ACTIVE_LOW 6 /* value has active low */ 86#define FLAG_ACTIVE_LOW 6 /* value has active low */
89#define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */ 87#define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */
90#define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */ 88#define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */
91#define FLAG_USED_AS_IRQ 9 /* GPIO is connected to an IRQ */ 89#define FLAG_USED_AS_IRQ 9 /* GPIO is connected to an IRQ */
92#define FLAG_SYSFS_DIR 10 /* show sysfs direction attribute */
93#define FLAG_IS_HOGGED 11 /* GPIO is hogged */ 90#define FLAG_IS_HOGGED 11 /* GPIO is hogged */
94 91
95#define ID_SHIFT 16 /* add new flags before this one */
96
97#define GPIO_FLAGS_MASK ((1 << ID_SHIFT) - 1)
98#define GPIO_TRIGGER_MASK (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE))
99
100 const char *label; 92 const char *label;
101}; 93};
102 94
@@ -151,17 +143,17 @@ static int __maybe_unused gpio_chip_hwgpio(const struct gpio_desc *desc)
151 143
152#ifdef CONFIG_GPIO_SYSFS 144#ifdef CONFIG_GPIO_SYSFS
153 145
154int gpiochip_export(struct gpio_chip *chip); 146int gpiochip_sysfs_register(struct gpio_chip *chip);
155void gpiochip_unexport(struct gpio_chip *chip); 147void gpiochip_sysfs_unregister(struct gpio_chip *chip);
156 148
157#else 149#else
158 150
159static inline int gpiochip_export(struct gpio_chip *chip) 151static inline int gpiochip_sysfs_register(struct gpio_chip *chip)
160{ 152{
161 return 0; 153 return 0;
162} 154}
163 155
164static inline void gpiochip_unexport(struct gpio_chip *chip) 156static inline void gpiochip_sysfs_unregister(struct gpio_chip *chip)
165{ 157{
166} 158}
167 159
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 987c124432c5..fc2ee8213fb6 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -107,7 +107,7 @@ static int acpi_i2c_add_resource(struct acpi_resource *ares, void *data)
107 if (sb->access_mode == ACPI_I2C_10BIT_MODE) 107 if (sb->access_mode == ACPI_I2C_10BIT_MODE)
108 info->flags |= I2C_CLIENT_TEN; 108 info->flags |= I2C_CLIENT_TEN;
109 } 109 }
110 } else if (info->irq < 0) { 110 } else if (!info->irq) {
111 struct resource r; 111 struct resource r;
112 112
113 if (acpi_dev_resource_interrupt(ares, 0, &r)) 113 if (acpi_dev_resource_interrupt(ares, 0, &r))
@@ -134,7 +134,6 @@ static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level,
134 134
135 memset(&info, 0, sizeof(info)); 135 memset(&info, 0, sizeof(info));
136 info.fwnode = acpi_fwnode_handle(adev); 136 info.fwnode = acpi_fwnode_handle(adev);
137 info.irq = -1;
138 137
139 INIT_LIST_HEAD(&resource_list); 138 INIT_LIST_HEAD(&resource_list);
140 ret = acpi_dev_get_resources(adev, &resource_list, 139 ret = acpi_dev_get_resources(adev, &resource_list,
@@ -632,8 +631,13 @@ static int i2c_device_probe(struct device *dev)
632 if (!client) 631 if (!client)
633 return 0; 632 return 0;
634 633
635 if (!client->irq && dev->of_node) { 634 if (!client->irq) {
636 int irq = of_irq_get(dev->of_node, 0); 635 int irq = -ENOENT;
636
637 if (dev->of_node)
638 irq = of_irq_get(dev->of_node, 0);
639 else if (ACPI_COMPANION(dev))
640 irq = acpi_dev_gpio_irq_get(ACPI_COMPANION(dev), 0);
637 641
638 if (irq == -EPROBE_DEFER) 642 if (irq == -EPROBE_DEFER)
639 return irq; 643 return irq;
diff --git a/drivers/net/phy/mdio-mux-gpio.c b/drivers/net/phy/mdio-mux-gpio.c
index 66edd99bc302..7ddb1ab70891 100644
--- a/drivers/net/phy/mdio-mux-gpio.c
+++ b/drivers/net/phy/mdio-mux-gpio.c
@@ -35,7 +35,8 @@ static int mdio_mux_gpio_switch_fn(int current_child, int desired_child,
35 for (n = 0; n < s->gpios->ndescs; n++) 35 for (n = 0; n < s->gpios->ndescs; n++)
36 values[n] = (desired_child >> n) & 1; 36 values[n] = (desired_child >> n) & 1;
37 37
38 gpiod_set_array_cansleep(s->gpios->ndescs, s->gpios->desc, values); 38 gpiod_set_array_value_cansleep(s->gpios->ndescs, s->gpios->desc,
39 values);
39 40
40 return 0; 41 return 0;
41} 42}
diff --git a/drivers/tty/serial/serial_mctrl_gpio.c b/drivers/tty/serial/serial_mctrl_gpio.c
index 0ec756c62bcf..d7b846d41630 100644
--- a/drivers/tty/serial/serial_mctrl_gpio.c
+++ b/drivers/tty/serial/serial_mctrl_gpio.c
@@ -55,7 +55,7 @@ void mctrl_gpio_set(struct mctrl_gpios *gpios, unsigned int mctrl)
55 value_array[count] = !!(mctrl & mctrl_gpios_desc[i].mctrl); 55 value_array[count] = !!(mctrl & mctrl_gpios_desc[i].mctrl);
56 count++; 56 count++;
57 } 57 }
58 gpiod_set_array(count, desc_array, value_array); 58 gpiod_set_array_value(count, desc_array, value_array);
59} 59}
60EXPORT_SYMBOL_GPL(mctrl_gpio_set); 60EXPORT_SYMBOL_GPL(mctrl_gpio_set);
61 61
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 9bb0d11729c9..40ec1433f05d 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -128,11 +128,6 @@ static inline int gpio_export_link(struct device *dev, const char *name,
128 return gpiod_export_link(dev, name, gpio_to_desc(gpio)); 128 return gpiod_export_link(dev, name, gpio_to_desc(gpio));
129} 129}
130 130
131static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
132{
133 return gpiod_sysfs_set_active_low(gpio_to_desc(gpio), value);
134}
135
136static inline void gpio_unexport(unsigned gpio) 131static inline void gpio_unexport(unsigned gpio)
137{ 132{
138 gpiod_unexport(gpio_to_desc(gpio)); 133 gpiod_unexport(gpio_to_desc(gpio));
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index e4da5e35e29c..f57c440642cd 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -721,6 +721,8 @@ static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev)
721 if (adev) 721 if (adev)
722 adev->driver_gpios = NULL; 722 adev->driver_gpios = NULL;
723} 723}
724
725int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index);
724#else 726#else
725static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev, 727static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev,
726 const struct acpi_gpio_mapping *gpios) 728 const struct acpi_gpio_mapping *gpios)
@@ -728,6 +730,11 @@ static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev,
728 return -ENXIO; 730 return -ENXIO;
729} 731}
730static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev) {} 732static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev) {}
733
734static inline int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index)
735{
736 return -ENXIO;
737}
731#endif 738#endif
732 739
733/* Device properties */ 740/* Device properties */
diff --git a/include/linux/basic_mmio_gpio.h b/include/linux/basic_mmio_gpio.h
index 0e97856b2cff..14eea946e640 100644
--- a/include/linux/basic_mmio_gpio.h
+++ b/include/linux/basic_mmio_gpio.h
@@ -74,5 +74,6 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
74#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ 74#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
75#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ 75#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
76#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) 76#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
77#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
77 78
78#endif /* __BASIC_MMIO_GPIO_H */ 79#endif /* __BASIC_MMIO_GPIO_H */
diff --git a/include/linux/gpio.h b/include/linux/gpio.h
index ab81339a8590..d12b5d566e4b 100644
--- a/include/linux/gpio.h
+++ b/include/linux/gpio.h
@@ -196,13 +196,6 @@ static inline int gpio_export_link(struct device *dev, const char *name,
196 return -EINVAL; 196 return -EINVAL;
197} 197}
198 198
199static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
200{
201 /* GPIO can never have been requested */
202 WARN_ON(1);
203 return -EINVAL;
204}
205
206static inline void gpio_unexport(unsigned gpio) 199static inline void gpio_unexport(unsigned gpio)
207{ 200{
208 /* GPIO can never have been exported */ 201 /* GPIO can never have been exported */
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index 3a7c9ffd5ab9..fd098169fe87 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -100,24 +100,25 @@ int gpiod_direction_output_raw(struct gpio_desc *desc, int value);
100/* Value get/set from non-sleeping context */ 100/* Value get/set from non-sleeping context */
101int gpiod_get_value(const struct gpio_desc *desc); 101int gpiod_get_value(const struct gpio_desc *desc);
102void gpiod_set_value(struct gpio_desc *desc, int value); 102void gpiod_set_value(struct gpio_desc *desc, int value);
103void gpiod_set_array(unsigned int array_size, 103void gpiod_set_array_value(unsigned int array_size,
104 struct gpio_desc **desc_array, int *value_array); 104 struct gpio_desc **desc_array, int *value_array);
105int gpiod_get_raw_value(const struct gpio_desc *desc); 105int gpiod_get_raw_value(const struct gpio_desc *desc);
106void gpiod_set_raw_value(struct gpio_desc *desc, int value); 106void gpiod_set_raw_value(struct gpio_desc *desc, int value);
107void gpiod_set_raw_array(unsigned int array_size, 107void gpiod_set_raw_array_value(unsigned int array_size,
108 struct gpio_desc **desc_array, int *value_array); 108 struct gpio_desc **desc_array,
109 int *value_array);
109 110
110/* Value get/set from sleeping context */ 111/* Value get/set from sleeping context */
111int gpiod_get_value_cansleep(const struct gpio_desc *desc); 112int gpiod_get_value_cansleep(const struct gpio_desc *desc);
112void gpiod_set_value_cansleep(struct gpio_desc *desc, int value); 113void gpiod_set_value_cansleep(struct gpio_desc *desc, int value);
113void gpiod_set_array_cansleep(unsigned int array_size, 114void gpiod_set_array_value_cansleep(unsigned int array_size,
114 struct gpio_desc **desc_array, 115 struct gpio_desc **desc_array,
115 int *value_array); 116 int *value_array);
116int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc); 117int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc);
117void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value); 118void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value);
118void gpiod_set_raw_array_cansleep(unsigned int array_size, 119void gpiod_set_raw_array_value_cansleep(unsigned int array_size,
119 struct gpio_desc **desc_array, 120 struct gpio_desc **desc_array,
120 int *value_array); 121 int *value_array);
121 122
122int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce); 123int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce);
123 124
@@ -304,9 +305,9 @@ static inline void gpiod_set_value(struct gpio_desc *desc, int value)
304 /* GPIO can never have been requested */ 305 /* GPIO can never have been requested */
305 WARN_ON(1); 306 WARN_ON(1);
306} 307}
307static inline void gpiod_set_array(unsigned int array_size, 308static inline void gpiod_set_array_value(unsigned int array_size,
308 struct gpio_desc **desc_array, 309 struct gpio_desc **desc_array,
309 int *value_array) 310 int *value_array)
310{ 311{
311 /* GPIO can never have been requested */ 312 /* GPIO can never have been requested */
312 WARN_ON(1); 313 WARN_ON(1);
@@ -322,9 +323,9 @@ static inline void gpiod_set_raw_value(struct gpio_desc *desc, int value)
322 /* GPIO can never have been requested */ 323 /* GPIO can never have been requested */
323 WARN_ON(1); 324 WARN_ON(1);
324} 325}
325static inline void gpiod_set_raw_array(unsigned int array_size, 326static inline void gpiod_set_raw_array_value(unsigned int array_size,
326 struct gpio_desc **desc_array, 327 struct gpio_desc **desc_array,
327 int *value_array) 328 int *value_array)
328{ 329{
329 /* GPIO can never have been requested */ 330 /* GPIO can never have been requested */
330 WARN_ON(1); 331 WARN_ON(1);
@@ -341,7 +342,7 @@ static inline void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
341 /* GPIO can never have been requested */ 342 /* GPIO can never have been requested */
342 WARN_ON(1); 343 WARN_ON(1);
343} 344}
344static inline void gpiod_set_array_cansleep(unsigned int array_size, 345static inline void gpiod_set_array_value_cansleep(unsigned int array_size,
345 struct gpio_desc **desc_array, 346 struct gpio_desc **desc_array,
346 int *value_array) 347 int *value_array)
347{ 348{
@@ -360,7 +361,7 @@ static inline void gpiod_set_raw_value_cansleep(struct gpio_desc *desc,
360 /* GPIO can never have been requested */ 361 /* GPIO can never have been requested */
361 WARN_ON(1); 362 WARN_ON(1);
362} 363}
363static inline void gpiod_set_raw_array_cansleep(unsigned int array_size, 364static inline void gpiod_set_raw_array_value_cansleep(unsigned int array_size,
364 struct gpio_desc **desc_array, 365 struct gpio_desc **desc_array,
365 int *value_array) 366 int *value_array)
366{ 367{
@@ -449,7 +450,6 @@ static inline int desc_to_gpio(const struct gpio_desc *desc)
449int gpiod_export(struct gpio_desc *desc, bool direction_may_change); 450int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
450int gpiod_export_link(struct device *dev, const char *name, 451int gpiod_export_link(struct device *dev, const char *name,
451 struct gpio_desc *desc); 452 struct gpio_desc *desc);
452int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value);
453void gpiod_unexport(struct gpio_desc *desc); 453void gpiod_unexport(struct gpio_desc *desc);
454 454
455#else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ 455#else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
@@ -466,11 +466,6 @@ static inline int gpiod_export_link(struct device *dev, const char *name,
466 return -ENOSYS; 466 return -ENOSYS;
467} 467}
468 468
469static inline int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value)
470{
471 return -ENOSYS;
472}
473
474static inline void gpiod_unexport(struct gpio_desc *desc) 469static inline void gpiod_unexport(struct gpio_desc *desc)
475{ 470{
476} 471}
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index f1b36593ec9f..cc7ec129b329 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -20,6 +20,7 @@ struct seq_file;
20 * struct gpio_chip - abstract a GPIO controller 20 * struct gpio_chip - abstract a GPIO controller
21 * @label: for diagnostics 21 * @label: for diagnostics
22 * @dev: optional device providing the GPIOs 22 * @dev: optional device providing the GPIOs
23 * @cdev: class device used by sysfs interface (may be NULL)
23 * @owner: helps prevent removal of modules exporting active GPIOs 24 * @owner: helps prevent removal of modules exporting active GPIOs
24 * @list: links gpio_chips together for traversal 25 * @list: links gpio_chips together for traversal
25 * @request: optional hook for chip-specific activation, such as 26 * @request: optional hook for chip-specific activation, such as
@@ -41,8 +42,12 @@ struct seq_file;
41 * @dbg_show: optional routine to show contents in debugfs; default code 42 * @dbg_show: optional routine to show contents in debugfs; default code
42 * will be used when this is omitted, but custom code can show extra 43 * will be used when this is omitted, but custom code can show extra
43 * state (such as pullup/pulldown configuration). 44 * state (such as pullup/pulldown configuration).
44 * @base: identifies the first GPIO number handled by this chip; or, if 45 * @base: identifies the first GPIO number handled by this chip;
45 * negative during registration, requests dynamic ID allocation. 46 * or, if negative during registration, requests dynamic ID allocation.
47 * DEPRECATION: providing anything non-negative and nailing the base
48 * base offset of GPIO chips is deprecated. Please pass -1 as base to
49 * let gpiolib select the chip base in all possible cases. We want to
50 * get rid of the static GPIO number space in the long run.
46 * @ngpio: the number of GPIOs handled by this controller; the last GPIO 51 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
47 * handled is (base + ngpio - 1). 52 * handled is (base + ngpio - 1).
48 * @desc: array of ngpio descriptors. Private. 53 * @desc: array of ngpio descriptors. Private.
@@ -57,7 +62,6 @@ struct seq_file;
57 * implies that if the chip supports IRQs, these IRQs need to be threaded 62 * implies that if the chip supports IRQs, these IRQs need to be threaded
58 * as the chip access may sleep when e.g. reading out the IRQ status 63 * as the chip access may sleep when e.g. reading out the IRQ status
59 * registers. 64 * registers.
60 * @exported: flags if the gpiochip is exported for use from sysfs. Private.
61 * @irq_not_threaded: flag must be set if @can_sleep is set but the 65 * @irq_not_threaded: flag must be set if @can_sleep is set but the
62 * IRQs don't need to be threaded 66 * IRQs don't need to be threaded
63 * 67 *
@@ -74,6 +78,7 @@ struct seq_file;
74struct gpio_chip { 78struct gpio_chip {
75 const char *label; 79 const char *label;
76 struct device *dev; 80 struct device *dev;
81 struct device *cdev;
77 struct module *owner; 82 struct module *owner;
78 struct list_head list; 83 struct list_head list;
79 84
@@ -109,7 +114,6 @@ struct gpio_chip {
109 const char *const *names; 114 const char *const *names;
110 bool can_sleep; 115 bool can_sleep;
111 bool irq_not_threaded; 116 bool irq_not_threaded;
112 bool exported;
113 117
114#ifdef CONFIG_GPIOLIB_IRQCHIP 118#ifdef CONFIG_GPIOLIB_IRQCHIP
115 /* 119 /*
@@ -121,6 +125,7 @@ struct gpio_chip {
121 unsigned int irq_base; 125 unsigned int irq_base;
122 irq_flow_handler_t irq_handler; 126 irq_flow_handler_t irq_handler;
123 unsigned int irq_default_type; 127 unsigned int irq_default_type;
128 int irq_parent;
124#endif 129#endif
125 130
126#if defined(CONFIG_OF_GPIO) 131#if defined(CONFIG_OF_GPIO)
diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h
index 5d50b25a73d7..cb2618147c34 100644
--- a/include/linux/platform_data/gpio-omap.h
+++ b/include/linux/platform_data/gpio-omap.h
@@ -208,9 +208,17 @@ struct omap_gpio_platform_data {
208 int (*get_context_loss_count)(struct device *dev); 208 int (*get_context_loss_count)(struct device *dev);
209}; 209};
210 210
211#if IS_BUILTIN(CONFIG_GPIO_OMAP)
211extern void omap2_gpio_prepare_for_idle(int off_mode); 212extern void omap2_gpio_prepare_for_idle(int off_mode);
212extern void omap2_gpio_resume_after_idle(void); 213extern void omap2_gpio_resume_after_idle(void);
213extern void omap_set_gpio_debounce(int gpio, int enable); 214#else
214extern void omap_set_gpio_debounce_time(int gpio, int enable); 215static inline void omap2_gpio_prepare_for_idle(int off_mode)
216{
217}
218
219static inline void omap2_gpio_resume_after_idle(void)
220{
221}
222#endif
215 223
216#endif 224#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-30 09:26:30 -0400