diff options
author | Arnd Bergmann <arnd@arndb.de> | 2017-03-24 12:51:50 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2017-03-24 12:51:50 -0400 |
commit | 0fa974b8b6106e053595e5481ef6fdbf5c60b457 (patch) | |
tree | 3f7fae52c406003f663c5385ac305d2c05bac0ca | |
parent | bf3f53089c2f51d8907398051f9a7dcf2788c4b5 (diff) | |
parent | f0c0cb99f74c03e2407ea553f6d46eb611e262b5 (diff) |
Merge tag 'arm-soc/for-4.11/devicetree-arm64-fixes' of http://github.com/Broadcom/stblinux into fixes
Pull "Broadcom arm64 Device Tree fixes for 4.11" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoCs Device Tree fixes for 4.11,
please pull the following:
- Jon adds missing "dma-coherent" property to the Northstar 2 DTS include file
in order to fix both performance and cache problems for: PCIe, Ethernet,
PDC/mailbox, SATA3 and SDHCI
* tag 'arm-soc/for-4.11/devicetree-arm64-fixes' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: Add dma-coherent to relevant DT entries
-rw-r--r-- | arch/arm64/boot/dts/broadcom/ns2.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index 9f9e203c09c5..bcb03fc32665 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi | |||
@@ -114,6 +114,7 @@ | |||
114 | pcie0: pcie@20020000 { | 114 | pcie0: pcie@20020000 { |
115 | compatible = "brcm,iproc-pcie"; | 115 | compatible = "brcm,iproc-pcie"; |
116 | reg = <0 0x20020000 0 0x1000>; | 116 | reg = <0 0x20020000 0 0x1000>; |
117 | dma-coherent; | ||
117 | 118 | ||
118 | #interrupt-cells = <1>; | 119 | #interrupt-cells = <1>; |
119 | interrupt-map-mask = <0 0 0 0>; | 120 | interrupt-map-mask = <0 0 0 0>; |
@@ -144,6 +145,7 @@ | |||
144 | pcie4: pcie@50020000 { | 145 | pcie4: pcie@50020000 { |
145 | compatible = "brcm,iproc-pcie"; | 146 | compatible = "brcm,iproc-pcie"; |
146 | reg = <0 0x50020000 0 0x1000>; | 147 | reg = <0 0x50020000 0 0x1000>; |
148 | dma-coherent; | ||
147 | 149 | ||
148 | #interrupt-cells = <1>; | 150 | #interrupt-cells = <1>; |
149 | interrupt-map-mask = <0 0 0 0>; | 151 | interrupt-map-mask = <0 0 0 0>; |
@@ -174,6 +176,7 @@ | |||
174 | pcie8: pcie@60c00000 { | 176 | pcie8: pcie@60c00000 { |
175 | compatible = "brcm,iproc-pcie-paxc"; | 177 | compatible = "brcm,iproc-pcie-paxc"; |
176 | reg = <0 0x60c00000 0 0x1000>; | 178 | reg = <0 0x60c00000 0 0x1000>; |
179 | dma-coherent; | ||
177 | linux,pci-domain = <8>; | 180 | linux,pci-domain = <8>; |
178 | 181 | ||
179 | bus-range = <0x0 0x1>; | 182 | bus-range = <0x0 0x1>; |
@@ -203,6 +206,7 @@ | |||
203 | <0x61030000 0x100>; | 206 | <0x61030000 0x100>; |
204 | reg-names = "amac_base", "idm_base", "nicpm_base"; | 207 | reg-names = "amac_base", "idm_base", "nicpm_base"; |
205 | interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; | 208 | interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; |
209 | dma-coherent; | ||
206 | phy-handle = <&gphy0>; | 210 | phy-handle = <&gphy0>; |
207 | phy-mode = "rgmii"; | 211 | phy-mode = "rgmii"; |
208 | status = "disabled"; | 212 | status = "disabled"; |
@@ -213,6 +217,7 @@ | |||
213 | reg = <0x612c0000 0x445>; /* PDC FS0 regs */ | 217 | reg = <0x612c0000 0x445>; /* PDC FS0 regs */ |
214 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | 218 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
215 | #mbox-cells = <1>; | 219 | #mbox-cells = <1>; |
220 | dma-coherent; | ||
216 | brcm,rx-status-len = <32>; | 221 | brcm,rx-status-len = <32>; |
217 | brcm,use-bcm-hdr; | 222 | brcm,use-bcm-hdr; |
218 | }; | 223 | }; |
@@ -222,6 +227,7 @@ | |||
222 | reg = <0x612e0000 0x445>; /* PDC FS1 regs */ | 227 | reg = <0x612e0000 0x445>; /* PDC FS1 regs */ |
223 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; | 228 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
224 | #mbox-cells = <1>; | 229 | #mbox-cells = <1>; |
230 | dma-coherent; | ||
225 | brcm,rx-status-len = <32>; | 231 | brcm,rx-status-len = <32>; |
226 | brcm,use-bcm-hdr; | 232 | brcm,use-bcm-hdr; |
227 | }; | 233 | }; |
@@ -231,6 +237,7 @@ | |||
231 | reg = <0x61300000 0x445>; /* PDC FS2 regs */ | 237 | reg = <0x61300000 0x445>; /* PDC FS2 regs */ |
232 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; | 238 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
233 | #mbox-cells = <1>; | 239 | #mbox-cells = <1>; |
240 | dma-coherent; | ||
234 | brcm,rx-status-len = <32>; | 241 | brcm,rx-status-len = <32>; |
235 | brcm,use-bcm-hdr; | 242 | brcm,use-bcm-hdr; |
236 | }; | 243 | }; |
@@ -240,6 +247,7 @@ | |||
240 | reg = <0x61320000 0x445>; /* PDC FS3 regs */ | 247 | reg = <0x61320000 0x445>; /* PDC FS3 regs */ |
241 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; | 248 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; |
242 | #mbox-cells = <1>; | 249 | #mbox-cells = <1>; |
250 | dma-coherent; | ||
243 | brcm,rx-status-len = <32>; | 251 | brcm,rx-status-len = <32>; |
244 | brcm,use-bcm-hdr; | 252 | brcm,use-bcm-hdr; |
245 | }; | 253 | }; |
@@ -644,6 +652,7 @@ | |||
644 | sata: ahci@663f2000 { | 652 | sata: ahci@663f2000 { |
645 | compatible = "brcm,iproc-ahci", "generic-ahci"; | 653 | compatible = "brcm,iproc-ahci", "generic-ahci"; |
646 | reg = <0x663f2000 0x1000>; | 654 | reg = <0x663f2000 0x1000>; |
655 | dma-coherent; | ||
647 | reg-names = "ahci"; | 656 | reg-names = "ahci"; |
648 | interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>; | 657 | interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>; |
649 | #address-cells = <1>; | 658 | #address-cells = <1>; |
@@ -667,6 +676,7 @@ | |||
667 | compatible = "brcm,sdhci-iproc-cygnus"; | 676 | compatible = "brcm,sdhci-iproc-cygnus"; |
668 | reg = <0x66420000 0x100>; | 677 | reg = <0x66420000 0x100>; |
669 | interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; | 678 | interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; |
679 | dma-coherent; | ||
670 | bus-width = <8>; | 680 | bus-width = <8>; |
671 | clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; | 681 | clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; |
672 | status = "disabled"; | 682 | status = "disabled"; |
@@ -676,6 +686,7 @@ | |||
676 | compatible = "brcm,sdhci-iproc-cygnus"; | 686 | compatible = "brcm,sdhci-iproc-cygnus"; |
677 | reg = <0x66430000 0x100>; | 687 | reg = <0x66430000 0x100>; |
678 | interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; | 688 | interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; |
689 | dma-coherent; | ||
679 | bus-width = <8>; | 690 | bus-width = <8>; |
680 | clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; | 691 | clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; |
681 | status = "disabled"; | 692 | status = "disabled"; |