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authorZhao Qiang <B45475@freescale.com>2014-03-05 20:39:24 -0500
committerScott Wood <scottwood@freescale.com>2014-03-19 20:37:59 -0400
commit0f5a869600141a0d5575e3190af01a050c081b07 (patch)
tree5e049d7d13b04aadf823c9d767ee25e1b587336e
parent706f4aa0350f80743951bd0d1272baba56076833 (diff)
Corenet: Add QE platform support for Corenet
There is QE on platform T104x, add support. Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined. Signed-off-by: Zhao Qiang <B45475@freescale.com> [scottwood@freesacle.com: whitespace fix] Signed-off-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--arch/powerpc/platforms/85xx/corenet_generic.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index fbd871e69754..a8877c4e10ad 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -26,11 +26,13 @@
26#include <asm/udbg.h> 26#include <asm/udbg.h>
27#include <asm/mpic.h> 27#include <asm/mpic.h>
28#include <asm/ehv_pic.h> 28#include <asm/ehv_pic.h>
29#include <asm/qe_ic.h>
29 30
30#include <linux/of_platform.h> 31#include <linux/of_platform.h>
31#include <sysdev/fsl_soc.h> 32#include <sysdev/fsl_soc.h>
32#include <sysdev/fsl_pci.h> 33#include <sysdev/fsl_pci.h>
33#include "smp.h" 34#include "smp.h"
35#include "mpc85xx.h"
34 36
35void __init corenet_gen_pic_init(void) 37void __init corenet_gen_pic_init(void)
36{ 38{
@@ -38,6 +40,8 @@ void __init corenet_gen_pic_init(void)
38 unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU | 40 unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
39 MPIC_NO_RESET; 41 MPIC_NO_RESET;
40 42
43 struct device_node *np;
44
41 if (ppc_md.get_irq == mpic_get_coreint_irq) 45 if (ppc_md.get_irq == mpic_get_coreint_irq)
42 flags |= MPIC_ENABLE_COREINT; 46 flags |= MPIC_ENABLE_COREINT;
43 47
@@ -45,6 +49,13 @@ void __init corenet_gen_pic_init(void)
45 BUG_ON(mpic == NULL); 49 BUG_ON(mpic == NULL);
46 50
47 mpic_init(mpic); 51 mpic_init(mpic);
52
53 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
54 if (np) {
55 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
56 qe_ic_cascade_high_mpic);
57 of_node_put(np);
58 }
48} 59}
49 60
50/* 61/*
@@ -57,6 +68,8 @@ void __init corenet_gen_setup_arch(void)
57 swiotlb_detect_4g(); 68 swiotlb_detect_4g();
58 69
59 pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); 70 pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
71
72 mpc85xx_qe_init();
60} 73}
61 74
62static const struct of_device_id of_device_ids[] = { 75static const struct of_device_id of_device_ids[] = {
@@ -81,6 +94,9 @@ static const struct of_device_id of_device_ids[] = {
81 { 94 {
82 .compatible = "fsl,qoriq-pcie-v3.0", 95 .compatible = "fsl,qoriq-pcie-v3.0",
83 }, 96 },
97 {
98 .compatible = "fsl,qe",
99 },
84 /* The following two are for the Freescale hypervisor */ 100 /* The following two are for the Freescale hypervisor */
85 { 101 {
86 .name = "hypervisor", 102 .name = "hypervisor",