diff options
author | Dave Airlie <airlied@redhat.com> | 2019-03-13 22:14:40 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2019-03-13 22:15:02 -0400 |
commit | 0f1d37e65a59e9db33ab85f6e2c9784768ef80f4 (patch) | |
tree | 6c2565da62d903007b0184905658480c88236034 | |
parent | ad7ad48e09871e7bf6d75db80243f2abb30b4db9 (diff) | |
parent | f7b1844bacecca96dd8d813675e4d8adec02cd66 (diff) |
Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux into drm-next
- Update golden regs for gfx9
- Powerplay fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190313194249.3346-1-alexander.deucher@amd.com
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c | 17 |
3 files changed, 21 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 5533f6e4f4a4..d0309e8c9d12 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | |||
@@ -220,6 +220,7 @@ static const struct soc15_reg_golden golden_settings_gc_9_1_rv2[] = | |||
220 | 220 | ||
221 | static const struct soc15_reg_golden golden_settings_gc_9_x_common[] = | 221 | static const struct soc15_reg_golden golden_settings_gc_9_x_common[] = |
222 | { | 222 | { |
223 | SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0xffffffff, 0x000001ff), | ||
223 | SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_INDEX, 0xffffffff, 0x00000000), | 224 | SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_INDEX, 0xffffffff, 0x00000000), |
224 | SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_DATA, 0xffffffff, 0x2544c382) | 225 | SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_DATA, 0xffffffff, 0x2544c382) |
225 | }; | 226 | }; |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 48187acac59e..83d3d935f3ac 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | |||
@@ -3491,14 +3491,14 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr, u32 *query) | |||
3491 | 3491 | ||
3492 | smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart); | 3492 | smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart); |
3493 | cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, | 3493 | cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, |
3494 | ixSMU_PM_STATUS_94, 0); | 3494 | ixSMU_PM_STATUS_95, 0); |
3495 | 3495 | ||
3496 | for (i = 0; i < 10; i++) { | 3496 | for (i = 0; i < 10; i++) { |
3497 | mdelay(1); | 3497 | mdelay(500); |
3498 | smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample); | 3498 | smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample); |
3499 | tmp = cgs_read_ind_register(hwmgr->device, | 3499 | tmp = cgs_read_ind_register(hwmgr->device, |
3500 | CGS_IND_REG__SMC, | 3500 | CGS_IND_REG__SMC, |
3501 | ixSMU_PM_STATUS_94); | 3501 | ixSMU_PM_STATUS_95); |
3502 | if (tmp != 0) | 3502 | if (tmp != 0) |
3503 | break; | 3503 | break; |
3504 | } | 3504 | } |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c index 97f8a1a970c3..7a7f15d0c53a 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c | |||
@@ -32,6 +32,8 @@ | |||
32 | #include "cgs_common.h" | 32 | #include "cgs_common.h" |
33 | #include "vega20_pptable.h" | 33 | #include "vega20_pptable.h" |
34 | 34 | ||
35 | #define VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE 105 | ||
36 | |||
35 | static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable, | 37 | static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable, |
36 | enum phm_platform_caps cap) | 38 | enum phm_platform_caps cap) |
37 | { | 39 | { |
@@ -798,6 +800,17 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable | |||
798 | return 0; | 800 | return 0; |
799 | } | 801 | } |
800 | 802 | ||
803 | static int override_powerplay_table_fantargettemperature(struct pp_hwmgr *hwmgr) | ||
804 | { | ||
805 | struct phm_ppt_v3_information *pptable_information = | ||
806 | (struct phm_ppt_v3_information *)hwmgr->pptable; | ||
807 | PPTable_t *ppsmc_pptable = (PPTable_t *)(pptable_information->smc_pptable); | ||
808 | |||
809 | ppsmc_pptable->FanTargetTemperature = VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE; | ||
810 | |||
811 | return 0; | ||
812 | } | ||
813 | |||
801 | #define VEGA20_ENGINECLOCK_HARDMAX 198000 | 814 | #define VEGA20_ENGINECLOCK_HARDMAX 198000 |
802 | static int init_powerplay_table_information( | 815 | static int init_powerplay_table_information( |
803 | struct pp_hwmgr *hwmgr, | 816 | struct pp_hwmgr *hwmgr, |
@@ -887,6 +900,10 @@ static int init_powerplay_table_information( | |||
887 | 900 | ||
888 | 901 | ||
889 | result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable)); | 902 | result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable)); |
903 | if (result) | ||
904 | return result; | ||
905 | |||
906 | result = override_powerplay_table_fantargettemperature(hwmgr); | ||
890 | 907 | ||
891 | return result; | 908 | return result; |
892 | } | 909 | } |