aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-01-15 10:10:28 -0500
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-01-18 04:58:40 -0500
commit0eb973d31d0aadb6bc801fd6d796afecbbfc3d5b (patch)
tree19a254daa12645b56c2d5cacf9d6c17409564803
parentca82580c9ceace0d52fe7376b8a72bb3b36f612b (diff)
drm/i915: Cache ringbuffer GTT VMA
Purpose is to avoid calling i915_gem_obj_ggtt_offset from the interrupt context without the big lock held. v2: Renamed gtt_start to gtt_offset. (Daniel Vetter) v3: Cache the VMA instead of address. (Chris Wilson) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1452870629-13830-2-git-send-email-tvrtko.ursulin@linux.intel.com
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c3
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c3
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h1
3 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 86042dc1802c..588cad58a196 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -391,7 +391,6 @@ static int execlists_update_context(struct drm_i915_gem_request *rq)
391 struct intel_engine_cs *ring = rq->ring; 391 struct intel_engine_cs *ring = rq->ring;
392 struct i915_hw_ppgtt *ppgtt = rq->ctx->ppgtt; 392 struct i915_hw_ppgtt *ppgtt = rq->ctx->ppgtt;
393 struct drm_i915_gem_object *ctx_obj = rq->ctx->engine[ring->id].state; 393 struct drm_i915_gem_object *ctx_obj = rq->ctx->engine[ring->id].state;
394 struct drm_i915_gem_object *rb_obj = rq->ringbuf->obj;
395 struct page *page; 394 struct page *page;
396 uint32_t *reg_state; 395 uint32_t *reg_state;
397 396
@@ -401,7 +400,7 @@ static int execlists_update_context(struct drm_i915_gem_request *rq)
401 reg_state = kmap_atomic(page); 400 reg_state = kmap_atomic(page);
402 401
403 reg_state[CTX_RING_TAIL+1] = rq->tail; 402 reg_state[CTX_RING_TAIL+1] = rq->tail;
404 reg_state[CTX_RING_BUFFER_START+1] = i915_gem_obj_ggtt_offset(rb_obj); 403 reg_state[CTX_RING_BUFFER_START+1] = rq->ringbuf->vma->node.start;
405 404
406 if (ppgtt && !USES_FULL_48BIT_PPGTT(ppgtt->base.dev)) { 405 if (ppgtt && !USES_FULL_48BIT_PPGTT(ppgtt->base.dev)) {
407 /* True 32b PPGTT with dynamic page allocation: update PDP 406 /* True 32b PPGTT with dynamic page allocation: update PDP
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 8cd8aabcc3ff..d4e33ac02efa 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1999,6 +1999,7 @@ void intel_unpin_ringbuffer_obj(struct intel_ringbuffer *ringbuf)
1999 else 1999 else
2000 iounmap(ringbuf->virtual_start); 2000 iounmap(ringbuf->virtual_start);
2001 ringbuf->virtual_start = NULL; 2001 ringbuf->virtual_start = NULL;
2002 ringbuf->vma = NULL;
2002 i915_gem_object_ggtt_unpin(ringbuf->obj); 2003 i915_gem_object_ggtt_unpin(ringbuf->obj);
2003} 2004}
2004 2005
@@ -2065,6 +2066,8 @@ int intel_pin_and_map_ringbuffer_obj(struct drm_device *dev,
2065 } 2066 }
2066 } 2067 }
2067 2068
2069 ringbuf->vma = i915_gem_obj_to_ggtt(obj);
2070
2068 return 0; 2071 return 0;
2069} 2072}
2070 2073
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 85ce2272f92c..ede57954080e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -99,6 +99,7 @@ struct intel_ring_hangcheck {
99struct intel_ringbuffer { 99struct intel_ringbuffer {
100 struct drm_i915_gem_object *obj; 100 struct drm_i915_gem_object *obj;
101 void __iomem *virtual_start; 101 void __iomem *virtual_start;
102 struct i915_vma *vma;
102 103
103 struct intel_engine_cs *ring; 104 struct intel_engine_cs *ring;
104 struct list_head link; 105 struct list_head link;