diff options
author | Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | 2016-12-07 11:44:46 -0500 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-12-27 04:57:39 -0500 |
commit | 0e4e4999aac16641f47699e8929693b83a7a4d64 (patch) | |
tree | 0e19979716f9d68c5de67390418f284966512547 | |
parent | aa6931f135d293cf6b0d527360845ff38455bc72 (diff) |
pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[geert: Fix hscif2_clk_[bc]_mux[] and hscif4_ctrl_mux[]]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 283 |
1 files changed, 283 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index 34a05d774172..b0362ae707e2 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c | |||
@@ -1998,6 +1998,213 @@ static const unsigned int du_disp_mux[] = { | |||
1998 | DU_DISP_MARK, | 1998 | DU_DISP_MARK, |
1999 | }; | 1999 | }; |
2000 | 2000 | ||
2001 | /* - HSCIF0 ----------------------------------------------------------------- */ | ||
2002 | static const unsigned int hscif0_data_pins[] = { | ||
2003 | /* RX, TX */ | ||
2004 | RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), | ||
2005 | }; | ||
2006 | static const unsigned int hscif0_data_mux[] = { | ||
2007 | HRX0_MARK, HTX0_MARK, | ||
2008 | }; | ||
2009 | static const unsigned int hscif0_clk_pins[] = { | ||
2010 | /* SCK */ | ||
2011 | RCAR_GP_PIN(5, 12), | ||
2012 | }; | ||
2013 | static const unsigned int hscif0_clk_mux[] = { | ||
2014 | HSCK0_MARK, | ||
2015 | }; | ||
2016 | static const unsigned int hscif0_ctrl_pins[] = { | ||
2017 | /* RTS, CTS */ | ||
2018 | RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15), | ||
2019 | }; | ||
2020 | static const unsigned int hscif0_ctrl_mux[] = { | ||
2021 | HRTS0_N_MARK, HCTS0_N_MARK, | ||
2022 | }; | ||
2023 | /* - HSCIF1 ----------------------------------------------------------------- */ | ||
2024 | static const unsigned int hscif1_data_a_pins[] = { | ||
2025 | /* RX, TX */ | ||
2026 | RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), | ||
2027 | }; | ||
2028 | static const unsigned int hscif1_data_a_mux[] = { | ||
2029 | HRX1_A_MARK, HTX1_A_MARK, | ||
2030 | }; | ||
2031 | static const unsigned int hscif1_clk_a_pins[] = { | ||
2032 | /* SCK */ | ||
2033 | RCAR_GP_PIN(6, 21), | ||
2034 | }; | ||
2035 | static const unsigned int hscif1_clk_a_mux[] = { | ||
2036 | HSCK1_A_MARK, | ||
2037 | }; | ||
2038 | static const unsigned int hscif1_ctrl_a_pins[] = { | ||
2039 | /* RTS, CTS */ | ||
2040 | RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7), | ||
2041 | }; | ||
2042 | static const unsigned int hscif1_ctrl_a_mux[] = { | ||
2043 | HRTS1_N_A_MARK, HCTS1_N_A_MARK, | ||
2044 | }; | ||
2045 | |||
2046 | static const unsigned int hscif1_data_b_pins[] = { | ||
2047 | /* RX, TX */ | ||
2048 | RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), | ||
2049 | }; | ||
2050 | static const unsigned int hscif1_data_b_mux[] = { | ||
2051 | HRX1_B_MARK, HTX1_B_MARK, | ||
2052 | }; | ||
2053 | static const unsigned int hscif1_clk_b_pins[] = { | ||
2054 | /* SCK */ | ||
2055 | RCAR_GP_PIN(5, 0), | ||
2056 | }; | ||
2057 | static const unsigned int hscif1_clk_b_mux[] = { | ||
2058 | HSCK1_B_MARK, | ||
2059 | }; | ||
2060 | static const unsigned int hscif1_ctrl_b_pins[] = { | ||
2061 | /* RTS, CTS */ | ||
2062 | RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3), | ||
2063 | }; | ||
2064 | static const unsigned int hscif1_ctrl_b_mux[] = { | ||
2065 | HRTS1_N_B_MARK, HCTS1_N_B_MARK, | ||
2066 | }; | ||
2067 | /* - HSCIF2 ----------------------------------------------------------------- */ | ||
2068 | static const unsigned int hscif2_data_a_pins[] = { | ||
2069 | /* RX, TX */ | ||
2070 | RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), | ||
2071 | }; | ||
2072 | static const unsigned int hscif2_data_a_mux[] = { | ||
2073 | HRX2_A_MARK, HTX2_A_MARK, | ||
2074 | }; | ||
2075 | static const unsigned int hscif2_clk_a_pins[] = { | ||
2076 | /* SCK */ | ||
2077 | RCAR_GP_PIN(6, 10), | ||
2078 | }; | ||
2079 | static const unsigned int hscif2_clk_a_mux[] = { | ||
2080 | HSCK2_A_MARK, | ||
2081 | }; | ||
2082 | static const unsigned int hscif2_ctrl_a_pins[] = { | ||
2083 | /* RTS, CTS */ | ||
2084 | RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6), | ||
2085 | }; | ||
2086 | static const unsigned int hscif2_ctrl_a_mux[] = { | ||
2087 | HRTS2_N_A_MARK, HCTS2_N_A_MARK, | ||
2088 | }; | ||
2089 | |||
2090 | static const unsigned int hscif2_data_b_pins[] = { | ||
2091 | /* RX, TX */ | ||
2092 | RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), | ||
2093 | }; | ||
2094 | static const unsigned int hscif2_data_b_mux[] = { | ||
2095 | HRX2_B_MARK, HTX2_B_MARK, | ||
2096 | }; | ||
2097 | static const unsigned int hscif2_clk_b_pins[] = { | ||
2098 | /* SCK */ | ||
2099 | RCAR_GP_PIN(6, 21), | ||
2100 | }; | ||
2101 | static const unsigned int hscif2_clk_b_mux[] = { | ||
2102 | HSCK2_B_MARK, | ||
2103 | }; | ||
2104 | static const unsigned int hscif2_ctrl_b_pins[] = { | ||
2105 | /* RTS, CTS */ | ||
2106 | RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19), | ||
2107 | }; | ||
2108 | static const unsigned int hscif2_ctrl_b_mux[] = { | ||
2109 | HRTS2_N_B_MARK, HCTS2_N_B_MARK, | ||
2110 | }; | ||
2111 | |||
2112 | static const unsigned int hscif2_data_c_pins[] = { | ||
2113 | /* RX, TX */ | ||
2114 | RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26), | ||
2115 | }; | ||
2116 | static const unsigned int hscif2_data_c_mux[] = { | ||
2117 | HRX2_C_MARK, HTX2_C_MARK, | ||
2118 | }; | ||
2119 | static const unsigned int hscif2_clk_c_pins[] = { | ||
2120 | /* SCK */ | ||
2121 | RCAR_GP_PIN(6, 24), | ||
2122 | }; | ||
2123 | static const unsigned int hscif2_clk_c_mux[] = { | ||
2124 | HSCK2_C_MARK, | ||
2125 | }; | ||
2126 | static const unsigned int hscif2_ctrl_c_pins[] = { | ||
2127 | /* RTS, CTS */ | ||
2128 | RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 27), | ||
2129 | }; | ||
2130 | static const unsigned int hscif2_ctrl_c_mux[] = { | ||
2131 | HRTS2_N_C_MARK, HCTS2_N_C_MARK, | ||
2132 | }; | ||
2133 | /* - HSCIF3 ----------------------------------------------------------------- */ | ||
2134 | static const unsigned int hscif3_data_a_pins[] = { | ||
2135 | /* RX, TX */ | ||
2136 | RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), | ||
2137 | }; | ||
2138 | static const unsigned int hscif3_data_a_mux[] = { | ||
2139 | HRX3_A_MARK, HTX3_A_MARK, | ||
2140 | }; | ||
2141 | static const unsigned int hscif3_clk_pins[] = { | ||
2142 | /* SCK */ | ||
2143 | RCAR_GP_PIN(1, 22), | ||
2144 | }; | ||
2145 | static const unsigned int hscif3_clk_mux[] = { | ||
2146 | HSCK3_MARK, | ||
2147 | }; | ||
2148 | static const unsigned int hscif3_ctrl_pins[] = { | ||
2149 | /* RTS, CTS */ | ||
2150 | RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25), | ||
2151 | }; | ||
2152 | static const unsigned int hscif3_ctrl_mux[] = { | ||
2153 | HRTS3_N_MARK, HCTS3_N_MARK, | ||
2154 | }; | ||
2155 | |||
2156 | static const unsigned int hscif3_data_b_pins[] = { | ||
2157 | /* RX, TX */ | ||
2158 | RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), | ||
2159 | }; | ||
2160 | static const unsigned int hscif3_data_b_mux[] = { | ||
2161 | HRX3_B_MARK, HTX3_B_MARK, | ||
2162 | }; | ||
2163 | static const unsigned int hscif3_data_c_pins[] = { | ||
2164 | /* RX, TX */ | ||
2165 | RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), | ||
2166 | }; | ||
2167 | static const unsigned int hscif3_data_c_mux[] = { | ||
2168 | HRX3_C_MARK, HTX3_C_MARK, | ||
2169 | }; | ||
2170 | static const unsigned int hscif3_data_d_pins[] = { | ||
2171 | /* RX, TX */ | ||
2172 | RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), | ||
2173 | }; | ||
2174 | static const unsigned int hscif3_data_d_mux[] = { | ||
2175 | HRX3_D_MARK, HTX3_D_MARK, | ||
2176 | }; | ||
2177 | /* - HSCIF4 ----------------------------------------------------------------- */ | ||
2178 | static const unsigned int hscif4_data_a_pins[] = { | ||
2179 | /* RX, TX */ | ||
2180 | RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), | ||
2181 | }; | ||
2182 | static const unsigned int hscif4_data_a_mux[] = { | ||
2183 | HRX4_A_MARK, HTX4_A_MARK, | ||
2184 | }; | ||
2185 | static const unsigned int hscif4_clk_pins[] = { | ||
2186 | /* SCK */ | ||
2187 | RCAR_GP_PIN(1, 11), | ||
2188 | }; | ||
2189 | static const unsigned int hscif4_clk_mux[] = { | ||
2190 | HSCK4_MARK, | ||
2191 | }; | ||
2192 | static const unsigned int hscif4_ctrl_pins[] = { | ||
2193 | /* RTS, CTS */ | ||
2194 | RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), | ||
2195 | }; | ||
2196 | static const unsigned int hscif4_ctrl_mux[] = { | ||
2197 | HRTS4_N_MARK, HCTS4_N_MARK, | ||
2198 | }; | ||
2199 | |||
2200 | static const unsigned int hscif4_data_b_pins[] = { | ||
2201 | /* RX, TX */ | ||
2202 | RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11), | ||
2203 | }; | ||
2204 | static const unsigned int hscif4_data_b_mux[] = { | ||
2205 | HRX4_B_MARK, HTX4_B_MARK, | ||
2206 | }; | ||
2207 | |||
2001 | /* - I2C -------------------------------------------------------------------- */ | 2208 | /* - I2C -------------------------------------------------------------------- */ |
2002 | static const unsigned int i2c1_a_pins[] = { | 2209 | static const unsigned int i2c1_a_pins[] = { |
2003 | /* SDA, SCL */ | 2210 | /* SDA, SCL */ |
@@ -3224,6 +3431,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { | |||
3224 | SH_PFC_PIN_GROUP(du_oddf), | 3431 | SH_PFC_PIN_GROUP(du_oddf), |
3225 | SH_PFC_PIN_GROUP(du_cde), | 3432 | SH_PFC_PIN_GROUP(du_cde), |
3226 | SH_PFC_PIN_GROUP(du_disp), | 3433 | SH_PFC_PIN_GROUP(du_disp), |
3434 | SH_PFC_PIN_GROUP(hscif0_data), | ||
3435 | SH_PFC_PIN_GROUP(hscif0_clk), | ||
3436 | SH_PFC_PIN_GROUP(hscif0_ctrl), | ||
3437 | SH_PFC_PIN_GROUP(hscif1_data_a), | ||
3438 | SH_PFC_PIN_GROUP(hscif1_clk_a), | ||
3439 | SH_PFC_PIN_GROUP(hscif1_ctrl_a), | ||
3440 | SH_PFC_PIN_GROUP(hscif1_data_b), | ||
3441 | SH_PFC_PIN_GROUP(hscif1_clk_b), | ||
3442 | SH_PFC_PIN_GROUP(hscif1_ctrl_b), | ||
3443 | SH_PFC_PIN_GROUP(hscif2_data_a), | ||
3444 | SH_PFC_PIN_GROUP(hscif2_clk_a), | ||
3445 | SH_PFC_PIN_GROUP(hscif2_ctrl_a), | ||
3446 | SH_PFC_PIN_GROUP(hscif2_data_b), | ||
3447 | SH_PFC_PIN_GROUP(hscif2_clk_b), | ||
3448 | SH_PFC_PIN_GROUP(hscif2_ctrl_b), | ||
3449 | SH_PFC_PIN_GROUP(hscif2_data_c), | ||
3450 | SH_PFC_PIN_GROUP(hscif2_clk_c), | ||
3451 | SH_PFC_PIN_GROUP(hscif2_ctrl_c), | ||
3452 | SH_PFC_PIN_GROUP(hscif3_data_a), | ||
3453 | SH_PFC_PIN_GROUP(hscif3_clk), | ||
3454 | SH_PFC_PIN_GROUP(hscif3_ctrl), | ||
3455 | SH_PFC_PIN_GROUP(hscif3_data_b), | ||
3456 | SH_PFC_PIN_GROUP(hscif3_data_c), | ||
3457 | SH_PFC_PIN_GROUP(hscif3_data_d), | ||
3458 | SH_PFC_PIN_GROUP(hscif4_data_a), | ||
3459 | SH_PFC_PIN_GROUP(hscif4_clk), | ||
3460 | SH_PFC_PIN_GROUP(hscif4_ctrl), | ||
3461 | SH_PFC_PIN_GROUP(hscif4_data_b), | ||
3227 | SH_PFC_PIN_GROUP(i2c1_a), | 3462 | SH_PFC_PIN_GROUP(i2c1_a), |
3228 | SH_PFC_PIN_GROUP(i2c1_b), | 3463 | SH_PFC_PIN_GROUP(i2c1_b), |
3229 | SH_PFC_PIN_GROUP(i2c2_a), | 3464 | SH_PFC_PIN_GROUP(i2c2_a), |
@@ -3474,6 +3709,49 @@ static const char * const du_groups[] = { | |||
3474 | "du_disp", | 3709 | "du_disp", |
3475 | }; | 3710 | }; |
3476 | 3711 | ||
3712 | static const char * const hscif0_groups[] = { | ||
3713 | "hscif0_data", | ||
3714 | "hscif0_clk", | ||
3715 | "hscif0_ctrl", | ||
3716 | }; | ||
3717 | |||
3718 | static const char * const hscif1_groups[] = { | ||
3719 | "hscif1_data_a", | ||
3720 | "hscif1_clk_a", | ||
3721 | "hscif1_ctrl_a", | ||
3722 | "hscif1_data_b", | ||
3723 | "hscif1_clk_b", | ||
3724 | "hscif1_ctrl_b", | ||
3725 | }; | ||
3726 | |||
3727 | static const char * const hscif2_groups[] = { | ||
3728 | "hscif2_data_a", | ||
3729 | "hscif2_clk_a", | ||
3730 | "hscif2_ctrl_a", | ||
3731 | "hscif2_data_b", | ||
3732 | "hscif2_clk_b", | ||
3733 | "hscif2_ctrl_b", | ||
3734 | "hscif2_data_c", | ||
3735 | "hscif2_clk_c", | ||
3736 | "hscif2_ctrl_c", | ||
3737 | }; | ||
3738 | |||
3739 | static const char * const hscif3_groups[] = { | ||
3740 | "hscif3_data_a", | ||
3741 | "hscif3_clk", | ||
3742 | "hscif3_ctrl", | ||
3743 | "hscif3_data_b", | ||
3744 | "hscif3_data_c", | ||
3745 | "hscif3_data_d", | ||
3746 | }; | ||
3747 | |||
3748 | static const char * const hscif4_groups[] = { | ||
3749 | "hscif4_data_a", | ||
3750 | "hscif4_clk", | ||
3751 | "hscif4_ctrl", | ||
3752 | "hscif4_data_b", | ||
3753 | }; | ||
3754 | |||
3477 | static const char * const i2c1_groups[] = { | 3755 | static const char * const i2c1_groups[] = { |
3478 | "i2c1_a", | 3756 | "i2c1_a", |
3479 | "i2c1_b", | 3757 | "i2c1_b", |
@@ -3701,6 +3979,11 @@ static const struct sh_pfc_function pinmux_functions[] = { | |||
3701 | SH_PFC_FUNCTION(drif2), | 3979 | SH_PFC_FUNCTION(drif2), |
3702 | SH_PFC_FUNCTION(drif3), | 3980 | SH_PFC_FUNCTION(drif3), |
3703 | SH_PFC_FUNCTION(du), | 3981 | SH_PFC_FUNCTION(du), |
3982 | SH_PFC_FUNCTION(hscif0), | ||
3983 | SH_PFC_FUNCTION(hscif1), | ||
3984 | SH_PFC_FUNCTION(hscif2), | ||
3985 | SH_PFC_FUNCTION(hscif3), | ||
3986 | SH_PFC_FUNCTION(hscif4), | ||
3704 | SH_PFC_FUNCTION(i2c1), | 3987 | SH_PFC_FUNCTION(i2c1), |
3705 | SH_PFC_FUNCTION(i2c2), | 3988 | SH_PFC_FUNCTION(i2c2), |
3706 | SH_PFC_FUNCTION(i2c6), | 3989 | SH_PFC_FUNCTION(i2c6), |