diff options
author | Yixun Lan <yixun.lan@amlogic.com> | 2018-04-08 10:56:58 -0400 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-05-24 07:32:40 -0400 |
commit | 0e41635b7ad9b91a08a1af045642968a21a6a767 (patch) | |
tree | 8dd905acf6411d0806fe58b26ecccd0cd348162d | |
parent | 48bda43eabb8d086204f543cf8bbad696b8c6391 (diff) |
dt-bindings: interrupt-controller: Fix the double quotes
The double quotes seems not ASCII type, fix it here.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt index a83f9a5734ca..c753d99d43db 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt | |||
@@ -9,11 +9,11 @@ number of interrupt exposed depends on the SoC. | |||
9 | 9 | ||
10 | Required properties: | 10 | Required properties: |
11 | 11 | ||
12 | - compatible : must have "amlogic,meson8-gpio-intc” and either | 12 | - compatible : must have "amlogic,meson8-gpio-intc" and either |
13 | “amlogic,meson8-gpio-intc” for meson8 SoCs (S802) or | 13 | "amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or |
14 | “amlogic,meson8b-gpio-intc” for meson8b SoCs (S805) or | 14 | "amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or |
15 | “amlogic,meson-gxbb-gpio-intc” for GXBB SoCs (S905) or | 15 | "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or |
16 | “amlogic,meson-gxl-gpio-intc” for GXL SoCs (S905X, S912) | 16 | "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912) |
17 | - interrupt-parent : a phandle to the GIC the interrupts are routed to. | 17 | - interrupt-parent : a phandle to the GIC the interrupts are routed to. |
18 | Usually this is provided at the root level of the device tree as it is | 18 | Usually this is provided at the root level of the device tree as it is |
19 | common to most of the SoC. | 19 | common to most of the SoC. |