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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2018-07-25 12:43:41 -0400
committerSimon Horman <horms+renesas@verge.net.au>2018-09-11 09:49:45 -0400
commit0dba24a8e17dc60dba5882b907e923fcf0d3d1e7 (patch)
tree61a45c2d2764d4c2338a4c4401655e382484cafc
parent58e8ed2ee9abe7181d68d5cf067a858a753c77a0 (diff)
arm64: dts: renesas: r8a77980: add Cortex-A53 PMU support
Describe the performance monitor unit (PMU) for the Cortex-A53 cores in the R8A77980 SoC's device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77980.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index d3532fd4c94a..1013da3e2ec4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -98,6 +98,15 @@
98 clock-frequency = <0>; 98 clock-frequency = <0>;
99 }; 99 };
100 100
101 pmu_a53 {
102 compatible = "arm,cortex-a53-pmu";
103 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
104 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
105 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
106 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
107 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
108 };
109
101 psci { 110 psci {
102 compatible = "arm,psci-1.0", "arm,psci-0.2"; 111 compatible = "arm,psci-1.0", "arm,psci-0.2";
103 method = "smc"; 112 method = "smc";