diff options
author | Garlic Tseng <garlic.tseng@mediatek.com> | 2016-06-17 03:43:52 -0400 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2016-06-29 15:11:09 -0400 |
commit | 0d1d7a664288f9c1b6f79c971d528a354315e9d3 (patch) | |
tree | 8a710cd65313403e1ac5fe57314e0eb369b40a56 | |
parent | 0c198ed2ba68b6cc728c5aa3c5486d9e5c328ecd (diff) |
ASoC: mediatek: Refine mt8173 driver and change config option
move mt8173 driver to another folder and add prefix.
add config option SND_SOC_MT8173
Signed-off-by: Garlic Tseng <garlic.tseng@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/mediatek/Kconfig | 14 | ||||
-rw-r--r-- | sound/soc/mediatek/Makefile | 9 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8173/Makefile | 7 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8173/mt8173-afe-common.h | 101 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8173/mt8173-afe-pcm.c (renamed from sound/soc/mediatek/mtk-afe-pcm.c) | 494 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8173/mt8173-max98090.c (renamed from sound/soc/mediatek/mt8173-max98090.c) | 2 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c (renamed from sound/soc/mediatek/mt8173-rt5650-rt5514.c) | 2 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c (renamed from sound/soc/mediatek/mt8173-rt5650-rt5676.c) | 4 | ||||
-rw-r--r-- | sound/soc/mediatek/mt8173/mt8173-rt5650.c (renamed from sound/soc/mediatek/mt8173-rt5650.c) | 2 | ||||
-rw-r--r-- | sound/soc/mediatek/mtk-afe-common.h | 101 |
10 files changed, 367 insertions, 369 deletions
diff --git a/sound/soc/mediatek/Kconfig b/sound/soc/mediatek/Kconfig index 3abf51c07851..ae9f664348ff 100644 --- a/sound/soc/mediatek/Kconfig +++ b/sound/soc/mediatek/Kconfig | |||
@@ -1,15 +1,15 @@ | |||
1 | config SND_SOC_MEDIATEK | 1 | config SND_SOC_MT8173 |
2 | tristate "ASoC support for Mediatek chip" | 2 | tristate "ASoC support for Mediatek MT8173 chip" |
3 | depends on ARCH_MEDIATEK | 3 | depends on ARCH_MEDIATEK |
4 | help | 4 | help |
5 | This adds ASoC platform driver support for Mediatek chip | 5 | This adds ASoC platform driver support for Mediatek MT8173 chip |
6 | that can be used with other codecs. | 6 | that can be used with other codecs. |
7 | Select Y if you have such device. | 7 | Select Y if you have such device. |
8 | Ex: MT8173 | 8 | Ex: MT8173 |
9 | 9 | ||
10 | config SND_SOC_MT8173_MAX98090 | 10 | config SND_SOC_MT8173_MAX98090 |
11 | tristate "ASoC Audio driver for MT8173 with MAX98090 codec" | 11 | tristate "ASoC Audio driver for MT8173 with MAX98090 codec" |
12 | depends on SND_SOC_MEDIATEK && I2C | 12 | depends on SND_SOC_MT8173 && I2C |
13 | select SND_SOC_MAX98090 | 13 | select SND_SOC_MAX98090 |
14 | help | 14 | help |
15 | This adds ASoC driver for Mediatek MT8173 boards | 15 | This adds ASoC driver for Mediatek MT8173 boards |
@@ -19,7 +19,7 @@ config SND_SOC_MT8173_MAX98090 | |||
19 | 19 | ||
20 | config SND_SOC_MT8173_RT5650 | 20 | config SND_SOC_MT8173_RT5650 |
21 | tristate "ASoC Audio driver for MT8173 with RT5650 codec" | 21 | tristate "ASoC Audio driver for MT8173 with RT5650 codec" |
22 | depends on SND_SOC_MEDIATEK && I2C | 22 | depends on SND_SOC_MT8173 && I2C |
23 | select SND_SOC_RT5645 | 23 | select SND_SOC_RT5645 |
24 | help | 24 | help |
25 | This adds ASoC driver for Mediatek MT8173 boards | 25 | This adds ASoC driver for Mediatek MT8173 boards |
@@ -29,7 +29,7 @@ config SND_SOC_MT8173_RT5650 | |||
29 | 29 | ||
30 | config SND_SOC_MT8173_RT5650_RT5514 | 30 | config SND_SOC_MT8173_RT5650_RT5514 |
31 | tristate "ASoC Audio driver for MT8173 with RT5650 RT5514 codecs" | 31 | tristate "ASoC Audio driver for MT8173 with RT5650 RT5514 codecs" |
32 | depends on SND_SOC_MEDIATEK && I2C | 32 | depends on SND_SOC_MT8173 && I2C |
33 | select SND_SOC_RT5645 | 33 | select SND_SOC_RT5645 |
34 | select SND_SOC_RT5514 | 34 | select SND_SOC_RT5514 |
35 | help | 35 | help |
@@ -40,7 +40,7 @@ config SND_SOC_MT8173_RT5650_RT5514 | |||
40 | 40 | ||
41 | config SND_SOC_MT8173_RT5650_RT5676 | 41 | config SND_SOC_MT8173_RT5650_RT5676 |
42 | tristate "ASoC Audio driver for MT8173 with RT5650 RT5676 codecs" | 42 | tristate "ASoC Audio driver for MT8173 with RT5650 RT5676 codecs" |
43 | depends on SND_SOC_MEDIATEK && I2C | 43 | depends on SND_SOC_MT8173 && I2C |
44 | select SND_SOC_RT5645 | 44 | select SND_SOC_RT5645 |
45 | select SND_SOC_RT5677 | 45 | select SND_SOC_RT5677 |
46 | select SND_SOC_HDMI_CODEC | 46 | select SND_SOC_HDMI_CODEC |
diff --git a/sound/soc/mediatek/Makefile b/sound/soc/mediatek/Makefile index d486860c0a88..240dfc70cf05 100644 --- a/sound/soc/mediatek/Makefile +++ b/sound/soc/mediatek/Makefile | |||
@@ -1,7 +1,2 @@ | |||
1 | # MTK Platform Support | 1 | # 8173 Machine support |
2 | obj-$(CONFIG_SND_SOC_MEDIATEK) += mtk-afe-pcm.o | 2 | obj-$(CONFIG_SND_SOC_MT8173) += mt8173/ |
3 | # Machine support | ||
4 | obj-$(CONFIG_SND_SOC_MT8173_MAX98090) += mt8173-max98090.o | ||
5 | obj-$(CONFIG_SND_SOC_MT8173_RT5650) += mt8173-rt5650.o | ||
6 | obj-$(CONFIG_SND_SOC_MT8173_RT5650_RT5514) += mt8173-rt5650-rt5514.o | ||
7 | obj-$(CONFIG_SND_SOC_MT8173_RT5650_RT5676) += mt8173-rt5650-rt5676.o | ||
diff --git a/sound/soc/mediatek/mt8173/Makefile b/sound/soc/mediatek/mt8173/Makefile new file mode 100644 index 000000000000..0357b27d29f2 --- /dev/null +++ b/sound/soc/mediatek/mt8173/Makefile | |||
@@ -0,0 +1,7 @@ | |||
1 | # MTK Platform Support | ||
2 | obj-$(CONFIG_SND_SOC_MT8173) += mt8173-afe-pcm.o | ||
3 | # Machine support | ||
4 | obj-$(CONFIG_SND_SOC_MT8173_MAX98090) += mt8173-max98090.o | ||
5 | obj-$(CONFIG_SND_SOC_MT8173_RT5650) += mt8173-rt5650.o | ||
6 | obj-$(CONFIG_SND_SOC_MT8173_RT5650_RT5514) += mt8173-rt5650-rt5514.o | ||
7 | obj-$(CONFIG_SND_SOC_MT8173_RT5650_RT5676) += mt8173-rt5650-rt5676.o | ||
diff --git a/sound/soc/mediatek/mt8173/mt8173-afe-common.h b/sound/soc/mediatek/mt8173/mt8173-afe-common.h new file mode 100644 index 000000000000..8f2936d62faf --- /dev/null +++ b/sound/soc/mediatek/mt8173/mt8173-afe-common.h | |||
@@ -0,0 +1,101 @@ | |||
1 | /* | ||
2 | * mt8173_afe_common.h -- Mediatek 8173 audio driver common definitions | ||
3 | * | ||
4 | * Copyright (c) 2015 MediaTek Inc. | ||
5 | * Author: Koro Chen <koro.chen@mediatek.com> | ||
6 | * Sascha Hauer <s.hauer@pengutronix.de> | ||
7 | * Hidalgo Huang <hidalgo.huang@mediatek.com> | ||
8 | * Ir Lian <ir.lian@mediatek.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 and | ||
12 | * only version 2 as published by the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | */ | ||
19 | |||
20 | #ifndef _MT8173_AFE_COMMON_H_ | ||
21 | #define _MT8173_AFE_COMMON_H_ | ||
22 | |||
23 | #include <linux/clk.h> | ||
24 | #include <linux/regmap.h> | ||
25 | |||
26 | enum { | ||
27 | MT8173_AFE_MEMIF_DL1, | ||
28 | MT8173_AFE_MEMIF_DL2, | ||
29 | MT8173_AFE_MEMIF_VUL, | ||
30 | MT8173_AFE_MEMIF_DAI, | ||
31 | MT8173_AFE_MEMIF_AWB, | ||
32 | MT8173_AFE_MEMIF_MOD_DAI, | ||
33 | MT8173_AFE_MEMIF_HDMI, | ||
34 | MT8173_AFE_MEMIF_NUM, | ||
35 | MT8173_AFE_IO_MOD_PCM1 = MT8173_AFE_MEMIF_NUM, | ||
36 | MT8173_AFE_IO_MOD_PCM2, | ||
37 | MT8173_AFE_IO_PMIC, | ||
38 | MT8173_AFE_IO_I2S, | ||
39 | MT8173_AFE_IO_2ND_I2S, | ||
40 | MT8173_AFE_IO_HW_GAIN1, | ||
41 | MT8173_AFE_IO_HW_GAIN2, | ||
42 | MT8173_AFE_IO_MRG_O, | ||
43 | MT8173_AFE_IO_MRG_I, | ||
44 | MT8173_AFE_IO_DAIBT, | ||
45 | MT8173_AFE_IO_HDMI, | ||
46 | }; | ||
47 | |||
48 | enum { | ||
49 | MT8173_AFE_IRQ_1, | ||
50 | MT8173_AFE_IRQ_2, | ||
51 | MT8173_AFE_IRQ_3, | ||
52 | MT8173_AFE_IRQ_4, | ||
53 | MT8173_AFE_IRQ_5, | ||
54 | MT8173_AFE_IRQ_6, | ||
55 | MT8173_AFE_IRQ_7, | ||
56 | MT8173_AFE_IRQ_8, | ||
57 | MT8173_AFE_IRQ_NUM, | ||
58 | }; | ||
59 | |||
60 | enum { | ||
61 | MT8173_CLK_INFRASYS_AUD, | ||
62 | MT8173_CLK_TOP_PDN_AUD, | ||
63 | MT8173_CLK_TOP_PDN_AUD_BUS, | ||
64 | MT8173_CLK_I2S0_M, | ||
65 | MT8173_CLK_I2S1_M, | ||
66 | MT8173_CLK_I2S2_M, | ||
67 | MT8173_CLK_I2S3_M, | ||
68 | MT8173_CLK_I2S3_B, | ||
69 | MT8173_CLK_BCK0, | ||
70 | MT8173_CLK_BCK1, | ||
71 | MT8173_CLK_NUM | ||
72 | }; | ||
73 | |||
74 | struct mt8173_afe; | ||
75 | struct snd_pcm_substream; | ||
76 | |||
77 | struct mt8173_afe_memif_data { | ||
78 | int id; | ||
79 | const char *name; | ||
80 | int reg_ofs_base; | ||
81 | int reg_ofs_cur; | ||
82 | int fs_shift; | ||
83 | int mono_shift; | ||
84 | int enable_shift; | ||
85 | int irq_reg_cnt; | ||
86 | int irq_cnt_shift; | ||
87 | int irq_en_shift; | ||
88 | int irq_fs_shift; | ||
89 | int irq_clr_shift; | ||
90 | int msb_shift; | ||
91 | }; | ||
92 | |||
93 | struct mt8173_afe_memif { | ||
94 | unsigned int phys_buf_addr; | ||
95 | int buffer_size; | ||
96 | struct snd_pcm_substream *substream; | ||
97 | const struct mt8173_afe_memif_data *data; | ||
98 | const struct mt8173_afe_irq_data *irqdata; | ||
99 | }; | ||
100 | |||
101 | #endif | ||
diff --git a/sound/soc/mediatek/mtk-afe-pcm.c b/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c index 793d7e296d4a..4fc52bc84547 100644 --- a/sound/soc/mediatek/mtk-afe-pcm.c +++ b/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Mediatek ALSA SoC AFE platform driver | 2 | * Mediatek 8173 ALSA SoC AFE platform driver |
3 | * | 3 | * |
4 | * Copyright (c) 2015 MediaTek Inc. | 4 | * Copyright (c) 2015 MediaTek Inc. |
5 | * Author: Koro Chen <koro.chen@mediatek.com> | 5 | * Author: Koro Chen <koro.chen@mediatek.com> |
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/dma-mapping.h> | 24 | #include <linux/dma-mapping.h> |
25 | #include <linux/pm_runtime.h> | 25 | #include <linux/pm_runtime.h> |
26 | #include <sound/soc.h> | 26 | #include <sound/soc.h> |
27 | #include "mtk-afe-common.h" | 27 | #include "mt8173-afe-common.h" |
28 | 28 | ||
29 | /***************************************************************************** | 29 | /***************************************************************************** |
30 | * R E G I S T E R D E F I N I T I O N | 30 | * R E G I S T E R D E F I N I T I O N |
@@ -135,7 +135,7 @@ enum afe_tdm_ch_start { | |||
135 | AFE_TDM_CH_ZERO, | 135 | AFE_TDM_CH_ZERO, |
136 | }; | 136 | }; |
137 | 137 | ||
138 | static const unsigned int mtk_afe_backup_list[] = { | 138 | static const unsigned int mt8173_afe_backup_list[] = { |
139 | AUDIO_TOP_CON0, | 139 | AUDIO_TOP_CON0, |
140 | AFE_CONN1, | 140 | AFE_CONN1, |
141 | AFE_CONN2, | 141 | AFE_CONN2, |
@@ -152,18 +152,18 @@ static const unsigned int mtk_afe_backup_list[] = { | |||
152 | AFE_DAC_CON0, | 152 | AFE_DAC_CON0, |
153 | }; | 153 | }; |
154 | 154 | ||
155 | struct mtk_afe { | 155 | struct mt8173_afe { |
156 | /* address for ioremap audio hardware register */ | 156 | /* address for ioremap audio hardware register */ |
157 | void __iomem *base_addr; | 157 | void __iomem *base_addr; |
158 | struct device *dev; | 158 | struct device *dev; |
159 | struct regmap *regmap; | 159 | struct regmap *regmap; |
160 | struct mtk_afe_memif memif[MTK_AFE_MEMIF_NUM]; | 160 | struct mt8173_afe_memif memif[MT8173_AFE_MEMIF_NUM]; |
161 | struct clk *clocks[MTK_CLK_NUM]; | 161 | struct clk *clocks[MT8173_CLK_NUM]; |
162 | unsigned int backup_regs[ARRAY_SIZE(mtk_afe_backup_list)]; | 162 | unsigned int backup_regs[ARRAY_SIZE(mt8173_afe_backup_list)]; |
163 | bool suspended; | 163 | bool suspended; |
164 | }; | 164 | }; |
165 | 165 | ||
166 | static const struct snd_pcm_hardware mtk_afe_hardware = { | 166 | static const struct snd_pcm_hardware mt8173_afe_hardware = { |
167 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | 167 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
168 | SNDRV_PCM_INFO_MMAP_VALID), | 168 | SNDRV_PCM_INFO_MMAP_VALID), |
169 | .buffer_bytes_max = 256 * 1024, | 169 | .buffer_bytes_max = 256 * 1024, |
@@ -174,12 +174,12 @@ static const struct snd_pcm_hardware mtk_afe_hardware = { | |||
174 | .fifo_size = 0, | 174 | .fifo_size = 0, |
175 | }; | 175 | }; |
176 | 176 | ||
177 | static snd_pcm_uframes_t mtk_afe_pcm_pointer | 177 | static snd_pcm_uframes_t mt8173_afe_pcm_pointer |
178 | (struct snd_pcm_substream *substream) | 178 | (struct snd_pcm_substream *substream) |
179 | { | 179 | { |
180 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 180 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
181 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 181 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
182 | struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; | 182 | struct mt8173_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; |
183 | unsigned int hw_ptr; | 183 | unsigned int hw_ptr; |
184 | int ret; | 184 | int ret; |
185 | 185 | ||
@@ -193,40 +193,40 @@ static snd_pcm_uframes_t mtk_afe_pcm_pointer | |||
193 | hw_ptr - memif->phys_buf_addr); | 193 | hw_ptr - memif->phys_buf_addr); |
194 | } | 194 | } |
195 | 195 | ||
196 | static const struct snd_pcm_ops mtk_afe_pcm_ops = { | 196 | static const struct snd_pcm_ops mt8173_afe_pcm_ops = { |
197 | .ioctl = snd_pcm_lib_ioctl, | 197 | .ioctl = snd_pcm_lib_ioctl, |
198 | .pointer = mtk_afe_pcm_pointer, | 198 | .pointer = mt8173_afe_pcm_pointer, |
199 | }; | 199 | }; |
200 | 200 | ||
201 | static int mtk_afe_pcm_new(struct snd_soc_pcm_runtime *rtd) | 201 | static int mt8173_afe_pcm_new(struct snd_soc_pcm_runtime *rtd) |
202 | { | 202 | { |
203 | size_t size; | 203 | size_t size; |
204 | struct snd_card *card = rtd->card->snd_card; | 204 | struct snd_card *card = rtd->card->snd_card; |
205 | struct snd_pcm *pcm = rtd->pcm; | 205 | struct snd_pcm *pcm = rtd->pcm; |
206 | 206 | ||
207 | size = mtk_afe_hardware.buffer_bytes_max; | 207 | size = mt8173_afe_hardware.buffer_bytes_max; |
208 | 208 | ||
209 | return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | 209 | return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
210 | card->dev, size, size); | 210 | card->dev, size, size); |
211 | } | 211 | } |
212 | 212 | ||
213 | static void mtk_afe_pcm_free(struct snd_pcm *pcm) | 213 | static void mt8173_afe_pcm_free(struct snd_pcm *pcm) |
214 | { | 214 | { |
215 | snd_pcm_lib_preallocate_free_for_all(pcm); | 215 | snd_pcm_lib_preallocate_free_for_all(pcm); |
216 | } | 216 | } |
217 | 217 | ||
218 | static const struct snd_soc_platform_driver mtk_afe_pcm_platform = { | 218 | static const struct snd_soc_platform_driver mt8173_afe_pcm_platform = { |
219 | .ops = &mtk_afe_pcm_ops, | 219 | .ops = &mt8173_afe_pcm_ops, |
220 | .pcm_new = mtk_afe_pcm_new, | 220 | .pcm_new = mt8173_afe_pcm_new, |
221 | .pcm_free = mtk_afe_pcm_free, | 221 | .pcm_free = mt8173_afe_pcm_free, |
222 | }; | 222 | }; |
223 | 223 | ||
224 | struct mtk_afe_rate { | 224 | struct mt8173_afe_rate { |
225 | unsigned int rate; | 225 | unsigned int rate; |
226 | unsigned int regvalue; | 226 | unsigned int regvalue; |
227 | }; | 227 | }; |
228 | 228 | ||
229 | static const struct mtk_afe_rate mtk_afe_i2s_rates[] = { | 229 | static const struct mt8173_afe_rate mt8173_afe_i2s_rates[] = { |
230 | { .rate = 8000, .regvalue = 0 }, | 230 | { .rate = 8000, .regvalue = 0 }, |
231 | { .rate = 11025, .regvalue = 1 }, | 231 | { .rate = 11025, .regvalue = 1 }, |
232 | { .rate = 12000, .regvalue = 2 }, | 232 | { .rate = 12000, .regvalue = 2 }, |
@@ -242,21 +242,21 @@ static const struct mtk_afe_rate mtk_afe_i2s_rates[] = { | |||
242 | { .rate = 192000, .regvalue = 14 }, | 242 | { .rate = 192000, .regvalue = 14 }, |
243 | }; | 243 | }; |
244 | 244 | ||
245 | static int mtk_afe_i2s_fs(unsigned int sample_rate) | 245 | static int mt8173_afe_i2s_fs(unsigned int sample_rate) |
246 | { | 246 | { |
247 | int i; | 247 | int i; |
248 | 248 | ||
249 | for (i = 0; i < ARRAY_SIZE(mtk_afe_i2s_rates); i++) | 249 | for (i = 0; i < ARRAY_SIZE(mt8173_afe_i2s_rates); i++) |
250 | if (mtk_afe_i2s_rates[i].rate == sample_rate) | 250 | if (mt8173_afe_i2s_rates[i].rate == sample_rate) |
251 | return mtk_afe_i2s_rates[i].regvalue; | 251 | return mt8173_afe_i2s_rates[i].regvalue; |
252 | 252 | ||
253 | return -EINVAL; | 253 | return -EINVAL; |
254 | } | 254 | } |
255 | 255 | ||
256 | static int mtk_afe_set_i2s(struct mtk_afe *afe, unsigned int rate) | 256 | static int mt8173_afe_set_i2s(struct mt8173_afe *afe, unsigned int rate) |
257 | { | 257 | { |
258 | unsigned int val; | 258 | unsigned int val; |
259 | int fs = mtk_afe_i2s_fs(rate); | 259 | int fs = mt8173_afe_i2s_fs(rate); |
260 | 260 | ||
261 | if (fs < 0) | 261 | if (fs < 0) |
262 | return -EINVAL; | 262 | return -EINVAL; |
@@ -281,7 +281,7 @@ static int mtk_afe_set_i2s(struct mtk_afe *afe, unsigned int rate) | |||
281 | return 0; | 281 | return 0; |
282 | } | 282 | } |
283 | 283 | ||
284 | static void mtk_afe_set_i2s_enable(struct mtk_afe *afe, bool enable) | 284 | static void mt8173_afe_set_i2s_enable(struct mt8173_afe *afe, bool enable) |
285 | { | 285 | { |
286 | unsigned int val; | 286 | unsigned int val; |
287 | 287 | ||
@@ -296,8 +296,8 @@ static void mtk_afe_set_i2s_enable(struct mtk_afe *afe, bool enable) | |||
296 | regmap_update_bits(afe->regmap, AFE_I2S_CON1, 0x1, enable); | 296 | regmap_update_bits(afe->regmap, AFE_I2S_CON1, 0x1, enable); |
297 | } | 297 | } |
298 | 298 | ||
299 | static int mtk_afe_dais_enable_clks(struct mtk_afe *afe, | 299 | static int mt8173_afe_dais_enable_clks(struct mt8173_afe *afe, |
300 | struct clk *m_ck, struct clk *b_ck) | 300 | struct clk *m_ck, struct clk *b_ck) |
301 | { | 301 | { |
302 | int ret; | 302 | int ret; |
303 | 303 | ||
@@ -319,9 +319,9 @@ static int mtk_afe_dais_enable_clks(struct mtk_afe *afe, | |||
319 | return 0; | 319 | return 0; |
320 | } | 320 | } |
321 | 321 | ||
322 | static int mtk_afe_dais_set_clks(struct mtk_afe *afe, | 322 | static int mt8173_afe_dais_set_clks(struct mt8173_afe *afe, |
323 | struct clk *m_ck, unsigned int mck_rate, | 323 | struct clk *m_ck, unsigned int mck_rate, |
324 | struct clk *b_ck, unsigned int bck_rate) | 324 | struct clk *b_ck, unsigned int bck_rate) |
325 | { | 325 | { |
326 | int ret; | 326 | int ret; |
327 | 327 | ||
@@ -343,8 +343,8 @@ static int mtk_afe_dais_set_clks(struct mtk_afe *afe, | |||
343 | return 0; | 343 | return 0; |
344 | } | 344 | } |
345 | 345 | ||
346 | static void mtk_afe_dais_disable_clks(struct mtk_afe *afe, | 346 | static void mt8173_afe_dais_disable_clks(struct mt8173_afe *afe, |
347 | struct clk *m_ck, struct clk *b_ck) | 347 | struct clk *m_ck, struct clk *b_ck) |
348 | { | 348 | { |
349 | if (m_ck) | 349 | if (m_ck) |
350 | clk_disable_unprepare(m_ck); | 350 | clk_disable_unprepare(m_ck); |
@@ -352,11 +352,11 @@ static void mtk_afe_dais_disable_clks(struct mtk_afe *afe, | |||
352 | clk_disable_unprepare(b_ck); | 352 | clk_disable_unprepare(b_ck); |
353 | } | 353 | } |
354 | 354 | ||
355 | static int mtk_afe_i2s_startup(struct snd_pcm_substream *substream, | 355 | static int mt8173_afe_i2s_startup(struct snd_pcm_substream *substream, |
356 | struct snd_soc_dai *dai) | 356 | struct snd_soc_dai *dai) |
357 | { | 357 | { |
358 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 358 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
359 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 359 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
360 | 360 | ||
361 | if (dai->active) | 361 | if (dai->active) |
362 | return 0; | 362 | return 0; |
@@ -366,84 +366,82 @@ static int mtk_afe_i2s_startup(struct snd_pcm_substream *substream, | |||
366 | return 0; | 366 | return 0; |
367 | } | 367 | } |
368 | 368 | ||
369 | static void mtk_afe_i2s_shutdown(struct snd_pcm_substream *substream, | 369 | static void mt8173_afe_i2s_shutdown(struct snd_pcm_substream *substream, |
370 | struct snd_soc_dai *dai) | 370 | struct snd_soc_dai *dai) |
371 | { | 371 | { |
372 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 372 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
373 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 373 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
374 | 374 | ||
375 | if (dai->active) | 375 | if (dai->active) |
376 | return; | 376 | return; |
377 | 377 | ||
378 | mtk_afe_set_i2s_enable(afe, false); | 378 | mt8173_afe_set_i2s_enable(afe, false); |
379 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, | 379 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, |
380 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, | 380 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, |
381 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M); | 381 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M); |
382 | } | 382 | } |
383 | 383 | ||
384 | static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream, | 384 | static int mt8173_afe_i2s_prepare(struct snd_pcm_substream *substream, |
385 | struct snd_soc_dai *dai) | 385 | struct snd_soc_dai *dai) |
386 | { | 386 | { |
387 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 387 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
388 | struct snd_pcm_runtime * const runtime = substream->runtime; | 388 | struct snd_pcm_runtime * const runtime = substream->runtime; |
389 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 389 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
390 | int ret; | 390 | int ret; |
391 | 391 | ||
392 | mtk_afe_dais_set_clks(afe, | 392 | mt8173_afe_dais_set_clks(afe, afe->clocks[MT8173_CLK_I2S1_M], |
393 | afe->clocks[MTK_CLK_I2S1_M], runtime->rate * 256, | 393 | runtime->rate * 256, NULL, 0); |
394 | NULL, 0); | 394 | mt8173_afe_dais_set_clks(afe, afe->clocks[MT8173_CLK_I2S2_M], |
395 | mtk_afe_dais_set_clks(afe, | 395 | runtime->rate * 256, NULL, 0); |
396 | afe->clocks[MTK_CLK_I2S2_M], runtime->rate * 256, | ||
397 | NULL, 0); | ||
398 | /* config I2S */ | 396 | /* config I2S */ |
399 | ret = mtk_afe_set_i2s(afe, substream->runtime->rate); | 397 | ret = mt8173_afe_set_i2s(afe, substream->runtime->rate); |
400 | if (ret) | 398 | if (ret) |
401 | return ret; | 399 | return ret; |
402 | 400 | ||
403 | mtk_afe_set_i2s_enable(afe, true); | 401 | mt8173_afe_set_i2s_enable(afe, true); |
404 | 402 | ||
405 | return 0; | 403 | return 0; |
406 | } | 404 | } |
407 | 405 | ||
408 | static int mtk_afe_hdmi_startup(struct snd_pcm_substream *substream, | 406 | static int mt8173_afe_hdmi_startup(struct snd_pcm_substream *substream, |
409 | struct snd_soc_dai *dai) | 407 | struct snd_soc_dai *dai) |
410 | { | 408 | { |
411 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 409 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
412 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 410 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
413 | 411 | ||
414 | if (dai->active) | 412 | if (dai->active) |
415 | return 0; | 413 | return 0; |
416 | 414 | ||
417 | mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S3_M], | 415 | mt8173_afe_dais_enable_clks(afe, afe->clocks[MT8173_CLK_I2S3_M], |
418 | afe->clocks[MTK_CLK_I2S3_B]); | 416 | afe->clocks[MT8173_CLK_I2S3_B]); |
419 | return 0; | 417 | return 0; |
420 | } | 418 | } |
421 | 419 | ||
422 | static void mtk_afe_hdmi_shutdown(struct snd_pcm_substream *substream, | 420 | static void mt8173_afe_hdmi_shutdown(struct snd_pcm_substream *substream, |
423 | struct snd_soc_dai *dai) | 421 | struct snd_soc_dai *dai) |
424 | { | 422 | { |
425 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 423 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
426 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 424 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
427 | 425 | ||
428 | if (dai->active) | 426 | if (dai->active) |
429 | return; | 427 | return; |
430 | 428 | ||
431 | mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S3_M], | 429 | mt8173_afe_dais_disable_clks(afe, afe->clocks[MT8173_CLK_I2S3_M], |
432 | afe->clocks[MTK_CLK_I2S3_B]); | 430 | afe->clocks[MT8173_CLK_I2S3_B]); |
433 | } | 431 | } |
434 | 432 | ||
435 | static int mtk_afe_hdmi_prepare(struct snd_pcm_substream *substream, | 433 | static int mt8173_afe_hdmi_prepare(struct snd_pcm_substream *substream, |
436 | struct snd_soc_dai *dai) | 434 | struct snd_soc_dai *dai) |
437 | { | 435 | { |
438 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 436 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
439 | struct snd_pcm_runtime * const runtime = substream->runtime; | 437 | struct snd_pcm_runtime * const runtime = substream->runtime; |
440 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 438 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
441 | unsigned int val; | 439 | unsigned int val; |
442 | 440 | ||
443 | mtk_afe_dais_set_clks(afe, | 441 | mt8173_afe_dais_set_clks(afe, afe->clocks[MT8173_CLK_I2S3_M], |
444 | afe->clocks[MTK_CLK_I2S3_M], runtime->rate * 128, | 442 | runtime->rate * 128, |
445 | afe->clocks[MTK_CLK_I2S3_B], | 443 | afe->clocks[MT8173_CLK_I2S3_B], |
446 | runtime->rate * runtime->channels * 32); | 444 | runtime->rate * runtime->channels * 32); |
447 | 445 | ||
448 | val = AFE_TDM_CON1_BCK_INV | | 446 | val = AFE_TDM_CON1_BCK_INV | |
449 | AFE_TDM_CON1_LRCK_INV | | 447 | AFE_TDM_CON1_LRCK_INV | |
@@ -494,11 +492,11 @@ static int mtk_afe_hdmi_prepare(struct snd_pcm_substream *substream, | |||
494 | return 0; | 492 | return 0; |
495 | } | 493 | } |
496 | 494 | ||
497 | static int mtk_afe_hdmi_trigger(struct snd_pcm_substream *substream, int cmd, | 495 | static int mt8173_afe_hdmi_trigger(struct snd_pcm_substream *substream, int cmd, |
498 | struct snd_soc_dai *dai) | 496 | struct snd_soc_dai *dai) |
499 | { | 497 | { |
500 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 498 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
501 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 499 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
502 | 500 | ||
503 | dev_info(afe->dev, "%s cmd=%d %s\n", __func__, cmd, dai->name); | 501 | dev_info(afe->dev, "%s cmd=%d %s\n", __func__, cmd, dai->name); |
504 | 502 | ||
@@ -540,18 +538,18 @@ static int mtk_afe_hdmi_trigger(struct snd_pcm_substream *substream, int cmd, | |||
540 | } | 538 | } |
541 | } | 539 | } |
542 | 540 | ||
543 | static int mtk_afe_dais_startup(struct snd_pcm_substream *substream, | 541 | static int mt8173_afe_dais_startup(struct snd_pcm_substream *substream, |
544 | struct snd_soc_dai *dai) | 542 | struct snd_soc_dai *dai) |
545 | { | 543 | { |
546 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 544 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
547 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 545 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
548 | struct snd_pcm_runtime *runtime = substream->runtime; | 546 | struct snd_pcm_runtime *runtime = substream->runtime; |
549 | struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; | 547 | struct mt8173_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; |
550 | int ret; | 548 | int ret; |
551 | 549 | ||
552 | memif->substream = substream; | 550 | memif->substream = substream; |
553 | 551 | ||
554 | snd_soc_set_runtime_hwparams(substream, &mtk_afe_hardware); | 552 | snd_soc_set_runtime_hwparams(substream, &mt8173_afe_hardware); |
555 | 553 | ||
556 | /* | 554 | /* |
557 | * Capture cannot use ping-pong buffer since hw_ptr at IRQ may be | 555 | * Capture cannot use ping-pong buffer since hw_ptr at IRQ may be |
@@ -563,7 +561,7 @@ static int mtk_afe_dais_startup(struct snd_pcm_substream *substream, | |||
563 | ret = snd_pcm_hw_constraint_minmax(runtime, | 561 | ret = snd_pcm_hw_constraint_minmax(runtime, |
564 | SNDRV_PCM_HW_PARAM_PERIODS, | 562 | SNDRV_PCM_HW_PARAM_PERIODS, |
565 | 3, | 563 | 3, |
566 | mtk_afe_hardware.periods_max); | 564 | mt8173_afe_hardware.periods_max); |
567 | if (ret < 0) { | 565 | if (ret < 0) { |
568 | dev_err(afe->dev, "hw_constraint_minmax failed\n"); | 566 | dev_err(afe->dev, "hw_constraint_minmax failed\n"); |
569 | return ret; | 567 | return ret; |
@@ -576,23 +574,23 @@ static int mtk_afe_dais_startup(struct snd_pcm_substream *substream, | |||
576 | return ret; | 574 | return ret; |
577 | } | 575 | } |
578 | 576 | ||
579 | static void mtk_afe_dais_shutdown(struct snd_pcm_substream *substream, | 577 | static void mt8173_afe_dais_shutdown(struct snd_pcm_substream *substream, |
580 | struct snd_soc_dai *dai) | 578 | struct snd_soc_dai *dai) |
581 | { | 579 | { |
582 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 580 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
583 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 581 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
584 | struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; | 582 | struct mt8173_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; |
585 | 583 | ||
586 | memif->substream = NULL; | 584 | memif->substream = NULL; |
587 | } | 585 | } |
588 | 586 | ||
589 | static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | 587 | static int mt8173_afe_dais_hw_params(struct snd_pcm_substream *substream, |
590 | struct snd_pcm_hw_params *params, | 588 | struct snd_pcm_hw_params *params, |
591 | struct snd_soc_dai *dai) | 589 | struct snd_soc_dai *dai) |
592 | { | 590 | { |
593 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 591 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
594 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 592 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
595 | struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; | 593 | struct mt8173_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; |
596 | int msb_at_bit33 = 0; | 594 | int msb_at_bit33 = 0; |
597 | int ret; | 595 | int ret; |
598 | 596 | ||
@@ -634,8 +632,8 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | |||
634 | /* set rate */ | 632 | /* set rate */ |
635 | if (memif->data->fs_shift < 0) | 633 | if (memif->data->fs_shift < 0) |
636 | return 0; | 634 | return 0; |
637 | if (memif->data->id == MTK_AFE_MEMIF_DAI || | 635 | if (memif->data->id == MT8173_AFE_MEMIF_DAI || |
638 | memif->data->id == MTK_AFE_MEMIF_MOD_DAI) { | 636 | memif->data->id == MT8173_AFE_MEMIF_MOD_DAI) { |
639 | unsigned int val; | 637 | unsigned int val; |
640 | 638 | ||
641 | switch (params_rate(params)) { | 639 | switch (params_rate(params)) { |
@@ -652,7 +650,7 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | |||
652 | return -EINVAL; | 650 | return -EINVAL; |
653 | } | 651 | } |
654 | 652 | ||
655 | if (memif->data->id == MTK_AFE_MEMIF_DAI) | 653 | if (memif->data->id == MT8173_AFE_MEMIF_DAI) |
656 | regmap_update_bits(afe->regmap, AFE_DAC_CON0, | 654 | regmap_update_bits(afe->regmap, AFE_DAC_CON0, |
657 | 0x3 << memif->data->fs_shift, | 655 | 0x3 << memif->data->fs_shift, |
658 | val << memif->data->fs_shift); | 656 | val << memif->data->fs_shift); |
@@ -662,7 +660,7 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | |||
662 | val << memif->data->fs_shift); | 660 | val << memif->data->fs_shift); |
663 | 661 | ||
664 | } else { | 662 | } else { |
665 | int fs = mtk_afe_i2s_fs(params_rate(params)); | 663 | int fs = mt8173_afe_i2s_fs(params_rate(params)); |
666 | 664 | ||
667 | if (fs < 0) | 665 | if (fs < 0) |
668 | return -EINVAL; | 666 | return -EINVAL; |
@@ -675,19 +673,19 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | |||
675 | return 0; | 673 | return 0; |
676 | } | 674 | } |
677 | 675 | ||
678 | static int mtk_afe_dais_hw_free(struct snd_pcm_substream *substream, | 676 | static int mt8173_afe_dais_hw_free(struct snd_pcm_substream *substream, |
679 | struct snd_soc_dai *dai) | 677 | struct snd_soc_dai *dai) |
680 | { | 678 | { |
681 | return snd_pcm_lib_free_pages(substream); | 679 | return snd_pcm_lib_free_pages(substream); |
682 | } | 680 | } |
683 | 681 | ||
684 | static int mtk_afe_dais_trigger(struct snd_pcm_substream *substream, int cmd, | 682 | static int mt8173_afe_dais_trigger(struct snd_pcm_substream *substream, int cmd, |
685 | struct snd_soc_dai *dai) | 683 | struct snd_soc_dai *dai) |
686 | { | 684 | { |
687 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 685 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
688 | struct snd_pcm_runtime * const runtime = substream->runtime; | 686 | struct snd_pcm_runtime * const runtime = substream->runtime; |
689 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 687 | struct mt8173_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
690 | struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; | 688 | struct mt8173_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; |
691 | unsigned int counter = runtime->period_size; | 689 | unsigned int counter = runtime->period_size; |
692 | 690 | ||
693 | dev_info(afe->dev, "%s %s cmd=%d\n", __func__, memif->data->name, cmd); | 691 | dev_info(afe->dev, "%s %s cmd=%d\n", __func__, memif->data->name, cmd); |
@@ -708,7 +706,7 @@ static int mtk_afe_dais_trigger(struct snd_pcm_substream *substream, int cmd, | |||
708 | 706 | ||
709 | /* set irq fs */ | 707 | /* set irq fs */ |
710 | if (memif->data->irq_fs_shift >= 0) { | 708 | if (memif->data->irq_fs_shift >= 0) { |
711 | int fs = mtk_afe_i2s_fs(runtime->rate); | 709 | int fs = mt8173_afe_i2s_fs(runtime->rate); |
712 | 710 | ||
713 | if (fs < 0) | 711 | if (fs < 0) |
714 | return -EINVAL; | 712 | return -EINVAL; |
@@ -743,76 +741,76 @@ static int mtk_afe_dais_trigger(struct snd_pcm_substream *substream, int cmd, | |||
743 | } | 741 | } |
744 | 742 | ||
745 | /* FE DAIs */ | 743 | /* FE DAIs */ |
746 | static const struct snd_soc_dai_ops mtk_afe_dai_ops = { | 744 | static const struct snd_soc_dai_ops mt8173_afe_dai_ops = { |
747 | .startup = mtk_afe_dais_startup, | 745 | .startup = mt8173_afe_dais_startup, |
748 | .shutdown = mtk_afe_dais_shutdown, | 746 | .shutdown = mt8173_afe_dais_shutdown, |
749 | .hw_params = mtk_afe_dais_hw_params, | 747 | .hw_params = mt8173_afe_dais_hw_params, |
750 | .hw_free = mtk_afe_dais_hw_free, | 748 | .hw_free = mt8173_afe_dais_hw_free, |
751 | .trigger = mtk_afe_dais_trigger, | 749 | .trigger = mt8173_afe_dais_trigger, |
752 | }; | 750 | }; |
753 | 751 | ||
754 | /* BE DAIs */ | 752 | /* BE DAIs */ |
755 | static const struct snd_soc_dai_ops mtk_afe_i2s_ops = { | 753 | static const struct snd_soc_dai_ops mt8173_afe_i2s_ops = { |
756 | .startup = mtk_afe_i2s_startup, | 754 | .startup = mt8173_afe_i2s_startup, |
757 | .shutdown = mtk_afe_i2s_shutdown, | 755 | .shutdown = mt8173_afe_i2s_shutdown, |
758 | .prepare = mtk_afe_i2s_prepare, | 756 | .prepare = mt8173_afe_i2s_prepare, |
759 | }; | 757 | }; |
760 | 758 | ||
761 | static const struct snd_soc_dai_ops mtk_afe_hdmi_ops = { | 759 | static const struct snd_soc_dai_ops mt8173_afe_hdmi_ops = { |
762 | .startup = mtk_afe_hdmi_startup, | 760 | .startup = mt8173_afe_hdmi_startup, |
763 | .shutdown = mtk_afe_hdmi_shutdown, | 761 | .shutdown = mt8173_afe_hdmi_shutdown, |
764 | .prepare = mtk_afe_hdmi_prepare, | 762 | .prepare = mt8173_afe_hdmi_prepare, |
765 | .trigger = mtk_afe_hdmi_trigger, | 763 | .trigger = mt8173_afe_hdmi_trigger, |
766 | 764 | ||
767 | }; | 765 | }; |
768 | 766 | ||
769 | static int mtk_afe_runtime_suspend(struct device *dev); | 767 | static int mt8173_afe_runtime_suspend(struct device *dev); |
770 | static int mtk_afe_runtime_resume(struct device *dev); | 768 | static int mt8173_afe_runtime_resume(struct device *dev); |
771 | 769 | ||
772 | static int mtk_afe_dai_suspend(struct snd_soc_dai *dai) | 770 | static int mt8173_afe_dai_suspend(struct snd_soc_dai *dai) |
773 | { | 771 | { |
774 | struct mtk_afe *afe = snd_soc_dai_get_drvdata(dai); | 772 | struct mt8173_afe *afe = snd_soc_dai_get_drvdata(dai); |
775 | int i; | 773 | int i; |
776 | 774 | ||
777 | dev_dbg(afe->dev, "%s\n", __func__); | 775 | dev_dbg(afe->dev, "%s\n", __func__); |
778 | if (pm_runtime_status_suspended(afe->dev) || afe->suspended) | 776 | if (pm_runtime_status_suspended(afe->dev) || afe->suspended) |
779 | return 0; | 777 | return 0; |
780 | 778 | ||
781 | for (i = 0; i < ARRAY_SIZE(mtk_afe_backup_list); i++) | 779 | for (i = 0; i < ARRAY_SIZE(mt8173_afe_backup_list); i++) |
782 | regmap_read(afe->regmap, mtk_afe_backup_list[i], | 780 | regmap_read(afe->regmap, mt8173_afe_backup_list[i], |
783 | &afe->backup_regs[i]); | 781 | &afe->backup_regs[i]); |
784 | 782 | ||
785 | afe->suspended = true; | 783 | afe->suspended = true; |
786 | mtk_afe_runtime_suspend(afe->dev); | 784 | mt8173_afe_runtime_suspend(afe->dev); |
787 | return 0; | 785 | return 0; |
788 | } | 786 | } |
789 | 787 | ||
790 | static int mtk_afe_dai_resume(struct snd_soc_dai *dai) | 788 | static int mt8173_afe_dai_resume(struct snd_soc_dai *dai) |
791 | { | 789 | { |
792 | struct mtk_afe *afe = snd_soc_dai_get_drvdata(dai); | 790 | struct mt8173_afe *afe = snd_soc_dai_get_drvdata(dai); |
793 | int i = 0; | 791 | int i = 0; |
794 | 792 | ||
795 | dev_dbg(afe->dev, "%s\n", __func__); | 793 | dev_dbg(afe->dev, "%s\n", __func__); |
796 | if (pm_runtime_status_suspended(afe->dev) || !afe->suspended) | 794 | if (pm_runtime_status_suspended(afe->dev) || !afe->suspended) |
797 | return 0; | 795 | return 0; |
798 | 796 | ||
799 | mtk_afe_runtime_resume(afe->dev); | 797 | mt8173_afe_runtime_resume(afe->dev); |
800 | 798 | ||
801 | for (i = 0; i < ARRAY_SIZE(mtk_afe_backup_list); i++) | 799 | for (i = 0; i < ARRAY_SIZE(mt8173_afe_backup_list); i++) |
802 | regmap_write(afe->regmap, mtk_afe_backup_list[i], | 800 | regmap_write(afe->regmap, mt8173_afe_backup_list[i], |
803 | afe->backup_regs[i]); | 801 | afe->backup_regs[i]); |
804 | 802 | ||
805 | afe->suspended = false; | 803 | afe->suspended = false; |
806 | return 0; | 804 | return 0; |
807 | } | 805 | } |
808 | 806 | ||
809 | static struct snd_soc_dai_driver mtk_afe_pcm_dais[] = { | 807 | static struct snd_soc_dai_driver mt8173_afe_pcm_dais[] = { |
810 | /* FE DAIs: memory intefaces to CPU */ | 808 | /* FE DAIs: memory intefaces to CPU */ |
811 | { | 809 | { |
812 | .name = "DL1", /* downlink 1 */ | 810 | .name = "DL1", /* downlink 1 */ |
813 | .id = MTK_AFE_MEMIF_DL1, | 811 | .id = MT8173_AFE_MEMIF_DL1, |
814 | .suspend = mtk_afe_dai_suspend, | 812 | .suspend = mt8173_afe_dai_suspend, |
815 | .resume = mtk_afe_dai_resume, | 813 | .resume = mt8173_afe_dai_resume, |
816 | .playback = { | 814 | .playback = { |
817 | .stream_name = "DL1", | 815 | .stream_name = "DL1", |
818 | .channels_min = 1, | 816 | .channels_min = 1, |
@@ -820,12 +818,12 @@ static struct snd_soc_dai_driver mtk_afe_pcm_dais[] = { | |||
820 | .rates = SNDRV_PCM_RATE_8000_48000, | 818 | .rates = SNDRV_PCM_RATE_8000_48000, |
821 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 819 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
822 | }, | 820 | }, |
823 | .ops = &mtk_afe_dai_ops, | 821 | .ops = &mt8173_afe_dai_ops, |
824 | }, { | 822 | }, { |
825 | .name = "VUL", /* voice uplink */ | 823 | .name = "VUL", /* voice uplink */ |
826 | .id = MTK_AFE_MEMIF_VUL, | 824 | .id = MT8173_AFE_MEMIF_VUL, |
827 | .suspend = mtk_afe_dai_suspend, | 825 | .suspend = mt8173_afe_dai_suspend, |
828 | .resume = mtk_afe_dai_resume, | 826 | .resume = mt8173_afe_dai_resume, |
829 | .capture = { | 827 | .capture = { |
830 | .stream_name = "VUL", | 828 | .stream_name = "VUL", |
831 | .channels_min = 1, | 829 | .channels_min = 1, |
@@ -833,11 +831,11 @@ static struct snd_soc_dai_driver mtk_afe_pcm_dais[] = { | |||
833 | .rates = SNDRV_PCM_RATE_8000_48000, | 831 | .rates = SNDRV_PCM_RATE_8000_48000, |
834 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 832 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
835 | }, | 833 | }, |
836 | .ops = &mtk_afe_dai_ops, | 834 | .ops = &mt8173_afe_dai_ops, |
837 | }, { | 835 | }, { |
838 | /* BE DAIs */ | 836 | /* BE DAIs */ |
839 | .name = "I2S", | 837 | .name = "I2S", |
840 | .id = MTK_AFE_IO_I2S, | 838 | .id = MT8173_AFE_IO_I2S, |
841 | .playback = { | 839 | .playback = { |
842 | .stream_name = "I2S Playback", | 840 | .stream_name = "I2S Playback", |
843 | .channels_min = 1, | 841 | .channels_min = 1, |
@@ -852,18 +850,18 @@ static struct snd_soc_dai_driver mtk_afe_pcm_dais[] = { | |||
852 | .rates = SNDRV_PCM_RATE_8000_48000, | 850 | .rates = SNDRV_PCM_RATE_8000_48000, |
853 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 851 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
854 | }, | 852 | }, |
855 | .ops = &mtk_afe_i2s_ops, | 853 | .ops = &mt8173_afe_i2s_ops, |
856 | .symmetric_rates = 1, | 854 | .symmetric_rates = 1, |
857 | }, | 855 | }, |
858 | }; | 856 | }; |
859 | 857 | ||
860 | static struct snd_soc_dai_driver mtk_afe_hdmi_dais[] = { | 858 | static struct snd_soc_dai_driver mt8173_afe_hdmi_dais[] = { |
861 | /* FE DAIs */ | 859 | /* FE DAIs */ |
862 | { | 860 | { |
863 | .name = "HDMI", | 861 | .name = "HDMI", |
864 | .id = MTK_AFE_MEMIF_HDMI, | 862 | .id = MT8173_AFE_MEMIF_HDMI, |
865 | .suspend = mtk_afe_dai_suspend, | 863 | .suspend = mt8173_afe_dai_suspend, |
866 | .resume = mtk_afe_dai_resume, | 864 | .resume = mt8173_afe_dai_resume, |
867 | .playback = { | 865 | .playback = { |
868 | .stream_name = "HDMI", | 866 | .stream_name = "HDMI", |
869 | .channels_min = 2, | 867 | .channels_min = 2, |
@@ -874,11 +872,11 @@ static struct snd_soc_dai_driver mtk_afe_hdmi_dais[] = { | |||
874 | SNDRV_PCM_RATE_192000, | 872 | SNDRV_PCM_RATE_192000, |
875 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 873 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
876 | }, | 874 | }, |
877 | .ops = &mtk_afe_dai_ops, | 875 | .ops = &mt8173_afe_dai_ops, |
878 | }, { | 876 | }, { |
879 | /* BE DAIs */ | 877 | /* BE DAIs */ |
880 | .name = "HDMIO", | 878 | .name = "HDMIO", |
881 | .id = MTK_AFE_IO_HDMI, | 879 | .id = MT8173_AFE_IO_HDMI, |
882 | .playback = { | 880 | .playback = { |
883 | .stream_name = "HDMIO Playback", | 881 | .stream_name = "HDMIO Playback", |
884 | .channels_min = 2, | 882 | .channels_min = 2, |
@@ -889,29 +887,29 @@ static struct snd_soc_dai_driver mtk_afe_hdmi_dais[] = { | |||
889 | SNDRV_PCM_RATE_192000, | 887 | SNDRV_PCM_RATE_192000, |
890 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 888 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
891 | }, | 889 | }, |
892 | .ops = &mtk_afe_hdmi_ops, | 890 | .ops = &mt8173_afe_hdmi_ops, |
893 | }, | 891 | }, |
894 | }; | 892 | }; |
895 | 893 | ||
896 | static const struct snd_kcontrol_new mtk_afe_o03_mix[] = { | 894 | static const struct snd_kcontrol_new mt8173_afe_o03_mix[] = { |
897 | SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN1, 21, 1, 0), | 895 | SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN1, 21, 1, 0), |
898 | }; | 896 | }; |
899 | 897 | ||
900 | static const struct snd_kcontrol_new mtk_afe_o04_mix[] = { | 898 | static const struct snd_kcontrol_new mt8173_afe_o04_mix[] = { |
901 | SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN2, 6, 1, 0), | 899 | SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN2, 6, 1, 0), |
902 | }; | 900 | }; |
903 | 901 | ||
904 | static const struct snd_kcontrol_new mtk_afe_o09_mix[] = { | 902 | static const struct snd_kcontrol_new mt8173_afe_o09_mix[] = { |
905 | SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN3, 0, 1, 0), | 903 | SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN3, 0, 1, 0), |
906 | SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN7, 30, 1, 0), | 904 | SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN7, 30, 1, 0), |
907 | }; | 905 | }; |
908 | 906 | ||
909 | static const struct snd_kcontrol_new mtk_afe_o10_mix[] = { | 907 | static const struct snd_kcontrol_new mt8173_afe_o10_mix[] = { |
910 | SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN3, 3, 1, 0), | 908 | SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN3, 3, 1, 0), |
911 | SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN8, 0, 1, 0), | 909 | SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN8, 0, 1, 0), |
912 | }; | 910 | }; |
913 | 911 | ||
914 | static const struct snd_soc_dapm_widget mtk_afe_pcm_widgets[] = { | 912 | static const struct snd_soc_dapm_widget mt8173_afe_pcm_widgets[] = { |
915 | /* inter-connections */ | 913 | /* inter-connections */ |
916 | SND_SOC_DAPM_MIXER("I03", SND_SOC_NOPM, 0, 0, NULL, 0), | 914 | SND_SOC_DAPM_MIXER("I03", SND_SOC_NOPM, 0, 0, NULL, 0), |
917 | SND_SOC_DAPM_MIXER("I04", SND_SOC_NOPM, 0, 0, NULL, 0), | 915 | SND_SOC_DAPM_MIXER("I04", SND_SOC_NOPM, 0, 0, NULL, 0), |
@@ -921,16 +919,16 @@ static const struct snd_soc_dapm_widget mtk_afe_pcm_widgets[] = { | |||
921 | SND_SOC_DAPM_MIXER("I18", SND_SOC_NOPM, 0, 0, NULL, 0), | 919 | SND_SOC_DAPM_MIXER("I18", SND_SOC_NOPM, 0, 0, NULL, 0), |
922 | 920 | ||
923 | SND_SOC_DAPM_MIXER("O03", SND_SOC_NOPM, 0, 0, | 921 | SND_SOC_DAPM_MIXER("O03", SND_SOC_NOPM, 0, 0, |
924 | mtk_afe_o03_mix, ARRAY_SIZE(mtk_afe_o03_mix)), | 922 | mt8173_afe_o03_mix, ARRAY_SIZE(mt8173_afe_o03_mix)), |
925 | SND_SOC_DAPM_MIXER("O04", SND_SOC_NOPM, 0, 0, | 923 | SND_SOC_DAPM_MIXER("O04", SND_SOC_NOPM, 0, 0, |
926 | mtk_afe_o04_mix, ARRAY_SIZE(mtk_afe_o04_mix)), | 924 | mt8173_afe_o04_mix, ARRAY_SIZE(mt8173_afe_o04_mix)), |
927 | SND_SOC_DAPM_MIXER("O09", SND_SOC_NOPM, 0, 0, | 925 | SND_SOC_DAPM_MIXER("O09", SND_SOC_NOPM, 0, 0, |
928 | mtk_afe_o09_mix, ARRAY_SIZE(mtk_afe_o09_mix)), | 926 | mt8173_afe_o09_mix, ARRAY_SIZE(mt8173_afe_o09_mix)), |
929 | SND_SOC_DAPM_MIXER("O10", SND_SOC_NOPM, 0, 0, | 927 | SND_SOC_DAPM_MIXER("O10", SND_SOC_NOPM, 0, 0, |
930 | mtk_afe_o10_mix, ARRAY_SIZE(mtk_afe_o10_mix)), | 928 | mt8173_afe_o10_mix, ARRAY_SIZE(mt8173_afe_o10_mix)), |
931 | }; | 929 | }; |
932 | 930 | ||
933 | static const struct snd_soc_dapm_route mtk_afe_pcm_routes[] = { | 931 | static const struct snd_soc_dapm_route mt8173_afe_pcm_routes[] = { |
934 | {"I05", NULL, "DL1"}, | 932 | {"I05", NULL, "DL1"}, |
935 | {"I06", NULL, "DL1"}, | 933 | {"I06", NULL, "DL1"}, |
936 | {"I2S Playback", NULL, "O03"}, | 934 | {"I2S Playback", NULL, "O03"}, |
@@ -949,41 +947,41 @@ static const struct snd_soc_dapm_route mtk_afe_pcm_routes[] = { | |||
949 | { "O10", "I04 Switch", "I04" }, | 947 | { "O10", "I04 Switch", "I04" }, |
950 | }; | 948 | }; |
951 | 949 | ||
952 | static const struct snd_soc_dapm_route mtk_afe_hdmi_routes[] = { | 950 | static const struct snd_soc_dapm_route mt8173_afe_hdmi_routes[] = { |
953 | {"HDMIO Playback", NULL, "HDMI"}, | 951 | {"HDMIO Playback", NULL, "HDMI"}, |
954 | }; | 952 | }; |
955 | 953 | ||
956 | static const struct snd_soc_component_driver mtk_afe_pcm_dai_component = { | 954 | static const struct snd_soc_component_driver mt8173_afe_pcm_dai_component = { |
957 | .name = "mtk-afe-pcm-dai", | 955 | .name = "mt8173-afe-pcm-dai", |
958 | .dapm_widgets = mtk_afe_pcm_widgets, | 956 | .dapm_widgets = mt8173_afe_pcm_widgets, |
959 | .num_dapm_widgets = ARRAY_SIZE(mtk_afe_pcm_widgets), | 957 | .num_dapm_widgets = ARRAY_SIZE(mt8173_afe_pcm_widgets), |
960 | .dapm_routes = mtk_afe_pcm_routes, | 958 | .dapm_routes = mt8173_afe_pcm_routes, |
961 | .num_dapm_routes = ARRAY_SIZE(mtk_afe_pcm_routes), | 959 | .num_dapm_routes = ARRAY_SIZE(mt8173_afe_pcm_routes), |
962 | }; | 960 | }; |
963 | 961 | ||
964 | static const struct snd_soc_component_driver mtk_afe_hdmi_dai_component = { | 962 | static const struct snd_soc_component_driver mt8173_afe_hdmi_dai_component = { |
965 | .name = "mtk-afe-hdmi-dai", | 963 | .name = "mt8173-afe-hdmi-dai", |
966 | .dapm_routes = mtk_afe_hdmi_routes, | 964 | .dapm_routes = mt8173_afe_hdmi_routes, |
967 | .num_dapm_routes = ARRAY_SIZE(mtk_afe_hdmi_routes), | 965 | .num_dapm_routes = ARRAY_SIZE(mt8173_afe_hdmi_routes), |
968 | }; | 966 | }; |
969 | 967 | ||
970 | static const char *aud_clks[MTK_CLK_NUM] = { | 968 | static const char *aud_clks[MT8173_CLK_NUM] = { |
971 | [MTK_CLK_INFRASYS_AUD] = "infra_sys_audio_clk", | 969 | [MT8173_CLK_INFRASYS_AUD] = "infra_sys_audio_clk", |
972 | [MTK_CLK_TOP_PDN_AUD] = "top_pdn_audio", | 970 | [MT8173_CLK_TOP_PDN_AUD] = "top_pdn_audio", |
973 | [MTK_CLK_TOP_PDN_AUD_BUS] = "top_pdn_aud_intbus", | 971 | [MT8173_CLK_TOP_PDN_AUD_BUS] = "top_pdn_aud_intbus", |
974 | [MTK_CLK_I2S0_M] = "i2s0_m", | 972 | [MT8173_CLK_I2S0_M] = "i2s0_m", |
975 | [MTK_CLK_I2S1_M] = "i2s1_m", | 973 | [MT8173_CLK_I2S1_M] = "i2s1_m", |
976 | [MTK_CLK_I2S2_M] = "i2s2_m", | 974 | [MT8173_CLK_I2S2_M] = "i2s2_m", |
977 | [MTK_CLK_I2S3_M] = "i2s3_m", | 975 | [MT8173_CLK_I2S3_M] = "i2s3_m", |
978 | [MTK_CLK_I2S3_B] = "i2s3_b", | 976 | [MT8173_CLK_I2S3_B] = "i2s3_b", |
979 | [MTK_CLK_BCK0] = "bck0", | 977 | [MT8173_CLK_BCK0] = "bck0", |
980 | [MTK_CLK_BCK1] = "bck1", | 978 | [MT8173_CLK_BCK1] = "bck1", |
981 | }; | 979 | }; |
982 | 980 | ||
983 | static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | 981 | static const struct mt8173_afe_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { |
984 | { | 982 | { |
985 | .name = "DL1", | 983 | .name = "DL1", |
986 | .id = MTK_AFE_MEMIF_DL1, | 984 | .id = MT8173_AFE_MEMIF_DL1, |
987 | .reg_ofs_base = AFE_DL1_BASE, | 985 | .reg_ofs_base = AFE_DL1_BASE, |
988 | .reg_ofs_cur = AFE_DL1_CUR, | 986 | .reg_ofs_cur = AFE_DL1_CUR, |
989 | .fs_shift = 0, | 987 | .fs_shift = 0, |
@@ -997,7 +995,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
997 | .msb_shift = 0, | 995 | .msb_shift = 0, |
998 | }, { | 996 | }, { |
999 | .name = "DL2", | 997 | .name = "DL2", |
1000 | .id = MTK_AFE_MEMIF_DL2, | 998 | .id = MT8173_AFE_MEMIF_DL2, |
1001 | .reg_ofs_base = AFE_DL2_BASE, | 999 | .reg_ofs_base = AFE_DL2_BASE, |
1002 | .reg_ofs_cur = AFE_DL2_CUR, | 1000 | .reg_ofs_cur = AFE_DL2_CUR, |
1003 | .fs_shift = 4, | 1001 | .fs_shift = 4, |
@@ -1011,7 +1009,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1011 | .msb_shift = 1, | 1009 | .msb_shift = 1, |
1012 | }, { | 1010 | }, { |
1013 | .name = "VUL", | 1011 | .name = "VUL", |
1014 | .id = MTK_AFE_MEMIF_VUL, | 1012 | .id = MT8173_AFE_MEMIF_VUL, |
1015 | .reg_ofs_base = AFE_VUL_BASE, | 1013 | .reg_ofs_base = AFE_VUL_BASE, |
1016 | .reg_ofs_cur = AFE_VUL_CUR, | 1014 | .reg_ofs_cur = AFE_VUL_CUR, |
1017 | .fs_shift = 16, | 1015 | .fs_shift = 16, |
@@ -1025,7 +1023,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1025 | .msb_shift = 6, | 1023 | .msb_shift = 6, |
1026 | }, { | 1024 | }, { |
1027 | .name = "DAI", | 1025 | .name = "DAI", |
1028 | .id = MTK_AFE_MEMIF_DAI, | 1026 | .id = MT8173_AFE_MEMIF_DAI, |
1029 | .reg_ofs_base = AFE_DAI_BASE, | 1027 | .reg_ofs_base = AFE_DAI_BASE, |
1030 | .reg_ofs_cur = AFE_DAI_CUR, | 1028 | .reg_ofs_cur = AFE_DAI_CUR, |
1031 | .fs_shift = 24, | 1029 | .fs_shift = 24, |
@@ -1039,7 +1037,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1039 | .msb_shift = 5, | 1037 | .msb_shift = 5, |
1040 | }, { | 1038 | }, { |
1041 | .name = "AWB", | 1039 | .name = "AWB", |
1042 | .id = MTK_AFE_MEMIF_AWB, | 1040 | .id = MT8173_AFE_MEMIF_AWB, |
1043 | .reg_ofs_base = AFE_AWB_BASE, | 1041 | .reg_ofs_base = AFE_AWB_BASE, |
1044 | .reg_ofs_cur = AFE_AWB_CUR, | 1042 | .reg_ofs_cur = AFE_AWB_CUR, |
1045 | .fs_shift = 12, | 1043 | .fs_shift = 12, |
@@ -1053,7 +1051,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1053 | .msb_shift = 3, | 1051 | .msb_shift = 3, |
1054 | }, { | 1052 | }, { |
1055 | .name = "MOD_DAI", | 1053 | .name = "MOD_DAI", |
1056 | .id = MTK_AFE_MEMIF_MOD_DAI, | 1054 | .id = MT8173_AFE_MEMIF_MOD_DAI, |
1057 | .reg_ofs_base = AFE_MOD_PCM_BASE, | 1055 | .reg_ofs_base = AFE_MOD_PCM_BASE, |
1058 | .reg_ofs_cur = AFE_MOD_PCM_CUR, | 1056 | .reg_ofs_cur = AFE_MOD_PCM_CUR, |
1059 | .fs_shift = 30, | 1057 | .fs_shift = 30, |
@@ -1067,7 +1065,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1067 | .msb_shift = 4, | 1065 | .msb_shift = 4, |
1068 | }, { | 1066 | }, { |
1069 | .name = "HDMI", | 1067 | .name = "HDMI", |
1070 | .id = MTK_AFE_MEMIF_HDMI, | 1068 | .id = MT8173_AFE_MEMIF_HDMI, |
1071 | .reg_ofs_base = AFE_HDMI_OUT_BASE, | 1069 | .reg_ofs_base = AFE_HDMI_OUT_BASE, |
1072 | .reg_ofs_cur = AFE_HDMI_OUT_CUR, | 1070 | .reg_ofs_cur = AFE_HDMI_OUT_CUR, |
1073 | .fs_shift = -1, | 1071 | .fs_shift = -1, |
@@ -1082,7 +1080,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1082 | }, | 1080 | }, |
1083 | }; | 1081 | }; |
1084 | 1082 | ||
1085 | static const struct regmap_config mtk_afe_regmap_config = { | 1083 | static const struct regmap_config mt8173_afe_regmap_config = { |
1086 | .reg_bits = 32, | 1084 | .reg_bits = 32, |
1087 | .reg_stride = 4, | 1085 | .reg_stride = 4, |
1088 | .val_bits = 32, | 1086 | .val_bits = 32, |
@@ -1090,9 +1088,9 @@ static const struct regmap_config mtk_afe_regmap_config = { | |||
1090 | .cache_type = REGCACHE_NONE, | 1088 | .cache_type = REGCACHE_NONE, |
1091 | }; | 1089 | }; |
1092 | 1090 | ||
1093 | static irqreturn_t mtk_afe_irq_handler(int irq, void *dev_id) | 1091 | static irqreturn_t mt8173_afe_irq_handler(int irq, void *dev_id) |
1094 | { | 1092 | { |
1095 | struct mtk_afe *afe = dev_id; | 1093 | struct mt8173_afe *afe = dev_id; |
1096 | unsigned int reg_value; | 1094 | unsigned int reg_value; |
1097 | int i, ret; | 1095 | int i, ret; |
1098 | 1096 | ||
@@ -1103,8 +1101,8 @@ static irqreturn_t mtk_afe_irq_handler(int irq, void *dev_id) | |||
1103 | goto err_irq; | 1101 | goto err_irq; |
1104 | } | 1102 | } |
1105 | 1103 | ||
1106 | for (i = 0; i < MTK_AFE_MEMIF_NUM; i++) { | 1104 | for (i = 0; i < MT8173_AFE_MEMIF_NUM; i++) { |
1107 | struct mtk_afe_memif *memif = &afe->memif[i]; | 1105 | struct mt8173_afe_memif *memif = &afe->memif[i]; |
1108 | 1106 | ||
1109 | if (!(reg_value & (1 << memif->data->irq_clr_shift))) | 1107 | if (!(reg_value & (1 << memif->data->irq_clr_shift))) |
1110 | continue; | 1108 | continue; |
@@ -1119,9 +1117,9 @@ err_irq: | |||
1119 | return IRQ_HANDLED; | 1117 | return IRQ_HANDLED; |
1120 | } | 1118 | } |
1121 | 1119 | ||
1122 | static int mtk_afe_runtime_suspend(struct device *dev) | 1120 | static int mt8173_afe_runtime_suspend(struct device *dev) |
1123 | { | 1121 | { |
1124 | struct mtk_afe *afe = dev_get_drvdata(dev); | 1122 | struct mt8173_afe *afe = dev_get_drvdata(dev); |
1125 | 1123 | ||
1126 | /* disable AFE */ | 1124 | /* disable AFE */ |
1127 | regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0); | 1125 | regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0); |
@@ -1129,45 +1127,44 @@ static int mtk_afe_runtime_suspend(struct device *dev) | |||
1129 | /* disable AFE clk */ | 1127 | /* disable AFE clk */ |
1130 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, | 1128 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, |
1131 | AUD_TCON0_PDN_AFE, AUD_TCON0_PDN_AFE); | 1129 | AUD_TCON0_PDN_AFE, AUD_TCON0_PDN_AFE); |
1132 | 1130 | clk_disable_unprepare(afe->clocks[MT8173_CLK_I2S1_M]); | |
1133 | clk_disable_unprepare(afe->clocks[MTK_CLK_I2S1_M]); | 1131 | clk_disable_unprepare(afe->clocks[MT8173_CLK_I2S2_M]); |
1134 | clk_disable_unprepare(afe->clocks[MTK_CLK_I2S2_M]); | 1132 | clk_disable_unprepare(afe->clocks[MT8173_CLK_BCK0]); |
1135 | clk_disable_unprepare(afe->clocks[MTK_CLK_BCK0]); | 1133 | clk_disable_unprepare(afe->clocks[MT8173_CLK_BCK1]); |
1136 | clk_disable_unprepare(afe->clocks[MTK_CLK_BCK1]); | 1134 | clk_disable_unprepare(afe->clocks[MT8173_CLK_TOP_PDN_AUD]); |
1137 | clk_disable_unprepare(afe->clocks[MTK_CLK_TOP_PDN_AUD]); | 1135 | clk_disable_unprepare(afe->clocks[MT8173_CLK_TOP_PDN_AUD_BUS]); |
1138 | clk_disable_unprepare(afe->clocks[MTK_CLK_TOP_PDN_AUD_BUS]); | 1136 | clk_disable_unprepare(afe->clocks[MT8173_CLK_INFRASYS_AUD]); |
1139 | clk_disable_unprepare(afe->clocks[MTK_CLK_INFRASYS_AUD]); | ||
1140 | return 0; | 1137 | return 0; |
1141 | } | 1138 | } |
1142 | 1139 | ||
1143 | static int mtk_afe_runtime_resume(struct device *dev) | 1140 | static int mt8173_afe_runtime_resume(struct device *dev) |
1144 | { | 1141 | { |
1145 | struct mtk_afe *afe = dev_get_drvdata(dev); | 1142 | struct mt8173_afe *afe = dev_get_drvdata(dev); |
1146 | int ret; | 1143 | int ret; |
1147 | 1144 | ||
1148 | ret = clk_prepare_enable(afe->clocks[MTK_CLK_INFRASYS_AUD]); | 1145 | ret = clk_prepare_enable(afe->clocks[MT8173_CLK_INFRASYS_AUD]); |
1149 | if (ret) | 1146 | if (ret) |
1150 | return ret; | 1147 | return ret; |
1151 | 1148 | ||
1152 | ret = clk_prepare_enable(afe->clocks[MTK_CLK_TOP_PDN_AUD_BUS]); | 1149 | ret = clk_prepare_enable(afe->clocks[MT8173_CLK_TOP_PDN_AUD_BUS]); |
1153 | if (ret) | 1150 | if (ret) |
1154 | goto err_infra; | 1151 | goto err_infra; |
1155 | 1152 | ||
1156 | ret = clk_prepare_enable(afe->clocks[MTK_CLK_TOP_PDN_AUD]); | 1153 | ret = clk_prepare_enable(afe->clocks[MT8173_CLK_TOP_PDN_AUD]); |
1157 | if (ret) | 1154 | if (ret) |
1158 | goto err_top_aud_bus; | 1155 | goto err_top_aud_bus; |
1159 | 1156 | ||
1160 | ret = clk_prepare_enable(afe->clocks[MTK_CLK_BCK0]); | 1157 | ret = clk_prepare_enable(afe->clocks[MT8173_CLK_BCK0]); |
1161 | if (ret) | 1158 | if (ret) |
1162 | goto err_top_aud; | 1159 | goto err_top_aud; |
1163 | 1160 | ||
1164 | ret = clk_prepare_enable(afe->clocks[MTK_CLK_BCK1]); | 1161 | ret = clk_prepare_enable(afe->clocks[MT8173_CLK_BCK1]); |
1165 | if (ret) | 1162 | if (ret) |
1166 | goto err_bck0; | 1163 | goto err_bck0; |
1167 | ret = clk_prepare_enable(afe->clocks[MTK_CLK_I2S1_M]); | 1164 | ret = clk_prepare_enable(afe->clocks[MT8173_CLK_I2S1_M]); |
1168 | if (ret) | 1165 | if (ret) |
1169 | goto err_i2s1_m; | 1166 | goto err_i2s1_m; |
1170 | ret = clk_prepare_enable(afe->clocks[MTK_CLK_I2S2_M]); | 1167 | ret = clk_prepare_enable(afe->clocks[MT8173_CLK_I2S2_M]); |
1171 | if (ret) | 1168 | if (ret) |
1172 | goto err_i2s2_m; | 1169 | goto err_i2s2_m; |
1173 | 1170 | ||
@@ -1184,23 +1181,22 @@ static int mtk_afe_runtime_resume(struct device *dev) | |||
1184 | /* enable AFE */ | 1181 | /* enable AFE */ |
1185 | regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1); | 1182 | regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1); |
1186 | return 0; | 1183 | return 0; |
1187 | |||
1188 | err_i2s1_m: | 1184 | err_i2s1_m: |
1189 | clk_disable_unprepare(afe->clocks[MTK_CLK_I2S1_M]); | 1185 | clk_disable_unprepare(afe->clocks[MT8173_CLK_I2S1_M]); |
1190 | err_i2s2_m: | 1186 | err_i2s2_m: |
1191 | clk_disable_unprepare(afe->clocks[MTK_CLK_I2S2_M]); | 1187 | clk_disable_unprepare(afe->clocks[MT8173_CLK_I2S2_M]); |
1192 | err_bck0: | 1188 | err_bck0: |
1193 | clk_disable_unprepare(afe->clocks[MTK_CLK_BCK0]); | 1189 | clk_disable_unprepare(afe->clocks[MT8173_CLK_BCK0]); |
1194 | err_top_aud: | 1190 | err_top_aud: |
1195 | clk_disable_unprepare(afe->clocks[MTK_CLK_TOP_PDN_AUD]); | 1191 | clk_disable_unprepare(afe->clocks[MT8173_CLK_TOP_PDN_AUD]); |
1196 | err_top_aud_bus: | 1192 | err_top_aud_bus: |
1197 | clk_disable_unprepare(afe->clocks[MTK_CLK_TOP_PDN_AUD_BUS]); | 1193 | clk_disable_unprepare(afe->clocks[MT8173_CLK_TOP_PDN_AUD_BUS]); |
1198 | err_infra: | 1194 | err_infra: |
1199 | clk_disable_unprepare(afe->clocks[MTK_CLK_INFRASYS_AUD]); | 1195 | clk_disable_unprepare(afe->clocks[MT8173_CLK_INFRASYS_AUD]); |
1200 | return ret; | 1196 | return ret; |
1201 | } | 1197 | } |
1202 | 1198 | ||
1203 | static int mtk_afe_init_audio_clk(struct mtk_afe *afe) | 1199 | static int mt8173_afe_init_audio_clk(struct mt8173_afe *afe) |
1204 | { | 1200 | { |
1205 | size_t i; | 1201 | size_t i; |
1206 | 1202 | ||
@@ -1212,16 +1208,16 @@ static int mtk_afe_init_audio_clk(struct mtk_afe *afe) | |||
1212 | return PTR_ERR(afe->clocks[i]); | 1208 | return PTR_ERR(afe->clocks[i]); |
1213 | } | 1209 | } |
1214 | } | 1210 | } |
1215 | clk_set_rate(afe->clocks[MTK_CLK_BCK0], 22579200); /* 22M */ | 1211 | clk_set_rate(afe->clocks[MT8173_CLK_BCK0], 22579200); /* 22M */ |
1216 | clk_set_rate(afe->clocks[MTK_CLK_BCK1], 24576000); /* 24M */ | 1212 | clk_set_rate(afe->clocks[MT8173_CLK_BCK1], 24576000); /* 24M */ |
1217 | return 0; | 1213 | return 0; |
1218 | } | 1214 | } |
1219 | 1215 | ||
1220 | static int mtk_afe_pcm_dev_probe(struct platform_device *pdev) | 1216 | static int mt8173_afe_pcm_dev_probe(struct platform_device *pdev) |
1221 | { | 1217 | { |
1222 | int ret, i; | 1218 | int ret, i; |
1223 | unsigned int irq_id; | 1219 | unsigned int irq_id; |
1224 | struct mtk_afe *afe; | 1220 | struct mt8173_afe *afe; |
1225 | struct resource *res; | 1221 | struct resource *res; |
1226 | 1222 | ||
1227 | ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(33)); | 1223 | ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(33)); |
@@ -1239,7 +1235,7 @@ static int mtk_afe_pcm_dev_probe(struct platform_device *pdev) | |||
1239 | dev_err(afe->dev, "np %s no irq\n", afe->dev->of_node->name); | 1235 | dev_err(afe->dev, "np %s no irq\n", afe->dev->of_node->name); |
1240 | return -ENXIO; | 1236 | return -ENXIO; |
1241 | } | 1237 | } |
1242 | ret = devm_request_irq(afe->dev, irq_id, mtk_afe_irq_handler, | 1238 | ret = devm_request_irq(afe->dev, irq_id, mt8173_afe_irq_handler, |
1243 | 0, "Afe_ISR_Handle", (void *)afe); | 1239 | 0, "Afe_ISR_Handle", (void *)afe); |
1244 | if (ret) { | 1240 | if (ret) { |
1245 | dev_err(afe->dev, "could not request_irq\n"); | 1241 | dev_err(afe->dev, "could not request_irq\n"); |
@@ -1252,48 +1248,48 @@ static int mtk_afe_pcm_dev_probe(struct platform_device *pdev) | |||
1252 | return PTR_ERR(afe->base_addr); | 1248 | return PTR_ERR(afe->base_addr); |
1253 | 1249 | ||
1254 | afe->regmap = devm_regmap_init_mmio(&pdev->dev, afe->base_addr, | 1250 | afe->regmap = devm_regmap_init_mmio(&pdev->dev, afe->base_addr, |
1255 | &mtk_afe_regmap_config); | 1251 | &mt8173_afe_regmap_config); |
1256 | if (IS_ERR(afe->regmap)) | 1252 | if (IS_ERR(afe->regmap)) |
1257 | return PTR_ERR(afe->regmap); | 1253 | return PTR_ERR(afe->regmap); |
1258 | 1254 | ||
1259 | /* initial audio related clock */ | 1255 | /* initial audio related clock */ |
1260 | ret = mtk_afe_init_audio_clk(afe); | 1256 | ret = mt8173_afe_init_audio_clk(afe); |
1261 | if (ret) { | 1257 | if (ret) { |
1262 | dev_err(afe->dev, "mtk_afe_init_audio_clk fail\n"); | 1258 | dev_err(afe->dev, "mt8173_afe_init_audio_clk fail\n"); |
1263 | return ret; | 1259 | return ret; |
1264 | } | 1260 | } |
1265 | 1261 | ||
1266 | for (i = 0; i < MTK_AFE_MEMIF_NUM; i++) | 1262 | for (i = 0; i < MT8173_AFE_MEMIF_NUM; i++) |
1267 | afe->memif[i].data = &memif_data[i]; | 1263 | afe->memif[i].data = &memif_data[i]; |
1268 | 1264 | ||
1269 | platform_set_drvdata(pdev, afe); | 1265 | platform_set_drvdata(pdev, afe); |
1270 | 1266 | ||
1271 | pm_runtime_enable(&pdev->dev); | 1267 | pm_runtime_enable(&pdev->dev); |
1272 | if (!pm_runtime_enabled(&pdev->dev)) { | 1268 | if (!pm_runtime_enabled(&pdev->dev)) { |
1273 | ret = mtk_afe_runtime_resume(&pdev->dev); | 1269 | ret = mt8173_afe_runtime_resume(&pdev->dev); |
1274 | if (ret) | 1270 | if (ret) |
1275 | goto err_pm_disable; | 1271 | goto err_pm_disable; |
1276 | } | 1272 | } |
1277 | 1273 | ||
1278 | ret = snd_soc_register_platform(&pdev->dev, &mtk_afe_pcm_platform); | 1274 | ret = snd_soc_register_platform(&pdev->dev, &mt8173_afe_pcm_platform); |
1279 | if (ret) | 1275 | if (ret) |
1280 | goto err_pm_disable; | 1276 | goto err_pm_disable; |
1281 | 1277 | ||
1282 | ret = snd_soc_register_component(&pdev->dev, | 1278 | ret = snd_soc_register_component(&pdev->dev, |
1283 | &mtk_afe_pcm_dai_component, | 1279 | &mt8173_afe_pcm_dai_component, |
1284 | mtk_afe_pcm_dais, | 1280 | mt8173_afe_pcm_dais, |
1285 | ARRAY_SIZE(mtk_afe_pcm_dais)); | 1281 | ARRAY_SIZE(mt8173_afe_pcm_dais)); |
1286 | if (ret) | 1282 | if (ret) |
1287 | goto err_platform; | 1283 | goto err_platform; |
1288 | 1284 | ||
1289 | ret = snd_soc_register_component(&pdev->dev, | 1285 | ret = snd_soc_register_component(&pdev->dev, |
1290 | &mtk_afe_hdmi_dai_component, | 1286 | &mt8173_afe_hdmi_dai_component, |
1291 | mtk_afe_hdmi_dais, | 1287 | mt8173_afe_hdmi_dais, |
1292 | ARRAY_SIZE(mtk_afe_hdmi_dais)); | 1288 | ARRAY_SIZE(mt8173_afe_hdmi_dais)); |
1293 | if (ret) | 1289 | if (ret) |
1294 | goto err_comp; | 1290 | goto err_comp; |
1295 | 1291 | ||
1296 | dev_info(&pdev->dev, "MTK AFE driver initialized.\n"); | 1292 | dev_info(&pdev->dev, "MT8173 AFE driver initialized.\n"); |
1297 | return 0; | 1293 | return 0; |
1298 | 1294 | ||
1299 | err_comp: | 1295 | err_comp: |
@@ -1305,38 +1301,38 @@ err_pm_disable: | |||
1305 | return ret; | 1301 | return ret; |
1306 | } | 1302 | } |
1307 | 1303 | ||
1308 | static int mtk_afe_pcm_dev_remove(struct platform_device *pdev) | 1304 | static int mt8173_afe_pcm_dev_remove(struct platform_device *pdev) |
1309 | { | 1305 | { |
1310 | pm_runtime_disable(&pdev->dev); | 1306 | pm_runtime_disable(&pdev->dev); |
1311 | if (!pm_runtime_status_suspended(&pdev->dev)) | 1307 | if (!pm_runtime_status_suspended(&pdev->dev)) |
1312 | mtk_afe_runtime_suspend(&pdev->dev); | 1308 | mt8173_afe_runtime_suspend(&pdev->dev); |
1313 | snd_soc_unregister_component(&pdev->dev); | 1309 | snd_soc_unregister_component(&pdev->dev); |
1314 | snd_soc_unregister_platform(&pdev->dev); | 1310 | snd_soc_unregister_platform(&pdev->dev); |
1315 | return 0; | 1311 | return 0; |
1316 | } | 1312 | } |
1317 | 1313 | ||
1318 | static const struct of_device_id mtk_afe_pcm_dt_match[] = { | 1314 | static const struct of_device_id mt8173_afe_pcm_dt_match[] = { |
1319 | { .compatible = "mediatek,mt8173-afe-pcm", }, | 1315 | { .compatible = "mediatek,mt8173-afe-pcm", }, |
1320 | { } | 1316 | { } |
1321 | }; | 1317 | }; |
1322 | MODULE_DEVICE_TABLE(of, mtk_afe_pcm_dt_match); | 1318 | MODULE_DEVICE_TABLE(of, mt8173_afe_pcm_dt_match); |
1323 | 1319 | ||
1324 | static const struct dev_pm_ops mtk_afe_pm_ops = { | 1320 | static const struct dev_pm_ops mt8173_afe_pm_ops = { |
1325 | SET_RUNTIME_PM_OPS(mtk_afe_runtime_suspend, mtk_afe_runtime_resume, | 1321 | SET_RUNTIME_PM_OPS(mt8173_afe_runtime_suspend, |
1326 | NULL) | 1322 | mt8173_afe_runtime_resume, NULL) |
1327 | }; | 1323 | }; |
1328 | 1324 | ||
1329 | static struct platform_driver mtk_afe_pcm_driver = { | 1325 | static struct platform_driver mt8173_afe_pcm_driver = { |
1330 | .driver = { | 1326 | .driver = { |
1331 | .name = "mtk-afe-pcm", | 1327 | .name = "mt8173-afe-pcm", |
1332 | .of_match_table = mtk_afe_pcm_dt_match, | 1328 | .of_match_table = mt8173_afe_pcm_dt_match, |
1333 | .pm = &mtk_afe_pm_ops, | 1329 | .pm = &mt8173_afe_pm_ops, |
1334 | }, | 1330 | }, |
1335 | .probe = mtk_afe_pcm_dev_probe, | 1331 | .probe = mt8173_afe_pcm_dev_probe, |
1336 | .remove = mtk_afe_pcm_dev_remove, | 1332 | .remove = mt8173_afe_pcm_dev_remove, |
1337 | }; | 1333 | }; |
1338 | 1334 | ||
1339 | module_platform_driver(mtk_afe_pcm_driver); | 1335 | module_platform_driver(mt8173_afe_pcm_driver); |
1340 | 1336 | ||
1341 | MODULE_DESCRIPTION("Mediatek ALSA SoC AFE platform driver"); | 1337 | MODULE_DESCRIPTION("Mediatek ALSA SoC AFE platform driver"); |
1342 | MODULE_AUTHOR("Koro Chen <koro.chen@mediatek.com>"); | 1338 | MODULE_AUTHOR("Koro Chen <koro.chen@mediatek.com>"); |
diff --git a/sound/soc/mediatek/mt8173-max98090.c b/sound/soc/mediatek/mt8173/mt8173-max98090.c index 71a1a35047ba..5524a2c727ec 100644 --- a/sound/soc/mediatek/mt8173-max98090.c +++ b/sound/soc/mediatek/mt8173/mt8173-max98090.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <sound/soc.h> | 18 | #include <sound/soc.h> |
19 | #include <sound/jack.h> | 19 | #include <sound/jack.h> |
20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
21 | #include "../codecs/max98090.h" | 21 | #include "../../codecs/max98090.h" |
22 | 22 | ||
23 | static struct snd_soc_jack mt8173_max98090_jack; | 23 | static struct snd_soc_jack mt8173_max98090_jack; |
24 | 24 | ||
diff --git a/sound/soc/mediatek/mt8173-rt5650-rt5514.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c index 58e083642dea..467f7049a288 100644 --- a/sound/soc/mediatek/mt8173-rt5650-rt5514.c +++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/of_gpio.h> | 19 | #include <linux/of_gpio.h> |
20 | #include <sound/soc.h> | 20 | #include <sound/soc.h> |
21 | #include <sound/jack.h> | 21 | #include <sound/jack.h> |
22 | #include "../codecs/rt5645.h" | 22 | #include "../../codecs/rt5645.h" |
23 | 23 | ||
24 | #define MCLK_FOR_CODECS 12288000 | 24 | #define MCLK_FOR_CODECS 12288000 |
25 | 25 | ||
diff --git a/sound/soc/mediatek/mt8173-rt5650-rt5676.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c index bb593926c62d..1b8b2a778845 100644 --- a/sound/soc/mediatek/mt8173-rt5650-rt5676.c +++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c | |||
@@ -19,8 +19,8 @@ | |||
19 | #include <linux/of_gpio.h> | 19 | #include <linux/of_gpio.h> |
20 | #include <sound/soc.h> | 20 | #include <sound/soc.h> |
21 | #include <sound/jack.h> | 21 | #include <sound/jack.h> |
22 | #include "../codecs/rt5645.h" | 22 | #include "../../codecs/rt5645.h" |
23 | #include "../codecs/rt5677.h" | 23 | #include "../../codecs/rt5677.h" |
24 | 24 | ||
25 | #define MCLK_FOR_CODECS 12288000 | 25 | #define MCLK_FOR_CODECS 12288000 |
26 | 26 | ||
diff --git a/sound/soc/mediatek/mt8173-rt5650.c b/sound/soc/mediatek/mt8173/mt8173-rt5650.c index 072934b470a8..d47897618cb5 100644 --- a/sound/soc/mediatek/mt8173-rt5650.c +++ b/sound/soc/mediatek/mt8173/mt8173-rt5650.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/of_gpio.h> | 19 | #include <linux/of_gpio.h> |
20 | #include <sound/soc.h> | 20 | #include <sound/soc.h> |
21 | #include <sound/jack.h> | 21 | #include <sound/jack.h> |
22 | #include "../codecs/rt5645.h" | 22 | #include "../../codecs/rt5645.h" |
23 | 23 | ||
24 | #define MCLK_FOR_CODECS 12288000 | 24 | #define MCLK_FOR_CODECS 12288000 |
25 | 25 | ||
diff --git a/sound/soc/mediatek/mtk-afe-common.h b/sound/soc/mediatek/mtk-afe-common.h deleted file mode 100644 index f341f623e887..000000000000 --- a/sound/soc/mediatek/mtk-afe-common.h +++ /dev/null | |||
@@ -1,101 +0,0 @@ | |||
1 | /* | ||
2 | * mtk_afe_common.h -- Mediatek audio driver common definitions | ||
3 | * | ||
4 | * Copyright (c) 2015 MediaTek Inc. | ||
5 | * Author: Koro Chen <koro.chen@mediatek.com> | ||
6 | * Sascha Hauer <s.hauer@pengutronix.de> | ||
7 | * Hidalgo Huang <hidalgo.huang@mediatek.com> | ||
8 | * Ir Lian <ir.lian@mediatek.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 and | ||
12 | * only version 2 as published by the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | */ | ||
19 | |||
20 | #ifndef _MTK_AFE_COMMON_H_ | ||
21 | #define _MTK_AFE_COMMON_H_ | ||
22 | |||
23 | #include <linux/clk.h> | ||
24 | #include <linux/regmap.h> | ||
25 | |||
26 | enum { | ||
27 | MTK_AFE_MEMIF_DL1, | ||
28 | MTK_AFE_MEMIF_DL2, | ||
29 | MTK_AFE_MEMIF_VUL, | ||
30 | MTK_AFE_MEMIF_DAI, | ||
31 | MTK_AFE_MEMIF_AWB, | ||
32 | MTK_AFE_MEMIF_MOD_DAI, | ||
33 | MTK_AFE_MEMIF_HDMI, | ||
34 | MTK_AFE_MEMIF_NUM, | ||
35 | MTK_AFE_IO_MOD_PCM1 = MTK_AFE_MEMIF_NUM, | ||
36 | MTK_AFE_IO_MOD_PCM2, | ||
37 | MTK_AFE_IO_PMIC, | ||
38 | MTK_AFE_IO_I2S, | ||
39 | MTK_AFE_IO_2ND_I2S, | ||
40 | MTK_AFE_IO_HW_GAIN1, | ||
41 | MTK_AFE_IO_HW_GAIN2, | ||
42 | MTK_AFE_IO_MRG_O, | ||
43 | MTK_AFE_IO_MRG_I, | ||
44 | MTK_AFE_IO_DAIBT, | ||
45 | MTK_AFE_IO_HDMI, | ||
46 | }; | ||
47 | |||
48 | enum { | ||
49 | MTK_AFE_IRQ_1, | ||
50 | MTK_AFE_IRQ_2, | ||
51 | MTK_AFE_IRQ_3, | ||
52 | MTK_AFE_IRQ_4, | ||
53 | MTK_AFE_IRQ_5, | ||
54 | MTK_AFE_IRQ_6, | ||
55 | MTK_AFE_IRQ_7, | ||
56 | MTK_AFE_IRQ_8, | ||
57 | MTK_AFE_IRQ_NUM, | ||
58 | }; | ||
59 | |||
60 | enum { | ||
61 | MTK_CLK_INFRASYS_AUD, | ||
62 | MTK_CLK_TOP_PDN_AUD, | ||
63 | MTK_CLK_TOP_PDN_AUD_BUS, | ||
64 | MTK_CLK_I2S0_M, | ||
65 | MTK_CLK_I2S1_M, | ||
66 | MTK_CLK_I2S2_M, | ||
67 | MTK_CLK_I2S3_M, | ||
68 | MTK_CLK_I2S3_B, | ||
69 | MTK_CLK_BCK0, | ||
70 | MTK_CLK_BCK1, | ||
71 | MTK_CLK_NUM | ||
72 | }; | ||
73 | |||
74 | struct mtk_afe; | ||
75 | struct snd_pcm_substream; | ||
76 | |||
77 | struct mtk_afe_memif_data { | ||
78 | int id; | ||
79 | const char *name; | ||
80 | int reg_ofs_base; | ||
81 | int reg_ofs_cur; | ||
82 | int fs_shift; | ||
83 | int mono_shift; | ||
84 | int enable_shift; | ||
85 | int irq_reg_cnt; | ||
86 | int irq_cnt_shift; | ||
87 | int irq_en_shift; | ||
88 | int irq_fs_shift; | ||
89 | int irq_clr_shift; | ||
90 | int msb_shift; | ||
91 | }; | ||
92 | |||
93 | struct mtk_afe_memif { | ||
94 | unsigned int phys_buf_addr; | ||
95 | int buffer_size; | ||
96 | struct snd_pcm_substream *substream; | ||
97 | const struct mtk_afe_memif_data *data; | ||
98 | const struct mtk_afe_irq_data *irqdata; | ||
99 | }; | ||
100 | |||
101 | #endif | ||