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authorAlastair D'Silva <alastair@d-silva.org>2018-06-28 06:05:01 -0400
committerMichael Ellerman <mpe@ellerman.id.au>2018-07-02 09:54:30 -0400
commit0cfd7335d1ebea42cf113fd22452f6a10d3960fe (patch)
tree6fe4c81a99b483601c0213a5212f30cdd7383320
parentc5828150067c47a97f30e690a472e0548d3ac97d (diff)
Revert "cxl: Add support for interrupts on the Mellanox CX4"
Remove abandonned capi support for the Mellanox CX4. This reverts commit a2f67d5ee8d950caaa7a6144cf0bfb256500b73e. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r--arch/powerpc/platforms/powernv/pci-cxl.c84
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c4
-rw-r--r--arch/powerpc/platforms/powernv/pci.h2
-rw-r--r--drivers/misc/cxl/api.c71
-rw-r--r--drivers/misc/cxl/base.c31
-rw-r--r--drivers/misc/cxl/cxl.h4
-rw-r--r--drivers/misc/cxl/main.c2
-rw-r--r--include/misc/cxl-base.h4
8 files changed, 0 insertions, 202 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c b/arch/powerpc/platforms/powernv/pci-cxl.c
index cee003de63af..c447b7f03c09 100644
--- a/arch/powerpc/platforms/powernv/pci-cxl.c
+++ b/arch/powerpc/platforms/powernv/pci-cxl.c
@@ -8,7 +8,6 @@
8 */ 8 */
9 9
10#include <linux/module.h> 10#include <linux/module.h>
11#include <linux/msi.h>
12#include <asm/pci-bridge.h> 11#include <asm/pci-bridge.h>
13#include <asm/pnv-pci.h> 12#include <asm/pnv-pci.h>
14#include <asm/opal.h> 13#include <asm/opal.h>
@@ -292,86 +291,3 @@ void pnv_cxl_disable_device(struct pci_dev *dev)
292 cxl_pci_disable_device(dev); 291 cxl_pci_disable_device(dev);
293 cxl_afu_put(afu); 292 cxl_afu_put(afu);
294} 293}
295
296/*
297 * This is a special version of pnv_setup_msi_irqs for cards in cxl mode. This
298 * function handles setting up the IVTE entries for the XSL to use.
299 *
300 * We are currently not filling out the MSIX table, since the only currently
301 * supported adapter (CX4) uses a custom MSIX table format in cxl mode and it
302 * is up to their driver to fill that out. In the future we may fill out the
303 * MSIX table (and change the IVTE entries to be an index to the MSIX table)
304 * for adapters implementing the Full MSI-X mode described in the CAIA.
305 */
306int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
307{
308 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
309 struct pnv_phb *phb = hose->private_data;
310 struct msi_desc *entry;
311 struct cxl_context *ctx = NULL;
312 unsigned int virq;
313 int hwirq;
314 int afu_irq = 0;
315 int rc;
316
317 if (WARN_ON(!phb) || !phb->msi_bmp.bitmap)
318 return -ENODEV;
319
320 if (pdev->no_64bit_msi && !phb->msi32_support)
321 return -ENODEV;
322
323 rc = cxl_cx4_setup_msi_irqs(pdev, nvec, type);
324 if (rc)
325 return rc;
326
327 for_each_pci_msi_entry(entry, pdev) {
328 if (!entry->msi_attrib.is_64 && !phb->msi32_support) {
329 pr_warn("%s: Supports only 64-bit MSIs\n",
330 pci_name(pdev));
331 return -ENXIO;
332 }
333
334 hwirq = cxl_next_msi_hwirq(pdev, &ctx, &afu_irq);
335 if (WARN_ON(hwirq <= 0))
336 return (hwirq ? hwirq : -ENOMEM);
337
338 virq = irq_create_mapping(NULL, hwirq);
339 if (!virq) {
340 pr_warn("%s: Failed to map cxl mode MSI to linux irq\n",
341 pci_name(pdev));
342 return -ENOMEM;
343 }
344
345 rc = pnv_cxl_ioda_msi_setup(pdev, hwirq, virq);
346 if (rc) {
347 pr_warn("%s: Failed to setup cxl mode MSI\n", pci_name(pdev));
348 irq_dispose_mapping(virq);
349 return rc;
350 }
351
352 irq_set_msi_desc(virq, entry);
353 }
354
355 return 0;
356}
357
358void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev)
359{
360 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
361 struct pnv_phb *phb = hose->private_data;
362 struct msi_desc *entry;
363 irq_hw_number_t hwirq;
364
365 if (WARN_ON(!phb))
366 return;
367
368 for_each_pci_msi_entry(entry, pdev) {
369 if (!entry->irq)
370 continue;
371 hwirq = virq_to_hw(entry->irq);
372 irq_set_msi_desc(entry->irq, NULL);
373 irq_dispose_mapping(entry->irq);
374 }
375
376 cxl_cx4_teardown_msi_irqs(pdev);
377}
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index ab678177d36e..5b819c55868d 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -3847,10 +3847,6 @@ static const struct pci_controller_ops pnv_npu_ocapi_ioda_controller_ops = {
3847const struct pci_controller_ops pnv_cxl_cx4_ioda_controller_ops = { 3847const struct pci_controller_ops pnv_cxl_cx4_ioda_controller_ops = {
3848 .dma_dev_setup = pnv_pci_dma_dev_setup, 3848 .dma_dev_setup = pnv_pci_dma_dev_setup,
3849 .dma_bus_setup = pnv_pci_dma_bus_setup, 3849 .dma_bus_setup = pnv_pci_dma_bus_setup,
3850#ifdef CONFIG_PCI_MSI
3851 .setup_msi_irqs = pnv_cxl_cx4_setup_msi_irqs,
3852 .teardown_msi_irqs = pnv_cxl_cx4_teardown_msi_irqs,
3853#endif
3854 .enable_device_hook = pnv_cxl_enable_device_hook, 3850 .enable_device_hook = pnv_cxl_enable_device_hook,
3855 .disable_device = pnv_cxl_disable_device, 3851 .disable_device = pnv_cxl_disable_device,
3856 .release_device = pnv_pci_release_device, 3852 .release_device = pnv_pci_release_device,
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index eada4b6068cb..ba41913c7e21 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -265,8 +265,6 @@ extern int pnv_npu2_init(struct pnv_phb *phb);
265/* cxl functions */ 265/* cxl functions */
266extern bool pnv_cxl_enable_device_hook(struct pci_dev *dev); 266extern bool pnv_cxl_enable_device_hook(struct pci_dev *dev);
267extern void pnv_cxl_disable_device(struct pci_dev *dev); 267extern void pnv_cxl_disable_device(struct pci_dev *dev);
268extern int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
269extern void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev);
270 268
271 269
272/* phb ops (cxl switches these when enabling the kernel api on the phb) */ 270/* phb ops (cxl switches these when enabling the kernel api on the phb) */
diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c
index 21d620e29fea..2e5862b7a074 100644
--- a/drivers/misc/cxl/api.c
+++ b/drivers/misc/cxl/api.c
@@ -11,7 +11,6 @@
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include <linux/file.h> 12#include <linux/file.h>
13#include <misc/cxl.h> 13#include <misc/cxl.h>
14#include <linux/msi.h>
15#include <linux/module.h> 14#include <linux/module.h>
16#include <linux/mount.h> 15#include <linux/mount.h>
17#include <linux/sched/mm.h> 16#include <linux/sched/mm.h>
@@ -595,73 +594,3 @@ int cxl_get_max_irqs_per_process(struct pci_dev *dev)
595 return afu->irqs_max; 594 return afu->irqs_max;
596} 595}
597EXPORT_SYMBOL_GPL(cxl_get_max_irqs_per_process); 596EXPORT_SYMBOL_GPL(cxl_get_max_irqs_per_process);
598
599/*
600 * This is a special interrupt allocation routine called from the PHB's MSI
601 * setup function. When capi interrupts are allocated in this manner they must
602 * still be associated with a running context, but since the MSI APIs have no
603 * way to specify this we use the default context associated with the device.
604 *
605 * The Mellanox CX4 has a hardware limitation that restricts the maximum AFU
606 * interrupt number, so in order to overcome this their driver informs us of
607 * the restriction by setting the maximum interrupts per context, and we
608 * allocate additional contexts as necessary so that we can keep the AFU
609 * interrupt number within the supported range.
610 */
611int _cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
612{
613 struct cxl_context *ctx, *new_ctx, *default_ctx;
614 int remaining;
615 int rc;
616
617 ctx = default_ctx = cxl_get_context(pdev);
618 if (WARN_ON(!default_ctx))
619 return -ENODEV;
620
621 remaining = nvec;
622 while (remaining > 0) {
623 rc = cxl_allocate_afu_irqs(ctx, min(remaining, ctx->afu->irqs_max));
624 if (rc) {
625 pr_warn("%s: Failed to find enough free MSIs\n", pci_name(pdev));
626 return rc;
627 }
628 remaining -= ctx->afu->irqs_max;
629
630 if (ctx != default_ctx && default_ctx->status == STARTED) {
631 WARN_ON(cxl_start_context(ctx,
632 be64_to_cpu(default_ctx->elem->common.wed),
633 NULL));
634 }
635
636 if (remaining > 0) {
637 new_ctx = cxl_dev_context_init(pdev);
638 if (IS_ERR(new_ctx)) {
639 pr_warn("%s: Failed to allocate enough contexts for MSIs\n", pci_name(pdev));
640 return -ENOSPC;
641 }
642 list_add(&new_ctx->extra_irq_contexts, &ctx->extra_irq_contexts);
643 ctx = new_ctx;
644 }
645 }
646
647 return 0;
648}
649/* Exported via cxl_base */
650
651void _cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev)
652{
653 struct cxl_context *ctx, *pos, *tmp;
654
655 ctx = cxl_get_context(pdev);
656 if (WARN_ON(!ctx))
657 return;
658
659 cxl_free_afu_irqs(ctx);
660 list_for_each_entry_safe(pos, tmp, &ctx->extra_irq_contexts, extra_irq_contexts) {
661 cxl_stop_context(pos);
662 cxl_free_afu_irqs(pos);
663 list_del(&pos->extra_irq_contexts);
664 cxl_release_context(pos);
665 }
666}
667/* Exported via cxl_base */
diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c
index cd54ce6f6230..fe90f895bb10 100644
--- a/drivers/misc/cxl/base.c
+++ b/drivers/misc/cxl/base.c
@@ -158,37 +158,6 @@ int cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_
158} 158}
159EXPORT_SYMBOL_GPL(cxl_next_msi_hwirq); 159EXPORT_SYMBOL_GPL(cxl_next_msi_hwirq);
160 160
161int cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
162{
163 int ret;
164 struct cxl_calls *calls;
165
166 calls = cxl_calls_get();
167 if (!calls)
168 return false;
169
170 ret = calls->cxl_cx4_setup_msi_irqs(pdev, nvec, type);
171
172 cxl_calls_put(calls);
173
174 return ret;
175}
176EXPORT_SYMBOL_GPL(cxl_cx4_setup_msi_irqs);
177
178void cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev)
179{
180 struct cxl_calls *calls;
181
182 calls = cxl_calls_get();
183 if (!calls)
184 return;
185
186 calls->cxl_cx4_teardown_msi_irqs(pdev);
187
188 cxl_calls_put(calls);
189}
190EXPORT_SYMBOL_GPL(cxl_cx4_teardown_msi_irqs);
191
192static int __init cxl_base_init(void) 161static int __init cxl_base_init(void)
193{ 162{
194 struct device_node *np; 163 struct device_node *np;
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index af8794719956..9688fe8b4d80 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -879,16 +879,12 @@ ssize_t cxl_pci_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
879bool _cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu); 879bool _cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu);
880void _cxl_pci_disable_device(struct pci_dev *dev); 880void _cxl_pci_disable_device(struct pci_dev *dev);
881int _cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq); 881int _cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq);
882int _cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
883void _cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev);
884 882
885struct cxl_calls { 883struct cxl_calls {
886 void (*cxl_slbia)(struct mm_struct *mm); 884 void (*cxl_slbia)(struct mm_struct *mm);
887 bool (*cxl_pci_associate_default_context)(struct pci_dev *dev, struct cxl_afu *afu); 885 bool (*cxl_pci_associate_default_context)(struct pci_dev *dev, struct cxl_afu *afu);
888 void (*cxl_pci_disable_device)(struct pci_dev *dev); 886 void (*cxl_pci_disable_device)(struct pci_dev *dev);
889 int (*cxl_next_msi_hwirq)(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq); 887 int (*cxl_next_msi_hwirq)(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq);
890 int (*cxl_cx4_setup_msi_irqs)(struct pci_dev *pdev, int nvec, int type);
891 void (*cxl_cx4_teardown_msi_irqs)(struct pci_dev *pdev);
892 888
893 struct module *owner; 889 struct module *owner;
894}; 890};
diff --git a/drivers/misc/cxl/main.c b/drivers/misc/cxl/main.c
index c1ba0d42cbc8..59a904efd104 100644
--- a/drivers/misc/cxl/main.c
+++ b/drivers/misc/cxl/main.c
@@ -107,8 +107,6 @@ static struct cxl_calls cxl_calls = {
107 .cxl_pci_associate_default_context = _cxl_pci_associate_default_context, 107 .cxl_pci_associate_default_context = _cxl_pci_associate_default_context,
108 .cxl_pci_disable_device = _cxl_pci_disable_device, 108 .cxl_pci_disable_device = _cxl_pci_disable_device,
109 .cxl_next_msi_hwirq = _cxl_next_msi_hwirq, 109 .cxl_next_msi_hwirq = _cxl_next_msi_hwirq,
110 .cxl_cx4_setup_msi_irqs = _cxl_cx4_setup_msi_irqs,
111 .cxl_cx4_teardown_msi_irqs = _cxl_cx4_teardown_msi_irqs,
112 .owner = THIS_MODULE, 110 .owner = THIS_MODULE,
113}; 111};
114 112
diff --git a/include/misc/cxl-base.h b/include/misc/cxl-base.h
index b2ebc91fe09a..bb7e629ae492 100644
--- a/include/misc/cxl-base.h
+++ b/include/misc/cxl-base.h
@@ -43,8 +43,6 @@ void cxl_afu_put(struct cxl_afu *afu);
43void cxl_slbia(struct mm_struct *mm); 43void cxl_slbia(struct mm_struct *mm);
44bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu); 44bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu);
45void cxl_pci_disable_device(struct pci_dev *dev); 45void cxl_pci_disable_device(struct pci_dev *dev);
46int cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
47void cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev);
48 46
49#else /* CONFIG_CXL_BASE */ 47#else /* CONFIG_CXL_BASE */
50 48
@@ -54,8 +52,6 @@ static inline void cxl_afu_put(struct cxl_afu *afu) {}
54static inline void cxl_slbia(struct mm_struct *mm) {} 52static inline void cxl_slbia(struct mm_struct *mm) {}
55static inline bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu) { return false; } 53static inline bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu) { return false; }
56static inline void cxl_pci_disable_device(struct pci_dev *dev) {} 54static inline void cxl_pci_disable_device(struct pci_dev *dev) {}
57static inline int cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) { return -ENODEV; }
58static inline void cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev) {}
59 55
60#endif /* CONFIG_CXL_BASE */ 56#endif /* CONFIG_CXL_BASE */
61 57