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authorDavid S. Miller <davem@davemloft.net>2014-05-23 16:28:18 -0400
committerDavid S. Miller <davem@davemloft.net>2014-05-23 16:28:18 -0400
commit0c3592b821eb4069c8ab3934fc0e78f358d88ae4 (patch)
tree56b149cd0d9a8ae957f1fb8ddfa800dde1aeec07
parentebb0531ba22042db78348906b7b39d194d5d927f (diff)
parent41457f64da53112996d2ac607fbb2681e71a9e97 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next
Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates This series contains updates to igb, igbvf, ixgbe, i40e and i40evf. Jacob provides eight patches to cleanup the ixgbe driver to resolve various checkpatch.pl warnings/errors as well as minor coding style issues. Stephen Hemminger and I provide simple cleanups of void functions which had useless return statements at the end of the function which are not needed. v2: Dropped Emil's patch "ixgbe: fix the detection of SFP+ capable interfaces" while I wait for his updated patch to be validated. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_main.c4
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40evf_main.c4
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_nvm.c1
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c1
-rw-r--r--drivers/net/ethernet/intel/igbvf/ethtool.c1
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe.h2
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c62
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c85
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.c45
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.h16
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c3
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h24
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c28
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c3
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c83
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c4
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_main.c4
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c10
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h6
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c68
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h32
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c4
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_type.h60
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c15
24 files changed, 271 insertions, 294 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 96f7fabd8758..8e15ced897a6 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -6836,7 +6836,6 @@ static void i40e_vsi_delete(struct i40e_vsi *vsi)
6836 return; 6836 return;
6837 6837
6838 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); 6838 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6839 return;
6840} 6839}
6841 6840
6842/** 6841/**
@@ -7576,8 +7575,6 @@ void i40e_veb_release(struct i40e_veb *veb)
7576 7575
7577 i40e_aq_delete_element(&pf->hw, veb->seid, NULL); 7576 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7578 i40e_veb_clear(veb); 7577 i40e_veb_clear(veb);
7579
7580 return;
7581} 7578}
7582 7579
7583/** 7580/**
@@ -8058,7 +8055,6 @@ static void i40e_determine_queue_usage(struct i40e_pf *pf)
8058 } 8055 }
8059 8056
8060 pf->queues_left = queues_left; 8057 pf->queues_left = queues_left;
8061 return;
8062} 8058}
8063 8059
8064/** 8060/**
diff --git a/drivers/net/ethernet/intel/i40evf/i40evf_main.c b/drivers/net/ethernet/intel/i40evf/i40evf_main.c
index 6f6bd3f01801..8dbaa7798485 100644
--- a/drivers/net/ethernet/intel/i40evf/i40evf_main.c
+++ b/drivers/net/ethernet/intel/i40evf/i40evf_main.c
@@ -693,7 +693,6 @@ static void i40evf_del_vlan(struct i40evf_adapter *adapter, u16 vlan)
693 f->remove = true; 693 f->remove = true;
694 adapter->aq_required |= I40EVF_FLAG_AQ_DEL_VLAN_FILTER; 694 adapter->aq_required |= I40EVF_FLAG_AQ_DEL_VLAN_FILTER;
695 } 695 }
696 return;
697} 696}
698 697
699/** 698/**
@@ -1232,8 +1231,6 @@ void i40evf_reset_interrupt_capability(struct i40evf_adapter *adapter)
1232 pci_disable_msix(adapter->pdev); 1231 pci_disable_msix(adapter->pdev);
1233 kfree(adapter->msix_entries); 1232 kfree(adapter->msix_entries);
1234 adapter->msix_entries = NULL; 1233 adapter->msix_entries = NULL;
1235
1236 return;
1237} 1234}
1238 1235
1239/** 1236/**
@@ -2158,7 +2155,6 @@ err:
2158 return; /* do not reschedule */ 2155 return; /* do not reschedule */
2159 } 2156 }
2160 schedule_delayed_work(&adapter->init_task, HZ * 3); 2157 schedule_delayed_work(&adapter->init_task, HZ * 3);
2161 return;
2162} 2158}
2163 2159
2164/** 2160/**
diff --git a/drivers/net/ethernet/intel/igb/e1000_nvm.c b/drivers/net/ethernet/intel/igb/e1000_nvm.c
index 92bcdbe756b2..e8280d0d7f02 100644
--- a/drivers/net/ethernet/intel/igb/e1000_nvm.c
+++ b/drivers/net/ethernet/intel/igb/e1000_nvm.c
@@ -798,5 +798,4 @@ etrack_id:
798 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) 798 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT)
799 | eeprom_verl; 799 | eeprom_verl;
800 } 800 }
801 return;
802} 801}
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index 1075b3f8c415..ea2868b22c2d 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -2139,7 +2139,6 @@ void igb_set_fw_version(struct igb_adapter *adapter)
2139 } 2139 }
2140 break; 2140 break;
2141 } 2141 }
2142 return;
2143} 2142}
2144 2143
2145/** 2144/**
diff --git a/drivers/net/ethernet/intel/igbvf/ethtool.c b/drivers/net/ethernet/intel/igbvf/ethtool.c
index f58170bae18b..7d4e8559e2e9 100644
--- a/drivers/net/ethernet/intel/igbvf/ethtool.c
+++ b/drivers/net/ethernet/intel/igbvf/ethtool.c
@@ -119,7 +119,6 @@ static int igbvf_set_settings(struct net_device *netdev,
119static void igbvf_get_pauseparam(struct net_device *netdev, 119static void igbvf_get_pauseparam(struct net_device *netdev,
120 struct ethtool_pauseparam *pause) 120 struct ethtool_pauseparam *pause)
121{ 121{
122 return;
123} 122}
124 123
125static int igbvf_set_pauseparam(struct net_device *netdev, 124static int igbvf_set_pauseparam(struct net_device *netdev,
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index c688c8a4c063..4c0203b01941 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -362,7 +362,7 @@ struct ixgbe_ring_container {
362 for (pos = (head).ring; pos != NULL; pos = pos->next) 362 for (pos = (head).ring; pos != NULL; pos = pos->next)
363 363
364#define MAX_RX_PACKET_BUFFERS ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) \ 364#define MAX_RX_PACKET_BUFFERS ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) \
365 ? 8 : 1) 365 ? 8 : 1)
366#define MAX_TX_PACKET_BUFFERS MAX_RX_PACKET_BUFFERS 366#define MAX_TX_PACKET_BUFFERS MAX_RX_PACKET_BUFFERS
367 367
368/* MAX_Q_VECTORS of these are allocated, 368/* MAX_Q_VECTORS of these are allocated,
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
index 1c52e4753480..15609331ec17 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
@@ -41,10 +41,10 @@
41#define IXGBE_82598_RX_PB_SIZE 512 41#define IXGBE_82598_RX_PB_SIZE 512
42 42
43static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw, 43static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
44 ixgbe_link_speed speed, 44 ixgbe_link_speed speed,
45 bool autoneg_wait_to_complete); 45 bool autoneg_wait_to_complete);
46static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, 46static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
47 u8 *eeprom_data); 47 u8 *eeprom_data);
48 48
49/** 49/**
50 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout 50 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
@@ -140,7 +140,7 @@ static s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)
140 phy->ops.setup_link = &ixgbe_setup_phy_link_tnx; 140 phy->ops.setup_link = &ixgbe_setup_phy_link_tnx;
141 phy->ops.check_link = &ixgbe_check_phy_link_tnx; 141 phy->ops.check_link = &ixgbe_check_phy_link_tnx;
142 phy->ops.get_firmware_version = 142 phy->ops.get_firmware_version =
143 &ixgbe_get_phy_firmware_version_tnx; 143 &ixgbe_get_phy_firmware_version_tnx;
144 break; 144 break;
145 case ixgbe_phy_nl: 145 case ixgbe_phy_nl:
146 phy->ops.reset = &ixgbe_reset_phy_nl; 146 phy->ops.reset = &ixgbe_reset_phy_nl;
@@ -156,8 +156,8 @@ static s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)
156 156
157 /* Check to see if SFP+ module is supported */ 157 /* Check to see if SFP+ module is supported */
158 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, 158 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw,
159 &list_offset, 159 &list_offset,
160 &data_offset); 160 &data_offset);
161 if (ret_val != 0) { 161 if (ret_val != 0) {
162 ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED; 162 ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED;
163 goto out; 163 goto out;
@@ -219,8 +219,8 @@ static s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
219 * Determines the link capabilities by reading the AUTOC register. 219 * Determines the link capabilities by reading the AUTOC register.
220 **/ 220 **/
221static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw, 221static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
222 ixgbe_link_speed *speed, 222 ixgbe_link_speed *speed,
223 bool *autoneg) 223 bool *autoneg)
224{ 224{
225 s32 status = 0; 225 s32 status = 0;
226 u32 autoc = 0; 226 u32 autoc = 0;
@@ -473,7 +473,7 @@ out:
473 * Restarts the link. Performs autonegotiation if needed. 473 * Restarts the link. Performs autonegotiation if needed.
474 **/ 474 **/
475static s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw, 475static s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw,
476 bool autoneg_wait_to_complete) 476 bool autoneg_wait_to_complete)
477{ 477{
478 u32 autoc_reg; 478 u32 autoc_reg;
479 u32 links_reg; 479 u32 links_reg;
@@ -555,8 +555,8 @@ static s32 ixgbe_validate_link_ready(struct ixgbe_hw *hw)
555 * Reads the links register to determine if link is up and the current speed 555 * Reads the links register to determine if link is up and the current speed
556 **/ 556 **/
557static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, 557static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
558 ixgbe_link_speed *speed, bool *link_up, 558 ixgbe_link_speed *speed, bool *link_up,
559 bool link_up_wait_to_complete) 559 bool link_up_wait_to_complete)
560{ 560{
561 u32 links_reg; 561 u32 links_reg;
562 u32 i; 562 u32 i;
@@ -572,7 +572,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
572 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg); 572 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg);
573 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg); 573 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg);
574 hw->phy.ops.read_reg(hw, 0xC00C, MDIO_MMD_PMAPMD, 574 hw->phy.ops.read_reg(hw, 0xC00C, MDIO_MMD_PMAPMD,
575 &adapt_comp_reg); 575 &adapt_comp_reg);
576 if (link_up_wait_to_complete) { 576 if (link_up_wait_to_complete) {
577 for (i = 0; i < IXGBE_LINK_UP_TIME; i++) { 577 for (i = 0; i < IXGBE_LINK_UP_TIME; i++) {
578 if ((link_reg & 1) && 578 if ((link_reg & 1) &&
@@ -584,11 +584,11 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
584 } 584 }
585 msleep(100); 585 msleep(100);
586 hw->phy.ops.read_reg(hw, 0xC79F, 586 hw->phy.ops.read_reg(hw, 0xC79F,
587 MDIO_MMD_PMAPMD, 587 MDIO_MMD_PMAPMD,
588 &link_reg); 588 &link_reg);
589 hw->phy.ops.read_reg(hw, 0xC00C, 589 hw->phy.ops.read_reg(hw, 0xC00C,
590 MDIO_MMD_PMAPMD, 590 MDIO_MMD_PMAPMD,
591 &adapt_comp_reg); 591 &adapt_comp_reg);
592 } 592 }
593 } else { 593 } else {
594 if ((link_reg & 1) && ((adapt_comp_reg & 1) == 0)) 594 if ((link_reg & 1) && ((adapt_comp_reg & 1) == 0))
@@ -661,7 +661,7 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
661 661
662 /* Set KX4/KX support according to speed requested */ 662 /* Set KX4/KX support according to speed requested */
663 else if (link_mode == IXGBE_AUTOC_LMS_KX4_AN || 663 else if (link_mode == IXGBE_AUTOC_LMS_KX4_AN ||
664 link_mode == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) { 664 link_mode == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
665 autoc &= ~IXGBE_AUTOC_KX4_KX_SUPP_MASK; 665 autoc &= ~IXGBE_AUTOC_KX4_KX_SUPP_MASK;
666 if (speed & IXGBE_LINK_SPEED_10GB_FULL) 666 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
667 autoc |= IXGBE_AUTOC_KX4_SUPP; 667 autoc |= IXGBE_AUTOC_KX4_SUPP;
@@ -694,14 +694,14 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
694 * Sets the link speed in the AUTOC register in the MAC and restarts link. 694 * Sets the link speed in the AUTOC register in the MAC and restarts link.
695 **/ 695 **/
696static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw, 696static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
697 ixgbe_link_speed speed, 697 ixgbe_link_speed speed,
698 bool autoneg_wait_to_complete) 698 bool autoneg_wait_to_complete)
699{ 699{
700 s32 status; 700 s32 status;
701 701
702 /* Setup the PHY according to input speed */ 702 /* Setup the PHY according to input speed */
703 status = hw->phy.ops.setup_link_speed(hw, speed, 703 status = hw->phy.ops.setup_link_speed(hw, speed,
704 autoneg_wait_to_complete); 704 autoneg_wait_to_complete);
705 /* Set up MAC */ 705 /* Set up MAC */
706 ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete); 706 ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete);
707 707
@@ -740,28 +740,28 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
740 if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) { 740 if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) {
741 /* Enable Tx Atlas so packets can be transmitted again */ 741 /* Enable Tx Atlas so packets can be transmitted again */
742 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, 742 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,
743 &analog_val); 743 &analog_val);
744 analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN; 744 analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN;
745 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, 745 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,
746 analog_val); 746 analog_val);
747 747
748 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, 748 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,
749 &analog_val); 749 &analog_val);
750 analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL; 750 analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
751 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, 751 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,
752 analog_val); 752 analog_val);
753 753
754 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, 754 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,
755 &analog_val); 755 &analog_val);
756 analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL; 756 analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
757 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, 757 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,
758 analog_val); 758 analog_val);
759 759
760 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, 760 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,
761 &analog_val); 761 &analog_val);
762 analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL; 762 analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
763 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, 763 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,
764 analog_val); 764 analog_val);
765 } 765 }
766 766
767 /* Reset PHY */ 767 /* Reset PHY */
@@ -960,7 +960,7 @@ static s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw)
960 for (vlanbyte = 0; vlanbyte < 4; vlanbyte++) 960 for (vlanbyte = 0; vlanbyte < 4; vlanbyte++)
961 for (offset = 0; offset < hw->mac.vft_size; offset++) 961 for (offset = 0; offset < hw->mac.vft_size; offset++)
962 IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset), 962 IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset),
963 0); 963 0);
964 964
965 return 0; 965 return 0;
966} 966}
@@ -978,7 +978,7 @@ static s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)
978 u32 atlas_ctl; 978 u32 atlas_ctl;
979 979
980 IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, 980 IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL,
981 IXGBE_ATLASCTL_WRITE_CMD | (reg << 8)); 981 IXGBE_ATLASCTL_WRITE_CMD | (reg << 8));
982 IXGBE_WRITE_FLUSH(hw); 982 IXGBE_WRITE_FLUSH(hw);
983 udelay(10); 983 udelay(10);
984 atlas_ctl = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); 984 atlas_ctl = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
@@ -1278,8 +1278,6 @@ static void ixgbe_set_rxpba_82598(struct ixgbe_hw *hw, int num_pb,
1278 /* Setup Tx packet buffer sizes */ 1278 /* Setup Tx packet buffer sizes */
1279 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) 1279 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++)
1280 IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), IXGBE_TXPBSIZE_40KB); 1280 IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), IXGBE_TXPBSIZE_40KB);
1281
1282 return;
1283} 1281}
1284 1282
1285static struct ixgbe_mac_operations mac_ops_82598 = { 1283static struct ixgbe_mac_operations mac_ops_82598 = {
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
index f32b3dd1ba8e..bc7c924240a5 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
@@ -48,17 +48,17 @@ static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
48 ixgbe_link_speed speed, 48 ixgbe_link_speed speed,
49 bool autoneg_wait_to_complete); 49 bool autoneg_wait_to_complete);
50static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw, 50static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
51 ixgbe_link_speed speed, 51 ixgbe_link_speed speed,
52 bool autoneg_wait_to_complete); 52 bool autoneg_wait_to_complete);
53static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw); 53static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
54static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw, 54static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
55 bool autoneg_wait_to_complete); 55 bool autoneg_wait_to_complete);
56static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw, 56static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
57 ixgbe_link_speed speed, 57 ixgbe_link_speed speed,
58 bool autoneg_wait_to_complete); 58 bool autoneg_wait_to_complete);
59static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw, 59static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
60 ixgbe_link_speed speed, 60 ixgbe_link_speed speed,
61 bool autoneg_wait_to_complete); 61 bool autoneg_wait_to_complete);
62static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw); 62static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw);
63static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, 63static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
64 u8 dev_addr, u8 *data); 64 u8 dev_addr, u8 *data);
@@ -96,9 +96,9 @@ static void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw)
96 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && 96 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
97 !ixgbe_mng_enabled(hw)) { 97 !ixgbe_mng_enabled(hw)) {
98 mac->ops.disable_tx_laser = 98 mac->ops.disable_tx_laser =
99 &ixgbe_disable_tx_laser_multispeed_fiber; 99 &ixgbe_disable_tx_laser_multispeed_fiber;
100 mac->ops.enable_tx_laser = 100 mac->ops.enable_tx_laser =
101 &ixgbe_enable_tx_laser_multispeed_fiber; 101 &ixgbe_enable_tx_laser_multispeed_fiber;
102 mac->ops.flap_tx_laser = &ixgbe_flap_tx_laser_multispeed_fiber; 102 mac->ops.flap_tx_laser = &ixgbe_flap_tx_laser_multispeed_fiber;
103 } else { 103 } else {
104 mac->ops.disable_tx_laser = NULL; 104 mac->ops.disable_tx_laser = NULL;
@@ -132,13 +132,13 @@ static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
132 hw->phy.ops.reset = NULL; 132 hw->phy.ops.reset = NULL;
133 133
134 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, 134 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,
135 &data_offset); 135 &data_offset);
136 if (ret_val != 0) 136 if (ret_val != 0)
137 goto setup_sfp_out; 137 goto setup_sfp_out;
138 138
139 /* PHY config will finish before releasing the semaphore */ 139 /* PHY config will finish before releasing the semaphore */
140 ret_val = hw->mac.ops.acquire_swfw_sync(hw, 140 ret_val = hw->mac.ops.acquire_swfw_sync(hw,
141 IXGBE_GSSR_MAC_CSR_SM); 141 IXGBE_GSSR_MAC_CSR_SM);
142 if (ret_val != 0) { 142 if (ret_val != 0) {
143 ret_val = IXGBE_ERR_SWFW_SYNC; 143 ret_val = IXGBE_ERR_SWFW_SYNC;
144 goto setup_sfp_out; 144 goto setup_sfp_out;
@@ -334,7 +334,7 @@ static s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
334 phy->ops.check_link = &ixgbe_check_phy_link_tnx; 334 phy->ops.check_link = &ixgbe_check_phy_link_tnx;
335 phy->ops.setup_link = &ixgbe_setup_phy_link_tnx; 335 phy->ops.setup_link = &ixgbe_setup_phy_link_tnx;
336 phy->ops.get_firmware_version = 336 phy->ops.get_firmware_version =
337 &ixgbe_get_phy_firmware_version_tnx; 337 &ixgbe_get_phy_firmware_version_tnx;
338 break; 338 break;
339 default: 339 default:
340 break; 340 break;
@@ -352,7 +352,7 @@ static s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)
352 * Determines the link capabilities by reading the AUTOC register. 352 * Determines the link capabilities by reading the AUTOC register.
353 **/ 353 **/
354static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, 354static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
355 ixgbe_link_speed *speed, 355 ixgbe_link_speed *speed,
356 bool *autoneg) 356 bool *autoneg)
357{ 357{
358 s32 status = 0; 358 s32 status = 0;
@@ -543,7 +543,7 @@ static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw)
543 * Restarts the link. Performs autonegotiation if needed. 543 * Restarts the link. Performs autonegotiation if needed.
544 **/ 544 **/
545static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw, 545static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
546 bool autoneg_wait_to_complete) 546 bool autoneg_wait_to_complete)
547{ 547{
548 u32 autoc_reg; 548 u32 autoc_reg;
549 u32 links_reg; 549 u32 links_reg;
@@ -672,8 +672,8 @@ static void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)
672 * Set the link speed in the AUTOC register and restarts link. 672 * Set the link speed in the AUTOC register and restarts link.
673 **/ 673 **/
674static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, 674static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
675 ixgbe_link_speed speed, 675 ixgbe_link_speed speed,
676 bool autoneg_wait_to_complete) 676 bool autoneg_wait_to_complete)
677{ 677{
678 s32 status = 0; 678 s32 status = 0;
679 ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_UNKNOWN; 679 ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_UNKNOWN;
@@ -820,8 +820,8 @@ static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
820 */ 820 */
821 if (speedcnt > 1) 821 if (speedcnt > 1)
822 status = ixgbe_setup_mac_link_multispeed_fiber(hw, 822 status = ixgbe_setup_mac_link_multispeed_fiber(hw,
823 highest_link_speed, 823 highest_link_speed,
824 autoneg_wait_to_complete); 824 autoneg_wait_to_complete);
825 825
826out: 826out:
827 /* Set autoneg_advertised value based on input link speed */ 827 /* Set autoneg_advertised value based on input link speed */
@@ -1009,8 +1009,8 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
1009 if (speed & IXGBE_LINK_SPEED_1GB_FULL) 1009 if (speed & IXGBE_LINK_SPEED_1GB_FULL)
1010 autoc |= IXGBE_AUTOC_KX_SUPP; 1010 autoc |= IXGBE_AUTOC_KX_SUPP;
1011 } else if ((pma_pmd_1g == IXGBE_AUTOC_1G_SFI) && 1011 } else if ((pma_pmd_1g == IXGBE_AUTOC_1G_SFI) &&
1012 (link_mode == IXGBE_AUTOC_LMS_1G_LINK_NO_AN || 1012 (link_mode == IXGBE_AUTOC_LMS_1G_LINK_NO_AN ||
1013 link_mode == IXGBE_AUTOC_LMS_1G_AN)) { 1013 link_mode == IXGBE_AUTOC_LMS_1G_AN)) {
1014 /* Switch from 1G SFI to 10G SFI if requested */ 1014 /* Switch from 1G SFI to 10G SFI if requested */
1015 if ((speed == IXGBE_LINK_SPEED_10GB_FULL) && 1015 if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
1016 (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI)) { 1016 (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI)) {
@@ -1018,7 +1018,7 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
1018 autoc |= IXGBE_AUTOC_LMS_10G_SERIAL; 1018 autoc |= IXGBE_AUTOC_LMS_10G_SERIAL;
1019 } 1019 }
1020 } else if ((pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI) && 1020 } else if ((pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI) &&
1021 (link_mode == IXGBE_AUTOC_LMS_10G_SERIAL)) { 1021 (link_mode == IXGBE_AUTOC_LMS_10G_SERIAL)) {
1022 /* Switch from 10G SFI to 1G SFI if requested */ 1022 /* Switch from 10G SFI to 1G SFI if requested */
1023 if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && 1023 if ((speed == IXGBE_LINK_SPEED_1GB_FULL) &&
1024 (pma_pmd_1g == IXGBE_AUTOC_1G_SFI)) { 1024 (pma_pmd_1g == IXGBE_AUTOC_1G_SFI)) {
@@ -1051,7 +1051,7 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
1051 } 1051 }
1052 if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) { 1052 if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
1053 status = 1053 status =
1054 IXGBE_ERR_AUTONEG_NOT_COMPLETE; 1054 IXGBE_ERR_AUTONEG_NOT_COMPLETE;
1055 hw_dbg(hw, "Autoneg did not complete.\n"); 1055 hw_dbg(hw, "Autoneg did not complete.\n");
1056 } 1056 }
1057 } 1057 }
@@ -1074,14 +1074,14 @@ out:
1074 * Restarts link on PHY and MAC based on settings passed in. 1074 * Restarts link on PHY and MAC based on settings passed in.
1075 **/ 1075 **/
1076static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw, 1076static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
1077 ixgbe_link_speed speed, 1077 ixgbe_link_speed speed,
1078 bool autoneg_wait_to_complete) 1078 bool autoneg_wait_to_complete)
1079{ 1079{
1080 s32 status; 1080 s32 status;
1081 1081
1082 /* Setup the PHY according to input speed */ 1082 /* Setup the PHY according to input speed */
1083 status = hw->phy.ops.setup_link_speed(hw, speed, 1083 status = hw->phy.ops.setup_link_speed(hw, speed,
1084 autoneg_wait_to_complete); 1084 autoneg_wait_to_complete);
1085 /* Set up MAC */ 1085 /* Set up MAC */
1086 ixgbe_start_mac_link_82599(hw, autoneg_wait_to_complete); 1086 ixgbe_start_mac_link_82599(hw, autoneg_wait_to_complete);
1087 1087
@@ -1224,7 +1224,7 @@ mac_reset_top:
1224 (hw->mac.orig_autoc2 & IXGBE_AUTOC2_UPPER_MASK)) { 1224 (hw->mac.orig_autoc2 & IXGBE_AUTOC2_UPPER_MASK)) {
1225 autoc2 &= ~IXGBE_AUTOC2_UPPER_MASK; 1225 autoc2 &= ~IXGBE_AUTOC2_UPPER_MASK;
1226 autoc2 |= (hw->mac.orig_autoc2 & 1226 autoc2 |= (hw->mac.orig_autoc2 &
1227 IXGBE_AUTOC2_UPPER_MASK); 1227 IXGBE_AUTOC2_UPPER_MASK);
1228 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2); 1228 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2);
1229 } 1229 }
1230 } 1230 }
@@ -1246,7 +1246,7 @@ mac_reset_top:
1246 /* Add the SAN MAC address to the RAR only if it's a valid address */ 1246 /* Add the SAN MAC address to the RAR only if it's a valid address */
1247 if (is_valid_ether_addr(hw->mac.san_addr)) { 1247 if (is_valid_ether_addr(hw->mac.san_addr)) {
1248 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1, 1248 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
1249 hw->mac.san_addr, 0, IXGBE_RAH_AV); 1249 hw->mac.san_addr, 0, IXGBE_RAH_AV);
1250 1250
1251 /* Save the SAN MAC RAR index */ 1251 /* Save the SAN MAC RAR index */
1252 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; 1252 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;
@@ -1257,7 +1257,7 @@ mac_reset_top:
1257 1257
1258 /* Store the alternative WWNN/WWPN prefix */ 1258 /* Store the alternative WWNN/WWPN prefix */
1259 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, 1259 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,
1260 &hw->mac.wwpn_prefix); 1260 &hw->mac.wwpn_prefix);
1261 1261
1262reset_hw_out: 1262reset_hw_out:
1263 return status; 1263 return status;
@@ -1271,6 +1271,7 @@ s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)
1271{ 1271{
1272 int i; 1272 int i;
1273 u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL); 1273 u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);
1274
1274 fdirctrl &= ~IXGBE_FDIRCTRL_INIT_DONE; 1275 fdirctrl &= ~IXGBE_FDIRCTRL_INIT_DONE;
1275 1276
1276 /* 1277 /*
@@ -1284,8 +1285,7 @@ s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)
1284 udelay(10); 1285 udelay(10);
1285 } 1286 }
1286 if (i >= IXGBE_FDIRCMD_CMD_POLL) { 1287 if (i >= IXGBE_FDIRCMD_CMD_POLL) {
1287 hw_dbg(hw, "Flow Director previous command isn't complete, " 1288 hw_dbg(hw, "Flow Director previous command isn't complete, aborting table re-initialization.\n");
1288 "aborting table re-initialization.\n");
1289 return IXGBE_ERR_FDIR_REINIT_FAILED; 1289 return IXGBE_ERR_FDIR_REINIT_FAILED;
1290 } 1290 }
1291 1291
@@ -1299,12 +1299,12 @@ s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)
1299 * - write 0 to bit 8 of FDIRCMD register 1299 * - write 0 to bit 8 of FDIRCMD register
1300 */ 1300 */
1301 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, 1301 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
1302 (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) | 1302 (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) |
1303 IXGBE_FDIRCMD_CLEARHT)); 1303 IXGBE_FDIRCMD_CLEARHT));
1304 IXGBE_WRITE_FLUSH(hw); 1304 IXGBE_WRITE_FLUSH(hw);
1305 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, 1305 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
1306 (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) & 1306 (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) &
1307 ~IXGBE_FDIRCMD_CLEARHT)); 1307 ~IXGBE_FDIRCMD_CLEARHT));
1308 IXGBE_WRITE_FLUSH(hw); 1308 IXGBE_WRITE_FLUSH(hw);
1309 /* 1309 /*
1310 * Clear FDIR Hash register to clear any leftover hashes 1310 * Clear FDIR Hash register to clear any leftover hashes
@@ -1319,7 +1319,7 @@ s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)
1319 /* Poll init-done after we write FDIRCTRL register */ 1319 /* Poll init-done after we write FDIRCTRL register */
1320 for (i = 0; i < IXGBE_FDIR_INIT_DONE_POLL; i++) { 1320 for (i = 0; i < IXGBE_FDIR_INIT_DONE_POLL; i++) {
1321 if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) & 1321 if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) &
1322 IXGBE_FDIRCTRL_INIT_DONE) 1322 IXGBE_FDIRCTRL_INIT_DONE)
1323 break; 1323 break;
1324 usleep_range(1000, 2000); 1324 usleep_range(1000, 2000);
1325 } 1325 }
@@ -1368,7 +1368,7 @@ static void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl)
1368 IXGBE_WRITE_FLUSH(hw); 1368 IXGBE_WRITE_FLUSH(hw);
1369 for (i = 0; i < IXGBE_FDIR_INIT_DONE_POLL; i++) { 1369 for (i = 0; i < IXGBE_FDIR_INIT_DONE_POLL; i++) {
1370 if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) & 1370 if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) &
1371 IXGBE_FDIRCTRL_INIT_DONE) 1371 IXGBE_FDIRCTRL_INIT_DONE)
1372 break; 1372 break;
1373 usleep_range(1000, 2000); 1373 usleep_range(1000, 2000);
1374 } 1374 }
@@ -1453,7 +1453,7 @@ do { \
1453 bucket_hash ^= hi_hash_dword >> n; \ 1453 bucket_hash ^= hi_hash_dword >> n; \
1454 else if (IXGBE_ATR_SIGNATURE_HASH_KEY & (0x01 << (n + 16))) \ 1454 else if (IXGBE_ATR_SIGNATURE_HASH_KEY & (0x01 << (n + 16))) \
1455 sig_hash ^= hi_hash_dword << (16 - n); \ 1455 sig_hash ^= hi_hash_dword << (16 - n); \
1456} while (0); 1456} while (0)
1457 1457
1458/** 1458/**
1459 * ixgbe_atr_compute_sig_hash_82599 - Compute the signature hash 1459 * ixgbe_atr_compute_sig_hash_82599 - Compute the signature hash
@@ -1529,9 +1529,9 @@ static u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
1529 * @queue: queue index to direct traffic to 1529 * @queue: queue index to direct traffic to
1530 **/ 1530 **/
1531s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, 1531s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
1532 union ixgbe_atr_hash_dword input, 1532 union ixgbe_atr_hash_dword input,
1533 union ixgbe_atr_hash_dword common, 1533 union ixgbe_atr_hash_dword common,
1534 u8 queue) 1534 u8 queue)
1535{ 1535{
1536 u64 fdirhashcmd; 1536 u64 fdirhashcmd;
1537 u32 fdircmd; 1537 u32 fdircmd;
@@ -1555,7 +1555,7 @@ s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
1555 1555
1556 /* configure FDIRCMD register */ 1556 /* configure FDIRCMD register */
1557 fdircmd = IXGBE_FDIRCMD_CMD_ADD_FLOW | IXGBE_FDIRCMD_FILTER_UPDATE | 1557 fdircmd = IXGBE_FDIRCMD_CMD_ADD_FLOW | IXGBE_FDIRCMD_FILTER_UPDATE |
1558 IXGBE_FDIRCMD_LAST | IXGBE_FDIRCMD_QUEUE_EN; 1558 IXGBE_FDIRCMD_LAST | IXGBE_FDIRCMD_QUEUE_EN;
1559 fdircmd |= input.formatted.flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT; 1559 fdircmd |= input.formatted.flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT;
1560 fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT; 1560 fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT;
1561 1561
@@ -1579,7 +1579,7 @@ do { \
1579 bucket_hash ^= lo_hash_dword >> n; \ 1579 bucket_hash ^= lo_hash_dword >> n; \
1580 if (IXGBE_ATR_BUCKET_HASH_KEY & (0x01 << (n + 16))) \ 1580 if (IXGBE_ATR_BUCKET_HASH_KEY & (0x01 << (n + 16))) \
1581 bucket_hash ^= hi_hash_dword >> n; \ 1581 bucket_hash ^= hi_hash_dword >> n; \
1582} while (0); 1582} while (0)
1583 1583
1584/** 1584/**
1585 * ixgbe_atr_compute_perfect_hash_82599 - Compute the perfect filter hash 1585 * ixgbe_atr_compute_perfect_hash_82599 - Compute the perfect filter hash
@@ -1651,6 +1651,7 @@ void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
1651static u32 ixgbe_get_fdirtcpm_82599(union ixgbe_atr_input *input_mask) 1651static u32 ixgbe_get_fdirtcpm_82599(union ixgbe_atr_input *input_mask)
1652{ 1652{
1653 u32 mask = ntohs(input_mask->formatted.dst_port); 1653 u32 mask = ntohs(input_mask->formatted.dst_port);
1654
1654 mask <<= IXGBE_FDIRTCPM_DPORTM_SHIFT; 1655 mask <<= IXGBE_FDIRTCPM_DPORTM_SHIFT;
1655 mask |= ntohs(input_mask->formatted.src_port); 1656 mask |= ntohs(input_mask->formatted.src_port);
1656 mask = ((mask & 0x55555555) << 1) | ((mask & 0xAAAAAAAA) >> 1); 1657 mask = ((mask & 0x55555555) << 1) | ((mask & 0xAAAAAAAA) >> 1);
@@ -1885,7 +1886,7 @@ static s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)
1885 u32 core_ctl; 1886 u32 core_ctl;
1886 1887
1887 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, IXGBE_CORECTL_WRITE_CMD | 1888 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, IXGBE_CORECTL_WRITE_CMD |
1888 (reg << 8)); 1889 (reg << 8));
1889 IXGBE_WRITE_FLUSH(hw); 1890 IXGBE_WRITE_FLUSH(hw);
1890 udelay(10); 1891 udelay(10);
1891 core_ctl = IXGBE_READ_REG(hw, IXGBE_CORECTL); 1892 core_ctl = IXGBE_READ_REG(hw, IXGBE_CORECTL);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index bdc55819179d..4e5385a2a465 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -41,7 +41,7 @@ static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw);
41static s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw); 41static s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw);
42static void ixgbe_standby_eeprom(struct ixgbe_hw *hw); 42static void ixgbe_standby_eeprom(struct ixgbe_hw *hw);
43static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data, 43static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,
44 u16 count); 44 u16 count);
45static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count); 45static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count);
46static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec); 46static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
47static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec); 47static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
@@ -485,7 +485,7 @@ s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw)
485 * Reads the part number string from the EEPROM. 485 * Reads the part number string from the EEPROM.
486 **/ 486 **/
487s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, 487s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
488 u32 pba_num_size) 488 u32 pba_num_size)
489{ 489{
490 s32 ret_val; 490 s32 ret_val;
491 u16 data; 491 u16 data;
@@ -818,9 +818,8 @@ s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw)
818 eeprom->address_bits = 16; 818 eeprom->address_bits = 16;
819 else 819 else
820 eeprom->address_bits = 8; 820 eeprom->address_bits = 8;
821 hw_dbg(hw, "Eeprom params: type = %d, size = %d, address bits: " 821 hw_dbg(hw, "Eeprom params: type = %d, size = %d, address bits: %d\n",
822 "%d\n", eeprom->type, eeprom->word_size, 822 eeprom->type, eeprom->word_size, eeprom->address_bits);
823 eeprom->address_bits);
824 } 823 }
825 824
826 return 0; 825 return 0;
@@ -1392,8 +1391,7 @@ static s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw)
1392 } 1391 }
1393 1392
1394 if (i == timeout) { 1393 if (i == timeout) {
1395 hw_dbg(hw, "Driver can't access the Eeprom - SMBI Semaphore " 1394 hw_dbg(hw, "Driver can't access the Eeprom - SMBI Semaphore not granted.\n");
1396 "not granted.\n");
1397 /* 1395 /*
1398 * this release is particularly important because our attempts 1396 * this release is particularly important because our attempts
1399 * above to get the semaphore may have succeeded, and if there 1397 * above to get the semaphore may have succeeded, and if there
@@ -1438,14 +1436,12 @@ static s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw)
1438 * was not granted because we don't have access to the EEPROM 1436 * was not granted because we don't have access to the EEPROM
1439 */ 1437 */
1440 if (i >= timeout) { 1438 if (i >= timeout) {
1441 hw_dbg(hw, "SWESMBI Software EEPROM semaphore " 1439 hw_dbg(hw, "SWESMBI Software EEPROM semaphore not granted.\n");
1442 "not granted.\n");
1443 ixgbe_release_eeprom_semaphore(hw); 1440 ixgbe_release_eeprom_semaphore(hw);
1444 status = IXGBE_ERR_EEPROM; 1441 status = IXGBE_ERR_EEPROM;
1445 } 1442 }
1446 } else { 1443 } else {
1447 hw_dbg(hw, "Software semaphore SMBI between device drivers " 1444 hw_dbg(hw, "Software semaphore SMBI between device drivers not granted.\n");
1448 "not granted.\n");
1449 } 1445 }
1450 1446
1451 return status; 1447 return status;
@@ -1487,7 +1483,7 @@ static s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw)
1487 */ 1483 */
1488 for (i = 0; i < IXGBE_EEPROM_MAX_RETRY_SPI; i += 5) { 1484 for (i = 0; i < IXGBE_EEPROM_MAX_RETRY_SPI; i += 5) {
1489 ixgbe_shift_out_eeprom_bits(hw, IXGBE_EEPROM_RDSR_OPCODE_SPI, 1485 ixgbe_shift_out_eeprom_bits(hw, IXGBE_EEPROM_RDSR_OPCODE_SPI,
1490 IXGBE_EEPROM_OPCODE_BITS); 1486 IXGBE_EEPROM_OPCODE_BITS);
1491 spi_stat_reg = (u8)ixgbe_shift_in_eeprom_bits(hw, 8); 1487 spi_stat_reg = (u8)ixgbe_shift_in_eeprom_bits(hw, 8);
1492 if (!(spi_stat_reg & IXGBE_EEPROM_STATUS_RDY_SPI)) 1488 if (!(spi_stat_reg & IXGBE_EEPROM_STATUS_RDY_SPI))
1493 break; 1489 break;
@@ -1536,7 +1532,7 @@ static void ixgbe_standby_eeprom(struct ixgbe_hw *hw)
1536 * @count: number of bits to shift out 1532 * @count: number of bits to shift out
1537 **/ 1533 **/
1538static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data, 1534static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,
1539 u16 count) 1535 u16 count)
1540{ 1536{
1541 u32 eec; 1537 u32 eec;
1542 u32 mask; 1538 u32 mask;
@@ -1740,7 +1736,7 @@ u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw)
1740 * caller does not need checksum_val, the value can be NULL. 1736 * caller does not need checksum_val, the value can be NULL.
1741 **/ 1737 **/
1742s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 1738s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
1743 u16 *checksum_val) 1739 u16 *checksum_val)
1744{ 1740{
1745 s32 status; 1741 s32 status;
1746 u16 checksum; 1742 u16 checksum;
@@ -1813,7 +1809,7 @@ s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw)
1813 * Puts an ethernet address into a receive address register. 1809 * Puts an ethernet address into a receive address register.
1814 **/ 1810 **/
1815s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 1811s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
1816 u32 enable_addr) 1812 u32 enable_addr)
1817{ 1813{
1818 u32 rar_low, rar_high; 1814 u32 rar_low, rar_high;
1819 u32 rar_entries = hw->mac.num_rar_entries; 1815 u32 rar_entries = hw->mac.num_rar_entries;
@@ -2057,7 +2053,7 @@ s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
2057 2053
2058 if (hw->addr_ctrl.mta_in_use > 0) 2054 if (hw->addr_ctrl.mta_in_use > 0)
2059 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, 2055 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL,
2060 IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type); 2056 IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type);
2061 2057
2062 hw_dbg(hw, "ixgbe_update_mc_addr_list_generic Complete\n"); 2058 hw_dbg(hw, "ixgbe_update_mc_addr_list_generic Complete\n");
2063 return 0; 2059 return 0;
@@ -2075,7 +2071,7 @@ s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw)
2075 2071
2076 if (a->mta_in_use > 0) 2072 if (a->mta_in_use > 0)
2077 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, IXGBE_MCSTCTRL_MFE | 2073 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, IXGBE_MCSTCTRL_MFE |
2078 hw->mac.mc_filter_type); 2074 hw->mac.mc_filter_type);
2079 2075
2080 return 0; 2076 return 0;
2081} 2077}
@@ -2663,8 +2659,7 @@ s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw)
2663 2659
2664 /* For informational purposes only */ 2660 /* For informational purposes only */
2665 if (i >= IXGBE_MAX_SECRX_POLL) 2661 if (i >= IXGBE_MAX_SECRX_POLL)
2666 hw_dbg(hw, "Rx unit being enabled before security " 2662 hw_dbg(hw, "Rx unit being enabled before security path fully disabled. Continuing with init.\n");
2667 "path fully disabled. Continuing with init.\n");
2668 2663
2669 return 0; 2664 return 0;
2670 2665
@@ -2791,7 +2786,7 @@ out:
2791 * get and set mac_addr routines. 2786 * get and set mac_addr routines.
2792 **/ 2787 **/
2793static s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw, 2788static s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw,
2794 u16 *san_mac_offset) 2789 u16 *san_mac_offset)
2795{ 2790{
2796 s32 ret_val; 2791 s32 ret_val;
2797 2792
@@ -2837,7 +2832,7 @@ s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)
2837 hw->mac.ops.set_lan_id(hw); 2832 hw->mac.ops.set_lan_id(hw);
2838 /* apply the port offset to the address offset */ 2833 /* apply the port offset to the address offset */
2839 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : 2834 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) :
2840 (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT0_OFFSET); 2835 (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT0_OFFSET);
2841 for (i = 0; i < 3; i++) { 2836 for (i = 0; i < 3; i++) {
2842 ret_val = hw->eeprom.ops.read(hw, san_mac_offset, 2837 ret_val = hw->eeprom.ops.read(hw, san_mac_offset,
2843 &san_mac_data); 2838 &san_mac_data);
@@ -3077,7 +3072,7 @@ static s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan)
3077 * Turn on/off specified VLAN in the VLAN filter table. 3072 * Turn on/off specified VLAN in the VLAN filter table.
3078 **/ 3073 **/
3079s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, 3074s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
3080 bool vlan_on) 3075 bool vlan_on)
3081{ 3076{
3082 s32 regindex; 3077 s32 regindex;
3083 u32 bitindex; 3078 u32 bitindex;
@@ -3199,9 +3194,9 @@ s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
3199 * Ignore it. */ 3194 * Ignore it. */
3200 vfta_changed = false; 3195 vfta_changed = false;
3201 } 3196 }
3202 } 3197 } else {
3203 else
3204 IXGBE_WRITE_REG(hw, IXGBE_VLVF(vlvf_index), 0); 3198 IXGBE_WRITE_REG(hw, IXGBE_VLVF(vlvf_index), 0);
3199 }
3205 } 3200 }
3206 3201
3207 if (vfta_changed) 3202 if (vfta_changed)
@@ -3301,7 +3296,7 @@ s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
3301 * block to check the support for the alternative WWNN/WWPN prefix support. 3296 * block to check the support for the alternative WWNN/WWPN prefix support.
3302 **/ 3297 **/
3303s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 3298s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
3304 u16 *wwpn_prefix) 3299 u16 *wwpn_prefix)
3305{ 3300{
3306 u16 offset, caps; 3301 u16 offset, caps;
3307 u16 alt_san_mac_blk_offset; 3302 u16 alt_san_mac_blk_offset;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
index d15ff2e5edb7..2ae5d4b8fc93 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h
@@ -39,7 +39,7 @@ s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
39s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw); 39s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
40s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); 40s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
41s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, 41s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
42 u32 pba_num_size); 42 u32 pba_num_size);
43s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); 43s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
44enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status); 44enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status);
45enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status); 45enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status);
@@ -61,16 +61,16 @@ s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
61s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, 61s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
62 u16 words, u16 *data); 62 u16 words, u16 *data);
63s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 63s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
64 u16 *data); 64 u16 *data);
65s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 65s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
66 u16 words, u16 *data); 66 u16 words, u16 *data);
67u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); 67u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
68s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 68s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
69 u16 *checksum_val); 69 u16 *checksum_val);
70s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); 70s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
71 71
72s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 72s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
73 u32 enable_addr); 73 u32 enable_addr);
74s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); 74s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
75s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); 75s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
76s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, 76s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
@@ -92,13 +92,13 @@ s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
92s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 92s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
93s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); 93s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
94s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, 94s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
95 u32 vind, bool vlan_on); 95 u32 vind, bool vlan_on);
96s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); 96s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
97s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, 97s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
98 ixgbe_link_speed *speed, 98 ixgbe_link_speed *speed,
99 bool *link_up, bool link_up_wait_to_complete); 99 bool *link_up, bool link_up_wait_to_complete);
100s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 100s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
101 u16 *wwpn_prefix); 101 u16 *wwpn_prefix);
102 102
103s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); 103s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
104s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); 104s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
index e055e000131b..a689ee0d4bed 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c
@@ -267,7 +267,7 @@ void ixgbe_dcb_unpack_map(struct ixgbe_dcb_config *cfg, int direction, u8 *map)
267 * Configure dcb settings and enable dcb mode. 267 * Configure dcb settings and enable dcb mode.
268 */ 268 */
269s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, 269s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw,
270 struct ixgbe_dcb_config *dcb_config) 270 struct ixgbe_dcb_config *dcb_config)
271{ 271{
272 s32 ret = 0; 272 s32 ret = 0;
273 u8 pfc_en; 273 u8 pfc_en;
@@ -389,7 +389,6 @@ static void ixgbe_dcb_read_rtrup2tc_82599(struct ixgbe_hw *hw, u8 *map)
389 for (i = 0; i < MAX_USER_PRIORITY; i++) 389 for (i = 0; i < MAX_USER_PRIORITY; i++)
390 map[i] = IXGBE_RTRUP2TC_UP_MASK & 390 map[i] = IXGBE_RTRUP2TC_UP_MASK &
391 (reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT)); 391 (reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT));
392 return;
393} 392}
394 393
395void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map) 394void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h
index d5a1e3db0774..90c370230e20 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h
@@ -31,17 +31,17 @@
31 31
32/* DCB register definitions */ 32/* DCB register definitions */
33#define IXGBE_RTTDCS_TDPAC 0x00000001 /* 0 Round Robin, 33#define IXGBE_RTTDCS_TDPAC 0x00000001 /* 0 Round Robin,
34 * 1 WSP - Weighted Strict Priority 34 * 1 WSP - Weighted Strict Priority
35 */ 35 */
36#define IXGBE_RTTDCS_VMPAC 0x00000002 /* 0 Round Robin, 36#define IXGBE_RTTDCS_VMPAC 0x00000002 /* 0 Round Robin,
37 * 1 WRR - Weighted Round Robin 37 * 1 WRR - Weighted Round Robin
38 */ 38 */
39#define IXGBE_RTTDCS_TDRM 0x00000010 /* Transmit Recycle Mode */ 39#define IXGBE_RTTDCS_TDRM 0x00000010 /* Transmit Recycle Mode */
40#define IXGBE_RTTDCS_ARBDIS 0x00000040 /* DCB arbiter disable */ 40#define IXGBE_RTTDCS_ARBDIS 0x00000040 /* DCB arbiter disable */
41#define IXGBE_RTTDCS_BDPM 0x00400000 /* Bypass Data Pipe - must clear! */ 41#define IXGBE_RTTDCS_BDPM 0x00400000 /* Bypass Data Pipe - must clear! */
42#define IXGBE_RTTDCS_BPBFSM 0x00800000 /* Bypass PB Free Space - must 42#define IXGBE_RTTDCS_BPBFSM 0x00800000 /* Bypass PB Free Space - must
43 * clear! 43 * clear!
44 */ 44 */
45#define IXGBE_RTTDCS_SPEED_CHG 0x80000000 /* Link speed change */ 45#define IXGBE_RTTDCS_SPEED_CHG 0x80000000 /* Link speed change */
46 46
47/* Receive UP2TC mapping */ 47/* Receive UP2TC mapping */
@@ -56,11 +56,11 @@
56#define IXGBE_RTRPT4C_LSP 0x80000000 /* LSP enable bit */ 56#define IXGBE_RTRPT4C_LSP 0x80000000 /* LSP enable bit */
57 57
58#define IXGBE_RDRXCTL_MPBEN 0x00000010 /* DMA config for multiple packet 58#define IXGBE_RDRXCTL_MPBEN 0x00000010 /* DMA config for multiple packet
59 * buffers enable 59 * buffers enable
60 */ 60 */
61#define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores 61#define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores
62 * (RSS) enable 62 * (RSS) enable
63 */ 63 */
64 64
65/* RTRPCS Bit Masks */ 65/* RTRPCS Bit Masks */
66#define IXGBE_RTRPCS_RRM 0x00000002 /* Receive Recycle Mode enable */ 66#define IXGBE_RTRPCS_RRM 0x00000002 /* Receive Recycle Mode enable */
@@ -81,8 +81,8 @@
81 81
82/* RTTPCS Bit Masks */ 82/* RTTPCS Bit Masks */
83#define IXGBE_RTTPCS_TPPAC 0x00000020 /* 0 Round Robin, 83#define IXGBE_RTTPCS_TPPAC 0x00000020 /* 0 Round Robin,
84 * 1 SP - Strict Priority 84 * 1 SP - Strict Priority
85 */ 85 */
86#define IXGBE_RTTPCS_ARBDIS 0x00000040 /* Arbiter disable */ 86#define IXGBE_RTTPCS_ARBDIS 0x00000040 /* Arbiter disable */
87#define IXGBE_RTTPCS_TPRM 0x00000100 /* Transmit Recycle Mode enable */ 87#define IXGBE_RTTPCS_TPRM 0x00000100 /* Transmit Recycle Mode enable */
88#define IXGBE_RTTPCS_ARBD_SHIFT 22 88#define IXGBE_RTTPCS_ARBD_SHIFT 22
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
index edd89a1ef27f..5172b6b12c09 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
@@ -192,8 +192,8 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
192} 192}
193 193
194static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, 194static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
195 u8 prio, u8 bwg_id, u8 bw_pct, 195 u8 prio, u8 bwg_id, u8 bw_pct,
196 u8 up_map) 196 u8 up_map)
197{ 197{
198 struct ixgbe_adapter *adapter = netdev_priv(netdev); 198 struct ixgbe_adapter *adapter = netdev_priv(netdev);
199 199
@@ -210,7 +210,7 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
210} 210}
211 211
212static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, 212static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
213 u8 bw_pct) 213 u8 bw_pct)
214{ 214{
215 struct ixgbe_adapter *adapter = netdev_priv(netdev); 215 struct ixgbe_adapter *adapter = netdev_priv(netdev);
216 216
@@ -218,8 +218,8 @@ static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
218} 218}
219 219
220static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, 220static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
221 u8 prio, u8 bwg_id, u8 bw_pct, 221 u8 prio, u8 bwg_id, u8 bw_pct,
222 u8 up_map) 222 u8 up_map)
223{ 223{
224 struct ixgbe_adapter *adapter = netdev_priv(netdev); 224 struct ixgbe_adapter *adapter = netdev_priv(netdev);
225 225
@@ -236,7 +236,7 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
236} 236}
237 237
238static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, 238static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
239 u8 bw_pct) 239 u8 bw_pct)
240{ 240{
241 struct ixgbe_adapter *adapter = netdev_priv(netdev); 241 struct ixgbe_adapter *adapter = netdev_priv(netdev);
242 242
@@ -244,8 +244,8 @@ static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
244} 244}
245 245
246static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, 246static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
247 u8 *prio, u8 *bwg_id, u8 *bw_pct, 247 u8 *prio, u8 *bwg_id, u8 *bw_pct,
248 u8 *up_map) 248 u8 *up_map)
249{ 249{
250 struct ixgbe_adapter *adapter = netdev_priv(netdev); 250 struct ixgbe_adapter *adapter = netdev_priv(netdev);
251 251
@@ -256,7 +256,7 @@ static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
256} 256}
257 257
258static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, 258static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
259 u8 *bw_pct) 259 u8 *bw_pct)
260{ 260{
261 struct ixgbe_adapter *adapter = netdev_priv(netdev); 261 struct ixgbe_adapter *adapter = netdev_priv(netdev);
262 262
@@ -264,8 +264,8 @@ static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
264} 264}
265 265
266static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc, 266static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
267 u8 *prio, u8 *bwg_id, u8 *bw_pct, 267 u8 *prio, u8 *bwg_id, u8 *bw_pct,
268 u8 *up_map) 268 u8 *up_map)
269{ 269{
270 struct ixgbe_adapter *adapter = netdev_priv(netdev); 270 struct ixgbe_adapter *adapter = netdev_priv(netdev);
271 271
@@ -276,7 +276,7 @@ static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
276} 276}
277 277
278static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, 278static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
279 u8 *bw_pct) 279 u8 *bw_pct)
280{ 280{
281 struct ixgbe_adapter *adapter = netdev_priv(netdev); 281 struct ixgbe_adapter *adapter = netdev_priv(netdev);
282 282
@@ -284,7 +284,7 @@ static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
284} 284}
285 285
286static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority, 286static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
287 u8 setting) 287 u8 setting)
288{ 288{
289 struct ixgbe_adapter *adapter = netdev_priv(netdev); 289 struct ixgbe_adapter *adapter = netdev_priv(netdev);
290 290
@@ -295,7 +295,7 @@ static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
295} 295}
296 296
297static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority, 297static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
298 u8 *setting) 298 u8 *setting)
299{ 299{
300 struct ixgbe_adapter *adapter = netdev_priv(netdev); 300 struct ixgbe_adapter *adapter = netdev_priv(netdev);
301 301
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c
index 472b0f450bf9..5e2c1e35e517 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c
@@ -253,8 +253,7 @@ void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter)
253 **/ 253 **/
254void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter) 254void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter)
255{ 255{
256 if (adapter->ixgbe_dbg_adapter) 256 debugfs_remove_recursive(adapter->ixgbe_dbg_adapter);
257 debugfs_remove_recursive(adapter->ixgbe_dbg_adapter);
258 adapter->ixgbe_dbg_adapter = NULL; 257 adapter->ixgbe_dbg_adapter = NULL;
259} 258}
260 259
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
index 31d7268401e7..cc70de259829 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
@@ -141,8 +141,8 @@ static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
141 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ 141 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
142 / sizeof(u64)) 142 / sizeof(u64))
143#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ 143#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
144 IXGBE_PB_STATS_LEN + \ 144 IXGBE_PB_STATS_LEN + \
145 IXGBE_QUEUE_STATS_LEN) 145 IXGBE_QUEUE_STATS_LEN)
146 146
147static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { 147static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
148 "Register test (offline)", "Eeprom test (offline)", 148 "Register test (offline)", "Eeprom test (offline)",
@@ -152,7 +152,7 @@ static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
152#define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN 152#define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
153 153
154static int ixgbe_get_settings(struct net_device *netdev, 154static int ixgbe_get_settings(struct net_device *netdev,
155 struct ethtool_cmd *ecmd) 155 struct ethtool_cmd *ecmd)
156{ 156{
157 struct ixgbe_adapter *adapter = netdev_priv(netdev); 157 struct ixgbe_adapter *adapter = netdev_priv(netdev);
158 struct ixgbe_hw *hw = &adapter->hw; 158 struct ixgbe_hw *hw = &adapter->hw;
@@ -311,7 +311,7 @@ static int ixgbe_get_settings(struct net_device *netdev,
311} 311}
312 312
313static int ixgbe_set_settings(struct net_device *netdev, 313static int ixgbe_set_settings(struct net_device *netdev,
314 struct ethtool_cmd *ecmd) 314 struct ethtool_cmd *ecmd)
315{ 315{
316 struct ixgbe_adapter *adapter = netdev_priv(netdev); 316 struct ixgbe_adapter *adapter = netdev_priv(netdev);
317 struct ixgbe_hw *hw = &adapter->hw; 317 struct ixgbe_hw *hw = &adapter->hw;
@@ -368,7 +368,7 @@ static int ixgbe_set_settings(struct net_device *netdev,
368} 368}
369 369
370static void ixgbe_get_pauseparam(struct net_device *netdev, 370static void ixgbe_get_pauseparam(struct net_device *netdev,
371 struct ethtool_pauseparam *pause) 371 struct ethtool_pauseparam *pause)
372{ 372{
373 struct ixgbe_adapter *adapter = netdev_priv(netdev); 373 struct ixgbe_adapter *adapter = netdev_priv(netdev);
374 struct ixgbe_hw *hw = &adapter->hw; 374 struct ixgbe_hw *hw = &adapter->hw;
@@ -390,7 +390,7 @@ static void ixgbe_get_pauseparam(struct net_device *netdev,
390} 390}
391 391
392static int ixgbe_set_pauseparam(struct net_device *netdev, 392static int ixgbe_set_pauseparam(struct net_device *netdev,
393 struct ethtool_pauseparam *pause) 393 struct ethtool_pauseparam *pause)
394{ 394{
395 struct ixgbe_adapter *adapter = netdev_priv(netdev); 395 struct ixgbe_adapter *adapter = netdev_priv(netdev);
396 struct ixgbe_hw *hw = &adapter->hw; 396 struct ixgbe_hw *hw = &adapter->hw;
@@ -450,7 +450,7 @@ static int ixgbe_get_regs_len(struct net_device *netdev)
450#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ 450#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
451 451
452static void ixgbe_get_regs(struct net_device *netdev, 452static void ixgbe_get_regs(struct net_device *netdev,
453 struct ethtool_regs *regs, void *p) 453 struct ethtool_regs *regs, void *p)
454{ 454{
455 struct ixgbe_adapter *adapter = netdev_priv(netdev); 455 struct ixgbe_adapter *adapter = netdev_priv(netdev);
456 struct ixgbe_hw *hw = &adapter->hw; 456 struct ixgbe_hw *hw = &adapter->hw;
@@ -812,7 +812,7 @@ static int ixgbe_get_eeprom_len(struct net_device *netdev)
812} 812}
813 813
814static int ixgbe_get_eeprom(struct net_device *netdev, 814static int ixgbe_get_eeprom(struct net_device *netdev,
815 struct ethtool_eeprom *eeprom, u8 *bytes) 815 struct ethtool_eeprom *eeprom, u8 *bytes)
816{ 816{
817 struct ixgbe_adapter *adapter = netdev_priv(netdev); 817 struct ixgbe_adapter *adapter = netdev_priv(netdev);
818 struct ixgbe_hw *hw = &adapter->hw; 818 struct ixgbe_hw *hw = &adapter->hw;
@@ -918,7 +918,7 @@ err:
918} 918}
919 919
920static void ixgbe_get_drvinfo(struct net_device *netdev, 920static void ixgbe_get_drvinfo(struct net_device *netdev,
921 struct ethtool_drvinfo *drvinfo) 921 struct ethtool_drvinfo *drvinfo)
922{ 922{
923 struct ixgbe_adapter *adapter = netdev_priv(netdev); 923 struct ixgbe_adapter *adapter = netdev_priv(netdev);
924 u32 nvm_track_id; 924 u32 nvm_track_id;
@@ -940,7 +940,7 @@ static void ixgbe_get_drvinfo(struct net_device *netdev,
940} 940}
941 941
942static void ixgbe_get_ringparam(struct net_device *netdev, 942static void ixgbe_get_ringparam(struct net_device *netdev,
943 struct ethtool_ringparam *ring) 943 struct ethtool_ringparam *ring)
944{ 944{
945 struct ixgbe_adapter *adapter = netdev_priv(netdev); 945 struct ixgbe_adapter *adapter = netdev_priv(netdev);
946 struct ixgbe_ring *tx_ring = adapter->tx_ring[0]; 946 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
@@ -953,7 +953,7 @@ static void ixgbe_get_ringparam(struct net_device *netdev,
953} 953}
954 954
955static int ixgbe_set_ringparam(struct net_device *netdev, 955static int ixgbe_set_ringparam(struct net_device *netdev,
956 struct ethtool_ringparam *ring) 956 struct ethtool_ringparam *ring)
957{ 957{
958 struct ixgbe_adapter *adapter = netdev_priv(netdev); 958 struct ixgbe_adapter *adapter = netdev_priv(netdev);
959 struct ixgbe_ring *temp_ring; 959 struct ixgbe_ring *temp_ring;
@@ -1082,7 +1082,7 @@ static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1082} 1082}
1083 1083
1084static void ixgbe_get_ethtool_stats(struct net_device *netdev, 1084static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1085 struct ethtool_stats *stats, u64 *data) 1085 struct ethtool_stats *stats, u64 *data)
1086{ 1086{
1087 struct ixgbe_adapter *adapter = netdev_priv(netdev); 1087 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1088 struct rtnl_link_stats64 temp; 1088 struct rtnl_link_stats64 temp;
@@ -1110,7 +1110,7 @@ static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1110 } 1110 }
1111 1111
1112 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == 1112 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1113 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1113 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1114 } 1114 }
1115 for (j = 0; j < netdev->num_tx_queues; j++) { 1115 for (j = 0; j < netdev->num_tx_queues; j++) {
1116 ring = adapter->tx_ring[j]; 1116 ring = adapter->tx_ring[j];
@@ -1180,7 +1180,7 @@ static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1180} 1180}
1181 1181
1182static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, 1182static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1183 u8 *data) 1183 u8 *data)
1184{ 1184{
1185 char *p = (char *)data; 1185 char *p = (char *)data;
1186 int i; 1186 int i;
@@ -1357,8 +1357,7 @@ static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1357 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write); 1357 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1358 val = ixgbe_read_reg(&adapter->hw, reg); 1358 val = ixgbe_read_reg(&adapter->hw, reg);
1359 if (val != (test_pattern[pat] & write & mask)) { 1359 if (val != (test_pattern[pat] & write & mask)) {
1360 e_err(drv, "pattern test reg %04X failed: got " 1360 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1361 "0x%08X expected 0x%08X\n",
1362 reg, val, (test_pattern[pat] & write & mask)); 1361 reg, val, (test_pattern[pat] & write & mask));
1363 *data = reg; 1362 *data = reg;
1364 ixgbe_write_reg(&adapter->hw, reg, before); 1363 ixgbe_write_reg(&adapter->hw, reg, before);
@@ -1382,8 +1381,8 @@ static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1382 ixgbe_write_reg(&adapter->hw, reg, write & mask); 1381 ixgbe_write_reg(&adapter->hw, reg, write & mask);
1383 val = ixgbe_read_reg(&adapter->hw, reg); 1382 val = ixgbe_read_reg(&adapter->hw, reg);
1384 if ((write & mask) != (val & mask)) { 1383 if ((write & mask) != (val & mask)) {
1385 e_err(drv, "set/check reg %04X test failed: got 0x%08X " 1384 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1386 "expected 0x%08X\n", reg, (val & mask), (write & mask)); 1385 reg, (val & mask), (write & mask));
1387 *data = reg; 1386 *data = reg;
1388 ixgbe_write_reg(&adapter->hw, reg, before); 1387 ixgbe_write_reg(&adapter->hw, reg, before);
1389 return true; 1388 return true;
@@ -1430,8 +1429,8 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1430 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle); 1429 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1431 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle; 1430 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1432 if (value != after) { 1431 if (value != after) {
1433 e_err(drv, "failed STATUS register test got: 0x%08X " 1432 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1434 "expected: 0x%08X\n", after, value); 1433 after, value);
1435 *data = 1; 1434 *data = 1;
1436 return 1; 1435 return 1;
1437 } 1436 }
@@ -1533,10 +1532,10 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1533 return -1; 1532 return -1;
1534 } 1533 }
1535 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED, 1534 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1536 netdev->name, netdev)) { 1535 netdev->name, netdev)) {
1537 shared_int = false; 1536 shared_int = false;
1538 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED, 1537 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1539 netdev->name, netdev)) { 1538 netdev->name, netdev)) {
1540 *data = 1; 1539 *data = 1;
1541 return -1; 1540 return -1;
1542 } 1541 }
@@ -1563,9 +1562,9 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1563 */ 1562 */
1564 adapter->test_icr = 0; 1563 adapter->test_icr = 0;
1565 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1564 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1566 ~mask & 0x00007FFF); 1565 ~mask & 0x00007FFF);
1567 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1566 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1568 ~mask & 0x00007FFF); 1567 ~mask & 0x00007FFF);
1569 IXGBE_WRITE_FLUSH(&adapter->hw); 1568 IXGBE_WRITE_FLUSH(&adapter->hw);
1570 usleep_range(10000, 20000); 1569 usleep_range(10000, 20000);
1571 1570
@@ -1587,7 +1586,7 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1587 IXGBE_WRITE_FLUSH(&adapter->hw); 1586 IXGBE_WRITE_FLUSH(&adapter->hw);
1588 usleep_range(10000, 20000); 1587 usleep_range(10000, 20000);
1589 1588
1590 if (!(adapter->test_icr &mask)) { 1589 if (!(adapter->test_icr & mask)) {
1591 *data = 4; 1590 *data = 4;
1592 break; 1591 break;
1593 } 1592 }
@@ -1602,9 +1601,9 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1602 */ 1601 */
1603 adapter->test_icr = 0; 1602 adapter->test_icr = 0;
1604 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1603 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1605 ~mask & 0x00007FFF); 1604 ~mask & 0x00007FFF);
1606 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1605 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1607 ~mask & 0x00007FFF); 1606 ~mask & 0x00007FFF);
1608 IXGBE_WRITE_FLUSH(&adapter->hw); 1607 IXGBE_WRITE_FLUSH(&adapter->hw);
1609 usleep_range(10000, 20000); 1608 usleep_range(10000, 20000);
1610 1609
@@ -1964,7 +1963,7 @@ out:
1964} 1963}
1965 1964
1966static void ixgbe_diag_test(struct net_device *netdev, 1965static void ixgbe_diag_test(struct net_device *netdev,
1967 struct ethtool_test *eth_test, u64 *data) 1966 struct ethtool_test *eth_test, u64 *data)
1968{ 1967{
1969 struct ixgbe_adapter *adapter = netdev_priv(netdev); 1968 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1970 bool if_running = netif_running(netdev); 1969 bool if_running = netif_running(netdev);
@@ -1987,10 +1986,7 @@ static void ixgbe_diag_test(struct net_device *netdev,
1987 int i; 1986 int i;
1988 for (i = 0; i < adapter->num_vfs; i++) { 1987 for (i = 0; i < adapter->num_vfs; i++) {
1989 if (adapter->vfinfo[i].clear_to_send) { 1988 if (adapter->vfinfo[i].clear_to_send) {
1990 netdev_warn(netdev, "%s", 1989 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
1991 "offline diagnostic is not "
1992 "supported when VFs are "
1993 "present\n");
1994 data[0] = 1; 1990 data[0] = 1;
1995 data[1] = 1; 1991 data[1] = 1;
1996 data[2] = 1; 1992 data[2] = 1;
@@ -2037,8 +2033,7 @@ static void ixgbe_diag_test(struct net_device *netdev,
2037 * loopback diagnostic. */ 2033 * loopback diagnostic. */
2038 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | 2034 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2039 IXGBE_FLAG_VMDQ_ENABLED)) { 2035 IXGBE_FLAG_VMDQ_ENABLED)) {
2040 e_info(hw, "Skip MAC loopback diagnostic in VT " 2036 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2041 "mode\n");
2042 data[3] = 0; 2037 data[3] = 0;
2043 goto skip_loopback; 2038 goto skip_loopback;
2044 } 2039 }
@@ -2078,7 +2073,7 @@ skip_ol_tests:
2078} 2073}
2079 2074
2080static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, 2075static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2081 struct ethtool_wolinfo *wol) 2076 struct ethtool_wolinfo *wol)
2082{ 2077{
2083 struct ixgbe_hw *hw = &adapter->hw; 2078 struct ixgbe_hw *hw = &adapter->hw;
2084 int retval = 0; 2079 int retval = 0;
@@ -2094,12 +2089,12 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2094} 2089}
2095 2090
2096static void ixgbe_get_wol(struct net_device *netdev, 2091static void ixgbe_get_wol(struct net_device *netdev,
2097 struct ethtool_wolinfo *wol) 2092 struct ethtool_wolinfo *wol)
2098{ 2093{
2099 struct ixgbe_adapter *adapter = netdev_priv(netdev); 2094 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2100 2095
2101 wol->supported = WAKE_UCAST | WAKE_MCAST | 2096 wol->supported = WAKE_UCAST | WAKE_MCAST |
2102 WAKE_BCAST | WAKE_MAGIC; 2097 WAKE_BCAST | WAKE_MAGIC;
2103 wol->wolopts = 0; 2098 wol->wolopts = 0;
2104 2099
2105 if (ixgbe_wol_exclusion(adapter, wol) || 2100 if (ixgbe_wol_exclusion(adapter, wol) ||
@@ -2181,7 +2176,7 @@ static int ixgbe_set_phys_id(struct net_device *netdev,
2181} 2176}
2182 2177
2183static int ixgbe_get_coalesce(struct net_device *netdev, 2178static int ixgbe_get_coalesce(struct net_device *netdev,
2184 struct ethtool_coalesce *ec) 2179 struct ethtool_coalesce *ec)
2185{ 2180{
2186 struct ixgbe_adapter *adapter = netdev_priv(netdev); 2181 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2187 2182
@@ -2222,8 +2217,7 @@ static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2222 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 2217 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2223 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 2218 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2224 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 2219 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2225 e_info(probe, "rx-usecs value high enough " 2220 e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2226 "to re-enable RSC\n");
2227 return true; 2221 return true;
2228 } 2222 }
2229 /* if interrupt rate is too high then disable RSC */ 2223 /* if interrupt rate is too high then disable RSC */
@@ -2236,7 +2230,7 @@ static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2236} 2230}
2237 2231
2238static int ixgbe_set_coalesce(struct net_device *netdev, 2232static int ixgbe_set_coalesce(struct net_device *netdev,
2239 struct ethtool_coalesce *ec) 2233 struct ethtool_coalesce *ec)
2240{ 2234{
2241 struct ixgbe_adapter *adapter = netdev_priv(netdev); 2235 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2242 struct ixgbe_q_vector *q_vector; 2236 struct ixgbe_q_vector *q_vector;
@@ -2421,9 +2415,11 @@ static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2421 switch (cmd->flow_type) { 2415 switch (cmd->flow_type) {
2422 case TCP_V4_FLOW: 2416 case TCP_V4_FLOW:
2423 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2417 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2418 /* fallthrough */
2424 case UDP_V4_FLOW: 2419 case UDP_V4_FLOW:
2425 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 2420 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2426 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2421 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2422 /* fallthrough */
2427 case SCTP_V4_FLOW: 2423 case SCTP_V4_FLOW:
2428 case AH_ESP_V4_FLOW: 2424 case AH_ESP_V4_FLOW:
2429 case AH_V4_FLOW: 2425 case AH_V4_FLOW:
@@ -2433,9 +2429,11 @@ static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2433 break; 2429 break;
2434 case TCP_V6_FLOW: 2430 case TCP_V6_FLOW:
2435 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2431 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2432 /* fallthrough */
2436 case UDP_V6_FLOW: 2433 case UDP_V6_FLOW:
2437 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2434 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2438 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2435 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2436 /* fallthrough */
2439 case SCTP_V6_FLOW: 2437 case SCTP_V6_FLOW:
2440 case AH_ESP_V6_FLOW: 2438 case AH_ESP_V6_FLOW:
2441 case AH_V6_FLOW: 2439 case AH_V6_FLOW:
@@ -2787,8 +2785,7 @@ static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2787 2785
2788 if ((flags2 & UDP_RSS_FLAGS) && 2786 if ((flags2 & UDP_RSS_FLAGS) &&
2789 !(adapter->flags2 & UDP_RSS_FLAGS)) 2787 !(adapter->flags2 & UDP_RSS_FLAGS))
2790 e_warn(drv, "enabling UDP RSS: fragmented packets" 2788 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2791 " may arrive out of order to the stack above\n");
2792 2789
2793 adapter->flags2 = flags2; 2790 adapter->flags2 = flags2;
2794 2791
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
index 2067d392cc3d..2d9451e39686 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
@@ -1113,8 +1113,8 @@ static void ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
1113 err = pci_enable_msi(adapter->pdev); 1113 err = pci_enable_msi(adapter->pdev);
1114 if (err) { 1114 if (err) {
1115 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev, 1115 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev,
1116 "Unable to allocate MSI interrupt, " 1116 "Unable to allocate MSI interrupt, falling back to legacy. Error: %d\n",
1117 "falling back to legacy. Error: %d\n", err); 1117 err);
1118 return; 1118 return;
1119 } 1119 }
1120 adapter->flags |= IXGBE_FLAG_MSI_ENABLED; 1120 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index a5332389620a..3d666020ea15 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -6087,7 +6087,7 @@ static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6087 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) { 6087 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6088 for (i = 0; i < adapter->num_tx_queues; i++) 6088 for (i = 0; i < adapter->num_tx_queues; i++)
6089 set_bit(__IXGBE_TX_FDIR_INIT_DONE, 6089 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6090 &(adapter->tx_ring[i]->state)); 6090 &(adapter->tx_ring[i]->state));
6091 /* re-enable flow director interrupts */ 6091 /* re-enable flow director interrupts */
6092 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); 6092 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6093 } else { 6093 } else {
@@ -8387,7 +8387,7 @@ skip_sriov:
8387 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present) 8387 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8388 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n", 8388 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8389 hw->mac.type, hw->phy.type, hw->phy.sfp_type, 8389 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8390 part_str); 8390 part_str);
8391 else 8391 else
8392 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n", 8392 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8393 hw->mac.type, hw->phy.type, part_str); 8393 hw->mac.type, hw->phy.type, part_str);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c
index f5c6af2b891b..1918e0abf734 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c
@@ -223,7 +223,7 @@ out:
223 * received an ack to that message within delay * timeout period 223 * received an ack to that message within delay * timeout period
224 **/ 224 **/
225static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, 225static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
226 u16 mbx_id) 226 u16 mbx_id)
227{ 227{
228 struct ixgbe_mbx_info *mbx = &hw->mbx; 228 struct ixgbe_mbx_info *mbx = &hw->mbx;
229 s32 ret_val = IXGBE_ERR_MBX; 229 s32 ret_val = IXGBE_ERR_MBX;
@@ -269,7 +269,7 @@ static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
269 u32 vf_bit = vf_number % 16; 269 u32 vf_bit = vf_number % 16;
270 270
271 if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit, 271 if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
272 index)) { 272 index)) {
273 ret_val = 0; 273 ret_val = 0;
274 hw->mbx.stats.reqs++; 274 hw->mbx.stats.reqs++;
275 } 275 }
@@ -291,7 +291,7 @@ static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
291 u32 vf_bit = vf_number % 16; 291 u32 vf_bit = vf_number % 16;
292 292
293 if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit, 293 if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit,
294 index)) { 294 index)) {
295 ret_val = 0; 295 ret_val = 0;
296 hw->mbx.stats.acks++; 296 hw->mbx.stats.acks++;
297 } 297 }
@@ -366,7 +366,7 @@ static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
366 * returns SUCCESS if it successfully copied message into the buffer 366 * returns SUCCESS if it successfully copied message into the buffer
367 **/ 367 **/
368static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, 368static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
369 u16 vf_number) 369 u16 vf_number)
370{ 370{
371 s32 ret_val; 371 s32 ret_val;
372 u16 i; 372 u16 i;
@@ -407,7 +407,7 @@ out_no_write:
407 * a message due to a VF request so no polling for message is needed. 407 * a message due to a VF request so no polling for message is needed.
408 **/ 408 **/
409static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, 409static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
410 u16 vf_number) 410 u16 vf_number)
411{ 411{
412 s32 ret_val; 412 s32 ret_val;
413 u16 i; 413 u16 i;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h
index a9b9ad69ed0e..a5cb755de3a9 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h
@@ -54,11 +54,11 @@
54 * Message ACK's are the value or'd with 0xF0000000 54 * Message ACK's are the value or'd with 0xF0000000
55 */ 55 */
56#define IXGBE_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with 56#define IXGBE_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with
57 * this are the ACK */ 57 * this are the ACK */
58#define IXGBE_VT_MSGTYPE_NACK 0x40000000 /* Messages below or'd with 58#define IXGBE_VT_MSGTYPE_NACK 0x40000000 /* Messages below or'd with
59 * this are the NACK */ 59 * this are the NACK */
60#define IXGBE_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still 60#define IXGBE_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still
61 clear to send requests */ 61 clear to send requests */
62#define IXGBE_VT_MSGINFO_SHIFT 16 62#define IXGBE_VT_MSGINFO_SHIFT 16
63/* bits 23:16 are used for exra info for certain messages */ 63/* bits 23:16 are used for exra info for certain messages */
64#define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT) 64#define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
index a76af8e28a04..ff68b7a9deff 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
@@ -67,7 +67,7 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
67 if (mdio45_probe(&hw->phy.mdio, phy_addr) == 0) { 67 if (mdio45_probe(&hw->phy.mdio, phy_addr) == 0) {
68 ixgbe_get_phy_id(hw); 68 ixgbe_get_phy_id(hw);
69 hw->phy.type = 69 hw->phy.type =
70 ixgbe_get_phy_type_from_id(hw->phy.id); 70 ixgbe_get_phy_type_from_id(hw->phy.id);
71 71
72 if (hw->phy.type == ixgbe_phy_unknown) { 72 if (hw->phy.type == ixgbe_phy_unknown) {
73 hw->phy.ops.read_reg(hw, 73 hw->phy.ops.read_reg(hw,
@@ -136,12 +136,12 @@ static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw)
136 u16 phy_id_low = 0; 136 u16 phy_id_low = 0;
137 137
138 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, 138 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD,
139 &phy_id_high); 139 &phy_id_high);
140 140
141 if (status == 0) { 141 if (status == 0) {
142 hw->phy.id = (u32)(phy_id_high << 16); 142 hw->phy.id = (u32)(phy_id_high << 16);
143 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, 143 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD,
144 &phy_id_low); 144 &phy_id_low);
145 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); 145 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK);
146 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); 146 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK);
147 } 147 }
@@ -318,7 +318,7 @@ s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
318 * @phy_data: Pointer to read data from PHY register 318 * @phy_data: Pointer to read data from PHY register
319 **/ 319 **/
320s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 320s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
321 u32 device_type, u16 *phy_data) 321 u32 device_type, u16 *phy_data)
322{ 322{
323 s32 status; 323 s32 status;
324 u16 gssr; 324 u16 gssr;
@@ -421,7 +421,7 @@ s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
421 * @phy_data: Data to write to the PHY register 421 * @phy_data: Data to write to the PHY register
422 **/ 422 **/
423s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 423s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
424 u32 device_type, u16 phy_data) 424 u32 device_type, u16 phy_data)
425{ 425{
426 s32 status; 426 s32 status;
427 u16 gssr; 427 u16 gssr;
@@ -548,8 +548,8 @@ s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)
548 * @speed: new link speed 548 * @speed: new link speed
549 **/ 549 **/
550s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, 550s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
551 ixgbe_link_speed speed, 551 ixgbe_link_speed speed,
552 bool autoneg_wait_to_complete) 552 bool autoneg_wait_to_complete)
553{ 553{
554 554
555 /* 555 /*
@@ -582,8 +582,8 @@ s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
582 * Determines the link capabilities by reading the AUTOC register. 582 * Determines the link capabilities by reading the AUTOC register.
583 */ 583 */
584s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, 584s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
585 ixgbe_link_speed *speed, 585 ixgbe_link_speed *speed,
586 bool *autoneg) 586 bool *autoneg)
587{ 587{
588 s32 status = IXGBE_ERR_LINK_SETUP; 588 s32 status = IXGBE_ERR_LINK_SETUP;
589 u16 speed_ability; 589 u16 speed_ability;
@@ -592,7 +592,7 @@ s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
592 *autoneg = true; 592 *autoneg = true;
593 593
594 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, 594 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD,
595 &speed_ability); 595 &speed_ability);
596 596
597 if (status == 0) { 597 if (status == 0) {
598 if (speed_ability & MDIO_SPEED_10G) 598 if (speed_ability & MDIO_SPEED_10G)
@@ -806,11 +806,11 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
806 806
807 /* reset the PHY and poll for completion */ 807 /* reset the PHY and poll for completion */
808 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, 808 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS,
809 (phy_data | MDIO_CTRL1_RESET)); 809 (phy_data | MDIO_CTRL1_RESET));
810 810
811 for (i = 0; i < 100; i++) { 811 for (i = 0; i < 100; i++) {
812 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, 812 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS,
813 &phy_data); 813 &phy_data);
814 if ((phy_data & MDIO_CTRL1_RESET) == 0) 814 if ((phy_data & MDIO_CTRL1_RESET) == 0)
815 break; 815 break;
816 usleep_range(10000, 20000); 816 usleep_range(10000, 20000);
@@ -824,7 +824,7 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
824 824
825 /* Get init offsets */ 825 /* Get init offsets */
826 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, 826 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,
827 &data_offset); 827 &data_offset);
828 if (ret_val != 0) 828 if (ret_val != 0)
829 goto out; 829 goto out;
830 830
@@ -838,7 +838,7 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
838 if (ret_val) 838 if (ret_val)
839 goto err_eeprom; 839 goto err_eeprom;
840 control = (eword & IXGBE_CONTROL_MASK_NL) >> 840 control = (eword & IXGBE_CONTROL_MASK_NL) >>
841 IXGBE_CONTROL_SHIFT_NL; 841 IXGBE_CONTROL_SHIFT_NL;
842 edata = eword & IXGBE_DATA_MASK_NL; 842 edata = eword & IXGBE_DATA_MASK_NL;
843 switch (control) { 843 switch (control) {
844 case IXGBE_DELAY_NL: 844 case IXGBE_DELAY_NL:
@@ -859,7 +859,7 @@ s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)
859 if (ret_val) 859 if (ret_val)
860 goto err_eeprom; 860 goto err_eeprom;
861 hw->phy.ops.write_reg(hw, phy_offset, 861 hw->phy.ops.write_reg(hw, phy_offset,
862 MDIO_MMD_PMAPMD, eword); 862 MDIO_MMD_PMAPMD, eword);
863 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, 863 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword,
864 phy_offset); 864 phy_offset);
865 data_offset++; 865 data_offset++;
@@ -1010,10 +1010,10 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
1010 if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE) { 1010 if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE) {
1011 if (hw->bus.lan_id == 0) 1011 if (hw->bus.lan_id == 0)
1012 hw->phy.sfp_type = 1012 hw->phy.sfp_type =
1013 ixgbe_sfp_type_da_cu_core0; 1013 ixgbe_sfp_type_da_cu_core0;
1014 else 1014 else
1015 hw->phy.sfp_type = 1015 hw->phy.sfp_type =
1016 ixgbe_sfp_type_da_cu_core1; 1016 ixgbe_sfp_type_da_cu_core1;
1017 } else if (cable_tech & IXGBE_SFF_DA_ACTIVE_CABLE) { 1017 } else if (cable_tech & IXGBE_SFF_DA_ACTIVE_CABLE) {
1018 hw->phy.ops.read_i2c_eeprom( 1018 hw->phy.ops.read_i2c_eeprom(
1019 hw, IXGBE_SFF_CABLE_SPEC_COMP, 1019 hw, IXGBE_SFF_CABLE_SPEC_COMP,
@@ -1035,10 +1035,10 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
1035 IXGBE_SFF_10GBASELR_CAPABLE)) { 1035 IXGBE_SFF_10GBASELR_CAPABLE)) {
1036 if (hw->bus.lan_id == 0) 1036 if (hw->bus.lan_id == 0)
1037 hw->phy.sfp_type = 1037 hw->phy.sfp_type =
1038 ixgbe_sfp_type_srlr_core0; 1038 ixgbe_sfp_type_srlr_core0;
1039 else 1039 else
1040 hw->phy.sfp_type = 1040 hw->phy.sfp_type =
1041 ixgbe_sfp_type_srlr_core1; 1041 ixgbe_sfp_type_srlr_core1;
1042 } else if (comp_codes_1g & IXGBE_SFF_1GBASET_CAPABLE) { 1042 } else if (comp_codes_1g & IXGBE_SFF_1GBASET_CAPABLE) {
1043 if (hw->bus.lan_id == 0) 1043 if (hw->bus.lan_id == 0)
1044 hw->phy.sfp_type = 1044 hw->phy.sfp_type =
@@ -1087,15 +1087,15 @@ s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)
1087 goto err_read_i2c_eeprom; 1087 goto err_read_i2c_eeprom;
1088 1088
1089 status = hw->phy.ops.read_i2c_eeprom(hw, 1089 status = hw->phy.ops.read_i2c_eeprom(hw,
1090 IXGBE_SFF_VENDOR_OUI_BYTE1, 1090 IXGBE_SFF_VENDOR_OUI_BYTE1,
1091 &oui_bytes[1]); 1091 &oui_bytes[1]);
1092 1092
1093 if (status != 0) 1093 if (status != 0)
1094 goto err_read_i2c_eeprom; 1094 goto err_read_i2c_eeprom;
1095 1095
1096 status = hw->phy.ops.read_i2c_eeprom(hw, 1096 status = hw->phy.ops.read_i2c_eeprom(hw,
1097 IXGBE_SFF_VENDOR_OUI_BYTE2, 1097 IXGBE_SFF_VENDOR_OUI_BYTE2,
1098 &oui_bytes[2]); 1098 &oui_bytes[2]);
1099 1099
1100 if (status != 0) 1100 if (status != 0)
1101 goto err_read_i2c_eeprom; 1101 goto err_read_i2c_eeprom;
@@ -1403,8 +1403,8 @@ err_read_i2c_eeprom:
1403 * so it returns the offsets to the phy init sequence block. 1403 * so it returns the offsets to the phy init sequence block.
1404 **/ 1404 **/
1405s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, 1405s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
1406 u16 *list_offset, 1406 u16 *list_offset,
1407 u16 *data_offset) 1407 u16 *data_offset)
1408{ 1408{
1409 u16 sfp_id; 1409 u16 sfp_id;
1410 u16 sfp_type = hw->phy.sfp_type; 1410 u16 sfp_type = hw->phy.sfp_type;
@@ -1493,11 +1493,11 @@ err_phy:
1493 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1493 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1494 **/ 1494 **/
1495s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 1495s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
1496 u8 *eeprom_data) 1496 u8 *eeprom_data)
1497{ 1497{
1498 return hw->phy.ops.read_i2c_byte(hw, byte_offset, 1498 return hw->phy.ops.read_i2c_byte(hw, byte_offset,
1499 IXGBE_I2C_EEPROM_DEV_ADDR, 1499 IXGBE_I2C_EEPROM_DEV_ADDR,
1500 eeprom_data); 1500 eeprom_data);
1501} 1501}
1502 1502
1503/** 1503/**
@@ -1525,11 +1525,11 @@ s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
1525 * Performs byte write operation to SFP module's EEPROM over I2C interface. 1525 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1526 **/ 1526 **/
1527s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 1527s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
1528 u8 eeprom_data) 1528 u8 eeprom_data)
1529{ 1529{
1530 return hw->phy.ops.write_i2c_byte(hw, byte_offset, 1530 return hw->phy.ops.write_i2c_byte(hw, byte_offset,
1531 IXGBE_I2C_EEPROM_DEV_ADDR, 1531 IXGBE_I2C_EEPROM_DEV_ADDR,
1532 eeprom_data); 1532 eeprom_data);
1533} 1533}
1534 1534
1535/** 1535/**
@@ -1542,7 +1542,7 @@ s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
1542 * a specified device address. 1542 * a specified device address.
1543 **/ 1543 **/
1544s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 1544s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
1545 u8 dev_addr, u8 *data) 1545 u8 dev_addr, u8 *data)
1546{ 1546{
1547 s32 status = 0; 1547 s32 status = 0;
1548 u32 max_retry = 10; 1548 u32 max_retry = 10;
@@ -1631,7 +1631,7 @@ read_byte_out:
1631 * a specified device address. 1631 * a specified device address.
1632 **/ 1632 **/
1633s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 1633s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
1634 u8 dev_addr, u8 data) 1634 u8 dev_addr, u8 data)
1635{ 1635{
1636 s32 status = 0; 1636 s32 status = 0;
1637 u32 max_retry = 1; 1637 u32 max_retry = 1;
@@ -2046,7 +2046,7 @@ s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw)
2046 2046
2047 /* Check that the LASI temp alarm status was triggered */ 2047 /* Check that the LASI temp alarm status was triggered */
2048 hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, 2048 hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG,
2049 MDIO_MMD_PMAPMD, &phy_data); 2049 MDIO_MMD_PMAPMD, &phy_data);
2050 2050
2051 if (!(phy_data & IXGBE_TN_LASI_STATUS_TEMP_ALARM)) 2051 if (!(phy_data & IXGBE_TN_LASI_STATUS_TEMP_ALARM))
2052 goto out; 2052 goto out;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
index 0bb047f751c2..54071ed17e3b 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
@@ -114,47 +114,47 @@ s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
114s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw); 114s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
115s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw); 115s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
116s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 116s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
117 u32 device_type, u16 *phy_data); 117 u32 device_type, u16 *phy_data);
118s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 118s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
119 u32 device_type, u16 phy_data); 119 u32 device_type, u16 phy_data);
120s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, 120s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
121 u32 device_type, u16 *phy_data); 121 u32 device_type, u16 *phy_data);
122s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, 122s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
123 u32 device_type, u16 phy_data); 123 u32 device_type, u16 phy_data);
124s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw); 124s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
125s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, 125s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
126 ixgbe_link_speed speed, 126 ixgbe_link_speed speed,
127 bool autoneg_wait_to_complete); 127 bool autoneg_wait_to_complete);
128s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, 128s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
129 ixgbe_link_speed *speed, 129 ixgbe_link_speed *speed,
130 bool *autoneg); 130 bool *autoneg);
131bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw); 131bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
132 132
133/* PHY specific */ 133/* PHY specific */
134s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, 134s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
135 ixgbe_link_speed *speed, 135 ixgbe_link_speed *speed,
136 bool *link_up); 136 bool *link_up);
137s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw); 137s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);
138s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, 138s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw,
139 u16 *firmware_version); 139 u16 *firmware_version);
140s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, 140s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw,
141 u16 *firmware_version); 141 u16 *firmware_version);
142 142
143s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw); 143s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw);
144s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw); 144s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw);
145s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); 145s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw);
146s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, 146s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
147 u16 *list_offset, 147 u16 *list_offset,
148 u16 *data_offset); 148 u16 *data_offset);
149s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw); 149s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw);
150s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 150s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
151 u8 dev_addr, u8 *data); 151 u8 dev_addr, u8 *data);
152s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 152s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
153 u8 dev_addr, u8 data); 153 u8 dev_addr, u8 data);
154s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 154s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
155 u8 *eeprom_data); 155 u8 *eeprom_data);
156s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, 156s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
157 u8 *sff8472_data); 157 u8 *sff8472_data);
158s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 158s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
159 u8 eeprom_data); 159 u8 eeprom_data);
160#endif /* _IXGBE_PHY_H_ */ 160#endif /* _IXGBE_PHY_H_ */
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
index 3248e208c9dc..16b3a1cd9db6 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
@@ -1129,9 +1129,9 @@ int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos)
1129 adapter->vfinfo[vf].vlan_count--; 1129 adapter->vfinfo[vf].vlan_count--;
1130 adapter->vfinfo[vf].pf_vlan = 0; 1130 adapter->vfinfo[vf].pf_vlan = 0;
1131 adapter->vfinfo[vf].pf_qos = 0; 1131 adapter->vfinfo[vf].pf_qos = 0;
1132 } 1132 }
1133out: 1133out:
1134 return err; 1134 return err;
1135} 1135}
1136 1136
1137static int ixgbe_link_mbps(struct ixgbe_adapter *adapter) 1137static int ixgbe_link_mbps(struct ixgbe_adapter *adapter)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index 551d6089a4d3..9a89f98b35f0 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -160,7 +160,7 @@ struct ixgbe_thermal_sensor_data {
160#define IXGBE_MAX_EITR 0x00000FF8 160#define IXGBE_MAX_EITR 0x00000FF8
161#define IXGBE_MIN_EITR 8 161#define IXGBE_MIN_EITR 8
162#define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \ 162#define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \
163 (0x012300 + (((_i) - 24) * 4))) 163 (0x012300 + (((_i) - 24) * 4)))
164#define IXGBE_EITR_ITR_INT_MASK 0x00000FF8 164#define IXGBE_EITR_ITR_INT_MASK 0x00000FF8
165#define IXGBE_EITR_LLI_MOD 0x00008000 165#define IXGBE_EITR_LLI_MOD 0x00008000
166#define IXGBE_EITR_CNT_WDIS 0x80000000 166#define IXGBE_EITR_CNT_WDIS 0x80000000
@@ -213,7 +213,7 @@ struct ixgbe_thermal_sensor_data {
213 * 64-127: 0x0D014 + (n-64)*0x40 213 * 64-127: 0x0D014 + (n-64)*0x40
214 */ 214 */
215#define IXGBE_SRRCTL(_i) (((_i) <= 15) ? (0x02100 + ((_i) * 4)) : \ 215#define IXGBE_SRRCTL(_i) (((_i) <= 15) ? (0x02100 + ((_i) * 4)) : \
216 (((_i) < 64) ? (0x01014 + ((_i) * 0x40)) : \ 216 (((_i) < 64) ? (0x01014 + ((_i) * 0x40)) : \
217 (0x0D014 + (((_i) - 64) * 0x40)))) 217 (0x0D014 + (((_i) - 64) * 0x40))))
218/* 218/*
219 * Rx DCA Control Register: 219 * Rx DCA Control Register:
@@ -222,11 +222,11 @@ struct ixgbe_thermal_sensor_data {
222 * 64-127: 0x0D00C + (n-64)*0x40 222 * 64-127: 0x0D00C + (n-64)*0x40
223 */ 223 */
224#define IXGBE_DCA_RXCTRL(_i) (((_i) <= 15) ? (0x02200 + ((_i) * 4)) : \ 224#define IXGBE_DCA_RXCTRL(_i) (((_i) <= 15) ? (0x02200 + ((_i) * 4)) : \
225 (((_i) < 64) ? (0x0100C + ((_i) * 0x40)) : \ 225 (((_i) < 64) ? (0x0100C + ((_i) * 0x40)) : \
226 (0x0D00C + (((_i) - 64) * 0x40)))) 226 (0x0D00C + (((_i) - 64) * 0x40))))
227#define IXGBE_RDRXCTL 0x02F00 227#define IXGBE_RDRXCTL 0x02F00
228#define IXGBE_RXPBSIZE(_i) (0x03C00 + ((_i) * 4)) 228#define IXGBE_RXPBSIZE(_i) (0x03C00 + ((_i) * 4))
229 /* 8 of these 0x03C00 - 0x03C1C */ 229 /* 8 of these 0x03C00 - 0x03C1C */
230#define IXGBE_RXCTRL 0x03000 230#define IXGBE_RXCTRL 0x03000
231#define IXGBE_DROPEN 0x03D04 231#define IXGBE_DROPEN 0x03D04
232#define IXGBE_RXPBSIZE_SHIFT 10 232#define IXGBE_RXPBSIZE_SHIFT 10
@@ -239,14 +239,14 @@ struct ixgbe_thermal_sensor_data {
239/* Multicast Table Array - 128 entries */ 239/* Multicast Table Array - 128 entries */
240#define IXGBE_MTA(_i) (0x05200 + ((_i) * 4)) 240#define IXGBE_MTA(_i) (0x05200 + ((_i) * 4))
241#define IXGBE_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ 241#define IXGBE_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \
242 (0x0A200 + ((_i) * 8))) 242 (0x0A200 + ((_i) * 8)))
243#define IXGBE_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ 243#define IXGBE_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \
244 (0x0A204 + ((_i) * 8))) 244 (0x0A204 + ((_i) * 8)))
245#define IXGBE_MPSAR_LO(_i) (0x0A600 + ((_i) * 8)) 245#define IXGBE_MPSAR_LO(_i) (0x0A600 + ((_i) * 8))
246#define IXGBE_MPSAR_HI(_i) (0x0A604 + ((_i) * 8)) 246#define IXGBE_MPSAR_HI(_i) (0x0A604 + ((_i) * 8))
247/* Packet split receive type */ 247/* Packet split receive type */
248#define IXGBE_PSRTYPE(_i) (((_i) <= 15) ? (0x05480 + ((_i) * 4)) : \ 248#define IXGBE_PSRTYPE(_i) (((_i) <= 15) ? (0x05480 + ((_i) * 4)) : \
249 (0x0EA00 + ((_i) * 4))) 249 (0x0EA00 + ((_i) * 4)))
250/* array of 4096 1-bit vlan filters */ 250/* array of 4096 1-bit vlan filters */
251#define IXGBE_VFTA(_i) (0x0A000 + ((_i) * 4)) 251#define IXGBE_VFTA(_i) (0x0A000 + ((_i) * 4))
252/*array of 4096 4-bit vlan vmdq indices */ 252/*array of 4096 4-bit vlan vmdq indices */
@@ -696,7 +696,7 @@ struct ixgbe_thermal_sensor_data {
696 696
697#define IXGBE_RQSMR(_i) (0x02300 + ((_i) * 4)) 697#define IXGBE_RQSMR(_i) (0x02300 + ((_i) * 4))
698#define IXGBE_TQSMR(_i) (((_i) <= 7) ? (0x07300 + ((_i) * 4)) : \ 698#define IXGBE_TQSMR(_i) (((_i) <= 7) ? (0x07300 + ((_i) * 4)) : \
699 (0x08600 + ((_i) * 4))) 699 (0x08600 + ((_i) * 4)))
700#define IXGBE_TQSM(_i) (0x08600 + ((_i) * 4)) 700#define IXGBE_TQSM(_i) (0x08600 + ((_i) * 4))
701 701
702#define IXGBE_QPRC(_i) (0x01030 + ((_i) * 0x40)) /* 16 of these */ 702#define IXGBE_QPRC(_i) (0x01030 + ((_i) * 0x40)) /* 16 of these */
@@ -820,7 +820,7 @@ struct ixgbe_thermal_sensor_data {
820#define IXGBE_GCR_EXT_VT_MODE_32 0x00000002 820#define IXGBE_GCR_EXT_VT_MODE_32 0x00000002
821#define IXGBE_GCR_EXT_VT_MODE_64 0x00000003 821#define IXGBE_GCR_EXT_VT_MODE_64 0x00000003
822#define IXGBE_GCR_EXT_SRIOV (IXGBE_GCR_EXT_MSIX_EN | \ 822#define IXGBE_GCR_EXT_SRIOV (IXGBE_GCR_EXT_MSIX_EN | \
823 IXGBE_GCR_EXT_VT_MODE_64) 823 IXGBE_GCR_EXT_VT_MODE_64)
824 824
825/* Time Sync Registers */ 825/* Time Sync Registers */
826#define IXGBE_TSYNCRXCTL 0x05188 /* Rx Time Sync Control register - RW */ 826#define IXGBE_TSYNCRXCTL 0x05188 /* Rx Time Sync Control register - RW */
@@ -1396,10 +1396,10 @@ enum {
1396#define IXGBE_EIMC_OTHER IXGBE_EICR_OTHER /* INT Cause Active */ 1396#define IXGBE_EIMC_OTHER IXGBE_EICR_OTHER /* INT Cause Active */
1397 1397
1398#define IXGBE_EIMS_ENABLE_MASK ( \ 1398#define IXGBE_EIMS_ENABLE_MASK ( \
1399 IXGBE_EIMS_RTX_QUEUE | \ 1399 IXGBE_EIMS_RTX_QUEUE | \
1400 IXGBE_EIMS_LSC | \ 1400 IXGBE_EIMS_LSC | \
1401 IXGBE_EIMS_TCP_TIMER | \ 1401 IXGBE_EIMS_TCP_TIMER | \
1402 IXGBE_EIMS_OTHER) 1402 IXGBE_EIMS_OTHER)
1403 1403
1404/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */ 1404/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
1405#define IXGBE_IMIR_PORT_IM_EN 0x00010000 /* TCP port enable */ 1405#define IXGBE_IMIR_PORT_IM_EN 0x00010000 /* TCP port enable */
@@ -2161,18 +2161,18 @@ enum {
2161 2161
2162/* Masks to determine if packets should be dropped due to frame errors */ 2162/* Masks to determine if packets should be dropped due to frame errors */
2163#define IXGBE_RXD_ERR_FRAME_ERR_MASK ( \ 2163#define IXGBE_RXD_ERR_FRAME_ERR_MASK ( \
2164 IXGBE_RXD_ERR_CE | \ 2164 IXGBE_RXD_ERR_CE | \
2165 IXGBE_RXD_ERR_LE | \ 2165 IXGBE_RXD_ERR_LE | \
2166 IXGBE_RXD_ERR_PE | \ 2166 IXGBE_RXD_ERR_PE | \
2167 IXGBE_RXD_ERR_OSE | \ 2167 IXGBE_RXD_ERR_OSE | \
2168 IXGBE_RXD_ERR_USE) 2168 IXGBE_RXD_ERR_USE)
2169 2169
2170#define IXGBE_RXDADV_ERR_FRAME_ERR_MASK ( \ 2170#define IXGBE_RXDADV_ERR_FRAME_ERR_MASK ( \
2171 IXGBE_RXDADV_ERR_CE | \ 2171 IXGBE_RXDADV_ERR_CE | \
2172 IXGBE_RXDADV_ERR_LE | \ 2172 IXGBE_RXDADV_ERR_LE | \
2173 IXGBE_RXDADV_ERR_PE | \ 2173 IXGBE_RXDADV_ERR_PE | \
2174 IXGBE_RXDADV_ERR_OSE | \ 2174 IXGBE_RXDADV_ERR_OSE | \
2175 IXGBE_RXDADV_ERR_USE) 2175 IXGBE_RXDADV_ERR_USE)
2176 2176
2177/* Multicast bit mask */ 2177/* Multicast bit mask */
2178#define IXGBE_MCSTCTRL_MFE 0x4 2178#define IXGBE_MCSTCTRL_MFE 0x4
@@ -2393,9 +2393,9 @@ struct ixgbe_adv_tx_context_desc {
2393#define IXGBE_ADVTXD_CC 0x00000080 /* Check Context */ 2393#define IXGBE_ADVTXD_CC 0x00000080 /* Check Context */
2394#define IXGBE_ADVTXD_POPTS_SHIFT 8 /* Adv desc POPTS shift */ 2394#define IXGBE_ADVTXD_POPTS_SHIFT 8 /* Adv desc POPTS shift */
2395#define IXGBE_ADVTXD_POPTS_IXSM (IXGBE_TXD_POPTS_IXSM << \ 2395#define IXGBE_ADVTXD_POPTS_IXSM (IXGBE_TXD_POPTS_IXSM << \
2396 IXGBE_ADVTXD_POPTS_SHIFT) 2396 IXGBE_ADVTXD_POPTS_SHIFT)
2397#define IXGBE_ADVTXD_POPTS_TXSM (IXGBE_TXD_POPTS_TXSM << \ 2397#define IXGBE_ADVTXD_POPTS_TXSM (IXGBE_TXD_POPTS_TXSM << \
2398 IXGBE_ADVTXD_POPTS_SHIFT) 2398 IXGBE_ADVTXD_POPTS_SHIFT)
2399#define IXGBE_ADVTXD_POPTS_ISCO_1ST 0x00000000 /* 1st TSO of iSCSI PDU */ 2399#define IXGBE_ADVTXD_POPTS_ISCO_1ST 0x00000000 /* 1st TSO of iSCSI PDU */
2400#define IXGBE_ADVTXD_POPTS_ISCO_MDL 0x00000800 /* Middle TSO of iSCSI PDU */ 2400#define IXGBE_ADVTXD_POPTS_ISCO_MDL 0x00000800 /* Middle TSO of iSCSI PDU */
2401#define IXGBE_ADVTXD_POPTS_ISCO_LAST 0x00001000 /* Last TSO of iSCSI PDU */ 2401#define IXGBE_ADVTXD_POPTS_ISCO_LAST 0x00001000 /* Last TSO of iSCSI PDU */
@@ -2435,10 +2435,10 @@ typedef u32 ixgbe_link_speed;
2435#define IXGBE_LINK_SPEED_1GB_FULL 0x0020 2435#define IXGBE_LINK_SPEED_1GB_FULL 0x0020
2436#define IXGBE_LINK_SPEED_10GB_FULL 0x0080 2436#define IXGBE_LINK_SPEED_10GB_FULL 0x0080
2437#define IXGBE_LINK_SPEED_82598_AUTONEG (IXGBE_LINK_SPEED_1GB_FULL | \ 2437#define IXGBE_LINK_SPEED_82598_AUTONEG (IXGBE_LINK_SPEED_1GB_FULL | \
2438 IXGBE_LINK_SPEED_10GB_FULL) 2438 IXGBE_LINK_SPEED_10GB_FULL)
2439#define IXGBE_LINK_SPEED_82599_AUTONEG (IXGBE_LINK_SPEED_100_FULL | \ 2439#define IXGBE_LINK_SPEED_82599_AUTONEG (IXGBE_LINK_SPEED_100_FULL | \
2440 IXGBE_LINK_SPEED_1GB_FULL | \ 2440 IXGBE_LINK_SPEED_1GB_FULL | \
2441 IXGBE_LINK_SPEED_10GB_FULL) 2441 IXGBE_LINK_SPEED_10GB_FULL)
2442 2442
2443 2443
2444/* Physical layer type */ 2444/* Physical layer type */
@@ -2840,7 +2840,7 @@ struct ixgbe_hw;
2840 2840
2841/* iterator type for walking multicast address lists */ 2841/* iterator type for walking multicast address lists */
2842typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr, 2842typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr,
2843 u32 *vmdq); 2843 u32 *vmdq);
2844 2844
2845/* Function pointer table */ 2845/* Function pointer table */
2846struct ixgbe_eeprom_operations { 2846struct ixgbe_eeprom_operations {
@@ -2887,7 +2887,7 @@ struct ixgbe_mac_operations {
2887 s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool); 2887 s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool);
2888 s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); 2888 s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool);
2889 s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *, 2889 s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *,
2890 bool *); 2890 bool *);
2891 2891
2892 /* Packet Buffer Manipulation */ 2892 /* Packet Buffer Manipulation */
2893 void (*set_rxpba)(struct ixgbe_hw *, int, u32, int); 2893 void (*set_rxpba)(struct ixgbe_hw *, int, u32, int);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
index 188a5974b85c..40dd798e1290 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
@@ -81,7 +81,7 @@ static s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
81 bool autoneg_wait_to_complete) 81 bool autoneg_wait_to_complete)
82{ 82{
83 return hw->phy.ops.setup_link_speed(hw, speed, 83 return hw->phy.ops.setup_link_speed(hw, speed,
84 autoneg_wait_to_complete); 84 autoneg_wait_to_complete);
85} 85}
86 86
87/** 87/**
@@ -155,7 +155,7 @@ mac_reset_top:
155 /* Add the SAN MAC address to the RAR only if it's a valid address */ 155 /* Add the SAN MAC address to the RAR only if it's a valid address */
156 if (is_valid_ether_addr(hw->mac.san_addr)) { 156 if (is_valid_ether_addr(hw->mac.san_addr)) {
157 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1, 157 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
158 hw->mac.san_addr, 0, IXGBE_RAH_AV); 158 hw->mac.san_addr, 0, IXGBE_RAH_AV);
159 159
160 /* Save the SAN MAC RAR index */ 160 /* Save the SAN MAC RAR index */
161 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; 161 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;
@@ -166,7 +166,7 @@ mac_reset_top:
166 166
167 /* Store the alternative WWNN/WWPN prefix */ 167 /* Store the alternative WWNN/WWPN prefix */
168 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, 168 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,
169 &hw->mac.wwpn_prefix); 169 &hw->mac.wwpn_prefix);
170 170
171reset_hw_out: 171reset_hw_out:
172 return status; 172 return status;
@@ -237,9 +237,9 @@ static s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)
237 237
238 eec = IXGBE_READ_REG(hw, IXGBE_EEC); 238 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
239 eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >> 239 eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >>
240 IXGBE_EEC_SIZE_SHIFT); 240 IXGBE_EEC_SIZE_SHIFT);
241 eeprom->word_size = 1 << (eeprom_size + 241 eeprom->word_size = 1 << (eeprom_size +
242 IXGBE_EEPROM_WORD_SIZE_SHIFT); 242 IXGBE_EEPROM_WORD_SIZE_SHIFT);
243 243
244 hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", 244 hw_dbg(hw, "Eeprom params: type = %d, size = %d\n",
245 eeprom->type, eeprom->word_size); 245 eeprom->type, eeprom->word_size);
@@ -712,8 +712,7 @@ static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw)
712 udelay(50); 712 udelay(50);
713 } 713 }
714 } else { 714 } else {
715 hw_dbg(hw, "Software semaphore SMBI between device drivers " 715 hw_dbg(hw, "Software semaphore SMBI between device drivers not granted.\n");
716 "not granted.\n");
717 } 716 }
718 717
719 return status; 718 return status;
@@ -813,7 +812,7 @@ static struct ixgbe_mac_operations mac_ops_X540 = {
813 .clear_hw_cntrs = &ixgbe_clear_hw_cntrs_generic, 812 .clear_hw_cntrs = &ixgbe_clear_hw_cntrs_generic,
814 .get_media_type = &ixgbe_get_media_type_X540, 813 .get_media_type = &ixgbe_get_media_type_X540,
815 .get_supported_physical_layer = 814 .get_supported_physical_layer =
816 &ixgbe_get_supported_physical_layer_X540, 815 &ixgbe_get_supported_physical_layer_X540,
817 .enable_rx_dma = &ixgbe_enable_rx_dma_generic, 816 .enable_rx_dma = &ixgbe_enable_rx_dma_generic,
818 .get_mac_addr = &ixgbe_get_mac_addr_generic, 817 .get_mac_addr = &ixgbe_get_mac_addr_generic,
819 .get_san_mac_addr = &ixgbe_get_san_mac_addr_generic, 818 .get_san_mac_addr = &ixgbe_get_san_mac_addr_generic,
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-12 00:12:43 -0400