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authorJon Mason <jon.mason@broadcom.com>2017-03-02 19:21:32 -0500
committerFlorian Fainelli <f.fainelli@gmail.com>2017-03-05 20:10:55 -0500
commit0c2bf9f95983fe30aa2f6463cb761cd42c2d521a (patch)
treef3625cea02f6a8e9af1d2ec1afb745df520c8040
parent88d1fa70c21d7b431386cfe70cdc514d98b0c9c4 (diff)
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
GIC_PPI flags were misconfigured for the timers, resulting in errors like: [ 0.000000] GIC: PPI11 is secure or misconfigured Changing them to being edge triggered corrects the issue Suggested-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Jon Mason <jon.mason@broadcom.com> Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-rw-r--r--arch/arm/boot/dts/bcm5301x.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 4fbb089cf5ad..00de62dc0042 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -66,14 +66,14 @@
66 timer@20200 { 66 timer@20200 {
67 compatible = "arm,cortex-a9-global-timer"; 67 compatible = "arm,cortex-a9-global-timer";
68 reg = <0x20200 0x100>; 68 reg = <0x20200 0x100>;
69 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 69 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
70 clocks = <&periph_clk>; 70 clocks = <&periph_clk>;
71 }; 71 };
72 72
73 local-timer@20600 { 73 local-timer@20600 {
74 compatible = "arm,cortex-a9-twd-timer"; 74 compatible = "arm,cortex-a9-twd-timer";
75 reg = <0x20600 0x100>; 75 reg = <0x20600 0x100>;
76 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 76 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
77 clocks = <&periph_clk>; 77 clocks = <&periph_clk>;
78 }; 78 };
79 79