diff options
| author | Christian König <christian.koenig@amd.com> | 2018-07-06 07:46:05 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-10 16:36:21 -0400 |
| commit | 0b9021972d3eef525d53076d8c7ac091e988d2e4 (patch) | |
| tree | 34f6777acfbc376654404d781c2c02fdbe4ad7b1 | |
| parent | ed6b4b5559769c6c5a0fcb3fac8a9e1f4e58c4ae (diff) | |
drm/amd/display: fix invalid function table override
Otherwise we try to program hardware with the wrong watermark functions
when multiple DCE generations are installed in one system.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c | 27 |
1 files changed, 25 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c index b235a75355b8..bae752332a9f 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c | |||
| @@ -741,6 +741,29 @@ static struct mem_input_funcs dce_mi_funcs = { | |||
| 741 | .mem_input_is_flip_pending = dce_mi_is_flip_pending | 741 | .mem_input_is_flip_pending = dce_mi_is_flip_pending |
| 742 | }; | 742 | }; |
| 743 | 743 | ||
| 744 | static struct mem_input_funcs dce112_mi_funcs = { | ||
| 745 | .mem_input_program_display_marks = dce112_mi_program_display_marks, | ||
| 746 | .allocate_mem_input = dce_mi_allocate_dmif, | ||
| 747 | .free_mem_input = dce_mi_free_dmif, | ||
| 748 | .mem_input_program_surface_flip_and_addr = | ||
| 749 | dce_mi_program_surface_flip_and_addr, | ||
| 750 | .mem_input_program_pte_vm = dce_mi_program_pte_vm, | ||
| 751 | .mem_input_program_surface_config = | ||
| 752 | dce_mi_program_surface_config, | ||
| 753 | .mem_input_is_flip_pending = dce_mi_is_flip_pending | ||
| 754 | }; | ||
| 755 | |||
| 756 | static struct mem_input_funcs dce120_mi_funcs = { | ||
| 757 | .mem_input_program_display_marks = dce120_mi_program_display_marks, | ||
| 758 | .allocate_mem_input = dce_mi_allocate_dmif, | ||
| 759 | .free_mem_input = dce_mi_free_dmif, | ||
| 760 | .mem_input_program_surface_flip_and_addr = | ||
| 761 | dce_mi_program_surface_flip_and_addr, | ||
| 762 | .mem_input_program_pte_vm = dce_mi_program_pte_vm, | ||
| 763 | .mem_input_program_surface_config = | ||
| 764 | dce_mi_program_surface_config, | ||
| 765 | .mem_input_is_flip_pending = dce_mi_is_flip_pending | ||
| 766 | }; | ||
| 744 | 767 | ||
| 745 | void dce_mem_input_construct( | 768 | void dce_mem_input_construct( |
| 746 | struct dce_mem_input *dce_mi, | 769 | struct dce_mem_input *dce_mi, |
| @@ -769,7 +792,7 @@ void dce112_mem_input_construct( | |||
| 769 | const struct dce_mem_input_mask *mi_mask) | 792 | const struct dce_mem_input_mask *mi_mask) |
| 770 | { | 793 | { |
| 771 | dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask); | 794 | dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask); |
| 772 | dce_mi->base.funcs->mem_input_program_display_marks = dce112_mi_program_display_marks; | 795 | dce_mi->base.funcs = &dce112_mi_funcs; |
| 773 | } | 796 | } |
| 774 | 797 | ||
| 775 | void dce120_mem_input_construct( | 798 | void dce120_mem_input_construct( |
| @@ -781,5 +804,5 @@ void dce120_mem_input_construct( | |||
| 781 | const struct dce_mem_input_mask *mi_mask) | 804 | const struct dce_mem_input_mask *mi_mask) |
| 782 | { | 805 | { |
| 783 | dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask); | 806 | dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask); |
| 784 | dce_mi->base.funcs->mem_input_program_display_marks = dce120_mi_program_display_marks; | 807 | dce_mi->base.funcs = &dce120_mi_funcs; |
| 785 | } | 808 | } |
