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authorBjorn Helgaas <bhelgaas@google.com>2017-12-02 14:21:37 -0500
committerBjorn Helgaas <bhelgaas@google.com>2017-12-19 00:08:44 -0500
commit0aa0f5d1084ca1cc302e3c2025065a2a2182bb08 (patch)
tree93007135e50380bc6c3a85a47a1ef27890346fff
parent3e466e2d3a04c726cb85f0d97a288769ff9de7a5 (diff)
PCI: Clean up whitespace in linux/pci.h, pci/pci.h
Clean up whitespace, capitalization, etc. in comments. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r--drivers/pci/pci.h54
-rw-r--r--include/linux/pci.h411
2 files changed, 222 insertions, 243 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index f6b58b32a67c..69fc9c1b4668 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -38,21 +38,21 @@ int pci_probe_reset_function(struct pci_dev *dev);
38 * struct pci_platform_pm_ops - Firmware PM callbacks 38 * struct pci_platform_pm_ops - Firmware PM callbacks
39 * 39 *
40 * @is_manageable: returns 'true' if given device is power manageable by the 40 * @is_manageable: returns 'true' if given device is power manageable by the
41 * platform firmware 41 * platform firmware
42 * 42 *
43 * @set_state: invokes the platform firmware to set the device's power state 43 * @set_state: invokes the platform firmware to set the device's power state
44 * 44 *
45 * @get_state: queries the platform firmware for a device's current power state 45 * @get_state: queries the platform firmware for a device's current power state
46 * 46 *
47 * @choose_state: returns PCI power state of given device preferred by the 47 * @choose_state: returns PCI power state of given device preferred by the
48 * platform; to be used during system-wide transitions from a 48 * platform; to be used during system-wide transitions from a
49 * sleeping state to the working state and vice versa 49 * sleeping state to the working state and vice versa
50 * 50 *
51 * @set_wakeup: enables/disables wakeup capability for the device 51 * @set_wakeup: enables/disables wakeup capability for the device
52 * 52 *
53 * @need_resume: returns 'true' if the given device (which is currently 53 * @need_resume: returns 'true' if the given device (which is currently
54 * suspended) needs to be resumed to be configured for system 54 * suspended) needs to be resumed to be configured for system
55 * wakeup. 55 * wakeup.
56 * 56 *
57 * If given platform is generally capable of power managing PCI devices, all of 57 * If given platform is generally capable of power managing PCI devices, all of
58 * these callbacks are mandatory. 58 * these callbacks are mandatory.
@@ -112,7 +112,7 @@ struct pci_vpd_ops {
112 112
113struct pci_vpd { 113struct pci_vpd {
114 const struct pci_vpd_ops *ops; 114 const struct pci_vpd_ops *ops;
115 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 115 struct bin_attribute *attr; /* Descriptor for sysfs VPD entry */
116 struct mutex lock; 116 struct mutex lock;
117 unsigned int len; 117 unsigned int len;
118 u16 flag; 118 u16 flag;
@@ -199,7 +199,7 @@ extern const struct attribute_group *pci_bus_groups[];
199 199
200/** 200/**
201 * pci_match_one_device - Tell if a PCI device structure has a matching 201 * pci_match_one_device - Tell if a PCI device structure has a matching
202 * PCI device id structure 202 * PCI device id structure
203 * @id: single PCI device id structure to match 203 * @id: single PCI device id structure to match
204 * @dev: the PCI device structure to match against 204 * @dev: the PCI device structure to match against
205 * 205 *
@@ -231,7 +231,7 @@ struct pci_slot_attribute {
231 231
232enum pci_bar_type { 232enum pci_bar_type {
233 pci_bar_unknown, /* Standard PCI BAR probe */ 233 pci_bar_unknown, /* Standard PCI BAR probe */
234 pci_bar_io, /* An io port BAR */ 234 pci_bar_io, /* An I/O port BAR */
235 pci_bar_mem32, /* A 32-bit memory BAR */ 235 pci_bar_mem32, /* A 32-bit memory BAR */
236 pci_bar_mem64, /* A 64-bit memory BAR */ 236 pci_bar_mem64, /* A 64-bit memory BAR */
237}; 237};
@@ -255,24 +255,24 @@ void pci_disable_bridge_window(struct pci_dev *dev);
255 255
256/* Single Root I/O Virtualization */ 256/* Single Root I/O Virtualization */
257struct pci_sriov { 257struct pci_sriov {
258 int pos; /* capability position */ 258 int pos; /* Capability position */
259 int nres; /* number of resources */ 259 int nres; /* Number of resources */
260 u32 cap; /* SR-IOV Capabilities */ 260 u32 cap; /* SR-IOV Capabilities */
261 u16 ctrl; /* SR-IOV Control */ 261 u16 ctrl; /* SR-IOV Control */
262 u16 total_VFs; /* total VFs associated with the PF */ 262 u16 total_VFs; /* Total VFs associated with the PF */
263 u16 initial_VFs; /* initial VFs associated with the PF */ 263 u16 initial_VFs; /* Initial VFs associated with the PF */
264 u16 num_VFs; /* number of VFs available */ 264 u16 num_VFs; /* Number of VFs available */
265 u16 offset; /* first VF Routing ID offset */ 265 u16 offset; /* First VF Routing ID offset */
266 u16 stride; /* following VF stride */ 266 u16 stride; /* Following VF stride */
267 u16 vf_device; /* VF device ID */ 267 u16 vf_device; /* VF device ID */
268 u32 pgsz; /* page size for BAR alignment */ 268 u32 pgsz; /* Page size for BAR alignment */
269 u8 link; /* Function Dependency Link */ 269 u8 link; /* Function Dependency Link */
270 u8 max_VF_buses; /* max buses consumed by VFs */ 270 u8 max_VF_buses; /* Max buses consumed by VFs */
271 u16 driver_max_VFs; /* max num VFs driver supports */ 271 u16 driver_max_VFs; /* Max num VFs driver supports */
272 struct pci_dev *dev; /* lowest numbered PF */ 272 struct pci_dev *dev; /* Lowest numbered PF */
273 struct pci_dev *self; /* this PF */ 273 struct pci_dev *self; /* This PF */
274 resource_size_t barsz[PCI_SRIOV_NUM_BARS]; /* VF BAR size */ 274 resource_size_t barsz[PCI_SRIOV_NUM_BARS]; /* VF BAR size */
275 bool drivers_autoprobe; /* auto probing of VFs by driver */ 275 bool drivers_autoprobe; /* Auto probing of VFs by driver */
276}; 276};
277 277
278/* pci_dev priv_flags */ 278/* pci_dev priv_flags */
@@ -335,7 +335,7 @@ static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
335 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 335 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
336 return pci_sriov_resource_alignment(dev, resno); 336 return pci_sriov_resource_alignment(dev, resno);
337#endif 337#endif
338 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) 338 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
339 return pci_cardbus_resource_alignment(res); 339 return pci_cardbus_resource_alignment(res);
340 return resource_alignment(res); 340 return resource_alignment(res);
341} 341}
diff --git a/include/linux/pci.h b/include/linux/pci.h
index c170c9250c8b..ff5f5124aacc 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -48,17 +48,17 @@
48 * In the interest of not exposing interfaces to user-space unnecessarily, 48 * In the interest of not exposing interfaces to user-space unnecessarily,
49 * the following kernel-only defines are being added here. 49 * the following kernel-only defines are being added here.
50 */ 50 */
51#define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) 51#define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn))
52/* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ 52/* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
53#define PCI_BUS_NUM(x) (((x) >> 8) & 0xff) 53#define PCI_BUS_NUM(x) (((x) >> 8) & 0xff)
54 54
55/* pci_slot represents a physical slot */ 55/* pci_slot represents a physical slot */
56struct pci_slot { 56struct pci_slot {
57 struct pci_bus *bus; /* The bus this slot is on */ 57 struct pci_bus *bus; /* Bus this slot is on */
58 struct list_head list; /* node in list of slots on this bus */ 58 struct list_head list; /* Node in list of slots */
59 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ 59 struct hotplug_slot *hotplug; /* Hotplug info (move here) */
60 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ 60 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
61 struct kobject kobj; 61 struct kobject kobj;
62}; 62};
63 63
64static inline const char *pci_slot_name(const struct pci_slot *slot) 64static inline const char *pci_slot_name(const struct pci_slot *slot)
@@ -72,9 +72,7 @@ enum pci_mmap_state {
72 pci_mmap_mem 72 pci_mmap_mem
73}; 73};
74 74
75/* 75/* For PCI devices, the region numbers are assigned this way: */
76 * For PCI devices, the region numbers are assigned this way:
77 */
78enum { 76enum {
79 /* #0-5: standard PCI resources */ 77 /* #0-5: standard PCI resources */
80 PCI_STD_RESOURCES, 78 PCI_STD_RESOURCES,
@@ -83,23 +81,23 @@ enum {
83 /* #6: expansion ROM resource */ 81 /* #6: expansion ROM resource */
84 PCI_ROM_RESOURCE, 82 PCI_ROM_RESOURCE,
85 83
86 /* device specific resources */ 84 /* Device-specific resources */
87#ifdef CONFIG_PCI_IOV 85#ifdef CONFIG_PCI_IOV
88 PCI_IOV_RESOURCES, 86 PCI_IOV_RESOURCES,
89 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, 87 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
90#endif 88#endif
91 89
92 /* resources assigned to buses behind the bridge */ 90 /* Resources assigned to buses behind the bridge */
93#define PCI_BRIDGE_RESOURCE_NUM 4 91#define PCI_BRIDGE_RESOURCE_NUM 4
94 92
95 PCI_BRIDGE_RESOURCES, 93 PCI_BRIDGE_RESOURCES,
96 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + 94 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
97 PCI_BRIDGE_RESOURCE_NUM - 1, 95 PCI_BRIDGE_RESOURCE_NUM - 1,
98 96
99 /* total resources associated with a PCI device */ 97 /* Total resources associated with a PCI device */
100 PCI_NUM_RESOURCES, 98 PCI_NUM_RESOURCES,
101 99
102 /* preserve this for compatibility */ 100 /* Preserve this for compatibility */
103 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES, 101 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
104}; 102};
105 103
@@ -152,9 +150,10 @@ static inline const char *pci_power_name(pci_power_t state)
152#define PCI_PM_D3COLD_WAIT 100 150#define PCI_PM_D3COLD_WAIT 100
153#define PCI_PM_BUS_WAIT 50 151#define PCI_PM_BUS_WAIT 50
154 152
155/** The pci_channel state describes connectivity between the CPU and 153/**
156 * the pci device. If some PCI bus between here and the pci device 154 * The pci_channel state describes connectivity between the CPU and
157 * has crashed or locked up, this info is reflected here. 155 * the PCI device. If some PCI bus between here and the PCI device
156 * has crashed or locked up, this info is reflected here.
158 */ 157 */
159typedef unsigned int __bitwise pci_channel_state_t; 158typedef unsigned int __bitwise pci_channel_state_t;
160 159
@@ -184,9 +183,7 @@ enum pcie_reset_state {
184 183
185typedef unsigned short __bitwise pci_dev_flags_t; 184typedef unsigned short __bitwise pci_dev_flags_t;
186enum pci_dev_flags { 185enum pci_dev_flags {
187 /* INTX_DISABLE in PCI_COMMAND register disables MSI 186 /* INTX_DISABLE in PCI_COMMAND register disables MSI too */
188 * generation too.
189 */
190 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0), 187 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0),
191 /* Device configuration is irrevocably lost if disabled into D3 */ 188 /* Device configuration is irrevocably lost if disabled into D3 */
192 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1), 189 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1),
@@ -202,7 +199,7 @@ enum pci_dev_flags {
202 PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7), 199 PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7),
203 /* Get VPD from function 0 VPD */ 200 /* Get VPD from function 0 VPD */
204 PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8), 201 PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8),
205 /* a non-root bridge where translation occurs, stop alias search here */ 202 /* A non-root bridge where translation occurs, stop alias search here */
206 PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT = (__force pci_dev_flags_t) (1 << 9), 203 PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT = (__force pci_dev_flags_t) (1 << 9),
207 /* Do not use FLR even if device advertises PCI_AF_CAP */ 204 /* Do not use FLR even if device advertises PCI_AF_CAP */
208 PCI_DEV_FLAGS_NO_FLR_RESET = (__force pci_dev_flags_t) (1 << 10), 205 PCI_DEV_FLAGS_NO_FLR_RESET = (__force pci_dev_flags_t) (1 << 10),
@@ -222,17 +219,17 @@ enum pci_bus_flags {
222 PCI_BUS_FLAGS_NO_AERSID = (__force pci_bus_flags_t) 4, 219 PCI_BUS_FLAGS_NO_AERSID = (__force pci_bus_flags_t) 4,
223}; 220};
224 221
225/* These values come from the PCI Express Spec */ 222/* Values from Link Status register, PCIe r3.1, sec 7.8.8 */
226enum pcie_link_width { 223enum pcie_link_width {
227 PCIE_LNK_WIDTH_RESRV = 0x00, 224 PCIE_LNK_WIDTH_RESRV = 0x00,
228 PCIE_LNK_X1 = 0x01, 225 PCIE_LNK_X1 = 0x01,
229 PCIE_LNK_X2 = 0x02, 226 PCIE_LNK_X2 = 0x02,
230 PCIE_LNK_X4 = 0x04, 227 PCIE_LNK_X4 = 0x04,
231 PCIE_LNK_X8 = 0x08, 228 PCIE_LNK_X8 = 0x08,
232 PCIE_LNK_X12 = 0x0C, 229 PCIE_LNK_X12 = 0x0c,
233 PCIE_LNK_X16 = 0x10, 230 PCIE_LNK_X16 = 0x10,
234 PCIE_LNK_X32 = 0x20, 231 PCIE_LNK_X32 = 0x20,
235 PCIE_LNK_WIDTH_UNKNOWN = 0xFF, 232 PCIE_LNK_WIDTH_UNKNOWN = 0xff,
236}; 233};
237 234
238/* Based on the PCI Hotplug Spec, but some values are made up by us */ 235/* Based on the PCI Hotplug Spec, but some values are made up by us */
@@ -263,15 +260,15 @@ enum pci_bus_speed {
263}; 260};
264 261
265struct pci_cap_saved_data { 262struct pci_cap_saved_data {
266 u16 cap_nr; 263 u16 cap_nr;
267 bool cap_extended; 264 bool cap_extended;
268 unsigned int size; 265 unsigned int size;
269 u32 data[0]; 266 u32 data[0];
270}; 267};
271 268
272struct pci_cap_saved_state { 269struct pci_cap_saved_state {
273 struct hlist_node next; 270 struct hlist_node next;
274 struct pci_cap_saved_data cap; 271 struct pci_cap_saved_data cap;
275}; 272};
276 273
277struct irq_affinity; 274struct irq_affinity;
@@ -280,19 +277,17 @@ struct pci_vpd;
280struct pci_sriov; 277struct pci_sriov;
281struct pci_ats; 278struct pci_ats;
282 279
283/* 280/* The pci_dev structure describes PCI devices */
284 * The pci_dev structure is used to describe PCI devices.
285 */
286struct pci_dev { 281struct pci_dev {
287 struct list_head bus_list; /* node in per-bus list */ 282 struct list_head bus_list; /* Node in per-bus list */
288 struct pci_bus *bus; /* bus this device is on */ 283 struct pci_bus *bus; /* Bus this device is on */
289 struct pci_bus *subordinate; /* bus this device bridges to */ 284 struct pci_bus *subordinate; /* Bus this device bridges to */
290 285
291 void *sysdata; /* hook for sys-specific extension */ 286 void *sysdata; /* Hook for sys-specific extension */
292 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ 287 struct proc_dir_entry *procent; /* Device entry in /proc/bus/pci */
293 struct pci_slot *slot; /* Physical slot this device is in */ 288 struct pci_slot *slot; /* Physical slot this device is in */
294 289
295 unsigned int devfn; /* encoded device & function index */ 290 unsigned int devfn; /* Encoded device & function index */
296 unsigned short vendor; 291 unsigned short vendor;
297 unsigned short device; 292 unsigned short device;
298 unsigned short subsystem_vendor; 293 unsigned short subsystem_vendor;
@@ -307,12 +302,12 @@ struct pci_dev {
307 u8 msi_cap; /* MSI capability offset */ 302 u8 msi_cap; /* MSI capability offset */
308 u8 msix_cap; /* MSI-X capability offset */ 303 u8 msix_cap; /* MSI-X capability offset */
309 u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */ 304 u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */
310 u8 rom_base_reg; /* which config register controls the ROM */ 305 u8 rom_base_reg; /* Config register controlling ROM */
311 u8 pin; /* which interrupt pin this device uses */ 306 u8 pin; /* Interrupt pin this device uses */
312 u16 pcie_flags_reg; /* cached PCIe Capabilities Register */ 307 u16 pcie_flags_reg; /* Cached PCIe Capabilities Register */
313 unsigned long *dma_alias_mask;/* mask of enabled devfn aliases */ 308 unsigned long *dma_alias_mask;/* Mask of enabled devfn aliases */
314 309
315 struct pci_driver *driver; /* which driver has allocated this device */ 310 struct pci_driver *driver; /* Driver bound to this device */
316 u64 dma_mask; /* Mask of the bits of bus address this 311 u64 dma_mask; /* Mask of the bits of bus address this
317 device implements. Normally this is 312 device implements. Normally this is
318 0xffffffff. You only need to change 313 0xffffffff. You only need to change
@@ -321,9 +316,9 @@ struct pci_dev {
321 316
322 struct device_dma_parameters dma_parms; 317 struct device_dma_parameters dma_parms;
323 318
324 pci_power_t current_state; /* Current operating state. In ACPI-speak, 319 pci_power_t current_state; /* Current operating state. In ACPI,
325 this is D0-D3, D0 being fully functional, 320 this is D0-D3, D0 being fully
326 and D3 being off. */ 321 functional, and D3 being off. */
327 u8 pm_cap; /* PM capability offset */ 322 u8 pm_cap; /* PM capability offset */
328 unsigned int pme_support:5; /* Bitmask of states from which PME# 323 unsigned int pme_support:5; /* Bitmask of states from which PME#
329 can be generated */ 324 can be generated */
@@ -334,10 +329,10 @@ struct pci_dev {
334 unsigned int no_d3cold:1; /* D3cold is forbidden */ 329 unsigned int no_d3cold:1; /* D3cold is forbidden */
335 unsigned int bridge_d3:1; /* Allow D3 for bridge */ 330 unsigned int bridge_d3:1; /* Allow D3 for bridge */
336 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ 331 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */
337 unsigned int mmio_always_on:1; /* disallow turning off io/mem 332 unsigned int mmio_always_on:1; /* Disallow turning off io/mem
338 decoding during bar sizing */ 333 decoding during BAR sizing */
339 unsigned int wakeup_prepared:1; 334 unsigned int wakeup_prepared:1;
340 unsigned int runtime_d3cold:1; /* whether go through runtime 335 unsigned int runtime_d3cold:1; /* Whether go through runtime
341 D3cold, not set for devices 336 D3cold, not set for devices
342 powered on/off by the 337 powered on/off by the
343 corresponding bridge */ 338 corresponding bridge */
@@ -352,10 +347,10 @@ struct pci_dev {
352 struct pcie_link_state *link_state; /* ASPM link state */ 347 struct pcie_link_state *link_state; /* ASPM link state */
353#endif 348#endif
354 349
355 pci_channel_state_t error_state; /* current connectivity state */ 350 pci_channel_state_t error_state; /* Current connectivity state */
356 struct device dev; /* Generic device interface */ 351 struct device dev; /* Generic device interface */
357 352
358 int cfg_size; /* Size of configuration space */ 353 int cfg_size; /* Size of config space */
359 354
360 /* 355 /*
361 * Instead of touching interrupt line and base address registers 356 * Instead of touching interrupt line and base address registers
@@ -364,47 +359,47 @@ struct pci_dev {
364 unsigned int irq; 359 unsigned int irq;
365 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ 360 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
366 361
367 bool match_driver; /* Skip attaching driver */ 362 bool match_driver; /* Skip attaching driver */
368 /* These fields are used by common fixups */ 363
369 unsigned int transparent:1; /* Subtractive decode PCI bridge */ 364 unsigned int transparent:1; /* Subtractive decode bridge */
370 unsigned int multifunction:1;/* Part of multi-function device */ 365 unsigned int multifunction:1; /* Multi-function device */
371 /* keep track of device state */ 366
372 unsigned int is_added:1; 367 unsigned int is_added:1;
373 unsigned int is_busmaster:1; /* device is busmaster */ 368 unsigned int is_busmaster:1; /* Is busmaster */
374 unsigned int no_msi:1; /* device may not use msi */ 369 unsigned int no_msi:1; /* May not use MSI */
375 unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */ 370 unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
376 unsigned int block_cfg_access:1; /* config space access is blocked */ 371 unsigned int block_cfg_access:1; /* Config space access blocked */
377 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 372 unsigned int broken_parity_status:1; /* Generates false positive parity */
378 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ 373 unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */
379 unsigned int msi_enabled:1; 374 unsigned int msi_enabled:1;
380 unsigned int msix_enabled:1; 375 unsigned int msix_enabled:1;
381 unsigned int ari_enabled:1; /* ARI forwarding */ 376 unsigned int ari_enabled:1; /* ARI forwarding */
382 unsigned int ats_enabled:1; /* Address Translation Service */ 377 unsigned int ats_enabled:1; /* Address Translation Svc */
383 unsigned int pasid_enabled:1; /* Process Address Space ID */ 378 unsigned int pasid_enabled:1; /* Process Address Space ID */
384 unsigned int pri_enabled:1; /* Page Request Interface */ 379 unsigned int pri_enabled:1; /* Page Request Interface */
385 unsigned int is_managed:1; 380 unsigned int is_managed:1;
386 unsigned int needs_freset:1; /* Dev requires fundamental reset */ 381 unsigned int needs_freset:1; /* Requires fundamental reset */
387 unsigned int state_saved:1; 382 unsigned int state_saved:1;
388 unsigned int is_physfn:1; 383 unsigned int is_physfn:1;
389 unsigned int is_virtfn:1; 384 unsigned int is_virtfn:1;
390 unsigned int reset_fn:1; 385 unsigned int reset_fn:1;
391 unsigned int is_hotplug_bridge:1; 386 unsigned int is_hotplug_bridge:1;
392 unsigned int is_thunderbolt:1; /* Thunderbolt controller */ 387 unsigned int is_thunderbolt:1; /* Thunderbolt controller */
393 unsigned int __aer_firmware_first_valid:1; 388 unsigned int __aer_firmware_first_valid:1;
394 unsigned int __aer_firmware_first:1; 389 unsigned int __aer_firmware_first:1;
395 unsigned int broken_intx_masking:1; /* INTx masking can't be used */ 390 unsigned int broken_intx_masking:1; /* INTx masking can't be used */
396 unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */ 391 unsigned int io_window_1k:1; /* Intel bridge 1K I/O windows */
397 unsigned int irq_managed:1; 392 unsigned int irq_managed:1;
398 unsigned int has_secondary_link:1; 393 unsigned int has_secondary_link:1;
399 unsigned int non_compliant_bars:1; /* broken BARs; ignore them */ 394 unsigned int non_compliant_bars:1; /* Broken BARs; ignore them */
400 unsigned int is_probed:1; /* device probing in progress */ 395 unsigned int is_probed:1; /* Device probing in progress */
401 pci_dev_flags_t dev_flags; 396 pci_dev_flags_t dev_flags;
402 atomic_t enable_cnt; /* pci_enable_device has been called */ 397 atomic_t enable_cnt; /* pci_enable_device has been called */
403 398
404 u32 saved_config_space[16]; /* config space saved at suspend time */ 399 u32 saved_config_space[16]; /* Config space saved at suspend time */
405 struct hlist_head saved_cap_space; 400 struct hlist_head saved_cap_space;
406 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ 401 struct bin_attribute *rom_attr; /* Attribute descriptor for sysfs ROM entry */
407 int rom_attr_enabled; /* has display of the rom attribute been enabled? */ 402 int rom_attr_enabled; /* Display of ROM attribute enabled? */
408 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ 403 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
409 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */ 404 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
410 405
@@ -419,12 +414,12 @@ struct pci_dev {
419 struct pci_vpd *vpd; 414 struct pci_vpd *vpd;
420#ifdef CONFIG_PCI_ATS 415#ifdef CONFIG_PCI_ATS
421 union { 416 union {
422 struct pci_sriov *sriov; /* SR-IOV capability related */ 417 struct pci_sriov *sriov; /* PF: SR-IOV info */
423 struct pci_dev *physfn; /* the PF this VF is associated with */ 418 struct pci_dev *physfn; /* VF: related PF */
424 }; 419 };
425 u16 ats_cap; /* ATS Capability offset */ 420 u16 ats_cap; /* ATS Capability offset */
426 u8 ats_stu; /* ATS Smallest Translation Unit */ 421 u8 ats_stu; /* ATS Smallest Translation Unit */
427 atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */ 422 atomic_t ats_ref_cnt; /* Number of VFs with ATS enabled */
428#endif 423#endif
429#ifdef CONFIG_PCI_PRI 424#ifdef CONFIG_PCI_PRI
430 u32 pri_reqs_alloc; /* Number of PRI requests allocated */ 425 u32 pri_reqs_alloc; /* Number of PRI requests allocated */
@@ -432,11 +427,11 @@ struct pci_dev {
432#ifdef CONFIG_PCI_PASID 427#ifdef CONFIG_PCI_PASID
433 u16 pasid_features; 428 u16 pasid_features;
434#endif 429#endif
435 phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */ 430 phys_addr_t rom; /* Physical address if not from BAR */
436 size_t romlen; /* Length of ROM if it's not from the BAR */ 431 size_t romlen; /* Length if not from BAR */
437 char *driver_override; /* Driver name to force a match */ 432 char *driver_override; /* Driver name to force a match */
438 433
439 unsigned long priv_flags; /* Private flags for the pci driver */ 434 unsigned long priv_flags; /* Private flags for the PCI driver */
440}; 435};
441 436
442static inline struct pci_dev *pci_physfn(struct pci_dev *dev) 437static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
@@ -459,26 +454,26 @@ static inline int pci_channel_offline(struct pci_dev *pdev)
459} 454}
460 455
461struct pci_host_bridge { 456struct pci_host_bridge {
462 struct device dev; 457 struct device dev;
463 struct pci_bus *bus; /* root bus */ 458 struct pci_bus *bus; /* Root bus */
464 struct pci_ops *ops; 459 struct pci_ops *ops;
465 void *sysdata; 460 void *sysdata;
466 int busnr; 461 int busnr;
467 struct list_head windows; /* resource_entry */ 462 struct list_head windows; /* resource_entry */
468 u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* platform IRQ swizzler */ 463 u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */
469 int (*map_irq)(const struct pci_dev *, u8, u8); 464 int (*map_irq)(const struct pci_dev *, u8, u8);
470 void (*release_fn)(struct pci_host_bridge *); 465 void (*release_fn)(struct pci_host_bridge *);
471 void *release_data; 466 void *release_data;
472 struct msi_controller *msi; 467 struct msi_controller *msi;
473 unsigned int ignore_reset_delay:1; /* for entire hierarchy */ 468 unsigned int ignore_reset_delay:1; /* For entire hierarchy */
474 unsigned int no_ext_tags:1; /* no Extended Tags */ 469 unsigned int no_ext_tags:1; /* No Extended Tags */
475 /* Resource alignment requirements */ 470 /* Resource alignment requirements */
476 resource_size_t (*align_resource)(struct pci_dev *dev, 471 resource_size_t (*align_resource)(struct pci_dev *dev,
477 const struct resource *res, 472 const struct resource *res,
478 resource_size_t start, 473 resource_size_t start,
479 resource_size_t size, 474 resource_size_t size,
480 resource_size_t align); 475 resource_size_t align);
481 unsigned long private[0] ____cacheline_aligned; 476 unsigned long private[0] ____cacheline_aligned;
482}; 477};
483 478
484#define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev) 479#define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
@@ -500,8 +495,8 @@ void pci_free_host_bridge(struct pci_host_bridge *bridge);
500struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); 495struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus);
501 496
502void pci_set_host_bridge_release(struct pci_host_bridge *bridge, 497void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
503 void (*release_fn)(struct pci_host_bridge *), 498 void (*release_fn)(struct pci_host_bridge *),
504 void *release_data); 499 void *release_data);
505 500
506int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge); 501int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
507 502
@@ -521,32 +516,32 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
521#define PCI_SUBTRACTIVE_DECODE 0x1 516#define PCI_SUBTRACTIVE_DECODE 0x1
522 517
523struct pci_bus_resource { 518struct pci_bus_resource {
524 struct list_head list; 519 struct list_head list;
525 struct resource *res; 520 struct resource *res;
526 unsigned int flags; 521 unsigned int flags;
527}; 522};
528 523
529#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ 524#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
530 525
531struct pci_bus { 526struct pci_bus {
532 struct list_head node; /* node in list of buses */ 527 struct list_head node; /* Node in list of buses */
533 struct pci_bus *parent; /* parent bus this bridge is on */ 528 struct pci_bus *parent; /* Parent bus this bridge is on */
534 struct list_head children; /* list of child buses */ 529 struct list_head children; /* List of child buses */
535 struct list_head devices; /* list of devices on this bus */ 530 struct list_head devices; /* List of devices on this bus */
536 struct pci_dev *self; /* bridge device as seen by parent */ 531 struct pci_dev *self; /* Bridge device as seen by parent */
537 struct list_head slots; /* list of slots on this bus; 532 struct list_head slots; /* List of slots on this bus;
538 protected by pci_slot_mutex */ 533 protected by pci_slot_mutex */
539 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; 534 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
540 struct list_head resources; /* address space routed to this bus */ 535 struct list_head resources; /* Address space routed to this bus */
541 struct resource busn_res; /* bus numbers routed to this bus */ 536 struct resource busn_res; /* Bus numbers routed to this bus */
542 537
543 struct pci_ops *ops; /* configuration access functions */ 538 struct pci_ops *ops; /* Configuration access functions */
544 struct msi_controller *msi; /* MSI controller */ 539 struct msi_controller *msi; /* MSI controller */
545 void *sysdata; /* hook for sys-specific extension */ 540 void *sysdata; /* Hook for sys-specific extension */
546 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ 541 struct proc_dir_entry *procdir; /* Directory entry in /proc/bus/pci */
547 542
548 unsigned char number; /* bus number */ 543 unsigned char number; /* Bus number */
549 unsigned char primary; /* number of primary bridge */ 544 unsigned char primary; /* Number of primary bridge */
550 unsigned char max_bus_speed; /* enum pci_bus_speed */ 545 unsigned char max_bus_speed; /* enum pci_bus_speed */
551 unsigned char cur_bus_speed; /* enum pci_bus_speed */ 546 unsigned char cur_bus_speed; /* enum pci_bus_speed */
552#ifdef CONFIG_PCI_DOMAINS_GENERIC 547#ifdef CONFIG_PCI_DOMAINS_GENERIC
@@ -555,12 +550,12 @@ struct pci_bus {
555 550
556 char name[48]; 551 char name[48];
557 552
558 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ 553 unsigned short bridge_ctl; /* Manage NO_ISA/FBB/et al behaviors */
559 pci_bus_flags_t bus_flags; /* inherited by child buses */ 554 pci_bus_flags_t bus_flags; /* Inherited by child buses */
560 struct device *bridge; 555 struct device *bridge;
561 struct device dev; 556 struct device dev;
562 struct bin_attribute *legacy_io; /* legacy I/O for this bus */ 557 struct bin_attribute *legacy_io; /* Legacy I/O for this bus */
563 struct bin_attribute *legacy_mem; /* legacy mem */ 558 struct bin_attribute *legacy_mem; /* Legacy mem */
564 unsigned int is_added:1; 559 unsigned int is_added:1;
565}; 560};
566 561
@@ -617,9 +612,7 @@ static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
617static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } 612static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
618#endif 613#endif
619 614
620/* 615/* Error values that may be returned by PCI functions */
621 * Error values that may be returned by PCI functions.
622 */
623#define PCIBIOS_SUCCESSFUL 0x00 616#define PCIBIOS_SUCCESSFUL 0x00
624#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 617#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
625#define PCIBIOS_BAD_VENDOR_ID 0x83 618#define PCIBIOS_BAD_VENDOR_ID 0x83
@@ -628,9 +621,7 @@ static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false;
628#define PCIBIOS_SET_FAILED 0x88 621#define PCIBIOS_SET_FAILED 0x88
629#define PCIBIOS_BUFFER_TOO_SMALL 0x89 622#define PCIBIOS_BUFFER_TOO_SMALL 0x89
630 623
631/* 624/* Translate above to generic errno for passing back through non-PCI code */
632 * Translate above to generic errno for passing back through non-PCI code.
633 */
634static inline int pcibios_err_to_errno(int err) 625static inline int pcibios_err_to_errno(int err)
635{ 626{
636 if (err <= PCIBIOS_SUCCESSFUL) 627 if (err <= PCIBIOS_SUCCESSFUL)
@@ -680,13 +671,13 @@ typedef u32 pci_bus_addr_t;
680#endif 671#endif
681 672
682struct pci_bus_region { 673struct pci_bus_region {
683 pci_bus_addr_t start; 674 pci_bus_addr_t start;
684 pci_bus_addr_t end; 675 pci_bus_addr_t end;
685}; 676};
686 677
687struct pci_dynids { 678struct pci_dynids {
688 spinlock_t lock; /* protects list, index */ 679 spinlock_t lock; /* Protects list, index */
689 struct list_head list; /* for IDs added at runtime */ 680 struct list_head list; /* For IDs added at runtime */
690}; 681};
691 682
692 683
@@ -700,13 +691,13 @@ struct pci_dynids {
700typedef unsigned int __bitwise pci_ers_result_t; 691typedef unsigned int __bitwise pci_ers_result_t;
701 692
702enum pci_ers_result { 693enum pci_ers_result {
703 /* no result/none/not supported in device driver */ 694 /* No result/none/not supported in device driver */
704 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 695 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
705 696
706 /* Device driver can recover without slot reset */ 697 /* Device driver can recover without slot reset */
707 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 698 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
708 699
709 /* Device driver wants slot to be reset. */ 700 /* Device driver wants slot to be reset */
710 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 701 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
711 702
712 /* Device has completely failed, is unrecoverable */ 703 /* Device has completely failed, is unrecoverable */
@@ -742,27 +733,27 @@ struct pci_error_handlers {
742 733
743struct module; 734struct module;
744struct pci_driver { 735struct pci_driver {
745 struct list_head node; 736 struct list_head node;
746 const char *name; 737 const char *name;
747 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ 738 const struct pci_device_id *id_table; /* Must be non-NULL for probe to be called */
748 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ 739 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
749 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ 740 void (*remove)(struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
750 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 741 int (*suspend)(struct pci_dev *dev, pm_message_t state); /* Device suspended */
751 int (*suspend_late) (struct pci_dev *dev, pm_message_t state); 742 int (*suspend_late)(struct pci_dev *dev, pm_message_t state);
752 int (*resume_early) (struct pci_dev *dev); 743 int (*resume_early)(struct pci_dev *dev);
753 int (*resume) (struct pci_dev *dev); /* Device woken up */ 744 int (*resume) (struct pci_dev *dev); /* Device woken up */
754 void (*shutdown) (struct pci_dev *dev); 745 void (*shutdown) (struct pci_dev *dev);
755 int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */ 746 int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* On PF */
756 const struct pci_error_handlers *err_handler; 747 const struct pci_error_handlers *err_handler;
757 const struct attribute_group **groups; 748 const struct attribute_group **groups;
758 struct device_driver driver; 749 struct device_driver driver;
759 struct pci_dynids dynids; 750 struct pci_dynids dynids;
760}; 751};
761 752
762#define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) 753#define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
763 754
764/** 755/**
765 * PCI_DEVICE - macro used to describe a specific pci device 756 * PCI_DEVICE - macro used to describe a specific PCI device
766 * @vend: the 16 bit PCI Vendor ID 757 * @vend: the 16 bit PCI Vendor ID
767 * @dev: the 16 bit PCI Device ID 758 * @dev: the 16 bit PCI Device ID
768 * 759 *
@@ -775,7 +766,7 @@ struct pci_driver {
775 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 766 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
776 767
777/** 768/**
778 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem 769 * PCI_DEVICE_SUB - macro used to describe a specific PCI device with subsystem
779 * @vend: the 16 bit PCI Vendor ID 770 * @vend: the 16 bit PCI Vendor ID
780 * @dev: the 16 bit PCI Device ID 771 * @dev: the 16 bit PCI Device ID
781 * @subvend: the 16 bit PCI Subvendor ID 772 * @subvend: the 16 bit PCI Subvendor ID
@@ -789,7 +780,7 @@ struct pci_driver {
789 .subvendor = (subvend), .subdevice = (subdev) 780 .subvendor = (subvend), .subdevice = (subdev)
790 781
791/** 782/**
792 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class 783 * PCI_DEVICE_CLASS - macro used to describe a specific PCI device class
793 * @dev_class: the class, subclass, prog-if triple for this device 784 * @dev_class: the class, subclass, prog-if triple for this device
794 * @dev_class_mask: the class mask for this device 785 * @dev_class_mask: the class mask for this device
795 * 786 *
@@ -803,7 +794,7 @@ struct pci_driver {
803 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 794 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
804 795
805/** 796/**
806 * PCI_VDEVICE - macro used to describe a specific pci device in short form 797 * PCI_VDEVICE - macro used to describe a specific PCI device in short form
807 * @vend: the vendor name 798 * @vend: the vendor name
808 * @dev: the 16 bit PCI Device ID 799 * @dev: the 16 bit PCI Device ID
809 * 800 *
@@ -812,22 +803,21 @@ struct pci_driver {
812 * to PCI_ANY_ID. The macro allows the next field to follow as the device 803 * to PCI_ANY_ID. The macro allows the next field to follow as the device
813 * private data. 804 * private data.
814 */ 805 */
815
816#define PCI_VDEVICE(vend, dev) \ 806#define PCI_VDEVICE(vend, dev) \
817 .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ 807 .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \
818 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 808 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0
819 809
820enum { 810enum {
821 PCI_REASSIGN_ALL_RSRC = 0x00000001, /* ignore firmware setup */ 811 PCI_REASSIGN_ALL_RSRC = 0x00000001, /* Ignore firmware setup */
822 PCI_REASSIGN_ALL_BUS = 0x00000002, /* reassign all bus numbers */ 812 PCI_REASSIGN_ALL_BUS = 0x00000002, /* Reassign all bus numbers */
823 PCI_PROBE_ONLY = 0x00000004, /* use existing setup */ 813 PCI_PROBE_ONLY = 0x00000004, /* Use existing setup */
824 PCI_CAN_SKIP_ISA_ALIGN = 0x00000008, /* don't do ISA alignment */ 814 PCI_CAN_SKIP_ISA_ALIGN = 0x00000008, /* Don't do ISA alignment */
825 PCI_ENABLE_PROC_DOMAINS = 0x00000010, /* enable domains in /proc */ 815 PCI_ENABLE_PROC_DOMAINS = 0x00000010, /* Enable domains in /proc */
826 PCI_COMPAT_DOMAIN_0 = 0x00000020, /* ... except domain 0 */ 816 PCI_COMPAT_DOMAIN_0 = 0x00000020, /* ... except domain 0 */
827 PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* scan all, not just dev 0 */ 817 PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* Scan all, not just dev 0 */
828}; 818};
829 819
830/* these external functions are only available when PCI support is enabled */ 820/* These external functions are only available when PCI support is enabled */
831#ifdef CONFIG_PCI 821#ifdef CONFIG_PCI
832 822
833extern unsigned int pci_flags; 823extern unsigned int pci_flags;
@@ -840,11 +830,11 @@ static inline int pci_has_flag(int flag) { return pci_flags & flag; }
840void pcie_bus_configure_settings(struct pci_bus *bus); 830void pcie_bus_configure_settings(struct pci_bus *bus);
841 831
842enum pcie_bus_config_types { 832enum pcie_bus_config_types {
843 PCIE_BUS_TUNE_OFF, /* don't touch MPS at all */ 833 PCIE_BUS_TUNE_OFF, /* Don't touch MPS at all */
844 PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */ 834 PCIE_BUS_DEFAULT, /* Ensure MPS matches upstream bridge */
845 PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */ 835 PCIE_BUS_SAFE, /* Use largest MPS boot-time devices support */
846 PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */ 836 PCIE_BUS_PERFORMANCE, /* Use MPS and MRRS for best performance */
847 PCIE_BUS_PEER2PEER, /* set MPS = 128 for all devices */ 837 PCIE_BUS_PEER2PEER, /* Set MPS = 128 for all devices */
848}; 838};
849 839
850extern enum pcie_bus_config_types pcie_bus_config; 840extern enum pcie_bus_config_types pcie_bus_config;
@@ -853,7 +843,7 @@ extern struct bus_type pci_bus_type;
853 843
854/* Do NOT directly access these two variables, unless you are arch-specific PCI 844/* Do NOT directly access these two variables, unless you are arch-specific PCI
855 * code, or PCI core code. */ 845 * code, or PCI core code. */
856extern struct list_head pci_root_buses; /* list of all known PCI buses */ 846extern struct list_head pci_root_buses; /* List of all known PCI buses */
857/* Some device drivers need know if PCI is initiated */ 847/* Some device drivers need know if PCI is initiated */
858int no_pci_devices(void); 848int no_pci_devices(void);
859 849
@@ -891,8 +881,8 @@ int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
891int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); 881int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
892void pci_bus_release_busn_res(struct pci_bus *b); 882void pci_bus_release_busn_res(struct pci_bus *b);
893struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, 883struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
894 struct pci_ops *ops, void *sysdata, 884 struct pci_ops *ops, void *sysdata,
895 struct list_head *resources); 885 struct list_head *resources);
896int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge); 886int pci_scan_root_bus_bridge(struct pci_host_bridge *bridge);
897struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, 887struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
898 int busnr); 888 int busnr);
@@ -949,10 +939,10 @@ int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
949struct pci_bus *pci_find_next_bus(const struct pci_bus *from); 939struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
950 940
951struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, 941struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
952 struct pci_dev *from); 942 struct pci_dev *from);
953struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, 943struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
954 unsigned int ss_vendor, unsigned int ss_device, 944 unsigned int ss_vendor, unsigned int ss_device,
955 struct pci_dev *from); 945 struct pci_dev *from);
956struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); 946struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
957struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, 947struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
958 unsigned int devfn); 948 unsigned int devfn);
@@ -1028,7 +1018,7 @@ static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
1028 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0); 1018 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
1029} 1019}
1030 1020
1031/* user-space driven config access */ 1021/* User-space driven config access */
1032int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); 1022int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
1033int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); 1023int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
1034int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); 1024int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
@@ -1170,7 +1160,7 @@ unsigned int pci_rescan_bus(struct pci_bus *bus);
1170void pci_lock_rescan_remove(void); 1160void pci_lock_rescan_remove(void);
1171void pci_unlock_rescan_remove(void); 1161void pci_unlock_rescan_remove(void);
1172 1162
1173/* Vital product data routines */ 1163/* Vital Product Data routines */
1174ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 1164ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
1175ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 1165ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
1176int pci_set_vpd_size(struct pci_dev *dev, size_t len); 1166int pci_set_vpd_size(struct pci_dev *dev, size_t len);
@@ -1255,9 +1245,7 @@ static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar)
1255int __must_check __pci_register_driver(struct pci_driver *, struct module *, 1245int __must_check __pci_register_driver(struct pci_driver *, struct module *,
1256 const char *mod_name); 1246 const char *mod_name);
1257 1247
1258/* 1248/* pci_register_driver() must be a macro so KBUILD_MODNAME can be expanded */
1259 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
1260 */
1261#define pci_register_driver(driver) \ 1249#define pci_register_driver(driver) \
1262 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) 1250 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
1263 1251
@@ -1272,8 +1260,7 @@ void pci_unregister_driver(struct pci_driver *dev);
1272 * use this macro once, and calling it replaces module_init() and module_exit() 1260 * use this macro once, and calling it replaces module_init() and module_exit()
1273 */ 1261 */
1274#define module_pci_driver(__pci_driver) \ 1262#define module_pci_driver(__pci_driver) \
1275 module_driver(__pci_driver, pci_register_driver, \ 1263 module_driver(__pci_driver, pci_register_driver, pci_unregister_driver)
1276 pci_unregister_driver)
1277 1264
1278/** 1265/**
1279 * builtin_pci_driver() - Helper macro for registering a PCI driver 1266 * builtin_pci_driver() - Helper macro for registering a PCI driver
@@ -1312,10 +1299,10 @@ resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
1312int pci_set_vga_state(struct pci_dev *pdev, bool decode, 1299int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1313 unsigned int command_bits, u32 flags); 1300 unsigned int command_bits, u32 flags);
1314 1301
1315#define PCI_IRQ_LEGACY (1 << 0) /* allow legacy interrupts */ 1302#define PCI_IRQ_LEGACY (1 << 0) /* Allow legacy interrupts */
1316#define PCI_IRQ_MSI (1 << 1) /* allow MSI interrupts */ 1303#define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */
1317#define PCI_IRQ_MSIX (1 << 2) /* allow MSI-X interrupts */ 1304#define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */
1318#define PCI_IRQ_AFFINITY (1 << 3) /* auto-assign affinity */ 1305#define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */
1319#define PCI_IRQ_ALL_TYPES \ 1306#define PCI_IRQ_ALL_TYPES \
1320 (PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX) 1307 (PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX)
1321 1308
@@ -1334,8 +1321,8 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1334#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) 1321#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
1335 1322
1336struct msix_entry { 1323struct msix_entry {
1337 u32 vector; /* kernel uses to write allocated vector */ 1324 u32 vector; /* Kernel uses to write allocated vector */
1338 u16 entry; /* driver uses to specify entry, OS writes */ 1325 u16 entry; /* Driver uses to specify entry, OS writes */
1339}; 1326};
1340 1327
1341#ifdef CONFIG_PCI_MSI 1328#ifdef CONFIG_PCI_MSI
@@ -1375,10 +1362,10 @@ static inline int pci_msi_enabled(void) { return 0; }
1375static inline int pci_enable_msi(struct pci_dev *dev) 1362static inline int pci_enable_msi(struct pci_dev *dev)
1376{ return -ENOSYS; } 1363{ return -ENOSYS; }
1377static inline int pci_enable_msix_range(struct pci_dev *dev, 1364static inline int pci_enable_msix_range(struct pci_dev *dev,
1378 struct msix_entry *entries, int minvec, int maxvec) 1365 struct msix_entry *entries, int minvec, int maxvec)
1379{ return -ENOSYS; } 1366{ return -ENOSYS; }
1380static inline int pci_enable_msix_exact(struct pci_dev *dev, 1367static inline int pci_enable_msix_exact(struct pci_dev *dev,
1381 struct msix_entry *entries, int nvec) 1368 struct msix_entry *entries, int nvec)
1382{ return -ENOSYS; } 1369{ return -ENOSYS; }
1383 1370
1384static inline int 1371static inline int
@@ -1543,9 +1530,9 @@ static inline int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
1543int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent); 1530int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent);
1544#endif 1531#endif
1545 1532
1546/* some architectures require additional setup to direct VGA traffic */ 1533/* Some architectures require additional setup to direct VGA traffic */
1547typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, 1534typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1548 unsigned int command_bits, u32 flags); 1535 unsigned int command_bits, u32 flags);
1549void pci_register_set_vga_state(arch_set_vga_state_t func); 1536void pci_register_set_vga_state(arch_set_vga_state_t func);
1550 1537
1551static inline int 1538static inline int
@@ -1584,10 +1571,9 @@ static inline void pci_clear_flags(int flags) { }
1584static inline int pci_has_flag(int flag) { return 0; } 1571static inline int pci_has_flag(int flag) { return 0; }
1585 1572
1586/* 1573/*
1587 * If the system does not have PCI, clearly these return errors. Define 1574 * If the system does not have PCI, clearly these return errors. Define
1588 * these as simple inline functions to avoid hair in drivers. 1575 * these as simple inline functions to avoid hair in drivers.
1589 */ 1576 */
1590
1591#define _PCI_NOP(o, s, t) \ 1577#define _PCI_NOP(o, s, t) \
1592 static inline int pci_##o##_config_##s(struct pci_dev *dev, \ 1578 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1593 int where, t val) \ 1579 int where, t val) \
@@ -1726,8 +1712,10 @@ int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma);
1726#define pci_root_bus_fwnode(bus) NULL 1712#define pci_root_bus_fwnode(bus) NULL
1727#endif 1713#endif
1728 1714
1729/* these helpers provide future and backwards compatibility 1715/*
1730 * for accessing popular PCI BAR info */ 1716 * These helpers provide future and backwards compatibility
1717 * for accessing popular PCI BAR info
1718 */
1731#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) 1719#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1732#define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) 1720#define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1733#define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) 1721#define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
@@ -1739,7 +1727,8 @@ int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma);
1739 (pci_resource_end((dev), (bar)) - \ 1727 (pci_resource_end((dev), (bar)) - \
1740 pci_resource_start((dev), (bar)) + 1)) 1728 pci_resource_start((dev), (bar)) + 1))
1741 1729
1742/* Similar to the helpers above, these manipulate per-pci_dev 1730/*
1731 * Similar to the helpers above, these manipulate per-pci_dev
1743 * driver-specific data. They are really just a wrapper around 1732 * driver-specific data. They are really just a wrapper around
1744 * the generic device structure functions of these calls. 1733 * the generic device structure functions of these calls.
1745 */ 1734 */
@@ -1753,16 +1742,14 @@ static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1753 dev_set_drvdata(&pdev->dev, data); 1742 dev_set_drvdata(&pdev->dev, data);
1754} 1743}
1755 1744
1756/* If you want to know what to call your pci_dev, ask this function.
1757 * Again, it's a wrapper around the generic device.
1758 */
1759static inline const char *pci_name(const struct pci_dev *pdev) 1745static inline const char *pci_name(const struct pci_dev *pdev)
1760{ 1746{
1761 return dev_name(&pdev->dev); 1747 return dev_name(&pdev->dev);
1762} 1748}
1763 1749
1764 1750
1765/* Some archs don't want to expose struct resource to userland as-is 1751/*
1752 * Some archs don't want to expose struct resource to userland as-is
1766 * in sysfs and /proc 1753 * in sysfs and /proc
1767 */ 1754 */
1768#ifdef HAVE_ARCH_PCI_RESOURCE_TO_USER 1755#ifdef HAVE_ARCH_PCI_RESOURCE_TO_USER
@@ -1781,16 +1768,16 @@ static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1781 1768
1782 1769
1783/* 1770/*
1784 * The world is not perfect and supplies us with broken PCI devices. 1771 * The world is not perfect and supplies us with broken PCI devices.
1785 * For at least a part of these bugs we need a work-around, so both 1772 * For at least a part of these bugs we need a work-around, so both
1786 * generic (drivers/pci/quirks.c) and per-architecture code can define 1773 * generic (drivers/pci/quirks.c) and per-architecture code can define
1787 * fixup hooks to be called for particular buggy devices. 1774 * fixup hooks to be called for particular buggy devices.
1788 */ 1775 */
1789 1776
1790struct pci_fixup { 1777struct pci_fixup {
1791 u16 vendor; /* You can use PCI_ANY_ID here of course */ 1778 u16 vendor; /* Or PCI_ANY_ID */
1792 u16 device; /* You can use PCI_ANY_ID here of course */ 1779 u16 device; /* Or PCI_ANY_ID */
1793 u32 class; /* You can use PCI_ANY_ID here too */ 1780 u32 class; /* Or PCI_ANY_ID */
1794 unsigned int class_shift; /* should be 0, 8, 16 */ 1781 unsigned int class_shift; /* should be 0, 8, 16 */
1795 void (*hook)(struct pci_dev *dev); 1782 void (*hook)(struct pci_dev *dev);
1796}; 1783};
@@ -1832,23 +1819,19 @@ enum pci_fixup_pass {
1832#define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \ 1819#define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \
1833 class_shift, hook) \ 1820 class_shift, hook) \
1834 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ 1821 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1835 resume##hook, vendor, device, class, \ 1822 resume##hook, vendor, device, class, class_shift, hook)
1836 class_shift, hook)
1837#define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \ 1823#define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \
1838 class_shift, hook) \ 1824 class_shift, hook) \
1839 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ 1825 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1840 resume_early##hook, vendor, device, \ 1826 resume_early##hook, vendor, device, class, class_shift, hook)
1841 class, class_shift, hook)
1842#define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \ 1827#define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \
1843 class_shift, hook) \ 1828 class_shift, hook) \
1844 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ 1829 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1845 suspend##hook, vendor, device, class, \ 1830 suspend##hook, vendor, device, class, class_shift, hook)
1846 class_shift, hook)
1847#define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \ 1831#define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \
1848 class_shift, hook) \ 1832 class_shift, hook) \
1849 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ 1833 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \
1850 suspend_late##hook, vendor, device, \ 1834 suspend_late##hook, vendor, device, class, class_shift, hook)
1851 class, class_shift, hook)
1852 1835
1853#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ 1836#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1854 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ 1837 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
@@ -1864,20 +1847,16 @@ enum pci_fixup_pass {
1864 hook, vendor, device, PCI_ANY_ID, 0, hook) 1847 hook, vendor, device, PCI_ANY_ID, 0, hook)
1865#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ 1848#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1866 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ 1849 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1867 resume##hook, vendor, device, \ 1850 resume##hook, vendor, device, PCI_ANY_ID, 0, hook)
1868 PCI_ANY_ID, 0, hook)
1869#define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ 1851#define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1870 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ 1852 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1871 resume_early##hook, vendor, device, \ 1853 resume_early##hook, vendor, device, PCI_ANY_ID, 0, hook)
1872 PCI_ANY_ID, 0, hook)
1873#define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ 1854#define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1874 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ 1855 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1875 suspend##hook, vendor, device, \ 1856 suspend##hook, vendor, device, PCI_ANY_ID, 0, hook)
1876 PCI_ANY_ID, 0, hook)
1877#define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \ 1857#define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \
1878 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \ 1858 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \
1879 suspend_late##hook, vendor, device, \ 1859 suspend_late##hook, vendor, device, PCI_ANY_ID, 0, hook)
1880 PCI_ANY_ID, 0, hook)
1881 1860
1882#ifdef CONFIG_PCI_QUIRKS 1861#ifdef CONFIG_PCI_QUIRKS
1883void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); 1862void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
@@ -2112,7 +2091,7 @@ static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
2112 */ 2091 */
2113static inline u16 pci_vpd_lrdt_tag(const u8 *lrdt) 2092static inline u16 pci_vpd_lrdt_tag(const u8 *lrdt)
2114{ 2093{
2115 return (u16)(lrdt[0] & PCI_VPD_LRDT_TIN_MASK); 2094 return (u16)(lrdt[0] & PCI_VPD_LRDT_TIN_MASK);
2116} 2095}
2117 2096
2118/** 2097/**
@@ -2197,7 +2176,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
2197 return bus ? bus->dev.of_node : NULL; 2176 return bus ? bus->dev.of_node : NULL;
2198} 2177}
2199 2178
2200#else /* CONFIG_OF */ 2179#else /* CONFIG_OF */
2201static inline void pci_set_of_node(struct pci_dev *dev) { } 2180static inline void pci_set_of_node(struct pci_dev *dev) { }
2202static inline void pci_release_of_node(struct pci_dev *dev) { } 2181static inline void pci_release_of_node(struct pci_dev *dev) { }
2203static inline void pci_set_bus_of_node(struct pci_bus *bus) { } 2182static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
@@ -2206,7 +2185,7 @@ static inline struct device_node *
2206pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; } 2185pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; }
2207static inline struct irq_domain * 2186static inline struct irq_domain *
2208pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } 2187pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; }
2209#endif /* CONFIG_OF */ 2188#endif /* CONFIG_OF */
2210 2189
2211#ifdef CONFIG_ACPI 2190#ifdef CONFIG_ACPI
2212struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus); 2191struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus);
@@ -2231,7 +2210,7 @@ int pci_for_each_dma_alias(struct pci_dev *pdev,
2231 int (*fn)(struct pci_dev *pdev, 2210 int (*fn)(struct pci_dev *pdev,
2232 u16 alias, void *data), void *data); 2211 u16 alias, void *data), void *data);
2233 2212
2234/* helper functions for operation of device flag */ 2213/* Helper functions for operation of device flag */
2235static inline void pci_set_dev_assigned(struct pci_dev *pdev) 2214static inline void pci_set_dev_assigned(struct pci_dev *pdev)
2236{ 2215{
2237 pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; 2216 pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED;
@@ -2278,7 +2257,7 @@ static inline bool pci_is_thunderbolt_attached(struct pci_dev *pdev)
2278 return false; 2257 return false;
2279} 2258}
2280 2259
2281/* provide the legacy pci_dma_* API */ 2260/* Provide the legacy pci_dma_* API */
2282#include <linux/pci-dma-compat.h> 2261#include <linux/pci-dma-compat.h>
2283 2262
2284#endif /* LINUX_PCI_H */ 2263#endif /* LINUX_PCI_H */