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authorHawking Zhang <Hawking.Zhang@amd.com>2018-12-10 18:12:16 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-06-20 22:16:38 -0400
commit09fa0613bd9fb1a3ce986062414a48fea32c6e28 (patch)
treed5e5e883767f80f4a16b8139adb01ce9bb9d0596
parent89d7a79c7bd9a9993a78aaad835cf7be3c7dcbfd (diff)
drm/amdgpu: query vram_width from vram_info table
Driver will get channel_number and channel_width from vram_info table, then calculate vram_width by multiply channel_number by channel_width Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c46
1 files changed, 37 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 410118df16ed..606ed819f355 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -127,22 +127,50 @@ union vram_info {
127int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev) 127int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev)
128{ 128{
129 struct amdgpu_mode_info *mode_info = &adev->mode_info; 129 struct amdgpu_mode_info *mode_info = &adev->mode_info;
130 int index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, 130 int index;
131 integratedsysteminfo);
132 u16 data_offset, size; 131 u16 data_offset, size;
133 union igp_info *igp_info; 132 union igp_info *igp_info;
133 union vram_info *vram_info;
134 u32 mem_channel_number;
135 u32 mem_channel_width;
134 u8 frev, crev; 136 u8 frev, crev;
135 137
138 if (adev->flags & AMD_IS_APU)
139 index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
140 integratedsysteminfo);
141 else
142 index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
143 vram_info);
144
136 /* get any igp specific overrides */ 145 /* get any igp specific overrides */
137 if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, &size, 146 if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, &size,
138 &frev, &crev, &data_offset)) { 147 &frev, &crev, &data_offset)) {
139 igp_info = (union igp_info *) 148 if (adev->flags & AMD_IS_APU) {
140 (mode_info->atom_context->bios + data_offset); 149 igp_info = (union igp_info *)
141 switch (crev) { 150 (mode_info->atom_context->bios + data_offset);
142 case 11: 151 switch (crev) {
143 return igp_info->v11.umachannelnumber * 64; 152 case 11:
144 default: 153 mem_channel_number = igp_info->v11.umachannelnumber;
145 return 0; 154 /* channel width is 64 */
155 return mem_channel_number * 64;
156 default:
157 return 0;
158 }
159 } else {
160 vram_info = (union vram_info *)
161 (mode_info->atom_context->bios + data_offset);
162 switch (crev) {
163 case 3:
164 mem_channel_number = vram_info->v23.vram_module[0].channel_num;
165 mem_channel_width = vram_info->v23.vram_module[0].channel_width;
166 return mem_channel_number * (1 << mem_channel_width);
167 case 4:
168 mem_channel_number = vram_info->v24.vram_module[0].channel_num;
169 mem_channel_width = vram_info->v24.vram_module[0].channel_width;
170 return mem_channel_number * (1 << mem_channel_width);
171 default:
172 return 0;
173 }
146 } 174 }
147 } 175 }
148 176