Merge tag 'drm-misc-next-2017-08-08' of git://anongit.freedesktop.org/git/drm-misc into drm-next

UAPI Changes:
- vc4: Add ioctl to allow attaching a label to a bo (Eric)
- Add new format/modifier blob plane property (Ben)
- armada: Use __u32/__u64 instead of uint32_t/uint64_t (Mikko)
- [kinda uapi] fb_helper: Expose display_info size via fb_info (David)

Core Changes:
- Default gem_dumb_[map_offset|destroy] as mmap/destroy implementations (Noralf)
- Simplify atomic properties by removing the helpers and handling in core (Daniel)

Driver Changes:
- stm: Add STM32 DSI controller driver (Phillipe)
- vc4: Add HDMI CEC support (Hans)
- rockchip: Refactor register init & soc version handling (Mark)
- misc: Remove .load_lut, .gamma_set, .gamma_get dead code (Peter)
- dw-hdmi: Add HDMI CEC support (Russell)

Cc: Philippe CORNU <philippe.cornu@st.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Mark yao <mark.yao@rock-chips.com>
Cc: Peter Rosin <peda@axentia.se>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Mikko Rapeli <mikko.rapeli@iki.fi>
Cc: David Lechner <david@lechnology.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>

* tag 'drm-misc-next-2017-08-08' of git://anongit.freedesktop.org/git/drm-misc: (107 commits)
  drm: Nuke drm_atomic_legacy_backoff
  drm: Nuke drm_atomic_helper_connector_dpms
  drm: Nuke drm_atomic_helper_connector_set_property
  drm: Nuke drm_atomic_helper_plane_set_property
  drm: Nuke drm_atomic_helper_crtc_set_property
  drm: Handle properties in the core for atomic drivers
  drm: Don't update property values for atomic drivers
  drm/omap: Rework the rotation-on-crtc hack
  drm/radeon: Use the drm_driver.dumb_destroy default
  drm/i915: Use the drm_driver.dumb_destroy default
  drm/sti: Use .dumb_map_offset and .dumb_destroy defaults
  drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY
  drm/fb-helper: pass physical dimensions to fbdev
  uapi drm/armada_drm.h: use __u32 and __u64 instead of uint32_t and uint64_t
  drm/bridge: dw-hdmi: remove CEC engine register definitions
  drm/bridge: dw-hdmi: add cec driver
  drm/bridge: dw-hdmi: add missing cec_notifier_put
  drm: remove unused and redundant callbacks
  staging: vboxvideo: remove dead gamma lut code
  drm: dw-hdmi-i2s: add missing company name on Copyright
  ...

236 files changed, 3820 insertions, 2278 deletions

diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
index 9eb3f0a2a078..5d835d9c1ba8 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
@@ -8,8 +8,12 @@ Required properties:
 - compatible: value should be one of the following
                 "rockchip,rk3036-vop";
                 "rockchip,rk3288-vop";
+                "rockchip,rk3368-vop";
+                "rockchip,rk3366-vop";
                 "rockchip,rk3399-vop-big";
                 "rockchip,rk3399-vop-lit";
+                "rockchip,rk3228-vop";
+                "rockchip,rk3328-vop";
 
 - interrupts: should contain a list of all VOP IP block interrupts in the
                  order: VSYNC, LCD_SYSTEM. The interrupt specifier
diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
index 8e1476941c0f..74b5ac7b26d6 100644
--- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
+++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
@@ -1,7 +1,6 @@
 * STMicroelectronics STM32 lcd-tft display controller
 
 - ltdc: lcd-tft display controller host
-  must be a sub-node of st-display-subsystem
   Required properties:
   - compatible: "st,stm32-ltdc"
   - reg: Physical base address of the IP registers and length of memory mapped region.
@@ -13,8 +12,40 @@
   Required nodes:
     - Video port for RGB output.
 
-Example:
+* STMicroelectronics STM32 DSI controller specific extensions to Synopsys
+  DesignWare MIPI DSI host controller
 
+The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI
+DSI host controller. For all mandatory properties & nodes, please refer
+to the related documentation in [5].
+
+Mandatory properties specific to STM32 DSI:
+- #address-cells: Should be <1>.
+- #size-cells: Should be <0>.
+- compatible: "st,stm32-dsi".
+- clock-names:
+  - phy pll reference clock string name, must be "ref".
+- resets: see [5].
+- reset-names: see [5].
+
+Mandatory nodes specific to STM32 DSI:
+- ports: A node containing DSI input & output port nodes with endpoint
+  definitions as documented in [3] & [4].
+  - port@0: DSI input port node, connected to the ltdc rgb output port.
+  - port@1: DSI output port node, connected to a panel or a bridge input port.
+- panel or bridge node: A node containing the panel or bridge description as
+  documented in [6].
+  - port: panel or bridge port node, connected to the DSI output port (port@1).
+
+Note: You can find more documentation in the following references
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+[2] Documentation/devicetree/bindings/reset/reset.txt
+[3] Documentation/devicetree/bindings/media/video-interfaces.txt
+[4] Documentation/devicetree/bindings/graph.txt
+[5] Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt
+[6] Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
+
+Example 1: RGB panel
 / {
         ...
         soc {
@@ -34,3 +65,73 @@ Example:
                 };
         };
 };
+
+Example 2: DSI panel
+
+/ {
+        ...
+        soc {
+        ...
+                ltdc: display-controller@40016800 {
+                        compatible = "st,stm32-ltdc";
+                        reg = <0x40016800 0x200>;
+                        interrupts = <88>, <89>;
+                        resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
+                        clocks = <&rcc 1 CLK_LCD>;
+                        clock-names = "lcd";
+
+                        port {
+                                ltdc_out_dsi: endpoint {
+                                        remote-endpoint = <&dsi_in>;
+                                };
+                        };
+                };
+
+
+                dsi: dsi@40016c00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "st,stm32-dsi";
+                        reg = <0x40016c00 0x800>;
+                        clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
+                        clock-names = "ref", "pclk";
+                        resets = <&rcc STM32F4_APB2_RESET(DSI)>;
+                        reset-names = "apb";
+
+                        ports {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                port@0 {
+                                        reg = <0>;
+                                        dsi_in: endpoint {
+                                                remote-endpoint = <&ltdc_out_dsi>;
+                                        };
+                                };
+
+                                port@1 {
+                                        reg = <1>;
+                                        dsi_out: endpoint {
+                                                remote-endpoint = <&dsi_in_panel>;
+                                        };
+                                };
+
+                        };
+
+                        panel-dsi@0 {
+                                reg = <0>; /* dsi virtual channel (0..3) */
+                                compatible = ...;
+                                enable-gpios = ...;
+
+                                port {
+                                        dsi_in_panel: endpoint {
+                                                remote-endpoint = <&dsi_out>;
+                                        };
+                                };
+
+                        };
+
+                };
+
+        };
+};
diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 1ae42006deea..22af55d06ab8 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -108,8 +108,8 @@ This would be especially useful for tinydrm:
   crtc state, clear that to the max values, x/y = 0 and w/h = MAX_INT, in
   __drm_atomic_helper_crtc_duplicate_state().
 
-- Move tinydrm_merge_clips into drm_framebuffer.c, dropping the tinydrm_
-  prefix ofc and using drm_fb_. drm_framebuffer.c makes sense since this
+- Move tinydrm_merge_clips into drm_framebuffer.c, dropping the tinydrm\_
+  prefix ofc and using drm_fb\_. drm_framebuffer.c makes sense since this
   is a function useful to implement the fb->dirty function.
 
 - Create a new drm_fb_dirty function which does essentially what e.g.
diff --git a/drivers/dma-buf/sw_sync.c b/drivers/dma-buf/sw_sync.c
index af1bc84802e5..38cc7389a6c1 100644
--- a/drivers/dma-buf/sw_sync.c
+++ b/drivers/dma-buf/sw_sync.c
@@ -125,6 +125,75 @@ static void sync_timeline_put(struct sync_timeline *obj)
         kref_put(&obj->kref, sync_timeline_free);
 }
 
+static const char *timeline_fence_get_driver_name(struct dma_fence *fence)
+{
+        return "sw_sync";
+}
+
+static const char *timeline_fence_get_timeline_name(struct dma_fence *fence)
+{
+        struct sync_timeline *parent = dma_fence_parent(fence);
+
+        return parent->name;
+}
+
+static void timeline_fence_release(struct dma_fence *fence)
+{
+        struct sync_pt *pt = dma_fence_to_sync_pt(fence);
+        struct sync_timeline *parent = dma_fence_parent(fence);
+
+        if (!list_empty(&pt->link)) {
+                unsigned long flags;
+
+                spin_lock_irqsave(fence->lock, flags);
+                if (!list_empty(&pt->link)) {
+                        list_del(&pt->link);
+                        rb_erase(&pt->node, &parent->pt_tree);
+                }
+                spin_unlock_irqrestore(fence->lock, flags);
+        }
+
+        sync_timeline_put(parent);
+        dma_fence_free(fence);
+}
+
+static bool timeline_fence_signaled(struct dma_fence *fence)
+{
+        struct sync_timeline *parent = dma_fence_parent(fence);
+
+        return !__dma_fence_is_later(fence->seqno, parent->value);
+}
+
+static bool timeline_fence_enable_signaling(struct dma_fence *fence)
+{
+        return true;
+}
+
+static void timeline_fence_value_str(struct dma_fence *fence,
+                                    char *str, int size)
+{
+        snprintf(str, size, "%d", fence->seqno);
+}
+
+static void timeline_fence_timeline_value_str(struct dma_fence *fence,
+                                             char *str, int size)
+{
+        struct sync_timeline *parent = dma_fence_parent(fence);
+
+        snprintf(str, size, "%d", parent->value);
+}
+
+static const struct dma_fence_ops timeline_fence_ops = {
+        .get_driver_name = timeline_fence_get_driver_name,
+        .get_timeline_name = timeline_fence_get_timeline_name,
+        .enable_signaling = timeline_fence_enable_signaling,
+        .signaled = timeline_fence_signaled,
+        .wait = dma_fence_default_wait,
+        .release = timeline_fence_release,
+        .fence_value_str = timeline_fence_value_str,
+        .timeline_value_str = timeline_fence_timeline_value_str,
+};
+
 /**
  * sync_timeline_signal() - signal a status change on a sync_timeline
  * @obj:        sync_timeline to signal
@@ -144,11 +213,21 @@ static void sync_timeline_signal(struct sync_timeline *obj, unsigned int inc)
         obj->value += inc;
 
         list_for_each_entry_safe(pt, next, &obj->pt_list, link) {
-                if (!dma_fence_is_signaled_locked(&pt->base))
+                if (!timeline_fence_signaled(&pt->base))
                         break;
 
                 list_del_init(&pt->link);
                 rb_erase(&pt->node, &obj->pt_tree);
+
+                /*
+                 * A signal callback may release the last reference to this
+                 * fence, causing it to be freed. That operation has to be
+                 * last to avoid a use after free inside this loop, and must
+                 * be after we remove the fence from the timeline in order to
+                 * prevent deadlocking on timeline->lock inside
+                 * timeline_fence_release().
+                 */
+                dma_fence_signal_locked(&pt->base);
         }
 
         spin_unlock_irq(&obj->lock);
@@ -216,75 +295,6 @@ unlock:
         return pt;
 }
 
-static const char *timeline_fence_get_driver_name(struct dma_fence *fence)
-{
-        return "sw_sync";
-}
-
-static const char *timeline_fence_get_timeline_name(struct dma_fence *fence)
-{
-        struct sync_timeline *parent = dma_fence_parent(fence);
-
-        return parent->name;
-}
-
-static void timeline_fence_release(struct dma_fence *fence)
-{
-        struct sync_pt *pt = dma_fence_to_sync_pt(fence);
-        struct sync_timeline *parent = dma_fence_parent(fence);
-
-        if (!list_empty(&pt->link)) {
-                unsigned long flags;
-
-                spin_lock_irqsave(fence->lock, flags);
-                if (!list_empty(&pt->link)) {
-                        list_del(&pt->link);
-                        rb_erase(&pt->node, &parent->pt_tree);
-                }
-                spin_unlock_irqrestore(fence->lock, flags);
-        }
-
-        sync_timeline_put(parent);
-        dma_fence_free(fence);
-}
-
-static bool timeline_fence_signaled(struct dma_fence *fence)
-{
-        struct sync_timeline *parent = dma_fence_parent(fence);
-
-        return !__dma_fence_is_later(fence->seqno, parent->value);
-}
-
-static bool timeline_fence_enable_signaling(struct dma_fence *fence)
-{
-        return true;
-}
-
-static void timeline_fence_value_str(struct dma_fence *fence,
-                                    char *str, int size)
-{
-        snprintf(str, size, "%d", fence->seqno);
-}
-
-static void timeline_fence_timeline_value_str(struct dma_fence *fence,
-                                             char *str, int size)
-{
-        struct sync_timeline *parent = dma_fence_parent(fence);
-
-        snprintf(str, size, "%d", parent->value);
-}
-
-static const struct dma_fence_ops timeline_fence_ops = {
-        .get_driver_name = timeline_fence_get_driver_name,
-        .get_timeline_name = timeline_fence_get_timeline_name,
-        .enable_signaling = timeline_fence_enable_signaling,
-        .signaled = timeline_fence_signaled,
-        .wait = dma_fence_default_wait,
-        .release = timeline_fence_release,
-        .fence_value_str = timeline_fence_value_str,
-        .timeline_value_str = timeline_fence_timeline_value_str,
-};
-
 /*
  * *WARNING*
  *
diff --git a/drivers/dma-buf/sync_file.c b/drivers/dma-buf/sync_file.c
index d7e219d2669d..66fb40d0ebdb 100644
--- a/drivers/dma-buf/sync_file.c
+++ b/drivers/dma-buf/sync_file.c
@@ -304,7 +304,7 @@ static int sync_file_release(struct inode *inode, struct file *file)
 {
         struct sync_file *sync_file = file->private_data;
 
-        if (test_bit(POLL_ENABLED, &sync_file->fence->flags))
+        if (test_bit(POLL_ENABLED, &sync_file->flags))
                 dma_fence_remove_callback(sync_file->fence, &sync_file->cb);
         dma_fence_put(sync_file->fence);
         kfree(sync_file);
@@ -318,7 +318,8 @@ static unsigned int sync_file_poll(struct file *file, poll_table *wait)
 
         poll_wait(file, &sync_file->wq, wait);
 
-        if (!test_and_set_bit(POLL_ENABLED, &sync_file->fence->flags)) {
+        if (list_empty(&sync_file->cb.node) &&
+            !test_and_set_bit(POLL_ENABLED, &sync_file->flags)) {
                 if (dma_fence_add_callback(sync_file->fence, &sync_file->cb,
                                            fence_check_cb_func) < 0)
                         wake_up_all(&sync_file->wq);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index aa53a860c904..5e9ce8a29669 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -834,7 +834,6 @@ static struct drm_driver kms_driver = {
         .gem_close_object = amdgpu_gem_object_close,
         .dumb_create = amdgpu_mode_dumb_create,
         .dumb_map_offset = amdgpu_mode_dumb_mmap,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .fops = &amdgpu_driver_kms_fops,
 
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 1c57fefc364c..0a8ee2411180 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -311,31 +311,7 @@ static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfb
         return 0;
 }
 
-/** Sets the color ramps on behalf of fbcon */
-static void amdgpu_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                                      u16 blue, int regno)
-{
-        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-
-        amdgpu_crtc->lut_r[regno] = red >> 6;
-        amdgpu_crtc->lut_g[regno] = green >> 6;
-        amdgpu_crtc->lut_b[regno] = blue >> 6;
-}
-
-/** Gets the color ramps on behalf of fbcon */
-static void amdgpu_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                                      u16 *blue, int regno)
-{
-        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-
-        *red = amdgpu_crtc->lut_r[regno] << 6;
-        *green = amdgpu_crtc->lut_g[regno] << 6;
-        *blue = amdgpu_crtc->lut_b[regno] << 6;
-}
-
 static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = {
-        .gamma_set = amdgpu_crtc_fb_gamma_set,
-        .gamma_get = amdgpu_crtc_fb_gamma_get,
         .fb_probe = amdgpufb_create,
 };
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index b8abd4e18d51..2af2678ddaf6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -357,7 +357,6 @@ struct amdgpu_atom_ss {
 struct amdgpu_crtc {
         struct drm_crtc base;
         int crtc_id;
-        u16 lut_r[256], lut_g[256], lut_b[256];
         bool enabled;
         bool can_tile;
         uint32_t crtc_offset;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 4b6e2f7bfec9..490e84944851 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2139,6 +2139,7 @@ static void dce_v10_0_crtc_load_lut(struct drm_crtc *crtc)
         struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct amdgpu_device *adev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
         u32 tmp;
 
@@ -2176,11 +2177,14 @@ static void dce_v10_0_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007);
 
         WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,
-                       (amdgpu_crtc->lut_r[i] << 20) |
-                       (amdgpu_crtc->lut_g[i] << 10) |
-                       (amdgpu_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 
         tmp = RREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
@@ -2496,15 +2500,6 @@ static int dce_v10_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                                     u16 *blue, uint32_t size,
                                     struct drm_modeset_acquire_ctx *ctx)
 {
-        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-        int i;
-
-        /* userspace palettes are always correct as is */
-        for (i = 0; i < size; i++) {
-                amdgpu_crtc->lut_r[i] = red[i] >> 6;
-                amdgpu_crtc->lut_g[i] = green[i] >> 6;
-                amdgpu_crtc->lut_b[i] = blue[i] >> 6;
-        }
         dce_v10_0_crtc_load_lut(crtc);
 
         return 0;
@@ -2716,14 +2711,12 @@ static const struct drm_crtc_helper_funcs dce_v10_0_crtc_helper_funcs = {
         .mode_set_base_atomic = dce_v10_0_crtc_set_base_atomic,
         .prepare = dce_v10_0_crtc_prepare,
         .commit = dce_v10_0_crtc_commit,
-        .load_lut = dce_v10_0_crtc_load_lut,
         .disable = dce_v10_0_crtc_disable,
 };
 
 static int dce_v10_0_crtc_init(struct amdgpu_device *adev, int index)
 {
         struct amdgpu_crtc *amdgpu_crtc;
-        int i;
 
         amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) +
                               (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
@@ -2741,12 +2734,6 @@ static int dce_v10_0_crtc_init(struct amdgpu_device *adev, int index)
         adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
         adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
 
-        for (i = 0; i < 256; i++) {
-                amdgpu_crtc->lut_r[i] = i << 2;
-                amdgpu_crtc->lut_g[i] = i << 2;
-                amdgpu_crtc->lut_b[i] = i << 2;
-        }
-
         switch (amdgpu_crtc->crtc_id) {
         case 0:
         default:
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 6af489872ffd..921c6f772f11 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2178,6 +2178,7 @@ static void dce_v11_0_crtc_load_lut(struct drm_crtc *crtc)
         struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct amdgpu_device *adev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
         u32 tmp;
 
@@ -2209,11 +2210,14 @@ static void dce_v11_0_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007);
 
         WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,
-                       (amdgpu_crtc->lut_r[i] << 20) |
-                       (amdgpu_crtc->lut_g[i] << 10) |
-                       (amdgpu_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 
         tmp = RREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
@@ -2571,15 +2575,6 @@ static int dce_v11_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                                     u16 *blue, uint32_t size,
                                     struct drm_modeset_acquire_ctx *ctx)
 {
-        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-        int i;
-
-        /* userspace palettes are always correct as is */
-        for (i = 0; i < size; i++) {
-                amdgpu_crtc->lut_r[i] = red[i] >> 6;
-                amdgpu_crtc->lut_g[i] = green[i] >> 6;
-                amdgpu_crtc->lut_b[i] = blue[i] >> 6;
-        }
         dce_v11_0_crtc_load_lut(crtc);
 
         return 0;
@@ -2819,14 +2814,12 @@ static const struct drm_crtc_helper_funcs dce_v11_0_crtc_helper_funcs = {
         .mode_set_base_atomic = dce_v11_0_crtc_set_base_atomic,
         .prepare = dce_v11_0_crtc_prepare,
         .commit = dce_v11_0_crtc_commit,
-        .load_lut = dce_v11_0_crtc_load_lut,
         .disable = dce_v11_0_crtc_disable,
 };
 
 static int dce_v11_0_crtc_init(struct amdgpu_device *adev, int index)
 {
         struct amdgpu_crtc *amdgpu_crtc;
-        int i;
 
         amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) +
                               (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
@@ -2844,12 +2837,6 @@ static int dce_v11_0_crtc_init(struct amdgpu_device *adev, int index)
         adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
         adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
 
-        for (i = 0; i < 256; i++) {
-                amdgpu_crtc->lut_r[i] = i << 2;
-                amdgpu_crtc->lut_g[i] = i << 2;
-                amdgpu_crtc->lut_b[i] = i << 2;
-        }
-
         switch (amdgpu_crtc->crtc_id) {
         case 0:
         default:
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 126c5e4e7733..bcd9521237f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2071,6 +2071,7 @@ static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc)
         struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct amdgpu_device *adev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
 
         DRM_DEBUG_KMS("%d\n", amdgpu_crtc->crtc_id);
@@ -2100,11 +2101,14 @@ static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007);
 
         WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,
-                       (amdgpu_crtc->lut_r[i] << 20) |
-                       (amdgpu_crtc->lut_g[i] << 10) |
-                       (amdgpu_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 
         WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset,
@@ -2385,15 +2389,6 @@ static int dce_v6_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                                    u16 *blue, uint32_t size,
                                    struct drm_modeset_acquire_ctx *ctx)
 {
-        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-        int i;
-
-        /* userspace palettes are always correct as is */
-        for (i = 0; i < size; i++) {
-                amdgpu_crtc->lut_r[i] = red[i] >> 6;
-                amdgpu_crtc->lut_g[i] = green[i] >> 6;
-                amdgpu_crtc->lut_b[i] = blue[i] >> 6;
-        }
         dce_v6_0_crtc_load_lut(crtc);
 
         return 0;
@@ -2601,14 +2596,12 @@ static const struct drm_crtc_helper_funcs dce_v6_0_crtc_helper_funcs = {
         .mode_set_base_atomic = dce_v6_0_crtc_set_base_atomic,
         .prepare = dce_v6_0_crtc_prepare,
         .commit = dce_v6_0_crtc_commit,
-        .load_lut = dce_v6_0_crtc_load_lut,
         .disable = dce_v6_0_crtc_disable,
 };
 
 static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index)
 {
         struct amdgpu_crtc *amdgpu_crtc;
-        int i;
 
         amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) +
                               (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
@@ -2626,12 +2619,6 @@ static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index)
         adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
         adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
 
-        for (i = 0; i < 256; i++) {
-                amdgpu_crtc->lut_r[i] = i << 2;
-                amdgpu_crtc->lut_g[i] = i << 2;
-                amdgpu_crtc->lut_b[i] = i << 2;
-        }
-
         amdgpu_crtc->crtc_offset = crtc_offsets[amdgpu_crtc->crtc_id];
 
         amdgpu_crtc->pll_id = ATOM_PPLL_INVALID;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index c0740adee46f..609438fe8584 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2049,6 +2049,7 @@ static void dce_v8_0_crtc_load_lut(struct drm_crtc *crtc)
         struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct amdgpu_device *adev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
 
         DRM_DEBUG_KMS("%d\n", amdgpu_crtc->crtc_id);
@@ -2078,11 +2079,14 @@ static void dce_v8_0_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007);
 
         WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,
-                       (amdgpu_crtc->lut_r[i] << 20) |
-                       (amdgpu_crtc->lut_g[i] << 10) |
-                       (amdgpu_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 
         WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset,
@@ -2400,15 +2404,6 @@ static int dce_v8_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                                    u16 *blue, uint32_t size,
                                    struct drm_modeset_acquire_ctx *ctx)
 {
-        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-        int i;
-
-        /* userspace palettes are always correct as is */
-        for (i = 0; i < size; i++) {
-                amdgpu_crtc->lut_r[i] = red[i] >> 6;
-                amdgpu_crtc->lut_g[i] = green[i] >> 6;
-                amdgpu_crtc->lut_b[i] = blue[i] >> 6;
-        }
         dce_v8_0_crtc_load_lut(crtc);
 
         return 0;
@@ -2627,14 +2622,12 @@ static const struct drm_crtc_helper_funcs dce_v8_0_crtc_helper_funcs = {
         .mode_set_base_atomic = dce_v8_0_crtc_set_base_atomic,
         .prepare = dce_v8_0_crtc_prepare,
         .commit = dce_v8_0_crtc_commit,
-        .load_lut = dce_v8_0_crtc_load_lut,
         .disable = dce_v8_0_crtc_disable,
 };
 
 static int dce_v8_0_crtc_init(struct amdgpu_device *adev, int index)
 {
         struct amdgpu_crtc *amdgpu_crtc;
-        int i;
 
         amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) +
                               (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
@@ -2652,12 +2645,6 @@ static int dce_v8_0_crtc_init(struct amdgpu_device *adev, int index)
         adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
         adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
 
-        for (i = 0; i < 256; i++) {
-                amdgpu_crtc->lut_r[i] = i << 2;
-                amdgpu_crtc->lut_g[i] = i << 2;
-                amdgpu_crtc->lut_b[i] = i << 2;
-        }
-
         amdgpu_crtc->crtc_offset = crtc_offsets[amdgpu_crtc->crtc_id];
 
         amdgpu_crtc->pll_id = ATOM_PPLL_INVALID;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 0d2f060206dc..5ed919e45351 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -112,16 +112,6 @@ static int dce_virtual_crtc_gamma_set(struct drm_crtc *crtc, u16 *red,
                                       u16 *green, u16 *blue, uint32_t size,
                                       struct drm_modeset_acquire_ctx *ctx)
 {
-        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-        int i;
-
-        /* userspace palettes are always correct as is */
-        for (i = 0; i < size; i++) {
-                amdgpu_crtc->lut_r[i] = red[i] >> 6;
-                amdgpu_crtc->lut_g[i] = green[i] >> 6;
-                amdgpu_crtc->lut_b[i] = blue[i] >> 6;
-        }
-
         return 0;
 }
 
@@ -233,11 +223,6 @@ static int dce_virtual_crtc_set_base(struct drm_crtc *crtc, int x, int y,
         return 0;
 }
 
-static void dce_virtual_crtc_load_lut(struct drm_crtc *crtc)
-{
-        return;
-}
-
 static int dce_virtual_crtc_set_base_atomic(struct drm_crtc *crtc,
                                          struct drm_framebuffer *fb,
                                          int x, int y, enum mode_set_atomic state)
@@ -253,14 +238,12 @@ static const struct drm_crtc_helper_funcs dce_virtual_crtc_helper_funcs = {
         .mode_set_base_atomic = dce_virtual_crtc_set_base_atomic,
         .prepare = dce_virtual_crtc_prepare,
         .commit = dce_virtual_crtc_commit,
-        .load_lut = dce_virtual_crtc_load_lut,
         .disable = dce_virtual_crtc_disable,
 };
 
 static int dce_virtual_crtc_init(struct amdgpu_device *adev, int index)
 {
         struct amdgpu_crtc *amdgpu_crtc;
-        int i;
 
         amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) +
                               (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
@@ -273,12 +256,6 @@ static int dce_virtual_crtc_init(struct amdgpu_device *adev, int index)
         amdgpu_crtc->crtc_id = index;
         adev->mode_info.crtcs[index] = amdgpu_crtc;
 
-        for (i = 0; i < 256; i++) {
-                amdgpu_crtc->lut_r[i] = i << 2;
-                amdgpu_crtc->lut_g[i] = i << 2;
-                amdgpu_crtc->lut_b[i] = i << 2;
-        }
-
         amdgpu_crtc->pll_id = ATOM_PPLL_INVALID;
         amdgpu_crtc->encoder = NULL;
         amdgpu_crtc->connector = NULL;
diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c b/drivers/gpu/drm/arc/arcpgu_crtc.c
index 55c5d5bd74e1..16903dc7fe0d 100644
--- a/drivers/gpu/drm/arc/arcpgu_crtc.c
+++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
@@ -218,6 +218,7 @@ static struct drm_plane *arc_pgu_plane_init(struct drm_device *drm)
 
         ret = drm_universal_plane_init(drm, plane, 0xff, &arc_pgu_plane_funcs,
                                        formats, ARRAY_SIZE(formats),
+                                       NULL,
                                        DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret)
                 return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/arc/arcpgu_drv.c b/drivers/gpu/drm/arc/arcpgu_drv.c
index 69d0ef684f7b..e3c13aa202b8 100644
--- a/drivers/gpu/drm/arc/arcpgu_drv.c
+++ b/drivers/gpu/drm/arc/arcpgu_drv.c
@@ -176,8 +176,6 @@ static struct drm_driver arcpgu_drm_driver = {
         .patchlevel = 0,
         .fops = &arcpgu_drm_ops,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
         .gem_free_object_unlocked = drm_gem_cma_free_object,
diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index 16e1e20cf04c..72b22b805412 100644
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -315,6 +315,7 @@ static struct drm_plane *hdlcd_plane_init(struct drm_device *drm)
 
         ret = drm_universal_plane_init(drm, plane, 0xff, &hdlcd_plane_funcs,
                                        formats, ARRAY_SIZE(formats),
+                                       NULL,
                                        DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret) {
                 return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
index 90bd97bf0013..f9bda7b0d2ec 100644
--- a/drivers/gpu/drm/arm/hdlcd_drv.c
+++ b/drivers/gpu/drm/arm/hdlcd_drv.c
@@ -253,8 +253,6 @@ static struct drm_driver hdlcd_driver = {
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops = &drm_gem_cma_vm_ops,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
         .gem_prime_export = drm_gem_prime_export,
diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
index a6a05a768dd1..1a57cc28955e 100644
--- a/drivers/gpu/drm/arm/malidp_drv.c
+++ b/drivers/gpu/drm/arm/malidp_drv.c
@@ -331,8 +331,6 @@ static struct drm_driver malidp_driver = {
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops = &drm_gem_cma_vm_ops,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
         .gem_prime_export = drm_gem_prime_export,
diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c
index 600fa7bd7f52..94e7e3fa3408 100644
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -128,7 +128,6 @@ static void malidp_plane_atomic_print_state(struct drm_printer *p,
 static const struct drm_plane_funcs malidp_de_plane_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
-        .set_property = drm_atomic_helper_plane_set_property,
         .destroy = malidp_de_plane_destroy,
         .reset = malidp_plane_reset,
         .atomic_duplicate_state = malidp_duplicate_plane_state,
@@ -398,7 +397,7 @@ int malidp_de_planes_init(struct drm_device *drm)
                                         DRM_PLANE_TYPE_OVERLAY;
                 ret = drm_universal_plane_init(drm, &plane->base, crtcs,
                                                &malidp_de_plane_funcs, formats,
-                                               n, plane_type, NULL);
+                                               n, NULL, plane_type, NULL);
                 if (ret < 0)
                         goto cleanup;
 
diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
index 1ffba91fbaae..2a4d163ac76f 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -334,16 +334,6 @@ static void armada_drm_vblank_off(struct armada_crtc *dcrtc)
         armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
 }
 
-void armada_drm_crtc_gamma_set(struct drm_crtc *crtc, u16 r, u16 g, u16 b,
-        int idx)
-{
-}
-
-void armada_drm_crtc_gamma_get(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
-        int idx)
-{
-}
-
 /* The mode_config.mutex will be held for this call */
 static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int dpms)
 {
@@ -1269,6 +1259,7 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev,
                                        &armada_primary_plane_funcs,
                                        armada_primary_formats,
                                        ARRAY_SIZE(armada_primary_formats),
+                                       NULL,
                                        DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret) {
                 kfree(primary);
diff --git a/drivers/gpu/drm/armada/armada_crtc.h b/drivers/gpu/drm/armada/armada_crtc.h
index 7e8906d3ae26..bab11f483575 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -102,8 +102,6 @@ struct armada_crtc {
 };
 #define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
 
-void armada_drm_crtc_gamma_set(struct drm_crtc *, u16, u16, u16, int);
-void armada_drm_crtc_gamma_get(struct drm_crtc *, u16 *, u16 *, u16 *, int);
 void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
 
 void armada_drm_crtc_plane_disable(struct armada_crtc *dcrtc,
diff --git a/drivers/gpu/drm/armada/armada_fbdev.c b/drivers/gpu/drm/armada/armada_fbdev.c
index 5b479b0ed06c..29c7d047b152 100644
--- a/drivers/gpu/drm/armada/armada_fbdev.c
+++ b/drivers/gpu/drm/armada/armada_fbdev.c
@@ -117,8 +117,6 @@ static int armada_fb_probe(struct drm_fb_helper *fbh,
 }
 
 static const struct drm_fb_helper_funcs armada_fb_helper_funcs = {
-        .gamma_set      = armada_drm_crtc_gamma_set,
-        .gamma_get      = armada_drm_crtc_gamma_get,
         .fb_probe       = armada_fb_probe,
 };
 
diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index 677b44f3534b..edc44910d79f 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -460,6 +460,7 @@ int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
                                        &armada_ovl_plane_funcs,
                                        armada_ovl_formats,
                                        ARRAY_SIZE(armada_ovl_formats),
+                                       NULL,
                                        DRM_PLANE_TYPE_OVERLAY, NULL);
         if (ret) {
                 kfree(dplane);
diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h
index 7ded3b84237f..e6c4cd3dc50e 100644
--- a/drivers/gpu/drm/ast/ast_drv.h
+++ b/drivers/gpu/drm/ast/ast_drv.h
@@ -245,7 +245,6 @@ struct ast_connector {
 
 struct ast_crtc {
         struct drm_crtc base;
-        u8 lut_r[256], lut_g[256], lut_b[256];
         struct drm_gem_object *cursor_bo;
         uint64_t cursor_addr;
         int cursor_width, cursor_height;
diff --git a/drivers/gpu/drm/ast/ast_fb.c b/drivers/gpu/drm/ast/ast_fb.c
index 53ca6d099234..9052ebeae8d0 100644
--- a/drivers/gpu/drm/ast/ast_fb.c
+++ b/drivers/gpu/drm/ast/ast_fb.c
@@ -254,27 +254,7 @@ out:
         return ret;
 }
 
-static void ast_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                               u16 blue, int regno)
-{
-        struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-        ast_crtc->lut_r[regno] = red >> 8;
-        ast_crtc->lut_g[regno] = green >> 8;
-        ast_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void ast_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                               u16 *blue, int regno)
-{
-        struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-        *red = ast_crtc->lut_r[regno] << 8;
-        *green = ast_crtc->lut_g[regno] << 8;
-        *blue = ast_crtc->lut_b[regno] << 8;
-}
-
 static const struct drm_fb_helper_funcs ast_fb_helper_funcs = {
-        .gamma_set = ast_fb_gamma_set,
-        .gamma_get = ast_fb_gamma_get,
         .fb_probe = astfb_create,
 };
 
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index 3549a3356afe..43245229f437 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -63,15 +63,18 @@ static inline void ast_load_palette_index(struct ast_private *ast,
 static void ast_crtc_load_lut(struct drm_crtc *crtc)
 {
         struct ast_private *ast = crtc->dev->dev_private;
-        struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
+        u16 *r, *g, *b;
         int i;
 
         if (!crtc->enabled)
                 return;
 
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
+
         for (i = 0; i < 256; i++)
-                ast_load_palette_index(ast, i, ast_crtc->lut_r[i],
-                                       ast_crtc->lut_g[i], ast_crtc->lut_b[i]);
+                ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
 }
 
 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,
@@ -649,7 +652,6 @@ static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
         .mode_set = ast_crtc_mode_set,
         .mode_set_base = ast_crtc_mode_set_base,
         .disable = ast_crtc_disable,
-        .load_lut = ast_crtc_load_lut,
         .prepare = ast_crtc_prepare,
         .commit = ast_crtc_commit,
 
@@ -664,15 +666,6 @@ static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                               u16 *blue, uint32_t size,
                               struct drm_modeset_acquire_ctx *ctx)
 {
-        struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-        int i;
-
-        /* userspace palettes are always correct as is */
-        for (i = 0; i < size; i++) {
-                ast_crtc->lut_r[i] = red[i] >> 8;
-                ast_crtc->lut_g[i] = green[i] >> 8;
-                ast_crtc->lut_b[i] = blue[i] >> 8;
-        }
         ast_crtc_load_lut(crtc);
 
         return 0;
@@ -697,7 +690,6 @@ static const struct drm_crtc_funcs ast_crtc_funcs = {
 static int ast_crtc_init(struct drm_device *dev)
 {
         struct ast_crtc *crtc;
-        int i;
 
         crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
         if (!crtc)
@@ -706,12 +698,6 @@ static int ast_crtc_init(struct drm_device *dev)
         drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs);
         drm_mode_crtc_set_gamma_size(&crtc->base, 256);
         drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs);
-
-        for (i = 0; i < 256; i++) {
-                crtc->lut_r[i] = i;
-                crtc->lut_g[i] = i;
-                crtc->lut_b[i] = i;
-        }
         return 0;
 }
 
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 4fbbeab5c5d4..d73281095fac 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -431,7 +431,6 @@ static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
         .atomic_destroy_state = atmel_hlcdc_crtc_destroy_state,
         .enable_vblank = atmel_hlcdc_crtc_enable_vblank,
         .disable_vblank = atmel_hlcdc_crtc_disable_vblank,
-        .set_property = drm_atomic_helper_crtc_set_property,
         .gamma_set = drm_atomic_helper_legacy_gamma_set,
 };
 
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
index 64f54dc7dd68..74d66e11f688 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
@@ -761,8 +761,6 @@ static struct drm_driver atmel_hlcdc_dc_driver = {
         .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
         .gem_prime_mmap = drm_gem_cma_prime_mmap,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .fops = &fops,
         .name = "atmel-hlcdc",
         .desc = "Atmel HLCD Controller DRM",
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
index b5bd9b005225..703c2d13603f 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
@@ -838,7 +838,7 @@ static void atmel_hlcdc_plane_destroy(struct drm_plane *p)
         struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
 
         if (plane->base.fb)
-                drm_framebuffer_unreference(plane->base.fb);
+                drm_framebuffer_put(plane->base.fb);
 
         drm_plane_cleanup(p);
 }
@@ -940,7 +940,7 @@ void atmel_hlcdc_plane_irq(struct atmel_hlcdc_plane *plane)
                         desc->name);
 }
 
-static struct drm_plane_helper_funcs atmel_hlcdc_layer_plane_helper_funcs = {
+static const struct drm_plane_helper_funcs atmel_hlcdc_layer_plane_helper_funcs = {
         .atomic_check = atmel_hlcdc_plane_atomic_check,
         .atomic_update = atmel_hlcdc_plane_atomic_update,
         .atomic_disable = atmel_hlcdc_plane_atomic_disable,
@@ -987,7 +987,7 @@ static void atmel_hlcdc_plane_reset(struct drm_plane *p)
                 state = drm_plane_state_to_atmel_hlcdc_plane_state(p->state);
 
                 if (state->base.fb)
-                        drm_framebuffer_unreference(state->base.fb);
+                        drm_framebuffer_put(state->base.fb);
 
                 kfree(state);
                 p->state = NULL;
@@ -1025,7 +1025,7 @@ atmel_hlcdc_plane_atomic_duplicate_state(struct drm_plane *p)
         }
 
         if (copy->base.fb)
-                drm_framebuffer_reference(copy->base.fb);
+                drm_framebuffer_get(copy->base.fb);
 
         return &copy->base;
 }
@@ -1044,15 +1044,14 @@ static void atmel_hlcdc_plane_atomic_destroy_state(struct drm_plane *p,
         }
 
         if (s->fb)
-                drm_framebuffer_unreference(s->fb);
+                drm_framebuffer_put(s->fb);
 
         kfree(state);
 }
 
-static struct drm_plane_funcs layer_plane_funcs = {
+static const struct drm_plane_funcs layer_plane_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
-        .set_property = drm_atomic_helper_plane_set_property,
         .destroy = atmel_hlcdc_plane_destroy,
         .reset = atmel_hlcdc_plane_reset,
         .atomic_duplicate_state = atmel_hlcdc_plane_atomic_duplicate_state,
@@ -1087,7 +1086,8 @@ static int atmel_hlcdc_plane_create(struct drm_device *dev,
         ret = drm_universal_plane_init(dev, &plane->base, 0,
                                        &layer_plane_funcs,
                                        desc->formats->formats,
-                                       desc->formats->nformats, type, NULL);
+                                       desc->formats->nformats,
+                                       NULL, type, NULL);
         if (ret)
                 return ret;
 
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
index ff9792d350c8..682c090fa3ed 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
@@ -786,7 +786,6 @@ adv7511_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static struct drm_connector_funcs adv7511_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = adv7511_connector_detect,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/bridge/analogix-anx78xx.c b/drivers/gpu/drm/bridge/analogix-anx78xx.c
index dc045e0c32fc..9385eb0b1ee4 100644
--- a/drivers/gpu/drm/bridge/analogix-anx78xx.c
+++ b/drivers/gpu/drm/bridge/analogix-anx78xx.c
@@ -1002,7 +1002,6 @@ static enum drm_connector_status anx78xx_detect(struct drm_connector *connector,
 }
 
 static const struct drm_connector_funcs anx78xx_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = anx78xx_detect,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 4c758ed51939..5dd3f1cd074a 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1005,7 +1005,6 @@ analogix_dp_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs analogix_dp_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = analogix_dp_detect,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/bridge/dumb-vga-dac.c b/drivers/gpu/drm/bridge/dumb-vga-dac.c
index 8a52539e618e..de5e7dee7ad6 100644
--- a/drivers/gpu/drm/bridge/dumb-vga-dac.c
+++ b/drivers/gpu/drm/bridge/dumb-vga-dac.c
@@ -92,7 +92,6 @@ dumb_vga_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs dumb_vga_con_funcs = {
-        .dpms                   = drm_atomic_helper_connector_dpms,
         .detect                 = dumb_vga_connector_detect,
         .fill_modes             = drm_helper_probe_single_connector_modes,
         .destroy                = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/bridge/megachips-stdpxxxx-ge-b850v3-fw.c b/drivers/gpu/drm/bridge/megachips-stdpxxxx-ge-b850v3-fw.c
index 11f11086a68f..7ccadba7c98c 100644
--- a/drivers/gpu/drm/bridge/megachips-stdpxxxx-ge-b850v3-fw.c
+++ b/drivers/gpu/drm/bridge/megachips-stdpxxxx-ge-b850v3-fw.c
@@ -193,7 +193,6 @@ static enum drm_connector_status ge_b850v3_lvds_detect(
 }
 
 static const struct drm_connector_funcs ge_b850v3_lvds_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = ge_b850v3_lvds_detect,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/bridge/nxp-ptn3460.c b/drivers/gpu/drm/bridge/nxp-ptn3460.c
index f0b5d0fc8594..d64a3283822a 100644
--- a/drivers/gpu/drm/bridge/nxp-ptn3460.c
+++ b/drivers/gpu/drm/bridge/nxp-ptn3460.c
@@ -238,7 +238,6 @@ static const struct drm_connector_helper_funcs ptn3460_connector_helper_funcs =
 };
 
 static const struct drm_connector_funcs ptn3460_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/bridge/panel.c b/drivers/gpu/drm/bridge/panel.c
index 685c1a480201..e0cca19b4044 100644
--- a/drivers/gpu/drm/bridge/panel.c
+++ b/drivers/gpu/drm/bridge/panel.c
@@ -50,7 +50,6 @@ panel_bridge_connector_helper_funcs = {
 };
 
 static const struct drm_connector_funcs panel_bridge_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
@@ -195,3 +194,33 @@ void drm_panel_bridge_remove(struct drm_bridge *bridge)
         devm_kfree(panel_bridge->panel->dev, bridge);
 }
 EXPORT_SYMBOL(drm_panel_bridge_remove);
+
+static void devm_drm_panel_bridge_release(struct device *dev, void *res)
+{
+        struct drm_bridge **bridge = res;
+
+        drm_panel_bridge_remove(*bridge);
+}
+
+struct drm_bridge *devm_drm_panel_bridge_add(struct device *dev,
+                                             struct drm_panel *panel,
+                                             u32 connector_type)
+{
+        struct drm_bridge **ptr, *bridge;
+
+        ptr = devres_alloc(devm_drm_panel_bridge_release, sizeof(*ptr),
+                           GFP_KERNEL);
+        if (!ptr)
+                return ERR_PTR(-ENOMEM);
+
+        bridge = drm_panel_bridge_add(panel, connector_type);
+        if (!IS_ERR(bridge)) {
+                *ptr = bridge;
+                devres_add(dev, ptr);
+        } else {
+                devres_free(ptr);
+        }
+
+        return bridge;
+}
+EXPORT_SYMBOL(devm_drm_panel_bridge_add);
diff --git a/drivers/gpu/drm/bridge/parade-ps8622.c b/drivers/gpu/drm/bridge/parade-ps8622.c
index 4f7725d4a309..81198f5e9afa 100644
--- a/drivers/gpu/drm/bridge/parade-ps8622.c
+++ b/drivers/gpu/drm/bridge/parade-ps8622.c
@@ -476,7 +476,6 @@ static const struct drm_connector_helper_funcs ps8622_connector_helper_funcs = {
 };
 
 static const struct drm_connector_funcs ps8622_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c
index 9efb7b8fad57..b1ab4ab09532 100644
--- a/drivers/gpu/drm/bridge/sii902x.c
+++ b/drivers/gpu/drm/bridge/sii902x.c
@@ -124,7 +124,6 @@ sii902x_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs sii902x_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = sii902x_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/bridge/synopsys/Kconfig b/drivers/gpu/drm/bridge/synopsys/Kconfig
index a2fb939c4e13..3cc53b44186e 100644
--- a/drivers/gpu/drm/bridge/synopsys/Kconfig
+++ b/drivers/gpu/drm/bridge/synopsys/Kconfig
@@ -2,6 +2,7 @@ config DRM_DW_HDMI
         tristate
         select DRM_KMS_HELPER
         select REGMAP_MMIO
+        select CEC_CORE if CEC_NOTIFIER
 
 config DRM_DW_HDMI_AHB_AUDIO
         tristate "Synopsys Designware AHB Audio interface"
@@ -23,6 +24,15 @@ config DRM_DW_HDMI_I2S_AUDIO
           Support the I2S Audio interface which is part of the Synopsys
           Designware HDMI block.
 
+config DRM_DW_HDMI_CEC
+        tristate "Synopsis Designware CEC interface"
+        depends on DRM_DW_HDMI
+        select CEC_CORE
+        select CEC_NOTIFIER
+        help
+          Support the CE interface which is part of the Synopsys
+          Designware HDMI block.
+
 config DRM_DW_MIPI_DSI
         tristate
         select DRM_KMS_HELPER
diff --git a/drivers/gpu/drm/bridge/synopsys/Makefile b/drivers/gpu/drm/bridge/synopsys/Makefile
index 5f57d366cc86..5dad97d920be 100644
--- a/drivers/gpu/drm/bridge/synopsys/Makefile
+++ b/drivers/gpu/drm/bridge/synopsys/Makefile
@@ -3,5 +3,6 @@
 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
+obj-$(CONFIG_DRM_DW_HDMI_CEC) += dw-hdmi-cec.o
 
 obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw-mipi-dsi.o
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
new file mode 100644
index 000000000000..6c323510f128
--- /dev/null
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
@@ -0,0 +1,327 @@
+/*
+ * Designware HDMI CEC driver
+ *
+ * Copyright (C) 2015-2017 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+
+#include <drm/drm_edid.h>
+
+#include <media/cec.h>
+#include <media/cec-notifier.h>
+
+#include "dw-hdmi-cec.h"
+
+enum {
+        HDMI_IH_CEC_STAT0       = 0x0106,
+        HDMI_IH_MUTE_CEC_STAT0  = 0x0186,
+
+        HDMI_CEC_CTRL           = 0x7d00,
+        CEC_CTRL_START          = BIT(0),
+        CEC_CTRL_FRAME_TYP      = 3 << 1,
+        CEC_CTRL_RETRY          = 0 << 1,
+        CEC_CTRL_NORMAL         = 1 << 1,
+        CEC_CTRL_IMMED          = 2 << 1,
+
+        HDMI_CEC_STAT           = 0x7d01,
+        CEC_STAT_DONE           = BIT(0),
+        CEC_STAT_EOM            = BIT(1),
+        CEC_STAT_NACK           = BIT(2),
+        CEC_STAT_ARBLOST        = BIT(3),
+        CEC_STAT_ERROR_INIT     = BIT(4),
+        CEC_STAT_ERROR_FOLL     = BIT(5),
+        CEC_STAT_WAKEUP         = BIT(6),
+
+        HDMI_CEC_MASK           = 0x7d02,
+        HDMI_CEC_POLARITY       = 0x7d03,
+        HDMI_CEC_INT            = 0x7d04,
+        HDMI_CEC_ADDR_L         = 0x7d05,
+        HDMI_CEC_ADDR_H         = 0x7d06,
+        HDMI_CEC_TX_CNT         = 0x7d07,
+        HDMI_CEC_RX_CNT         = 0x7d08,
+        HDMI_CEC_TX_DATA0       = 0x7d10,
+        HDMI_CEC_RX_DATA0       = 0x7d20,
+        HDMI_CEC_LOCK           = 0x7d30,
+        HDMI_CEC_WKUPCTRL       = 0x7d31,
+};
+
+struct dw_hdmi_cec {
+        struct dw_hdmi *hdmi;
+        const struct dw_hdmi_cec_ops *ops;
+        u32 addresses;
+        struct cec_adapter *adap;
+        struct cec_msg rx_msg;
+        unsigned int tx_status;
+        bool tx_done;
+        bool rx_done;
+        struct cec_notifier *notify;
+        int irq;
+};
+
+static void dw_hdmi_write(struct dw_hdmi_cec *cec, u8 val, int offset)
+{
+        cec->ops->write(cec->hdmi, val, offset);
+}
+
+static u8 dw_hdmi_read(struct dw_hdmi_cec *cec, int offset)
+{
+        return cec->ops->read(cec->hdmi, offset);
+}
+
+static int dw_hdmi_cec_log_addr(struct cec_adapter *adap, u8 logical_addr)
+{
+        struct dw_hdmi_cec *cec = cec_get_drvdata(adap);
+
+        if (logical_addr == CEC_LOG_ADDR_INVALID)
+                cec->addresses = 0;
+        else
+                cec->addresses |= BIT(logical_addr) | BIT(15);
+
+        dw_hdmi_write(cec, cec->addresses & 255, HDMI_CEC_ADDR_L);
+        dw_hdmi_write(cec, cec->addresses >> 8, HDMI_CEC_ADDR_H);
+
+        return 0;
+}
+
+static int dw_hdmi_cec_transmit(struct cec_adapter *adap, u8 attempts,
+                                u32 signal_free_time, struct cec_msg *msg)
+{
+        struct dw_hdmi_cec *cec = cec_get_drvdata(adap);
+        unsigned int i, ctrl;
+
+        switch (signal_free_time) {
+        case CEC_SIGNAL_FREE_TIME_RETRY:
+                ctrl = CEC_CTRL_RETRY;
+                break;
+        case CEC_SIGNAL_FREE_TIME_NEW_INITIATOR:
+        default:
+                ctrl = CEC_CTRL_NORMAL;
+                break;
+        case CEC_SIGNAL_FREE_TIME_NEXT_XFER:
+                ctrl = CEC_CTRL_IMMED;
+                break;
+        }
+
+        for (i = 0; i < msg->len; i++)
+                dw_hdmi_write(cec, msg->msg[i], HDMI_CEC_TX_DATA0 + i);
+
+        dw_hdmi_write(cec, msg->len, HDMI_CEC_TX_CNT);
+        dw_hdmi_write(cec, ctrl | CEC_CTRL_START, HDMI_CEC_CTRL);
+
+        return 0;
+}
+
+static irqreturn_t dw_hdmi_cec_hardirq(int irq, void *data)
+{
+        struct cec_adapter *adap = data;
+        struct dw_hdmi_cec *cec = cec_get_drvdata(adap);
+        unsigned int stat = dw_hdmi_read(cec, HDMI_IH_CEC_STAT0);
+        irqreturn_t ret = IRQ_HANDLED;
+
+        if (stat == 0)
+                return IRQ_NONE;
+
+        dw_hdmi_write(cec, stat, HDMI_IH_CEC_STAT0);
+
+        if (stat & CEC_STAT_ERROR_INIT) {
+                cec->tx_status = CEC_TX_STATUS_ERROR;
+                cec->tx_done = true;
+                ret = IRQ_WAKE_THREAD;
+        } else if (stat & CEC_STAT_DONE) {
+                cec->tx_status = CEC_TX_STATUS_OK;
+                cec->tx_done = true;
+                ret = IRQ_WAKE_THREAD;
+        } else if (stat & CEC_STAT_NACK) {
+                cec->tx_status = CEC_TX_STATUS_NACK;
+                cec->tx_done = true;
+                ret = IRQ_WAKE_THREAD;
+        }
+
+        if (stat & CEC_STAT_EOM) {
+                unsigned int len, i;
+
+                len = dw_hdmi_read(cec, HDMI_CEC_RX_CNT);
+                if (len > sizeof(cec->rx_msg.msg))
+                        len = sizeof(cec->rx_msg.msg);
+
+                for (i = 0; i < len; i++)
+                        cec->rx_msg.msg[i] =
+                                dw_hdmi_read(cec, HDMI_CEC_RX_DATA0 + i);
+
+                dw_hdmi_write(cec, 0, HDMI_CEC_LOCK);
+
+                cec->rx_msg.len = len;
+                smp_wmb();
+                cec->rx_done = true;
+
+                ret = IRQ_WAKE_THREAD;
+        }
+
+        return ret;
+}
+
+static irqreturn_t dw_hdmi_cec_thread(int irq, void *data)
+{
+        struct cec_adapter *adap = data;
+        struct dw_hdmi_cec *cec = cec_get_drvdata(adap);
+
+        if (cec->tx_done) {
+                cec->tx_done = false;
+                cec_transmit_attempt_done(adap, cec->tx_status);
+        }
+        if (cec->rx_done) {
+                cec->rx_done = false;
+                smp_rmb();
+                cec_received_msg(adap, &cec->rx_msg);
+        }
+        return IRQ_HANDLED;
+}
+
+static int dw_hdmi_cec_enable(struct cec_adapter *adap, bool enable)
+{
+        struct dw_hdmi_cec *cec = cec_get_drvdata(adap);
+
+        if (!enable) {
+                dw_hdmi_write(cec, ~0, HDMI_CEC_MASK);
+                dw_hdmi_write(cec, ~0, HDMI_IH_MUTE_CEC_STAT0);
+                dw_hdmi_write(cec, 0, HDMI_CEC_POLARITY);
+
+                cec->ops->disable(cec->hdmi);
+        } else {
+                unsigned int irqs;
+
+                dw_hdmi_write(cec, 0, HDMI_CEC_CTRL);
+                dw_hdmi_write(cec, ~0, HDMI_IH_CEC_STAT0);
+                dw_hdmi_write(cec, 0, HDMI_CEC_LOCK);
+
+                dw_hdmi_cec_log_addr(cec->adap, CEC_LOG_ADDR_INVALID);
+
+                cec->ops->enable(cec->hdmi);
+
+                irqs = CEC_STAT_ERROR_INIT | CEC_STAT_NACK | CEC_STAT_EOM |
+                       CEC_STAT_DONE;
+                dw_hdmi_write(cec, irqs, HDMI_CEC_POLARITY);
+                dw_hdmi_write(cec, ~irqs, HDMI_CEC_MASK);
+                dw_hdmi_write(cec, ~irqs, HDMI_IH_MUTE_CEC_STAT0);
+        }
+        return 0;
+}
+
+static const struct cec_adap_ops dw_hdmi_cec_ops = {
+        .adap_enable = dw_hdmi_cec_enable,
+        .adap_log_addr = dw_hdmi_cec_log_addr,
+        .adap_transmit = dw_hdmi_cec_transmit,
+};
+
+static void dw_hdmi_cec_del(void *data)
+{
+        struct dw_hdmi_cec *cec = data;
+
+        cec_delete_adapter(cec->adap);
+}
+
+static int dw_hdmi_cec_probe(struct platform_device *pdev)
+{
+        struct dw_hdmi_cec_data *data = dev_get_platdata(&pdev->dev);
+        struct dw_hdmi_cec *cec;
+        int ret;
+
+        if (!data)
+                return -ENXIO;
+
+        /*
+         * Our device is just a convenience - we want to link to the real
+         * hardware device here, so that userspace can see the association
+         * between the HDMI hardware and its associated CEC chardev.
+         */
+        cec = devm_kzalloc(&pdev->dev, sizeof(*cec), GFP_KERNEL);
+        if (!cec)
+                return -ENOMEM;
+
+        cec->irq = data->irq;
+        cec->ops = data->ops;
+        cec->hdmi = data->hdmi;
+
+        platform_set_drvdata(pdev, cec);
+
+        dw_hdmi_write(cec, 0, HDMI_CEC_TX_CNT);
+        dw_hdmi_write(cec, ~0, HDMI_CEC_MASK);
+        dw_hdmi_write(cec, ~0, HDMI_IH_MUTE_CEC_STAT0);
+        dw_hdmi_write(cec, 0, HDMI_CEC_POLARITY);
+
+        cec->adap = cec_allocate_adapter(&dw_hdmi_cec_ops, cec, "dw_hdmi",
+                                         CEC_CAP_LOG_ADDRS | CEC_CAP_TRANSMIT |
+                                         CEC_CAP_RC | CEC_CAP_PASSTHROUGH,
+                                         CEC_MAX_LOG_ADDRS);
+        if (IS_ERR(cec->adap))
+                return PTR_ERR(cec->adap);
+
+        /* override the module pointer */
+        cec->adap->owner = THIS_MODULE;
+
+        ret = devm_add_action(&pdev->dev, dw_hdmi_cec_del, cec);
+        if (ret) {
+                cec_delete_adapter(cec->adap);
+                return ret;
+        }
+
+        ret = devm_request_threaded_irq(&pdev->dev, cec->irq,
+                                        dw_hdmi_cec_hardirq,
+                                        dw_hdmi_cec_thread, IRQF_SHARED,
+                                        "dw-hdmi-cec", cec->adap);
+        if (ret < 0)
+                return ret;
+
+        cec->notify = cec_notifier_get(pdev->dev.parent);
+        if (!cec->notify)
+                return -ENOMEM;
+
+        ret = cec_register_adapter(cec->adap, pdev->dev.parent);
+        if (ret < 0) {
+                cec_notifier_put(cec->notify);
+                return ret;
+        }
+
+        /*
+         * CEC documentation says we must not call cec_delete_adapter
+         * after a successful call to cec_register_adapter().
+         */
+        devm_remove_action(&pdev->dev, dw_hdmi_cec_del, cec);
+
+        cec_register_cec_notifier(cec->adap, cec->notify);
+
+        return 0;
+}
+
+static int dw_hdmi_cec_remove(struct platform_device *pdev)
+{
+        struct dw_hdmi_cec *cec = platform_get_drvdata(pdev);
+
+        cec_unregister_adapter(cec->adap);
+        cec_notifier_put(cec->notify);
+
+        return 0;
+}
+
+static struct platform_driver dw_hdmi_cec_driver = {
+        .probe  = dw_hdmi_cec_probe,
+        .remove = dw_hdmi_cec_remove,
+        .driver = {
+                .name = "dw-hdmi-cec",
+        },
+};
+module_platform_driver(dw_hdmi_cec_driver);
+
+MODULE_AUTHOR("Russell King <rmk+kernel@armlinux.org.uk>");
+MODULE_DESCRIPTION("Synopsys Designware HDMI CEC driver for i.MX");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS(PLATFORM_MODULE_PREFIX "dw-hdmi-cec");
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
new file mode 100644
index 000000000000..cf4dc121a2c4
--- /dev/null
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.h
@@ -0,0 +1,19 @@
+#ifndef DW_HDMI_CEC_H
+#define DW_HDMI_CEC_H
+
+struct dw_hdmi;
+
+struct dw_hdmi_cec_ops {
+        void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
+        u8 (*read)(struct dw_hdmi *hdmi, int offset);
+        void (*enable)(struct dw_hdmi *hdmi);
+        void (*disable)(struct dw_hdmi *hdmi);
+};
+
+struct dw_hdmi_cec_data {
+        struct dw_hdmi *hdmi;
+        const struct dw_hdmi_cec_ops *ops;
+        int irq;
+};
+
+#endif
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
index b2cf59f54c88..3b7e5c59a5e9 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
@@ -1,7 +1,8 @@
 /*
  * dw-hdmi-i2s-audio.c
  *
- * Copyright (c) 2016 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ * Copyright (c) 2017 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 60faf2d2bc6b..bf14214fa464 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -35,8 +35,12 @@
 
 #include "dw-hdmi.h"
 #include "dw-hdmi-audio.h"
+#include "dw-hdmi-cec.h"
+
+#include <media/cec-notifier.h>
 
 #define DDC_SEGMENT_ADDR        0x30
+
 #define HDMI_EDID_LEN           512
 
 enum hdmi_datamap {
@@ -130,6 +134,7 @@ struct dw_hdmi {
         unsigned int version;
 
         struct platform_device *audio;
+        struct platform_device *cec;
         struct device *dev;
         struct clk *isfr_clk;
         struct clk *iahb_clk;
@@ -163,6 +168,7 @@ struct dw_hdmi {
         bool bridge_is_on;              /* indicates the bridge is on */
         bool rxsense;                   /* rxsense state */
         u8 phy_mask;                    /* desired phy int mask settings */
+        u8 mc_clkdis;                   /* clock disable register */
 
         spinlock_t audio_lock;
         struct mutex audio_mutex;
@@ -175,6 +181,8 @@ struct dw_hdmi {
         struct regmap *regm;
         void (*enable_audio)(struct dw_hdmi *hdmi);
         void (*disable_audio)(struct dw_hdmi *hdmi);
+
+        struct cec_notifier *cec_notifier;
 };
 
 #define HDMI_IH_PHY_STAT0_RX_SENSE \
@@ -546,8 +554,11 @@ EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate);
 
 static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable)
 {
-        hdmi_modb(hdmi, enable ? 0 : HDMI_MC_CLKDIS_AUDCLK_DISABLE,
-                  HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS);
+        if (enable)
+                hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE;
+        else
+                hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE;
+        hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
 }
 
 static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi)
@@ -1569,8 +1580,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 /* HDMI Initialization Step B.4 */
 static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
 {
-        u8 clkdis;
-
         /* control period minimum duration */
         hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR);
         hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR);
@@ -1582,17 +1591,21 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
         hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM);
 
         /* Enable pixel clock and tmds data path */
-        clkdis = 0x7F;
-        clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
-        hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+        hdmi->mc_clkdis |= HDMI_MC_CLKDIS_HDCPCLK_DISABLE |
+                           HDMI_MC_CLKDIS_CSCCLK_DISABLE |
+                           HDMI_MC_CLKDIS_AUDCLK_DISABLE |
+                           HDMI_MC_CLKDIS_PREPCLK_DISABLE |
+                           HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
+        hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
+        hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
 
-        clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
-        hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+        hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
+        hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
 
         /* Enable csc path */
         if (is_color_space_conversion(hdmi)) {
-                clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
-                hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+                hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
+                hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
         }
 
         /* Enable color space conversion if needed */
@@ -1783,7 +1796,6 @@ static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
         hdmi_writeb(hdmi, 0xff, HDMI_AUD_HBR_MASK);
         hdmi_writeb(hdmi, 0xff, HDMI_GP_MASK);
         hdmi_writeb(hdmi, 0xff, HDMI_A_APIINTMSK);
-        hdmi_writeb(hdmi, 0xff, HDMI_CEC_MASK);
         hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
         hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
 
@@ -1896,6 +1908,7 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
                 hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid);
                 hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
                 drm_mode_connector_update_edid_property(connector, edid);
+                cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, edid);
                 ret = drm_add_edid_modes(connector, edid);
                 /* Store the ELD */
                 drm_edid_to_eld(connector, edid);
@@ -1920,7 +1933,6 @@ static void dw_hdmi_connector_force(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs dw_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = dw_hdmi_connector_detect,
         .destroy = drm_connector_cleanup,
@@ -2119,11 +2131,16 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
          * ask the source to re-read the EDID.
          */
         if (intr_stat &
-            (HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD))
+            (HDMI_IH_PHY_STAT0_RX_SENSE | HDMI_IH_PHY_STAT0_HPD)) {
                 __dw_hdmi_setup_rx_sense(hdmi,
                                          phy_stat & HDMI_PHY_HPD,
                                          phy_stat & HDMI_PHY_RX_SENSE);
 
+                if ((phy_stat & (HDMI_PHY_RX_SENSE | HDMI_PHY_HPD)) == 0)
+                        cec_notifier_set_phys_addr(hdmi->cec_notifier,
+                                                   CEC_PHYS_ADDR_INVALID);
+        }
+
         if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
                 dev_dbg(hdmi->dev, "EVENT=%s\n",
                         phy_int_pol & HDMI_PHY_HPD ? "plugin" : "plugout");
@@ -2170,6 +2187,7 @@ static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
                 .name = "DWC HDMI 2.0 TX PHY",
                 .gen = 2,
                 .has_svsret = true,
+                .configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
         }, {
                 .type = DW_HDMI_PHY_VENDOR_PHY,
                 .name = "Vendor PHY",
@@ -2219,6 +2237,29 @@ static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
         return -ENODEV;
 }
 
+static void dw_hdmi_cec_enable(struct dw_hdmi *hdmi)
+{
+        mutex_lock(&hdmi->mutex);
+        hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CECCLK_DISABLE;
+        hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
+        mutex_unlock(&hdmi->mutex);
+}
+
+static void dw_hdmi_cec_disable(struct dw_hdmi *hdmi)
+{
+        mutex_lock(&hdmi->mutex);
+        hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CECCLK_DISABLE;
+        hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
+        mutex_unlock(&hdmi->mutex);
+}
+
+static const struct dw_hdmi_cec_ops dw_hdmi_cec_ops = {
+        .write = hdmi_writeb,
+        .read = hdmi_readb,
+        .enable = dw_hdmi_cec_enable,
+        .disable = dw_hdmi_cec_disable,
+};
+
 static const struct regmap_config hdmi_regmap_8bit_config = {
         .reg_bits       = 32,
         .val_bits       = 8,
@@ -2241,6 +2282,7 @@ __dw_hdmi_probe(struct platform_device *pdev,
         struct device_node *np = dev->of_node;
         struct platform_device_info pdevinfo;
         struct device_node *ddc_node;
+        struct dw_hdmi_cec_data cec;
         struct dw_hdmi *hdmi;
         struct resource *iores = NULL;
         int irq;
@@ -2261,6 +2303,7 @@ __dw_hdmi_probe(struct platform_device *pdev,
         hdmi->disabled = true;
         hdmi->rxsense = true;
         hdmi->phy_mask = (u8)~(HDMI_PHY_HPD | HDMI_PHY_RX_SENSE);
+        hdmi->mc_clkdis = 0x7f;
 
         mutex_init(&hdmi->mutex);
         mutex_init(&hdmi->audio_mutex);
@@ -2376,6 +2419,12 @@ __dw_hdmi_probe(struct platform_device *pdev,
         if (ret)
                 goto err_iahb;
 
+        hdmi->cec_notifier = cec_notifier_get(dev);
+        if (!hdmi->cec_notifier) {
+                ret = -ENOMEM;
+                goto err_iahb;
+        }
+
         /*
          * To prevent overflows in HDMI_IH_FC_STAT2, set the clk regenerator
          * N and cts values before enabling phy
@@ -2438,6 +2487,19 @@ __dw_hdmi_probe(struct platform_device *pdev,
                 hdmi->audio = platform_device_register_full(&pdevinfo);
         }
 
+        if (config0 & HDMI_CONFIG0_CEC) {
+                cec.hdmi = hdmi;
+                cec.ops = &dw_hdmi_cec_ops;
+                cec.irq = irq;
+
+                pdevinfo.name = "dw-hdmi-cec";
+                pdevinfo.data = &cec;
+                pdevinfo.size_data = sizeof(cec);
+                pdevinfo.dma_mask = 0;
+
+                hdmi->cec = platform_device_register_full(&pdevinfo);
+        }
+
         /* Reset HDMI DDC I2C master controller and mute I2CM interrupts */
         if (hdmi->i2c)
                 dw_hdmi_i2c_init(hdmi);
@@ -2452,6 +2514,9 @@ err_iahb:
                 hdmi->ddc = NULL;
         }
 
+        if (hdmi->cec_notifier)
+                cec_notifier_put(hdmi->cec_notifier);
+
         clk_disable_unprepare(hdmi->iahb_clk);
 err_isfr:
         clk_disable_unprepare(hdmi->isfr_clk);
@@ -2465,10 +2530,15 @@ static void __dw_hdmi_remove(struct dw_hdmi *hdmi)
 {
         if (hdmi->audio && !IS_ERR(hdmi->audio))
                 platform_device_unregister(hdmi->audio);
+        if (!IS_ERR(hdmi->cec))
+                platform_device_unregister(hdmi->cec);
 
         /* Disable all interrupts */
         hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
 
+        if (hdmi->cec_notifier)
+                cec_notifier_put(hdmi->cec_notifier);
+
         clk_disable_unprepare(hdmi->iahb_clk);
         clk_disable_unprepare(hdmi->isfr_clk);
 
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
index c59f87e1483e..9d90eb9c46e5 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
@@ -478,51 +478,6 @@
 #define HDMI_A_PRESETUP                         0x501A
 #define HDMI_A_SRM_BASE                         0x5020
 
-/* CEC Engine Registers */
-#define HDMI_CEC_CTRL                           0x7D00
-#define HDMI_CEC_STAT                           0x7D01
-#define HDMI_CEC_MASK                           0x7D02
-#define HDMI_CEC_POLARITY                       0x7D03
-#define HDMI_CEC_INT                            0x7D04
-#define HDMI_CEC_ADDR_L                         0x7D05
-#define HDMI_CEC_ADDR_H                         0x7D06
-#define HDMI_CEC_TX_CNT                         0x7D07
-#define HDMI_CEC_RX_CNT                         0x7D08
-#define HDMI_CEC_TX_DATA0                       0x7D10
-#define HDMI_CEC_TX_DATA1                       0x7D11
-#define HDMI_CEC_TX_DATA2                       0x7D12
-#define HDMI_CEC_TX_DATA3                       0x7D13
-#define HDMI_CEC_TX_DATA4                       0x7D14
-#define HDMI_CEC_TX_DATA5                       0x7D15
-#define HDMI_CEC_TX_DATA6                       0x7D16
-#define HDMI_CEC_TX_DATA7                       0x7D17
-#define HDMI_CEC_TX_DATA8                       0x7D18
-#define HDMI_CEC_TX_DATA9                       0x7D19
-#define HDMI_CEC_TX_DATA10                      0x7D1a
-#define HDMI_CEC_TX_DATA11                      0x7D1b
-#define HDMI_CEC_TX_DATA12                      0x7D1c
-#define HDMI_CEC_TX_DATA13                      0x7D1d
-#define HDMI_CEC_TX_DATA14                      0x7D1e
-#define HDMI_CEC_TX_DATA15                      0x7D1f
-#define HDMI_CEC_RX_DATA0                       0x7D20
-#define HDMI_CEC_RX_DATA1                       0x7D21
-#define HDMI_CEC_RX_DATA2                       0x7D22
-#define HDMI_CEC_RX_DATA3                       0x7D23
-#define HDMI_CEC_RX_DATA4                       0x7D24
-#define HDMI_CEC_RX_DATA5                       0x7D25
-#define HDMI_CEC_RX_DATA6                       0x7D26
-#define HDMI_CEC_RX_DATA7                       0x7D27
-#define HDMI_CEC_RX_DATA8                       0x7D28
-#define HDMI_CEC_RX_DATA9                       0x7D29
-#define HDMI_CEC_RX_DATA10                      0x7D2a
-#define HDMI_CEC_RX_DATA11                      0x7D2b
-#define HDMI_CEC_RX_DATA12                      0x7D2c
-#define HDMI_CEC_RX_DATA13                      0x7D2d
-#define HDMI_CEC_RX_DATA14                      0x7D2e
-#define HDMI_CEC_RX_DATA15                      0x7D2f
-#define HDMI_CEC_LOCK                           0x7D30
-#define HDMI_CEC_WKUPCTRL                       0x7D31
-
 /* I2C Master Registers (E-DDC) */
 #define HDMI_I2CM_SLAVE                         0x7E00
 #define HDMI_I2CM_ADDRESS                       0x7E01
@@ -555,6 +510,7 @@ enum {
 
 /* CONFIG0_ID field values */
         HDMI_CONFIG0_I2S = 0x10,
+        HDMI_CONFIG0_CEC = 0x02,
 
 /* CONFIG1_ID field values */
         HDMI_CONFIG1_AHB = 0x01,
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index 12a35f9c3adc..503252d6a74d 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -1160,7 +1160,6 @@ static const struct drm_connector_helper_funcs tc_connector_helper_funcs = {
 };
 
 static const struct drm_connector_funcs tc_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/bridge/ti-tfp410.c b/drivers/gpu/drm/bridge/ti-tfp410.c
index 7ea2a15e8807..acb857030951 100644
--- a/drivers/gpu/drm/bridge/ti-tfp410.c
+++ b/drivers/gpu/drm/bridge/ti-tfp410.c
@@ -102,7 +102,6 @@ tfp410_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs tfp410_con_funcs = {
-        .dpms                   = drm_atomic_helper_connector_dpms,
         .detect                 = tfp410_connector_detect,
         .fill_modes             = drm_helper_probe_single_connector_modes,
         .destroy                = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.h b/drivers/gpu/drm/cirrus/cirrus_drv.h
index 8690352d96f7..be2d7e488062 100644
--- a/drivers/gpu/drm/cirrus/cirrus_drv.h
+++ b/drivers/gpu/drm/cirrus/cirrus_drv.h
@@ -96,7 +96,6 @@
 
 struct cirrus_crtc {
         struct drm_crtc                 base;
-        u8                              lut_r[256], lut_g[256], lut_b[256];
         int                             last_dpms;
         bool                            enabled;
 };
@@ -180,13 +179,6 @@ cirrus_bo(struct ttm_buffer_object *bo)
 #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
 
-                                /* cirrus_mode.c */
-void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                             u16 blue, int regno);
-void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                             u16 *blue, int regno);
-
-
                                 /* cirrus_main.c */
 int cirrus_device_init(struct cirrus_device *cdev,
                       struct drm_device *ddev,
diff --git a/drivers/gpu/drm/cirrus/cirrus_fbdev.c b/drivers/gpu/drm/cirrus/cirrus_fbdev.c
index c69586163d92..0f6815f35ad2 100644
--- a/drivers/gpu/drm/cirrus/cirrus_fbdev.c
+++ b/drivers/gpu/drm/cirrus/cirrus_fbdev.c
@@ -264,8 +264,6 @@ static int cirrus_fbdev_destroy(struct drm_device *dev,
 }
 
 static const struct drm_fb_helper_funcs cirrus_fb_helper_funcs = {
-        .gamma_set = cirrus_crtc_fb_gamma_set,
-        .gamma_get = cirrus_crtc_fb_gamma_get,
         .fb_probe = cirrusfb_create,
 };
 
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c
index 53f6f0f84206..a4c4a465b385 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
@@ -31,25 +31,6 @@
  * This file contains setup code for the CRTC.
  */
 
-static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
-{
-        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
-        struct drm_device *dev = crtc->dev;
-        struct cirrus_device *cdev = dev->dev_private;
-        int i;
-
-        if (!crtc->enabled)
-                return;
-
-        for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
-                /* VGA registers */
-                WREG8(PALETTE_INDEX, i);
-                WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
-                WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
-                WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
-        }
-}
-
 /*
  * The DRM core requires DPMS functions, but they make little sense in our
  * case and so are just stubs
@@ -330,15 +311,25 @@ static int cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                                  u16 *blue, uint32_t size,
                                  struct drm_modeset_acquire_ctx *ctx)
 {
-        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
+        struct drm_device *dev = crtc->dev;
+        struct cirrus_device *cdev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
 
-        for (i = 0; i < size; i++) {
-                cirrus_crtc->lut_r[i] = red[i];
-                cirrus_crtc->lut_g[i] = green[i];
-                cirrus_crtc->lut_b[i] = blue[i];
+        if (!crtc->enabled)
+                return 0;
+
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
+
+        for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
+                /* VGA registers */
+                WREG8(PALETTE_INDEX, i);
+                WREG8(PALETTE_DATA, *r++ >> 8);
+                WREG8(PALETTE_DATA, *g++ >> 8);
+                WREG8(PALETTE_DATA, *b++ >> 8);
         }
-        cirrus_crtc_load_lut(crtc);
 
         return 0;
 }
@@ -365,7 +356,6 @@ static const struct drm_crtc_helper_funcs cirrus_helper_funcs = {
         .mode_set_base = cirrus_crtc_mode_set_base,
         .prepare = cirrus_crtc_prepare,
         .commit = cirrus_crtc_commit,
-        .load_lut = cirrus_crtc_load_lut,
 };
 
 /* CRTC setup */
@@ -373,7 +363,6 @@ static void cirrus_crtc_init(struct drm_device *dev)
 {
         struct cirrus_device *cdev = dev->dev_private;
         struct cirrus_crtc *cirrus_crtc;
-        int i;
 
         cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
                               (CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),
@@ -387,37 +376,9 @@ static void cirrus_crtc_init(struct drm_device *dev)
         drm_mode_crtc_set_gamma_size(&cirrus_crtc->base, CIRRUS_LUT_SIZE);
         cdev->mode_info.crtc = cirrus_crtc;
 
-        for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
-                cirrus_crtc->lut_r[i] = i;
-                cirrus_crtc->lut_g[i] = i;
-                cirrus_crtc->lut_b[i] = i;
-        }
-
         drm_crtc_helper_add(&cirrus_crtc->base, &cirrus_helper_funcs);
 }
 
-/** Sets the color ramps on behalf of fbcon */
-void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                              u16 blue, int regno)
-{
-        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
-
-        cirrus_crtc->lut_r[regno] = red;
-        cirrus_crtc->lut_g[regno] = green;
-        cirrus_crtc->lut_b[regno] = blue;
-}
-
-/** Gets the color ramps on behalf of fbcon */
-void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                              u16 *blue, int regno)
-{
-        struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
-
-        *red = cirrus_crtc->lut_r[regno];
-        *green = cirrus_crtc->lut_g[regno];
-        *blue = cirrus_crtc->lut_b[regno];
-}
-
 static void cirrus_encoder_mode_set(struct drm_encoder *encoder,
                                 struct drm_display_mode *mode,
                                 struct drm_display_mode *adjusted_mode)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 01192dd3ed79..1b755439f591 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -713,7 +713,7 @@ EXPORT_SYMBOL(drm_atomic_get_plane_state);
  * RETURNS:
  * Zero on success, error code on failure
  */
-int drm_atomic_plane_set_property(struct drm_plane *plane,
+static int drm_atomic_plane_set_property(struct drm_plane *plane,
                 struct drm_plane_state *state, struct drm_property *property,
                 uint64_t val)
 {
@@ -770,7 +770,6 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
 
         return 0;
 }
-EXPORT_SYMBOL(drm_atomic_plane_set_property);
 
 /**
  * drm_atomic_plane_get_property - get property value from plane state
@@ -1145,7 +1144,7 @@ EXPORT_SYMBOL(drm_atomic_get_connector_state);
  * RETURNS:
  * Zero on success, error code on failure
  */
-int drm_atomic_connector_set_property(struct drm_connector *connector,
+static int drm_atomic_connector_set_property(struct drm_connector *connector,
                 struct drm_connector_state *state, struct drm_property *property,
                 uint64_t val)
 {
@@ -1212,7 +1211,6 @@ int drm_atomic_connector_set_property(struct drm_connector *connector,
 
         return 0;
 }
-EXPORT_SYMBOL(drm_atomic_connector_set_property);
 
 static void drm_atomic_connector_print_state(struct drm_printer *p,
                 const struct drm_connector_state *state)
@@ -1590,38 +1588,6 @@ drm_atomic_add_affected_planes(struct drm_atomic_state *state,
 EXPORT_SYMBOL(drm_atomic_add_affected_planes);
 
 /**
- * drm_atomic_legacy_backoff - locking backoff for legacy ioctls
- * @state: atomic state
- *
- * This function should be used by legacy entry points which don't understand
- * -EDEADLK semantics. For simplicity this one will grab all modeset locks after
- * the slowpath completed.
- */
-void drm_atomic_legacy_backoff(struct drm_atomic_state *state)
-{
-        struct drm_device *dev = state->dev;
-        int ret;
-        bool global = false;
-
-        if (WARN_ON(dev->mode_config.acquire_ctx == state->acquire_ctx)) {
-                global = true;
-
-                dev->mode_config.acquire_ctx = NULL;
-        }
-
-retry:
-        drm_modeset_backoff(state->acquire_ctx);
-
-        ret = drm_modeset_lock_all_ctx(dev, state->acquire_ctx);
-        if (ret)
-                goto retry;
-
-        if (global)
-                dev->mode_config.acquire_ctx = state->acquire_ctx;
-}
-EXPORT_SYMBOL(drm_atomic_legacy_backoff);
-
-/**
  * drm_atomic_check_only - check whether a given config would work
  * @state: atomic configuration to check
  *
@@ -1864,9 +1830,60 @@ static struct drm_pending_vblank_event *create_vblank_event(
         return e;
 }
 
-static int atomic_set_prop(struct drm_atomic_state *state,
-                struct drm_mode_object *obj, struct drm_property *prop,
-                uint64_t prop_value)
+int drm_atomic_connector_commit_dpms(struct drm_atomic_state *state,
+                                     struct drm_connector *connector,
+                                     int mode)
+{
+        struct drm_connector *tmp_connector;
+        struct drm_connector_state *new_conn_state;
+        struct drm_crtc *crtc;
+        struct drm_crtc_state *crtc_state;
+        int i, ret, old_mode = connector->dpms;
+        bool active = false;
+
+        ret = drm_modeset_lock(&state->dev->mode_config.connection_mutex,
+                               state->acquire_ctx);
+        if (ret)
+                return ret;
+
+        if (mode != DRM_MODE_DPMS_ON)
+                mode = DRM_MODE_DPMS_OFF;
+        connector->dpms = mode;
+
+        crtc = connector->state->crtc;
+        if (!crtc)
+                goto out;
+        ret = drm_atomic_add_affected_connectors(state, crtc);
+        if (ret)
+                goto out;
+
+        crtc_state = drm_atomic_get_crtc_state(state, crtc);
+        if (IS_ERR(crtc_state)) {
+                ret = PTR_ERR(crtc_state);
+                goto out;
+        }
+
+        for_each_new_connector_in_state(state, tmp_connector, new_conn_state, i) {
+                if (new_conn_state->crtc != crtc)
+                        continue;
+                if (tmp_connector->dpms == DRM_MODE_DPMS_ON) {
+                        active = true;
+                        break;
+                }
+        }
+
+        crtc_state->active = active;
+        ret = drm_atomic_commit(state);
+out:
+        if (ret != 0)
+                connector->dpms = old_mode;
+        return ret;
+}
+
+int drm_atomic_set_property(struct drm_atomic_state *state,
+                            struct drm_mode_object *obj,
+                            struct drm_property *prop,
+                            uint64_t prop_value)
 {
         struct drm_mode_object *ref;
         int ret;
@@ -2286,7 +2303,8 @@ retry:
                                 goto out;
                         }
 
-                        ret = atomic_set_prop(state, obj, prop, prop_value);
+                        ret = drm_atomic_set_property(state, obj, prop,
+                                                      prop_value);
                         if (ret) {
                                 drm_mode_object_put(obj);
                                 goto out;
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index 41f9d47d2bf6..1bc32cd74d78 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -921,16 +921,12 @@ drm_atomic_helper_update_legacy_modeset_state(struct drm_device *dev,
                 crtc = new_conn_state->crtc;
                 if ((!crtc && old_conn_state->crtc) ||
                     (crtc && drm_atomic_crtc_needs_modeset(crtc->state))) {
-                        struct drm_property *dpms_prop =
-                                dev->mode_config.dpms_property;
                         int mode = DRM_MODE_DPMS_OFF;
 
                         if (crtc && crtc->state->active)
                                 mode = DRM_MODE_DPMS_ON;
 
                         connector->dpms = mode;
-                        drm_object_property_set_value(&connector->base,
-                                                      dpms_prop, mode);
                 }
         }
 
@@ -1270,7 +1266,7 @@ void drm_atomic_helper_wait_for_flip_done(struct drm_device *dev,
         struct drm_crtc *crtc;
         int i;
 
-        for_each_crtc_in_state(old_state, crtc, unused, i) {
+        for_each_new_crtc_in_state(old_state, crtc, unused, i) {
                 struct drm_crtc_commit *commit = old_state->crtcs[i].commit;
                 int ret;
 
@@ -2957,171 +2953,6 @@ out:
 }
 EXPORT_SYMBOL(drm_atomic_helper_resume);
 
-/**
- * drm_atomic_helper_crtc_set_property - helper for crtc properties
- * @crtc: DRM crtc
- * @property: DRM property
- * @val: value of property
- *
- * Provides a default crtc set_property handler using the atomic driver
- * interface.
- *
- * RETURNS:
- * Zero on success, error code on failure
- */
-int
-drm_atomic_helper_crtc_set_property(struct drm_crtc *crtc,
-                                    struct drm_property *property,
-                                    uint64_t val)
-{
-        struct drm_atomic_state *state;
-        struct drm_crtc_state *crtc_state;
-        int ret = 0;
-
-        state = drm_atomic_state_alloc(crtc->dev);
-        if (!state)
-                return -ENOMEM;
-
-        /* ->set_property is always called with all locks held. */
-        state->acquire_ctx = crtc->dev->mode_config.acquire_ctx;
-retry:
-        crtc_state = drm_atomic_get_crtc_state(state, crtc);
-        if (IS_ERR(crtc_state)) {
-                ret = PTR_ERR(crtc_state);
-                goto fail;
-        }
-
-        ret = drm_atomic_crtc_set_property(crtc, crtc_state,
-                        property, val);
-        if (ret)
-                goto fail;
-
-        ret = drm_atomic_commit(state);
-fail:
-        if (ret == -EDEADLK)
-                goto backoff;
-
-        drm_atomic_state_put(state);
-        return ret;
-
-backoff:
-        drm_atomic_state_clear(state);
-        drm_atomic_legacy_backoff(state);
-
-        goto retry;
-}
-EXPORT_SYMBOL(drm_atomic_helper_crtc_set_property);
-
-/**
- * drm_atomic_helper_plane_set_property - helper for plane properties
- * @plane: DRM plane
- * @property: DRM property
- * @val: value of property
- *
- * Provides a default plane set_property handler using the atomic driver
- * interface.
- *
- * RETURNS:
- * Zero on success, error code on failure
- */
-int
-drm_atomic_helper_plane_set_property(struct drm_plane *plane,
-                                    struct drm_property *property,
-                                    uint64_t val)
-{
-        struct drm_atomic_state *state;
-        struct drm_plane_state *plane_state;
-        int ret = 0;
-
-        state = drm_atomic_state_alloc(plane->dev);
-        if (!state)
-                return -ENOMEM;
-
-        /* ->set_property is always called with all locks held. */
-        state->acquire_ctx = plane->dev->mode_config.acquire_ctx;
-retry:
-        plane_state = drm_atomic_get_plane_state(state, plane);
-        if (IS_ERR(plane_state)) {
-                ret = PTR_ERR(plane_state);
-                goto fail;
-        }
-
-        ret = drm_atomic_plane_set_property(plane, plane_state,
-                        property, val);
-        if (ret)
-                goto fail;
-
-        ret = drm_atomic_commit(state);
-fail:
-        if (ret == -EDEADLK)
-                goto backoff;
-
-        drm_atomic_state_put(state);
-        return ret;
-
-backoff:
-        drm_atomic_state_clear(state);
-        drm_atomic_legacy_backoff(state);
-
-        goto retry;
-}
-EXPORT_SYMBOL(drm_atomic_helper_plane_set_property);
-
-/**
- * drm_atomic_helper_connector_set_property - helper for connector properties
- * @connector: DRM connector
- * @property: DRM property
- * @val: value of property
- *
- * Provides a default connector set_property handler using the atomic driver
- * interface.
- *
- * RETURNS:
- * Zero on success, error code on failure
- */
-int
-drm_atomic_helper_connector_set_property(struct drm_connector *connector,
-                                    struct drm_property *property,
-                                    uint64_t val)
-{
-        struct drm_atomic_state *state;
-        struct drm_connector_state *connector_state;
-        int ret = 0;
-
-        state = drm_atomic_state_alloc(connector->dev);
-        if (!state)
-                return -ENOMEM;
-
-        /* ->set_property is always called with all locks held. */
-        state->acquire_ctx = connector->dev->mode_config.acquire_ctx;
-retry:
-        connector_state = drm_atomic_get_connector_state(state, connector);
-        if (IS_ERR(connector_state)) {
-                ret = PTR_ERR(connector_state);
-                goto fail;
-        }
-
-        ret = drm_atomic_connector_set_property(connector, connector_state,
-                        property, val);
-        if (ret)
-                goto fail;
-
-        ret = drm_atomic_commit(state);
-fail:
-        if (ret == -EDEADLK)
-                goto backoff;
-
-        drm_atomic_state_put(state);
-        return ret;
-
-backoff:
-        drm_atomic_state_clear(state);
-        drm_atomic_legacy_backoff(state);
-
-        goto retry;
-}
-EXPORT_SYMBOL(drm_atomic_helper_connector_set_property);
-
 static int page_flip_common(struct drm_atomic_state *state,
                             struct drm_crtc *crtc,
                             struct drm_framebuffer *fb,
@@ -3257,85 +3088,6 @@ fail:
 EXPORT_SYMBOL(drm_atomic_helper_page_flip_target);
 
 /**
- * drm_atomic_helper_connector_dpms() - connector dpms helper implementation
- * @connector: affected connector
- * @mode: DPMS mode
- *
- * This is the main helper function provided by the atomic helper framework for
- * implementing the legacy DPMS connector interface. It computes the new desired
- * &drm_crtc_state.active state for the corresponding CRTC (if the connector is
- * enabled) and updates it.
- *
- * Returns:
- * Returns 0 on success, negative errno numbers on failure.
- */
-int drm_atomic_helper_connector_dpms(struct drm_connector *connector,
-                                     int mode)
-{
-        struct drm_mode_config *config = &connector->dev->mode_config;
-        struct drm_atomic_state *state;
-        struct drm_crtc_state *crtc_state;
-        struct drm_crtc *crtc;
-        struct drm_connector *tmp_connector;
-        struct drm_connector_list_iter conn_iter;
-        int ret;
-        bool active = false;
-        int old_mode = connector->dpms;
-
-        if (mode != DRM_MODE_DPMS_ON)
-                mode = DRM_MODE_DPMS_OFF;
-
-        connector->dpms = mode;
-        crtc = connector->state->crtc;
-
-        if (!crtc)
-                return 0;
-
-        state = drm_atomic_state_alloc(connector->dev);
-        if (!state)
-                return -ENOMEM;
-
-        state->acquire_ctx = crtc->dev->mode_config.acquire_ctx;
-retry:
-        crtc_state = drm_atomic_get_crtc_state(state, crtc);
-        if (IS_ERR(crtc_state)) {
-                ret = PTR_ERR(crtc_state);
-                goto fail;
-        }
-
-        WARN_ON(!drm_modeset_is_locked(&config->connection_mutex));
-
-        drm_connector_list_iter_begin(connector->dev, &conn_iter);
-        drm_for_each_connector_iter(tmp_connector, &conn_iter) {
-                if (tmp_connector->state->crtc != crtc)
-                        continue;
-
-                if (tmp_connector->dpms == DRM_MODE_DPMS_ON) {
-                        active = true;
-                        break;
-                }
-        }
-        drm_connector_list_iter_end(&conn_iter);
-        crtc_state->active = active;
-
-        ret = drm_atomic_commit(state);
-fail:
-        if (ret == -EDEADLK)
-                goto backoff;
-        if (ret != 0)
-                connector->dpms = old_mode;
-        drm_atomic_state_put(state);
-        return ret;
-
-backoff:
-        drm_atomic_state_clear(state);
-        drm_atomic_legacy_backoff(state);
-
-        goto retry;
-}
-EXPORT_SYMBOL(drm_atomic_helper_connector_dpms);
-
-/**
  * drm_atomic_helper_best_encoder - Helper for
  *      &drm_connector_helper_funcs.best_encoder callback
  * @connector: Connector control structure
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 8072e6e4c62c..ba9f36cef68c 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -717,9 +717,9 @@ DRM_ENUM_NAME_FN(drm_get_tv_subconnector_name,
  *      drivers, it remaps to controlling the "ACTIVE" property on the CRTC the
  *      connector is linked to. Drivers should never set this property directly,
  *      it is handled by the DRM core by calling the &drm_connector_funcs.dpms
- *      callback. Atomic drivers should implement this hook using
- *      drm_atomic_helper_connector_dpms(). This is the only property standard
- *      connector property that userspace can change.
+ *      callback. For atomic drivers the remapping to the "ACTIVE" property is
+ *      implemented in the DRM core.  This is the only standard connector
+ *      property that userspace can change.
  * PATH:
  *      Connector path property to identify how this sink is physically
  *      connected. Used by DP MST. This should be set by calling
@@ -1225,7 +1225,6 @@ int drm_mode_connector_set_obj_prop(struct drm_mode_object *obj,
         } else if (connector->funcs->set_property)
                 ret = connector->funcs->set_property(connector, property, value);
 
-        /* store the property value if successful */
         if (!ret)
                 drm_object_property_set_value(&connector->base, property, value);
         return ret;
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 4afdf7902eda..eab36a460638 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -863,8 +863,7 @@ static int drm_helper_choose_crtc_dpms(struct drm_crtc *crtc)
  * provided by the driver.
  *
  * This function is deprecated.  New drivers must implement atomic modeset
- * support, for which this function is unsuitable. Instead drivers should use
- * drm_atomic_helper_connector_dpms().
+ * support, where DPMS is handled in the DRM core.
  *
  * Returns:
  * Always returns 0.
diff --git a/drivers/gpu/drm/drm_crtc_internal.h b/drivers/gpu/drm/drm_crtc_internal.h
index d077c5490041..a43582076b20 100644
--- a/drivers/gpu/drm/drm_crtc_internal.h
+++ b/drivers/gpu/drm/drm_crtc_internal.h
@@ -178,6 +178,13 @@ struct drm_minor;
 int drm_atomic_debugfs_init(struct drm_minor *minor);
 #endif
 
+int drm_atomic_connector_commit_dpms(struct drm_atomic_state *state,
+                                     struct drm_connector *connector,
+                                     int mode);
+int drm_atomic_set_property(struct drm_atomic_state *state,
+                            struct drm_mode_object *obj,
+                            struct drm_property *prop,
+                            uint64_t prop_value);
 int drm_atomic_get_property(struct drm_mode_object *obj,
                             struct drm_property *property, uint64_t *val);
 int drm_mode_atomic_ioctl(struct drm_device *dev,
diff --git a/drivers/gpu/drm/drm_dumb_buffers.c b/drivers/gpu/drm/drm_dumb_buffers.c
index 10307cc16d75..39ac15ce4702 100644
--- a/drivers/gpu/drm/drm_dumb_buffers.c
+++ b/drivers/gpu/drm/drm_dumb_buffers.c
@@ -24,6 +24,7 @@
  */
 
 #include <drm/drmP.h>
+#include <drm/drm_gem.h>
 
 #include "drm_crtc_internal.h"
 
@@ -42,9 +43,10 @@
  * create dumb buffers suitable for scanout, which can then be used to create
  * KMS frame buffers.
  *
- * To support dumb objects drivers must implement the &drm_driver.dumb_create,
- * &drm_driver.dumb_destroy and &drm_driver.dumb_map_offset operations. See
- * there for further details.
+ * To support dumb objects drivers must implement the &drm_driver.dumb_create
+ * operation. &drm_driver.dumb_destroy defaults to drm_gem_dumb_destroy() if
+ * not set and &drm_driver.dumb_map_offset defaults to
+ * drm_gem_dumb_map_offset(). See the callbacks for further details.
  *
  * Note that dumb objects may not be used for gpu acceleration, as has been
  * attempted on some ARM embedded platforms. Such drivers really must have
@@ -108,11 +110,16 @@ int drm_mode_mmap_dumb_ioctl(struct drm_device *dev,
 {
         struct drm_mode_map_dumb *args = data;
 
-        /* call driver ioctl to get mmap offset */
-        if (!dev->driver->dumb_map_offset)
+        if (!dev->driver->dumb_create)
                 return -ENOSYS;
 
-        return dev->driver->dumb_map_offset(file_priv, dev, args->handle, &args->offset);
+        if (dev->driver->dumb_map_offset)
+                return dev->driver->dumb_map_offset(file_priv, dev,
+                                                    args->handle,
+                                                    &args->offset);
+        else
+                return drm_gem_dumb_map_offset(file_priv, dev, args->handle,
+                                               &args->offset);
 }
 
 int drm_mode_destroy_dumb_ioctl(struct drm_device *dev,
@@ -120,9 +127,12 @@ int drm_mode_destroy_dumb_ioctl(struct drm_device *dev,
 {
         struct drm_mode_destroy_dumb *args = data;
 
-        if (!dev->driver->dumb_destroy)
+        if (!dev->driver->dumb_create)
                 return -ENOSYS;
 
-        return dev->driver->dumb_destroy(file_priv, dev, args->handle);
+        if (dev->driver->dumb_destroy)
+                return dev->driver->dumb_destroy(file_priv, dev, args->handle);
+        else
+                return drm_gem_dumb_destroy(file_priv, dev, args->handle);
 }
 
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 4b968f5b9c85..1b8f013ffa65 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1821,17 +1821,6 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper,
         if (ret < 0)
                 return ret;
 
-        /*
-         * Set the fb pointer - usually drm_setup_crtcs does this for hotplug
-         * events, but at init time drm_setup_crtcs needs to be called before
-         * the fb is allocated (since we need to figure out the desired size of
-         * the fb before we can allocate it ...). Hence we need to fix things up
-         * here again.
-         */
-        for (i = 0; i < fb_helper->crtc_count; i++)
-                if (fb_helper->crtc_info[i].mode_set.num_connectors)
-                        fb_helper->crtc_info[i].mode_set.fb = fb_helper->fb;
-
         return 0;
 }
 
@@ -1893,8 +1882,6 @@ void drm_fb_helper_fill_var(struct fb_info *info, struct drm_fb_helper *fb_helpe
         info->var.xoffset = 0;
         info->var.yoffset = 0;
         info->var.activate = FB_ACTIVATE_NOW;
-        info->var.height = -1;
-        info->var.width = -1;
 
         switch (fb->format->depth) {
         case 8:
@@ -2410,9 +2397,9 @@ static void drm_setup_crtcs(struct drm_fb_helper *fb_helper,
                 struct drm_display_mode *mode = modes[i];
                 struct drm_fb_helper_crtc *fb_crtc = crtcs[i];
                 struct drm_fb_offset *offset = &offsets[i];
-                struct drm_mode_set *modeset = &fb_crtc->mode_set;
 
                 if (mode && fb_crtc) {
+                        struct drm_mode_set *modeset = &fb_crtc->mode_set;
                         struct drm_connector *connector =
                                 fb_helper->connector_info[i]->connector;
 
@@ -2426,7 +2413,6 @@ static void drm_setup_crtcs(struct drm_fb_helper *fb_helper,
                                                            fb_crtc->desired_mode);
                         drm_connector_get(connector);
                         modeset->connectors[modeset->num_connectors++] = connector;
-                        modeset->fb = fb_helper->fb;
                         modeset->x = offset->x;
                         modeset->y = offset->y;
                 }
@@ -2438,6 +2424,37 @@ out:
         kfree(enabled);
 }
 
+/*
+ * This is a continuation of drm_setup_crtcs() that sets up anything related
+ * to the framebuffer. During initialization, drm_setup_crtcs() is called before
+ * the framebuffer has been allocated (fb_helper->fb and fb_helper->fbdev).
+ * So, any setup that touches those fields needs to be done here instead of in
+ * drm_setup_crtcs().
+ */
+static void drm_setup_crtcs_fb(struct drm_fb_helper *fb_helper)
+{
+        struct fb_info *info = fb_helper->fbdev;
+        int i;
+
+        for (i = 0; i < fb_helper->crtc_count; i++)
+                if (fb_helper->crtc_info[i].mode_set.num_connectors)
+                        fb_helper->crtc_info[i].mode_set.fb = fb_helper->fb;
+
+        mutex_lock(&fb_helper->dev->mode_config.mutex);
+        drm_fb_helper_for_each_connector(fb_helper, i) {
+                struct drm_connector *connector =
+                                        fb_helper->connector_info[i]->connector;
+
+                /* use first connected connector for the physical dimensions */
+                if (connector->status == connector_status_connected) {
+                        info->var.width = connector->display_info.width_mm;
+                        info->var.height = connector->display_info.height_mm;
+                        break;
+                }
+        }
+        mutex_unlock(&fb_helper->dev->mode_config.mutex);
+}
+
 /* Note: Drops fb_helper->lock before returning. */
 static int
 __drm_fb_helper_initial_config_and_unlock(struct drm_fb_helper *fb_helper,
@@ -2463,6 +2480,7 @@ __drm_fb_helper_initial_config_and_unlock(struct drm_fb_helper *fb_helper,
 
                 return ret;
         }
+        drm_setup_crtcs_fb(fb_helper);
 
         fb_helper->deferred_setup = false;
 
@@ -2591,6 +2609,7 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)
         DRM_DEBUG_KMS("\n");
 
         drm_setup_crtcs(fb_helper, fb_helper->fb->width, fb_helper->fb->height);
+        drm_setup_crtcs_fb(fb_helper);
         mutex_unlock(&fb_helper->lock);
 
         drm_fb_helper_set_par(fb_helper->fbdev);
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 5df028a6dd9f..a8d396bed6a4 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -311,6 +311,41 @@ drm_gem_handle_delete(struct drm_file *filp, u32 handle)
 EXPORT_SYMBOL(drm_gem_handle_delete);
 
 /**
+ * drm_gem_dumb_map_offset - return the fake mmap offset for a gem object
+ * @file: drm file-private structure containing the gem object
+ * @dev: corresponding drm_device
+ * @handle: gem object handle
+ * @offset: return location for the fake mmap offset
+ *
+ * This implements the &drm_driver.dumb_map_offset kms driver callback for
+ * drivers which use gem to manage their backing storage.
+ *
+ * Returns:
+ * 0 on success or a negative error code on failure.
+ */
+int drm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
+                            u32 handle, u64 *offset)
+{
+        struct drm_gem_object *obj;
+        int ret;
+
+        obj = drm_gem_object_lookup(file, handle);
+        if (!obj)
+                return -ENOENT;
+
+        ret = drm_gem_create_mmap_offset(obj);
+        if (ret)
+                goto out;
+
+        *offset = drm_vma_node_offset_addr(&obj->vma_node);
+out:
+        drm_gem_object_put_unlocked(obj);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(drm_gem_dumb_map_offset);
+
+/**
  * drm_gem_dumb_destroy - dumb fb callback helper for gem based drivers
  * @file: drm file-private structure to remove the dumb handle from
  * @dev: corresponding drm_device
diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
index d9862259a2a7..74f6ff5df656 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -337,6 +337,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
                 return -ENOMEM;
         dev->mode_config.gamma_lut_size_property = prop;
 
+        prop = drm_property_create(dev,
+                                   DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB,
+                                   "IN_FORMATS", 0);
+        if (!prop)
+                return -ENOMEM;
+        dev->mode_config.modifiers_property = prop;
+
         return 0;
 }
 
diff --git a/drivers/gpu/drm/drm_mode_object.c b/drivers/gpu/drm/drm_mode_object.c
index da9a9adbcc98..1055533792f3 100644
--- a/drivers/gpu/drm/drm_mode_object.c
+++ b/drivers/gpu/drm/drm_mode_object.c
@@ -233,6 +233,9 @@ int drm_object_property_set_value(struct drm_mode_object *obj,
 {
         int i;
 
+        WARN_ON(drm_drv_uses_atomic_modeset(property->dev) &&
+                !(property->flags & DRM_MODE_PROP_IMMUTABLE));
+
         for (i = 0; i < obj->properties->count; i++) {
                 if (obj->properties->properties[i] == property) {
                         obj->properties->values[i] = val;
@@ -244,24 +247,7 @@ int drm_object_property_set_value(struct drm_mode_object *obj,
 }
 EXPORT_SYMBOL(drm_object_property_set_value);
 
-/**
- * drm_object_property_get_value - retrieve the value of a property
- * @obj: drm mode object to get property value from
- * @property: property to retrieve
- * @val: storage for the property value
- *
- * This function retrieves the softare state of the given property for the given
- * property. Since there is no driver callback to retrieve the current property
- * value this might be out of sync with the hardware, depending upon the driver
- * and property.
- *
- * Atomic drivers should never call this function directly, the core will read
- * out property values through the various ->atomic_get_property callbacks.
- *
- * Returns:
- * Zero on success, error code on failure.
- */
-int drm_object_property_get_value(struct drm_mode_object *obj,
+int __drm_object_property_get_value(struct drm_mode_object *obj,
                                   struct drm_property *property, uint64_t *val)
 {
         int i;
@@ -284,6 +270,31 @@ int drm_object_property_get_value(struct drm_mode_object *obj,
 
         return -EINVAL;
 }
+
+/**
+ * drm_object_property_get_value - retrieve the value of a property
+ * @obj: drm mode object to get property value from
+ * @property: property to retrieve
+ * @val: storage for the property value
+ *
+ * This function retrieves the softare state of the given property for the given
+ * property. Since there is no driver callback to retrieve the current property
+ * value this might be out of sync with the hardware, depending upon the driver
+ * and property.
+ *
+ * Atomic drivers should never call this function directly, the core will read
+ * out property values through the various ->atomic_get_property callbacks.
+ *
+ * Returns:
+ * Zero on success, error code on failure.
+ */
+int drm_object_property_get_value(struct drm_mode_object *obj,
+                                  struct drm_property *property, uint64_t *val)
+{
+        WARN_ON(drm_drv_uses_atomic_modeset(property->dev));
+
+        return __drm_object_property_get_value(obj, property, val);
+}
 EXPORT_SYMBOL(drm_object_property_get_value);
 
 /* helper for getconnector and getproperties ioctls */
@@ -302,7 +313,7 @@ int drm_mode_object_get_properties(struct drm_mode_object *obj, bool atomic,
                         continue;
 
                 if (*arg_count_props > count) {
-                        ret = drm_object_property_get_value(obj, prop, &val);
+                        ret = __drm_object_property_get_value(obj, prop, &val);
                         if (ret)
                                 return ret;
 
@@ -381,6 +392,83 @@ struct drm_property *drm_mode_obj_find_prop_id(struct drm_mode_object *obj,
         return NULL;
 }
 
+static int set_property_legacy(struct drm_mode_object *obj,
+                               struct drm_property *prop,
+                               uint64_t prop_value)
+{
+        struct drm_device *dev = prop->dev;
+        struct drm_mode_object *ref;
+        int ret = -EINVAL;
+
+        if (!drm_property_change_valid_get(prop, prop_value, &ref))
+                return -EINVAL;
+
+        drm_modeset_lock_all(dev);
+        switch (obj->type) {
+        case DRM_MODE_OBJECT_CONNECTOR:
+                ret = drm_mode_connector_set_obj_prop(obj, prop,
+                                                      prop_value);
+                break;
+        case DRM_MODE_OBJECT_CRTC:
+                ret = drm_mode_crtc_set_obj_prop(obj, prop, prop_value);
+                break;
+        case DRM_MODE_OBJECT_PLANE:
+                ret = drm_mode_plane_set_obj_prop(obj_to_plane(obj),
+                                                  prop, prop_value);
+                break;
+        }
+        drm_property_change_valid_put(prop, ref);
+        drm_modeset_unlock_all(dev);
+
+        return ret;
+}
+
+static int set_property_atomic(struct drm_mode_object *obj,
+                               struct drm_property *prop,
+                               uint64_t prop_value)
+{
+        struct drm_device *dev = prop->dev;
+        struct drm_atomic_state *state;
+        struct drm_modeset_acquire_ctx ctx;
+        int ret;
+
+        drm_modeset_acquire_init(&ctx, 0);
+
+        state = drm_atomic_state_alloc(dev);
+        if (!state)
+                return -ENOMEM;
+        state->acquire_ctx = &ctx;
+retry:
+        if (prop == state->dev->mode_config.dpms_property) {
+                if (obj->type != DRM_MODE_OBJECT_CONNECTOR) {
+                        ret = -EINVAL;
+                        goto out;
+                }
+
+                ret = drm_atomic_connector_commit_dpms(state,
+                                                       obj_to_connector(obj),
+                                                       prop_value);
+        } else {
+                ret = drm_atomic_set_property(state, obj, prop, prop_value);
+                if (ret)
+                        goto out;
+                ret = drm_atomic_commit(state);
+        }
+out:
+        if (ret == -EDEADLK) {
+                drm_atomic_state_clear(state);
+                drm_modeset_backoff(&ctx);
+                goto retry;
+        }
+
+        drm_atomic_state_put(state);
+
+        drm_modeset_drop_locks(&ctx);
+        drm_modeset_acquire_fini(&ctx);
+
+        return ret;
+}
+
 int drm_mode_obj_set_property_ioctl(struct drm_device *dev, void *data,
                                     struct drm_file *file_priv)
 {
@@ -388,18 +476,13 @@ int drm_mode_obj_set_property_ioctl(struct drm_device *dev, void *data,
         struct drm_mode_object *arg_obj;
         struct drm_property *property;
         int ret = -EINVAL;
-        struct drm_mode_object *ref;
 
         if (!drm_core_check_feature(dev, DRIVER_MODESET))
                 return -EINVAL;
 
-        drm_modeset_lock_all(dev);
-
         arg_obj = drm_mode_object_find(dev, arg->obj_id, arg->obj_type);
-        if (!arg_obj) {
-                ret = -ENOENT;
-                goto out;
-        }
+        if (!arg_obj)
+                return -ENOENT;
 
         if (!arg_obj->properties)
                 goto out_unref;
@@ -408,28 +491,12 @@ int drm_mode_obj_set_property_ioctl(struct drm_device *dev, void *data,
         if (!property)
                 goto out_unref;
 
-        if (!drm_property_change_valid_get(property, arg->value, &ref))
-                goto out_unref;
-
-        switch (arg_obj->type) {
-        case DRM_MODE_OBJECT_CONNECTOR:
-                ret = drm_mode_connector_set_obj_prop(arg_obj, property,
-                                                      arg->value);
-                break;
-        case DRM_MODE_OBJECT_CRTC:
-                ret = drm_mode_crtc_set_obj_prop(arg_obj, property, arg->value);
-                break;
-        case DRM_MODE_OBJECT_PLANE:
-                ret = drm_mode_plane_set_obj_prop(obj_to_plane(arg_obj),
-                                                  property, arg->value);
-                break;
-        }
-
-        drm_property_change_valid_put(property, ref);
+        if (drm_drv_uses_atomic_modeset(property->dev))
+                ret = set_property_atomic(arg_obj, property, arg->value);
+        else
+                ret = set_property_legacy(arg_obj, property, arg->value);
 
 out_unref:
         drm_mode_object_put(arg_obj);
-out:
-        drm_modeset_unlock_all(dev);
         return ret;
 }
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index d52f0a17a66b..4a3f68a33844 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1610,7 +1610,7 @@ out:
  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
  * output format
  *
- * @connector: drm connector under action.
+ * @display: display under action
  * @mode: video mode to be tested.
  *
  * Returns:
diff --git a/drivers/gpu/drm/drm_modeset_helper.c b/drivers/gpu/drm/drm_modeset_helper.c
index 2b33825f2f93..9cb1eede0b4d 100644
--- a/drivers/gpu/drm/drm_modeset_helper.c
+++ b/drivers/gpu/drm/drm_modeset_helper.c
@@ -124,6 +124,7 @@ static struct drm_plane *create_primary_plane(struct drm_device *dev)
                                        &drm_primary_helper_funcs,
                                        safe_modeset_formats,
                                        ARRAY_SIZE(safe_modeset_formats),
+                                       NULL,
                                        DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret) {
                 kfree(primary);
diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index 5dc8c4350602..5c14beee52ff 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -62,6 +62,87 @@ static unsigned int drm_num_planes(struct drm_device *dev)
         return num;
 }
 
+static inline u32 *
+formats_ptr(struct drm_format_modifier_blob *blob)
+{
+        return (u32 *)(((char *)blob) + blob->formats_offset);
+}
+
+static inline struct drm_format_modifier *
+modifiers_ptr(struct drm_format_modifier_blob *blob)
+{
+        return (struct drm_format_modifier *)(((char *)blob) + blob->modifiers_offset);
+}
+
+static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane)
+{
+        const struct drm_mode_config *config = &dev->mode_config;
+        struct drm_property_blob *blob;
+        struct drm_format_modifier *mod;
+        size_t blob_size, formats_size, modifiers_size;
+        struct drm_format_modifier_blob *blob_data;
+        unsigned int i, j;
+
+        formats_size = sizeof(__u32) * plane->format_count;
+        if (WARN_ON(!formats_size)) {
+                /* 0 formats are never expected */
+                return 0;
+        }
+
+        modifiers_size =
+                sizeof(struct drm_format_modifier) * plane->modifier_count;
+
+        blob_size = sizeof(struct drm_format_modifier_blob);
+        /* Modifiers offset is a pointer to a struct with a 64 bit field so it
+         * should be naturally aligned to 8B.
+         */
+        BUILD_BUG_ON(sizeof(struct drm_format_modifier_blob) % 8);
+        blob_size += ALIGN(formats_size, 8);
+        blob_size += modifiers_size;
+
+        blob = drm_property_create_blob(dev, blob_size, NULL);
+        if (IS_ERR(blob))
+                return -1;
+
+        blob_data = (struct drm_format_modifier_blob *)blob->data;
+        blob_data->version = FORMAT_BLOB_CURRENT;
+        blob_data->count_formats = plane->format_count;
+        blob_data->formats_offset = sizeof(struct drm_format_modifier_blob);
+        blob_data->count_modifiers = plane->modifier_count;
+
+        blob_data->modifiers_offset =
+                ALIGN(blob_data->formats_offset + formats_size, 8);
+
+        memcpy(formats_ptr(blob_data), plane->format_types, formats_size);
+
+        /* If we can't determine support, just bail */
+        if (!plane->funcs->format_mod_supported)
+                goto done;
+
+        mod = modifiers_ptr(blob_data);
+        for (i = 0; i < plane->modifier_count; i++) {
+                for (j = 0; j < plane->format_count; j++) {
+                        if (plane->funcs->format_mod_supported(plane,
+                                                               plane->format_types[j],
+                                                               plane->modifiers[i])) {
+
+                                mod->formats |= 1 << j;
+                        }
+                }
+
+                mod->modifier = plane->modifiers[i];
+                mod->offset = 0;
+                mod->pad = 0;
+                mod++;
+        }
+
+done:
+        drm_object_attach_property(&plane->base, config->modifiers_property,
+                                   blob->base.id);
+
+        return 0;
+}
+
 /**
  * drm_universal_plane_init - Initialize a new universal plane object
  * @dev: DRM device
@@ -70,6 +151,8 @@ static unsigned int drm_num_planes(struct drm_device *dev)
  * @funcs: callbacks for the new plane
  * @formats: array of supported formats (DRM_FORMAT\_\*)
  * @format_count: number of elements in @formats
+ * @format_modifiers: array of struct drm_format modifiers terminated by
+ *                    DRM_FORMAT_MOD_INVALID
  * @type: type of plane (overlay, primary, cursor)
  * @name: printf style format string for the plane name, or NULL for default name
  *
@@ -82,10 +165,12 @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,
                              uint32_t possible_crtcs,
                              const struct drm_plane_funcs *funcs,
                              const uint32_t *formats, unsigned int format_count,
+                             const uint64_t *format_modifiers,
                              enum drm_plane_type type,
                              const char *name, ...)
 {
         struct drm_mode_config *config = &dev->mode_config;
+        unsigned int format_modifier_count = 0;
         int ret;
 
         ret = drm_mode_object_add(dev, &plane->base, DRM_MODE_OBJECT_PLANE);
@@ -105,6 +190,31 @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,
                 return -ENOMEM;
         }
 
+        /*
+         * First driver to need more than 64 formats needs to fix this. Each
+         * format is encoded as a bit and the current code only supports a u64.
+         */
+        if (WARN_ON(format_count > 64))
+                return -EINVAL;
+
+        if (format_modifiers) {
+                const uint64_t *temp_modifiers = format_modifiers;
+                while (*temp_modifiers++ != DRM_FORMAT_MOD_INVALID)
+                        format_modifier_count++;
+        }
+
+        plane->modifier_count = format_modifier_count;
+        plane->modifiers = kmalloc_array(format_modifier_count,
+                                         sizeof(format_modifiers[0]),
+                                         GFP_KERNEL);
+
+        if (format_modifier_count && !plane->modifiers) {
+                DRM_DEBUG_KMS("out of memory when allocating plane\n");
+                kfree(plane->format_types);
+                drm_mode_object_unregister(dev, &plane->base);
+                return -ENOMEM;
+        }
+
         if (name) {
                 va_list ap;
 
@@ -117,12 +227,15 @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,
         }
         if (!plane->name) {
                 kfree(plane->format_types);
+                kfree(plane->modifiers);
                 drm_mode_object_unregister(dev, &plane->base);
                 return -ENOMEM;
         }
 
         memcpy(plane->format_types, formats, format_count * sizeof(uint32_t));
         plane->format_count = format_count;
+        memcpy(plane->modifiers, format_modifiers,
+               format_modifier_count * sizeof(format_modifiers[0]));
         plane->possible_crtcs = possible_crtcs;
         plane->type = type;
 
@@ -149,6 +262,9 @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane,
                 drm_object_attach_property(&plane->base, config->prop_src_h, 0);
         }
 
+        if (config->allow_fb_modifiers)
+                create_in_format_blob(dev, plane);
+
         return 0;
 }
 EXPORT_SYMBOL(drm_universal_plane_init);
@@ -205,7 +321,8 @@ int drm_plane_init(struct drm_device *dev, struct drm_plane *plane,
 
         type = is_primary ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
         return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
-                                        formats, format_count, type, NULL);
+                                        formats, format_count,
+                                        NULL, type, NULL);
 }
 EXPORT_SYMBOL(drm_plane_init);
 
@@ -224,6 +341,7 @@ void drm_plane_cleanup(struct drm_plane *plane)
         drm_modeset_lock_fini(&plane->mutex);
 
         kfree(plane->format_types);
+        kfree(plane->modifiers);
         drm_mode_object_unregister(dev, &plane->base);
 
         BUG_ON(list_empty(&plane->head));
diff --git a/drivers/gpu/drm/drm_scdc_helper.c b/drivers/gpu/drm/drm_scdc_helper.c
index 3cd96a95736d..7d1b0f011d33 100644
--- a/drivers/gpu/drm/drm_scdc_helper.c
+++ b/drivers/gpu/drm/drm_scdc_helper.c
@@ -194,19 +194,26 @@ EXPORT_SYMBOL(drm_scdc_set_scrambling);
  * @adapter: I2C adapter for DDC channel
  * @set: ret or reset the high clock ratio
  *
- * TMDS clock ratio calculations go like this:
- * TMDS character = 10 bit TMDS encoded value
- * TMDS character rate = The rate at which TMDS characters are transmitted(Mcsc)
- * TMDS bit rate = 10x TMDS character rate
- * As per the spec:
- * TMDS clock rate for pixel clock < 340 MHz = 1x the character rate
- *      = 1/10 pixel clock rate
- * TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate
- *      = 1/40 pixel clock rate
- *
- * Writes to the TMDS config register over SCDC channel, and:
- * sets TMDS clock ratio to 1/40 when set = 1
- * sets TMDS clock ratio to 1/10 when set = 0
+ *
+ *      TMDS clock ratio calculations go like this:
+ *              TMDS character = 10 bit TMDS encoded value
+ *
+ *              TMDS character rate = The rate at which TMDS characters are
+ *              transmitted (Mcsc)
+ *
+ *              TMDS bit rate = 10x TMDS character rate
+ *
+ *      As per the spec:
+ *              TMDS clock rate for pixel clock < 340 MHz = 1x the character
+ *              rate = 1/10 pixel clock rate
+ *
+ *              TMDS clock rate for pixel clock > 340 MHz = 0.25x the character
+ *              rate = 1/40 pixel clock rate
+ *
+ *      Writes to the TMDS config register over SCDC channel, and:
+ *              sets TMDS clock ratio to 1/40 when set = 1
+ *
+ *              sets TMDS clock ratio to 1/10 when set = 0
  *
  * Returns:
  * True if write is successful, false otherwise.
diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c b/drivers/gpu/drm/drm_simple_kms_helper.c
index 39c203ad59db..dc9fd109de14 100644
--- a/drivers/gpu/drm/drm_simple_kms_helper.c
+++ b/drivers/gpu/drm/drm_simple_kms_helper.c
@@ -199,6 +199,7 @@ EXPORT_SYMBOL(drm_simple_display_pipe_attach_bridge);
  * @funcs: callbacks for the display pipe (optional)
  * @formats: array of supported formats (DRM_FORMAT\_\*)
  * @format_count: number of elements in @formats
+ * @format_modifiers: array of formats modifiers
  * @connector: connector to attach and register (optional)
  *
  * Sets up a display pipeline which consist of a really simple
@@ -219,6 +220,7 @@ int drm_simple_display_pipe_init(struct drm_device *dev,
                         struct drm_simple_display_pipe *pipe,
                         const struct drm_simple_display_pipe_funcs *funcs,
                         const uint32_t *formats, unsigned int format_count,
+                        const uint64_t *format_modifiers,
                         struct drm_connector *connector)
 {
         struct drm_encoder *encoder = &pipe->encoder;
@@ -233,6 +235,7 @@ int drm_simple_display_pipe_init(struct drm_device *dev,
         ret = drm_universal_plane_init(dev, plane, 0,
                                        &drm_simple_kms_plane_funcs,
                                        formats, format_count,
+                                       format_modifiers,
                                        DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret)
                 return ret;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dpi.c b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
index 63abcd280fa0..76d80e5de521 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dpi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
@@ -59,7 +59,6 @@ static void exynos_dpi_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs exynos_dpi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = exynos_dpi_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = exynos_dpi_connector_destroy,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index f580be170089..4ea7cc7cb3de 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -1537,7 +1537,6 @@ static void exynos_dsi_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs exynos_dsi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = exynos_dsi_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = exynos_dsi_connector_destroy,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 611b6fd65433..8de74009dee4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -173,7 +173,6 @@ static struct drm_plane_funcs exynos_plane_funcs = {
         .update_plane   = drm_atomic_helper_update_plane,
         .disable_plane  = drm_atomic_helper_disable_plane,
         .destroy        = drm_plane_cleanup,
-        .set_property   = drm_atomic_helper_plane_set_property,
         .reset          = exynos_drm_plane_reset,
         .atomic_duplicate_state = exynos_drm_plane_duplicate_state,
         .atomic_destroy_state = exynos_drm_plane_destroy_state,
@@ -283,7 +282,7 @@ int exynos_plane_init(struct drm_device *dev,
                                        &exynos_plane_funcs,
                                        config->pixel_formats,
                                        config->num_pixel_formats,
-                                       config->type, NULL);
+                                       NULL, config->type, NULL);
         if (err) {
                 DRM_ERROR("failed to initialize plane\n");
                 return err;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index cb8a72842537..9186a654c3b5 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
@@ -289,7 +289,6 @@ static void vidi_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs vidi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = vidi_detect,
         .destroy = vidi_connector_destroy,
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index c953927fb0cb..0e2a472c3021 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -835,7 +835,6 @@ static void hdmi_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = hdmi_detect,
         .destroy = hdmi_connector_destroy,
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index 5cbde196895a..58e9e0601a61 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -176,8 +176,6 @@ static struct drm_driver fsl_dcu_drm_driver = {
         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
         .dumb_create            = drm_gem_cma_dumb_create,
-        .dumb_map_offset        = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy           = drm_gem_dumb_destroy,
         .fops                   = &fsl_dcu_drm_fops,
         .name                   = "fsl-dcu-drm",
         .desc                   = "Freescale DCU DRM",
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
index 0a20723aa6e1..9554b245746e 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
@@ -224,7 +224,7 @@ struct drm_plane *fsl_dcu_drm_primary_create_plane(struct drm_device *dev)
                                        &fsl_dcu_drm_plane_funcs,
                                        fsl_dcu_drm_plane_formats,
                                        ARRAY_SIZE(fsl_dcu_drm_plane_formats),
-                                       DRM_PLANE_TYPE_PRIMARY, NULL);
+                                       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret) {
                 kfree(primary);
                 primary = NULL;
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
index dcbf3c06e1d8..edd7d8127d19 100644
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c
@@ -63,7 +63,6 @@ static const struct drm_connector_funcs fsl_dcu_drm_connector_funcs = {
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
         .destroy = fsl_dcu_drm_connector_destroy,
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .reset = drm_atomic_helper_connector_reset,
 };
diff --git a/drivers/gpu/drm/gma500/framebuffer.c b/drivers/gpu/drm/gma500/framebuffer.c
index 7da70b6c83f0..2570c7f647a6 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -479,26 +479,6 @@ static struct drm_framebuffer *psb_user_framebuffer_create
         return psb_framebuffer_create(dev, cmd, r);
 }
 
-static void psbfb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                                                        u16 blue, int regno)
-{
-        struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-
-        gma_crtc->lut_r[regno] = red >> 8;
-        gma_crtc->lut_g[regno] = green >> 8;
-        gma_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void psbfb_gamma_get(struct drm_crtc *crtc, u16 *red,
-                                        u16 *green, u16 *blue, int regno)
-{
-        struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-
-        *red = gma_crtc->lut_r[regno] << 8;
-        *green = gma_crtc->lut_g[regno] << 8;
-        *blue = gma_crtc->lut_b[regno] << 8;
-}
-
 static int psbfb_probe(struct drm_fb_helper *helper,
                                 struct drm_fb_helper_surface_size *sizes)
 {
@@ -525,8 +505,6 @@ static int psbfb_probe(struct drm_fb_helper *helper,
 }
 
 static const struct drm_fb_helper_funcs psb_fb_helper_funcs = {
-        .gamma_set = psbfb_gamma_set,
-        .gamma_get = psbfb_gamma_get,
         .fb_probe = psbfb_probe,
 };
 
diff --git a/drivers/gpu/drm/gma500/gma_display.c b/drivers/gpu/drm/gma500/gma_display.c
index e7fd356acf2e..f3c48a2be71b 100644
--- a/drivers/gpu/drm/gma500/gma_display.c
+++ b/drivers/gpu/drm/gma500/gma_display.c
@@ -144,33 +144,32 @@ void gma_crtc_load_lut(struct drm_crtc *crtc)
         struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
         const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
         int palreg = map->palette;
+        u16 *r, *g, *b;
         int i;
 
         /* The clocks have to be on to load the palette. */
         if (!crtc->enabled)
                 return;
 
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
+
         if (gma_power_begin(dev, false)) {
                 for (i = 0; i < 256; i++) {
                         REG_WRITE(palreg + 4 * i,
-                                  ((gma_crtc->lut_r[i] +
-                                  gma_crtc->lut_adj[i]) << 16) |
-                                  ((gma_crtc->lut_g[i] +
-                                  gma_crtc->lut_adj[i]) << 8) |
-                                  (gma_crtc->lut_b[i] +
-                                  gma_crtc->lut_adj[i]));
+                                  (((*r++ >> 8) + gma_crtc->lut_adj[i]) << 16) |
+                                  (((*g++ >> 8) + gma_crtc->lut_adj[i]) << 8) |
+                                  ((*b++ >> 8) + gma_crtc->lut_adj[i]));
                 }
                 gma_power_end(dev);
         } else {
                 for (i = 0; i < 256; i++) {
                         /* FIXME: Why pipe[0] and not pipe[..._crtc->pipe]? */
                         dev_priv->regs.pipe[0].palette[i] =
-                                  ((gma_crtc->lut_r[i] +
-                                  gma_crtc->lut_adj[i]) << 16) |
-                                  ((gma_crtc->lut_g[i] +
-                                  gma_crtc->lut_adj[i]) << 8) |
-                                  (gma_crtc->lut_b[i] +
-                                  gma_crtc->lut_adj[i]);
+                                (((*r++ >> 8) + gma_crtc->lut_adj[i]) << 16) |
+                                (((*g++ >> 8) + gma_crtc->lut_adj[i]) << 8) |
+                                ((*b++ >> 8) + gma_crtc->lut_adj[i]);
                 }
 
         }
@@ -180,15 +179,6 @@ int gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue,
                        u32 size,
                        struct drm_modeset_acquire_ctx *ctx)
 {
-        struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-        int i;
-
-        for (i = 0; i < size; i++) {
-                gma_crtc->lut_r[i] = red[i] >> 8;
-                gma_crtc->lut_g[i] = green[i] >> 8;
-                gma_crtc->lut_b[i] = blue[i] >> 8;
-        }
-
         gma_crtc_load_lut(crtc);
 
         return 0;
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c b/drivers/gpu/drm/gma500/psb_intel_display.c
index 7b6c84925098..8762efaef283 100644
--- a/drivers/gpu/drm/gma500/psb_intel_display.c
+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
@@ -518,13 +518,8 @@ void psb_intel_crtc_init(struct drm_device *dev, int pipe,
         gma_crtc->pipe = pipe;
         gma_crtc->plane = pipe;
 
-        for (i = 0; i < 256; i++) {
-                gma_crtc->lut_r[i] = i;
-                gma_crtc->lut_g[i] = i;
-                gma_crtc->lut_b[i] = i;
-
+        for (i = 0; i < 256; i++)
                 gma_crtc->lut_adj[i] = 0;
-        }
 
         gma_crtc->mode_dev = mode_dev;
         gma_crtc->cursor_addr = 0;
diff --git a/drivers/gpu/drm/gma500/psb_intel_drv.h b/drivers/gpu/drm/gma500/psb_intel_drv.h
index 6a10215fc42d..e8e4ea14b12b 100644
--- a/drivers/gpu/drm/gma500/psb_intel_drv.h
+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
@@ -172,7 +172,6 @@ struct gma_crtc {
         int plane;
         uint32_t cursor_addr;
         struct gtt_range *cursor_gt;
-        u8 lut_r[256], lut_g[256], lut_b[256];
         u8 lut_adj[256];
         struct psb_intel_framebuffer *fbdev_fb;
         /* a mode_set for fbdev users on this crtc */
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index 54a4542a40f1..a956545774a3 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -150,7 +150,6 @@ static const u32 channel_formats1[] = {
 static struct drm_plane_funcs hibmc_plane_funcs = {
         .update_plane   = drm_atomic_helper_update_plane,
         .disable_plane  = drm_atomic_helper_disable_plane,
-        .set_property = drm_atomic_helper_plane_set_property,
         .destroy = drm_plane_cleanup,
         .reset = drm_atomic_helper_plane_reset,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
@@ -181,6 +180,7 @@ static struct drm_plane *hibmc_plane_init(struct hibmc_drm_private *priv)
         ret = drm_universal_plane_init(dev, plane, 1, &hibmc_plane_funcs,
                                        channel_formats1,
                                        ARRAY_SIZE(channel_formats1),
+                                       NULL,
                                        DRM_PLANE_TYPE_PRIMARY,
                                        NULL);
         if (ret) {
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 4d018ca98581..d4f6f1f9df5b 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -67,7 +67,6 @@ static struct drm_driver hibmc_driver = {
         .gem_free_object_unlocked = hibmc_gem_free_object,
         .dumb_create            = hibmc_dumb_create,
         .dumb_map_offset        = hibmc_dumb_mmap_offset,
-        .dumb_destroy           = drm_gem_dumb_destroy,
         .irq_handler            = hibmc_drm_interrupt,
 };
 
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
index 12a18557c5fd..ec4dd9df9150 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
@@ -47,7 +47,6 @@ static const struct drm_connector_helper_funcs
 };
 
 static const struct drm_connector_funcs hibmc_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
index 706efd0c4190..39f7d15673ed 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
@@ -567,7 +567,6 @@ static const struct drm_crtc_funcs ade_crtc_funcs = {
         .set_config     = drm_atomic_helper_set_config,
         .page_flip      = drm_atomic_helper_page_flip,
         .reset          = drm_atomic_helper_crtc_reset,
-        .set_property = drm_atomic_helper_crtc_set_property,
         .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
         .atomic_destroy_state   = drm_atomic_helper_crtc_destroy_state,
         .enable_vblank  = ade_crtc_enable_vblank,
@@ -890,7 +889,6 @@ static const struct drm_plane_helper_funcs ade_plane_helper_funcs = {
 static struct drm_plane_funcs ade_plane_funcs = {
         .update_plane   = drm_atomic_helper_update_plane,
         .disable_plane  = drm_atomic_helper_disable_plane,
-        .set_property = drm_atomic_helper_plane_set_property,
         .destroy = drm_plane_cleanup,
         .reset = drm_atomic_helper_plane_reset,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
@@ -910,7 +908,7 @@ static int ade_plane_init(struct drm_device *dev, struct ade_plane *aplane,
                 return ret;
 
         ret = drm_universal_plane_init(dev, &aplane->base, 1, &ade_plane_funcs,
-                                       fmts, fmts_cnt, type, NULL);
+                                       fmts, fmts_cnt, NULL, type, NULL);
         if (ret) {
                 DRM_ERROR("fail to init plane, ch=%d\n", aplane->ch);
                 return ret;
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c
index d1e7ac540199..54e3255dde13 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -969,14 +969,6 @@ static int tda998x_audio_codec_init(struct tda998x_priv *priv,
 
 /* DRM connector functions */
 
-static int tda998x_connector_dpms(struct drm_connector *connector, int mode)
-{
-        if (drm_core_check_feature(connector->dev, DRIVER_ATOMIC))
-                return drm_atomic_helper_connector_dpms(connector, mode);
-        else
-                return drm_helper_connector_dpms(connector, mode);
-}
-
 static int tda998x_connector_fill_modes(struct drm_connector *connector,
                                         uint32_t maxX, uint32_t maxY)
 {
@@ -1014,7 +1006,7 @@ static void tda998x_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs tda998x_connector_funcs = {
-        .dpms = tda998x_connector_dpms,
+        .dpms = drm_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .fill_modes = tda998x_connector_fill_modes,
         .detect = tda998x_connector_detect,
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d310d8245dca..4c96a7214482 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2755,7 +2755,6 @@ static struct drm_driver driver = {
 
         .dumb_create = i915_gem_dumb_create,
         .dumb_map_offset = i915_gem_mmap_gtt,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .ioctls = i915_ioctls,
         .num_ioctls = ARRAY_SIZE(i915_ioctls),
         .fops = &i915_driver_fops,
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 84a1f5e85153..70e0ff41070c 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -802,12 +802,10 @@ void intel_crt_reset(struct drm_encoder *encoder)
  */
 
 static const struct drm_connector_funcs intel_crt_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .late_register = intel_connector_register,
         .early_unregister = intel_connector_unregister,
         .destroy = intel_crt_destroy,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 };
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e92fd14c06c7..684d653bfddb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13323,7 +13323,6 @@ static int intel_atomic_commit(struct drm_device *dev,
 static const struct drm_crtc_funcs intel_crtc_funcs = {
         .gamma_set = drm_atomic_helper_legacy_gamma_set,
         .set_config = drm_atomic_helper_set_config,
-        .set_property = drm_atomic_helper_crtc_set_property,
         .destroy = intel_crtc_destroy,
         .page_flip = drm_atomic_helper_page_flip,
         .atomic_duplicate_state = intel_crtc_duplicate_state,
@@ -13600,7 +13599,6 @@ const struct drm_plane_funcs intel_plane_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
         .destroy = intel_plane_destroy,
-        .set_property = drm_atomic_helper_plane_set_property,
         .atomic_get_property = intel_plane_atomic_get_property,
         .atomic_set_property = intel_plane_atomic_set_property,
         .atomic_duplicate_state = intel_plane_duplicate_state,
@@ -13735,7 +13733,6 @@ static const struct drm_plane_funcs intel_cursor_plane_funcs = {
         .update_plane = intel_legacy_cursor_update,
         .disable_plane = drm_atomic_helper_disable_plane,
         .destroy = intel_plane_destroy,
-        .set_property = drm_atomic_helper_plane_set_property,
         .atomic_get_property = intel_plane_atomic_get_property,
         .atomic_set_property = intel_plane_atomic_set_property,
         .atomic_duplicate_state = intel_plane_duplicate_state,
@@ -13809,18 +13806,21 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
                 ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,
                                                0, &intel_plane_funcs,
                                                intel_primary_formats, num_formats,
+                                               NULL,
                                                DRM_PLANE_TYPE_PRIMARY,
                                                "plane 1%c", pipe_name(pipe));
         else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
                 ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,
                                                0, &intel_plane_funcs,
                                                intel_primary_formats, num_formats,
+                                               NULL,
                                                DRM_PLANE_TYPE_PRIMARY,
                                                "primary %c", pipe_name(pipe));
         else
                 ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,
                                                0, &intel_plane_funcs,
                                                intel_primary_formats, num_formats,
+                                               NULL,
                                                DRM_PLANE_TYPE_PRIMARY,
                                                "plane %c", plane_name(primary->plane));
         if (ret)
@@ -13906,7 +13906,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
                                        0, &intel_cursor_plane_funcs,
                                        intel_cursor_formats,
                                        ARRAY_SIZE(intel_cursor_formats),
-                                       DRM_PLANE_TYPE_CURSOR,
+                                       NULL, DRM_PLANE_TYPE_CURSOR,
                                        "cursor %c", pipe_name(pipe));
         if (ret)
                 goto fail;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2d42d09428c9..76c8a0bd17f9 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5007,10 +5007,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
 }
 
 static const struct drm_connector_funcs intel_dp_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .force = intel_dp_force,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_get_property = intel_digital_connector_atomic_get_property,
         .atomic_set_property = intel_digital_connector_atomic_set_property,
         .late_register = intel_dp_connector_register,
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index e4ea968b1d6b..58568559711a 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -346,10 +346,8 @@ intel_dp_mst_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = intel_dp_mst_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .late_register = intel_connector_register,
         .early_unregister = intel_connector_unregister,
         .destroy = intel_dp_mst_connector_destroy,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d17a32437f07..210a8c63bde8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -786,7 +786,6 @@ struct intel_crtc {
         struct drm_crtc base;
         enum pipe pipe;
         enum plane plane;
-        u8 lut_r[256], lut_g[256], lut_b[256];
         /*
          * Whether the crtc and the connected output pipeline is active. Implies
          * that crtc->enabled is set, i.e. the current mode configuration has
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 50ec836da8b1..b0b3adf016f8 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1653,12 +1653,10 @@ static const struct drm_connector_helper_funcs intel_dsi_connector_helper_funcs
 };
 
 static const struct drm_connector_funcs intel_dsi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .late_register = intel_connector_register,
         .early_unregister = intel_connector_unregister,
         .destroy = intel_dsi_connector_destroy,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_get_property = intel_digital_connector_atomic_get_property,
         .atomic_set_property = intel_digital_connector_atomic_set_property,
         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index c1544a53095d..baf369d2de30 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -344,13 +344,11 @@ static void intel_dvo_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = intel_dvo_detect,
         .late_register = intel_connector_register,
         .early_unregister = intel_connector_unregister,
         .destroy = intel_dvo_destroy,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 };
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index b953365a3eec..0986ca4f16f1 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -280,27 +280,6 @@ out_unlock:
         return ret;
 }
 
-/** Sets the color ramps on behalf of RandR */
-static void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                                    u16 blue, int regno)
-{
-        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
-        intel_crtc->lut_r[regno] = red >> 8;
-        intel_crtc->lut_g[regno] = green >> 8;
-        intel_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                                    u16 *blue, int regno)
-{
-        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
-        *red = intel_crtc->lut_r[regno] << 8;
-        *green = intel_crtc->lut_g[regno] << 8;
-        *blue = intel_crtc->lut_b[regno] << 8;
-}
-
 static struct drm_fb_helper_crtc *
 intel_fb_helper_crtc(struct drm_fb_helper *fb_helper, struct drm_crtc *crtc)
 {
@@ -375,7 +354,6 @@ retry:
                 struct drm_connector *connector;
                 struct drm_encoder *encoder;
                 struct drm_fb_helper_crtc *new_crtc;
-                struct intel_crtc *intel_crtc;
 
                 fb_conn = fb_helper->connector_info[i];
                 connector = fb_conn->connector;
@@ -417,13 +395,6 @@ retry:
 
                 num_connectors_enabled++;
 
-                intel_crtc = to_intel_crtc(connector->state->crtc);
-                for (j = 0; j < 256; j++) {
-                        intel_crtc->lut_r[j] = j;
-                        intel_crtc->lut_g[j] = j;
-                        intel_crtc->lut_b[j] = j;
-                }
-
                 new_crtc = intel_fb_helper_crtc(fb_helper,
                                                 connector->state->crtc);
 
@@ -526,8 +497,6 @@ bail:
 
 static const struct drm_fb_helper_funcs intel_fb_helper_funcs = {
         .initial_config = intel_fb_initial_config,
-        .gamma_set = intel_crtc_fb_gamma_set,
-        .gamma_get = intel_crtc_fb_gamma_get,
         .fb_probe = intelfb_create,
 };
 
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 2f831cfdd243..eb0c559b66c1 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1706,11 +1706,9 @@ static void intel_hdmi_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = intel_hdmi_detect,
         .force = intel_hdmi_force,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_get_property = intel_digital_connector_atomic_get_property,
         .atomic_set_property = intel_digital_connector_atomic_set_property,
         .late_register = intel_connector_register,
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 6fe5d7c3bc23..61d557948e21 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -595,10 +595,8 @@ static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs
 };
 
 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = intel_lvds_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_get_property = intel_digital_connector_atomic_get_property,
         .atomic_set_property = intel_digital_connector_atomic_set_property,
         .late_register = intel_connector_register,
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index e58a47db9a9d..bea8152ae859 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -2193,10 +2193,8 @@ intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = intel_sdvo_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
         .late_register = intel_sdvo_connector_register,
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 94f9a1332dbf..4c6b387fa9dc 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1171,13 +1171,13 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
                 ret = drm_universal_plane_init(&dev_priv->drm, &intel_plane->base,
                                                possible_crtcs, &intel_plane_funcs,
                                                plane_formats, num_plane_formats,
-                                               DRM_PLANE_TYPE_OVERLAY,
+                                               NULL, DRM_PLANE_TYPE_OVERLAY,
                                                "plane %d%c", plane + 2, pipe_name(pipe));
         else
                 ret = drm_universal_plane_init(&dev_priv->drm, &intel_plane->base,
                                                possible_crtcs, &intel_plane_funcs,
                                                plane_formats, num_plane_formats,
-                                               DRM_PLANE_TYPE_OVERLAY,
+                                               NULL, DRM_PLANE_TYPE_OVERLAY,
                                                "sprite %c", sprite_name(pipe, plane));
         if (ret)
                 goto fail;
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 784df024e230..906893c006d8 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1407,11 +1407,9 @@ intel_tv_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs intel_tv_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .late_register = intel_connector_register,
         .early_unregister = intel_connector_unregister,
         .destroy = intel_tv_destroy,
-        .set_property = drm_atomic_helper_connector_set_property,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c
index f5c621219113..f91cb72d0830 100644
--- a/drivers/gpu/drm/imx/imx-drm-core.c
+++ b/drivers/gpu/drm/imx/imx-drm-core.c
@@ -182,8 +182,6 @@ static struct drm_driver imx_drm_driver = {
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops             = &drm_gem_cma_vm_ops,
         .dumb_create            = drm_gem_cma_dumb_create,
-        .dumb_map_offset        = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy           = drm_gem_dumb_destroy,
 
         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index 8b05ecb8fdef..56dd7a9a8e25 100644
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -389,7 +389,6 @@ static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 
 
 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = imx_drm_connector_destroy,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/imx/imx-tve.c b/drivers/gpu/drm/imx/imx-tve.c
index 4826bb781723..bc27c2699464 100644
--- a/drivers/gpu/drm/imx/imx-tve.c
+++ b/drivers/gpu/drm/imx/imx-tve.c
@@ -341,7 +341,6 @@ static int imx_tve_atomic_check(struct drm_encoder *encoder,
 }
 
 static const struct drm_connector_funcs imx_tve_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = imx_drm_connector_destroy,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 0847cc0d96a4..debde2dae7bf 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -718,8 +718,8 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
 
         ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
                                        &ipu_plane_funcs, ipu_plane_formats,
-                                       ARRAY_SIZE(ipu_plane_formats), type,
-                                       NULL);
+                                       ARRAY_SIZE(ipu_plane_formats),
+                                       NULL, type, NULL);
         if (ret) {
                 DRM_ERROR("failed to initialize plane\n");
                 kfree(ipu_plane);
diff --git a/drivers/gpu/drm/imx/parallel-display.c b/drivers/gpu/drm/imx/parallel-display.c
index 8aca20209cb8..8def97d75030 100644
--- a/drivers/gpu/drm/imx/parallel-display.c
+++ b/drivers/gpu/drm/imx/parallel-display.c
@@ -135,7 +135,6 @@ static int imx_pd_encoder_atomic_check(struct drm_encoder *encoder,
 }
 
 static const struct drm_connector_funcs imx_pd_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = imx_drm_connector_destroy,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index f0cb2765e212..a2ca90fc403c 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -293,8 +293,6 @@ static struct drm_driver mtk_drm_driver = {
         .gem_free_object_unlocked = mtk_drm_gem_free_object,
         .gem_vm_ops = &drm_gem_cma_vm_ops,
         .dumb_create = mtk_drm_gem_dumb_create,
-        .dumb_map_offset = mtk_drm_gem_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
 
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
index 7abc550ebc00..8ec963fff8b1 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_gem.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
@@ -131,31 +131,6 @@ err_handle_create:
         return ret;
 }
 
-int mtk_drm_gem_dumb_map_offset(struct drm_file *file_priv,
-                                struct drm_device *dev, uint32_t handle,
-                                uint64_t *offset)
-{
-        struct drm_gem_object *obj;
-        int ret;
-
-        obj = drm_gem_object_lookup(file_priv, handle);
-        if (!obj) {
-                DRM_ERROR("failed to lookup gem object.\n");
-                return -EINVAL;
-        }
-
-        ret = drm_gem_create_mmap_offset(obj);
-        if (ret)
-                goto out;
-
-        *offset = drm_vma_node_offset_addr(&obj->vma_node);
-        DRM_DEBUG_KMS("offset = 0x%llx\n", *offset);
-
-out:
-        drm_gem_object_unreference_unlocked(obj);
-        return ret;
-}
-
 static int mtk_drm_gem_object_mmap(struct drm_gem_object *obj,
                                    struct vm_area_struct *vma)
 
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.h b/drivers/gpu/drm/mediatek/mtk_drm_gem.h
index 2752718fa5b2..534639b43a1c 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_gem.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.h
@@ -46,9 +46,6 @@ struct mtk_drm_gem_obj *mtk_drm_gem_create(struct drm_device *dev, size_t size,
                                            bool alloc_kmap);
 int mtk_drm_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
                             struct drm_mode_create_dumb *args);
-int mtk_drm_gem_dumb_map_offset(struct drm_file *file_priv,
-                                struct drm_device *dev, uint32_t handle,
-                                uint64_t *offset);
 int mtk_drm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
 int mtk_drm_gem_mmap_buf(struct drm_gem_object *obj,
                          struct vm_area_struct *vma);
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index 1a59b9ab4aa8..6f121891430f 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -175,7 +175,7 @@ int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
 
         err = drm_universal_plane_init(dev, plane, possible_crtcs,
                                        &mtk_plane_funcs, formats,
-                                       ARRAY_SIZE(formats), type, NULL);
+                                       ARRAY_SIZE(formats), NULL, type, NULL);
         if (err) {
                 DRM_ERROR("failed to initialize plane\n");
                 return err;
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index a31bd2a82de5..7e5e24c2152a 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -766,7 +766,6 @@ static const struct drm_encoder_helper_funcs mtk_dsi_encoder_helper_funcs = {
 };
 
 static const struct drm_connector_funcs mtk_dsi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c
index f2437cd1e0f9..690c67507cbc 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
@@ -1261,7 +1261,6 @@ static struct drm_encoder *mtk_hdmi_conn_best_enc(struct drm_connector *conn)
 }
 
 static const struct drm_connector_funcs mtk_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = hdmi_conn_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = hdmi_conn_destroy,
diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
index a32d3b6e2e12..17e96fa47868 100644
--- a/drivers/gpu/drm/meson/meson_plane.c
+++ b/drivers/gpu/drm/meson/meson_plane.c
@@ -223,6 +223,7 @@ int meson_plane_create(struct meson_drm *priv)
                                  &meson_plane_funcs,
                                  supported_drm_formats,
                                  ARRAY_SIZE(supported_drm_formats),
+                                 NULL,
                                  DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane");
 
         drm_plane_helper_add(plane, &meson_plane_helper_funcs);
diff --git a/drivers/gpu/drm/meson/meson_venc_cvbs.c b/drivers/gpu/drm/meson/meson_venc_cvbs.c
index 00775b397dba..79d95ca8a0c0 100644
--- a/drivers/gpu/drm/meson/meson_venc_cvbs.c
+++ b/drivers/gpu/drm/meson/meson_venc_cvbs.c
@@ -118,7 +118,6 @@ static int meson_cvbs_connector_mode_valid(struct drm_connector *connector,
 }
 
 static const struct drm_connector_funcs meson_cvbs_connector_funcs = {
-        .dpms                   = drm_atomic_helper_connector_dpms,
         .detect                 = meson_cvbs_connector_detect,
         .fill_modes             = drm_helper_probe_single_connector_modes,
         .destroy                = meson_cvbs_connector_destroy,
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h
index c88b6ec88dd2..04f1dfba12e5 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -237,11 +237,6 @@ mgag200_bo(struct ttm_buffer_object *bo)
 {
         return container_of(bo, struct mgag200_bo, bo);
 }
-                                /* mgag200_crtc.c */
-void mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                             u16 blue, int regno);
-void mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                             u16 *blue, int regno);
 
                                 /* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
diff --git a/drivers/gpu/drm/mgag200/mgag200_fb.c b/drivers/gpu/drm/mgag200/mgag200_fb.c
index e94d78a32fe0..9d914ca69996 100644
--- a/drivers/gpu/drm/mgag200/mgag200_fb.c
+++ b/drivers/gpu/drm/mgag200/mgag200_fb.c
@@ -257,8 +257,6 @@ static int mga_fbdev_destroy(struct drm_device *dev,
 }
 
 static const struct drm_fb_helper_funcs mga_fb_helper_funcs = {
-        .gamma_set = mga_crtc_fb_gamma_set,
-        .gamma_get = mga_crtc_fb_gamma_get,
         .fb_probe = mgag200fb_create,
 };
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
index f4b53588e071..5e9cd4c0e8b6 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -27,15 +27,19 @@
 
 static void mga_crtc_load_lut(struct drm_crtc *crtc)
 {
-        struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct mga_device *mdev = dev->dev_private;
         struct drm_framebuffer *fb = crtc->primary->fb;
+        u16 *r_ptr, *g_ptr, *b_ptr;
         int i;
 
         if (!crtc->enabled)
                 return;
 
+        r_ptr = crtc->gamma_store;
+        g_ptr = r_ptr + crtc->gamma_size;
+        b_ptr = g_ptr + crtc->gamma_size;
+
         WREG8(DAC_INDEX + MGA1064_INDEX, 0);
 
         if (fb && fb->format->cpp[0] * 8 == 16) {
@@ -46,25 +50,27 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc)
                                 if (i > (MGAG200_LUT_SIZE >> 1)) {
                                         r = b = 0;
                                 } else {
-                                        r = mga_crtc->lut_r[i << 1];
-                                        b = mga_crtc->lut_b[i << 1];
+                                        r = *r_ptr++ >> 8;
+                                        b = *b_ptr++ >> 8;
+                                        r_ptr++;
+                                        b_ptr++;
                                 }
                         } else {
-                                r = mga_crtc->lut_r[i];
-                                b = mga_crtc->lut_b[i];
+                                r = *r_ptr++ >> 8;
+                                b = *b_ptr++ >> 8;
                         }
                         /* VGA registers */
                         WREG8(DAC_INDEX + MGA1064_COL_PAL, r);
-                        WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
+                        WREG8(DAC_INDEX + MGA1064_COL_PAL, *g_ptr++ >> 8);
                         WREG8(DAC_INDEX + MGA1064_COL_PAL, b);
                 }
                 return;
         }
         for (i = 0; i < MGAG200_LUT_SIZE; i++) {
                 /* VGA registers */
-                WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_r[i]);
-                WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
-                WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_b[i]);
+                WREG8(DAC_INDEX + MGA1064_COL_PAL, *r_ptr++ >> 8);
+                WREG8(DAC_INDEX + MGA1064_COL_PAL, *g_ptr++ >> 8);
+                WREG8(DAC_INDEX + MGA1064_COL_PAL, *b_ptr++ >> 8);
         }
 }
 
@@ -1399,14 +1405,6 @@ static int mga_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                               u16 *blue, uint32_t size,
                               struct drm_modeset_acquire_ctx *ctx)
 {
-        struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
-        int i;
-
-        for (i = 0; i < size; i++) {
-                mga_crtc->lut_r[i] = red[i] >> 8;
-                mga_crtc->lut_g[i] = green[i] >> 8;
-                mga_crtc->lut_b[i] = blue[i] >> 8;
-        }
         mga_crtc_load_lut(crtc);
 
         return 0;
@@ -1455,14 +1453,12 @@ static const struct drm_crtc_helper_funcs mga_helper_funcs = {
         .mode_set_base = mga_crtc_mode_set_base,
         .prepare = mga_crtc_prepare,
         .commit = mga_crtc_commit,
-        .load_lut = mga_crtc_load_lut,
 };
 
 /* CRTC setup */
 static void mga_crtc_init(struct mga_device *mdev)
 {
         struct mga_crtc *mga_crtc;
-        int i;
 
         mga_crtc = kzalloc(sizeof(struct mga_crtc) +
                               (MGAG200FB_CONN_LIMIT * sizeof(struct drm_connector *)),
@@ -1476,37 +1472,9 @@ static void mga_crtc_init(struct mga_device *mdev)
         drm_mode_crtc_set_gamma_size(&mga_crtc->base, MGAG200_LUT_SIZE);
         mdev->mode_info.crtc = mga_crtc;
 
-        for (i = 0; i < MGAG200_LUT_SIZE; i++) {
-                mga_crtc->lut_r[i] = i;
-                mga_crtc->lut_g[i] = i;
-                mga_crtc->lut_b[i] = i;
-        }
-
         drm_crtc_helper_add(&mga_crtc->base, &mga_helper_funcs);
 }
 
-/** Sets the color ramps on behalf of fbcon */
-void mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                              u16 blue, int regno)
-{
-        struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
-
-        mga_crtc->lut_r[regno] = red >> 8;
-        mga_crtc->lut_g[regno] = green >> 8;
-        mga_crtc->lut_b[regno] = blue >> 8;
-}
-
-/** Gets the color ramps on behalf of fbcon */
-void mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                              u16 *blue, int regno)
-{
-        struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
-
-        *red = (u16)mga_crtc->lut_r[regno] << 8;
-        *green = (u16)mga_crtc->lut_g[regno] << 8;
-        *blue = (u16)mga_crtc->lut_b[regno] << 8;
-}
-
 /*
  * The encoder comes after the CRTC in the output pipeline, but before
  * the connector. It's responsible for ensuring that the digital
diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c
index a879ffa534b4..855248132b2b 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
@@ -626,7 +626,6 @@ static void dsi_mgr_bridge_mode_set(struct drm_bridge *bridge,
 }
 
 static const struct drm_connector_funcs dsi_mgr_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = dsi_mgr_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = dsi_mgr_connector_destroy,
diff --git a/drivers/gpu/drm/msm/edp/edp_connector.c b/drivers/gpu/drm/msm/edp/edp_connector.c
index 5960628ceb93..6f3fc6b0f0a3 100644
--- a/drivers/gpu/drm/msm/edp/edp_connector.c
+++ b/drivers/gpu/drm/msm/edp/edp_connector.c
@@ -92,7 +92,6 @@ static int edp_connector_mode_valid(struct drm_connector *connector,
 }
 
 static const struct drm_connector_funcs edp_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = edp_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = edp_connector_destroy,
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_connector.c b/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
index a2515b466ce5..71536d9c7fe8 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
@@ -407,7 +407,6 @@ static int msm_hdmi_connector_mode_valid(struct drm_connector *connector,
 }
 
 static const struct drm_connector_funcs hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = hdmi_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = hdmi_connector_destroy,
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
index 3c7a9d343e05..47fa2aba1983 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
@@ -484,7 +484,6 @@ static const struct drm_crtc_funcs mdp4_crtc_funcs = {
         .set_config = drm_atomic_helper_set_config,
         .destroy = mdp4_crtc_destroy,
         .page_flip = drm_atomic_helper_page_flip,
-        .set_property = drm_atomic_helper_crtc_set_property,
         .cursor_set = mdp4_crtc_cursor_set,
         .cursor_move = mdp4_crtc_cursor_move,
         .reset = drm_atomic_helper_crtc_reset,
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
index bcd1f5cac72c..f7f087419ed8 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
@@ -114,7 +114,7 @@ static void mdp4_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *st
         mdp4_enable(mdp4_kms);
 
         /* see 119ecb7fd */
-        for_each_crtc_in_state(state, crtc, crtc_state, i)
+        for_each_new_crtc_in_state(state, crtc, crtc_state, i)
                 drm_crtc_vblank_get(crtc);
 }
 
@@ -126,7 +126,7 @@ static void mdp4_complete_commit(struct msm_kms *kms, struct drm_atomic_state *s
         struct drm_crtc_state *crtc_state;
 
         /* see 119ecb7fd */
-        for_each_crtc_in_state(state, crtc, crtc_state, i)
+        for_each_new_crtc_in_state(state, crtc, crtc_state, i)
                 drm_crtc_vblank_put(crtc);
 
         mdp4_disable(mdp4_kms);
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_connector.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_connector.c
index 353429b05733..e3b1c86b7aae 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_connector.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_connector.c
@@ -91,7 +91,6 @@ static int mdp4_lvds_connector_mode_valid(struct drm_connector *connector,
 }
 
 static const struct drm_connector_funcs mdp4_lvds_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = mdp4_lvds_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = mdp4_lvds_connector_destroy,
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
index a20e3d644523..7a1ad3af08e3 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
@@ -401,7 +401,7 @@ struct drm_plane *mdp4_plane_init(struct drm_device *dev,
         type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
         ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
                                  mdp4_plane->formats, mdp4_plane->nformats,
-                                 type, NULL);
+                                 NULL, type, NULL);
         if (ret)
                 goto fail;
 
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
index 4322a502555a..5e3bc7224eee 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
@@ -919,7 +919,6 @@ static const struct drm_crtc_funcs mdp5_crtc_funcs = {
         .set_config = drm_atomic_helper_set_config,
         .destroy = mdp5_crtc_destroy,
         .page_flip = drm_atomic_helper_page_flip,
-        .set_property = drm_atomic_helper_crtc_set_property,
         .reset = mdp5_crtc_reset,
         .atomic_duplicate_state = mdp5_crtc_duplicate_state,
         .atomic_destroy_state = mdp5_crtc_destroy_state,
@@ -932,7 +931,6 @@ static const struct drm_crtc_funcs mdp5_crtc_no_lm_cursor_funcs = {
         .set_config = drm_atomic_helper_set_config,
         .destroy = mdp5_crtc_destroy,
         .page_flip = drm_atomic_helper_page_flip,
-        .set_property = drm_atomic_helper_crtc_set_property,
         .reset = mdp5_crtc_reset,
         .atomic_duplicate_state = mdp5_crtc_duplicate_state,
         .atomic_destroy_state = mdp5_crtc_destroy_state,
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
index fe3a4de1a433..818244ac4a4b 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
@@ -246,7 +246,6 @@ static const struct drm_plane_funcs mdp5_plane_funcs = {
                 .update_plane = drm_atomic_helper_update_plane,
                 .disable_plane = drm_atomic_helper_disable_plane,
                 .destroy = mdp5_plane_destroy,
-                .set_property = drm_atomic_helper_plane_set_property,
                 .atomic_set_property = mdp5_plane_atomic_set_property,
                 .atomic_get_property = mdp5_plane_atomic_get_property,
                 .reset = mdp5_plane_reset,
@@ -259,7 +258,6 @@ static const struct drm_plane_funcs mdp5_cursor_plane_funcs = {
                 .update_plane = mdp5_update_cursor_plane_legacy,
                 .disable_plane = drm_atomic_helper_disable_plane,
                 .destroy = mdp5_plane_destroy,
-                .set_property = drm_atomic_helper_plane_set_property,
                 .atomic_set_property = mdp5_plane_atomic_set_property,
                 .atomic_get_property = mdp5_plane_atomic_get_property,
                 .reset = mdp5_plane_reset,
@@ -1139,12 +1137,12 @@ struct drm_plane *mdp5_plane_init(struct drm_device *dev,
                 ret = drm_universal_plane_init(dev, plane, 0xff,
                                 &mdp5_cursor_plane_funcs,
                                 mdp5_plane->formats, mdp5_plane->nformats,
-                                type, NULL);
+                                NULL, type, NULL);
         else
                 ret = drm_universal_plane_init(dev, plane, 0xff,
                                 &mdp5_plane_funcs,
                                 mdp5_plane->formats, mdp5_plane->nformats,
-                                type, NULL);
+                                NULL, type, NULL);
         if (ret)
                 goto fail;
 
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index badfa8717317..025d454163b0 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -84,13 +84,13 @@ static void msm_atomic_wait_for_commit_done(struct drm_device *dev,
                 struct drm_atomic_state *old_state)
 {
         struct drm_crtc *crtc;
-        struct drm_crtc_state *crtc_state;
+        struct drm_crtc_state *new_crtc_state;
         struct msm_drm_private *priv = old_state->dev->dev_private;
         struct msm_kms *kms = priv->kms;
         int i;
 
-        for_each_crtc_in_state(old_state, crtc, crtc_state, i) {
-                if (!crtc->state->enable)
+        for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
+                if (!new_crtc_state->active)
                         continue;
 
                 kms->funcs->wait_for_crtc_commit_done(kms, crtc);
@@ -195,7 +195,7 @@ int msm_atomic_commit(struct drm_device *dev,
         struct drm_crtc *crtc;
         struct drm_crtc_state *crtc_state;
         struct drm_plane *plane;
-        struct drm_plane_state *plane_state;
+        struct drm_plane_state *old_plane_state, *new_plane_state;
         int i, ret;
 
         ret = drm_atomic_helper_prepare_planes(dev, state);
@@ -211,19 +211,19 @@ int msm_atomic_commit(struct drm_device *dev,
         /*
          * Figure out what crtcs we have:
          */
-        for_each_crtc_in_state(state, crtc, crtc_state, i)
+        for_each_new_crtc_in_state(state, crtc, crtc_state, i)
                 c->crtc_mask |= drm_crtc_mask(crtc);
 
         /*
          * Figure out what fence to wait for:
          */
-        for_each_plane_in_state(state, plane, plane_state, i) {
-                if ((plane->state->fb != plane_state->fb) && plane_state->fb) {
-                        struct drm_gem_object *obj = msm_framebuffer_bo(plane_state->fb, 0);
+        for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {
+                if ((new_plane_state->fb != old_plane_state->fb) && new_plane_state->fb) {
+                        struct drm_gem_object *obj = msm_framebuffer_bo(new_plane_state->fb, 0);
                         struct msm_gem_object *msm_obj = to_msm_bo(obj);
                         struct dma_fence *fence = reservation_object_get_excl_rcu(msm_obj->resv);
 
-                        drm_atomic_set_fence_for_plane(plane_state, fence);
+                        drm_atomic_set_fence_for_plane(new_plane_state, fence);
                 }
         }
 
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
index a34f41ce3599..93c38eb6d187 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
@@ -190,7 +190,7 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags)
         }
 
         ret = drm_simple_display_pipe_init(drm, &mxsfb->pipe, &mxsfb_funcs,
-                        mxsfb_formats, ARRAY_SIZE(mxsfb_formats),
+                        mxsfb_formats, ARRAY_SIZE(mxsfb_formats), NULL,
                         &mxsfb->connector);
         if (ret < 0) {
                 dev_err(drm->dev, "Cannot setup simple display pipe\n");
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_out.c b/drivers/gpu/drm/mxsfb/mxsfb_out.c
index f7d729aa09bd..e5edf016a439 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_out.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_out.c
@@ -74,7 +74,6 @@ static void mxsfb_panel_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs mxsfb_panel_connector_funcs = {
-        .dpms                   = drm_atomic_helper_connector_dpms,
         .detect                 = mxsfb_panel_connector_detect,
         .fill_modes             = drm_helper_probe_single_connector_modes,
         .destroy                = mxsfb_panel_connector_destroy,
diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
index 4b4b0b496262..8f689f1f6122 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
@@ -764,13 +764,18 @@ nv_crtc_gamma_load(struct drm_crtc *crtc)
         struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
         struct drm_device *dev = nv_crtc->base.dev;
         struct rgb { uint8_t r, g, b; } __attribute__((packed)) *rgbs;
+        u16 *r, *g, *b;
         int i;
 
         rgbs = (struct rgb *)nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].DAC;
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
+
         for (i = 0; i < 256; i++) {
-                rgbs[i].r = nv_crtc->lut.r[i] >> 8;
-                rgbs[i].g = nv_crtc->lut.g[i] >> 8;
-                rgbs[i].b = nv_crtc->lut.b[i] >> 8;
+                rgbs[i].r = *r++ >> 8;
+                rgbs[i].g = *g++ >> 8;
+                rgbs[i].b = *b++ >> 8;
         }
 
         nouveau_hw_load_state_palette(dev, nv_crtc->index, &nv04_display(dev)->mode_reg);
@@ -792,13 +797,6 @@ nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
                   struct drm_modeset_acquire_ctx *ctx)
 {
         struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-        int i;
-
-        for (i = 0; i < size; i++) {
-                nv_crtc->lut.r[i] = r[i];
-                nv_crtc->lut.g[i] = g[i];
-                nv_crtc->lut.b[i] = b[i];
-        }
 
         /* We need to know the depth before we upload, but it's possible to
          * get called before a framebuffer is bound.  If this is the case,
@@ -1095,7 +1093,6 @@ static const struct drm_crtc_helper_funcs nv04_crtc_helper_funcs = {
         .mode_set = nv_crtc_mode_set,
         .mode_set_base = nv04_crtc_mode_set_base,
         .mode_set_base_atomic = nv04_crtc_mode_set_base_atomic,
-        .load_lut = nv_crtc_gamma_load,
         .disable = nv_crtc_disable,
 };
 
@@ -1103,17 +1100,12 @@ int
 nv04_crtc_create(struct drm_device *dev, int crtc_num)
 {
         struct nouveau_crtc *nv_crtc;
-        int ret, i;
+        int ret;
 
         nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
         if (!nv_crtc)
                 return -ENOMEM;
 
-        for (i = 0; i < 256; i++) {
-                nv_crtc->lut.r[i] = i << 8;
-                nv_crtc->lut.g[i] = i << 8;
-                nv_crtc->lut.b[i] = i << 8;
-        }
         nv_crtc->lut.depth = 0;
 
         nv_crtc->index = crtc_num;
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 147b22163f9f..196eb668d30d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -770,9 +770,6 @@ nouveau_connector_set_property(struct drm_connector *connector,
         struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
         int ret;
 
-        if (drm_drv_uses_atomic_modeset(connector->dev))
-                return drm_atomic_helper_connector_set_property(connector, property, value);
-
         ret = connector->funcs->atomic_set_property(&nv_connector->base,
                                                     &asyc->state,
                                                     property, value);
@@ -1075,17 +1072,9 @@ nouveau_connector_helper_funcs = {
         .best_encoder = nouveau_connector_best_encoder,
 };
 
-static int
-nouveau_connector_dpms(struct drm_connector *connector, int mode)
-{
-        if (drm_drv_uses_atomic_modeset(connector->dev))
-                return drm_atomic_helper_connector_dpms(connector, mode);
-        return drm_helper_connector_dpms(connector, mode);
-}
-
 static const struct drm_connector_funcs
 nouveau_connector_funcs = {
-        .dpms = nouveau_connector_dpms,
+        .dpms = drm_helper_connector_dpms,
         .reset = nouveau_conn_reset,
         .detect = nouveau_connector_detect,
         .force = nouveau_connector_force,
@@ -1100,7 +1089,7 @@ nouveau_connector_funcs = {
 
 static const struct drm_connector_funcs
 nouveau_connector_funcs_lvds = {
-        .dpms = nouveau_connector_dpms,
+        .dpms = drm_helper_connector_dpms,
         .reset = nouveau_conn_reset,
         .detect = nouveau_connector_detect_lvds,
         .force = nouveau_connector_force,
diff --git a/drivers/gpu/drm/nouveau/nouveau_crtc.h b/drivers/gpu/drm/nouveau/nouveau_crtc.h
index 050fcf30a0d2..b7a18fbee6dc 100644
--- a/drivers/gpu/drm/nouveau/nouveau_crtc.h
+++ b/drivers/gpu/drm/nouveau/nouveau_crtc.h
@@ -61,9 +61,6 @@ struct nouveau_crtc {
 
         struct {
                 struct nouveau_bo *nvbo;
-                uint16_t r[256];
-                uint16_t g[256];
-                uint16_t b[256];
                 int depth;
         } lut;
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index 2600b3b9f2e7..df7e2037031a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -998,7 +998,6 @@ driver_stub = {
 
         .dumb_create = nouveau_display_dumb_create,
         .dumb_map_offset = nouveau_display_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
 
         .name = DRIVER_NAME,
         .desc = DRIVER_DESC,
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 2665a078b6da..f7707849bb53 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -278,26 +278,6 @@ nouveau_fbcon_accel_init(struct drm_device *dev)
                 info->fbops = &nouveau_fbcon_ops;
 }
 
-static void nouveau_fbcon_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                                    u16 blue, int regno)
-{
-        struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-
-        nv_crtc->lut.r[regno] = red;
-        nv_crtc->lut.g[regno] = green;
-        nv_crtc->lut.b[regno] = blue;
-}
-
-static void nouveau_fbcon_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                                    u16 *blue, int regno)
-{
-        struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-
-        *red = nv_crtc->lut.r[regno];
-        *green = nv_crtc->lut.g[regno];
-        *blue = nv_crtc->lut.b[regno];
-}
-
 static void
 nouveau_fbcon_zfill(struct drm_device *dev, struct nouveau_fbdev *fbcon)
 {
@@ -467,8 +447,6 @@ void nouveau_fbcon_gpu_lockup(struct fb_info *info)
 }
 
 static const struct drm_fb_helper_funcs nouveau_fbcon_helper_funcs = {
-        .gamma_set = nouveau_fbcon_gamma_set,
-        .gamma_get = nouveau_fbcon_gamma_get,
         .fb_probe = nouveau_fbcon_create,
 };
 
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 747c99c1e474..6dee4071bb3f 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1055,7 +1055,6 @@ nv50_wndw = {
         .disable_plane = drm_atomic_helper_disable_plane,
         .destroy = nv50_wndw_destroy,
         .reset = nv50_wndw_reset,
-        .set_property = drm_atomic_helper_plane_set_property,
         .atomic_duplicate_state = nv50_wndw_atomic_duplicate_state,
         .atomic_destroy_state = nv50_wndw_atomic_destroy_state,
 };
@@ -1083,8 +1082,9 @@ nv50_wndw_ctor(const struct nv50_wndw_func *func, struct drm_device *dev,
         wndw->func = func;
         wndw->dmac = dmac;
 
-        ret = drm_universal_plane_init(dev, &wndw->plane, 0, &nv50_wndw, format,
-                                       nformat, type, "%s-%d", name, index);
+        ret = drm_universal_plane_init(dev, &wndw->plane, 0, &nv50_wndw,
+                                       format, nformat, NULL,
+                                       type, "%s-%d", name, index);
         if (ret)
                 return ret;
 
@@ -2103,7 +2103,7 @@ nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state)
 
         NV_ATOMIC(drm, "%s atomic_check %d\n", crtc->name, asyh->state.active);
         if (asyh->state.active) {
-                for_each_connector_in_state(asyh->state.state, conn, conns, i) {
+                for_each_new_connector_in_state(asyh->state.state, conn, conns, i) {
                         if (conns->crtc == crtc) {
                                 asyc = nouveau_conn_atom(conns);
                                 break;
@@ -2204,28 +2204,29 @@ nv50_head_lut_load(struct drm_crtc *crtc)
         struct nv50_disp *disp = nv50_disp(crtc->dev);
         struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
         void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo);
+        u16 *r, *g, *b;
         int i;
 
-        for (i = 0; i < 256; i++) {
-                u16 r = nv_crtc->lut.r[i] >> 2;
-                u16 g = nv_crtc->lut.g[i] >> 2;
-                u16 b = nv_crtc->lut.b[i] >> 2;
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
 
+        for (i = 0; i < 256; i++) {
                 if (disp->disp->oclass < GF110_DISP) {
-                        writew(r + 0x0000, lut + (i * 0x08) + 0);
-                        writew(g + 0x0000, lut + (i * 0x08) + 2);
-                        writew(b + 0x0000, lut + (i * 0x08) + 4);
+                        writew((*r++ >> 2) + 0x0000, lut + (i * 0x08) + 0);
+                        writew((*g++ >> 2) + 0x0000, lut + (i * 0x08) + 2);
+                        writew((*b++ >> 2) + 0x0000, lut + (i * 0x08) + 4);
                 } else {
-                        writew(r + 0x6000, lut + (i * 0x20) + 0);
-                        writew(g + 0x6000, lut + (i * 0x20) + 2);
-                        writew(b + 0x6000, lut + (i * 0x20) + 4);
+                        /* 0x6000 interferes with the 14-bit color??? */
+                        writew((*r++ >> 2) + 0x6000, lut + (i * 0x20) + 0);
+                        writew((*g++ >> 2) + 0x6000, lut + (i * 0x20) + 2);
+                        writew((*b++ >> 2) + 0x6000, lut + (i * 0x20) + 4);
                 }
         }
 }
 
 static const struct drm_crtc_helper_funcs
 nv50_head_help = {
-        .load_lut = nv50_head_lut_load,
         .atomic_check = nv50_head_atomic_check,
 };
 
@@ -2234,15 +2235,6 @@ nv50_head_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
                     uint32_t size,
                     struct drm_modeset_acquire_ctx *ctx)
 {
-        struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-        u32 i;
-
-        for (i = 0; i < size; i++) {
-                nv_crtc->lut.r[i] = r[i];
-                nv_crtc->lut.g[i] = g[i];
-                nv_crtc->lut.b[i] = b[i];
-        }
-
         nv50_head_lut_load(crtc);
         return 0;
 }
@@ -2325,7 +2317,6 @@ nv50_head_func = {
         .destroy = nv50_head_destroy,
         .set_config = drm_atomic_helper_set_config,
         .page_flip = drm_atomic_helper_page_flip,
-        .set_property = drm_atomic_helper_crtc_set_property,
         .atomic_duplicate_state = nv50_head_atomic_duplicate_state,
         .atomic_destroy_state = nv50_head_atomic_destroy_state,
 };
@@ -2340,19 +2331,13 @@ nv50_head_create(struct drm_device *dev, int index)
         struct nv50_base *base;
         struct nv50_curs *curs;
         struct drm_crtc *crtc;
-        int ret, i;
+        int ret;
 
         head = kzalloc(sizeof(*head), GFP_KERNEL);
         if (!head)
                 return -ENOMEM;
 
         head->base.index = index;
-        for (i = 0; i < 256; i++) {
-                head->base.lut.r[i] = i << 8;
-                head->base.lut.g[i] = i << 8;
-                head->base.lut.b[i] = i << 8;
-        }
-
         ret = nv50_base_new(drm, head, &base);
         if (ret == 0)
                 ret = nv50_curs_new(drm, head, &curs);
@@ -3120,11 +3105,9 @@ nv50_mstc_destroy(struct drm_connector *connector)
 
 static const struct drm_connector_funcs
 nv50_mstc = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = nouveau_conn_reset,
         .detect = nv50_mstc_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .destroy = nv50_mstc_destroy,
         .atomic_duplicate_state = nouveau_conn_atomic_duplicate_state,
         .atomic_destroy_state = nouveau_conn_atomic_destroy_state,
@@ -3905,9 +3888,9 @@ static void
 nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
 {
         struct drm_device *dev = state->dev;
-        struct drm_crtc_state *crtc_state;
+        struct drm_crtc_state *new_crtc_state;
         struct drm_crtc *crtc;
-        struct drm_plane_state *plane_state;
+        struct drm_plane_state *new_plane_state;
         struct drm_plane *plane;
         struct nouveau_drm *drm = nouveau_drm(dev);
         struct nv50_disp *disp = nv50_disp(dev);
@@ -3926,8 +3909,8 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
                 mutex_lock(&disp->mutex);
 
         /* Disable head(s). */
-        for_each_crtc_in_state(state, crtc, crtc_state, i) {
-                struct nv50_head_atom *asyh = nv50_head_atom(crtc->state);
+        for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
+                struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);
                 struct nv50_head *head = nv50_head(crtc);
 
                 NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name,
@@ -3940,8 +3923,8 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
         }
 
         /* Disable plane(s). */
-        for_each_plane_in_state(state, plane, plane_state, i) {
-                struct nv50_wndw_atom *asyw = nv50_wndw_atom(plane->state);
+        for_each_new_plane_in_state(state, plane, new_plane_state, i) {
+                struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
                 struct nv50_wndw *wndw = nv50_wndw(plane);
 
                 NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", plane->name,
@@ -4006,8 +3989,8 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
         }
 
         /* Update head(s). */
-        for_each_crtc_in_state(state, crtc, crtc_state, i) {
-                struct nv50_head_atom *asyh = nv50_head_atom(crtc->state);
+        for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
+                struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);
                 struct nv50_head *head = nv50_head(crtc);
 
                 NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name,
@@ -4019,14 +4002,14 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
                 }
         }
 
-        for_each_crtc_in_state(state, crtc, crtc_state, i) {
-                if (crtc->state->event)
+        for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
+                if (new_crtc_state->event)
                         drm_crtc_vblank_get(crtc);
         }
 
         /* Update plane(s). */
-        for_each_plane_in_state(state, plane, plane_state, i) {
-                struct nv50_wndw_atom *asyw = nv50_wndw_atom(plane->state);
+        for_each_new_plane_in_state(state, plane, new_plane_state, i) {
+                struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
                 struct nv50_wndw *wndw = nv50_wndw(plane);
 
                 NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", plane->name,
@@ -4056,23 +4039,23 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
                 mutex_unlock(&disp->mutex);
 
         /* Wait for HW to signal completion. */
-        for_each_plane_in_state(state, plane, plane_state, i) {
-                struct nv50_wndw_atom *asyw = nv50_wndw_atom(plane->state);
+        for_each_new_plane_in_state(state, plane, new_plane_state, i) {
+                struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
                 struct nv50_wndw *wndw = nv50_wndw(plane);
                 int ret = nv50_wndw_wait_armed(wndw, asyw);
                 if (ret)
                         NV_ERROR(drm, "%s: timeout\n", plane->name);
         }
 
-        for_each_crtc_in_state(state, crtc, crtc_state, i) {
-                if (crtc->state->event) {
+        for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
+                if (new_crtc_state->event) {
                         unsigned long flags;
                         /* Get correct count/ts if racing with vblank irq */
                         drm_crtc_accurate_vblank_count(crtc);
                         spin_lock_irqsave(&crtc->dev->event_lock, flags);
-                        drm_crtc_send_vblank_event(crtc, crtc->state->event);
+                        drm_crtc_send_vblank_event(crtc, new_crtc_state->event);
                         spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
-                        crtc->state->event = NULL;
+                        new_crtc_state->event = NULL;
                         drm_crtc_vblank_put(crtc);
                 }
         }
@@ -4097,7 +4080,7 @@ nv50_disp_atomic_commit(struct drm_device *dev,
 {
         struct nouveau_drm *drm = nouveau_drm(dev);
         struct nv50_disp *disp = nv50_disp(dev);
-        struct drm_plane_state *plane_state;
+        struct drm_plane_state *old_plane_state;
         struct drm_plane *plane;
         struct drm_crtc *crtc;
         bool active = false;
@@ -4127,9 +4110,10 @@ nv50_disp_atomic_commit(struct drm_device *dev,
         if (ret)
                 goto err_cleanup;
 
-        for_each_plane_in_state(state, plane, plane_state, i) {
-                struct nv50_wndw_atom *asyw = nv50_wndw_atom(plane_state);
+        for_each_old_plane_in_state(state, plane, old_plane_state, i) {
+                struct nv50_wndw_atom *asyw = nv50_wndw_atom(old_plane_state);
                 struct nv50_wndw *wndw = nv50_wndw(plane);
+
                 if (asyw->set.image) {
                         asyw->ntfy.handle = wndw->dmac->sync.handle;
                         asyw->ntfy.offset = wndw->ntfy;
@@ -4192,18 +4176,19 @@ nv50_disp_outp_atomic_add(struct nv50_atom *atom, struct drm_encoder *encoder)
 
 static int
 nv50_disp_outp_atomic_check_clr(struct nv50_atom *atom,
-                                struct drm_connector *connector)
+                                struct drm_connector_state *old_connector_state)
 {
-        struct drm_encoder *encoder = connector->state->best_encoder;
-        struct drm_crtc_state *crtc_state;
+        struct drm_encoder *encoder = old_connector_state->best_encoder;
+        struct drm_crtc_state *old_crtc_state, *new_crtc_state;
         struct drm_crtc *crtc;
         struct nv50_outp_atom *outp;
 
-        if (!(crtc = connector->state->crtc))
+        if (!(crtc = old_connector_state->crtc))
                 return 0;
 
-        crtc_state = drm_atomic_get_existing_crtc_state(&atom->state, crtc);
-        if (crtc->state->active && drm_atomic_crtc_needs_modeset(crtc_state)) {
+        old_crtc_state = drm_atomic_get_old_crtc_state(&atom->state, crtc);
+        new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);
+        if (old_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) {
                 outp = nv50_disp_outp_atomic_add(atom, encoder);
                 if (IS_ERR(outp))
                         return PTR_ERR(outp);
@@ -4224,15 +4209,15 @@ nv50_disp_outp_atomic_check_set(struct nv50_atom *atom,
                                 struct drm_connector_state *connector_state)
 {
         struct drm_encoder *encoder = connector_state->best_encoder;
-        struct drm_crtc_state *crtc_state;
+        struct drm_crtc_state *new_crtc_state;
         struct drm_crtc *crtc;
         struct nv50_outp_atom *outp;
 
         if (!(crtc = connector_state->crtc))
                 return 0;
 
-        crtc_state = drm_atomic_get_existing_crtc_state(&atom->state, crtc);
-        if (crtc_state->active && drm_atomic_crtc_needs_modeset(crtc_state)) {
+        new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);
+        if (new_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) {
                 outp = nv50_disp_outp_atomic_add(atom, encoder);
                 if (IS_ERR(outp))
                         return PTR_ERR(outp);
@@ -4248,7 +4233,7 @@ static int
 nv50_disp_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
 {
         struct nv50_atom *atom = nv50_atom(state);
-        struct drm_connector_state *connector_state;
+        struct drm_connector_state *old_connector_state, *new_connector_state;
         struct drm_connector *connector;
         int ret, i;
 
@@ -4256,12 +4241,12 @@ nv50_disp_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
         if (ret)
                 return ret;
 
-        for_each_connector_in_state(state, connector, connector_state, i) {
-                ret = nv50_disp_outp_atomic_check_clr(atom, connector);
+        for_each_oldnew_connector_in_state(state, connector, old_connector_state, new_connector_state, i) {
+                ret = nv50_disp_outp_atomic_check_clr(atom, old_connector_state);
                 if (ret)
                         return ret;
 
-                ret = nv50_disp_outp_atomic_check_set(atom, connector_state);
+                ret = nv50_disp_outp_atomic_check_set(atom, new_connector_state);
                 if (ret)
                         return ret;
         }
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c
index c24b6b783e9a..d1ec76ef5cc6 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -195,7 +195,6 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
 }
 
 static const struct drm_connector_funcs omap_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .detect = omap_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 14e8a7738b06..400d0d2f6790 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -26,6 +26,16 @@
 
 #include "omap_drv.h"
 
+#define to_omap_crtc_state(x) container_of(x, struct omap_crtc_state, base)
+
+struct omap_crtc_state {
+        /* Must be first. */
+        struct drm_crtc_state base;
+        /* Shadow values for legacy userspace support. */
+        unsigned int rotation;
+        unsigned int zpos;
+};
+
 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
 
 struct omap_crtc {
@@ -445,6 +455,8 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
 static int omap_crtc_atomic_check(struct drm_crtc *crtc,
                                 struct drm_crtc_state *state)
 {
+        struct drm_plane_state *pri_state;
+
         if (state->color_mgmt_changed && state->gamma_lut) {
                 uint length = state->gamma_lut->length /
                         sizeof(struct drm_color_lut);
@@ -453,6 +465,16 @@ static int omap_crtc_atomic_check(struct drm_crtc *crtc,
                         return -EINVAL;
         }
 
+        pri_state = drm_atomic_get_new_plane_state(state->state, crtc->primary);
+        if (pri_state) {
+                struct omap_crtc_state *omap_crtc_state =
+                        to_omap_crtc_state(state);
+
+                /* Mirror new values for zpos and rotation in omap_crtc_state */
+                omap_crtc_state->zpos = pri_state->zpos;
+                omap_crtc_state->rotation = pri_state->rotation;
+        }
+
         return 0;
 }
 
@@ -498,39 +520,32 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
         spin_unlock_irq(&crtc->dev->event_lock);
 }
 
-static bool omap_crtc_is_plane_prop(struct drm_crtc *crtc,
-        struct drm_property *property)
-{
-        struct drm_device *dev = crtc->dev;
-        struct omap_drm_private *priv = dev->dev_private;
-
-        return property == priv->zorder_prop ||
-                property == crtc->primary->rotation_property;
-}
-
 static int omap_crtc_atomic_set_property(struct drm_crtc *crtc,
                                          struct drm_crtc_state *state,
                                          struct drm_property *property,
                                          uint64_t val)
 {
-        if (omap_crtc_is_plane_prop(crtc, property)) {
-                struct drm_plane_state *plane_state;
-                struct drm_plane *plane = crtc->primary;
-
-                /*
-                 * Delegate property set to the primary plane. Get the plane
-                 * state and set the property directly.
-                 */
-
-                plane_state = drm_atomic_get_plane_state(state->state, plane);
-                if (IS_ERR(plane_state))
-                        return PTR_ERR(plane_state);
+        struct omap_drm_private *priv = crtc->dev->dev_private;
+        struct drm_plane_state *plane_state;
 
-                return drm_atomic_plane_set_property(plane, plane_state,
-                                property, val);
-        }
+        /*
+         * Delegate property set to the primary plane. Get the plane state and
+         * set the property directly, the shadow copy will be assigned in the
+         * omap_crtc_atomic_check callback. This way updates to plane state will
+         * always be mirrored in the crtc state correctly.
+         */
+        plane_state = drm_atomic_get_plane_state(state->state, crtc->primary);
+        if (IS_ERR(plane_state))
+                return PTR_ERR(plane_state);
+
+        if (property == crtc->primary->rotation_property)
+                plane_state->rotation = val;
+        else if (property == priv->zorder_prop)
+                plane_state->zpos = val;
+        else
+                return -EINVAL;
 
-        return -EINVAL;
+        return 0;
 }
 
 static int omap_crtc_atomic_get_property(struct drm_crtc *crtc,
@@ -538,28 +553,58 @@ static int omap_crtc_atomic_get_property(struct drm_crtc *crtc,
                                          struct drm_property *property,
                                          uint64_t *val)
 {
-        if (omap_crtc_is_plane_prop(crtc, property)) {
-                /*
-                 * Delegate property get to the primary plane. The
-                 * drm_atomic_plane_get_property() function isn't exported, but
-                 * can be called through drm_object_property_get_value() as that
-                 * will call drm_atomic_get_property() for atomic drivers.
-                 */
-                return drm_object_property_get_value(&crtc->primary->base,
-                                property, val);
-        }
+        struct omap_drm_private *priv = crtc->dev->dev_private;
+        struct omap_crtc_state *omap_state = to_omap_crtc_state(state);
+
+        if (property == crtc->primary->rotation_property)
+                *val = omap_state->rotation;
+        else if (property == priv->zorder_prop)
+                *val = omap_state->zpos;
+        else
+                return -EINVAL;
+
+        return 0;
+}
+
+static void omap_crtc_reset(struct drm_crtc *crtc)
+{
+        if (crtc->state)
+                __drm_atomic_helper_crtc_destroy_state(crtc->state);
+
+        kfree(crtc->state);
+        crtc->state = kzalloc(sizeof(struct omap_crtc_state), GFP_KERNEL);
+
+        if (crtc->state)
+                crtc->state->crtc = crtc;
+}
+
+static struct drm_crtc_state *
+omap_crtc_duplicate_state(struct drm_crtc *crtc)
+{
+        struct omap_crtc_state *state, *current_state;
+
+        if (WARN_ON(!crtc->state))
+                return NULL;
+
+        current_state = to_omap_crtc_state(crtc->state);
+
+        state = kmalloc(sizeof(*state), GFP_KERNEL);
+        if (state)
+                __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
+
+        state->zpos = current_state->zpos;
+        state->rotation = current_state->rotation;
 
-        return -EINVAL;
+        return &state->base;
 }
 
 static const struct drm_crtc_funcs omap_crtc_funcs = {
-        .reset = drm_atomic_helper_crtc_reset,
+        .reset = omap_crtc_reset,
         .set_config = drm_atomic_helper_set_config,
         .destroy = omap_crtc_destroy,
         .page_flip = drm_atomic_helper_page_flip,
         .gamma_set = drm_atomic_helper_legacy_gamma_set,
-        .set_property = drm_atomic_helper_crtc_set_property,
-        .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
+        .atomic_duplicate_state = omap_crtc_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
         .atomic_set_property = omap_crtc_atomic_set_property,
         .atomic_get_property = omap_crtc_atomic_get_property,
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index 022029ea6972..721a358531b0 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -57,13 +57,13 @@ static void omap_fb_output_poll_changed(struct drm_device *dev)
 static void omap_atomic_wait_for_completion(struct drm_device *dev,
                                             struct drm_atomic_state *old_state)
 {
-        struct drm_crtc_state *old_crtc_state;
+        struct drm_crtc_state *new_crtc_state;
         struct drm_crtc *crtc;
         unsigned int i;
         int ret;
 
-        for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
-                if (!crtc->state->enable)
+        for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
+                if (!new_crtc_state->active)
                         continue;
 
                 ret = omap_crtc_wait_pending(crtc);
@@ -517,7 +517,6 @@ static struct drm_driver omap_drm_driver = {
         .gem_vm_ops = &omap_gem_vm_ops,
         .dumb_create = omap_gem_dumb_create,
         .dumb_map_offset = omap_gem_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .ioctls = ioctls,
         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
         .fops = &omapdriver_fops,
diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c
index 2160f64548e0..15e5d5d325c6 100644
--- a/drivers/gpu/drm/omapdrm/omap_plane.c
+++ b/drivers/gpu/drm/omapdrm/omap_plane.c
@@ -235,7 +235,6 @@ static const struct drm_plane_funcs omap_plane_funcs = {
         .disable_plane = drm_atomic_helper_disable_plane,
         .reset = omap_plane_reset,
         .destroy = omap_plane_destroy,
-        .set_property = drm_atomic_helper_plane_set_property,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
         .atomic_set_property = omap_plane_atomic_set_property,
@@ -291,7 +290,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
 
         ret = drm_universal_plane_init(dev, plane, possible_crtcs,
                                        &omap_plane_funcs, formats,
-                                       nformats, type, NULL);
+                                       nformats, NULL, type, NULL);
         if (ret < 0)
                 goto error;
 
diff --git a/drivers/gpu/drm/pl111/pl111_connector.c b/drivers/gpu/drm/pl111/pl111_connector.c
index 3f213d7e7692..d335f9a29ce4 100644
--- a/drivers/gpu/drm/pl111/pl111_connector.c
+++ b/drivers/gpu/drm/pl111/pl111_connector.c
@@ -69,7 +69,6 @@ const struct drm_connector_funcs connector_funcs = {
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = pl111_connector_destroy,
         .detect = pl111_connector_detect,
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c
index c6ca4f1bbd49..f0139fa58d55 100644
--- a/drivers/gpu/drm/pl111/pl111_display.c
+++ b/drivers/gpu/drm/pl111/pl111_display.c
@@ -457,7 +457,7 @@ int pl111_display_init(struct drm_device *drm)
         ret = drm_simple_display_pipe_init(drm, &priv->pipe,
                                            &pl111_display_funcs,
                                            formats, ARRAY_SIZE(formats),
-                                           &priv->connector.connector);
+                                           NULL, &priv->connector.connector);
         if (ret)
                 return ret;
 
diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c
index 8907bc261ab2..29653fe5285c 100644
--- a/drivers/gpu/drm/pl111/pl111_drv.c
+++ b/drivers/gpu/drm/pl111/pl111_drv.c
@@ -159,8 +159,6 @@ static struct drm_driver pl111_drm_driver = {
         .minor = 0,
         .patchlevel = 0,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_destroy = drm_gem_dumb_destroy,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops = &drm_gem_cma_vm_ops,
 
diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c
index 5eeae89c138d..14c5613b4388 100644
--- a/drivers/gpu/drm/qxl/qxl_display.c
+++ b/drivers/gpu/drm/qxl/qxl_display.c
@@ -784,7 +784,7 @@ static struct drm_plane *qxl_create_plane(struct qxl_device *qdev,
 
         err = drm_universal_plane_init(&qdev->ddev, plane, possible_crtcs,
                                        funcs, formats, num_formats,
-                                       type, NULL);
+                                       NULL, type, NULL);
         if (err)
                 goto free_plane;
 
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 3c492a0aa6bd..02baaaf20e9d 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -2217,7 +2217,6 @@ static const struct drm_crtc_helper_funcs atombios_helper_funcs = {
         .mode_set_base_atomic = atombios_crtc_set_base_atomic,
         .prepare = atombios_crtc_prepare,
         .commit = atombios_crtc_commit,
-        .load_lut = radeon_crtc_load_lut,
         .disable = atombios_crtc_disable,
 };
 
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 27affbde058c..2f642cbefd8e 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -773,12 +773,15 @@ static int radeon_connector_set_property(struct drm_connector *connector, struct
 
                 if (connector->encoder->crtc) {
                         struct drm_crtc *crtc  = connector->encoder->crtc;
-                        const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
                         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 
                         radeon_crtc->output_csc = radeon_encoder->output_csc;
 
-                        (*crtc_funcs->load_lut)(crtc);
+                        /*
+                         * Our .gamma_set assumes the .gamma_store has been
+                         * prefilled and don't care about its arguments.
+                         */
+                        crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);
                 }
         }
 
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index f339c1c10fa1..ee274c6e374d 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -42,6 +42,7 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct radeon_device *rdev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
 
         DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -60,11 +61,14 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(AVIVO_DC_LUT_WRITE_EN_MASK, 0x0000003f);
 
         WREG8(AVIVO_DC_LUT_RW_INDEX, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(AVIVO_DC_LUT_30_COLOR,
-                             (radeon_crtc->lut_r[i] << 20) |
-                             (radeon_crtc->lut_g[i] << 10) |
-                             (radeon_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 
         /* Only change bit 0 of LUT_SEL, other bits are set elsewhere */
@@ -76,6 +80,7 @@ static void dce4_crtc_load_lut(struct drm_crtc *crtc)
         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct radeon_device *rdev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
 
         DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -93,11 +98,14 @@ static void dce4_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 0x00000007);
 
         WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset,
-                       (radeon_crtc->lut_r[i] << 20) |
-                       (radeon_crtc->lut_g[i] << 10) |
-                       (radeon_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 }
 
@@ -106,6 +114,7 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc)
         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct radeon_device *rdev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
 
         DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -135,11 +144,14 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 0x00000007);
 
         WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset,
-                       (radeon_crtc->lut_r[i] << 20) |
-                       (radeon_crtc->lut_g[i] << 10) |
-                       (radeon_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 
         WREG32(NI_DEGAMMA_CONTROL + radeon_crtc->crtc_offset,
@@ -172,6 +184,7 @@ static void legacy_crtc_load_lut(struct drm_crtc *crtc)
         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
         struct drm_device *dev = crtc->dev;
         struct radeon_device *rdev = dev->dev_private;
+        u16 *r, *g, *b;
         int i;
         uint32_t dac2_cntl;
 
@@ -183,11 +196,14 @@ static void legacy_crtc_load_lut(struct drm_crtc *crtc)
         WREG32(RADEON_DAC_CNTL2, dac2_cntl);
 
         WREG8(RADEON_PALETTE_INDEX, 0);
+        r = crtc->gamma_store;
+        g = r + crtc->gamma_size;
+        b = g + crtc->gamma_size;
         for (i = 0; i < 256; i++) {
                 WREG32(RADEON_PALETTE_30_DATA,
-                             (radeon_crtc->lut_r[i] << 20) |
-                             (radeon_crtc->lut_g[i] << 10) |
-                             (radeon_crtc->lut_b[i] << 0));
+                       ((*r++ & 0xffc0) << 14) |
+                       ((*g++ & 0xffc0) << 4) |
+                       (*b++ >> 6));
         }
 }
 
@@ -209,41 +225,10 @@ void radeon_crtc_load_lut(struct drm_crtc *crtc)
                 legacy_crtc_load_lut(crtc);
 }
 
-/** Sets the color ramps on behalf of fbcon */
-void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                              u16 blue, int regno)
-{
-        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-
-        radeon_crtc->lut_r[regno] = red >> 6;
-        radeon_crtc->lut_g[regno] = green >> 6;
-        radeon_crtc->lut_b[regno] = blue >> 6;
-}
-
-/** Gets the color ramps on behalf of fbcon */
-void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                              u16 *blue, int regno)
-{
-        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-
-        *red = radeon_crtc->lut_r[regno] << 6;
-        *green = radeon_crtc->lut_g[regno] << 6;
-        *blue = radeon_crtc->lut_b[regno] << 6;
-}
-
 static int radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
                                  u16 *blue, uint32_t size,
                                  struct drm_modeset_acquire_ctx *ctx)
 {
-        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-        int i;
-
-        /* userspace palettes are always correct as is */
-        for (i = 0; i < size; i++) {
-                radeon_crtc->lut_r[i] = red[i] >> 6;
-                radeon_crtc->lut_g[i] = green[i] >> 6;
-                radeon_crtc->lut_b[i] = blue[i] >> 6;
-        }
         radeon_crtc_load_lut(crtc);
 
         return 0;
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index b401f1689bc1..f4becad0a78c 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -583,7 +583,6 @@ static struct drm_driver kms_driver = {
         .gem_close_object = radeon_gem_object_close,
         .dumb_create = radeon_mode_dumb_create,
         .dumb_map_offset = radeon_mode_dumb_mmap,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .fops = &radeon_driver_kms_fops,
 
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 7fc63fecb8c1..af6ee7d9b465 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -331,8 +331,6 @@ static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfb
 }
 
 static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
-        .gamma_set = radeon_crtc_fb_gamma_set,
-        .gamma_get = radeon_crtc_fb_gamma_get,
         .fb_probe = radeonfb_create,
 };
 
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index ce6cb6666212..1f1856e0b1e0 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -1116,7 +1116,6 @@ static const struct drm_crtc_helper_funcs legacy_helper_funcs = {
         .mode_set_base_atomic = radeon_crtc_set_base_atomic,
         .prepare = radeon_crtc_prepare,
         .commit = radeon_crtc_commit,
-        .load_lut = radeon_crtc_load_lut,
         .disable = radeon_crtc_disable
 };
 
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 00f5ec5c12c7..da44ac234f64 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -935,10 +935,6 @@ extern void
 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 extern void
 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
-extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                                     u16 blue, int regno);
-extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                                     u16 *blue, int regno);
 int radeon_framebuffer_init(struct drm_device *dev,
                              struct radeon_framebuffer *rfb,
                              const struct drm_mode_fb_cmd2 *mode_cmd,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index da3020b622ab..d2f29e6b1112 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -249,8 +249,6 @@ static struct drm_driver rcar_du_driver = {
         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
         .dumb_create            = rcar_du_dumb_create,
-        .dumb_map_offset        = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy           = drm_gem_dumb_destroy,
         .fops                   = &rcar_du_fops,
         .name                   = "rcar-du",
         .desc                   = "Renesas R-Car Display Unit",
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
index ee91481131ad..b373ad48ef5f 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
@@ -46,7 +46,6 @@ static void rcar_du_lvds_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = rcar_du_lvds_connector_destroy,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
index 25623cf7fe97..61833cc1c699 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
@@ -715,7 +715,6 @@ static const struct drm_plane_funcs rcar_du_plane_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
         .reset = rcar_du_plane_reset,
-        .set_property = drm_atomic_helper_plane_set_property,
         .destroy = drm_plane_cleanup,
         .atomic_duplicate_state = rcar_du_plane_atomic_duplicate_state,
         .atomic_destroy_state = rcar_du_plane_atomic_destroy_state,
@@ -761,8 +760,8 @@ int rcar_du_planes_init(struct rcar_du_group *rgrp)
 
                 ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
                                                &rcar_du_plane_funcs, formats,
-                                               ARRAY_SIZE(formats), type,
-                                               NULL);
+                                               ARRAY_SIZE(formats),
+                                               NULL, type, NULL);
                 if (ret < 0)
                         return ret;
 
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 6de6be3d9090..2c96147bc444 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -393,7 +393,6 @@ static const struct drm_plane_funcs rcar_du_vsp_plane_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
         .reset = rcar_du_vsp_plane_reset,
-        .set_property = drm_atomic_helper_plane_set_property,
         .destroy = drm_plane_cleanup,
         .atomic_duplicate_state = rcar_du_vsp_plane_atomic_duplicate_state,
         .atomic_destroy_state = rcar_du_vsp_plane_atomic_destroy_state,
@@ -444,8 +443,8 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
                 ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
                                                &rcar_du_vsp_plane_funcs,
                                                formats_kms,
-                                               ARRAY_SIZE(formats_kms), type,
-                                               NULL);
+                                               ARRAY_SIZE(formats_kms),
+                                               NULL, type, NULL);
                 if (ret < 0)
                         return ret;
 
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
index 9b0b0588bbed..a57da051f516 100644
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
@@ -254,7 +254,6 @@ static void cdn_dp_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs cdn_dp_atomic_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = cdn_dp_connector_detect,
         .destroy = cdn_dp_connector_destroy,
         .fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 21b9737662ae..9a20b9dc27c8 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -1080,7 +1080,6 @@ static void dw_mipi_dsi_drm_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs dw_mipi_dsi_atomic_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = dw_mipi_dsi_drm_connector_destroy,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchip/inno_hdmi.c
index 7149968aa25a..bd87768dd549 100644
--- a/drivers/gpu/drm/rockchip/inno_hdmi.c
+++ b/drivers/gpu/drm/rockchip/inno_hdmi.c
@@ -593,7 +593,6 @@ static void inno_hdmi_connector_destroy(struct drm_connector *connector)
 }
 
 static struct drm_connector_funcs inno_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = inno_hdmi_probe_single_connector_modes,
         .detect = inno_hdmi_connector_detect,
         .destroy = inno_hdmi_connector_destroy,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 131cb5c86def..c41f48ae7913 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -161,22 +161,21 @@ static int rockchip_drm_bind(struct device *dev)
          */
         drm_dev->irq_enabled = true;
 
-        /* init kms poll for handling hpd */
-        drm_kms_helper_poll_init(drm_dev);
-
         ret = rockchip_drm_fbdev_init(drm_dev);
         if (ret)
-                goto err_kms_helper_poll_fini;
+                goto err_unbind_all;
+
+        /* init kms poll for handling hpd */
+        drm_kms_helper_poll_init(drm_dev);
 
         ret = drm_dev_register(drm_dev, 0);
         if (ret)
-                goto err_fbdev_fini;
+                goto err_kms_helper_poll_fini;
 
         return 0;
-err_fbdev_fini:
-        rockchip_drm_fbdev_fini(drm_dev);
 err_kms_helper_poll_fini:
         drm_kms_helper_poll_fini(drm_dev);
+        rockchip_drm_fbdev_fini(drm_dev);
 err_unbind_all:
         component_unbind_all(dev, drm_dev);
 err_mode_config_cleanup:
@@ -233,8 +232,6 @@ static struct drm_driver rockchip_drm_driver = {
         .gem_vm_ops             = &drm_gem_cma_vm_ops,
         .gem_free_object_unlocked = rockchip_gem_free_object,
         .dumb_create            = rockchip_gem_dumb_create,
-        .dumb_map_offset        = rockchip_gem_dumb_map_offset,
-        .dumb_destroy           = drm_gem_dumb_destroy,
         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
         .gem_prime_import       = drm_gem_prime_import,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
index b74ac717e56a..f74333efe4bb 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
@@ -393,32 +393,6 @@ err_handle_create:
         return ERR_PTR(ret);
 }
 
-int rockchip_gem_dumb_map_offset(struct drm_file *file_priv,
-                                 struct drm_device *dev, uint32_t handle,
-                                 uint64_t *offset)
-{
-        struct drm_gem_object *obj;
-        int ret;
-
-        obj = drm_gem_object_lookup(file_priv, handle);
-        if (!obj) {
-                DRM_ERROR("failed to lookup gem object.\n");
-                return -EINVAL;
-        }
-
-        ret = drm_gem_create_mmap_offset(obj);
-        if (ret)
-                goto out;
-
-        *offset = drm_vma_node_offset_addr(&obj->vma_node);
-        DRM_DEBUG_KMS("offset = 0x%llx\n", *offset);
-
-out:
-        drm_gem_object_unreference_unlocked(obj);
-
-        return 0;
-}
-
 /*
  * rockchip_gem_dumb_create - (struct drm_driver)->dumb_create callback
  * function
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
index 3f6ea4d18a5c..f237375582fb 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h
@@ -57,7 +57,4 @@ void rockchip_gem_free_object(struct drm_gem_object *obj);
 int rockchip_gem_dumb_create(struct drm_file *file_priv,
                              struct drm_device *dev,
                              struct drm_mode_create_dumb *args);
-int rockchip_gem_dumb_map_offset(struct drm_file *file_priv,
-                                 struct drm_device *dev, uint32_t handle,
-                                 uint64_t *offset);
 #endif /* _ROCKCHIP_DRM_GEM_H */
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 9434d616bc37..948719dddc36 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -42,33 +42,20 @@
 #include "rockchip_drm_psr.h"
 #include "rockchip_drm_vop.h"
 
-#define __REG_SET_RELAXED(x, off, mask, shift, v, write_mask) \
-                vop_mask_write(x, off, mask, shift, v, write_mask, true)
-
-#define __REG_SET_NORMAL(x, off, mask, shift, v, write_mask) \
-                vop_mask_write(x, off, mask, shift, v, write_mask, false)
-
-#define REG_SET(x, base, reg, v, mode) \
-                __REG_SET_##mode(x, base + reg.offset, \
-                                 reg.mask, reg.shift, v, reg.write_mask)
-#define REG_SET_MASK(x, base, reg, mask, v, mode) \
-                __REG_SET_##mode(x, base + reg.offset, \
-                                 mask, reg.shift, v, reg.write_mask)
-
 #define VOP_WIN_SET(x, win, name, v) \
-                REG_SET(x, win->base, win->phy->name, v, RELAXED)
+                vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
 #define VOP_SCL_SET(x, win, name, v) \
-                REG_SET(x, win->base, win->phy->scl->name, v, RELAXED)
+                vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
 #define VOP_SCL_SET_EXT(x, win, name, v) \
-                REG_SET(x, win->base, win->phy->scl->ext->name, v, RELAXED)
-#define VOP_CTRL_SET(x, name, v) \
-                REG_SET(x, 0, (x)->data->ctrl->name, v, NORMAL)
+                vop_reg_set(vop, &win->phy->scl->ext->name, \
+                            win->base, ~0, v, #name)
+
+#define VOP_INTR_SET_MASK(vop, name, mask, v) \
+                vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name)
 
-#define VOP_INTR_GET(vop, name) \
-                vop_read_reg(vop, 0, &vop->data->ctrl->name)
+#define VOP_REG_SET(vop, group, name, v) \
+                    vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
 
-#define VOP_INTR_SET(vop, name, mask, v) \
-                REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v, NORMAL)
 #define VOP_INTR_SET_TYPE(vop, name, type, v) \
         do { \
                 int i, reg = 0, mask = 0; \
@@ -78,13 +65,13 @@
                                 mask |= 1 << i; \
                         } \
                 } \
-                VOP_INTR_SET(vop, name, mask, reg); \
+                VOP_INTR_SET_MASK(vop, name, mask, reg); \
         } while (0)
 #define VOP_INTR_GET_TYPE(vop, name, type) \
                 vop_get_intr_type(vop, &vop->data->intr->name, type)
 
 #define VOP_WIN_GET(x, win, name) \
-                vop_read_reg(x, win->base, &win->phy->name)
+                vop_read_reg(x, win->offset, win->phy->name)
 
 #define VOP_WIN_GET_YRGBADDR(vop, win) \
                 vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
@@ -166,14 +153,22 @@ static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base,
         return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask;
 }
 
-static inline void vop_mask_write(struct vop *vop, uint32_t offset,
-                                  uint32_t mask, uint32_t shift, uint32_t v,
-                                  bool write_mask, bool relaxed)
+static void vop_reg_set(struct vop *vop, const struct vop_reg *reg,
+                        uint32_t _offset, uint32_t _mask, uint32_t v,
+                        const char *reg_name)
 {
-        if (!mask)
+        int offset, mask, shift;
+
+        if (!reg || !reg->mask) {
+                dev_dbg(vop->dev, "Warning: not support %s\n", reg_name);
                 return;
+        }
+
+        offset = reg->offset + _offset;
+        mask = reg->mask & _mask;
+        shift = reg->shift;
 
-        if (write_mask) {
+        if (reg->write_mask) {
                 v = ((v << shift) & 0xffff) | (mask << (shift + 16));
         } else {
                 uint32_t cached_val = vop->regsbak[offset >> 2];
@@ -182,7 +177,7 @@ static inline void vop_mask_write(struct vop *vop, uint32_t offset,
                 vop->regsbak[offset >> 2] = v;
         }
 
-        if (relaxed)
+        if (reg->relaxed)
                 writel_relaxed(v, vop->regs + offset);
         else
                 writel(v, vop->regs + offset);
@@ -204,7 +199,7 @@ static inline uint32_t vop_get_intr_type(struct vop *vop,
 
 static inline void vop_cfg_done(struct vop *vop)
 {
-        VOP_CTRL_SET(vop, cfg_done, 1);
+        VOP_REG_SET(vop, common, cfg_done, 1);
 }
 
 static bool has_rb_swapped(uint32_t format)
@@ -500,7 +495,7 @@ static void vop_line_flag_irq_disable(struct vop *vop)
 static int vop_enable(struct drm_crtc *crtc)
 {
         struct vop *vop = to_vop(crtc);
-        int ret;
+        int ret, i;
 
         ret = pm_runtime_get_sync(vop->dev);
         if (ret < 0) {
@@ -533,6 +528,20 @@ static int vop_enable(struct drm_crtc *crtc)
         }
 
         memcpy(vop->regs, vop->regsbak, vop->len);
+        /*
+         * We need to make sure that all windows are disabled before we
+         * enable the crtc. Otherwise we might try to scan from a destroyed
+         * buffer later.
+         */
+        for (i = 0; i < vop->data->win_size; i++) {
+                struct vop_win *vop_win = &vop->win[i];
+                const struct vop_win_data *win = vop_win->data;
+
+                spin_lock(&vop->reg_lock);
+                VOP_WIN_SET(vop, win, enable, 0);
+                spin_unlock(&vop->reg_lock);
+        }
+
         vop_cfg_done(vop);
 
         /*
@@ -542,7 +551,7 @@ static int vop_enable(struct drm_crtc *crtc)
 
         spin_lock(&vop->reg_lock);
 
-        VOP_CTRL_SET(vop, standby, 0);
+        VOP_REG_SET(vop, common, standby, 1);
 
         spin_unlock(&vop->reg_lock);
 
@@ -567,28 +576,11 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc,
                                     struct drm_crtc_state *old_state)
 {
         struct vop *vop = to_vop(crtc);
-        int i;
 
         WARN_ON(vop->event);
 
         rockchip_drm_psr_deactivate(&vop->crtc);
 
-        /*
-         * We need to make sure that all windows are disabled before we
-         * disable that crtc. Otherwise we might try to scan from a destroyed
-         * buffer later.
-         */
-        for (i = 0; i < vop->data->win_size; i++) {
-                struct vop_win *vop_win = &vop->win[i];
-                const struct vop_win_data *win = vop_win->data;
-
-                spin_lock(&vop->reg_lock);
-                VOP_WIN_SET(vop, win, enable, 0);
-                spin_unlock(&vop->reg_lock);
-        }
-
-        vop_cfg_done(vop);
-
         drm_crtc_vblank_off(crtc);
 
         /*
@@ -603,7 +595,7 @@ static void vop_crtc_atomic_disable(struct drm_crtc *crtc,
 
         spin_lock(&vop->reg_lock);
 
-        VOP_CTRL_SET(vop, standby, 1);
+        VOP_REG_SET(vop, common, standby, 1);
 
         spin_unlock(&vop->reg_lock);
 
@@ -683,8 +675,10 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
          * Src.x1 can be odd when do clip, but yuv plane start point
          * need align with 2 pixel.
          */
-        if (is_yuv_support(fb->format->format) && ((state->src.x1 >> 16) % 2))
+        if (is_yuv_support(fb->format->format) && ((state->src.x1 >> 16) % 2)) {
+                DRM_ERROR("Invalid Source: Yuv format not support odd xpos\n");
                 return -EINVAL;
+        }
 
         return 0;
 }
@@ -765,7 +759,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
         spin_lock(&vop->reg_lock);
 
         VOP_WIN_SET(vop, win, format, format);
-        VOP_WIN_SET(vop, win, yrgb_vir, fb->pitches[0] >> 2);
+        VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4));
         VOP_WIN_SET(vop, win, yrgb_mst, dma_addr);
         if (is_yuv_support(fb->format->format)) {
                 int hsub = drm_format_horz_chroma_subsampling(fb->format->format);
@@ -779,7 +773,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
                 offset += (src->y1 >> 16) * fb->pitches[1] / vsub;
 
                 dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1];
-                VOP_WIN_SET(vop, win, uv_vir, fb->pitches[1] >> 2);
+                VOP_WIN_SET(vop, win, uv_vir, DIV_ROUND_UP(fb->pitches[1], 4));
                 VOP_WIN_SET(vop, win, uv_mst, dma_addr);
         }
 
@@ -900,70 +894,34 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
                 return;
         }
 
-        /*
-         * If dclk rate is zero, mean that scanout is stop,
-         * we don't need wait any more.
-         */
-        if (clk_get_rate(vop->dclk)) {
-                /*
-                 * Rk3288 vop timing register is immediately, when configure
-                 * display timing on display time, may cause tearing.
-                 *
-                 * Vop standby will take effect at end of current frame,
-                 * if dsp hold valid irq happen, it means standby complete.
-                 *
-                 * mode set:
-                 *    standby and wait complete --> |----
-                 *                                  | display time
-                 *                                  |----
-                 *                                  |---> dsp hold irq
-                 *     configure display timing --> |
-                 *         standby exit             |
-                 *                                  | new frame start.
-                 */
-
-                reinit_completion(&vop->dsp_hold_completion);
-                vop_dsp_hold_valid_irq_enable(vop);
-
-                spin_lock(&vop->reg_lock);
-
-                VOP_CTRL_SET(vop, standby, 1);
-
-                spin_unlock(&vop->reg_lock);
-
-                wait_for_completion(&vop->dsp_hold_completion);
-
-                vop_dsp_hold_valid_irq_disable(vop);
-        }
-
         pin_pol = BIT(DCLK_INVERT);
         pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) ?
                    BIT(HSYNC_POSITIVE) : 0;
         pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) ?
                    BIT(VSYNC_POSITIVE) : 0;
-        VOP_CTRL_SET(vop, pin_pol, pin_pol);
+        VOP_REG_SET(vop, output, pin_pol, pin_pol);
 
         switch (s->output_type) {
         case DRM_MODE_CONNECTOR_LVDS:
-                VOP_CTRL_SET(vop, rgb_en, 1);
-                VOP_CTRL_SET(vop, rgb_pin_pol, pin_pol);
+                VOP_REG_SET(vop, output, rgb_en, 1);
+                VOP_REG_SET(vop, output, rgb_pin_pol, pin_pol);
                 break;
         case DRM_MODE_CONNECTOR_eDP:
-                VOP_CTRL_SET(vop, edp_pin_pol, pin_pol);
-                VOP_CTRL_SET(vop, edp_en, 1);
+                VOP_REG_SET(vop, output, edp_pin_pol, pin_pol);
+                VOP_REG_SET(vop, output, edp_en, 1);
                 break;
         case DRM_MODE_CONNECTOR_HDMIA:
-                VOP_CTRL_SET(vop, hdmi_pin_pol, pin_pol);
-                VOP_CTRL_SET(vop, hdmi_en, 1);
+                VOP_REG_SET(vop, output, hdmi_pin_pol, pin_pol);
+                VOP_REG_SET(vop, output, hdmi_en, 1);
                 break;
         case DRM_MODE_CONNECTOR_DSI:
-                VOP_CTRL_SET(vop, mipi_pin_pol, pin_pol);
-                VOP_CTRL_SET(vop, mipi_en, 1);
+                VOP_REG_SET(vop, output, mipi_pin_pol, pin_pol);
+                VOP_REG_SET(vop, output, mipi_en, 1);
                 break;
         case DRM_MODE_CONNECTOR_DisplayPort:
                 pin_pol &= ~BIT(DCLK_INVERT);
-                VOP_CTRL_SET(vop, dp_pin_pol, pin_pol);
-                VOP_CTRL_SET(vop, dp_en, 1);
+                VOP_REG_SET(vop, output, dp_pin_pol, pin_pol);
+                VOP_REG_SET(vop, output, dp_en, 1);
                 break;
         default:
                 DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n",
@@ -976,25 +934,25 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
         if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
             !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
                 s->output_mode = ROCKCHIP_OUT_MODE_P888;
-        VOP_CTRL_SET(vop, out_mode, s->output_mode);
+        VOP_REG_SET(vop, common, out_mode, s->output_mode);
 
-        VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
+        VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len);
         val = hact_st << 16;
         val |= hact_end;
-        VOP_CTRL_SET(vop, hact_st_end, val);
-        VOP_CTRL_SET(vop, hpost_st_end, val);
+        VOP_REG_SET(vop, modeset, hact_st_end, val);
+        VOP_REG_SET(vop, modeset, hpost_st_end, val);
 
-        VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+        VOP_REG_SET(vop, modeset, vtotal_pw, (vtotal << 16) | vsync_len);
         val = vact_st << 16;
         val |= vact_end;
-        VOP_CTRL_SET(vop, vact_st_end, val);
-        VOP_CTRL_SET(vop, vpost_st_end, val);
+        VOP_REG_SET(vop, modeset, vact_st_end, val);
+        VOP_REG_SET(vop, modeset, vpost_st_end, val);
 
-        VOP_CTRL_SET(vop, line_flag_num[0], vact_end);
+        VOP_REG_SET(vop, intr, line_flag_num[0], vact_end);
 
         clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
 
-        VOP_CTRL_SET(vop, standby, 0);
+        VOP_REG_SET(vop, common, standby, 0);
 
         rockchip_drm_psr_activate(&vop->crtc);
 }
@@ -1293,7 +1251,7 @@ static int vop_create_crtc(struct vop *vop)
                                                0, &vop_plane_funcs,
                                                win_data->phy->data_formats,
                                                win_data->phy->nformats,
-                                               win_data->type, NULL);
+                                               NULL, win_data->type, NULL);
                 if (ret) {
                         DRM_DEV_ERROR(vop->dev, "failed to init plane %d\n",
                                       ret);
@@ -1332,7 +1290,7 @@ static int vop_create_crtc(struct vop *vop)
                                                &vop_plane_funcs,
                                                win_data->phy->data_formats,
                                                win_data->phy->nformats,
-                                               win_data->type, NULL);
+                                               NULL, win_data->type, NULL);
                 if (ret) {
                         DRM_DEV_ERROR(vop->dev, "failed to init overlay %d\n",
                                       ret);
@@ -1398,7 +1356,6 @@ static void vop_destroy_crtc(struct vop *vop)
 static int vop_initial(struct vop *vop)
 {
         const struct vop_data *vop_data = vop->data;
-        const struct vop_reg_data *init_table = vop_data->init_table;
         struct reset_control *ahb_rst;
         int i, ret;
 
@@ -1458,13 +1415,16 @@ static int vop_initial(struct vop *vop)
 
         memcpy(vop->regsbak, vop->regs, vop->len);
 
-        for (i = 0; i < vop_data->table_size; i++)
-                vop_writel(vop, init_table[i].offset, init_table[i].value);
+        VOP_REG_SET(vop, misc, global_regdone_en, 1);
+        VOP_REG_SET(vop, common, dsp_blank, 0);
 
         for (i = 0; i < vop_data->win_size; i++) {
                 const struct vop_win_data *win = &vop_data->win[i];
+                int channel = i * 2 + 1;
 
+                VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel);
                 VOP_WIN_SET(vop, win, enable, 0);
+                VOP_WIN_SET(vop, win, gate, 1);
         }
 
         vop_cfg_done(vop);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 9979fd0c2282..56bbd2e2a8ef 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -15,6 +15,14 @@
 #ifndef _ROCKCHIP_DRM_VOP_H
 #define _ROCKCHIP_DRM_VOP_H
 
+/*
+ * major: IP major version, used for IP structure
+ * minor: big feature change under same structure
+ */
+#define VOP_VERSION(major, minor)       ((major) << 8 | (minor))
+#define VOP_MAJOR(version)              ((version) >> 8)
+#define VOP_MINOR(version)              ((version) & 0xff)
+
 enum vop_data_format {
         VOP_FMT_ARGB8888 = 0,
         VOP_FMT_RGB888,
@@ -24,53 +32,58 @@ enum vop_data_format {
         VOP_FMT_YUV444SP,
 };
 
-struct vop_reg_data {
-        uint32_t offset;
-        uint32_t value;
-};
-
 struct vop_reg {
-        uint32_t offset;
-        uint32_t shift;
         uint32_t mask;
+        uint16_t offset;
+        uint8_t shift;
         bool write_mask;
+        bool relaxed;
 };
 
-struct vop_ctrl {
-        struct vop_reg standby;
-        struct vop_reg data_blank;
-        struct vop_reg gate_en;
-        struct vop_reg mmu_en;
-        struct vop_reg rgb_en;
-        struct vop_reg edp_en;
-        struct vop_reg hdmi_en;
-        struct vop_reg mipi_en;
-        struct vop_reg dp_en;
-        struct vop_reg out_mode;
-        struct vop_reg dither_down;
-        struct vop_reg dither_up;
-        struct vop_reg pin_pol;
-        struct vop_reg rgb_pin_pol;
-        struct vop_reg hdmi_pin_pol;
-        struct vop_reg edp_pin_pol;
-        struct vop_reg mipi_pin_pol;
-        struct vop_reg dp_pin_pol;
-
+struct vop_modeset {
         struct vop_reg htotal_pw;
         struct vop_reg hact_st_end;
+        struct vop_reg hpost_st_end;
         struct vop_reg vtotal_pw;
         struct vop_reg vact_st_end;
-        struct vop_reg hpost_st_end;
         struct vop_reg vpost_st_end;
+};
 
-        struct vop_reg line_flag_num[2];
+struct vop_output {
+        struct vop_reg pin_pol;
+        struct vop_reg dp_pin_pol;
+        struct vop_reg edp_pin_pol;
+        struct vop_reg hdmi_pin_pol;
+        struct vop_reg mipi_pin_pol;
+        struct vop_reg rgb_pin_pol;
+        struct vop_reg dp_en;
+        struct vop_reg edp_en;
+        struct vop_reg hdmi_en;
+        struct vop_reg mipi_en;
+        struct vop_reg rgb_en;
+};
 
+struct vop_common {
         struct vop_reg cfg_done;
+        struct vop_reg dsp_blank;
+        struct vop_reg data_blank;
+        struct vop_reg dither_down;
+        struct vop_reg dither_up;
+        struct vop_reg gate_en;
+        struct vop_reg mmu_en;
+        struct vop_reg out_mode;
+        struct vop_reg standby;
+};
+
+struct vop_misc {
+        struct vop_reg global_regdone_en;
 };
 
 struct vop_intr {
         const int *intrs;
         uint32_t nintrs;
+
+        struct vop_reg line_flag_num[2];
         struct vop_reg enable;
         struct vop_reg clear;
         struct vop_reg status;
@@ -115,6 +128,7 @@ struct vop_win_phy {
         uint32_t nformats;
 
         struct vop_reg enable;
+        struct vop_reg gate;
         struct vop_reg format;
         struct vop_reg rb_swap;
         struct vop_reg act_info;
@@ -127,6 +141,7 @@ struct vop_win_phy {
 
         struct vop_reg dst_alpha_ctl;
         struct vop_reg src_alpha_ctl;
+        struct vop_reg channel;
 };
 
 struct vop_win_data {
@@ -136,10 +151,12 @@ struct vop_win_data {
 };
 
 struct vop_data {
-        const struct vop_reg_data *init_table;
-        unsigned int table_size;
-        const struct vop_ctrl *ctrl;
+        uint32_t version;
         const struct vop_intr *intr;
+        const struct vop_common *common;
+        const struct vop_misc *misc;
+        const struct vop_modeset *modeset;
+        const struct vop_output *output;
         const struct vop_win_data *win;
         unsigned int win_size;
 
@@ -282,6 +299,9 @@ static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
 
         act_height = (src_h + vskiplines - 1) / vskiplines;
 
+        if (act_height == dst_h)
+                return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines;
+
         return GET_SCL_FT_BILI_DN(act_height, dst_h);
 }
 
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index bafd698a28b1..94de7b9f6fde 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -20,17 +20,23 @@
 #include "rockchip_drm_vop.h"
 #include "rockchip_vop_reg.h"
 
-#define VOP_REG(off, _mask, s) \
-                {.offset = off, \
+#define _VOP_REG(off, _mask, _shift, _write_mask, _relaxed) \
+                { \
+                 .offset = off, \
                  .mask = _mask, \
-                 .shift = s, \
-                 .write_mask = false,}
+                 .shift = _shift, \
+                 .write_mask = _write_mask, \
+                 .relaxed = _relaxed, \
+                }
 
-#define VOP_REG_MASK(off, _mask, s) \
-                {.offset = off, \
-                 .mask = _mask, \
-                 .shift = s, \
-                 .write_mask = true,}
+#define VOP_REG(off, _mask, _shift) \
+                _VOP_REG(off, _mask, _shift, false, true)
+
+#define VOP_REG_SYNC(off, _mask, _shift) \
+                _VOP_REG(off, _mask, _shift, false, false)
+
+#define VOP_REG_MASK_SYNC(off, _mask, _shift) \
+                _VOP_REG(off, _mask, _shift, true, false)
 
 static const uint32_t formats_win_full[] = {
         DRM_FORMAT_XRGB8888,
@@ -110,32 +116,35 @@ static const int rk3036_vop_intrs[] = {
 static const struct vop_intr rk3036_intr = {
         .intrs = rk3036_vop_intrs,
         .nintrs = ARRAY_SIZE(rk3036_vop_intrs),
-        .status = VOP_REG(RK3036_INT_STATUS, 0xf, 0),
-        .enable = VOP_REG(RK3036_INT_STATUS, 0xf, 4),
-        .clear = VOP_REG(RK3036_INT_STATUS, 0xf, 8),
+        .line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
+        .status = VOP_REG_SYNC(RK3036_INT_STATUS, 0xf, 0),
+        .enable = VOP_REG_SYNC(RK3036_INT_STATUS, 0xf, 4),
+        .clear = VOP_REG_SYNC(RK3036_INT_STATUS, 0xf, 8),
 };
 
-static const struct vop_ctrl rk3036_ctrl_data = {
-        .standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30),
-        .out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
-        .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
+static const struct vop_modeset rk3036_modeset = {
         .htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
         .hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
         .vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
         .vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
-        .line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
-        .cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0),
 };
 
-static const struct vop_reg_data rk3036_vop_init_reg_table[] = {
-        {RK3036_DSP_CTRL1, 0x00000000},
+static const struct vop_output rk3036_output = {
+        .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
+};
+
+static const struct vop_common rk3036_common = {
+        .standby = VOP_REG_SYNC(RK3036_SYS_CTRL, 0x1, 30),
+        .out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
+        .dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
+        .cfg_done = VOP_REG_SYNC(RK3036_REG_CFG_DONE, 0x1, 0),
 };
 
 static const struct vop_data rk3036_vop = {
-        .init_table = rk3036_vop_init_reg_table,
-        .table_size = ARRAY_SIZE(rk3036_vop_init_reg_table),
-        .ctrl = &rk3036_ctrl_data,
         .intr = &rk3036_intr,
+        .common = &rk3036_common,
+        .modeset = &rk3036_modeset,
+        .output = &rk3036_output,
         .win = rk3036_vop_win_data,
         .win_size = ARRAY_SIZE(rk3036_vop_win_data),
 };
@@ -188,12 +197,14 @@ static const struct vop_win_phy rk3288_win01_data = {
         .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
         .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
         .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
+        .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
 };
 
 static const struct vop_win_phy rk3288_win23_data = {
         .data_formats = formats_win_lite,
         .nformats = ARRAY_SIZE(formats_win_lite),
-        .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
+        .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4),
+        .gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
         .format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1),
         .rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12),
         .dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0),
@@ -204,40 +215,33 @@ static const struct vop_win_phy rk3288_win23_data = {
         .dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0),
 };
 
-static const struct vop_ctrl rk3288_ctrl_data = {
-        .standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
-        .gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
-        .mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
-        .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
-        .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
-        .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
-        .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
-        .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
-        .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
-        .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
-        .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
-        .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4),
+static const struct vop_modeset rk3288_modeset = {
         .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
         .hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
         .vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
         .vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0),
         .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
         .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
-        .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
-        .cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0),
 };
 
-static const struct vop_reg_data rk3288_init_reg_table[] = {
-        {RK3288_SYS_CTRL, 0x00c00000},
-        {RK3288_DSP_CTRL0, 0x00000000},
-        {RK3288_WIN0_CTRL0, 0x00000080},
-        {RK3288_WIN1_CTRL0, 0x00000080},
-        /* TODO: Win2/3 support multiple area function, but we haven't found
-         * a suitable way to use it yet, so let's just use them as other windows
-         * with only area 0 enabled.
-         */
-        {RK3288_WIN2_CTRL0, 0x00000010},
-        {RK3288_WIN3_CTRL0, 0x00000010},
+static const struct vop_output rk3288_output = {
+        .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4),
+        .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
+        .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
+        .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
+        .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
+};
+
+static const struct vop_common rk3288_common = {
+        .standby = VOP_REG_SYNC(RK3288_SYS_CTRL, 0x1, 22),
+        .gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
+        .mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
+        .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
+        .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
+        .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
+        .dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),
+        .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
+        .cfg_done = VOP_REG_SYNC(RK3288_REG_CFG_DONE, 0x1, 0),
 };
 
 /*
@@ -267,50 +271,24 @@ static const int rk3288_vop_intrs[] = {
 static const struct vop_intr rk3288_vop_intr = {
         .intrs = rk3288_vop_intrs,
         .nintrs = ARRAY_SIZE(rk3288_vop_intrs),
+        .line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
         .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
         .enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4),
         .clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8),
 };
 
 static const struct vop_data rk3288_vop = {
-        .init_table = rk3288_init_reg_table,
-        .table_size = ARRAY_SIZE(rk3288_init_reg_table),
+        .version = VOP_VERSION(3, 1),
         .feature = VOP_FEATURE_OUTPUT_RGB10,
         .intr = &rk3288_vop_intr,
-        .ctrl = &rk3288_ctrl_data,
+        .common = &rk3288_common,
+        .modeset = &rk3288_modeset,
+        .output = &rk3288_output,
         .win = rk3288_vop_win_data,
         .win_size = ARRAY_SIZE(rk3288_vop_win_data),
 };
 
-static const struct vop_ctrl rk3399_ctrl_data = {
-        .standby = VOP_REG(RK3399_SYS_CTRL, 0x1, 22),
-        .gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),
-        .dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
-        .rgb_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 12),
-        .hdmi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 13),
-        .edp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 14),
-        .mipi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 15),
-        .dither_down = VOP_REG(RK3399_DSP_CTRL1, 0xf, 1),
-        .dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),
-        .data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),
-        .out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),
-        .rgb_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 16),
-        .dp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 16),
-        .hdmi_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 20),
-        .edp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 24),
-        .mipi_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 28),
-        .htotal_pw = VOP_REG(RK3399_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
-        .hact_st_end = VOP_REG(RK3399_DSP_HACT_ST_END, 0x1fff1fff, 0),
-        .vtotal_pw = VOP_REG(RK3399_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
-        .vact_st_end = VOP_REG(RK3399_DSP_VACT_ST_END, 0x1fff1fff, 0),
-        .hpost_st_end = VOP_REG(RK3399_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
-        .vpost_st_end = VOP_REG(RK3399_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
-        .line_flag_num[0] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 0),
-        .line_flag_num[1] = VOP_REG(RK3399_LINE_FLAG, 0xffff, 16),
-        .cfg_done = VOP_REG_MASK(RK3399_REG_CFG_DONE, 0x1, 0),
-};
-
-static const int rk3399_vop_intrs[] = {
+static const int rk3368_vop_intrs[] = {
         FS_INTR,
         0, 0,
         LINE_FLAG_INTR,
@@ -320,69 +298,232 @@ static const int rk3399_vop_intrs[] = {
         DSP_HOLD_VALID_INTR,
 };
 
-static const struct vop_intr rk3399_vop_intr = {
-        .intrs = rk3399_vop_intrs,
-        .nintrs = ARRAY_SIZE(rk3399_vop_intrs),
-        .status = VOP_REG_MASK(RK3399_INTR_STATUS0, 0xffff, 0),
-        .enable = VOP_REG_MASK(RK3399_INTR_EN0, 0xffff, 0),
-        .clear = VOP_REG_MASK(RK3399_INTR_CLEAR0, 0xffff, 0),
+static const struct vop_intr rk3368_vop_intr = {
+        .intrs = rk3368_vop_intrs,
+        .nintrs = ARRAY_SIZE(rk3368_vop_intrs),
+        .line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
+        .line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
+        .status = VOP_REG_MASK_SYNC(RK3368_INTR_STATUS, 0x3fff, 0),
+        .enable = VOP_REG_MASK_SYNC(RK3368_INTR_EN, 0x3fff, 0),
+        .clear = VOP_REG_MASK_SYNC(RK3368_INTR_CLEAR, 0x3fff, 0),
 };
 
-static const struct vop_reg_data rk3399_init_reg_table[] = {
-        {RK3399_SYS_CTRL, 0x2000f800},
-        {RK3399_DSP_CTRL0, 0x00000000},
-        {RK3399_WIN0_CTRL0, 0x00000080},
-        {RK3399_WIN1_CTRL0, 0x00000080},
-        /* TODO: Win2/3 support multiple area function, but we haven't found
-         * a suitable way to use it yet, so let's just use them as other windows
-         * with only area 0 enabled.
-         */
-        {RK3399_WIN2_CTRL0, 0x00000010},
-        {RK3399_WIN3_CTRL0, 0x00000010},
+static const struct vop_win_phy rk3368_win23_data = {
+        .data_formats = formats_win_lite,
+        .nformats = ARRAY_SIZE(formats_win_lite),
+        .gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0),
+        .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
+        .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
+        .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
+        .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
+        .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
+        .yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
+        .yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),
+        .src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
+        .dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xff, 0),
+};
+
+static const struct vop_win_data rk3368_vop_win_data[] = {
+        { .base = 0x00, .phy = &rk3288_win01_data,
+          .type = DRM_PLANE_TYPE_PRIMARY },
+        { .base = 0x40, .phy = &rk3288_win01_data,
+          .type = DRM_PLANE_TYPE_OVERLAY },
+        { .base = 0x00, .phy = &rk3368_win23_data,
+          .type = DRM_PLANE_TYPE_OVERLAY },
+        { .base = 0x50, .phy = &rk3368_win23_data,
+          .type = DRM_PLANE_TYPE_CURSOR },
+};
+
+static const struct vop_output rk3368_output = {
+        .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 16),
+        .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 20),
+        .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 24),
+        .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 28),
+        .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
+        .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
+        .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
+        .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
+};
+
+static const struct vop_misc rk3368_misc = {
+        .global_regdone_en = VOP_REG(RK3368_SYS_CTRL, 0x1, 11),
+};
+
+static const struct vop_data rk3368_vop = {
+        .version = VOP_VERSION(3, 2),
+        .intr = &rk3368_vop_intr,
+        .common = &rk3288_common,
+        .modeset = &rk3288_modeset,
+        .output = &rk3368_output,
+        .misc = &rk3368_misc,
+        .win = rk3368_vop_win_data,
+        .win_size = ARRAY_SIZE(rk3368_vop_win_data),
+};
+
+static const struct vop_intr rk3366_vop_intr = {
+        .intrs = rk3368_vop_intrs,
+        .nintrs = ARRAY_SIZE(rk3368_vop_intrs),
+        .line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0),
+        .line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16),
+        .status = VOP_REG_MASK_SYNC(RK3366_INTR_STATUS0, 0xffff, 0),
+        .enable = VOP_REG_MASK_SYNC(RK3366_INTR_EN0, 0xffff, 0),
+        .clear = VOP_REG_MASK_SYNC(RK3366_INTR_CLEAR0, 0xffff, 0),
+};
+
+static const struct vop_data rk3366_vop = {
+        .version = VOP_VERSION(3, 4),
+        .intr = &rk3366_vop_intr,
+        .common = &rk3288_common,
+        .modeset = &rk3288_modeset,
+        .output = &rk3368_output,
+        .misc = &rk3368_misc,
+        .win = rk3368_vop_win_data,
+        .win_size = ARRAY_SIZE(rk3368_vop_win_data),
+};
+
+static const struct vop_output rk3399_output = {
+        .dp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 16),
+        .rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 16),
+        .hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 20),
+        .edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 24),
+        .mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 28),
+        .dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
+        .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
+        .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
+        .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
+        .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
 };
 
 static const struct vop_data rk3399_vop_big = {
-        .init_table = rk3399_init_reg_table,
-        .table_size = ARRAY_SIZE(rk3399_init_reg_table),
+        .version = VOP_VERSION(3, 5),
         .feature = VOP_FEATURE_OUTPUT_RGB10,
-        .intr = &rk3399_vop_intr,
-        .ctrl = &rk3399_ctrl_data,
-        /*
-         * rk3399 vop big windows register layout is same as rk3288.
-         */
-        .win = rk3288_vop_win_data,
-        .win_size = ARRAY_SIZE(rk3288_vop_win_data),
+        .intr = &rk3366_vop_intr,
+        .common = &rk3288_common,
+        .modeset = &rk3288_modeset,
+        .output = &rk3399_output,
+        .misc = &rk3368_misc,
+        .win = rk3368_vop_win_data,
+        .win_size = ARRAY_SIZE(rk3368_vop_win_data),
 };
 
 static const struct vop_win_data rk3399_vop_lit_win_data[] = {
         { .base = 0x00, .phy = &rk3288_win01_data,
           .type = DRM_PLANE_TYPE_PRIMARY },
-        { .base = 0x00, .phy = &rk3288_win23_data,
+        { .base = 0x00, .phy = &rk3368_win23_data,
           .type = DRM_PLANE_TYPE_CURSOR},
 };
 
 static const struct vop_data rk3399_vop_lit = {
-        .init_table = rk3399_init_reg_table,
-        .table_size = ARRAY_SIZE(rk3399_init_reg_table),
-        .intr = &rk3399_vop_intr,
-        .ctrl = &rk3399_ctrl_data,
-        /*
-         * rk3399 vop lit windows register layout is same as rk3288,
-         * but cut off the win1 and win3 windows.
-         */
+        .version = VOP_VERSION(3, 6),
+        .intr = &rk3366_vop_intr,
+        .common = &rk3288_common,
+        .modeset = &rk3288_modeset,
+        .output = &rk3399_output,
+        .misc = &rk3368_misc,
         .win = rk3399_vop_lit_win_data,
         .win_size = ARRAY_SIZE(rk3399_vop_lit_win_data),
 };
 
+static const struct vop_win_data rk3228_vop_win_data[] = {
+        { .base = 0x00, .phy = &rk3288_win01_data,
+          .type = DRM_PLANE_TYPE_PRIMARY },
+        { .base = 0x40, .phy = &rk3288_win01_data,
+          .type = DRM_PLANE_TYPE_CURSOR },
+};
+
+static const struct vop_data rk3228_vop = {
+        .version = VOP_VERSION(3, 7),
+        .feature = VOP_FEATURE_OUTPUT_RGB10,
+        .intr = &rk3366_vop_intr,
+        .common = &rk3288_common,
+        .modeset = &rk3288_modeset,
+        .output = &rk3399_output,
+        .misc = &rk3368_misc,
+        .win = rk3228_vop_win_data,
+        .win_size = ARRAY_SIZE(rk3228_vop_win_data),
+};
+
+static const struct vop_modeset rk3328_modeset = {
+        .htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+        .hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),
+        .vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+        .vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0),
+        .hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
+        .vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
+};
+
+static const struct vop_output rk3328_output = {
+        .rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
+        .hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
+        .edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
+        .mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
+        .rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 16),
+        .hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 20),
+        .edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 24),
+        .mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 28),
+};
+
+static const struct vop_misc rk3328_misc = {
+        .global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
+};
+
+static const struct vop_common rk3328_common = {
+        .standby = VOP_REG_SYNC(RK3328_SYS_CTRL, 0x1, 22),
+        .dither_down = VOP_REG(RK3328_DSP_CTRL1, 0xf, 1),
+        .dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),
+        .dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),
+        .out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0),
+        .cfg_done = VOP_REG_SYNC(RK3328_REG_CFG_DONE, 0x1, 0),
+};
+
+static const struct vop_intr rk3328_vop_intr = {
+        .intrs = rk3368_vop_intrs,
+        .nintrs = ARRAY_SIZE(rk3368_vop_intrs),
+        .line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0),
+        .line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16),
+        .status = VOP_REG_MASK_SYNC(RK3328_INTR_STATUS0, 0xffff, 0),
+        .enable = VOP_REG_MASK_SYNC(RK3328_INTR_EN0, 0xffff, 0),
+        .clear = VOP_REG_MASK_SYNC(RK3328_INTR_CLEAR0, 0xffff, 0),
+};
+
+static const struct vop_win_data rk3328_vop_win_data[] = {
+        { .base = 0xd0, .phy = &rk3288_win01_data,
+          .type = DRM_PLANE_TYPE_PRIMARY },
+        { .base = 0x1d0, .phy = &rk3288_win01_data,
+          .type = DRM_PLANE_TYPE_OVERLAY },
+        { .base = 0x2d0, .phy = &rk3288_win01_data,
+          .type = DRM_PLANE_TYPE_CURSOR },
+};
+
+static const struct vop_data rk3328_vop = {
+        .version = VOP_VERSION(3, 8),
+        .feature = VOP_FEATURE_OUTPUT_RGB10,
+        .intr = &rk3328_vop_intr,
+        .common = &rk3328_common,
+        .modeset = &rk3328_modeset,
+        .output = &rk3328_output,
+        .misc = &rk3328_misc,
+        .win = rk3328_vop_win_data,
+        .win_size = ARRAY_SIZE(rk3328_vop_win_data),
+};
+
 static const struct of_device_id vop_driver_dt_match[] = {
         { .compatible = "rockchip,rk3036-vop",
           .data = &rk3036_vop },
         { .compatible = "rockchip,rk3288-vop",
           .data = &rk3288_vop },
+        { .compatible = "rockchip,rk3368-vop",
+          .data = &rk3368_vop },
+        { .compatible = "rockchip,rk3366-vop",
+          .data = &rk3366_vop },
         { .compatible = "rockchip,rk3399-vop-big",
           .data = &rk3399_vop_big },
         { .compatible = "rockchip,rk3399-vop-lit",
           .data = &rk3399_vop_lit },
+        { .compatible = "rockchip,rk3228-vop",
+          .data = &rk3228_vop },
+        { .compatible = "rockchip,rk3328-vop",
+          .data = &rk3328_vop },
         {},
 };
 MODULE_DEVICE_TABLE(of, vop_driver_dt_match);
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
index cd197260ece5..4a4799ff65de 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
@@ -41,6 +41,7 @@
 #define RK3288_WIN0_SRC_ALPHA_CTRL              0x0060
 #define RK3288_WIN0_DST_ALPHA_CTRL              0x0064
 #define RK3288_WIN0_FADING_CTRL                 0x0068
+#define RK3288_WIN0_CTRL2                       0x006c
 
 /* win1 register */
 #define RK3288_WIN1_CTRL0                       0x0070
@@ -122,6 +123,717 @@
 #define RK3288_DSP_VACT_ST_END_F1               0x019c
 /* register definition end */
 
+/* rk3368 register definition */
+#define RK3368_REG_CFG_DONE                     0x0000
+#define RK3368_VERSION_INFO                     0x0004
+#define RK3368_SYS_CTRL                         0x0008
+#define RK3368_SYS_CTRL1                        0x000c
+#define RK3368_DSP_CTRL0                        0x0010
+#define RK3368_DSP_CTRL1                        0x0014
+#define RK3368_DSP_BG                           0x0018
+#define RK3368_MCU_CTRL                         0x001c
+#define RK3368_LINE_FLAG                        0x0020
+#define RK3368_INTR_EN                          0x0024
+#define RK3368_INTR_CLEAR                       0x0028
+#define RK3368_INTR_STATUS                      0x002c
+#define RK3368_WIN0_CTRL0                       0x0030
+#define RK3368_WIN0_CTRL1                       0x0034
+#define RK3368_WIN0_COLOR_KEY                   0x0038
+#define RK3368_WIN0_VIR                         0x003c
+#define RK3368_WIN0_YRGB_MST                    0x0040
+#define RK3368_WIN0_CBR_MST                     0x0044
+#define RK3368_WIN0_ACT_INFO                    0x0048
+#define RK3368_WIN0_DSP_INFO                    0x004c
+#define RK3368_WIN0_DSP_ST                      0x0050
+#define RK3368_WIN0_SCL_FACTOR_YRGB             0x0054
+#define RK3368_WIN0_SCL_FACTOR_CBR              0x0058
+#define RK3368_WIN0_SCL_OFFSET                  0x005c
+#define RK3368_WIN0_SRC_ALPHA_CTRL              0x0060
+#define RK3368_WIN0_DST_ALPHA_CTRL              0x0064
+#define RK3368_WIN0_FADING_CTRL                 0x0068
+#define RK3368_WIN0_CTRL2                       0x006c
+#define RK3368_WIN1_CTRL0                       0x0070
+#define RK3368_WIN1_CTRL1                       0x0074
+#define RK3368_WIN1_COLOR_KEY                   0x0078
+#define RK3368_WIN1_VIR                         0x007c
+#define RK3368_WIN1_YRGB_MST                    0x0080
+#define RK3368_WIN1_CBR_MST                     0x0084
+#define RK3368_WIN1_ACT_INFO                    0x0088
+#define RK3368_WIN1_DSP_INFO                    0x008c
+#define RK3368_WIN1_DSP_ST                      0x0090
+#define RK3368_WIN1_SCL_FACTOR_YRGB             0x0094
+#define RK3368_WIN1_SCL_FACTOR_CBR              0x0098
+#define RK3368_WIN1_SCL_OFFSET                  0x009c
+#define RK3368_WIN1_SRC_ALPHA_CTRL              0x00a0
+#define RK3368_WIN1_DST_ALPHA_CTRL              0x00a4
+#define RK3368_WIN1_FADING_CTRL                 0x00a8
+#define RK3368_WIN1_CTRL2                       0x00ac
+#define RK3368_WIN2_CTRL0                       0x00b0
+#define RK3368_WIN2_CTRL1                       0x00b4
+#define RK3368_WIN2_VIR0_1                      0x00b8
+#define RK3368_WIN2_VIR2_3                      0x00bc
+#define RK3368_WIN2_MST0                        0x00c0
+#define RK3368_WIN2_DSP_INFO0                   0x00c4
+#define RK3368_WIN2_DSP_ST0                     0x00c8
+#define RK3368_WIN2_COLOR_KEY                   0x00cc
+#define RK3368_WIN2_MST1                        0x00d0
+#define RK3368_WIN2_DSP_INFO1                   0x00d4
+#define RK3368_WIN2_DSP_ST1                     0x00d8
+#define RK3368_WIN2_SRC_ALPHA_CTRL              0x00dc
+#define RK3368_WIN2_MST2                        0x00e0
+#define RK3368_WIN2_DSP_INFO2                   0x00e4
+#define RK3368_WIN2_DSP_ST2                     0x00e8
+#define RK3368_WIN2_DST_ALPHA_CTRL              0x00ec
+#define RK3368_WIN2_MST3                        0x00f0
+#define RK3368_WIN2_DSP_INFO3                   0x00f4
+#define RK3368_WIN2_DSP_ST3                     0x00f8
+#define RK3368_WIN2_FADING_CTRL                 0x00fc
+#define RK3368_WIN3_CTRL0                       0x0100
+#define RK3368_WIN3_CTRL1                       0x0104
+#define RK3368_WIN3_VIR0_1                      0x0108
+#define RK3368_WIN3_VIR2_3                      0x010c
+#define RK3368_WIN3_MST0                        0x0110
+#define RK3368_WIN3_DSP_INFO0                   0x0114
+#define RK3368_WIN3_DSP_ST0                     0x0118
+#define RK3368_WIN3_COLOR_KEY                   0x011c
+#define RK3368_WIN3_MST1                        0x0120
+#define RK3368_WIN3_DSP_INFO1                   0x0124
+#define RK3368_WIN3_DSP_ST1                     0x0128
+#define RK3368_WIN3_SRC_ALPHA_CTRL              0x012c
+#define RK3368_WIN3_MST2                        0x0130
+#define RK3368_WIN3_DSP_INFO2                   0x0134
+#define RK3368_WIN3_DSP_ST2                     0x0138
+#define RK3368_WIN3_DST_ALPHA_CTRL              0x013c
+#define RK3368_WIN3_MST3                        0x0140
+#define RK3368_WIN3_DSP_INFO3                   0x0144
+#define RK3368_WIN3_DSP_ST3                     0x0148
+#define RK3368_WIN3_FADING_CTRL                 0x014c
+#define RK3368_HWC_CTRL0                        0x0150
+#define RK3368_HWC_CTRL1                        0x0154
+#define RK3368_HWC_MST                          0x0158
+#define RK3368_HWC_DSP_ST                       0x015c
+#define RK3368_HWC_SRC_ALPHA_CTRL               0x0160
+#define RK3368_HWC_DST_ALPHA_CTRL               0x0164
+#define RK3368_HWC_FADING_CTRL                  0x0168
+#define RK3368_HWC_RESERVED1                    0x016c
+#define RK3368_POST_DSP_HACT_INFO               0x0170
+#define RK3368_POST_DSP_VACT_INFO               0x0174
+#define RK3368_POST_SCL_FACTOR_YRGB             0x0178
+#define RK3368_POST_RESERVED                    0x017c
+#define RK3368_POST_SCL_CTRL                    0x0180
+#define RK3368_POST_DSP_VACT_INFO_F1            0x0184
+#define RK3368_DSP_HTOTAL_HS_END                0x0188
+#define RK3368_DSP_HACT_ST_END                  0x018c
+#define RK3368_DSP_VTOTAL_VS_END                0x0190
+#define RK3368_DSP_VACT_ST_END                  0x0194
+#define RK3368_DSP_VS_ST_END_F1                 0x0198
+#define RK3368_DSP_VACT_ST_END_F1               0x019c
+#define RK3368_PWM_CTRL                         0x01a0
+#define RK3368_PWM_PERIOD_HPR                   0x01a4
+#define RK3368_PWM_DUTY_LPR                     0x01a8
+#define RK3368_PWM_CNT                          0x01ac
+#define RK3368_BCSH_COLOR_BAR                   0x01b0
+#define RK3368_BCSH_BCS                         0x01b4
+#define RK3368_BCSH_H                           0x01b8
+#define RK3368_BCSH_CTRL                        0x01bc
+#define RK3368_CABC_CTRL0                       0x01c0
+#define RK3368_CABC_CTRL1                       0x01c4
+#define RK3368_CABC_CTRL2                       0x01c8
+#define RK3368_CABC_CTRL3                       0x01cc
+#define RK3368_CABC_GAUSS_LINE0_0               0x01d0
+#define RK3368_CABC_GAUSS_LINE0_1               0x01d4
+#define RK3368_CABC_GAUSS_LINE1_0               0x01d8
+#define RK3368_CABC_GAUSS_LINE1_1               0x01dc
+#define RK3368_CABC_GAUSS_LINE2_0               0x01e0
+#define RK3368_CABC_GAUSS_LINE2_1               0x01e4
+#define RK3368_FRC_LOWER01_0                    0x01e8
+#define RK3368_FRC_LOWER01_1                    0x01ec
+#define RK3368_FRC_LOWER10_0                    0x01f0
+#define RK3368_FRC_LOWER10_1                    0x01f4
+#define RK3368_FRC_LOWER11_0                    0x01f8
+#define RK3368_FRC_LOWER11_1                    0x01fc
+#define RK3368_IFBDC_CTRL                       0x0200
+#define RK3368_IFBDC_TILES_NUM                  0x0204
+#define RK3368_IFBDC_FRAME_RST_CYCLE            0x0208
+#define RK3368_IFBDC_BASE_ADDR                  0x020c
+#define RK3368_IFBDC_MB_SIZE                    0x0210
+#define RK3368_IFBDC_CMP_INDEX_INIT             0x0214
+#define RK3368_IFBDC_VIR                        0x0220
+#define RK3368_IFBDC_DEBUG0                     0x0230
+#define RK3368_IFBDC_DEBUG1                     0x0234
+#define RK3368_LATENCY_CTRL0                    0x0250
+#define RK3368_RD_MAX_LATENCY_NUM0              0x0254
+#define RK3368_RD_LATENCY_THR_NUM0              0x0258
+#define RK3368_RD_LATENCY_SAMP_NUM0             0x025c
+#define RK3368_WIN0_DSP_BG                      0x0260
+#define RK3368_WIN1_DSP_BG                      0x0264
+#define RK3368_WIN2_DSP_BG                      0x0268
+#define RK3368_WIN3_DSP_BG                      0x026c
+#define RK3368_SCAN_LINE_NUM                    0x0270
+#define RK3368_CABC_DEBUG0                      0x0274
+#define RK3368_CABC_DEBUG1                      0x0278
+#define RK3368_CABC_DEBUG2                      0x027c
+#define RK3368_DBG_REG_000                      0x0280
+#define RK3368_DBG_REG_001                      0x0284
+#define RK3368_DBG_REG_002                      0x0288
+#define RK3368_DBG_REG_003                      0x028c
+#define RK3368_DBG_REG_004                      0x0290
+#define RK3368_DBG_REG_005                      0x0294
+#define RK3368_DBG_REG_006                      0x0298
+#define RK3368_DBG_REG_007                      0x029c
+#define RK3368_DBG_REG_008                      0x02a0
+#define RK3368_DBG_REG_016                      0x02c0
+#define RK3368_DBG_REG_017                      0x02c4
+#define RK3368_DBG_REG_018                      0x02c8
+#define RK3368_DBG_REG_019                      0x02cc
+#define RK3368_DBG_REG_020                      0x02d0
+#define RK3368_DBG_REG_021                      0x02d4
+#define RK3368_DBG_REG_022                      0x02d8
+#define RK3368_DBG_REG_023                      0x02dc
+#define RK3368_DBG_REG_028                      0x02f0
+#define RK3368_MMU_DTE_ADDR                     0x0300
+#define RK3368_MMU_STATUS                       0x0304
+#define RK3368_MMU_COMMAND                      0x0308
+#define RK3368_MMU_PAGE_FAULT_ADDR              0x030c
+#define RK3368_MMU_ZAP_ONE_LINE                 0x0310
+#define RK3368_MMU_INT_RAWSTAT                  0x0314
+#define RK3368_MMU_INT_CLEAR                    0x0318
+#define RK3368_MMU_INT_MASK                     0x031c
+#define RK3368_MMU_INT_STATUS                   0x0320
+#define RK3368_MMU_AUTO_GATING                  0x0324
+#define RK3368_WIN2_LUT_ADDR                    0x0400
+#define RK3368_WIN3_LUT_ADDR                    0x0800
+#define RK3368_HWC_LUT_ADDR                     0x0c00
+#define RK3368_GAMMA_LUT_ADDR                   0x1000
+#define RK3368_CABC_GAMMA_LUT_ADDR              0x1800
+#define RK3368_MCU_BYPASS_WPORT                 0x2200
+#define RK3368_MCU_BYPASS_RPORT                 0x2300
+/* rk3368 register definition end */
+
+#define RK3366_REG_CFG_DONE                     0x0000
+#define RK3366_VERSION_INFO                     0x0004
+#define RK3366_SYS_CTRL                         0x0008
+#define RK3366_SYS_CTRL1                        0x000c
+#define RK3366_DSP_CTRL0                        0x0010
+#define RK3366_DSP_CTRL1                        0x0014
+#define RK3366_DSP_BG                           0x0018
+#define RK3366_MCU_CTRL                         0x001c
+#define RK3366_WB_CTRL0                         0x0020
+#define RK3366_WB_CTRL1                         0x0024
+#define RK3366_WB_YRGB_MST                      0x0028
+#define RK3366_WB_CBR_MST                       0x002c
+#define RK3366_WIN0_CTRL0                       0x0030
+#define RK3366_WIN0_CTRL1                       0x0034
+#define RK3366_WIN0_COLOR_KEY                   0x0038
+#define RK3366_WIN0_VIR                         0x003c
+#define RK3366_WIN0_YRGB_MST                    0x0040
+#define RK3366_WIN0_CBR_MST                     0x0044
+#define RK3366_WIN0_ACT_INFO                    0x0048
+#define RK3366_WIN0_DSP_INFO                    0x004c
+#define RK3366_WIN0_DSP_ST                      0x0050
+#define RK3366_WIN0_SCL_FACTOR_YRGB             0x0054
+#define RK3366_WIN0_SCL_FACTOR_CBR              0x0058
+#define RK3366_WIN0_SCL_OFFSET                  0x005c
+#define RK3366_WIN0_SRC_ALPHA_CTRL              0x0060
+#define RK3366_WIN0_DST_ALPHA_CTRL              0x0064
+#define RK3366_WIN0_FADING_CTRL                 0x0068
+#define RK3366_WIN0_CTRL2                       0x006c
+#define RK3366_WIN1_CTRL0                       0x0070
+#define RK3366_WIN1_CTRL1                       0x0074
+#define RK3366_WIN1_COLOR_KEY                   0x0078
+#define RK3366_WIN1_VIR                         0x007c
+#define RK3366_WIN1_YRGB_MST                    0x0080
+#define RK3366_WIN1_CBR_MST                     0x0084
+#define RK3366_WIN1_ACT_INFO                    0x0088
+#define RK3366_WIN1_DSP_INFO                    0x008c
+#define RK3366_WIN1_DSP_ST                      0x0090
+#define RK3366_WIN1_SCL_FACTOR_YRGB             0x0094
+#define RK3366_WIN1_SCL_FACTOR_CBR              0x0098
+#define RK3366_WIN1_SCL_OFFSET                  0x009c
+#define RK3366_WIN1_SRC_ALPHA_CTRL              0x00a0
+#define RK3366_WIN1_DST_ALPHA_CTRL              0x00a4
+#define RK3366_WIN1_FADING_CTRL                 0x00a8
+#define RK3366_WIN1_CTRL2                       0x00ac
+#define RK3366_WIN2_CTRL0                       0x00b0
+#define RK3366_WIN2_CTRL1                       0x00b4
+#define RK3366_WIN2_VIR0_1                      0x00b8
+#define RK3366_WIN2_VIR2_3                      0x00bc
+#define RK3366_WIN2_MST0                        0x00c0
+#define RK3366_WIN2_DSP_INFO0                   0x00c4
+#define RK3366_WIN2_DSP_ST0                     0x00c8
+#define RK3366_WIN2_COLOR_KEY                   0x00cc
+#define RK3366_WIN2_MST1                        0x00d0
+#define RK3366_WIN2_DSP_INFO1                   0x00d4
+#define RK3366_WIN2_DSP_ST1                     0x00d8
+#define RK3366_WIN2_SRC_ALPHA_CTRL              0x00dc
+#define RK3366_WIN2_MST2                        0x00e0
+#define RK3366_WIN2_DSP_INFO2                   0x00e4
+#define RK3366_WIN2_DSP_ST2                     0x00e8
+#define RK3366_WIN2_DST_ALPHA_CTRL              0x00ec
+#define RK3366_WIN2_MST3                        0x00f0
+#define RK3366_WIN2_DSP_INFO3                   0x00f4
+#define RK3366_WIN2_DSP_ST3                     0x00f8
+#define RK3366_WIN2_FADING_CTRL                 0x00fc
+#define RK3366_WIN3_CTRL0                       0x0100
+#define RK3366_WIN3_CTRL1                       0x0104
+#define RK3366_WIN3_VIR0_1                      0x0108
+#define RK3366_WIN3_VIR2_3                      0x010c
+#define RK3366_WIN3_MST0                        0x0110
+#define RK3366_WIN3_DSP_INFO0                   0x0114
+#define RK3366_WIN3_DSP_ST0                     0x0118
+#define RK3366_WIN3_COLOR_KEY                   0x011c
+#define RK3366_WIN3_MST1                        0x0120
+#define RK3366_WIN3_DSP_INFO1                   0x0124
+#define RK3366_WIN3_DSP_ST1                     0x0128
+#define RK3366_WIN3_SRC_ALPHA_CTRL              0x012c
+#define RK3366_WIN3_MST2                        0x0130
+#define RK3366_WIN3_DSP_INFO2                   0x0134
+#define RK3366_WIN3_DSP_ST2                     0x0138
+#define RK3366_WIN3_DST_ALPHA_CTRL              0x013c
+#define RK3366_WIN3_MST3                        0x0140
+#define RK3366_WIN3_DSP_INFO3                   0x0144
+#define RK3366_WIN3_DSP_ST3                     0x0148
+#define RK3366_WIN3_FADING_CTRL                 0x014c
+#define RK3366_HWC_CTRL0                        0x0150
+#define RK3366_HWC_CTRL1                        0x0154
+#define RK3366_HWC_MST                          0x0158
+#define RK3366_HWC_DSP_ST                       0x015c
+#define RK3366_HWC_SRC_ALPHA_CTRL               0x0160
+#define RK3366_HWC_DST_ALPHA_CTRL               0x0164
+#define RK3366_HWC_FADING_CTRL                  0x0168
+#define RK3366_HWC_RESERVED1                    0x016c
+#define RK3366_POST_DSP_HACT_INFO               0x0170
+#define RK3366_POST_DSP_VACT_INFO               0x0174
+#define RK3366_POST_SCL_FACTOR_YRGB             0x0178
+#define RK3366_POST_RESERVED                    0x017c
+#define RK3366_POST_SCL_CTRL                    0x0180
+#define RK3366_POST_DSP_VACT_INFO_F1            0x0184
+#define RK3366_DSP_HTOTAL_HS_END                0x0188
+#define RK3366_DSP_HACT_ST_END                  0x018c
+#define RK3366_DSP_VTOTAL_VS_END                0x0190
+#define RK3366_DSP_VACT_ST_END                  0x0194
+#define RK3366_DSP_VS_ST_END_F1                 0x0198
+#define RK3366_DSP_VACT_ST_END_F1               0x019c
+#define RK3366_PWM_CTRL                         0x01a0
+#define RK3366_PWM_PERIOD_HPR                   0x01a4
+#define RK3366_PWM_DUTY_LPR                     0x01a8
+#define RK3366_PWM_CNT                          0x01ac
+#define RK3366_BCSH_COLOR_BAR                   0x01b0
+#define RK3366_BCSH_BCS                         0x01b4
+#define RK3366_BCSH_H                           0x01b8
+#define RK3366_BCSH_CTRL                        0x01bc
+#define RK3366_CABC_CTRL0                       0x01c0
+#define RK3366_CABC_CTRL1                       0x01c4
+#define RK3366_CABC_CTRL2                       0x01c8
+#define RK3366_CABC_CTRL3                       0x01cc
+#define RK3366_CABC_GAUSS_LINE0_0               0x01d0
+#define RK3366_CABC_GAUSS_LINE0_1               0x01d4
+#define RK3366_CABC_GAUSS_LINE1_0               0x01d8
+#define RK3366_CABC_GAUSS_LINE1_1               0x01dc
+#define RK3366_CABC_GAUSS_LINE2_0               0x01e0
+#define RK3366_CABC_GAUSS_LINE2_1               0x01e4
+#define RK3366_FRC_LOWER01_0                    0x01e8
+#define RK3366_FRC_LOWER01_1                    0x01ec
+#define RK3366_FRC_LOWER10_0                    0x01f0
+#define RK3366_FRC_LOWER10_1                    0x01f4
+#define RK3366_FRC_LOWER11_0                    0x01f8
+#define RK3366_FRC_LOWER11_1                    0x01fc
+#define RK3366_INTR_EN0                         0x0280
+#define RK3366_INTR_CLEAR0                      0x0284
+#define RK3366_INTR_STATUS0                     0x0288
+#define RK3366_INTR_RAW_STATUS0                 0x028c
+#define RK3366_INTR_EN1                         0x0290
+#define RK3366_INTR_CLEAR1                      0x0294
+#define RK3366_INTR_STATUS1                     0x0298
+#define RK3366_INTR_RAW_STATUS1                 0x029c
+#define RK3366_LINE_FLAG                        0x02a0
+#define RK3366_VOP_STATUS                       0x02a4
+#define RK3366_BLANKING_VALUE                   0x02a8
+#define RK3366_WIN0_DSP_BG                      0x02b0
+#define RK3366_WIN1_DSP_BG                      0x02b4
+#define RK3366_WIN2_DSP_BG                      0x02b8
+#define RK3366_WIN3_DSP_BG                      0x02bc
+#define RK3366_WIN2_LUT_ADDR                    0x0400
+#define RK3366_WIN3_LUT_ADDR                    0x0800
+#define RK3366_HWC_LUT_ADDR                     0x0c00
+#define RK3366_GAMMA0_LUT_ADDR                  0x1000
+#define RK3366_GAMMA1_LUT_ADDR                  0x1400
+#define RK3366_CABC_GAMMA_LUT_ADDR              0x1800
+#define RK3366_MCU_BYPASS_WPORT                 0x2200
+#define RK3366_MCU_BYPASS_RPORT                 0x2300
+#define RK3366_MMU_DTE_ADDR                     0x2400
+#define RK3366_MMU_STATUS                       0x2404
+#define RK3366_MMU_COMMAND                      0x2408
+#define RK3366_MMU_PAGE_FAULT_ADDR              0x240c
+#define RK3366_MMU_ZAP_ONE_LINE                 0x2410
+#define RK3366_MMU_INT_RAWSTAT                  0x2414
+#define RK3366_MMU_INT_CLEAR                    0x2418
+#define RK3366_MMU_INT_MASK                     0x241c
+#define RK3366_MMU_INT_STATUS                   0x2420
+#define RK3366_MMU_AUTO_GATING                  0x2424
+
+/* rk3399 register definition */
+#define RK3399_REG_CFG_DONE                     0x0000
+#define RK3399_VERSION_INFO                     0x0004
+#define RK3399_SYS_CTRL                         0x0008
+#define RK3399_SYS_CTRL1                        0x000c
+#define RK3399_DSP_CTRL0                        0x0010
+#define RK3399_DSP_CTRL1                        0x0014
+#define RK3399_DSP_BG                           0x0018
+#define RK3399_MCU_CTRL                         0x001c
+#define RK3399_WB_CTRL0                         0x0020
+#define RK3399_WB_CTRL1                         0x0024
+#define RK3399_WB_YRGB_MST                      0x0028
+#define RK3399_WB_CBR_MST                       0x002c
+#define RK3399_WIN0_CTRL0                       0x0030
+#define RK3399_WIN0_CTRL1                       0x0034
+#define RK3399_WIN0_COLOR_KEY                   0x0038
+#define RK3399_WIN0_VIR                         0x003c
+#define RK3399_WIN0_YRGB_MST                    0x0040
+#define RK3399_WIN0_CBR_MST                     0x0044
+#define RK3399_WIN0_ACT_INFO                    0x0048
+#define RK3399_WIN0_DSP_INFO                    0x004c
+#define RK3399_WIN0_DSP_ST                      0x0050
+#define RK3399_WIN0_SCL_FACTOR_YRGB             0x0054
+#define RK3399_WIN0_SCL_FACTOR_CBR              0x0058
+#define RK3399_WIN0_SCL_OFFSET                  0x005c
+#define RK3399_WIN0_SRC_ALPHA_CTRL              0x0060
+#define RK3399_WIN0_DST_ALPHA_CTRL              0x0064
+#define RK3399_WIN0_FADING_CTRL                 0x0068
+#define RK3399_WIN0_CTRL2                       0x006c
+#define RK3399_WIN1_CTRL0                       0x0070
+#define RK3399_WIN1_CTRL1                       0x0074
+#define RK3399_WIN1_COLOR_KEY                   0x0078
+#define RK3399_WIN1_VIR                         0x007c
+#define RK3399_WIN1_YRGB_MST                    0x0080
+#define RK3399_WIN1_CBR_MST                     0x0084
+#define RK3399_WIN1_ACT_INFO                    0x0088
+#define RK3399_WIN1_DSP_INFO                    0x008c
+#define RK3399_WIN1_DSP_ST                      0x0090
+#define RK3399_WIN1_SCL_FACTOR_YRGB             0x0094
+#define RK3399_WIN1_SCL_FACTOR_CBR              0x0098
+#define RK3399_WIN1_SCL_OFFSET                  0x009c
+#define RK3399_WIN1_SRC_ALPHA_CTRL              0x00a0
+#define RK3399_WIN1_DST_ALPHA_CTRL              0x00a4
+#define RK3399_WIN1_FADING_CTRL                 0x00a8
+#define RK3399_WIN1_CTRL2                       0x00ac
+#define RK3399_WIN2_CTRL0                       0x00b0
+#define RK3399_WIN2_CTRL1                       0x00b4
+#define RK3399_WIN2_VIR0_1                      0x00b8
+#define RK3399_WIN2_VIR2_3                      0x00bc
+#define RK3399_WIN2_MST0                        0x00c0
+#define RK3399_WIN2_DSP_INFO0                   0x00c4
+#define RK3399_WIN2_DSP_ST0                     0x00c8
+#define RK3399_WIN2_COLOR_KEY                   0x00cc
+#define RK3399_WIN2_MST1                        0x00d0
+#define RK3399_WIN2_DSP_INFO1                   0x00d4
+#define RK3399_WIN2_DSP_ST1                     0x00d8
+#define RK3399_WIN2_SRC_ALPHA_CTRL              0x00dc
+#define RK3399_WIN2_MST2                        0x00e0
+#define RK3399_WIN2_DSP_INFO2                   0x00e4
+#define RK3399_WIN2_DSP_ST2                     0x00e8
+#define RK3399_WIN2_DST_ALPHA_CTRL              0x00ec
+#define RK3399_WIN2_MST3                        0x00f0
+#define RK3399_WIN2_DSP_INFO3                   0x00f4
+#define RK3399_WIN2_DSP_ST3                     0x00f8
+#define RK3399_WIN2_FADING_CTRL                 0x00fc
+#define RK3399_WIN3_CTRL0                       0x0100
+#define RK3399_WIN3_CTRL1                       0x0104
+#define RK3399_WIN3_VIR0_1                      0x0108
+#define RK3399_WIN3_VIR2_3                      0x010c
+#define RK3399_WIN3_MST0                        0x0110
+#define RK3399_WIN3_DSP_INFO0                   0x0114
+#define RK3399_WIN3_DSP_ST0                     0x0118
+#define RK3399_WIN3_COLOR_KEY                   0x011c
+#define RK3399_WIN3_MST1                        0x0120
+#define RK3399_WIN3_DSP_INFO1                   0x0124
+#define RK3399_WIN3_DSP_ST1                     0x0128
+#define RK3399_WIN3_SRC_ALPHA_CTRL              0x012c
+#define RK3399_WIN3_MST2                        0x0130
+#define RK3399_WIN3_DSP_INFO2                   0x0134
+#define RK3399_WIN3_DSP_ST2                     0x0138
+#define RK3399_WIN3_DST_ALPHA_CTRL              0x013c
+#define RK3399_WIN3_MST3                        0x0140
+#define RK3399_WIN3_DSP_INFO3                   0x0144
+#define RK3399_WIN3_DSP_ST3                     0x0148
+#define RK3399_WIN3_FADING_CTRL                 0x014c
+#define RK3399_HWC_CTRL0                        0x0150
+#define RK3399_HWC_CTRL1                        0x0154
+#define RK3399_HWC_MST                          0x0158
+#define RK3399_HWC_DSP_ST                       0x015c
+#define RK3399_HWC_SRC_ALPHA_CTRL               0x0160
+#define RK3399_HWC_DST_ALPHA_CTRL               0x0164
+#define RK3399_HWC_FADING_CTRL                  0x0168
+#define RK3399_HWC_RESERVED1                    0x016c
+#define RK3399_POST_DSP_HACT_INFO               0x0170
+#define RK3399_POST_DSP_VACT_INFO               0x0174
+#define RK3399_POST_SCL_FACTOR_YRGB             0x0178
+#define RK3399_POST_RESERVED                    0x017c
+#define RK3399_POST_SCL_CTRL                    0x0180
+#define RK3399_POST_DSP_VACT_INFO_F1            0x0184
+#define RK3399_DSP_HTOTAL_HS_END                0x0188
+#define RK3399_DSP_HACT_ST_END                  0x018c
+#define RK3399_DSP_VTOTAL_VS_END                0x0190
+#define RK3399_DSP_VACT_ST_END                  0x0194
+#define RK3399_DSP_VS_ST_END_F1                 0x0198
+#define RK3399_DSP_VACT_ST_END_F1               0x019c
+#define RK3399_PWM_CTRL                         0x01a0
+#define RK3399_PWM_PERIOD_HPR                   0x01a4
+#define RK3399_PWM_DUTY_LPR                     0x01a8
+#define RK3399_PWM_CNT                          0x01ac
+#define RK3399_BCSH_COLOR_BAR                   0x01b0
+#define RK3399_BCSH_BCS                         0x01b4
+#define RK3399_BCSH_H                           0x01b8
+#define RK3399_BCSH_CTRL                        0x01bc
+#define RK3399_CABC_CTRL0                       0x01c0
+#define RK3399_CABC_CTRL1                       0x01c4
+#define RK3399_CABC_CTRL2                       0x01c8
+#define RK3399_CABC_CTRL3                       0x01cc
+#define RK3399_CABC_GAUSS_LINE0_0               0x01d0
+#define RK3399_CABC_GAUSS_LINE0_1               0x01d4
+#define RK3399_CABC_GAUSS_LINE1_0               0x01d8
+#define RK3399_CABC_GAUSS_LINE1_1               0x01dc
+#define RK3399_CABC_GAUSS_LINE2_0               0x01e0
+#define RK3399_CABC_GAUSS_LINE2_1               0x01e4
+#define RK3399_FRC_LOWER01_0                    0x01e8
+#define RK3399_FRC_LOWER01_1                    0x01ec
+#define RK3399_FRC_LOWER10_0                    0x01f0
+#define RK3399_FRC_LOWER10_1                    0x01f4
+#define RK3399_FRC_LOWER11_0                    0x01f8
+#define RK3399_FRC_LOWER11_1                    0x01fc
+#define RK3399_AFBCD0_CTRL                      0x0200
+#define RK3399_AFBCD0_HDR_PTR                   0x0204
+#define RK3399_AFBCD0_PIC_SIZE                  0x0208
+#define RK3399_AFBCD0_STATUS                    0x020c
+#define RK3399_AFBCD1_CTRL                      0x0220
+#define RK3399_AFBCD1_HDR_PTR                   0x0224
+#define RK3399_AFBCD1_PIC_SIZE                  0x0228
+#define RK3399_AFBCD1_STATUS                    0x022c
+#define RK3399_AFBCD2_CTRL                      0x0240
+#define RK3399_AFBCD2_HDR_PTR                   0x0244
+#define RK3399_AFBCD2_PIC_SIZE                  0x0248
+#define RK3399_AFBCD2_STATUS                    0x024c
+#define RK3399_AFBCD3_CTRL                      0x0260
+#define RK3399_AFBCD3_HDR_PTR                   0x0264
+#define RK3399_AFBCD3_PIC_SIZE                  0x0268
+#define RK3399_AFBCD3_STATUS                    0x026c
+#define RK3399_INTR_EN0                         0x0280
+#define RK3399_INTR_CLEAR0                      0x0284
+#define RK3399_INTR_STATUS0                     0x0288
+#define RK3399_INTR_RAW_STATUS0                 0x028c
+#define RK3399_INTR_EN1                         0x0290
+#define RK3399_INTR_CLEAR1                      0x0294
+#define RK3399_INTR_STATUS1                     0x0298
+#define RK3399_INTR_RAW_STATUS1                 0x029c
+#define RK3399_LINE_FLAG                        0x02a0
+#define RK3399_VOP_STATUS                       0x02a4
+#define RK3399_BLANKING_VALUE                   0x02a8
+#define RK3399_MCU_BYPASS_PORT                  0x02ac
+#define RK3399_WIN0_DSP_BG                      0x02b0
+#define RK3399_WIN1_DSP_BG                      0x02b4
+#define RK3399_WIN2_DSP_BG                      0x02b8
+#define RK3399_WIN3_DSP_BG                      0x02bc
+#define RK3399_YUV2YUV_WIN                      0x02c0
+#define RK3399_YUV2YUV_POST                     0x02c4
+#define RK3399_AUTO_GATING_EN                   0x02cc
+#define RK3399_WIN0_CSC_COE                     0x03a0
+#define RK3399_WIN1_CSC_COE                     0x03c0
+#define RK3399_WIN2_CSC_COE                     0x03e0
+#define RK3399_WIN3_CSC_COE                     0x0400
+#define RK3399_HWC_CSC_COE                      0x0420
+#define RK3399_BCSH_R2Y_CSC_COE                 0x0440
+#define RK3399_BCSH_Y2R_CSC_COE                 0x0460
+#define RK3399_POST_YUV2YUV_Y2R_COE             0x0480
+#define RK3399_POST_YUV2YUV_3X3_COE             0x04a0
+#define RK3399_POST_YUV2YUV_R2Y_COE             0x04c0
+#define RK3399_WIN0_YUV2YUV_Y2R                 0x04e0
+#define RK3399_WIN0_YUV2YUV_3X3                 0x0500
+#define RK3399_WIN0_YUV2YUV_R2Y                 0x0520
+#define RK3399_WIN1_YUV2YUV_Y2R                 0x0540
+#define RK3399_WIN1_YUV2YUV_3X3                 0x0560
+#define RK3399_WIN1_YUV2YUV_R2Y                 0x0580
+#define RK3399_WIN2_YUV2YUV_Y2R                 0x05a0
+#define RK3399_WIN2_YUV2YUV_3X3                 0x05c0
+#define RK3399_WIN2_YUV2YUV_R2Y                 0x05e0
+#define RK3399_WIN3_YUV2YUV_Y2R                 0x0600
+#define RK3399_WIN3_YUV2YUV_3X3                 0x0620
+#define RK3399_WIN3_YUV2YUV_R2Y                 0x0640
+#define RK3399_WIN2_LUT_ADDR                    0x1000
+#define RK3399_WIN3_LUT_ADDR                    0x1400
+#define RK3399_HWC_LUT_ADDR                     0x1800
+#define RK3399_CABC_GAMMA_LUT_ADDR              0x1c00
+#define RK3399_GAMMA_LUT_ADDR                   0x2000
+/* rk3399 register definition end */
+
+/* rk3328 register definition end */
+#define RK3328_REG_CFG_DONE                     0x00000000
+#define RK3328_VERSION_INFO                     0x00000004
+#define RK3328_SYS_CTRL                         0x00000008
+#define RK3328_SYS_CTRL1                        0x0000000c
+#define RK3328_DSP_CTRL0                        0x00000010
+#define RK3328_DSP_CTRL1                        0x00000014
+#define RK3328_DSP_BG                           0x00000018
+#define RK3328_AUTO_GATING_EN                   0x0000003c
+#define RK3328_LINE_FLAG                        0x00000040
+#define RK3328_VOP_STATUS                       0x00000044
+#define RK3328_BLANKING_VALUE                   0x00000048
+#define RK3328_WIN0_DSP_BG                      0x00000050
+#define RK3328_WIN1_DSP_BG                      0x00000054
+#define RK3328_DBG_PERF_LATENCY_CTRL0           0x000000c0
+#define RK3328_DBG_PERF_RD_MAX_LATENCY_NUM0     0x000000c4
+#define RK3328_DBG_PERF_RD_LATENCY_THR_NUM0     0x000000c8
+#define RK3328_DBG_PERF_RD_LATENCY_SAMP_NUM0    0x000000cc
+#define RK3328_INTR_EN0                         0x000000e0
+#define RK3328_INTR_CLEAR0                      0x000000e4
+#define RK3328_INTR_STATUS0                     0x000000e8
+#define RK3328_INTR_RAW_STATUS0                 0x000000ec
+#define RK3328_INTR_EN1                         0x000000f0
+#define RK3328_INTR_CLEAR1                      0x000000f4
+#define RK3328_INTR_STATUS1                     0x000000f8
+#define RK3328_INTR_RAW_STATUS1                 0x000000fc
+#define RK3328_WIN0_CTRL0                       0x00000100
+#define RK3328_WIN0_CTRL1                       0x00000104
+#define RK3328_WIN0_COLOR_KEY                   0x00000108
+#define RK3328_WIN0_VIR                         0x0000010c
+#define RK3328_WIN0_YRGB_MST                    0x00000110
+#define RK3328_WIN0_CBR_MST                     0x00000114
+#define RK3328_WIN0_ACT_INFO                    0x00000118
+#define RK3328_WIN0_DSP_INFO                    0x0000011c
+#define RK3328_WIN0_DSP_ST                      0x00000120
+#define RK3328_WIN0_SCL_FACTOR_YRGB             0x00000124
+#define RK3328_WIN0_SCL_FACTOR_CBR              0x00000128
+#define RK3328_WIN0_SCL_OFFSET                  0x0000012c
+#define RK3328_WIN0_SRC_ALPHA_CTRL              0x00000130
+#define RK3328_WIN0_DST_ALPHA_CTRL              0x00000134
+#define RK3328_WIN0_FADING_CTRL                 0x00000138
+#define RK3328_WIN0_CTRL2                       0x0000013c
+#define RK3328_DBG_WIN0_REG0                    0x000001f0
+#define RK3328_DBG_WIN0_REG1                    0x000001f4
+#define RK3328_DBG_WIN0_REG2                    0x000001f8
+#define RK3328_DBG_WIN0_RESERVED                0x000001fc
+#define RK3328_WIN1_CTRL0                       0x00000200
+#define RK3328_WIN1_CTRL1                       0x00000204
+#define RK3328_WIN1_COLOR_KEY                   0x00000208
+#define RK3328_WIN1_VIR                         0x0000020c
+#define RK3328_WIN1_YRGB_MST                    0x00000210
+#define RK3328_WIN1_CBR_MST                     0x00000214
+#define RK3328_WIN1_ACT_INFO                    0x00000218
+#define RK3328_WIN1_DSP_INFO                    0x0000021c
+#define RK3328_WIN1_DSP_ST                      0x00000220
+#define RK3328_WIN1_SCL_FACTOR_YRGB             0x00000224
+#define RK3328_WIN1_SCL_FACTOR_CBR              0x00000228
+#define RK3328_WIN1_SCL_OFFSET                  0x0000022c
+#define RK3328_WIN1_SRC_ALPHA_CTRL              0x00000230
+#define RK3328_WIN1_DST_ALPHA_CTRL              0x00000234
+#define RK3328_WIN1_FADING_CTRL                 0x00000238
+#define RK3328_WIN1_CTRL2                       0x0000023c
+#define RK3328_DBG_WIN1_REG0                    0x000002f0
+#define RK3328_DBG_WIN1_REG1                    0x000002f4
+#define RK3328_DBG_WIN1_REG2                    0x000002f8
+#define RK3328_DBG_WIN1_RESERVED                0x000002fc
+#define RK3328_WIN2_CTRL0                       0x00000300
+#define RK3328_WIN2_CTRL1                       0x00000304
+#define RK3328_WIN2_COLOR_KEY                   0x00000308
+#define RK3328_WIN2_VIR                         0x0000030c
+#define RK3328_WIN2_YRGB_MST                    0x00000310
+#define RK3328_WIN2_CBR_MST                     0x00000314
+#define RK3328_WIN2_ACT_INFO                    0x00000318
+#define RK3328_WIN2_DSP_INFO                    0x0000031c
+#define RK3328_WIN2_DSP_ST                      0x00000320
+#define RK3328_WIN2_SCL_FACTOR_YRGB             0x00000324
+#define RK3328_WIN2_SCL_FACTOR_CBR              0x00000328
+#define RK3328_WIN2_SCL_OFFSET                  0x0000032c
+#define RK3328_WIN2_SRC_ALPHA_CTRL              0x00000330
+#define RK3328_WIN2_DST_ALPHA_CTRL              0x00000334
+#define RK3328_WIN2_FADING_CTRL                 0x00000338
+#define RK3328_WIN2_CTRL2                       0x0000033c
+#define RK3328_DBG_WIN2_REG0                    0x000003f0
+#define RK3328_DBG_WIN2_REG1                    0x000003f4
+#define RK3328_DBG_WIN2_REG2                    0x000003f8
+#define RK3328_DBG_WIN2_RESERVED                0x000003fc
+#define RK3328_WIN3_CTRL0                       0x00000400
+#define RK3328_WIN3_CTRL1                       0x00000404
+#define RK3328_WIN3_COLOR_KEY                   0x00000408
+#define RK3328_WIN3_VIR                         0x0000040c
+#define RK3328_WIN3_YRGB_MST                    0x00000410
+#define RK3328_WIN3_CBR_MST                     0x00000414
+#define RK3328_WIN3_ACT_INFO                    0x00000418
+#define RK3328_WIN3_DSP_INFO                    0x0000041c
+#define RK3328_WIN3_DSP_ST                      0x00000420
+#define RK3328_WIN3_SCL_FACTOR_YRGB             0x00000424
+#define RK3328_WIN3_SCL_FACTOR_CBR              0x00000428
+#define RK3328_WIN3_SCL_OFFSET                  0x0000042c
+#define RK3328_WIN3_SRC_ALPHA_CTRL              0x00000430
+#define RK3328_WIN3_DST_ALPHA_CTRL              0x00000434
+#define RK3328_WIN3_FADING_CTRL                 0x00000438
+#define RK3328_WIN3_CTRL2                       0x0000043c
+#define RK3328_DBG_WIN3_REG0                    0x000004f0
+#define RK3328_DBG_WIN3_REG1                    0x000004f4
+#define RK3328_DBG_WIN3_REG2                    0x000004f8
+#define RK3328_DBG_WIN3_RESERVED                0x000004fc
+
+#define RK3328_HWC_CTRL0                        0x00000500
+#define RK3328_HWC_CTRL1                        0x00000504
+#define RK3328_HWC_MST                          0x00000508
+#define RK3328_HWC_DSP_ST                       0x0000050c
+#define RK3328_HWC_SRC_ALPHA_CTRL               0x00000510
+#define RK3328_HWC_DST_ALPHA_CTRL               0x00000514
+#define RK3328_HWC_FADING_CTRL                  0x00000518
+#define RK3328_HWC_RESERVED1                    0x0000051c
+#define RK3328_POST_DSP_HACT_INFO               0x00000600
+#define RK3328_POST_DSP_VACT_INFO               0x00000604
+#define RK3328_POST_SCL_FACTOR_YRGB             0x00000608
+#define RK3328_POST_RESERVED                    0x0000060c
+#define RK3328_POST_SCL_CTRL                    0x00000610
+#define RK3328_POST_DSP_VACT_INFO_F1            0x00000614
+#define RK3328_DSP_HTOTAL_HS_END                0x00000618
+#define RK3328_DSP_HACT_ST_END                  0x0000061c
+#define RK3328_DSP_VTOTAL_VS_END                0x00000620
+#define RK3328_DSP_VACT_ST_END                  0x00000624
+#define RK3328_DSP_VS_ST_END_F1                 0x00000628
+#define RK3328_DSP_VACT_ST_END_F1               0x0000062c
+#define RK3328_BCSH_COLOR_BAR                   0x00000640
+#define RK3328_BCSH_BCS                         0x00000644
+#define RK3328_BCSH_H                           0x00000648
+#define RK3328_BCSH_CTRL                        0x0000064c
+#define RK3328_FRC_LOWER01_0                    0x00000678
+#define RK3328_FRC_LOWER01_1                    0x0000067c
+#define RK3328_FRC_LOWER10_0                    0x00000680
+#define RK3328_FRC_LOWER10_1                    0x00000684
+#define RK3328_FRC_LOWER11_0                    0x00000688
+#define RK3328_FRC_LOWER11_1                    0x0000068c
+#define RK3328_DBG_POST_REG0                    0x000006e8
+#define RK3328_DBG_POST_RESERVED                0x000006ec
+#define RK3328_DBG_DATAO                        0x000006f0
+#define RK3328_DBG_DATAO_2                      0x000006f4
+
+/* sdr to hdr */
+#define RK3328_SDR2HDR_CTRL                     0x00000700
+#define RK3328_EOTF_OETF_Y0                     0x00000704
+#define RK3328_RESERVED0001                     0x00000708
+#define RK3328_RESERVED0002                     0x0000070c
+#define RK3328_EOTF_OETF_Y1                     0x00000710
+#define RK3328_EOTF_OETF_Y64                    0x0000080c
+#define RK3328_OETF_DX_DXPOW1                   0x00000810
+#define RK3328_OETF_DX_DXPOW64                  0x0000090c
+#define RK3328_OETF_XN1                         0x00000910
+#define RK3328_OETF_XN63                        0x00000a08
+
+/* hdr to sdr */
+#define RK3328_HDR2SDR_CTRL                     0x00000a10
+#define RK3328_HDR2SDR_SRC_RANGE                0x00000a14
+#define RK3328_HDR2SDR_NORMFACEETF              0x00000a18
+#define RK3328_RESERVED0003                     0x00000a1c
+#define RK3328_HDR2SDR_DST_RANGE                0x00000a20
+#define RK3328_HDR2SDR_NORMFACCGAMMA            0x00000a24
+#define RK3328_EETF_OETF_Y0                     0x00000a28
+#define RK3328_SAT_Y0                           0x00000a2c
+#define RK3328_EETF_OETF_Y1                     0x00000a30
+#define RK3328_SAT_Y1                           0x00000ab0
+#define RK3328_SAT_Y8                           0x00000acc
+
+#define RK3328_HWC_LUT_ADDR                     0x00000c00
+
 /* rk3036 register definition */
 #define RK3036_SYS_CTRL                 0x00
 #define RK3036_DSP_CTRL0                0x04
@@ -166,197 +878,4 @@
 #define RK3036_HWC_LUT_ADDR             0x800
 /* rk3036 register definition end */
 
-/* rk3399 register definition */
-#define RK3399_REG_CFG_DONE             0x00000
-#define RK3399_VERSION_INFO             0x00004
-#define RK3399_SYS_CTRL                 0x00008
-#define RK3399_SYS_CTRL1                0x0000c
-#define RK3399_DSP_CTRL0                0x00010
-#define RK3399_DSP_CTRL1                0x00014
-#define RK3399_DSP_BG                   0x00018
-#define RK3399_MCU_CTRL                 0x0001c
-#define RK3399_WB_CTRL0                 0x00020
-#define RK3399_WB_CTRL1                 0x00024
-#define RK3399_WB_YRGB_MST              0x00028
-#define RK3399_WB_CBR_MST               0x0002c
-#define RK3399_WIN0_CTRL0               0x00030
-#define RK3399_WIN0_CTRL1               0x00034
-#define RK3399_WIN0_COLOR_KEY           0x00038
-#define RK3399_WIN0_VIR                 0x0003c
-#define RK3399_WIN0_YRGB_MST            0x00040
-#define RK3399_WIN0_CBR_MST             0x00044
-#define RK3399_WIN0_ACT_INFO            0x00048
-#define RK3399_WIN0_DSP_INFO            0x0004c
-#define RK3399_WIN0_DSP_ST              0x00050
-#define RK3399_WIN0_SCL_FACTOR_YRGB     0x00054
-#define RK3399_WIN0_SCL_FACTOR_CBR      0x00058
-#define RK3399_WIN0_SCL_OFFSET          0x0005c
-#define RK3399_WIN0_SRC_ALPHA_CTRL      0x00060
-#define RK3399_WIN0_DST_ALPHA_CTRL      0x00064
-#define RK3399_WIN0_FADING_CTRL         0x00068
-#define RK3399_WIN0_CTRL2               0x0006c
-#define RK3399_WIN1_CTRL0               0x00070
-#define RK3399_WIN1_CTRL1               0x00074
-#define RK3399_WIN1_COLOR_KEY           0x00078
-#define RK3399_WIN1_VIR                 0x0007c
-#define RK3399_WIN1_YRGB_MST            0x00080
-#define RK3399_WIN1_CBR_MST             0x00084
-#define RK3399_WIN1_ACT_INFO            0x00088
-#define RK3399_WIN1_DSP_INFO            0x0008c
-#define RK3399_WIN1_DSP_ST              0x00090
-#define RK3399_WIN1_SCL_FACTOR_YRGB     0x00094
-#define RK3399_WIN1_SCL_FACTOR_CBR      0x00098
-#define RK3399_WIN1_SCL_OFFSET          0x0009c
-#define RK3399_WIN1_SRC_ALPHA_CTRL      0x000a0
-#define RK3399_WIN1_DST_ALPHA_CTRL      0x000a4
-#define RK3399_WIN1_FADING_CTRL         0x000a8
-#define RK3399_WIN1_CTRL2               0x000ac
-#define RK3399_WIN2_CTRL0               0x000b0
-#define RK3399_WIN2_CTRL1               0x000b4
-#define RK3399_WIN2_VIR0_1              0x000b8
-#define RK3399_WIN2_VIR2_3              0x000bc
-#define RK3399_WIN2_MST0                0x000c0
-#define RK3399_WIN2_DSP_INFO0           0x000c4
-#define RK3399_WIN2_DSP_ST0             0x000c8
-#define RK3399_WIN2_COLOR_KEY           0x000cc
-#define RK3399_WIN2_MST1                0x000d0
-#define RK3399_WIN2_DSP_INFO1           0x000d4
-#define RK3399_WIN2_DSP_ST1             0x000d8
-#define RK3399_WIN2_SRC_ALPHA_CTRL      0x000dc
-#define RK3399_WIN2_MST2                0x000e0
-#define RK3399_WIN2_DSP_INFO2           0x000e4
-#define RK3399_WIN2_DSP_ST2             0x000e8
-#define RK3399_WIN2_DST_ALPHA_CTRL      0x000ec
-#define RK3399_WIN2_MST3                0x000f0
-#define RK3399_WIN2_DSP_INFO3           0x000f4
-#define RK3399_WIN2_DSP_ST3             0x000f8
-#define RK3399_WIN2_FADING_CTRL         0x000fc
-#define RK3399_WIN3_CTRL0               0x00100
-#define RK3399_WIN3_CTRL1               0x00104
-#define RK3399_WIN3_VIR0_1              0x00108
-#define RK3399_WIN3_VIR2_3              0x0010c
-#define RK3399_WIN3_MST0                0x00110
-#define RK3399_WIN3_DSP_INFO0           0x00114
-#define RK3399_WIN3_DSP_ST0             0x00118
-#define RK3399_WIN3_COLOR_KEY           0x0011c
-#define RK3399_WIN3_MST1                0x00120
-#define RK3399_WIN3_DSP_INFO1           0x00124
-#define RK3399_WIN3_DSP_ST1             0x00128
-#define RK3399_WIN3_SRC_ALPHA_CTRL      0x0012c
-#define RK3399_WIN3_MST2                0x00130
-#define RK3399_WIN3_DSP_INFO2           0x00134
-#define RK3399_WIN3_DSP_ST2             0x00138
-#define RK3399_WIN3_DST_ALPHA_CTRL      0x0013c
-#define RK3399_WIN3_MST3                0x00140
-#define RK3399_WIN3_DSP_INFO3           0x00144
-#define RK3399_WIN3_DSP_ST3             0x00148
-#define RK3399_WIN3_FADING_CTRL         0x0014c
-#define RK3399_HWC_CTRL0                0x00150
-#define RK3399_HWC_CTRL1                0x00154
-#define RK3399_HWC_MST                  0x00158
-#define RK3399_HWC_DSP_ST               0x0015c
-#define RK3399_HWC_SRC_ALPHA_CTRL       0x00160
-#define RK3399_HWC_DST_ALPHA_CTRL       0x00164
-#define RK3399_HWC_FADING_CTRL          0x00168
-#define RK3399_HWC_RESERVED1            0x0016c
-#define RK3399_POST_DSP_HACT_INFO       0x00170
-#define RK3399_POST_DSP_VACT_INFO       0x00174
-#define RK3399_POST_SCL_FACTOR_YRGB     0x00178
-#define RK3399_POST_RESERVED            0x0017c
-#define RK3399_POST_SCL_CTRL            0x00180
-#define RK3399_POST_DSP_VACT_INFO_F1    0x00184
-#define RK3399_DSP_HTOTAL_HS_END        0x00188
-#define RK3399_DSP_HACT_ST_END          0x0018c
-#define RK3399_DSP_VTOTAL_VS_END        0x00190
-#define RK3399_DSP_VACT_ST_END          0x00194
-#define RK3399_DSP_VS_ST_END_F1         0x00198
-#define RK3399_DSP_VACT_ST_END_F1       0x0019c
-#define RK3399_PWM_CTRL                 0x001a0
-#define RK3399_PWM_PERIOD_HPR           0x001a4
-#define RK3399_PWM_DUTY_LPR             0x001a8
-#define RK3399_PWM_CNT                  0x001ac
-#define RK3399_BCSH_COLOR_BAR           0x001b0
-#define RK3399_BCSH_BCS                 0x001b4
-#define RK3399_BCSH_H                   0x001b8
-#define RK3399_BCSH_CTRL                0x001bc
-#define RK3399_CABC_CTRL0               0x001c0
-#define RK3399_CABC_CTRL1               0x001c4
-#define RK3399_CABC_CTRL2               0x001c8
-#define RK3399_CABC_CTRL3               0x001cc
-#define RK3399_CABC_GAUSS_LINE0_0       0x001d0
-#define RK3399_CABC_GAUSS_LINE0_1       0x001d4
-#define RK3399_CABC_GAUSS_LINE1_0       0x001d8
-#define RK3399_CABC_GAUSS_LINE1_1       0x001dc
-#define RK3399_CABC_GAUSS_LINE2_0       0x001e0
-#define RK3399_CABC_GAUSS_LINE2_1       0x001e4
-#define RK3399_FRC_LOWER01_0            0x001e8
-#define RK3399_FRC_LOWER01_1            0x001ec
-#define RK3399_FRC_LOWER10_0            0x001f0
-#define RK3399_FRC_LOWER10_1            0x001f4
-#define RK3399_FRC_LOWER11_0            0x001f8
-#define RK3399_FRC_LOWER11_1            0x001fc
-#define RK3399_AFBCD0_CTRL              0x00200
-#define RK3399_AFBCD0_HDR_PTR           0x00204
-#define RK3399_AFBCD0_PIC_SIZE          0x00208
-#define RK3399_AFBCD0_STATUS            0x0020c
-#define RK3399_AFBCD1_CTRL              0x00220
-#define RK3399_AFBCD1_HDR_PTR           0x00224
-#define RK3399_AFBCD1_PIC_SIZE          0x00228
-#define RK3399_AFBCD1_STATUS            0x0022c
-#define RK3399_AFBCD2_CTRL              0x00240
-#define RK3399_AFBCD2_HDR_PTR           0x00244
-#define RK3399_AFBCD2_PIC_SIZE          0x00248
-#define RK3399_AFBCD2_STATUS            0x0024c
-#define RK3399_AFBCD3_CTRL              0x00260
-#define RK3399_AFBCD3_HDR_PTR           0x00264
-#define RK3399_AFBCD3_PIC_SIZE          0x00268
-#define RK3399_AFBCD3_STATUS            0x0026c
-#define RK3399_INTR_EN0                 0x00280
-#define RK3399_INTR_CLEAR0              0x00284
-#define RK3399_INTR_STATUS0             0x00288
-#define RK3399_INTR_RAW_STATUS0         0x0028c
-#define RK3399_INTR_EN1                 0x00290
-#define RK3399_INTR_CLEAR1              0x00294
-#define RK3399_INTR_STATUS1             0x00298
-#define RK3399_INTR_RAW_STATUS1         0x0029c
-#define RK3399_LINE_FLAG                0x002a0
-#define RK3399_VOP_STATUS               0x002a4
-#define RK3399_BLANKING_VALUE           0x002a8
-#define RK3399_MCU_BYPASS_PORT          0x002ac
-#define RK3399_WIN0_DSP_BG              0x002b0
-#define RK3399_WIN1_DSP_BG              0x002b4
-#define RK3399_WIN2_DSP_BG              0x002b8
-#define RK3399_WIN3_DSP_BG              0x002bc
-#define RK3399_YUV2YUV_WIN              0x002c0
-#define RK3399_YUV2YUV_POST             0x002c4
-#define RK3399_AUTO_GATING_EN           0x002cc
-#define RK3399_WIN0_CSC_COE             0x003a0
-#define RK3399_WIN1_CSC_COE             0x003c0
-#define RK3399_WIN2_CSC_COE             0x003e0
-#define RK3399_WIN3_CSC_COE             0x00400
-#define RK3399_HWC_CSC_COE              0x00420
-#define RK3399_BCSH_R2Y_CSC_COE         0x00440
-#define RK3399_BCSH_Y2R_CSC_COE         0x00460
-#define RK3399_POST_YUV2YUV_Y2R_COE     0x00480
-#define RK3399_POST_YUV2YUV_3X3_COE     0x004a0
-#define RK3399_POST_YUV2YUV_R2Y_COE     0x004c0
-#define RK3399_WIN0_YUV2YUV_Y2R         0x004e0
-#define RK3399_WIN0_YUV2YUV_3X3         0x00500
-#define RK3399_WIN0_YUV2YUV_R2Y         0x00520
-#define RK3399_WIN1_YUV2YUV_Y2R         0x00540
-#define RK3399_WIN1_YUV2YUV_3X3         0x00560
-#define RK3399_WIN1_YUV2YUV_R2Y         0x00580
-#define RK3399_WIN2_YUV2YUV_Y2R         0x005a0
-#define RK3399_WIN2_YUV2YUV_3X3         0x005c0
-#define RK3399_WIN2_YUV2YUV_R2Y         0x005e0
-#define RK3399_WIN3_YUV2YUV_Y2R         0x00600
-#define RK3399_WIN3_YUV2YUV_3X3         0x00620
-#define RK3399_WIN3_YUV2YUV_R2Y         0x00640
-#define RK3399_WIN2_LUT_ADDR            0x01000
-#define RK3399_WIN3_LUT_ADDR            0x01400
-#define RK3399_HWC_LUT_ADDR             0x01800
-#define RK3399_CABC_GAMMA_LUT_ADDR      0x01c00
-#define RK3399_GAMMA_LUT_ADDR           0x02000
-/* rk3399 register definition end */
-
 #endif /* _ROCKCHIP_VOP_REG_H */
diff --git a/drivers/gpu/drm/shmobile/shmob_drm_drv.c b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
index c2ca07357aac..592572554eb0 100644
--- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c
+++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
@@ -145,8 +145,6 @@ static struct drm_driver shmob_drm_driver = {
         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
         .dumb_create            = drm_gem_cma_dumb_create,
-        .dumb_map_offset        = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy           = drm_gem_dumb_destroy,
         .fops                   = &shmob_drm_fops,
         .name                   = "shmob-drm",
         .desc                   = "Renesas SH Mobile DRM",
diff --git a/drivers/gpu/drm/sti/sti_cursor.c b/drivers/gpu/drm/sti/sti_cursor.c
index 5b3a41f74f21..b709ebbec095 100644
--- a/drivers/gpu/drm/sti/sti_cursor.c
+++ b/drivers/gpu/drm/sti/sti_cursor.c
@@ -348,7 +348,6 @@ static const struct drm_plane_funcs sti_cursor_plane_helpers_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
         .destroy = sti_cursor_destroy,
-        .set_property = drm_atomic_helper_plane_set_property,
         .reset = sti_plane_reset,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
@@ -392,7 +391,7 @@ struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
                                        &sti_cursor_plane_helpers_funcs,
                                        cursor_supported_formats,
                                        ARRAY_SIZE(cursor_supported_formats),
-                                       DRM_PLANE_TYPE_CURSOR, NULL);
+                                       NULL, DRM_PLANE_TYPE_CURSOR, NULL);
         if (res) {
                 DRM_ERROR("Failed to initialize universal plane\n");
                 goto err_plane;
diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
index 06ef1e3886cf..1700c542cd93 100644
--- a/drivers/gpu/drm/sti/sti_drv.c
+++ b/drivers/gpu/drm/sti/sti_drv.c
@@ -175,8 +175,6 @@ static struct drm_driver sti_driver = {
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops = &drm_gem_cma_vm_ops,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .fops = &sti_driver_fops,
 
         .enable_vblank = sti_crtc_enable_vblank,
diff --git a/drivers/gpu/drm/sti/sti_dvo.c b/drivers/gpu/drm/sti/sti_dvo.c
index a51cd9f754db..852bf2293b05 100644
--- a/drivers/gpu/drm/sti/sti_dvo.c
+++ b/drivers/gpu/drm/sti/sti_dvo.c
@@ -412,7 +412,6 @@ static int sti_dvo_late_register(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs sti_dvo_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = sti_dvo_connector_detect,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 5ee0503945c8..b65eea4f2c97 100644
--- a/drivers/gpu/drm/sti/sti_gdp.c
+++ b/drivers/gpu/drm/sti/sti_gdp.c
@@ -895,7 +895,6 @@ static const struct drm_plane_funcs sti_gdp_plane_helpers_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
         .destroy = sti_gdp_destroy,
-        .set_property = drm_atomic_helper_plane_set_property,
         .reset = sti_plane_reset,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
@@ -931,7 +930,7 @@ struct drm_plane *sti_gdp_create(struct drm_device *drm_dev,
                                        &sti_gdp_plane_helpers_funcs,
                                        gdp_supported_formats,
                                        ARRAY_SIZE(gdp_supported_formats),
-                                       type, NULL);
+                                       NULL, type, NULL);
         if (res) {
                 DRM_ERROR("Failed to initialize universal plane\n");
                 goto err;
diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c
index d6ed909d9d75..cf65e32b5090 100644
--- a/drivers/gpu/drm/sti/sti_hda.c
+++ b/drivers/gpu/drm/sti/sti_hda.c
@@ -647,7 +647,6 @@ static int sti_hda_late_register(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs sti_hda_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c
index dbc6a195d6f9..30f02d2fdd03 100644
--- a/drivers/gpu/drm/sti/sti_hdmi.c
+++ b/drivers/gpu/drm/sti/sti_hdmi.c
@@ -1113,12 +1113,10 @@ static int sti_hdmi_late_register(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs sti_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = sti_hdmi_connector_detect,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
-        .set_property = drm_atomic_helper_connector_set_property,
         .atomic_set_property = sti_hdmi_connector_set_property,
         .atomic_get_property = sti_hdmi_connector_get_property,
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
diff --git a/drivers/gpu/drm/sti/sti_hqvdp.c b/drivers/gpu/drm/sti/sti_hqvdp.c
index 53a46dda8bd5..b19b3430b296 100644
--- a/drivers/gpu/drm/sti/sti_hqvdp.c
+++ b/drivers/gpu/drm/sti/sti_hqvdp.c
@@ -1276,7 +1276,6 @@ static const struct drm_plane_funcs sti_hqvdp_plane_helpers_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
         .destroy = sti_hqvdp_destroy,
-        .set_property = drm_atomic_helper_plane_set_property,
         .reset = sti_plane_reset,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
@@ -1298,7 +1297,7 @@ static struct drm_plane *sti_hqvdp_create(struct drm_device *drm_dev,
                                        &sti_hqvdp_plane_helpers_funcs,
                                        hqvdp_supported_formats,
                                        ARRAY_SIZE(hqvdp_supported_formats),
-                                       DRM_PLANE_TYPE_OVERLAY, NULL);
+                                       NULL, DRM_PLANE_TYPE_OVERLAY, NULL);
         if (res) {
                 DRM_ERROR("Failed to initialize universal plane\n");
                 return NULL;
diff --git a/drivers/gpu/drm/stm/Kconfig b/drivers/gpu/drm/stm/Kconfig
index 4b88223f9aed..35367ada3bc1 100644
--- a/drivers/gpu/drm/stm/Kconfig
+++ b/drivers/gpu/drm/stm/Kconfig
@@ -7,10 +7,16 @@ config DRM_STM
         select DRM_PANEL_BRIDGE
         select VIDEOMODE_HELPERS
         select FB_PROVIDE_GET_FB_UNMAPPED_AREA
-        default y
 
         help
           Enable support for the on-chip display controller on
           STMicroelectronics STM32 MCUs.
           To compile this driver as a module, choose M here: the module
           will be called stm-drm.
+
+config DRM_STM_DSI
+        tristate "STMicroelectronics specific extensions for Synopsys MIPI DSI"
+        depends on DRM_STM
+        select DRM_DW_MIPI_DSI
+        help
+          Choose this option for MIPI DSI support on STMicroelectronics SoC.
diff --git a/drivers/gpu/drm/stm/Makefile b/drivers/gpu/drm/stm/Makefile
index a09ecf450218..d883adc365a2 100644
--- a/drivers/gpu/drm/stm/Makefile
+++ b/drivers/gpu/drm/stm/Makefile
@@ -2,4 +2,6 @@ stm-drm-y := \
         drv.o \
         ltdc.o
 
+obj-$(CONFIG_DRM_STM_DSI) += dw_mipi_dsi-stm.o
+
 obj-$(CONFIG_DRM_STM) += stm-drm.o
diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c
index 83ab48f1fd00..b333b37f3f89 100644
--- a/drivers/gpu/drm/stm/drv.c
+++ b/drivers/gpu/drm/stm/drv.c
@@ -20,13 +20,6 @@
 
 #include "ltdc.h"
 
-#define DRIVER_NAME             "stm"
-#define DRIVER_DESC             "STMicroelectronics SoC DRM"
-#define DRIVER_DATE             "20170330"
-#define DRIVER_MAJOR            1
-#define DRIVER_MINOR            0
-#define DRIVER_PATCH_LEVEL      0
-
 #define STM_MAX_FB_WIDTH        2048
 #define STM_MAX_FB_HEIGHT       2048 /* same as width to handle orientation */
 
@@ -59,16 +52,14 @@ static struct drm_driver drv_driver = {
         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
                            DRIVER_ATOMIC,
         .lastclose = drv_lastclose,
-        .name = DRIVER_NAME,
-        .desc = DRIVER_DESC,
-        .date = DRIVER_DATE,
-        .major = DRIVER_MAJOR,
-        .minor = DRIVER_MINOR,
-        .patchlevel = DRIVER_PATCH_LEVEL,
+        .name = "stm",
+        .desc = "STMicroelectronics SoC DRM",
+        .date = "20170330",
+        .major = 1,
+        .minor = 0,
+        .patchlevel = 0,
         .fops = &drv_driver_fops,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
         .gem_free_object_unlocked = drm_gem_cma_free_object,
@@ -206,7 +197,7 @@ static struct platform_driver stm_drm_platform_driver = {
         .probe = stm_drm_platform_probe,
         .remove = stm_drm_platform_remove,
         .driver = {
-                .name = DRIVER_NAME,
+                .name = "stm32-display",
                 .of_match_table = drv_dt_ids,
         },
 };
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
new file mode 100644
index 000000000000..568c5d0461ea
--- /dev/null
+++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
@@ -0,0 +1,352 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ *
+ * Authors: Philippe Cornu <philippe.cornu@st.com>
+ *          Yannick Fertre <yannick.fertre@st.com>
+ *
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+
+#include <linux/clk.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <drm/drmP.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/bridge/dw_mipi_dsi.h>
+#include <video/mipi_display.h>
+
+/* DSI wrapper register & bit definitions */
+/* Note: registers are named as in the Reference Manual */
+#define DSI_WCFGR       0x0400          /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM      BIT(0)          /* DSI Mode */
+#define WCFGR_COLMUX    GENMASK(3, 1)   /* COLor MUltipleXing */
+
+#define DSI_WCR         0x0404          /* Wrapper Control Reg */
+#define WCR_DSIEN       BIT(3)          /* DSI ENable */
+
+#define DSI_WISR        0x040C          /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS      BIT(8)          /* PLL Lock Status */
+#define WISR_RRS        BIT(12)         /* Regulator Ready Status */
+
+#define DSI_WPCR0       0x0418          /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4      GENMASK(5, 0)   /* Unit Interval X 4 */
+#define WPCR0_TDDL      BIT(16)         /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR       0x0430          /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLEN     BIT(0)          /* PLL ENable */
+#define WRPCR_NDIV      GENMASK(8, 2)   /* pll loop DIVision Factor */
+#define WRPCR_IDF       GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF       GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGEN     BIT(24)         /* REGulator ENable */
+#define WRPCR_BGREN     BIT(28)         /* BandGap Reference ENable */
+#define IDF_MIN         1
+#define IDF_MAX         7
+#define NDIV_MIN        10
+#define NDIV_MAX        125
+#define ODF_MIN         1
+#define ODF_MAX         8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+        DSI_RGB565_CONF1,
+        DSI_RGB565_CONF2,
+        DSI_RGB565_CONF3,
+        DSI_RGB666_CONF1,
+        DSI_RGB666_CONF2,
+        DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS   31250
+#define LANE_MAX_KBPS   500000
+
+/* Sleep & timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define SLEEP_US        1000
+#define TIMEOUT_US      200000
+
+struct dw_mipi_dsi_stm {
+        void __iomem *base;
+        struct clk *pllref_clk;
+};
+
+static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val)
+{
+        writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg)
+{
+        return readl(dsi->base + reg);
+}
+
+static inline void dsi_set(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask)
+{
+        dsi_write(dsi, reg, dsi_read(dsi, reg) | mask);
+}
+
+static inline void dsi_clear(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask)
+{
+        dsi_write(dsi, reg, dsi_read(dsi, reg) & ~mask);
+}
+
+static inline void dsi_update_bits(struct dw_mipi_dsi_stm *dsi, u32 reg,
+                                   u32 mask, u32 val)
+{
+        dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val);
+}
+
+static enum dsi_color dsi_color_from_mipi(enum mipi_dsi_pixel_format fmt)
+{
+        switch (fmt) {
+        case MIPI_DSI_FMT_RGB888:
+                return DSI_RGB888;
+        case MIPI_DSI_FMT_RGB666:
+                return DSI_RGB666_CONF2;
+        case MIPI_DSI_FMT_RGB666_PACKED:
+                return DSI_RGB666_CONF1;
+        case MIPI_DSI_FMT_RGB565:
+                return DSI_RGB565_CONF1;
+        default:
+                DRM_DEBUG_DRIVER("MIPI color invalid, so we use rgb888\n");
+        }
+        return DSI_RGB888;
+}
+
+static int dsi_pll_get_clkout_khz(int clkin_khz, int idf, int ndiv, int odf)
+{
+        /* prevent from division by 0 */
+        if (idf * odf)
+                return DIV_ROUND_CLOSEST(clkin_khz * ndiv, idf * odf);
+
+        return 0;
+}
+
+static int dsi_pll_get_params(int clkin_khz, int clkout_khz,
+                              int *idf, int *ndiv, int *odf)
+{
+        int i, o, n, n_min, n_max;
+        int fvco_min, fvco_max, delta, best_delta; /* all in khz */
+
+        /* Early checks preventing division by 0 & odd results */
+        if ((clkin_khz <= 0) || (clkout_khz <= 0))
+                return -EINVAL;
+
+        fvco_min = LANE_MIN_KBPS * 2 * ODF_MAX;
+        fvco_max = LANE_MAX_KBPS * 2 * ODF_MIN;
+
+        best_delta = 1000000; /* big started value (1000000khz) */
+
+        for (i = IDF_MIN; i <= IDF_MAX; i++) {
+                /* Compute ndiv range according to Fvco */
+                n_min = ((fvco_min * i) / (2 * clkin_khz)) + 1;
+                n_max = (fvco_max * i) / (2 * clkin_khz);
+
+                /* No need to continue idf loop if we reach ndiv max */
+                if (n_min >= NDIV_MAX)
+                        break;
+
+                /* Clamp ndiv to valid values */
+                if (n_min < NDIV_MIN)
+                        n_min = NDIV_MIN;
+                if (n_max > NDIV_MAX)
+                        n_max = NDIV_MAX;
+
+                for (o = ODF_MIN; o <= ODF_MAX; o *= 2) {
+                        n = DIV_ROUND_CLOSEST(i * o * clkout_khz, clkin_khz);
+                        /* Check ndiv according to vco range */
+                        if ((n < n_min) || (n > n_max))
+                                continue;
+                        /* Check if new delta is better & saves parameters */
+                        delta = dsi_pll_get_clkout_khz(clkin_khz, i, n, o) -
+                                clkout_khz;
+                        if (delta < 0)
+                                delta = -delta;
+                        if (delta < best_delta) {
+                                *idf = i;
+                                *ndiv = n;
+                                *odf = o;
+                                best_delta = delta;
+                        }
+                        /* fast return in case of "perfect result" */
+                        if (!delta)
+                                return 0;
+                }
+        }
+
+        return 0;
+}
+
+static int dw_mipi_dsi_phy_init(void *priv_data)
+{
+        struct dw_mipi_dsi_stm *dsi = priv_data;
+        u32 val;
+        int ret;
+
+        /* Enable the regulator */
+        dsi_set(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN);
+        ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS,
+                                 SLEEP_US, TIMEOUT_US);
+        if (ret)
+                DRM_DEBUG_DRIVER("!TIMEOUT! waiting REGU, let's continue\n");
+
+        /* Enable the DSI PLL & wait for its lock */
+        dsi_set(dsi, DSI_WRPCR, WRPCR_PLLEN);
+        ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_PLLLS,
+                                 SLEEP_US, TIMEOUT_US);
+        if (ret)
+                DRM_DEBUG_DRIVER("!TIMEOUT! waiting PLL, let's continue\n");
+
+        /* Enable the DSI wrapper */
+        dsi_set(dsi, DSI_WCR, WCR_DSIEN);
+
+        return 0;
+}
+
+static int
+dw_mipi_dsi_get_lane_mbps(void *priv_data, struct drm_display_mode *mode,
+                          unsigned long mode_flags, u32 lanes, u32 format,
+                          unsigned int *lane_mbps)
+{
+        struct dw_mipi_dsi_stm *dsi = priv_data;
+        unsigned int idf, ndiv, odf, pll_in_khz, pll_out_khz;
+        int ret, bpp;
+        u32 val;
+
+        pll_in_khz = (unsigned int)(clk_get_rate(dsi->pllref_clk) / 1000);
+
+        /* Compute requested pll out */
+        bpp = mipi_dsi_pixel_format_to_bpp(format);
+        pll_out_khz = mode->clock * bpp / lanes;
+        /* Add 20% to pll out to be higher than pixel bw (burst mode only) */
+        pll_out_khz = (pll_out_khz * 12) / 10;
+        if (pll_out_khz > LANE_MAX_KBPS) {
+                pll_out_khz = LANE_MAX_KBPS;
+                DRM_WARN("Warning max phy mbps is used\n");
+        }
+        if (pll_out_khz < LANE_MIN_KBPS) {
+                pll_out_khz = LANE_MIN_KBPS;
+                DRM_WARN("Warning min phy mbps is used\n");
+        }
+
+        /* Compute best pll parameters */
+        idf = 0;
+        ndiv = 0;
+        odf = 0;
+        ret = dsi_pll_get_params(pll_in_khz, pll_out_khz, &idf, &ndiv, &odf);
+        if (ret)
+                DRM_WARN("Warning dsi_pll_get_params(): bad params\n");
+
+        /* Get the adjusted pll out value */
+        pll_out_khz = dsi_pll_get_clkout_khz(pll_in_khz, idf, ndiv, odf);
+
+        /* Set the PLL division factors */
+        dsi_update_bits(dsi, DSI_WRPCR, WRPCR_NDIV | WRPCR_IDF | WRPCR_ODF,
+                        (ndiv << 2) | (idf << 11) | ((ffs(odf) - 1) << 16));
+
+        /* Compute uix4 & set the bit period in high-speed mode */
+        val = 4000000 / pll_out_khz;
+        dsi_update_bits(dsi, DSI_WPCR0, WPCR0_UIX4, val);
+
+        /* Select video mode by resetting DSIM bit */
+        dsi_clear(dsi, DSI_WCFGR, WCFGR_DSIM);
+
+        /* Select the color coding */
+        dsi_update_bits(dsi, DSI_WCFGR, WCFGR_COLMUX,
+                        dsi_color_from_mipi(format) << 1);
+
+        *lane_mbps = pll_out_khz / 1000;
+
+        DRM_DEBUG_DRIVER("pll_in %ukHz pll_out %ukHz lane_mbps %uMHz\n",
+                         pll_in_khz, pll_out_khz, *lane_mbps);
+
+        return 0;
+}
+
+static const struct dw_mipi_dsi_phy_ops dw_mipi_dsi_stm_phy_ops = {
+        .init = dw_mipi_dsi_phy_init,
+        .get_lane_mbps = dw_mipi_dsi_get_lane_mbps,
+};
+
+static struct dw_mipi_dsi_plat_data dw_mipi_dsi_stm_plat_data = {
+        .max_data_lanes = 2,
+        .phy_ops = &dw_mipi_dsi_stm_phy_ops,
+};
+
+static const struct of_device_id dw_mipi_dsi_stm_dt_ids[] = {
+        { .compatible = "st,stm32-dsi", .data = &dw_mipi_dsi_stm_plat_data, },
+        { },
+};
+MODULE_DEVICE_TABLE(of, dw_mipi_dsi_stm_dt_ids);
+
+static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct dw_mipi_dsi_stm *dsi;
+        struct resource *res;
+        int ret;
+
+        dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
+        if (!dsi)
+                return -ENOMEM;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                DRM_ERROR("Unable to get resource\n");
+                return -ENODEV;
+        }
+
+        dsi->base = devm_ioremap_resource(dev, res);
+        if (IS_ERR(dsi->base)) {
+                DRM_ERROR("Unable to get dsi registers\n");
+                return PTR_ERR(dsi->base);
+        }
+
+        dsi->pllref_clk = devm_clk_get(dev, "ref");
+        if (IS_ERR(dsi->pllref_clk)) {
+                ret = PTR_ERR(dsi->pllref_clk);
+                dev_err(dev, "Unable to get pll reference clock: %d\n", ret);
+                return ret;
+        }
+
+        ret = clk_prepare_enable(dsi->pllref_clk);
+        if (ret) {
+                dev_err(dev, "%s: Failed to enable pllref_clk\n", __func__);
+                return ret;
+        }
+
+        dw_mipi_dsi_stm_plat_data.base = dsi->base;
+        dw_mipi_dsi_stm_plat_data.priv_data = dsi;
+
+        ret = dw_mipi_dsi_probe(pdev, &dw_mipi_dsi_stm_plat_data);
+        if (ret) {
+                DRM_ERROR("Failed to initialize mipi dsi host\n");
+                clk_disable_unprepare(dsi->pllref_clk);
+        }
+
+        return ret;
+}
+
+static int dw_mipi_dsi_stm_remove(struct platform_device *pdev)
+{
+        struct dw_mipi_dsi_stm *dsi = dw_mipi_dsi_stm_plat_data.priv_data;
+
+        clk_disable_unprepare(dsi->pllref_clk);
+        dw_mipi_dsi_remove(pdev);
+
+        return 0;
+}
+
+static struct platform_driver dw_mipi_dsi_stm_driver = {
+        .probe          = dw_mipi_dsi_stm_probe,
+        .remove         = dw_mipi_dsi_stm_remove,
+        .driver         = {
+                .of_match_table = dw_mipi_dsi_stm_dt_ids,
+                .name   = "dw_mipi_dsi-stm",
+        },
+};
+
+module_platform_driver(dw_mipi_dsi_stm_driver);
+
+MODULE_AUTHOR("Philippe Cornu <philippe.cornu@st.com>");
+MODULE_AUTHOR("Yannick Fertre <yannick.fertre@st.com>");
+MODULE_DESCRIPTION("STMicroelectronics DW MIPI DSI host controller driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index e46b427eacc7..d394a03632c4 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -42,52 +42,52 @@
  * an extra offset specified with reg_ofs.
  */
 #define REG_OFS_NONE    0
-#define REG_OFS_4       4 /* Insertion of "Layer Configuration 2" reg */
+#define REG_OFS_4       4               /* Insertion of "Layer Conf. 2" reg */
 #define REG_OFS         (ldev->caps.reg_ofs)
-#define LAY_OFS         0x80    /* Register Offset between 2 layers */
+#define LAY_OFS         0x80            /* Register Offset between 2 layers */
 
 /* Global register offsets */
-#define LTDC_IDR        0x0000 /* IDentification */
-#define LTDC_LCR        0x0004 /* Layer Count */
-#define LTDC_SSCR       0x0008 /* Synchronization Size Configuration */
-#define LTDC_BPCR       0x000C /* Back Porch Configuration */
-#define LTDC_AWCR       0x0010 /* Active Width Configuration */
-#define LTDC_TWCR       0x0014 /* Total Width Configuration */
-#define LTDC_GCR        0x0018 /* Global Control */
-#define LTDC_GC1R       0x001C /* Global Configuration 1 */
-#define LTDC_GC2R       0x0020 /* Global Configuration 2 */
-#define LTDC_SRCR       0x0024 /* Shadow Reload Configuration */
-#define LTDC_GACR       0x0028 /* GAmma Correction */
-#define LTDC_BCCR       0x002C /* Background Color Configuration */
-#define LTDC_IER        0x0034 /* Interrupt Enable */
-#define LTDC_ISR        0x0038 /* Interrupt Status */
-#define LTDC_ICR        0x003C /* Interrupt Clear */
-#define LTDC_LIPCR      0x0040 /* Line Interrupt Position Configuration */
-#define LTDC_CPSR       0x0044 /* Current Position Status */
-#define LTDC_CDSR       0x0048 /* Current Display Status */
+#define LTDC_IDR        0x0000          /* IDentification */
+#define LTDC_LCR        0x0004          /* Layer Count */
+#define LTDC_SSCR       0x0008          /* Synchronization Size Configuration */
+#define LTDC_BPCR       0x000C          /* Back Porch Configuration */
+#define LTDC_AWCR       0x0010          /* Active Width Configuration */
+#define LTDC_TWCR       0x0014          /* Total Width Configuration */
+#define LTDC_GCR        0x0018          /* Global Control */
+#define LTDC_GC1R       0x001C          /* Global Configuration 1 */
+#define LTDC_GC2R       0x0020          /* Global Configuration 2 */
+#define LTDC_SRCR       0x0024          /* Shadow Reload Configuration */
+#define LTDC_GACR       0x0028          /* GAmma Correction */
+#define LTDC_BCCR       0x002C          /* Background Color Configuration */
+#define LTDC_IER        0x0034          /* Interrupt Enable */
+#define LTDC_ISR        0x0038          /* Interrupt Status */
+#define LTDC_ICR        0x003C          /* Interrupt Clear */
+#define LTDC_LIPCR      0x0040          /* Line Interrupt Position Conf. */
+#define LTDC_CPSR       0x0044          /* Current Position Status */
+#define LTDC_CDSR       0x0048          /* Current Display Status */
 
 /* Layer register offsets */
-#define LTDC_L1LC1R     (0x0080)           /* L1 Layer Configuration 1 */
-#define LTDC_L1LC2R     (0x0084)           /* L1 Layer Configuration 2 */
-#define LTDC_L1CR       (0x0084 + REG_OFS) /* L1 Control */
-#define LTDC_L1WHPCR    (0x0088 + REG_OFS) /* L1 Window Hor Position Config */
-#define LTDC_L1WVPCR    (0x008C + REG_OFS) /* L1 Window Vert Position Config */
-#define LTDC_L1CKCR     (0x0090 + REG_OFS) /* L1 Color Keying Configuration */
-#define LTDC_L1PFCR     (0x0094 + REG_OFS) /* L1 Pixel Format Configuration */
-#define LTDC_L1CACR     (0x0098 + REG_OFS) /* L1 Constant Alpha Config */
-#define LTDC_L1DCCR     (0x009C + REG_OFS) /* L1 Default Color Configuration */
-#define LTDC_L1BFCR     (0x00A0 + REG_OFS) /* L1 Blend Factors Configuration */
-#define LTDC_L1FBBCR    (0x00A4 + REG_OFS) /* L1 FrameBuffer Bus Control */
-#define LTDC_L1AFBCR    (0x00A8 + REG_OFS) /* L1 AuxFB Control */
-#define LTDC_L1CFBAR    (0x00AC + REG_OFS) /* L1 Color FrameBuffer Address */
-#define LTDC_L1CFBLR    (0x00B0 + REG_OFS) /* L1 Color FrameBuffer Length */
-#define LTDC_L1CFBLNR   (0x00B4 + REG_OFS) /* L1 Color FrameBuffer Line Nb */
-#define LTDC_L1AFBAR    (0x00B8 + REG_OFS) /* L1 AuxFB Address */
-#define LTDC_L1AFBLR    (0x00BC + REG_OFS) /* L1 AuxFB Length */
-#define LTDC_L1AFBLNR   (0x00C0 + REG_OFS) /* L1 AuxFB Line Number */
-#define LTDC_L1CLUTWR   (0x00C4 + REG_OFS) /* L1 CLUT Write */
-#define LTDC_L1YS1R     (0x00E0 + REG_OFS) /* L1 YCbCr Scale 1 */
-#define LTDC_L1YS2R     (0x00E4 + REG_OFS) /* L1 YCbCr Scale 2 */
+#define LTDC_L1LC1R     (0x80)          /* L1 Layer Configuration 1 */
+#define LTDC_L1LC2R     (0x84)          /* L1 Layer Configuration 2 */
+#define LTDC_L1CR       (0x84 + REG_OFS)/* L1 Control */
+#define LTDC_L1WHPCR    (0x88 + REG_OFS)/* L1 Window Hor Position Config */
+#define LTDC_L1WVPCR    (0x8C + REG_OFS)/* L1 Window Vert Position Config */
+#define LTDC_L1CKCR     (0x90 + REG_OFS)/* L1 Color Keying Configuration */
+#define LTDC_L1PFCR     (0x94 + REG_OFS)/* L1 Pixel Format Configuration */
+#define LTDC_L1CACR     (0x98 + REG_OFS)/* L1 Constant Alpha Config */
+#define LTDC_L1DCCR     (0x9C + REG_OFS)/* L1 Default Color Configuration */
+#define LTDC_L1BFCR     (0xA0 + REG_OFS)/* L1 Blend Factors Configuration */
+#define LTDC_L1FBBCR    (0xA4 + REG_OFS)/* L1 FrameBuffer Bus Control */
+#define LTDC_L1AFBCR    (0xA8 + REG_OFS)/* L1 AuxFB Control */
+#define LTDC_L1CFBAR    (0xAC + REG_OFS)/* L1 Color FrameBuffer Address */
+#define LTDC_L1CFBLR    (0xB0 + REG_OFS)/* L1 Color FrameBuffer Length */
+#define LTDC_L1CFBLNR   (0xB4 + REG_OFS)/* L1 Color FrameBuffer Line Nb */
+#define LTDC_L1AFBAR    (0xB8 + REG_OFS)/* L1 AuxFB Address */
+#define LTDC_L1AFBLR    (0xBC + REG_OFS)/* L1 AuxFB Length */
+#define LTDC_L1AFBLNR   (0xC0 + REG_OFS)/* L1 AuxFB Line Number */
+#define LTDC_L1CLUTWR   (0xC4 + REG_OFS)/* L1 CLUT Write */
+#define LTDC_L1YS1R     (0xE0 + REG_OFS)/* L1 YCbCr Scale 1 */
+#define LTDC_L1YS2R     (0xE4 + REG_OFS)/* L1 YCbCr Scale 2 */
 
 /* Bit definitions */
 #define SSCR_VSH        GENMASK(10, 0)  /* Vertical Synchronization Height */
@@ -104,10 +104,10 @@
 
 #define GCR_LTDCEN      BIT(0)          /* LTDC ENable */
 #define GCR_DEN         BIT(16)         /* Dither ENable */
-#define GCR_PCPOL       BIT(28)         /* Pixel Clock POLarity */
-#define GCR_DEPOL       BIT(29)         /* Data Enable POLarity */
-#define GCR_VSPOL       BIT(30)         /* Vertical Synchro POLarity */
-#define GCR_HSPOL       BIT(31)         /* Horizontal Synchro POLarity */
+#define GCR_PCPOL       BIT(28)         /* Pixel Clock POLarity-Inverted */
+#define GCR_DEPOL       BIT(29)         /* Data Enable POLarity-High */
+#define GCR_VSPOL       BIT(30)         /* Vertical Synchro POLarity-High */
+#define GCR_HSPOL       BIT(31)         /* Horizontal Synchro POLarity-High */
 
 #define GC1R_WBCH       GENMASK(3, 0)   /* Width of Blue CHannel output */
 #define GC1R_WGCH       GENMASK(7, 4)   /* Width of Green Channel output */
@@ -172,60 +172,52 @@
 #define LXCFBLR_CFBLL   GENMASK(12, 0)  /* Color Frame Buffer Line Length */
 #define LXCFBLR_CFBP    GENMASK(28, 16) /* Color Frame Buffer Pitch in bytes */
 
-#define LXCFBLNR_CFBLN  GENMASK(10, 0)   /* Color Frame Buffer Line Number */
+#define LXCFBLNR_CFBLN  GENMASK(10, 0)  /* Color Frame Buffer Line Number */
 
-#define HSPOL_AL   0            /* Horizontal Sync POLarity Active Low */
-#define VSPOL_AL   0            /* Vertical Sync POLarity Active Low */
-#define DEPOL_AL   0            /* Data Enable POLarity Active Low */
-#define PCPOL_IPC  0            /* Input Pixel Clock */
-#define HSPOL_AH   GCR_HSPOL    /* Horizontal Sync POLarity Active High */
-#define VSPOL_AH   GCR_VSPOL    /* Vertical Sync POLarity Active High */
-#define DEPOL_AH   GCR_DEPOL    /* Data Enable POLarity Active High */
-#define PCPOL_IIPC GCR_PCPOL    /* Inverted Input Pixel Clock */
-#define CONSTA_MAX 0xFF         /* CONSTant Alpha MAX= 1.0 */
-#define BF1_PAXCA  0x600        /* Pixel Alpha x Constant Alpha */
-#define BF1_CA     0x400        /* Constant Alpha */
-#define BF2_1PAXCA 0x007        /* 1 - (Pixel Alpha x Constant Alpha) */
-#define BF2_1CA    0x005        /* 1 - Constant Alpha */
+#define CONSTA_MAX      0xFF            /* CONSTant Alpha MAX= 1.0 */
+#define BF1_PAXCA       0x600           /* Pixel Alpha x Constant Alpha */
+#define BF1_CA          0x400           /* Constant Alpha */
+#define BF2_1PAXCA      0x007           /* 1 - (Pixel Alpha x Constant Alpha) */
+#define BF2_1CA         0x005           /* 1 - Constant Alpha */
 
-#define NB_PF           8       /* Max nb of HW pixel format */
+#define NB_PF           8               /* Max nb of HW pixel format */
 
 enum ltdc_pix_fmt {
         PF_NONE,
         /* RGB formats */
-        PF_ARGB8888,    /* ARGB [32 bits] */
-        PF_RGBA8888,    /* RGBA [32 bits] */
-        PF_RGB888,      /* RGB [24 bits] */
-        PF_RGB565,      /* RGB [16 bits] */
-        PF_ARGB1555,    /* ARGB A:1 bit RGB:15 bits [16 bits] */
-        PF_ARGB4444,    /* ARGB A:4 bits R/G/B: 4 bits each [16 bits] */
+        PF_ARGB8888,            /* ARGB [32 bits] */
+        PF_RGBA8888,            /* RGBA [32 bits] */
+        PF_RGB888,              /* RGB [24 bits] */
+        PF_RGB565,              /* RGB [16 bits] */
+        PF_ARGB1555,            /* ARGB A:1 bit RGB:15 bits [16 bits] */
+        PF_ARGB4444,            /* ARGB A:4 bits R/G/B: 4 bits each [16 bits] */
         /* Indexed formats */
-        PF_L8,          /* Indexed 8 bits [8 bits] */
-        PF_AL44,        /* Alpha:4 bits + indexed 4 bits [8 bits] */
-        PF_AL88         /* Alpha:8 bits + indexed 8 bits [16 bits] */
+        PF_L8,                  /* Indexed 8 bits [8 bits] */
+        PF_AL44,                /* Alpha:4 bits + indexed 4 bits [8 bits] */
+        PF_AL88                 /* Alpha:8 bits + indexed 8 bits [16 bits] */
 };
 
 /* The index gives the encoding of the pixel format for an HW version */
 static const enum ltdc_pix_fmt ltdc_pix_fmt_a0[NB_PF] = {
-        PF_ARGB8888,    /* 0x00 */
-        PF_RGB888,      /* 0x01 */
-        PF_RGB565,      /* 0x02 */
-        PF_ARGB1555,    /* 0x03 */
-        PF_ARGB4444,    /* 0x04 */
-        PF_L8,          /* 0x05 */
-        PF_AL44,        /* 0x06 */
-        PF_AL88         /* 0x07 */
+        PF_ARGB8888,            /* 0x00 */
+        PF_RGB888,              /* 0x01 */
+        PF_RGB565,              /* 0x02 */
+        PF_ARGB1555,            /* 0x03 */
+        PF_ARGB4444,            /* 0x04 */
+        PF_L8,                  /* 0x05 */
+        PF_AL44,                /* 0x06 */
+        PF_AL88                 /* 0x07 */
 };
 
 static const enum ltdc_pix_fmt ltdc_pix_fmt_a1[NB_PF] = {
-        PF_ARGB8888,    /* 0x00 */
-        PF_RGB888,      /* 0x01 */
-        PF_RGB565,      /* 0x02 */
-        PF_RGBA8888,    /* 0x03 */
-        PF_AL44,        /* 0x04 */
-        PF_L8,          /* 0x05 */
-        PF_ARGB1555,    /* 0x06 */
-        PF_ARGB4444     /* 0x07 */
+        PF_ARGB8888,            /* 0x00 */
+        PF_RGB888,              /* 0x01 */
+        PF_RGB565,              /* 0x02 */
+        PF_RGBA8888,            /* 0x03 */
+        PF_AL44,                /* 0x04 */
+        PF_L8,                  /* 0x05 */
+        PF_ARGB1555,            /* 0x06 */
+        PF_ARGB4444             /* 0x07 */
 };
 
 static inline u32 reg_read(void __iomem *base, u32 reg)
@@ -302,7 +294,7 @@ static inline enum ltdc_pix_fmt to_ltdc_pixelformat(u32 drm_fmt)
         default:
                 pf = PF_NONE;
                 break;
-        /* Note: There are no DRM_FORMAT for AL44 and AL88 */
+                /* Note: There are no DRM_FORMAT for AL44 and AL88 */
         }
 
         return pf;
@@ -325,8 +317,8 @@ static inline u32 to_drm_pixelformat(enum ltdc_pix_fmt pf)
                 return DRM_FORMAT_ARGB4444;
         case PF_L8:
                 return DRM_FORMAT_C8;
-        case PF_AL44: /* No DRM support */
-        case PF_AL88: /* No DRM support */
+        case PF_AL44:           /* No DRM support */
+        case PF_AL88:           /* No DRM support */
         case PF_NONE:
         default:
                 return 0;
@@ -370,17 +362,6 @@ static irqreturn_t ltdc_irq(int irq, void *arg)
  * DRM_CRTC
  */
 
-static void ltdc_crtc_load_lut(struct drm_crtc *crtc)
-{
-        struct ltdc_device *ldev = crtc_to_ltdc(crtc);
-        unsigned int i, lay;
-
-        for (lay = 0; lay < ldev->caps.nb_layers; lay++)
-                for (i = 0; i < 256; i++)
-                        reg_write(ldev->regs, LTDC_L1CLUTWR + lay * LAY_OFS,
-                                  ldev->clut[i]);
-}
-
 static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc,
                                     struct drm_crtc_state *old_state)
 {
@@ -459,20 +440,20 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
 
         clk_enable(ldev->pixel_clk);
 
-        /* Configures the HS, VS, DE and PC polarities. */
-        val = HSPOL_AL | VSPOL_AL | DEPOL_AL | PCPOL_IPC;
+        /* Configures the HS, VS, DE and PC polarities. Default Active Low */
+        val = 0;
 
         if (vm.flags & DISPLAY_FLAGS_HSYNC_HIGH)
-                val |= HSPOL_AH;
+                val |= GCR_HSPOL;
 
         if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH)
-                val |= VSPOL_AH;
+                val |= GCR_VSPOL;
 
         if (vm.flags & DISPLAY_FLAGS_DE_HIGH)
-                val |= DEPOL_AH;
+                val |= GCR_DEPOL;
 
         if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
-                val |= PCPOL_IIPC;
+                val |= GCR_PCPOL;
 
         reg_update_bits(ldev->regs, LTDC_GCR,
                         GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -519,8 +500,7 @@ static void ltdc_crtc_atomic_flush(struct drm_crtc *crtc,
         }
 }
 
-static struct drm_crtc_helper_funcs ltdc_crtc_helper_funcs = {
-        .load_lut = ltdc_crtc_load_lut,
+static const struct drm_crtc_helper_funcs ltdc_crtc_helper_funcs = {
         .mode_set_nofb = ltdc_crtc_mode_set_nofb,
         .atomic_flush = ltdc_crtc_atomic_flush,
         .atomic_enable = ltdc_crtc_atomic_enable,
@@ -545,7 +525,7 @@ void ltdc_crtc_disable_vblank(struct drm_device *ddev, unsigned int pipe)
         reg_clear(ldev->regs, LTDC_IER, IER_LIE);
 }
 
-static struct drm_crtc_funcs ltdc_crtc_funcs = {
+static const struct drm_crtc_funcs ltdc_crtc_funcs = {
         .destroy = drm_crtc_cleanup,
         .set_config = drm_atomic_helper_set_config,
         .page_flip = drm_atomic_helper_page_flip,
@@ -610,11 +590,11 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
         src_w = state->src_w >> 16;
         src_h = state->src_h >> 16;
 
-        DRM_DEBUG_DRIVER(
-                "plane:%d fb:%d (%dx%d)@(%d,%d) -> (%dx%d)@(%d,%d)\n",
-                plane->base.id, fb->base.id,
-                src_w, src_h, src_x, src_y,
-                state->crtc_w, state->crtc_h, state->crtc_x, state->crtc_y);
+        DRM_DEBUG_DRIVER("plane:%d fb:%d (%dx%d)@(%d,%d) -> (%dx%d)@(%d,%d)\n",
+                         plane->base.id, fb->base.id,
+                         src_w, src_h, src_x, src_y,
+                         state->crtc_w, state->crtc_h,
+                         state->crtc_x, state->crtc_y);
 
         bpcr = reg_read(ldev->regs, LTDC_BPCR);
         ahbp = (bpcr & BPCR_AHBP) >> 16;
@@ -639,7 +619,7 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
         if (val == NB_PF) {
                 DRM_ERROR("Pixel format %.4s not supported\n",
                           (char *)&fb->format->format);
-                val = 0; /* set by default ARGB 32 bits */
+                val = 0;        /* set by default ARGB 32 bits */
         }
         reg_update_bits(ldev->regs, LTDC_L1PFCR + lofs, LXPFCR_PF, val);
 
@@ -653,8 +633,7 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
 
         /* Specifies the constant alpha value */
         val = CONSTA_MAX;
-        reg_update_bits(ldev->regs, LTDC_L1CACR + lofs,
-                        LXCACR_CONSTA, val);
+        reg_update_bits(ldev->regs, LTDC_L1CACR + lofs, LXCACR_CONSTA, val);
 
         /* Specifies the blending factors */
         val = BF1_PAXCA | BF2_1PAXCA;
@@ -663,8 +642,7 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
 
         /* Configures the frame buffer line number */
         val = y1 - y0 + 1;
-        reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs,
-                        LXCFBLNR_CFBLN, val);
+        reg_update_bits(ldev->regs, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, val);
 
         /* Sets the FB address */
         paddr = (u32)drm_fb_cma_get_gem_addr(fb, state, 0);
@@ -703,11 +681,10 @@ static void ltdc_plane_atomic_disable(struct drm_plane *plane,
                          oldstate->crtc->base.id, plane->base.id);
 }
 
-static struct drm_plane_funcs ltdc_plane_funcs = {
+static const struct drm_plane_funcs ltdc_plane_funcs = {
         .update_plane = drm_atomic_helper_update_plane,
         .disable_plane = drm_atomic_helper_disable_plane,
         .destroy = drm_plane_cleanup,
-        .set_property = drm_atomic_helper_plane_set_property,
         .reset = drm_atomic_helper_plane_reset,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
@@ -745,7 +722,7 @@ static struct drm_plane *ltdc_plane_create(struct drm_device *ddev,
 
         ret = drm_universal_plane_init(ddev, plane, possible_crtcs,
                                        &ltdc_plane_funcs, formats, nb_fmt,
-                                       type, NULL);
+                                       NULL, type, NULL);
         if (ret < 0)
                 return 0;
 
@@ -770,7 +747,7 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
         struct ltdc_device *ldev = ddev->dev_private;
         struct drm_plane *primary, *overlay;
         unsigned int i;
-        int res;
+        int ret;
 
         primary = ltdc_plane_create(ddev, DRM_PLANE_TYPE_PRIMARY);
         if (!primary) {
@@ -778,9 +755,9 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
                 return -EINVAL;
         }
 
-        res = drm_crtc_init_with_planes(ddev, crtc, primary, NULL,
+        ret = drm_crtc_init_with_planes(ddev, crtc, primary, NULL,
                                         &ltdc_crtc_funcs, NULL);
-        if (res) {
+        if (ret) {
                 DRM_ERROR("Can not initialize CRTC\n");
                 goto cleanup;
         }
@@ -793,7 +770,7 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
         for (i = 1; i < ldev->caps.nb_layers; i++) {
                 overlay = ltdc_plane_create(ddev, DRM_PLANE_TYPE_OVERLAY);
                 if (!overlay) {
-                        res = -ENOMEM;
+                        ret = -ENOMEM;
                         DRM_ERROR("Can not create overlay plane %d\n", i);
                         goto cleanup;
                 }
@@ -803,7 +780,7 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
 
 cleanup:
         ltdc_plane_destroy_all(ddev);
-        return res;
+        return ret;
 }
 
 /*
@@ -825,7 +802,7 @@ static int ltdc_encoder_init(struct drm_device *ddev)
                 return -ENOMEM;
 
         encoder->possible_crtcs = CRTC_MASK;
-        encoder->possible_clones = 0; /* No cloning support */
+        encoder->possible_clones = 0;   /* No cloning support */
 
         drm_encoder_init(ddev, encoder, &ltdc_encoder_funcs,
                          DRM_MODE_ENCODER_DPI, NULL);
@@ -884,7 +861,7 @@ int ltdc_load(struct drm_device *ddev)
         struct drm_panel *panel;
         struct drm_crtc *crtc;
         struct reset_control *rstc;
-        struct resource res;
+        struct resource *res;
         int irq, ret, i;
 
         DRM_DEBUG_DRIVER("\n");
@@ -893,7 +870,7 @@ int ltdc_load(struct drm_device *ddev)
         if (ret)
                 return ret;
 
-        rstc = of_reset_control_get(np, NULL);
+        rstc = devm_reset_control_get_exclusive(dev, NULL);
 
         mutex_init(&ldev->err_lock);
 
@@ -908,13 +885,14 @@ int ltdc_load(struct drm_device *ddev)
                 return -ENODEV;
         }
 
-        if (of_address_to_resource(np, 0, &res)) {
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
                 DRM_ERROR("Unable to get resource\n");
                 ret = -ENODEV;
                 goto err;
         }
 
-        ldev->regs = devm_ioremap_resource(dev, &res);
+        ldev->regs = devm_ioremap_resource(dev, res);
         if (IS_ERR(ldev->regs)) {
                 DRM_ERROR("Unable to get ltdc registers\n");
                 ret = PTR_ERR(ldev->regs);
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index d9e899d296ec..bc6d6f6419a9 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -28,7 +28,6 @@ struct ltdc_device {
         bool is_panel_bridge;
         struct mutex err_lock;  /* protecting error_status */
         struct ltdc_caps caps;
-        u32 clut[256];          /* color look up table */
         u32 error_status;
         u32 irq_status;
 };
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 89cd590723ac..d599206a1e86 100644
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
@@ -40,8 +40,6 @@ static struct drm_driver sun4i_drv_driver = {
 
         /* GEM Operations */
         .dumb_create            = drm_gem_cma_dumb_create,
-        .dumb_destroy           = drm_gem_dumb_destroy,
-        .dumb_map_offset        = drm_gem_cma_dumb_map_offset,
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops             = &drm_gem_cma_vm_ops,
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
index 83b7a2a025f2..f5d0d6bd1084 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
@@ -306,7 +306,6 @@ sun4i_hdmi_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs sun4i_hdmi_connector_funcs = {
-        .dpms                   = drm_atomic_helper_connector_dpms,
         .detect                 = sun4i_hdmi_connector_detect,
         .fill_modes             = drm_helper_probe_single_connector_modes,
         .destroy                = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c
index ead4f9d4c1ee..d45f3a1a0a29 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun4i_layer.c
@@ -115,7 +115,7 @@ static struct sun4i_layer *sun4i_layer_init_one(struct drm_device *drm,
         ret = drm_universal_plane_init(drm, &layer->plane, 0,
                                        &sun4i_backend_layer_funcs,
                                        plane->formats, plane->nformats,
-                                       plane->type, NULL);
+                                       NULL, plane->type, NULL);
         if (ret) {
                 dev_err(drm->dev, "Couldn't initialize layer\n");
                 return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c
index 422b191faa77..550bb262943f 100644
--- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
@@ -120,7 +120,6 @@ sun4i_rgb_connector_destroy(struct drm_connector *connector)
 }
 
 static struct drm_connector_funcs sun4i_rgb_con_funcs = {
-        .dpms                   = drm_atomic_helper_connector_dpms,
         .fill_modes             = drm_helper_probe_single_connector_modes,
         .destroy                = sun4i_rgb_connector_destroy,
         .reset                  = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 338b9e5bb2a3..7b45ac9383ea 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tv.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tv.c
@@ -546,7 +546,6 @@ sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
 }
 
 static struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
-        .dpms                   = drm_atomic_helper_connector_dpms,
         .fill_modes             = drm_helper_probe_single_connector_modes,
         .destroy                = sun4i_tv_comp_connector_destroy,
         .reset                  = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.c b/drivers/gpu/drm/sun4i/sun8i_layer.c
index e627eeece658..23810ff72684 100644
--- a/drivers/gpu/drm/sun4i/sun8i_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_layer.c
@@ -90,7 +90,7 @@ static struct sun8i_layer *sun8i_layer_init_one(struct drm_device *drm,
         ret = drm_universal_plane_init(drm, &layer->plane, 0,
                                        &sun8i_mixer_layer_funcs,
                                        plane->formats, plane->nformats,
-                                       plane->type, NULL);
+                                       NULL, plane->type, NULL);
         if (ret) {
                 dev_err(drm->dev, "Couldn't initialize layer\n");
                 return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 0cb9b90e2e68..4df39112e38e 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -678,8 +678,8 @@ static struct drm_plane *tegra_dc_primary_plane_create(struct drm_device *drm,
 
         err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,
                                        &tegra_primary_plane_funcs, formats,
-                                       num_formats, DRM_PLANE_TYPE_PRIMARY,
-                                       NULL);
+                                       num_formats, NULL,
+                                       DRM_PLANE_TYPE_PRIMARY, NULL);
         if (err < 0) {
                 kfree(plane);
                 return ERR_PTR(err);
@@ -844,8 +844,8 @@ static struct drm_plane *tegra_dc_cursor_plane_create(struct drm_device *drm,
 
         err = drm_universal_plane_init(drm, &plane->base, 1 << dc->pipe,
                                        &tegra_cursor_plane_funcs, formats,
-                                       num_formats, DRM_PLANE_TYPE_CURSOR,
-                                       NULL);
+                                       num_formats, NULL,
+                                       DRM_PLANE_TYPE_CURSOR, NULL);
         if (err < 0) {
                 kfree(plane);
                 return ERR_PTR(err);
@@ -906,8 +906,8 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm,
 
         err = drm_universal_plane_init(drm, &plane->base, 1 << dc->pipe,
                                        &tegra_overlay_plane_funcs, formats,
-                                       num_formats, DRM_PLANE_TYPE_OVERLAY,
-                                       NULL);
+                                       num_formats, NULL,
+                                       DRM_PLANE_TYPE_OVERLAY, NULL);
         if (err < 0) {
                 kfree(plane);
                 return ERR_PTR(err);
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 3dea1216bafd..e4b5aedfdbd4 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -815,7 +815,6 @@ tegra_dsi_connector_duplicate_state(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs tegra_dsi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = tegra_dsi_connector_reset,
         .detect = tegra_output_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index 718d8db406a6..a621b0da4092 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -902,7 +902,6 @@ tegra_hdmi_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs tegra_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .detect = tegra_hdmi_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c
index a131b44e2d6f..78ec5193741d 100644
--- a/drivers/gpu/drm/tegra/rgb.c
+++ b/drivers/gpu/drm/tegra/rgb.c
@@ -88,7 +88,6 @@ static void tegra_dc_write_regs(struct tegra_dc *dc,
 }
 
 static const struct drm_connector_funcs tegra_rgb_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .detect = tegra_output_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index fb2709c0c461..e0642d05a8d3 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -1340,7 +1340,6 @@ tegra_sor_connector_duplicate_state(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs tegra_sor_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = tegra_sor_connector_reset,
         .detect = tegra_sor_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 049d2f5a1ee4..b0d70f943cec 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -542,8 +542,6 @@ static struct drm_driver tilcdc_driver = {
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops         = &drm_gem_cma_vm_ops,
         .dumb_create        = drm_gem_cma_dumb_create,
-        .dumb_map_offset    = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy       = drm_gem_dumb_destroy,
 
         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
index 28c3e2f44f64..1813a3623ce6 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c
@@ -189,7 +189,6 @@ static struct drm_encoder *panel_connector_best_encoder(
 
 static const struct drm_connector_funcs panel_connector_funcs = {
         .destroy            = panel_connector_destroy,
-        .dpms               = drm_atomic_helper_connector_dpms,
         .fill_modes         = drm_helper_probe_single_connector_modes,
         .reset              = drm_atomic_helper_connector_reset,
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_plane.c b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
index ba0d66c0d8ac..7667b038ae7f 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_plane.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_plane.c
@@ -28,7 +28,6 @@ static struct drm_plane_funcs tilcdc_plane_funcs = {
         .update_plane   = drm_atomic_helper_update_plane,
         .disable_plane  = drm_atomic_helper_disable_plane,
         .destroy        = drm_plane_cleanup,
-        .set_property   = drm_atomic_helper_plane_set_property,
         .reset          = drm_atomic_helper_plane_reset,
         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
index aabfad882e23..1e2dfb1b1d6b 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
@@ -202,7 +202,6 @@ static struct drm_encoder *tfp410_connector_best_encoder(
 
 static const struct drm_connector_funcs tfp410_connector_funcs = {
         .destroy            = tfp410_connector_destroy,
-        .dpms               = drm_atomic_helper_connector_dpms,
         .detect             = tfp410_connector_detect,
         .fill_modes         = drm_helper_probe_single_connector_modes,
         .reset              = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/tinydrm/Kconfig b/drivers/gpu/drm/tinydrm/Kconfig
index 9596e447f877..f17c3caceab2 100644
--- a/drivers/gpu/drm/tinydrm/Kconfig
+++ b/drivers/gpu/drm/tinydrm/Kconfig
@@ -23,6 +23,7 @@ config TINYDRM_MI0283QT
 config TINYDRM_REPAPER
         tristate "DRM support for Pervasive Displays RePaper panels (V231)"
         depends on DRM_TINYDRM && SPI
+        depends on THERMAL || !THERMAL
         help
           DRM driver for the following Pervasive Displays panels:
           1.44" TFT EPD Panel (E1144CS021)
diff --git a/drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c b/drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c
index ec43fb7ad9e4..f224b54a30f6 100644
--- a/drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c
+++ b/drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c
@@ -71,7 +71,6 @@ static void tinydrm_connector_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs tinydrm_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .reset = drm_atomic_helper_connector_reset,
         .detect = tinydrm_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
@@ -225,7 +224,7 @@ tinydrm_display_pipe_init(struct tinydrm_device *tdev,
                 return PTR_ERR(connector);
 
         ret = drm_simple_display_pipe_init(drm, &tdev->pipe, funcs, formats,
-                                           format_count, connector);
+                                           format_count, NULL, connector);
         if (ret)
                 return ret;
 
diff --git a/drivers/gpu/drm/tinydrm/mi0283qt.c b/drivers/gpu/drm/tinydrm/mi0283qt.c
index 482ff1c3db61..7e5bb7d6f655 100644
--- a/drivers/gpu/drm/tinydrm/mi0283qt.c
+++ b/drivers/gpu/drm/tinydrm/mi0283qt.c
@@ -195,8 +195,12 @@ static int mi0283qt_probe(struct spi_device *spi)
 
         device_property_read_u32(dev, "rotation", &rotation);
 
-        ret = mipi_dbi_spi_init(spi, mipi, dc, &mi0283qt_pipe_funcs,
-                                &mi0283qt_driver, &mi0283qt_mode, rotation);
+        ret = mipi_dbi_spi_init(spi, mipi, dc);
+        if (ret)
+                return ret;
+
+        ret = mipi_dbi_init(&spi->dev, mipi, &mi0283qt_pipe_funcs,
+                            &mi0283qt_driver, &mi0283qt_mode, rotation);
         if (ret)
                 return ret;
 
diff --git a/drivers/gpu/drm/tinydrm/mipi-dbi.c b/drivers/gpu/drm/tinydrm/mipi-dbi.c
index c83eeb7a34b0..2caeabcd3458 100644
--- a/drivers/gpu/drm/tinydrm/mipi-dbi.c
+++ b/drivers/gpu/drm/tinydrm/mipi-dbi.c
@@ -776,15 +776,12 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *mipi, u8 cmd,
 /**
  * mipi_dbi_spi_init - Initialize MIPI DBI SPI interfaced controller
  * @spi: SPI device
- * @dc: D/C gpio (optional)
  * @mipi: &mipi_dbi structure to initialize
- * @pipe_funcs: Display pipe functions
- * @driver: DRM driver
- * @mode: Display mode
- * @rotation: Initial rotation in degrees Counter Clock Wise
+ * @dc: D/C gpio (optional)
  *
  * This function sets &mipi_dbi->command, enables &mipi->read_commands for the
- * usual read commands and initializes @mipi using mipi_dbi_init().
+ * usual read commands. It should be followed by a call to mipi_dbi_init() or
+ * a driver-specific init.
  *
  * If @dc is set, a Type C Option 3 interface is assumed, if not
  * Type C Option 1.
@@ -799,11 +796,7 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *mipi, u8 cmd,
  * Zero on success, negative error code on failure.
  */
 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *mipi,
-                      struct gpio_desc *dc,
-                      const struct drm_simple_display_pipe_funcs *pipe_funcs,
-                      struct drm_driver *driver,
-                      const struct drm_display_mode *mode,
-                      unsigned int rotation)
+                      struct gpio_desc *dc)
 {
         size_t tx_size = tinydrm_spi_max_transfer_size(spi, 0);
         struct device *dev = &spi->dev;
@@ -849,7 +842,7 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *mipi,
                         return -ENOMEM;
         }
 
-        return mipi_dbi_init(dev, mipi, pipe_funcs, driver, mode, rotation);
+        return 0;
 }
 EXPORT_SYMBOL(mipi_dbi_spi_init);
 
diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig
index 4361bdcfd28a..fdae18aeab4f 100644
--- a/drivers/gpu/drm/vc4/Kconfig
+++ b/drivers/gpu/drm/vc4/Kconfig
@@ -19,3 +19,11 @@ config DRM_VC4
           This driver requires that "avoid_warnings=2" be present in
           the config.txt for the firmware, to keep it from smashing
           our display setup.
+
+config DRM_VC4_HDMI_CEC
+       bool "Broadcom VC4 HDMI CEC Support"
+       depends on DRM_VC4
+       select CEC_CORE
+       help
+          Choose this option if you have a Broadcom VC4 GPU
+          and want to use CEC.
diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c
index 487f96412d35..b24dd8685590 100644
--- a/drivers/gpu/drm/vc4/vc4_bo.c
+++ b/drivers/gpu/drm/vc4/vc4_bo.c
@@ -24,21 +24,35 @@
 #include "vc4_drv.h"
 #include "uapi/drm/vc4_drm.h"
 
+static const char * const bo_type_names[] = {
+        "kernel",
+        "V3D",
+        "V3D shader",
+        "dumb",
+        "binner",
+        "RCL",
+        "BCL",
+        "kernel BO cache",
+};
+
+static bool is_user_label(int label)
+{
+        return label >= VC4_BO_TYPE_COUNT;
+}
+
 static void vc4_bo_stats_dump(struct vc4_dev *vc4)
 {
-        DRM_INFO("num bos allocated: %d\n",
-                 vc4->bo_stats.num_allocated);
-        DRM_INFO("size bos allocated: %dkb\n",
-                 vc4->bo_stats.size_allocated / 1024);
-        DRM_INFO("num bos used: %d\n",
-                 vc4->bo_stats.num_allocated - vc4->bo_stats.num_cached);
-        DRM_INFO("size bos used: %dkb\n",
-                 (vc4->bo_stats.size_allocated -
-                  vc4->bo_stats.size_cached) / 1024);
-        DRM_INFO("num bos cached: %d\n",
-                 vc4->bo_stats.num_cached);
-        DRM_INFO("size bos cached: %dkb\n",
-                 vc4->bo_stats.size_cached / 1024);
+        int i;
+
+        for (i = 0; i < vc4->num_labels; i++) {
+                if (!vc4->bo_labels[i].num_allocated)
+                        continue;
+
+                DRM_INFO("%30s: %6dkb BOs (%d)\n",
+                         vc4->bo_labels[i].name,
+                         vc4->bo_labels[i].size_allocated / 1024,
+                         vc4->bo_labels[i].num_allocated);
+        }
 }
 
 #ifdef CONFIG_DEBUG_FS
@@ -47,64 +61,133 @@ int vc4_bo_stats_debugfs(struct seq_file *m, void *unused)
         struct drm_info_node *node = (struct drm_info_node *)m->private;
         struct drm_device *dev = node->minor->dev;
         struct vc4_dev *vc4 = to_vc4_dev(dev);
-        struct vc4_bo_stats stats;
+        int i;
 
-        /* Take a snapshot of the current stats with the lock held. */
         mutex_lock(&vc4->bo_lock);
-        stats = vc4->bo_stats;
+        for (i = 0; i < vc4->num_labels; i++) {
+                if (!vc4->bo_labels[i].num_allocated)
+                        continue;
+
+                seq_printf(m, "%30s: %6dkb BOs (%d)\n",
+                           vc4->bo_labels[i].name,
+                           vc4->bo_labels[i].size_allocated / 1024,
+                           vc4->bo_labels[i].num_allocated);
+        }
         mutex_unlock(&vc4->bo_lock);
 
-        seq_printf(m, "num bos allocated: %d\n",
-                   stats.num_allocated);
-        seq_printf(m, "size bos allocated: %dkb\n",
-                   stats.size_allocated / 1024);
-        seq_printf(m, "num bos used: %d\n",
-                   stats.num_allocated - stats.num_cached);
-        seq_printf(m, "size bos used: %dkb\n",
-                   (stats.size_allocated - stats.size_cached) / 1024);
-        seq_printf(m, "num bos cached: %d\n",
-                   stats.num_cached);
-        seq_printf(m, "size bos cached: %dkb\n",
-                   stats.size_cached / 1024);
-
         return 0;
 }
 #endif
 
+/* Takes ownership of *name and returns the appropriate slot for it in
+ * the bo_labels[] array, extending it as necessary.
+ *
+ * This is inefficient and could use a hash table instead of walking
+ * an array and strcmp()ing.  However, the assumption is that user
+ * labeling will be infrequent (scanout buffers and other long-lived
+ * objects, or debug driver builds), so we can live with it for now.
+ */
+static int vc4_get_user_label(struct vc4_dev *vc4, const char *name)
+{
+        int i;
+        int free_slot = -1;
+
+        for (i = 0; i < vc4->num_labels; i++) {
+                if (!vc4->bo_labels[i].name) {
+                        free_slot = i;
+                } else if (strcmp(vc4->bo_labels[i].name, name) == 0) {
+                        kfree(name);
+                        return i;
+                }
+        }
+
+        if (free_slot != -1) {
+                WARN_ON(vc4->bo_labels[free_slot].num_allocated != 0);
+                vc4->bo_labels[free_slot].name = name;
+                return free_slot;
+        } else {
+                u32 new_label_count = vc4->num_labels + 1;
+                struct vc4_label *new_labels =
+                        krealloc(vc4->bo_labels,
+                                 new_label_count * sizeof(*new_labels),
+                                 GFP_KERNEL);
+
+                if (!new_labels) {
+                        kfree(name);
+                        return -1;
+                }
+
+                free_slot = vc4->num_labels;
+                vc4->bo_labels = new_labels;
+                vc4->num_labels = new_label_count;
+
+                vc4->bo_labels[free_slot].name = name;
+                vc4->bo_labels[free_slot].num_allocated = 0;
+                vc4->bo_labels[free_slot].size_allocated = 0;
+
+                return free_slot;
+        }
+}
+
+static void vc4_bo_set_label(struct drm_gem_object *gem_obj, int label)
+{
+        struct vc4_bo *bo = to_vc4_bo(gem_obj);
+        struct vc4_dev *vc4 = to_vc4_dev(gem_obj->dev);
+
+        lockdep_assert_held(&vc4->bo_lock);
+
+        if (label != -1) {
+                vc4->bo_labels[label].num_allocated++;
+                vc4->bo_labels[label].size_allocated += gem_obj->size;
+        }
+
+        vc4->bo_labels[bo->label].num_allocated--;
+        vc4->bo_labels[bo->label].size_allocated -= gem_obj->size;
+
+        if (vc4->bo_labels[bo->label].num_allocated == 0 &&
+            is_user_label(bo->label)) {
+                /* Free user BO label slots on last unreference.
+                 * Slots are just where we track the stats for a given
+                 * name, and once a name is unused we can reuse that
+                 * slot.
+                 */
+                kfree(vc4->bo_labels[bo->label].name);
+                vc4->bo_labels[bo->label].name = NULL;
+        }
+
+        bo->label = label;
+}
+
 static uint32_t bo_page_index(size_t size)
 {
         return (size / PAGE_SIZE) - 1;
 }
 
-/* Must be called with bo_lock held. */
 static void vc4_bo_destroy(struct vc4_bo *bo)
 {
         struct drm_gem_object *obj = &bo->base.base;
         struct vc4_dev *vc4 = to_vc4_dev(obj->dev);
 
+        lockdep_assert_held(&vc4->bo_lock);
+
+        vc4_bo_set_label(obj, -1);
+
         if (bo->validated_shader) {
                 kfree(bo->validated_shader->texture_samples);
                 kfree(bo->validated_shader);
                 bo->validated_shader = NULL;
         }
 
-        vc4->bo_stats.num_allocated--;
-        vc4->bo_stats.size_allocated -= obj->size;
-
         reservation_object_fini(&bo->_resv);
 
         drm_gem_cma_free_object(obj);
 }
 
-/* Must be called with bo_lock held. */
 static void vc4_bo_remove_from_cache(struct vc4_bo *bo)
 {
-        struct drm_gem_object *obj = &bo->base.base;
-        struct vc4_dev *vc4 = to_vc4_dev(obj->dev);
-
-        vc4->bo_stats.num_cached--;
-        vc4->bo_stats.size_cached -= obj->size;
+        struct vc4_dev *vc4 = to_vc4_dev(bo->base.base.dev);
 
+        lockdep_assert_held(&vc4->bo_lock);
         list_del(&bo->unref_head);
         list_del(&bo->size_head);
 }
@@ -165,7 +248,8 @@ static void vc4_bo_cache_purge(struct drm_device *dev)
 }
 
 static struct vc4_bo *vc4_bo_get_from_cache(struct drm_device *dev,
-                                            uint32_t size)
+                                            uint32_t size,
+                                            enum vc4_kernel_bo_type type)
 {
         struct vc4_dev *vc4 = to_vc4_dev(dev);
         uint32_t page_index = bo_page_index(size);
@@ -186,6 +270,8 @@ static struct vc4_bo *vc4_bo_get_from_cache(struct drm_device *dev,
         kref_init(&bo->base.base.refcount);
 
 out:
+        if (bo)
+                vc4_bo_set_label(&bo->base.base, type);
         mutex_unlock(&vc4->bo_lock);
         return bo;
 }
@@ -208,8 +294,9 @@ struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size)
                 return ERR_PTR(-ENOMEM);
 
         mutex_lock(&vc4->bo_lock);
-        vc4->bo_stats.num_allocated++;
-        vc4->bo_stats.size_allocated += size;
+        bo->label = VC4_BO_TYPE_KERNEL;
+        vc4->bo_labels[VC4_BO_TYPE_KERNEL].num_allocated++;
+        vc4->bo_labels[VC4_BO_TYPE_KERNEL].size_allocated += size;
         mutex_unlock(&vc4->bo_lock);
         bo->resv = &bo->_resv;
         reservation_object_init(bo->resv);
@@ -218,7 +305,7 @@ struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size)
 }
 
 struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size,
-                             bool allow_unzeroed)
+                             bool allow_unzeroed, enum vc4_kernel_bo_type type)
 {
         size_t size = roundup(unaligned_size, PAGE_SIZE);
         struct vc4_dev *vc4 = to_vc4_dev(dev);
@@ -229,7 +316,7 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size,
                 return ERR_PTR(-EINVAL);
 
         /* First, try to get a vc4_bo from the kernel BO cache. */
-        bo = vc4_bo_get_from_cache(dev, size);
+        bo = vc4_bo_get_from_cache(dev, size, type);
         if (bo) {
                 if (!allow_unzeroed)
                         memset(bo->base.vaddr, 0, bo->base.base.size);
@@ -251,7 +338,13 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size,
                         return ERR_PTR(-ENOMEM);
                 }
         }
-        return to_vc4_bo(&cma_obj->base);
+        bo = to_vc4_bo(&cma_obj->base);
+
+        mutex_lock(&vc4->bo_lock);
+        vc4_bo_set_label(&cma_obj->base, type);
+        mutex_unlock(&vc4->bo_lock);
+
+        return bo;
 }
 
 int vc4_dumb_create(struct drm_file *file_priv,
@@ -268,7 +361,7 @@ int vc4_dumb_create(struct drm_file *file_priv,
         if (args->size < args->pitch * args->height)
                 args->size = args->pitch * args->height;
 
-        bo = vc4_bo_create(dev, args->size, false);
+        bo = vc4_bo_create(dev, args->size, false, VC4_BO_TYPE_DUMB);
         if (IS_ERR(bo))
                 return PTR_ERR(bo);
 
@@ -278,12 +371,13 @@ int vc4_dumb_create(struct drm_file *file_priv,
         return ret;
 }
 
-/* Must be called with bo_lock held. */
 static void vc4_bo_cache_free_old(struct drm_device *dev)
 {
         struct vc4_dev *vc4 = to_vc4_dev(dev);
         unsigned long expire_time = jiffies - msecs_to_jiffies(1000);
 
+        lockdep_assert_held(&vc4->bo_lock);
+
         while (!list_empty(&vc4->bo_cache.time_list)) {
                 struct vc4_bo *bo = list_last_entry(&vc4->bo_cache.time_list,
                                                     struct vc4_bo, unref_head);
@@ -348,8 +442,7 @@ void vc4_free_object(struct drm_gem_object *gem_bo)
         list_add(&bo->size_head, cache_list);
         list_add(&bo->unref_head, &vc4->bo_cache.time_list);
 
-        vc4->bo_stats.num_cached++;
-        vc4->bo_stats.size_cached += gem_bo->size;
+        vc4_bo_set_label(&bo->base.base, VC4_BO_TYPE_KERNEL_CACHE);
 
         vc4_bo_cache_free_old(dev);
 
@@ -483,7 +576,7 @@ int vc4_create_bo_ioctl(struct drm_device *dev, void *data,
          * We can't allocate from the BO cache, because the BOs don't
          * get zeroed, and that might leak data between users.
          */
-        bo = vc4_bo_create(dev, args->size, false);
+        bo = vc4_bo_create(dev, args->size, false, VC4_BO_TYPE_V3D);
         if (IS_ERR(bo))
                 return PTR_ERR(bo);
 
@@ -536,7 +629,7 @@ vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data,
                 return -EINVAL;
         }
 
-        bo = vc4_bo_create(dev, args->size, true);
+        bo = vc4_bo_create(dev, args->size, true, VC4_BO_TYPE_V3D_SHADER);
         if (IS_ERR(bo))
                 return PTR_ERR(bo);
 
@@ -651,9 +744,24 @@ int vc4_get_tiling_ioctl(struct drm_device *dev, void *data,
         return 0;
 }
 
-void vc4_bo_cache_init(struct drm_device *dev)
+int vc4_bo_cache_init(struct drm_device *dev)
 {
         struct vc4_dev *vc4 = to_vc4_dev(dev);
+        int i;
+
+        /* Create the initial set of BO labels that the kernel will
+         * use.  This lets us avoid a bunch of string reallocation in
+         * the kernel's draw and BO allocation paths.
+         */
+        vc4->bo_labels = kcalloc(VC4_BO_TYPE_COUNT, sizeof(*vc4->bo_labels),
+                                 GFP_KERNEL);
+        if (!vc4->bo_labels)
+                return -ENOMEM;
+        vc4->num_labels = VC4_BO_TYPE_COUNT;
+
+        BUILD_BUG_ON(ARRAY_SIZE(bo_type_names) != VC4_BO_TYPE_COUNT);
+        for (i = 0; i < VC4_BO_TYPE_COUNT; i++)
+                vc4->bo_labels[i].name = bo_type_names[i];
 
         mutex_init(&vc4->bo_lock);
 
@@ -663,19 +771,66 @@ void vc4_bo_cache_init(struct drm_device *dev)
         setup_timer(&vc4->bo_cache.time_timer,
                     vc4_bo_cache_time_timer,
                     (unsigned long)dev);
+
+        return 0;
 }
 
 void vc4_bo_cache_destroy(struct drm_device *dev)
 {
         struct vc4_dev *vc4 = to_vc4_dev(dev);
+        int i;
 
         del_timer(&vc4->bo_cache.time_timer);
         cancel_work_sync(&vc4->bo_cache.time_work);
 
         vc4_bo_cache_purge(dev);
 
-        if (vc4->bo_stats.num_allocated) {
-                DRM_ERROR("Destroying BO cache while BOs still allocated:\n");
-                vc4_bo_stats_dump(vc4);
+        for (i = 0; i < vc4->num_labels; i++) {
+                if (vc4->bo_labels[i].num_allocated) {
+                        DRM_ERROR("Destroying BO cache with %d %s "
+                                  "BOs still allocated\n",
+                                  vc4->bo_labels[i].num_allocated,
+                                  vc4->bo_labels[i].name);
+                }
+
+                if (is_user_label(i))
+                        kfree(vc4->bo_labels[i].name);
+        }
+        kfree(vc4->bo_labels);
+}
+
+int vc4_label_bo_ioctl(struct drm_device *dev, void *data,
+                       struct drm_file *file_priv)
+{
+        struct vc4_dev *vc4 = to_vc4_dev(dev);
+        struct drm_vc4_label_bo *args = data;
+        char *name;
+        struct drm_gem_object *gem_obj;
+        int ret = 0, label;
+
+        if (!args->len)
+                return -EINVAL;
+
+        name = strndup_user(u64_to_user_ptr(args->name), args->len + 1);
+        if (IS_ERR(name))
+                return PTR_ERR(name);
+
+        gem_obj = drm_gem_object_lookup(file_priv, args->handle);
+        if (!gem_obj) {
+                DRM_ERROR("Failed to look up GEM BO %d\n", args->handle);
+                kfree(name);
+                return -ENOENT;
         }
+
+        mutex_lock(&vc4->bo_lock);
+        label = vc4_get_user_label(vc4, name);
+        if (label != -1)
+                vc4_bo_set_label(gem_obj, label);
+        else
+                ret = -ENOMEM;
+        mutex_unlock(&vc4->bo_lock);
+
+        drm_gem_object_unreference_unlocked(gem_obj);
+
+        return ret;
 }
diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c
index c6b487c3d2b7..e8f0e1790d5e 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
@@ -140,6 +140,7 @@ static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
         DRM_IOCTL_DEF_DRV(VC4_GET_PARAM, vc4_get_param_ioctl, DRM_RENDER_ALLOW),
         DRM_IOCTL_DEF_DRV(VC4_SET_TILING, vc4_set_tiling_ioctl, DRM_RENDER_ALLOW),
         DRM_IOCTL_DEF_DRV(VC4_GET_TILING, vc4_get_tiling_ioctl, DRM_RENDER_ALLOW),
+        DRM_IOCTL_DEF_DRV(VC4_LABEL_BO, vc4_label_bo_ioctl, DRM_RENDER_ALLOW),
 };
 
 static struct drm_driver vc4_drm_driver = {
@@ -178,8 +179,6 @@ static struct drm_driver vc4_drm_driver = {
         .gem_prime_mmap = vc4_prime_mmap,
 
         .dumb_create = vc4_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
 
         .ioctls = vc4_drm_ioctls,
         .num_ioctls = ARRAY_SIZE(vc4_drm_ioctls),
@@ -257,7 +256,9 @@ static int vc4_drm_bind(struct device *dev)
         vc4->dev = drm;
         drm->dev_private = vc4;
 
-        vc4_bo_cache_init(drm);
+        ret = vc4_bo_cache_init(drm);
+        if (ret)
+                goto dev_unref;
 
         drm_mode_config_init(drm);
 
@@ -281,8 +282,9 @@ unbind_all:
         component_unbind_all(dev, drm);
 gem_destroy:
         vc4_gem_destroy(drm);
-        drm_dev_unref(drm);
         vc4_bo_cache_destroy(drm);
+dev_unref:
+        drm_dev_unref(drm);
         return ret;
 }
 
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 1047953216a8..87f2d8e5c134 100644
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -11,6 +11,24 @@
 #include <drm/drm_encoder.h>
 #include <drm/drm_gem_cma_helper.h>
 
+/* Don't forget to update vc4_bo.c: bo_type_names[] when adding to
+ * this.
+ */
+enum vc4_kernel_bo_type {
+        /* Any kernel allocation (gem_create_object hook) before it
+         * gets another type set.
+         */
+        VC4_BO_TYPE_KERNEL,
+        VC4_BO_TYPE_V3D,
+        VC4_BO_TYPE_V3D_SHADER,
+        VC4_BO_TYPE_DUMB,
+        VC4_BO_TYPE_BIN,
+        VC4_BO_TYPE_RCL,
+        VC4_BO_TYPE_BCL,
+        VC4_BO_TYPE_KERNEL_CACHE,
+        VC4_BO_TYPE_COUNT
+};
+
 struct vc4_dev {
         struct drm_device *dev;
 
@@ -46,14 +64,14 @@ struct vc4_dev {
                 struct timer_list time_timer;
         } bo_cache;
 
-        struct vc4_bo_stats {
+        u32 num_labels;
+        struct vc4_label {
+                const char *name;
                 u32 num_allocated;
                 u32 size_allocated;
-                u32 num_cached;
-                u32 size_cached;
-        } bo_stats;
+        } *bo_labels;
 
-        /* Protects bo_cache and the BO stats. */
+        /* Protects bo_cache and bo_labels. */
         struct mutex bo_lock;
 
         uint64_t dma_fence_context;
@@ -169,6 +187,11 @@ struct vc4_bo {
         /* normally (resv == &_resv) except for imported bo's */
         struct reservation_object *resv;
         struct reservation_object _resv;
+
+        /* One of enum vc4_kernel_bo_type, or VC4_BO_TYPE_COUNT + i
+         * for user-allocated labels.
+         */
+        int label;
 };
 
 static inline struct vc4_bo *
@@ -460,7 +483,7 @@ struct vc4_validated_shader_info {
 struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size);
 void vc4_free_object(struct drm_gem_object *gem_obj);
 struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t size,
-                             bool from_cache);
+                             bool from_cache, enum vc4_kernel_bo_type type);
 int vc4_dumb_create(struct drm_file *file_priv,
                     struct drm_device *dev,
                     struct drm_mode_create_dumb *args);
@@ -478,6 +501,8 @@ int vc4_get_tiling_ioctl(struct drm_device *dev, void *data,
                          struct drm_file *file_priv);
 int vc4_get_hang_state_ioctl(struct drm_device *dev, void *data,
                              struct drm_file *file_priv);
+int vc4_label_bo_ioctl(struct drm_device *dev, void *data,
+                       struct drm_file *file_priv);
 int vc4_mmap(struct file *filp, struct vm_area_struct *vma);
 struct reservation_object *vc4_prime_res_obj(struct drm_gem_object *obj);
 int vc4_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
@@ -485,7 +510,7 @@ struct drm_gem_object *vc4_prime_import_sg_table(struct drm_device *dev,
                                                  struct dma_buf_attachment *attach,
                                                  struct sg_table *sgt);
 void *vc4_prime_vmap(struct drm_gem_object *obj);
-void vc4_bo_cache_init(struct drm_device *dev);
+int vc4_bo_cache_init(struct drm_device *dev);
 void vc4_bo_cache_destroy(struct drm_device *dev);
 int vc4_bo_stats_debugfs(struct seq_file *m, void *arg);
 
diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
index d5b821ad06af..209fccd0d3b4 100644
--- a/drivers/gpu/drm/vc4/vc4_gem.c
+++ b/drivers/gpu/drm/vc4/vc4_gem.c
@@ -119,7 +119,7 @@ vc4_get_hang_state_ioctl(struct drm_device *dev, void *data,
                 bo_state[i].size = vc4_bo->base.base.size;
         }
 
-        if (copy_to_user((void __user *)(uintptr_t)get_state->bo,
+        if (copy_to_user(u64_to_user_ptr(get_state->bo),
                          bo_state,
                          state->bo_count * sizeof(*bo_state)))
                 ret = -EFAULT;
@@ -678,8 +678,7 @@ vc4_cl_lookup_bos(struct drm_device *dev,
                 goto fail;
         }
 
-        if (copy_from_user(handles,
-                           (void __user *)(uintptr_t)args->bo_handles,
+        if (copy_from_user(handles, u64_to_user_ptr(args->bo_handles),
                            exec->bo_count * sizeof(uint32_t))) {
                 ret = -EFAULT;
                 DRM_ERROR("Failed to copy in GEM handles\n");
@@ -755,27 +754,27 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec)
         exec->shader_state_size = args->shader_rec_count;
 
         if (copy_from_user(bin,
-                           (void __user *)(uintptr_t)args->bin_cl,
+                           u64_to_user_ptr(args->bin_cl),
                            args->bin_cl_size)) {
                 ret = -EFAULT;
                 goto fail;
         }
 
         if (copy_from_user(exec->shader_rec_u,
-                           (void __user *)(uintptr_t)args->shader_rec,
+                           u64_to_user_ptr(args->shader_rec),
                            args->shader_rec_size)) {
                 ret = -EFAULT;
                 goto fail;
         }
 
         if (copy_from_user(exec->uniforms_u,
-                           (void __user *)(uintptr_t)args->uniforms,
+                           u64_to_user_ptr(args->uniforms),
                            args->uniforms_size)) {
                 ret = -EFAULT;
                 goto fail;
         }
 
-        bo = vc4_bo_create(dev, exec_size, true);
+        bo = vc4_bo_create(dev, exec_size, true, VC4_BO_TYPE_BCL);
         if (IS_ERR(bo)) {
                 DRM_ERROR("Couldn't allocate BO for binning\n");
                 ret = PTR_ERR(bo);
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 406d6d83b6c6..ff09b8e2f9ee 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -57,9 +57,14 @@
 #include <sound/pcm_drm_eld.h>
 #include <sound/pcm_params.h>
 #include <sound/soc.h>
+#include "media/cec.h"
 #include "vc4_drv.h"
 #include "vc4_regs.h"
 
+#define HSM_CLOCK_FREQ 163682864
+#define CEC_CLOCK_FREQ 40000
+#define CEC_CLOCK_DIV  (HSM_CLOCK_FREQ / CEC_CLOCK_FREQ)
+
 /* HDMI audio information */
 struct vc4_hdmi_audio {
         struct snd_soc_card card;
@@ -85,6 +90,11 @@ struct vc4_hdmi {
         int hpd_gpio;
         bool hpd_active_low;
 
+        struct cec_adapter *cec_adap;
+        struct cec_msg cec_rx_msg;
+        bool cec_tx_ok;
+        bool cec_irq_was_rx;
+
         struct clk *pixel_clock;
         struct clk *hsm_clock;
 };
@@ -149,6 +159,23 @@ static const struct {
         HDMI_REG(VC4_HDMI_VERTB1),
         HDMI_REG(VC4_HDMI_TX_PHY_RESET_CTL),
         HDMI_REG(VC4_HDMI_TX_PHY_CTL0),
+
+        HDMI_REG(VC4_HDMI_CEC_CNTRL_1),
+        HDMI_REG(VC4_HDMI_CEC_CNTRL_2),
+        HDMI_REG(VC4_HDMI_CEC_CNTRL_3),
+        HDMI_REG(VC4_HDMI_CEC_CNTRL_4),
+        HDMI_REG(VC4_HDMI_CEC_CNTRL_5),
+        HDMI_REG(VC4_HDMI_CPU_STATUS),
+        HDMI_REG(VC4_HDMI_CPU_MASK_STATUS),
+
+        HDMI_REG(VC4_HDMI_CEC_RX_DATA_1),
+        HDMI_REG(VC4_HDMI_CEC_RX_DATA_2),
+        HDMI_REG(VC4_HDMI_CEC_RX_DATA_3),
+        HDMI_REG(VC4_HDMI_CEC_RX_DATA_4),
+        HDMI_REG(VC4_HDMI_CEC_TX_DATA_1),
+        HDMI_REG(VC4_HDMI_CEC_TX_DATA_2),
+        HDMI_REG(VC4_HDMI_CEC_TX_DATA_3),
+        HDMI_REG(VC4_HDMI_CEC_TX_DATA_4),
 };
 
 static const struct {
@@ -216,8 +243,8 @@ vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
                 if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
                     vc4->hdmi->hpd_active_low)
                         return connector_status_connected;
-                else
-                        return connector_status_disconnected;
+                cec_phys_addr_invalidate(vc4->hdmi->cec_adap);
+                return connector_status_disconnected;
         }
 
         if (drm_probe_ddc(vc4->hdmi->ddc))
@@ -225,8 +252,8 @@ vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
 
         if (HDMI_READ(VC4_HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED)
                 return connector_status_connected;
-        else
-                return connector_status_disconnected;
+        cec_phys_addr_invalidate(vc4->hdmi->cec_adap);
+        return connector_status_disconnected;
 }
 
 static void vc4_hdmi_connector_destroy(struct drm_connector *connector)
@@ -247,6 +274,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector)
         struct edid *edid;
 
         edid = drm_get_edid(connector, vc4->hdmi->ddc);
+        cec_s_phys_addr_from_edid(vc4->hdmi->cec_adap, edid);
         if (!edid)
                 return -ENODEV;
 
@@ -265,7 +293,6 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs vc4_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = vc4_hdmi_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = vc4_hdmi_connector_destroy,
@@ -463,11 +490,6 @@ static void vc4_hdmi_encoder_disable(struct drm_encoder *encoder)
         HD_WRITE(VC4_HD_VID_CTL,
                  HD_READ(VC4_HD_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);
 
-        HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST);
-        udelay(1);
-        HD_WRITE(VC4_HD_M_CTL, 0);
-
-        clk_disable_unprepare(hdmi->hsm_clock);
         clk_disable_unprepare(hdmi->pixel_clock);
 
         ret = pm_runtime_put(&hdmi->pdev->dev);
@@ -509,16 +531,6 @@ static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
                 return;
         }
 
-        /* This is the rate that is set by the firmware.  The number
-         * needs to be a bit higher than the pixel clock rate
-         * (generally 148.5Mhz).
-         */
-        ret = clk_set_rate(hdmi->hsm_clock, 163682864);
-        if (ret) {
-                DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
-                return;
-        }
-
         ret = clk_set_rate(hdmi->pixel_clock,
                            mode->clock * 1000 *
                            ((mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1));
@@ -533,20 +545,6 @@ static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
                 return;
         }
 
-        ret = clk_prepare_enable(hdmi->hsm_clock);
-        if (ret) {
-                DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n",
-                          ret);
-                clk_disable_unprepare(hdmi->pixel_clock);
-                return;
-        }
-
-        HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST);
-        udelay(1);
-        HD_WRITE(VC4_HD_M_CTL, 0);
-
-        HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE);
-
         HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL,
                    VC4_HDMI_SW_RESET_HDMI |
                    VC4_HDMI_SW_RESET_FORMAT_DETECT);
@@ -1150,6 +1148,159 @@ static void vc4_hdmi_audio_cleanup(struct vc4_hdmi *hdmi)
                 snd_soc_unregister_codec(dev);
 }
 
+#ifdef CONFIG_DRM_VC4_HDMI_CEC
+static irqreturn_t vc4_cec_irq_handler_thread(int irq, void *priv)
+{
+        struct vc4_dev *vc4 = priv;
+        struct vc4_hdmi *hdmi = vc4->hdmi;
+
+        if (hdmi->cec_irq_was_rx) {
+                if (hdmi->cec_rx_msg.len)
+                        cec_received_msg(hdmi->cec_adap, &hdmi->cec_rx_msg);
+        } else if (hdmi->cec_tx_ok) {
+                cec_transmit_done(hdmi->cec_adap, CEC_TX_STATUS_OK,
+                                  0, 0, 0, 0);
+        } else {
+                /*
+                 * This CEC implementation makes 1 retry, so if we
+                 * get a NACK, then that means it made 2 attempts.
+                 */
+                cec_transmit_done(hdmi->cec_adap, CEC_TX_STATUS_NACK,
+                                  0, 2, 0, 0);
+        }
+        return IRQ_HANDLED;
+}
+
+static void vc4_cec_read_msg(struct vc4_dev *vc4, u32 cntrl1)
+{
+        struct cec_msg *msg = &vc4->hdmi->cec_rx_msg;
+        unsigned int i;
+
+        msg->len = 1 + ((cntrl1 & VC4_HDMI_CEC_REC_WRD_CNT_MASK) >>
+                                        VC4_HDMI_CEC_REC_WRD_CNT_SHIFT);
+        for (i = 0; i < msg->len; i += 4) {
+                u32 val = HDMI_READ(VC4_HDMI_CEC_RX_DATA_1 + i);
+
+                msg->msg[i] = val & 0xff;
+                msg->msg[i + 1] = (val >> 8) & 0xff;
+                msg->msg[i + 2] = (val >> 16) & 0xff;
+                msg->msg[i + 3] = (val >> 24) & 0xff;
+        }
+}
+
+static irqreturn_t vc4_cec_irq_handler(int irq, void *priv)
+{
+        struct vc4_dev *vc4 = priv;
+        struct vc4_hdmi *hdmi = vc4->hdmi;
+        u32 stat = HDMI_READ(VC4_HDMI_CPU_STATUS);
+        u32 cntrl1, cntrl5;
+
+        if (!(stat & VC4_HDMI_CPU_CEC))
+                return IRQ_NONE;
+        hdmi->cec_rx_msg.len = 0;
+        cntrl1 = HDMI_READ(VC4_HDMI_CEC_CNTRL_1);
+        cntrl5 = HDMI_READ(VC4_HDMI_CEC_CNTRL_5);
+        hdmi->cec_irq_was_rx = cntrl5 & VC4_HDMI_CEC_RX_CEC_INT;
+        if (hdmi->cec_irq_was_rx) {
+                vc4_cec_read_msg(vc4, cntrl1);
+                cntrl1 |= VC4_HDMI_CEC_CLEAR_RECEIVE_OFF;
+                HDMI_WRITE(VC4_HDMI_CEC_CNTRL_1, cntrl1);
+                cntrl1 &= ~VC4_HDMI_CEC_CLEAR_RECEIVE_OFF;
+        } else {
+                hdmi->cec_tx_ok = cntrl1 & VC4_HDMI_CEC_TX_STATUS_GOOD;
+                cntrl1 &= ~VC4_HDMI_CEC_START_XMIT_BEGIN;
+        }
+        HDMI_WRITE(VC4_HDMI_CEC_CNTRL_1, cntrl1);
+        HDMI_WRITE(VC4_HDMI_CPU_CLEAR, VC4_HDMI_CPU_CEC);
+
+        return IRQ_WAKE_THREAD;
+}
+
+static int vc4_hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
+{
+        struct vc4_dev *vc4 = cec_get_drvdata(adap);
+        /* clock period in microseconds */
+        const u32 usecs = 1000000 / CEC_CLOCK_FREQ;
+        u32 val = HDMI_READ(VC4_HDMI_CEC_CNTRL_5);
+
+        val &= ~(VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET |
+                 VC4_HDMI_CEC_CNT_TO_4700_US_MASK |
+                 VC4_HDMI_CEC_CNT_TO_4500_US_MASK);
+        val |= ((4700 / usecs) << VC4_HDMI_CEC_CNT_TO_4700_US_SHIFT) |
+               ((4500 / usecs) << VC4_HDMI_CEC_CNT_TO_4500_US_SHIFT);
+
+        if (enable) {
+                HDMI_WRITE(VC4_HDMI_CEC_CNTRL_5, val |
+                           VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
+                HDMI_WRITE(VC4_HDMI_CEC_CNTRL_5, val);
+                HDMI_WRITE(VC4_HDMI_CEC_CNTRL_2,
+                         ((1500 / usecs) << VC4_HDMI_CEC_CNT_TO_1500_US_SHIFT) |
+                         ((1300 / usecs) << VC4_HDMI_CEC_CNT_TO_1300_US_SHIFT) |
+                         ((800 / usecs) << VC4_HDMI_CEC_CNT_TO_800_US_SHIFT) |
+                         ((600 / usecs) << VC4_HDMI_CEC_CNT_TO_600_US_SHIFT) |
+                         ((400 / usecs) << VC4_HDMI_CEC_CNT_TO_400_US_SHIFT));
+                HDMI_WRITE(VC4_HDMI_CEC_CNTRL_3,
+                         ((2750 / usecs) << VC4_HDMI_CEC_CNT_TO_2750_US_SHIFT) |
+                         ((2400 / usecs) << VC4_HDMI_CEC_CNT_TO_2400_US_SHIFT) |
+                         ((2050 / usecs) << VC4_HDMI_CEC_CNT_TO_2050_US_SHIFT) |
+                         ((1700 / usecs) << VC4_HDMI_CEC_CNT_TO_1700_US_SHIFT));
+                HDMI_WRITE(VC4_HDMI_CEC_CNTRL_4,
+                         ((4300 / usecs) << VC4_HDMI_CEC_CNT_TO_4300_US_SHIFT) |
+                         ((3900 / usecs) << VC4_HDMI_CEC_CNT_TO_3900_US_SHIFT) |
+                         ((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
+                         ((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
+
+                HDMI_WRITE(VC4_HDMI_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
+        } else {
+                HDMI_WRITE(VC4_HDMI_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
+                HDMI_WRITE(VC4_HDMI_CEC_CNTRL_5, val |
+                           VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
+        }
+        return 0;
+}
+
+static int vc4_hdmi_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
+{
+        struct vc4_dev *vc4 = cec_get_drvdata(adap);
+
+        HDMI_WRITE(VC4_HDMI_CEC_CNTRL_1,
+                   (HDMI_READ(VC4_HDMI_CEC_CNTRL_1) & ~VC4_HDMI_CEC_ADDR_MASK) |
+                   (log_addr & 0xf) << VC4_HDMI_CEC_ADDR_SHIFT);
+        return 0;
+}
+
+static int vc4_hdmi_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
+                                      u32 signal_free_time, struct cec_msg *msg)
+{
+        struct vc4_dev *vc4 = cec_get_drvdata(adap);
+        u32 val;
+        unsigned int i;
+
+        for (i = 0; i < msg->len; i += 4)
+                HDMI_WRITE(VC4_HDMI_CEC_TX_DATA_1 + i,
+                           (msg->msg[i]) |
+                           (msg->msg[i + 1] << 8) |
+                           (msg->msg[i + 2] << 16) |
+                           (msg->msg[i + 3] << 24));
+
+        val = HDMI_READ(VC4_HDMI_CEC_CNTRL_1);
+        val &= ~VC4_HDMI_CEC_START_XMIT_BEGIN;
+        HDMI_WRITE(VC4_HDMI_CEC_CNTRL_1, val);
+        val &= ~VC4_HDMI_CEC_MESSAGE_LENGTH_MASK;
+        val |= (msg->len - 1) << VC4_HDMI_CEC_MESSAGE_LENGTH_SHIFT;
+        val |= VC4_HDMI_CEC_START_XMIT_BEGIN;
+
+        HDMI_WRITE(VC4_HDMI_CEC_CNTRL_1, val);
+        return 0;
+}
+
+static const struct cec_adap_ops vc4_hdmi_cec_adap_ops = {
+        .adap_enable = vc4_hdmi_cec_adap_enable,
+        .adap_log_addr = vc4_hdmi_cec_adap_log_addr,
+        .adap_transmit = vc4_hdmi_cec_adap_transmit,
+};
+#endif
+
 static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
 {
         struct platform_device *pdev = to_platform_device(dev);
@@ -1205,6 +1356,23 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
                 return -EPROBE_DEFER;
         }
 
+        /* This is the rate that is set by the firmware.  The number
+         * needs to be a bit higher than the pixel clock rate
+         * (generally 148.5Mhz).
+         */
+        ret = clk_set_rate(hdmi->hsm_clock, HSM_CLOCK_FREQ);
+        if (ret) {
+                DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
+                goto err_put_i2c;
+        }
+
+        ret = clk_prepare_enable(hdmi->hsm_clock);
+        if (ret) {
+                DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n",
+                          ret);
+                goto err_put_i2c;
+        }
+
         /* Only use the GPIO HPD pin if present in the DT, otherwise
          * we'll use the HDMI core's register.
          */
@@ -1216,7 +1384,7 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
                                                          &hpd_gpio_flags);
                 if (hdmi->hpd_gpio < 0) {
                         ret = hdmi->hpd_gpio;
-                        goto err_put_i2c;
+                        goto err_unprepare_hsm;
                 }
 
                 hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW;
@@ -1224,6 +1392,14 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
 
         vc4->hdmi = hdmi;
 
+        /* HDMI core must be enabled. */
+        if (!(HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE)) {
+                HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST);
+                udelay(1);
+                HD_WRITE(VC4_HD_M_CTL, 0);
+
+                HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE);
+        }
         pm_runtime_enable(dev);
 
         drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs,
@@ -1235,6 +1411,37 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
                 ret = PTR_ERR(hdmi->connector);
                 goto err_destroy_encoder;
         }
+#ifdef CONFIG_DRM_VC4_HDMI_CEC
+        hdmi->cec_adap = cec_allocate_adapter(&vc4_hdmi_cec_adap_ops,
+                                              vc4, "vc4",
+                                              CEC_CAP_TRANSMIT |
+                                              CEC_CAP_LOG_ADDRS |
+                                              CEC_CAP_PASSTHROUGH |
+                                              CEC_CAP_RC, 1);
+        ret = PTR_ERR_OR_ZERO(hdmi->cec_adap);
+        if (ret < 0)
+                goto err_destroy_conn;
+        HDMI_WRITE(VC4_HDMI_CPU_MASK_SET, 0xffffffff);
+        value = HDMI_READ(VC4_HDMI_CEC_CNTRL_1);
+        value &= ~VC4_HDMI_CEC_DIV_CLK_CNT_MASK;
+        /*
+         * Set the logical address to Unregistered and set the clock
+         * divider: the hsm_clock rate and this divider setting will
+         * give a 40 kHz CEC clock.
+         */
+        value |= VC4_HDMI_CEC_ADDR_MASK |
+                 (4091 << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT);
+        HDMI_WRITE(VC4_HDMI_CEC_CNTRL_1, value);
+        ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0),
+                                        vc4_cec_irq_handler,
+                                        vc4_cec_irq_handler_thread, 0,
+                                        "vc4 hdmi cec", vc4);
+        if (ret)
+                goto err_delete_cec_adap;
+        ret = cec_register_adapter(hdmi->cec_adap, dev);
+        if (ret < 0)
+                goto err_delete_cec_adap;
+#endif
 
         ret = vc4_hdmi_audio_init(hdmi);
         if (ret)
@@ -1242,8 +1449,16 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
 
         return 0;
 
+#ifdef CONFIG_DRM_VC4_HDMI_CEC
+err_delete_cec_adap:
+        cec_delete_adapter(hdmi->cec_adap);
+err_destroy_conn:
+        vc4_hdmi_connector_destroy(hdmi->connector);
+#endif
 err_destroy_encoder:
         vc4_hdmi_encoder_destroy(hdmi->encoder);
+err_unprepare_hsm:
+        clk_disable_unprepare(hdmi->hsm_clock);
         pm_runtime_disable(dev);
 err_put_i2c:
         put_device(&hdmi->ddc->dev);
@@ -1259,10 +1474,11 @@ static void vc4_hdmi_unbind(struct device *dev, struct device *master,
         struct vc4_hdmi *hdmi = vc4->hdmi;
 
         vc4_hdmi_audio_cleanup(hdmi);
-
+        cec_unregister_adapter(hdmi->cec_adap);
         vc4_hdmi_connector_destroy(hdmi->connector);
         vc4_hdmi_encoder_destroy(hdmi->encoder);
 
+        clk_disable_unprepare(hdmi->hsm_clock);
         pm_runtime_disable(dev);
 
         put_device(&hdmi->ddc->dev);
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 8853e9a4f005..2968b3ebb895 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -902,7 +902,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
         ret = drm_universal_plane_init(dev, plane, 0,
                                        &vc4_plane_funcs,
                                        formats, num_formats,
-                                       type, NULL);
+                                       NULL, type, NULL);
 
         drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
 
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index d382c34c1b9e..55677bd50f66 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -561,16 +561,129 @@
 # define VC4_HDMI_VERTB_VBP_MASK                VC4_MASK(8, 0)
 # define VC4_HDMI_VERTB_VBP_SHIFT               0
 
+#define VC4_HDMI_CEC_CNTRL_1                    0x0e8
+/* Set when the transmission has ended. */
+# define VC4_HDMI_CEC_TX_EOM                    BIT(31)
+/* If set, transmission was acked on the 1st or 2nd attempt (only one
+ * retry is attempted).  If in continuous mode, this means TX needs to
+ * be filled if !TX_EOM.
+ */
+# define VC4_HDMI_CEC_TX_STATUS_GOOD            BIT(30)
+# define VC4_HDMI_CEC_RX_EOM                    BIT(29)
+# define VC4_HDMI_CEC_RX_STATUS_GOOD            BIT(28)
+/* Number of bytes received for the message. */
+# define VC4_HDMI_CEC_REC_WRD_CNT_MASK          VC4_MASK(27, 24)
+# define VC4_HDMI_CEC_REC_WRD_CNT_SHIFT         24
+/* Sets continuous receive mode.  Generates interrupt after each 8
+ * bytes to signal that RX_DATA should be consumed, and at RX_EOM.
+ *
+ * If disabled, maximum 16 bytes will be received (including header),
+ * and interrupt at RX_EOM.  Later bytes will be acked but not put
+ * into the RX_DATA.
+ */
+# define VC4_HDMI_CEC_RX_CONTINUE               BIT(23)
+# define VC4_HDMI_CEC_TX_CONTINUE               BIT(22)
+/* Set this after a CEC interrupt. */
+# define VC4_HDMI_CEC_CLEAR_RECEIVE_OFF         BIT(21)
+/* Starts a TX.  Will wait for appropriate idel time before CEC
+ * activity. Must be cleared in between transmits.
+ */
+# define VC4_HDMI_CEC_START_XMIT_BEGIN          BIT(20)
+# define VC4_HDMI_CEC_MESSAGE_LENGTH_MASK       VC4_MASK(19, 16)
+# define VC4_HDMI_CEC_MESSAGE_LENGTH_SHIFT      16
+/* Device's CEC address */
+# define VC4_HDMI_CEC_ADDR_MASK                 VC4_MASK(15, 12)
+# define VC4_HDMI_CEC_ADDR_SHIFT                12
+/* Divides off of HSM clock to generate CEC bit clock. */
+/* With the current defaults the CEC bit clock is 40 kHz = 25 usec */
+# define VC4_HDMI_CEC_DIV_CLK_CNT_MASK          VC4_MASK(11, 0)
+# define VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT         0
+
+/* Set these fields to how many bit clock cycles get to that many
+ * microseconds.
+ */
+#define VC4_HDMI_CEC_CNTRL_2                    0x0ec
+# define VC4_HDMI_CEC_CNT_TO_1500_US_MASK       VC4_MASK(30, 24)
+# define VC4_HDMI_CEC_CNT_TO_1500_US_SHIFT      24
+# define VC4_HDMI_CEC_CNT_TO_1300_US_MASK       VC4_MASK(23, 17)
+# define VC4_HDMI_CEC_CNT_TO_1300_US_SHIFT      17
+# define VC4_HDMI_CEC_CNT_TO_800_US_MASK        VC4_MASK(16, 11)
+# define VC4_HDMI_CEC_CNT_TO_800_US_SHIFT       11
+# define VC4_HDMI_CEC_CNT_TO_600_US_MASK        VC4_MASK(10, 5)
+# define VC4_HDMI_CEC_CNT_TO_600_US_SHIFT       5
+# define VC4_HDMI_CEC_CNT_TO_400_US_MASK        VC4_MASK(4, 0)
+# define VC4_HDMI_CEC_CNT_TO_400_US_SHIFT       0
+
+#define VC4_HDMI_CEC_CNTRL_3                    0x0f0
+# define VC4_HDMI_CEC_CNT_TO_2750_US_MASK       VC4_MASK(31, 24)
+# define VC4_HDMI_CEC_CNT_TO_2750_US_SHIFT      24
+# define VC4_HDMI_CEC_CNT_TO_2400_US_MASK       VC4_MASK(23, 16)
+# define VC4_HDMI_CEC_CNT_TO_2400_US_SHIFT      16
+# define VC4_HDMI_CEC_CNT_TO_2050_US_MASK       VC4_MASK(15, 8)
+# define VC4_HDMI_CEC_CNT_TO_2050_US_SHIFT      8
+# define VC4_HDMI_CEC_CNT_TO_1700_US_MASK       VC4_MASK(7, 0)
+# define VC4_HDMI_CEC_CNT_TO_1700_US_SHIFT      0
+
+#define VC4_HDMI_CEC_CNTRL_4                    0x0f4
+# define VC4_HDMI_CEC_CNT_TO_4300_US_MASK       VC4_MASK(31, 24)
+# define VC4_HDMI_CEC_CNT_TO_4300_US_SHIFT      24
+# define VC4_HDMI_CEC_CNT_TO_3900_US_MASK       VC4_MASK(23, 16)
+# define VC4_HDMI_CEC_CNT_TO_3900_US_SHIFT      16
+# define VC4_HDMI_CEC_CNT_TO_3600_US_MASK       VC4_MASK(15, 8)
+# define VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT      8
+# define VC4_HDMI_CEC_CNT_TO_3500_US_MASK       VC4_MASK(7, 0)
+# define VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT      0
+
+#define VC4_HDMI_CEC_CNTRL_5                    0x0f8
+# define VC4_HDMI_CEC_TX_SW_RESET               BIT(27)
+# define VC4_HDMI_CEC_RX_SW_RESET               BIT(26)
+# define VC4_HDMI_CEC_PAD_SW_RESET              BIT(25)
+# define VC4_HDMI_CEC_MUX_TP_OUT_CEC            BIT(24)
+# define VC4_HDMI_CEC_RX_CEC_INT                BIT(23)
+# define VC4_HDMI_CEC_CLK_PRELOAD_MASK          VC4_MASK(22, 16)
+# define VC4_HDMI_CEC_CLK_PRELOAD_SHIFT         16
+# define VC4_HDMI_CEC_CNT_TO_4700_US_MASK       VC4_MASK(15, 8)
+# define VC4_HDMI_CEC_CNT_TO_4700_US_SHIFT      8
+# define VC4_HDMI_CEC_CNT_TO_4500_US_MASK       VC4_MASK(7, 0)
+# define VC4_HDMI_CEC_CNT_TO_4500_US_SHIFT      0
+
+/* Transmit data, first byte is low byte of the 32-bit reg.  MSB of
+ * each byte transmitted first.
+ */
+#define VC4_HDMI_CEC_TX_DATA_1                  0x0fc
+#define VC4_HDMI_CEC_TX_DATA_2                  0x100
+#define VC4_HDMI_CEC_TX_DATA_3                  0x104
+#define VC4_HDMI_CEC_TX_DATA_4                  0x108
+#define VC4_HDMI_CEC_RX_DATA_1                  0x10c
+#define VC4_HDMI_CEC_RX_DATA_2                  0x110
+#define VC4_HDMI_CEC_RX_DATA_3                  0x114
+#define VC4_HDMI_CEC_RX_DATA_4                  0x118
+
 #define VC4_HDMI_TX_PHY_RESET_CTL               0x2c0
 
 #define VC4_HDMI_TX_PHY_CTL0                    0x2c4
 # define VC4_HDMI_TX_PHY_RNG_PWRDN              BIT(25)
 
+/* Interrupt status bits */
+#define VC4_HDMI_CPU_STATUS                     0x340
+#define VC4_HDMI_CPU_SET                        0x344
+#define VC4_HDMI_CPU_CLEAR                      0x348
+# define VC4_HDMI_CPU_CEC                       BIT(6)
+# define VC4_HDMI_CPU_HOTPLUG                   BIT(0)
+
+#define VC4_HDMI_CPU_MASK_STATUS                0x34c
+#define VC4_HDMI_CPU_MASK_SET                   0x350
+#define VC4_HDMI_CPU_MASK_CLEAR                 0x354
+
 #define VC4_HDMI_GCP(x)                         (0x400 + ((x) * 0x4))
 #define VC4_HDMI_RAM_PACKET(x)                  (0x400 + ((x) * 0x24))
 #define VC4_HDMI_PACKET_STRIDE                  0x24
 
 #define VC4_HD_M_CTL                            0x00c
+/* Debug: Current receive value on the CEC pad. */
+# define VC4_HD_CECRXD                          BIT(9)
+/* Debug: Override CEC output to 0. */
+# define VC4_HD_CECOVR                          BIT(8)
 # define VC4_HD_M_REGISTER_FILE_STANDBY         (3 << 6)
 # define VC4_HD_M_RAM_STANDBY                   (3 << 4)
 # define VC4_HD_M_SW_RST                        BIT(2)
diff --git a/drivers/gpu/drm/vc4/vc4_render_cl.c b/drivers/gpu/drm/vc4/vc4_render_cl.c
index 5dc19429d4ae..4a8051532f00 100644
--- a/drivers/gpu/drm/vc4/vc4_render_cl.c
+++ b/drivers/gpu/drm/vc4/vc4_render_cl.c
@@ -320,7 +320,7 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec,
 
         size += xtiles * ytiles * loop_body_size;
 
-        setup->rcl = &vc4_bo_create(dev, size, true)->base;
+        setup->rcl = &vc4_bo_create(dev, size, true, VC4_BO_TYPE_RCL)->base;
         if (IS_ERR(setup->rcl))
                 return PTR_ERR(setup->rcl);
         list_add_tail(&to_vc4_bo(&setup->rcl->base)->unref_head,
diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c
index 8c723da71f66..622cd43840b8 100644
--- a/drivers/gpu/drm/vc4/vc4_v3d.c
+++ b/drivers/gpu/drm/vc4/vc4_v3d.c
@@ -236,7 +236,8 @@ vc4_allocate_bin_bo(struct drm_device *drm)
         INIT_LIST_HEAD(&list);
 
         while (true) {
-                struct vc4_bo *bo = vc4_bo_create(drm, size, true);
+                struct vc4_bo *bo = vc4_bo_create(drm, size, true,
+                                                  VC4_BO_TYPE_BIN);
 
                 if (IS_ERR(bo)) {
                         ret = PTR_ERR(bo);
diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c
index 09c1e05765fa..3a9a302247a2 100644
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -366,10 +366,8 @@ static int vc4_vec_connector_get_modes(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs vc4_vec_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = vc4_vec_connector_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
-        .set_property = drm_atomic_helper_connector_set_property,
         .destroy = vc4_vec_connector_destroy,
         .reset = drm_atomic_helper_connector_reset,
         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
diff --git a/drivers/gpu/drm/virtio/virtgpu_display.c b/drivers/gpu/drm/virtio/virtgpu_display.c
index ffd22e5ab43a..b6d52055a11f 100644
--- a/drivers/gpu/drm/virtio/virtgpu_display.c
+++ b/drivers/gpu/drm/virtio/virtgpu_display.c
@@ -252,7 +252,6 @@ static void virtio_gpu_conn_destroy(struct drm_connector *connector)
 }
 
 static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .detect = virtio_gpu_conn_detect,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = virtio_gpu_conn_destroy,
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c b/drivers/gpu/drm/virtio/virtgpu_plane.c
index adcdbd0abef6..71ba455af915 100644
--- a/drivers/gpu/drm/virtio/virtgpu_plane.c
+++ b/drivers/gpu/drm/virtio/virtgpu_plane.c
@@ -298,7 +298,7 @@ struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
         ret = drm_universal_plane_init(dev, plane, 1 << index,
                                        &virtio_gpu_plane_funcs,
                                        formats, nformats,
-                                       type, NULL);
+                                       NULL, type, NULL);
         if (ret)
                 goto err_plane_init;
 
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index 6391069498d6..b8a09807c5de 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -428,7 +428,7 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
                                        0, &vmw_ldu_plane_funcs,
                                        vmw_primary_plane_formats,
                                        ARRAY_SIZE(vmw_primary_plane_formats),
-                                       DRM_PLANE_TYPE_PRIMARY, NULL);
+                                       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret) {
                 DRM_ERROR("Failed to initialize primary plane");
                 goto err_free;
@@ -443,7 +443,7 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
                         0, &vmw_ldu_cursor_funcs,
                         vmw_cursor_plane_formats,
                         ARRAY_SIZE(vmw_cursor_plane_formats),
-                        DRM_PLANE_TYPE_CURSOR, NULL);
+                        NULL, DRM_PLANE_TYPE_CURSOR, NULL);
         if (ret) {
                 DRM_ERROR("Failed to initialize cursor plane");
                 drm_plane_cleanup(&ldu->base.primary);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 854403509216..d1552d3e0652 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -624,7 +624,7 @@ static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
                                        0, &vmw_sou_plane_funcs,
                                        vmw_primary_plane_formats,
                                        ARRAY_SIZE(vmw_primary_plane_formats),
-                                       DRM_PLANE_TYPE_PRIMARY, NULL);
+                                       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret) {
                 DRM_ERROR("Failed to initialize primary plane");
                 goto err_free;
@@ -639,7 +639,7 @@ static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
                         0, &vmw_sou_cursor_funcs,
                         vmw_cursor_plane_formats,
                         ARRAY_SIZE(vmw_cursor_plane_formats),
-                        DRM_PLANE_TYPE_CURSOR, NULL);
+                        NULL, DRM_PLANE_TYPE_CURSOR, NULL);
         if (ret) {
                 DRM_ERROR("Failed to initialize cursor plane");
                 drm_plane_cleanup(&sou->base.primary);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
index ed9404a7f457..c4de4ad0543b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
@@ -1475,7 +1475,7 @@ static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
                                        0, &vmw_stdu_plane_funcs,
                                        vmw_primary_plane_formats,
                                        ARRAY_SIZE(vmw_primary_plane_formats),
-                                       DRM_PLANE_TYPE_PRIMARY, NULL);
+                                       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
         if (ret) {
                 DRM_ERROR("Failed to initialize primary plane");
                 goto err_free;
@@ -1490,7 +1490,7 @@ static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
                         0, &vmw_stdu_cursor_funcs,
                         vmw_cursor_plane_formats,
                         ARRAY_SIZE(vmw_cursor_plane_formats),
-                        DRM_PLANE_TYPE_CURSOR, NULL);
+                        NULL, DRM_PLANE_TYPE_CURSOR, NULL);
         if (ret) {
                 DRM_ERROR("Failed to initialize cursor plane");
                 drm_plane_cleanup(&stdu->base.primary);
diff --git a/drivers/gpu/drm/zte/zx_drm_drv.c b/drivers/gpu/drm/zte/zx_drm_drv.c
index c983cdfa1e34..45244828fc1f 100644
--- a/drivers/gpu/drm/zte/zx_drm_drv.c
+++ b/drivers/gpu/drm/zte/zx_drm_drv.c
@@ -62,8 +62,6 @@ static struct drm_driver zx_drm_driver = {
         .gem_free_object_unlocked = drm_gem_cma_free_object,
         .gem_vm_ops = &drm_gem_cma_vm_ops,
         .dumb_create = drm_gem_cma_dumb_create,
-        .dumb_map_offset = drm_gem_cma_dumb_map_offset,
-        .dumb_destroy = drm_gem_dumb_destroy,
         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
         .gem_prime_export = drm_gem_prime_export,
diff --git a/drivers/gpu/drm/zte/zx_hdmi.c b/drivers/gpu/drm/zte/zx_hdmi.c
index 7e834e3eeed9..b8abb1b496ff 100644
--- a/drivers/gpu/drm/zte/zx_hdmi.c
+++ b/drivers/gpu/drm/zte/zx_hdmi.c
@@ -300,7 +300,6 @@ zx_hdmi_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs zx_hdmi_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = zx_hdmi_connector_detect,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/drm/zte/zx_plane.c b/drivers/gpu/drm/zte/zx_plane.c
index 4a6252720c10..18e763493264 100644
--- a/drivers/gpu/drm/zte/zx_plane.c
+++ b/drivers/gpu/drm/zte/zx_plane.c
@@ -540,7 +540,7 @@ int zx_plane_init(struct drm_device *drm, struct zx_plane *zplane,
 
         ret = drm_universal_plane_init(drm, plane, VOU_CRTC_MASK,
                                        &zx_plane_funcs, formats, format_count,
-                                       type, NULL);
+                                       NULL, type, NULL);
         if (ret) {
                 DRM_DEV_ERROR(dev, "failed to init universal plane: %d\n", ret);
                 return ret;
diff --git a/drivers/gpu/drm/zte/zx_tvenc.c b/drivers/gpu/drm/zte/zx_tvenc.c
index b56dc69843fc..0de1a71ca4e0 100644
--- a/drivers/gpu/drm/zte/zx_tvenc.c
+++ b/drivers/gpu/drm/zte/zx_tvenc.c
@@ -269,7 +269,6 @@ static struct drm_connector_helper_funcs zx_tvenc_connector_helper_funcs = {
 };
 
 static const struct drm_connector_funcs zx_tvenc_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .destroy = drm_connector_cleanup,
         .reset = drm_atomic_helper_connector_reset,
diff --git a/drivers/gpu/drm/zte/zx_vga.c b/drivers/gpu/drm/zte/zx_vga.c
index 1e0811f775cb..3e7e33cd3dfa 100644
--- a/drivers/gpu/drm/zte/zx_vga.c
+++ b/drivers/gpu/drm/zte/zx_vga.c
@@ -138,7 +138,6 @@ zx_vga_connector_detect(struct drm_connector *connector, bool force)
 }
 
 static const struct drm_connector_funcs zx_vga_connector_funcs = {
-        .dpms = drm_atomic_helper_connector_dpms,
         .fill_modes = drm_helper_probe_single_connector_modes,
         .detect = zx_vga_connector_detect,
         .destroy = drm_connector_cleanup,
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
index a048e3ac523d..7ece0e9058c6 100644
--- a/drivers/gpu/host1x/bus.c
+++ b/drivers/gpu/host1x/bus.c
@@ -41,7 +41,6 @@ struct host1x_subdev {
 /**
  * host1x_subdev_add() - add a new subdevice with an associated device node
  * @device: host1x device to add the subdevice to
- * @driver: host1x driver
  * @np: device node
  */
 static int host1x_subdev_add(struct host1x_device *device,
diff --git a/drivers/staging/vboxvideo/vbox_fb.c b/drivers/staging/vboxvideo/vbox_fb.c
index 35f6d9f8c203..bf6635826159 100644
--- a/drivers/staging/vboxvideo/vbox_fb.c
+++ b/drivers/staging/vboxvideo/vbox_fb.c
@@ -317,22 +317,7 @@ static int vboxfb_create(struct drm_fb_helper *helper,
         return 0;
 }
 
-static void vbox_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-                              u16 blue, int regno)
-{
-}
-
-static void vbox_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-                              u16 *blue, int regno)
-{
-        *red = regno;
-        *green = regno;
-        *blue = regno;
-}
-
 static struct drm_fb_helper_funcs vbox_fb_helper_funcs = {
-        .gamma_set = vbox_fb_gamma_set,
-        .gamma_get = vbox_fb_gamma_get,
         .fb_probe = vboxfb_create,
 };
 
diff --git a/drivers/staging/vboxvideo/vbox_mode.c b/drivers/staging/vboxvideo/vbox_mode.c
index f2b85f3256fa..996da1c79158 100644
--- a/drivers/staging/vboxvideo/vbox_mode.c
+++ b/drivers/staging/vboxvideo/vbox_mode.c
@@ -134,10 +134,6 @@ static int vbox_set_view(struct drm_crtc *crtc)
         return 0;
 }
 
-static void vbox_crtc_load_lut(struct drm_crtc *crtc)
-{
-}
-
 static void vbox_crtc_dpms(struct drm_crtc *crtc, int mode)
 {
         struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc);
@@ -330,7 +326,6 @@ static const struct drm_crtc_helper_funcs vbox_crtc_helper_funcs = {
         .mode_set = vbox_crtc_mode_set,
         /* .mode_set_base = vbox_crtc_mode_set_base, */
         .disable = vbox_crtc_disable,
-        .load_lut = vbox_crtc_load_lut,
         .prepare = vbox_crtc_prepare,
         .commit = vbox_crtc_commit,
 };
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
index 7cd0f303f5a3..8a5808eb5628 100644
--- a/include/drm/drm_atomic.h
+++ b/include/drm/drm_atomic.h
@@ -315,15 +315,9 @@ int drm_atomic_crtc_set_property(struct drm_crtc *crtc,
 struct drm_plane_state * __must_check
 drm_atomic_get_plane_state(struct drm_atomic_state *state,
                            struct drm_plane *plane);
-int drm_atomic_plane_set_property(struct drm_plane *plane,
-                struct drm_plane_state *state, struct drm_property *property,
-                uint64_t val);
 struct drm_connector_state * __must_check
 drm_atomic_get_connector_state(struct drm_atomic_state *state,
                                struct drm_connector *connector);
-int drm_atomic_connector_set_property(struct drm_connector *connector,
-                struct drm_connector_state *state, struct drm_property *property,
-                uint64_t val);
 
 void drm_atomic_private_obj_init(struct drm_private_obj *obj,
                                  struct drm_private_state *state,
@@ -551,8 +545,6 @@ int __must_check
 drm_atomic_add_affected_planes(struct drm_atomic_state *state,
                                struct drm_crtc *crtc);
 
-void drm_atomic_legacy_backoff(struct drm_atomic_state *state);
-
 void
 drm_atomic_clean_old_fb(struct drm_device *dev, unsigned plane_mask, int ret);
 
@@ -883,7 +875,7 @@ void drm_state_dump(struct drm_device *dev, struct drm_printer *p);
  *
  * To give drivers flexibility &struct drm_crtc_state has 3 booleans to track
  * whether the state CRTC changed enough to need a full modeset cycle:
- * planes_changed, mode_changed and active_changed. This helper simply
+ * mode_changed, active_changed and connectors_changed. This helper simply
  * combines these three to compute the overall need for a modeset for @state.
  *
  * The atomic helper code sets these booleans, but drivers can and should
diff --git a/include/drm/drm_atomic_helper.h b/include/drm/drm_atomic_helper.h
index d6ddf5bc5fdd..d2b56cc657e9 100644
--- a/include/drm/drm_atomic_helper.h
+++ b/include/drm/drm_atomic_helper.h
@@ -124,15 +124,6 @@ int drm_atomic_helper_commit_duplicated_state(struct drm_atomic_state *state,
 int drm_atomic_helper_resume(struct drm_device *dev,
                              struct drm_atomic_state *state);
 
-int drm_atomic_helper_crtc_set_property(struct drm_crtc *crtc,
-                                        struct drm_property *property,
-                                        uint64_t val);
-int drm_atomic_helper_plane_set_property(struct drm_plane *plane,
-                                        struct drm_property *property,
-                                        uint64_t val);
-int drm_atomic_helper_connector_set_property(struct drm_connector *connector,
-                                        struct drm_property *property,
-                                        uint64_t val);
 int drm_atomic_helper_page_flip(struct drm_crtc *crtc,
                                 struct drm_framebuffer *fb,
                                 struct drm_pending_vblank_event *event,
@@ -145,8 +136,6 @@ int drm_atomic_helper_page_flip_target(
                                 uint32_t flags,
                                 uint32_t target,
                                 struct drm_modeset_acquire_ctx *ctx);
-int drm_atomic_helper_connector_dpms(struct drm_connector *connector,
-                                     int mode);
 struct drm_encoder *
 drm_atomic_helper_best_encoder(struct drm_connector *connector);
 
diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h
index 1dc94d5392e2..6522d4cbc9d9 100644
--- a/include/drm/drm_bridge.h
+++ b/include/drm/drm_bridge.h
@@ -268,6 +268,9 @@ void drm_bridge_enable(struct drm_bridge *bridge);
 struct drm_bridge *drm_panel_bridge_add(struct drm_panel *panel,
                                         u32 connector_type);
 void drm_panel_bridge_remove(struct drm_bridge *bridge);
+struct drm_bridge *devm_drm_panel_bridge_add(struct device *dev,
+                                             struct drm_panel *panel,
+                                             u32 connector_type);
 #endif
 
 #endif
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 4bc088269d05..ea8da401c93c 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -382,8 +382,8 @@ struct drm_connector_funcs {
          * implement the 4 level DPMS support on the connector any more, but
          * instead only have an on/off "ACTIVE" property on the CRTC object.
          *
-         * Drivers implementing atomic modeset should use
-         * drm_atomic_helper_connector_dpms() to implement this hook.
+         * This hook is not used by atomic drivers, remapping of the legacy DPMS
+         * property is entirely handled in the DRM core.
          *
          * RETURNS:
          *
@@ -480,11 +480,9 @@ struct drm_connector_funcs {
          * This is the legacy entry point to update a property attached to the
          * connector.
          *
-         * Drivers implementing atomic modeset should use
-         * drm_atomic_helper_connector_set_property() to implement this hook.
-         *
          * This callback is optional if the driver does not support any legacy
-         * driver-private properties.
+         * driver-private properties. For atomic drivers it is not used because
+         * property handling is done entirely in the DRM core.
          *
          * RETURNS:
          *
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 3a911a64c257..1a642020e306 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -358,14 +358,6 @@ struct drm_crtc_funcs {
          * drm_crtc_enable_color_mgmt(), which then supports the legacy gamma
          * interface through the drm_atomic_helper_legacy_gamma_set()
          * compatibility implementation.
-         *
-         * NOTE:
-         *
-         * Drivers that support gamma tables and also fbdev emulation through
-         * the provided helper library need to take care to fill out the gamma
-         * hooks for both. Currently there's a bit an unfortunate duplication
-         * going on, which should eventually be unified to just one set of
-         * hooks.
          */
         int (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
                          uint32_t size,
@@ -481,11 +473,9 @@ struct drm_crtc_funcs {
          * This is the legacy entry point to update a property attached to the
          * CRTC.
          *
-         * Drivers implementing atomic modeset should use
-         * drm_atomic_helper_crtc_set_property() to implement this hook.
-         *
          * This callback is optional if the driver does not support any legacy
-         * driver-private properties.
+         * driver-private properties. For atomic drivers it is not used because
+         * property handling is done entirely in the DRM core.
          *
          * RETURNS:
          *
diff --git a/include/drm/drm_drv.h b/include/drm/drm_drv.h
index 81971dc0b573..505c91354802 100644
--- a/include/drm/drm_drv.h
+++ b/include/drm/drm_drv.h
@@ -390,6 +390,11 @@ struct drm_driver {
          */
         void (*master_drop)(struct drm_device *dev, struct drm_file *file_priv);
 
+        /**
+         * @debugfs_init:
+         *
+         * Allows drivers to create driver-specific debugfs files.
+         */
         int (*debugfs_init)(struct drm_minor *minor);
 
         /**
@@ -408,7 +413,18 @@ struct drm_driver {
          */
         void (*gem_free_object_unlocked) (struct drm_gem_object *obj);
 
+        /**
+         * @gem_open_object:
+         *
+         * Driver hook called upon gem handle creation
+         */
         int (*gem_open_object) (struct drm_gem_object *, struct drm_file *);
+
+        /**
+         * @gem_close_object:
+         *
+         * Driver hook called upon gem handle release
+         */
         void (*gem_close_object) (struct drm_gem_object *, struct drm_file *);
 
         /**
@@ -421,19 +437,34 @@ struct drm_driver {
                                                     size_t size);
 
         /* prime: */
-        /* export handle -> fd (see drm_gem_prime_handle_to_fd() helper) */
+        /**
+         * @prime_handle_to_fd:
+         *
+         * export handle -> fd (see drm_gem_prime_handle_to_fd() helper)
+         */
         int (*prime_handle_to_fd)(struct drm_device *dev, struct drm_file *file_priv,
                                 uint32_t handle, uint32_t flags, int *prime_fd);
-        /* import fd -> handle (see drm_gem_prime_fd_to_handle() helper) */
+        /**
+         * @prime_fd_to_handle:
+         *
+         * import fd -> handle (see drm_gem_prime_fd_to_handle() helper)
+         */
         int (*prime_fd_to_handle)(struct drm_device *dev, struct drm_file *file_priv,
                                 int prime_fd, uint32_t *handle);
-        /* export GEM -> dmabuf */
+        /**
+         * @gem_prime_export:
+         *
+         * export GEM -> dmabuf
+         */
         struct dma_buf * (*gem_prime_export)(struct drm_device *dev,
                                 struct drm_gem_object *obj, int flags);
-        /* import dmabuf -> GEM */
+        /**
+         * @gem_prime_import:
+         *
+         * import dmabuf -> GEM
+         */
         struct drm_gem_object * (*gem_prime_import)(struct drm_device *dev,
                                 struct dma_buf *dma_buf);
-        /* low-level interface used by drm_gem_prime_{import,export} */
         int (*gem_prime_pin)(struct drm_gem_object *obj);
         void (*gem_prime_unpin)(struct drm_gem_object *obj);
         struct reservation_object * (*gem_prime_res_obj)(
@@ -505,16 +536,25 @@ struct drm_driver {
                             struct drm_device *dev,
                             uint32_t handle);
 
-        /* Driver private ops for this object */
+        /**
+         * @gem_vm_ops: Driver private ops for this object
+         */
         const struct vm_operations_struct *gem_vm_ops;
 
+        /** @major: driver major number */
         int major;
+        /** @minor: driver minor number */
         int minor;
+        /** @patchlevel: driver patch level */
         int patchlevel;
+        /** @name: driver name */
         char *name;
+        /** @desc: driver description */
         char *desc;
+        /** @date: driver date */
         char *date;
 
+        /** @driver_features: driver features */
         u32 driver_features;
 
         /**
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index a5ea6ffdfecc..33fe95927742 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -85,38 +85,6 @@ struct drm_fb_helper_surface_size {
  */
 struct drm_fb_helper_funcs {
         /**
-         * @gamma_set:
-         *
-         * Set the given gamma LUT register on the given CRTC.
-         *
-         * This callback is optional.
-         *
-         * FIXME:
-         *
-         * This callback is functionally redundant with the core gamma table
-         * support and simply exists because the fbdev hasn't yet been
-         * refactored to use the core gamma table interfaces.
-         */
-        void (*gamma_set)(struct drm_crtc *crtc, u16 red, u16 green,
-                          u16 blue, int regno);
-        /**
-         * @gamma_get:
-         *
-         * Read the given gamma LUT register on the given CRTC, used to save the
-         * current LUT when force-restoring the fbdev for e.g. kdbg.
-         *
-         * This callback is optional.
-         *
-         * FIXME:
-         *
-         * This callback is functionally redundant with the core gamma table
-         * support and simply exists because the fbdev hasn't yet been
-         * refactored to use the core gamma table interfaces.
-         */
-        void (*gamma_get)(struct drm_crtc *crtc, u16 *red, u16 *green,
-                          u16 *blue, int regno);
-
-        /**
          * @fb_probe:
          *
          * Driver callback to allocate and initialize the fbdev info structure.
diff --git a/include/drm/drm_gem.h b/include/drm/drm_gem.h
index 4a9d231b4294..9c55c2acaa2b 100644
--- a/include/drm/drm_gem.h
+++ b/include/drm/drm_gem.h
@@ -302,6 +302,8 @@ void drm_gem_put_pages(struct drm_gem_object *obj, struct page **pages,
                 bool dirty, bool accessed);
 
 struct drm_gem_object *drm_gem_object_lookup(struct drm_file *filp, u32 handle);
+int drm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
+                            u32 handle, u64 *offset);
 int drm_gem_dumb_destroy(struct drm_file *file,
                          struct drm_device *dev,
                          uint32_t handle);
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 42981711189b..1b37368416c8 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -757,6 +757,12 @@ struct drm_mode_config {
          */
         bool allow_fb_modifiers;
 
+        /**
+         * @modifiers: Plane property to list support modifier/format
+         * combination.
+         */
+        struct drm_property *modifiers_property;
+
         /* cursor size */
         uint32_t cursor_width, cursor_height;
 
diff --git a/include/drm/drm_modeset_helper_vtables.h b/include/drm/drm_modeset_helper_vtables.h
index 06569845708c..c55cf3ff6847 100644
--- a/include/drm/drm_modeset_helper_vtables.h
+++ b/include/drm/drm_modeset_helper_vtables.h
@@ -267,22 +267,6 @@ struct drm_crtc_helper_funcs {
                                     enum mode_set_atomic);
 
         /**
-         * @load_lut:
-         *
-         * Load a LUT prepared with the &drm_fb_helper_funcs.gamma_set vfunc.
-         *
-         * This callback is optional and is only used by the fbdev emulation
-         * helpers.
-         *
-         * FIXME:
-         *
-         * This callback is functionally redundant with the core gamma table
-         * support and simply exists because the fbdev hasn't yet been
-         * refactored to use the core gamma table interfaces.
-         */
-        void (*load_lut)(struct drm_crtc *crtc);
-
-        /**
          * @disable:
          *
          * This callback should be used to disable the CRTC. With the atomic
@@ -1179,9 +1163,9 @@ struct drm_plane_helper_funcs {
          *  - It only works for single plane updates
          *  - Async Pageflips are not supported yet
          *  - Some hw might still scan out the old buffer until the next
-         *  vblank, however we let go of the fb references as soon as
-         *  we run this hook. For now drivers must implement their own workers
-         *  for deferring if needed, until a common solution is created.
+         *    vblank, however we let go of the fb references as soon as
+         *    we run this hook. For now drivers must implement their own workers
+         *    for deferring if needed, until a common solution is created.
          */
         void (*atomic_async_update)(struct drm_plane *plane,
                                     struct drm_plane_state *new_state);
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 9ab3e7044812..73f90f9d057f 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -233,11 +233,9 @@ struct drm_plane_funcs {
          * This is the legacy entry point to update a property attached to the
          * plane.
          *
-         * Drivers implementing atomic modeset should use
-         * drm_atomic_helper_plane_set_property() to implement this hook.
-         *
          * This callback is optional if the driver does not support any legacy
-         * driver-private properties.
+         * driver-private properties. For atomic drivers it is not used because
+         * property handling is done entirely in the DRM core.
          *
          * RETURNS:
          *
@@ -392,6 +390,22 @@ struct drm_plane_funcs {
          */
         void (*atomic_print_state)(struct drm_printer *p,
                                    const struct drm_plane_state *state);
+
+        /**
+         * @format_mod_supported:
+         *
+         * This optional hook is used for the DRM to determine if the given
+         * format/modifier combination is valid for the plane. This allows the
+         * DRM to generate the correct format bitmask (which formats apply to
+         * which modifier).
+         *
+         * Returns:
+         *
+         * True if the given modifier is valid for that format on the plane.
+         * False otherwise.
+         */
+        bool (*format_mod_supported)(struct drm_plane *plane, uint32_t format,
+                                     uint64_t modifier);
 };
 
 /**
@@ -487,6 +501,9 @@ struct drm_plane {
         unsigned int format_count;
         bool format_default;
 
+        uint64_t *modifiers;
+        unsigned int modifier_count;
+
         struct drm_crtc *crtc;
         struct drm_framebuffer *fb;
 
@@ -527,13 +544,14 @@ struct drm_plane {
 
 #define obj_to_plane(x) container_of(x, struct drm_plane, base)
 
-__printf(8, 9)
+__printf(9, 10)
 int drm_universal_plane_init(struct drm_device *dev,
                              struct drm_plane *plane,
                              uint32_t possible_crtcs,
                              const struct drm_plane_funcs *funcs,
                              const uint32_t *formats,
                              unsigned int format_count,
+                             const uint64_t *format_modifiers,
                              enum drm_plane_type type,
                              const char *name, ...);
 int drm_plane_init(struct drm_device *dev,
diff --git a/include/drm/drm_scdc_helper.h b/include/drm/drm_scdc_helper.h
index c25122bb490a..f92eb2094d6b 100644
--- a/include/drm/drm_scdc_helper.h
+++ b/include/drm/drm_scdc_helper.h
@@ -131,31 +131,6 @@ static inline int drm_scdc_writeb(struct i2c_adapter *adapter, u8 offset,
 
 bool drm_scdc_get_scrambling_status(struct i2c_adapter *adapter);
 
-/**
- * drm_scdc_set_scrambling - enable scrambling
- * @adapter: I2C adapter for DDC channel
- * @enable: bool to indicate if scrambling is to be enabled/disabled
- *
- * Writes the TMDS config register over SCDC channel, and:
- * enables scrambling when enable = 1
- * disables scrambling when enable = 0
- *
- * Returns:
- * True if scrambling is set/reset successfully, false otherwise.
- */
 bool drm_scdc_set_scrambling(struct i2c_adapter *adapter, bool enable);
-
-/**
- * drm_scdc_set_high_tmds_clock_ratio - set TMDS clock ratio
- * @adapter: I2C adapter for DDC channel
- * @set: ret or reset the high clock ratio
- *
- * Writes to the TMDS config register over SCDC channel, and:
- * sets TMDS clock ratio to 1/40 when set = 1
- * sets TMDS clock ratio to 1/10 when set = 0
- *
- * Returns:
- * True if write is successful, false otherwise.
- */
 bool drm_scdc_set_high_tmds_clock_ratio(struct i2c_adapter *adapter, bool set);
 #endif
diff --git a/include/drm/drm_simple_kms_helper.h b/include/drm/drm_simple_kms_helper.h
index 2d36538e4a17..6d9adbb46293 100644
--- a/include/drm/drm_simple_kms_helper.h
+++ b/include/drm/drm_simple_kms_helper.h
@@ -122,6 +122,7 @@ int drm_simple_display_pipe_init(struct drm_device *dev,
                         struct drm_simple_display_pipe *pipe,
                         const struct drm_simple_display_pipe_funcs *funcs,
                         const uint32_t *formats, unsigned int format_count,
+                        const uint64_t *format_modifiers,
                         struct drm_connector *connector);
 
 #endif /* __LINUX_DRM_SIMPLE_KMS_HELPER_H */
diff --git a/include/drm/tinydrm/mipi-dbi.h b/include/drm/tinydrm/mipi-dbi.h
index d137b16ee873..83346ddb9dba 100644
--- a/include/drm/tinydrm/mipi-dbi.h
+++ b/include/drm/tinydrm/mipi-dbi.h
@@ -62,11 +62,7 @@ mipi_dbi_from_tinydrm(struct tinydrm_device *tdev)
 }
 
 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *mipi,
-                      struct gpio_desc *dc,
-                      const struct drm_simple_display_pipe_funcs *pipe_funcs,
-                      struct drm_driver *driver,
-                      const struct drm_display_mode *mode,
-                      unsigned int rotation);
+                      struct gpio_desc *dc);
 int mipi_dbi_init(struct device *dev, struct mipi_dbi *mipi,
                   const struct drm_simple_display_pipe_funcs *pipe_funcs,
                   struct drm_driver *driver,
diff --git a/include/drm/tinydrm/tinydrm.h b/include/drm/tinydrm/tinydrm.h
index 00b800df4d1b..4774fe3d4273 100644
--- a/include/drm/tinydrm/tinydrm.h
+++ b/include/drm/tinydrm/tinydrm.h
@@ -56,9 +56,7 @@ pipe_to_tinydrm(struct drm_simple_display_pipe *pipe)
         .gem_prime_vmap         = drm_gem_cma_prime_vmap, \
         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap, \
         .gem_prime_mmap         = drm_gem_cma_prime_mmap, \
-        .dumb_create            = drm_gem_cma_dumb_create, \
-        .dumb_map_offset        = drm_gem_cma_dumb_map_offset, \
-        .dumb_destroy           = drm_gem_dumb_destroy
+        .dumb_create            = drm_gem_cma_dumb_create
 
 /**
  * TINYDRM_MODE - tinydrm display mode
diff --git a/include/linux/sync_file.h b/include/linux/sync_file.h
index 5726107963b2..0ad87c434ae6 100644
--- a/include/linux/sync_file.h
+++ b/include/linux/sync_file.h
@@ -43,12 +43,13 @@ struct sync_file {
 #endif
 
         wait_queue_head_t       wq;
+        unsigned long           flags;
 
         struct dma_fence        *fence;
         struct dma_fence_cb cb;
 };
 
-#define POLL_ENABLED DMA_FENCE_FLAG_USER_BITS
+#define POLL_ENABLED 0
 
 struct sync_file *sync_file_create(struct dma_fence *fence);
 struct dma_fence *sync_file_get_fence(int fd);
diff --git a/include/uapi/drm/armada_drm.h b/include/uapi/drm/armada_drm.h
index 72e326f9c7de..0cb932416cfe 100644
--- a/include/uapi/drm/armada_drm.h
+++ b/include/uapi/drm/armada_drm.h
@@ -23,27 +23,27 @@ extern "C" {
         DRM_##dir(DRM_COMMAND_BASE + DRM_ARMADA_##name, struct drm_armada_##str)
 
 struct drm_armada_gem_create {
-        uint32_t handle;
-        uint32_t size;
+        __u32 handle;
+        __u32 size;
 };
 #define DRM_IOCTL_ARMADA_GEM_CREATE \
         ARMADA_IOCTL(IOWR, GEM_CREATE, gem_create)
 
 struct drm_armada_gem_mmap {
-        uint32_t handle;
-        uint32_t pad;
-        uint64_t offset;
-        uint64_t size;
-        uint64_t addr;
+        __u32 handle;
+        __u32 pad;
+        __u64 offset;
+        __u64 size;
+        __u64 addr;
 };
 #define DRM_IOCTL_ARMADA_GEM_MMAP \
         ARMADA_IOCTL(IOWR, GEM_MMAP, gem_mmap)
 
 struct drm_armada_gem_pwrite {
-        uint64_t ptr;
-        uint32_t handle;
-        uint32_t offset;
-        uint32_t size;
+        __u64 ptr;
+        __u32 handle;
+        __u32 offset;
+        __u32 size;
 };
 #define DRM_IOCTL_ARMADA_GEM_PWRITE \
         ARMADA_IOCTL(IOW, GEM_PWRITE, gem_pwrite)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 7586c46f68bf..76c9101a7fc6 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -185,6 +185,8 @@ extern "C" {
 #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07
 /* add more to the end as needed */
 
+#define DRM_FORMAT_RESERVED           ((1ULL << 56) - 1)
+
 #define fourcc_mod_code(vendor, val) \
         ((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL))
 
@@ -197,6 +199,15 @@ extern "C" {
  */
 
 /*
+ * Invalid Modifier
+ *
+ * This modifier can be used as a sentinel to terminate the format modifiers
+ * list, or to initialize a variable with an invalid modifier. It might also be
+ * used to report an error back to userspace for certain APIs.
+ */
+#define DRM_FORMAT_MOD_INVALID  fourcc_mod_code(NONE, DRM_FORMAT_RESERVED)
+
+/*
  * Linear Layout
  *
  * Just plain linear layout. Note that this is different from no specifying any
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 403339f98a92..a2bb7161f020 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -712,6 +712,56 @@ struct drm_mode_atomic {
         __u64 user_data;
 };
 
+struct drm_format_modifier_blob {
+#define FORMAT_BLOB_CURRENT 1
+        /* Version of this blob format */
+        u32 version;
+
+        /* Flags */
+        u32 flags;
+
+        /* Number of fourcc formats supported */
+        u32 count_formats;
+
+        /* Where in this blob the formats exist (in bytes) */
+        u32 formats_offset;
+
+        /* Number of drm_format_modifiers */
+        u32 count_modifiers;
+
+        /* Where in this blob the modifiers exist (in bytes) */
+        u32 modifiers_offset;
+
+        /* u32 formats[] */
+        /* struct drm_format_modifier modifiers[] */
+};
+
+struct drm_format_modifier {
+        /* Bitmask of formats in get_plane format list this info applies to. The
+         * offset allows a sliding window of which 64 formats (bits).
+         *
+         * Some examples:
+         * In today's world with < 65 formats, and formats 0, and 2 are
+         * supported
+         * 0x0000000000000005
+         *                ^-offset = 0, formats = 5
+         *
+         * If the number formats grew to 128, and formats 98-102 are
+         * supported with the modifier:
+         *
+         * 0x0000003c00000000 0000000000000000
+         *                ^
+         *                |__offset = 64, formats = 0x3c00000000
+         *
+         */
+        __u64 formats;
+        __u32 offset;
+        __u32 pad;
+
+        /* The modifier that applies to the >get_plane format list bitmask. */
+        __u64 modifier;
+};
+
 /**
  * Create a new 'blob' data property, copying length bytes from data pointer,
  * and returning new blob ID.
diff --git a/include/uapi/drm/vc4_drm.h b/include/uapi/drm/vc4_drm.h
index 6ac4c5c014cb..551628e571f9 100644
--- a/include/uapi/drm/vc4_drm.h
+++ b/include/uapi/drm/vc4_drm.h
@@ -40,6 +40,7 @@ extern "C" {
 #define DRM_VC4_GET_PARAM                         0x07
 #define DRM_VC4_SET_TILING                        0x08
 #define DRM_VC4_GET_TILING                        0x09
+#define DRM_VC4_LABEL_BO                          0x0a
 
 #define DRM_IOCTL_VC4_SUBMIT_CL           DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
 #define DRM_IOCTL_VC4_WAIT_SEQNO          DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
@@ -51,6 +52,7 @@ extern "C" {
 #define DRM_IOCTL_VC4_GET_PARAM           DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param)
 #define DRM_IOCTL_VC4_SET_TILING          DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SET_TILING, struct drm_vc4_set_tiling)
 #define DRM_IOCTL_VC4_GET_TILING          DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_TILING, struct drm_vc4_get_tiling)
+#define DRM_IOCTL_VC4_LABEL_BO            DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_LABEL_BO, struct drm_vc4_label_bo)
 
 struct drm_vc4_submit_rcl_surface {
         __u32 hindex; /* Handle index, or ~0 if not present. */
@@ -311,6 +313,15 @@ struct drm_vc4_set_tiling {
         __u64 modifier;
 };
 
+/**
+ * struct drm_vc4_label_bo - Attach a name to a BO for debug purposes.
+ */
+struct drm_vc4_label_bo {
+        __u32 handle;
+        __u32 len;
+        __u64 name;
+};
+
 #if defined(__cplusplus)
 }
 #endif