diff options
author | Dave Jiang <dave.jiang@intel.com> | 2016-12-13 11:03:13 -0500 |
---|---|---|
committer | Jon Mason <jdmason@kudzu.us> | 2016-12-23 16:10:54 -0500 |
commit | 09e71a6f13445974fe9b70b6d4b68ac362cd68b6 (patch) | |
tree | dbfc1fc833d55b8b4ed612ef762c6c338507ebc9 | |
parent | 5c43c52d5fb6163120ae5d9a281c3b757ca6119c (diff) |
ntb: fix SKX NTB config space size register offsets
The offsets for the SZ registers are wrong. Updated.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reported-by: Sandeep Mann <sandeep@purestorage.com>
Tested-by: Zachary Ross <zacharyx.ross@intel.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
-rw-r--r-- | drivers/ntb/hw/intel/ntb_hw_intel.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.h b/drivers/ntb/hw/intel/ntb_hw_intel.h index 6e8c1824eb19..f2cf8a783f1e 100644 --- a/drivers/ntb/hw/intel/ntb_hw_intel.h +++ b/drivers/ntb/hw/intel/ntb_hw_intel.h | |||
@@ -152,10 +152,10 @@ | |||
152 | #define XEON_SPAD_COUNT 16 | 152 | #define XEON_SPAD_COUNT 16 |
153 | 153 | ||
154 | /* Intel Skylake Xeon hardware */ | 154 | /* Intel Skylake Xeon hardware */ |
155 | #define SKX_IMBAR1SZ_OFFSET 0x00d1 | 155 | #define SKX_IMBAR1SZ_OFFSET 0x00d0 |
156 | #define SKX_IMBAR2SZ_OFFSET 0x00d5 | 156 | #define SKX_IMBAR2SZ_OFFSET 0x00d1 |
157 | #define SKX_EMBAR1SZ_OFFSET 0x00d3 | 157 | #define SKX_EMBAR1SZ_OFFSET 0x00d2 |
158 | #define SKX_EMBAR2SZ_OFFSET 0x00d6 | 158 | #define SKX_EMBAR2SZ_OFFSET 0x00d3 |
159 | #define SKX_DEVCTRL_OFFSET 0x0098 | 159 | #define SKX_DEVCTRL_OFFSET 0x0098 |
160 | #define SKX_DEVSTS_OFFSET 0x009a | 160 | #define SKX_DEVSTS_OFFSET 0x009a |
161 | #define SKX_UNCERRSTS_OFFSET 0x014c | 161 | #define SKX_UNCERRSTS_OFFSET 0x014c |