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authorChristian König <christian.koenig@amd.com>2018-09-14 06:54:33 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-09-14 11:05:42 -0400
commit0957dc7097a3f462f6cedb45cf9b9785cc29e5bb (patch)
tree4a0637092e852cc62dc84fc88c9ac77c52fd41d6
parentfeabaad8aae0f6b1dae681c998572d2663f4a598 (diff)
drm/amdgpu: revert "stop using gart_start as offset for the GTT domain"
Turned out the commit is incomplete and since we remove using the AGP mapping from the GTT manager it is also not necessary any more. This reverts commit 22d8bfafcc12dfa17b91d2e8ae4e1898e782003a. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: James Zhu <James.Zhu@amd.com> Tested-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c7
2 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index c2539f6821c0..da7b1b92d9cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -143,8 +143,7 @@ static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
143 spin_unlock(&mgr->lock); 143 spin_unlock(&mgr->lock);
144 144
145 if (!r) 145 if (!r)
146 mem->start = node->node.start + 146 mem->start = node->node.start;
147 (adev->gmc.gart_start >> PAGE_SHIFT);
148 147
149 return r; 148 return r;
150} 149}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 8a158ee922f7..f12ae6b525b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -188,7 +188,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
188 case TTM_PL_TT: 188 case TTM_PL_TT:
189 /* GTT memory */ 189 /* GTT memory */
190 man->func = &amdgpu_gtt_mgr_func; 190 man->func = &amdgpu_gtt_mgr_func;
191 man->gpu_offset = 0; 191 man->gpu_offset = adev->gmc.gart_start;
192 man->available_caching = TTM_PL_MASK_CACHING; 192 man->available_caching = TTM_PL_MASK_CACHING;
193 man->default_caching = TTM_PL_FLAG_CACHED; 193 man->default_caching = TTM_PL_FLAG_CACHED;
194 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; 194 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
@@ -1060,7 +1060,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
1060 flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem); 1060 flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem);
1061 1061
1062 /* bind pages into GART page tables */ 1062 /* bind pages into GART page tables */
1063 gtt->offset = ((u64)bo_mem->start << PAGE_SHIFT) - adev->gmc.gart_start; 1063 gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
1064 r = amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages, 1064 r = amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages,
1065 ttm->pages, gtt->ttm.dma_address, flags); 1065 ttm->pages, gtt->ttm.dma_address, flags);
1066 1066
@@ -1112,8 +1112,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
1112 flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp); 1112 flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp);
1113 1113
1114 /* Bind pages */ 1114 /* Bind pages */
1115 gtt->offset = ((u64)tmp.start << PAGE_SHIFT) - 1115 gtt->offset = (u64)tmp.start << PAGE_SHIFT;
1116 adev->gmc.gart_start;
1117 r = amdgpu_ttm_gart_bind(adev, bo, flags); 1116 r = amdgpu_ttm_gart_bind(adev, bo, flags);
1118 if (unlikely(r)) { 1117 if (unlikely(r)) {
1119 ttm_bo_mem_put(bo, &tmp); 1118 ttm_bo_mem_put(bo, &tmp);