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authorDave Airlie <airlied@redhat.com>2017-02-16 21:04:09 -0500
committerDave Airlie <airlied@redhat.com>2017-02-16 21:04:09 -0500
commit08293fe8d3f297a0b092855d2e94b18f1c1300d5 (patch)
tree8b7897992d984ed949bb9a0fdf5c8f019e358ad9
parentdec13c8ba2f5be8839ba5505b57b22ab0d2a287e (diff)
parent1b30ab0c40a99da347c1ab83c30b485e03fe9f64 (diff)
Merge tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next
omapdrm fixes for v4.11 Fix regressions: - Planes might have been left enabled - Scaling checks did not use the new config Also limit downscaling decimation to prevent HW underflows. * tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: drm/omapdrm: dispc: Refuse x-decimation above 4 for all but 8-bit formats drm/omapdrm: Move commit_modeset_enables() before commit_planes() Revert "drm: omapdrm: Let the DRM core skip plane commit on inactive CRTCs"
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dispc.c19
-rw-r--r--drivers/gpu/drm/omapdrm/omap_crtc.c8
-rw-r--r--drivers/gpu/drm/omapdrm/omap_drv.c17
3 files changed, 35 insertions, 9 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 5554b72cf56a..d956e6266368 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -2506,6 +2506,25 @@ static int dispc_ovl_calc_scaling_44xx(unsigned long pclk, unsigned long lclk,
2506 return -EINVAL; 2506 return -EINVAL;
2507 } 2507 }
2508 2508
2509 if (*decim_x > 4 && color_mode != OMAP_DSS_COLOR_NV12) {
2510 /*
2511 * Let's disable all scaling that requires horizontal
2512 * decimation with higher factor than 4, until we have
2513 * better estimates of what we can and can not
2514 * do. However, NV12 color format appears to work Ok
2515 * with all decimation factors.
2516 *
2517 * When decimating horizontally by more that 4 the dss
2518 * is not able to fetch the data in burst mode. When
2519 * this happens it is hard to tell if there enough
2520 * bandwidth. Despite what theory says this appears to
2521 * be true also for 16-bit color formats.
2522 */
2523 DSSERR("Not enough bandwidth, too much downscaling (x-decimation factor %d > 4)", *decim_x);
2524
2525 return -EINVAL;
2526 }
2527
2509 *core_clk = dispc.feat->calc_core_clk(pclk, in_width, in_height, 2528 *core_clk = dispc.feat->calc_core_clk(pclk, in_width, in_height,
2510 out_width, out_height, mem_to_mem); 2529 out_width, out_height, mem_to_mem);
2511 return 0; 2530 return 0;
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index dd47dc191e6b..b68c70eb395f 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -410,13 +410,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
410 dispc_mgr_set_gamma(omap_crtc->channel, lut, length); 410 dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
411 } 411 }
412 412
413 /* 413 /* Only flush the CRTC if it is currently enabled. */
414 * Only flush the CRTC if it is currently enabled. CRTCs that require a
415 * mode set are disabled prior plane updates and enabled afterwards.
416 * They are thus not active (regardless of what their CRTC core state
417 * reports) and the DRM core could thus call this function even though
418 * the CRTC is currently disabled. Do nothing in that case.
419 */
420 if (!omap_crtc->enabled) 414 if (!omap_crtc->enabled)
421 return; 415 return;
422 416
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index afe8f05b927b..3f2554235225 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -96,9 +96,22 @@ static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
96 dispc_runtime_get(); 96 dispc_runtime_get();
97 97
98 drm_atomic_helper_commit_modeset_disables(dev, old_state); 98 drm_atomic_helper_commit_modeset_disables(dev, old_state);
99 drm_atomic_helper_commit_planes(dev, old_state, 99
100 DRM_PLANE_COMMIT_ACTIVE_ONLY); 100 /* With the current dss dispc implementation we have to enable
101 * the new modeset before we can commit planes. The dispc ovl
102 * configuration relies on the video mode configuration been
103 * written into the HW when the ovl configuration is
104 * calculated.
105 *
106 * This approach is not ideal because after a mode change the
107 * plane update is executed only after the first vblank
108 * interrupt. The dispc implementation should be fixed so that
109 * it is able use uncommitted drm state information.
110 */
101 drm_atomic_helper_commit_modeset_enables(dev, old_state); 111 drm_atomic_helper_commit_modeset_enables(dev, old_state);
112 omap_atomic_wait_for_completion(dev, old_state);
113
114 drm_atomic_helper_commit_planes(dev, old_state, 0);
102 115
103 omap_atomic_wait_for_completion(dev, old_state); 116 omap_atomic_wait_for_completion(dev, old_state);
104 117