diff options
author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2016-03-18 08:26:31 -0400 |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2016-04-04 12:41:43 -0400 |
commit | 080edf75d337d35faa6fc3df99342b10d2848d16 (patch) | |
tree | 122bebcd8b7caebd967f1ceb3ec373d2d950fb23 | |
parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff) |
dmaengine: hsu: set HSU_CH_MTSR to memory width
HSU_CH_MTSR register should be programmed to a minimum size to transfer. This
size on a memory side of the transfer. Program it accordingly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r-- | drivers/dma/hsu/hsu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c index eef145edb936..c7643e022578 100644 --- a/drivers/dma/hsu/hsu.c +++ b/drivers/dma/hsu/hsu.c | |||
@@ -64,10 +64,10 @@ static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc) | |||
64 | 64 | ||
65 | if (hsuc->direction == DMA_MEM_TO_DEV) { | 65 | if (hsuc->direction == DMA_MEM_TO_DEV) { |
66 | bsr = config->dst_maxburst; | 66 | bsr = config->dst_maxburst; |
67 | mtsr = config->dst_addr_width; | 67 | mtsr = config->src_addr_width; |
68 | } else if (hsuc->direction == DMA_DEV_TO_MEM) { | 68 | } else if (hsuc->direction == DMA_DEV_TO_MEM) { |
69 | bsr = config->src_maxburst; | 69 | bsr = config->src_maxburst; |
70 | mtsr = config->src_addr_width; | 70 | mtsr = config->dst_addr_width; |
71 | } | 71 | } |
72 | 72 | ||
73 | hsu_chan_disable(hsuc); | 73 | hsu_chan_disable(hsuc); |