aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorCharles Keepax <ckeepax@opensource.cirrus.com>2019-06-26 09:33:35 -0400
committerLee Jones <lee.jones@linaro.org>2019-07-02 07:11:31 -0400
commit0772a34bb8a12fcc245074e0f76e96cba2c9a434 (patch)
treeca709b559d1ea95f7995709e8379ea23a98e9360
parent02f36911c1b41fcd8779fa0c135aab0554333fa5 (diff)
mfd: madera: Remove some unused registers and fix some defaults
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r--drivers/mfd/cs47l15-tables.c2
-rw-r--r--drivers/mfd/cs47l35-tables.c54
-rw-r--r--drivers/mfd/cs47l85-tables.c122
-rw-r--r--drivers/mfd/cs47l90-tables.c76
-rw-r--r--drivers/mfd/cs47l92-tables.c1
-rw-r--r--include/linux/mfd/madera/registers.h80
6 files changed, 6 insertions, 329 deletions
diff --git a/drivers/mfd/cs47l15-tables.c b/drivers/mfd/cs47l15-tables.c
index 1b4f6f79eac2..73db8d03b531 100644
--- a/drivers/mfd/cs47l15-tables.c
+++ b/drivers/mfd/cs47l15-tables.c
@@ -88,7 +88,6 @@ static const struct reg_default cs47l15_reg_default[] = {
88 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ 88 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
89 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ 89 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
90 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ 90 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
91 { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
92 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ 91 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
93 { 0x0000017a, 0x2906 }, /* R378 (0x17A) - FLL1 EFS 2 */ 92 { 0x0000017a, 0x2906 }, /* R378 (0x17A) - FLL1 EFS 2 */
94 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ 93 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */
@@ -746,7 +745,6 @@ static bool cs47l15_16bit_readable_register(struct device *dev,
746 case MADERA_FLL1_CONTROL_1 ... MADERA_FLL1_CONTROL_6: 745 case MADERA_FLL1_CONTROL_1 ... MADERA_FLL1_CONTROL_6:
747 case MADERA_FLL1_CONTROL_7: 746 case MADERA_FLL1_CONTROL_7:
748 case MADERA_FLL1_EFS_2: 747 case MADERA_FLL1_EFS_2:
749 case MADERA_FLL1_LOOP_FILTER_TEST_1:
750 case MADERA_FLL1_SYNCHRONISER_1 ... MADERA_FLL1_SYNCHRONISER_7: 748 case MADERA_FLL1_SYNCHRONISER_1 ... MADERA_FLL1_SYNCHRONISER_7:
751 case MADERA_FLL1_SPREAD_SPECTRUM: 749 case MADERA_FLL1_SPREAD_SPECTRUM:
752 case MADERA_FLL1_GPIO_CLOCK: 750 case MADERA_FLL1_GPIO_CLOCK:
diff --git a/drivers/mfd/cs47l35-tables.c b/drivers/mfd/cs47l35-tables.c
index 338b825127f1..fe838cbc2a7e 100644
--- a/drivers/mfd/cs47l35-tables.c
+++ b/drivers/mfd/cs47l35-tables.c
@@ -109,9 +109,8 @@ static const struct reg_default cs47l35_reg_default[] = {
109 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ 109 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
110 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ 110 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
111 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ 111 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
112 { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
113 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ 112 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
114 { 0x0000017a, 0x0b06 }, /* R378 (0x17a) - FLL1 EFS2 */ 113 { 0x0000017a, 0x2906 }, /* R378 (0x17a) - FLL1 EFS2 */
115 { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */ 114 { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */
116 { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */ 115 { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */
117 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */ 116 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */
@@ -174,9 +173,6 @@ static const struct reg_default cs47l35_reg_default[] = {
174 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ 173 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */
175 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ 174 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */
176 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ 175 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */
177 { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */
178 { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */
179 { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - eDRE Manual */
180 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ 176 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
181 { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */ 177 { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */
182 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ 178 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
@@ -720,28 +716,6 @@ static const struct reg_default cs47l35_reg_default[] = {
720 { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ 716 { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */
721 { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ 717 { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */
722 { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ 718 { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */
723 { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */
724 { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */
725 { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */
726 { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */
727 { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */
728 { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */
729 { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */
730 { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */
731 { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */
732 { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */
733 { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 4L 1 */
734 { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 4L 2 */
735 { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 4L 3 */
736 { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 4L 4 */
737 { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 5L 1 */
738 { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 5L 2 */
739 { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 5L 3 */
740 { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 5L 4 */
741 { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 5R 1 */
742 { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */
743 { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */
744 { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */
745 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ 719 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */
746 { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ 720 { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */
747 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ 721 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */
@@ -892,7 +866,6 @@ static bool cs47l35_16bit_readable_register(struct device *dev,
892 case MADERA_FLL1_CONTROL_6: 866 case MADERA_FLL1_CONTROL_6:
893 case MADERA_FLL1_CONTROL_7: 867 case MADERA_FLL1_CONTROL_7:
894 case MADERA_FLL1_EFS_2: 868 case MADERA_FLL1_EFS_2:
895 case MADERA_FLL1_LOOP_FILTER_TEST_1:
896 case CS47L35_FLL1_SYNCHRONISER_1: 869 case CS47L35_FLL1_SYNCHRONISER_1:
897 case CS47L35_FLL1_SYNCHRONISER_2: 870 case CS47L35_FLL1_SYNCHRONISER_2:
898 case CS47L35_FLL1_SYNCHRONISER_3: 871 case CS47L35_FLL1_SYNCHRONISER_3:
@@ -967,9 +940,6 @@ static bool cs47l35_16bit_readable_register(struct device *dev,
967 case MADERA_OUTPUT_PATH_CONFIG_5R: 940 case MADERA_OUTPUT_PATH_CONFIG_5R:
968 case MADERA_DAC_DIGITAL_VOLUME_5R: 941 case MADERA_DAC_DIGITAL_VOLUME_5R:
969 case MADERA_NOISE_GATE_SELECT_5R: 942 case MADERA_NOISE_GATE_SELECT_5R:
970 case MADERA_DRE_ENABLE:
971 case MADERA_EDRE_ENABLE:
972 case MADERA_EDRE_MANUAL:
973 case MADERA_DAC_AEC_CONTROL_1: 943 case MADERA_DAC_AEC_CONTROL_1:
974 case MADERA_DAC_AEC_CONTROL_2: 944 case MADERA_DAC_AEC_CONTROL_2:
975 case MADERA_NOISE_GATE_CONTROL: 945 case MADERA_NOISE_GATE_CONTROL:
@@ -1439,28 +1409,6 @@ static bool cs47l35_16bit_readable_register(struct device *dev,
1439 case MADERA_ISRC_2_CTRL_1: 1409 case MADERA_ISRC_2_CTRL_1:
1440 case MADERA_ISRC_2_CTRL_2: 1410 case MADERA_ISRC_2_CTRL_2:
1441 case MADERA_ISRC_2_CTRL_3: 1411 case MADERA_ISRC_2_CTRL_3:
1442 case MADERA_DAC_COMP_1:
1443 case MADERA_DAC_COMP_2:
1444 case MADERA_FRF_COEFFICIENT_1L_1:
1445 case MADERA_FRF_COEFFICIENT_1L_2:
1446 case MADERA_FRF_COEFFICIENT_1L_3:
1447 case MADERA_FRF_COEFFICIENT_1L_4:
1448 case MADERA_FRF_COEFFICIENT_1R_1:
1449 case MADERA_FRF_COEFFICIENT_1R_2:
1450 case MADERA_FRF_COEFFICIENT_1R_3:
1451 case MADERA_FRF_COEFFICIENT_1R_4:
1452 case CS47L35_FRF_COEFFICIENT_4L_1:
1453 case CS47L35_FRF_COEFFICIENT_4L_2:
1454 case CS47L35_FRF_COEFFICIENT_4L_3:
1455 case CS47L35_FRF_COEFFICIENT_4L_4:
1456 case CS47L35_FRF_COEFFICIENT_5L_1:
1457 case CS47L35_FRF_COEFFICIENT_5L_2:
1458 case CS47L35_FRF_COEFFICIENT_5L_3:
1459 case CS47L35_FRF_COEFFICIENT_5L_4:
1460 case CS47L35_FRF_COEFFICIENT_5R_1:
1461 case CS47L35_FRF_COEFFICIENT_5R_2:
1462 case CS47L35_FRF_COEFFICIENT_5R_3:
1463 case CS47L35_FRF_COEFFICIENT_5R_4:
1464 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2: 1412 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2:
1465 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: 1413 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
1466 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: 1414 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33:
diff --git a/drivers/mfd/cs47l85-tables.c b/drivers/mfd/cs47l85-tables.c
index 43803145d8e5..d0198b5e86ba 100644
--- a/drivers/mfd/cs47l85-tables.c
+++ b/drivers/mfd/cs47l85-tables.c
@@ -402,7 +402,6 @@ static const struct reg_default cs47l85_reg_default[] = {
402 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ 402 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
403 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ 403 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
404 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ 404 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
405 { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
406 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ 405 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
407 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ 406 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */
408 { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ 407 { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */
@@ -419,7 +418,6 @@ static const struct reg_default cs47l85_reg_default[] = {
419 { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ 418 { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */
420 { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */ 419 { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */
421 { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ 420 { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */
422 { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */
423 { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ 421 { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */
424 { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */ 422 { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */
425 { 0x000001a2, 0x0000 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */ 423 { 0x000001a2, 0x0000 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */
@@ -436,7 +434,6 @@ static const struct reg_default cs47l85_reg_default[] = {
436 { 0x000001b4, 0x007d }, /* R436 (0x1b4) - FLL3 Control 4 */ 434 { 0x000001b4, 0x007d }, /* R436 (0x1b4) - FLL3 Control 4 */
437 { 0x000001b5, 0x0000 }, /* R437 (0x1b5) - FLL3 Control 5 */ 435 { 0x000001b5, 0x0000 }, /* R437 (0x1b5) - FLL3 Control 5 */
438 { 0x000001b6, 0x0000 }, /* R438 (0x1b6) - FLL3 Control 6 */ 436 { 0x000001b6, 0x0000 }, /* R438 (0x1b6) - FLL3 Control 6 */
439 { 0x000001b7, 0x0281 }, /* R439 (0x1b7) - FLL3 Loop Filter Test 1 */
440 { 0x000001b9, 0x0000 }, /* R441 (0x1b9) - FLL3 Control 7 */ 437 { 0x000001b9, 0x0000 }, /* R441 (0x1b9) - FLL3 Control 7 */
441 { 0x000001c1, 0x0000 }, /* R449 (0x1c1) - FLL3 Synchroniser 1 */ 438 { 0x000001c1, 0x0000 }, /* R449 (0x1c1) - FLL3 Synchroniser 1 */
442 { 0x000001c2, 0x0000 }, /* R450 (0x1c2) - FLL3 Synchroniser 2 */ 439 { 0x000001c2, 0x0000 }, /* R450 (0x1c2) - FLL3 Synchroniser 2 */
@@ -546,9 +543,6 @@ static const struct reg_default cs47l85_reg_default[] = {
546 { 0x0000043c, 0x0000 }, /* R1084 (0x43c) - Output Path Config 6R */ 543 { 0x0000043c, 0x0000 }, /* R1084 (0x43c) - Output Path Config 6R */
547 { 0x0000043d, 0x0180 }, /* R1085 (0x43d) - DAC Digital Volume 6R */ 544 { 0x0000043d, 0x0180 }, /* R1085 (0x43d) - DAC Digital Volume 6R */
548 { 0x0000043f, 0x0800 }, /* R1087 (0x43f) - Noise Gate Select 6R */ 545 { 0x0000043f, 0x0800 }, /* R1087 (0x43f) - Noise Gate Select 6R */
549 { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */
550 { 0x00000448, 0x003f }, /* R1096 (0x448) - EDRE Enable */
551 { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - EDRE Manual */
552 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ 546 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
553 { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */ 547 { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */
554 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ 548 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
@@ -556,7 +550,7 @@ static const struct reg_default cs47l85_reg_default[] = {
556 { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ 550 { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */
557 { 0x00000492, 0x0069 }, /* R1170 (0x492) - PDM SPK2 CTRL 1 */ 551 { 0x00000492, 0x0069 }, /* R1170 (0x492) - PDM SPK2 CTRL 1 */
558 { 0x00000493, 0x0000 }, /* R1171 (0x493) - PDM SPK2 CTRL 2 */ 552 { 0x00000493, 0x0000 }, /* R1171 (0x493) - PDM SPK2 CTRL 2 */
559 { 0x000004a0, 0x3210 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ 553 { 0x000004a0, 0x3280 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */
560 { 0x000004a1, 0x3200 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */ 554 { 0x000004a1, 0x3200 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */
561 { 0x000004a2, 0x3200 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */ 555 { 0x000004a2, 0x3200 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */
562 { 0x000004a8, 0x7020 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */ 556 { 0x000004a8, 0x7020 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */
@@ -1365,11 +1359,11 @@ static const struct reg_default cs47l85_reg_default[] = {
1365 { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */ 1359 { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */
1366 { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */ 1360 { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */
1367 { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */ 1361 { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */
1368 { 0x00000e88, 0x0933 }, /* R3720 (0xe88) - DRC2 ctrl1 */ 1362 { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */
1369 { 0x00000e89, 0x0018 }, /* R3721 (0xe89) - DRC2 ctrl2 */ 1363 { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */
1370 { 0x00000e8a, 0x0000 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ 1364 { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */
1371 { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */ 1365 { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */
1372 { 0x00000e8c, 0x0040 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ 1366 { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */
1373 { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */ 1367 { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */
1374 { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */ 1368 { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */
1375 { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */ 1369 { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */
@@ -1577,56 +1571,6 @@ static const struct reg_default cs47l85_reg_default[] = {
1577 { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */ 1571 { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */
1578 { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */ 1572 { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */
1579 { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */ 1573 { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */
1580 { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */
1581 { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */
1582 { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */
1583 { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */
1584 { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */
1585 { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */
1586 { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */
1587 { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */
1588 { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */
1589 { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */
1590 { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */
1591 { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */
1592 { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */
1593 { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */
1594 { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */
1595 { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */
1596 { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */
1597 { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */
1598 { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */
1599 { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */
1600 { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */
1601 { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */
1602 { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */
1603 { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */
1604 { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */
1605 { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */
1606 { 0x000013e0, 0x0000 }, /* R5088 (0x13e0) - FRF Coefficient 4L 1 */
1607 { 0x000013e1, 0x0000 }, /* R5089 (0x13e1) - FRF Coefficient 4L 2 */
1608 { 0x000013e2, 0x0000 }, /* R5090 (0x13e2) - FRF Coefficient 4L 3 */
1609 { 0x000013e3, 0x0000 }, /* R5091 (0x13e3) - FRF Coefficient 4L 4 */
1610 { 0x000013f0, 0x0000 }, /* R5104 (0x13f0) - FRF Coefficient 4R 1 */
1611 { 0x000013f1, 0x0000 }, /* R5105 (0x13f1) - FRF Coefficient 4R 2 */
1612 { 0x000013f2, 0x0000 }, /* R5106 (0x13f2) - FRF Coefficient 4R 3 */
1613 { 0x000013f3, 0x0000 }, /* R5107 (0x13f3) - FRF Coefficient 4R 4 */
1614 { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */
1615 { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */
1616 { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */
1617 { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */
1618 { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */
1619 { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */
1620 { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */
1621 { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */
1622 { 0x00001420, 0x0000 }, /* R5152 (0x1420) - FRF Coefficient 6L 1 */
1623 { 0x00001421, 0x0000 }, /* R5153 (0x1421) - FRF Coefficient 6L 2 */
1624 { 0x00001422, 0x0000 }, /* R5154 (0x1422) - FRF Coefficient 6L 3 */
1625 { 0x00001423, 0x0000 }, /* R5155 (0x1423) - FRF Coefficient 6L 4 */
1626 { 0x00001430, 0x0000 }, /* R5168 (0x1430) - FRF Coefficient 6R 1 */
1627 { 0x00001431, 0x0000 }, /* R5169 (0x1431) - FRF Coefficient 6R 2 */
1628 { 0x00001432, 0x0000 }, /* R5170 (0x1432) - FRF Coefficient 6R 3 */
1629 { 0x00001433, 0x0000 }, /* R5171 (0x1433) - FRF Coefficient 6R 4 */
1630 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ 1574 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */
1631 { 0x00001701, 0xe000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ 1575 { 0x00001701, 0xe000 }, /* R5889 (0x1701) - GPIO1 Control 2 */
1632 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ 1576 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */
@@ -1845,7 +1789,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev,
1845 case MADERA_FLL1_CONTROL_5: 1789 case MADERA_FLL1_CONTROL_5:
1846 case MADERA_FLL1_CONTROL_6: 1790 case MADERA_FLL1_CONTROL_6:
1847 case MADERA_FLL1_CONTROL_7: 1791 case MADERA_FLL1_CONTROL_7:
1848 case MADERA_FLL1_LOOP_FILTER_TEST_1:
1849 case MADERA_FLL1_SYNCHRONISER_1: 1792 case MADERA_FLL1_SYNCHRONISER_1:
1850 case MADERA_FLL1_SYNCHRONISER_2: 1793 case MADERA_FLL1_SYNCHRONISER_2:
1851 case MADERA_FLL1_SYNCHRONISER_3: 1794 case MADERA_FLL1_SYNCHRONISER_3:
@@ -1862,7 +1805,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev,
1862 case MADERA_FLL2_CONTROL_5: 1805 case MADERA_FLL2_CONTROL_5:
1863 case MADERA_FLL2_CONTROL_6: 1806 case MADERA_FLL2_CONTROL_6:
1864 case MADERA_FLL2_CONTROL_7: 1807 case MADERA_FLL2_CONTROL_7:
1865 case MADERA_FLL2_LOOP_FILTER_TEST_1:
1866 case MADERA_FLL2_SYNCHRONISER_1: 1808 case MADERA_FLL2_SYNCHRONISER_1:
1867 case MADERA_FLL2_SYNCHRONISER_2: 1809 case MADERA_FLL2_SYNCHRONISER_2:
1868 case MADERA_FLL2_SYNCHRONISER_3: 1810 case MADERA_FLL2_SYNCHRONISER_3:
@@ -1879,7 +1821,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev,
1879 case MADERA_FLL3_CONTROL_5: 1821 case MADERA_FLL3_CONTROL_5:
1880 case MADERA_FLL3_CONTROL_6: 1822 case MADERA_FLL3_CONTROL_6:
1881 case MADERA_FLL3_CONTROL_7: 1823 case MADERA_FLL3_CONTROL_7:
1882 case MADERA_FLL3_LOOP_FILTER_TEST_1:
1883 case MADERA_FLL3_SYNCHRONISER_1: 1824 case MADERA_FLL3_SYNCHRONISER_1:
1884 case MADERA_FLL3_SYNCHRONISER_2: 1825 case MADERA_FLL3_SYNCHRONISER_2:
1885 case MADERA_FLL3_SYNCHRONISER_3: 1826 case MADERA_FLL3_SYNCHRONISER_3:
@@ -2004,9 +1945,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev,
2004 case MADERA_OUTPUT_PATH_CONFIG_6R: 1945 case MADERA_OUTPUT_PATH_CONFIG_6R:
2005 case MADERA_DAC_DIGITAL_VOLUME_6R: 1946 case MADERA_DAC_DIGITAL_VOLUME_6R:
2006 case MADERA_NOISE_GATE_SELECT_6R: 1947 case MADERA_NOISE_GATE_SELECT_6R:
2007 case MADERA_DRE_ENABLE:
2008 case MADERA_EDRE_ENABLE:
2009 case MADERA_EDRE_MANUAL:
2010 case MADERA_DAC_AEC_CONTROL_1: 1948 case MADERA_DAC_AEC_CONTROL_1:
2011 case MADERA_DAC_AEC_CONTROL_2: 1949 case MADERA_DAC_AEC_CONTROL_2:
2012 case MADERA_NOISE_GATE_CONTROL: 1950 case MADERA_NOISE_GATE_CONTROL:
@@ -2792,56 +2730,6 @@ static bool cs47l85_16bit_readable_register(struct device *dev,
2792 case MADERA_FCR_FILTER_CONTROL: 2730 case MADERA_FCR_FILTER_CONTROL:
2793 case MADERA_FCR_ADC_REFORMATTER_CONTROL: 2731 case MADERA_FCR_ADC_REFORMATTER_CONTROL:
2794 case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END: 2732 case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END:
2795 case MADERA_DAC_COMP_1:
2796 case MADERA_DAC_COMP_2:
2797 case MADERA_FRF_COEFFICIENT_1L_1:
2798 case MADERA_FRF_COEFFICIENT_1L_2:
2799 case MADERA_FRF_COEFFICIENT_1L_3:
2800 case MADERA_FRF_COEFFICIENT_1L_4:
2801 case MADERA_FRF_COEFFICIENT_1R_1:
2802 case MADERA_FRF_COEFFICIENT_1R_2:
2803 case MADERA_FRF_COEFFICIENT_1R_3:
2804 case MADERA_FRF_COEFFICIENT_1R_4:
2805 case MADERA_FRF_COEFFICIENT_2L_1:
2806 case MADERA_FRF_COEFFICIENT_2L_2:
2807 case MADERA_FRF_COEFFICIENT_2L_3:
2808 case MADERA_FRF_COEFFICIENT_2L_4:
2809 case MADERA_FRF_COEFFICIENT_2R_1:
2810 case MADERA_FRF_COEFFICIENT_2R_2:
2811 case MADERA_FRF_COEFFICIENT_2R_3:
2812 case MADERA_FRF_COEFFICIENT_2R_4:
2813 case MADERA_FRF_COEFFICIENT_3L_1:
2814 case MADERA_FRF_COEFFICIENT_3L_2:
2815 case MADERA_FRF_COEFFICIENT_3L_3:
2816 case MADERA_FRF_COEFFICIENT_3L_4:
2817 case MADERA_FRF_COEFFICIENT_3R_1:
2818 case MADERA_FRF_COEFFICIENT_3R_2:
2819 case MADERA_FRF_COEFFICIENT_3R_3:
2820 case MADERA_FRF_COEFFICIENT_3R_4:
2821 case MADERA_FRF_COEFFICIENT_4L_1:
2822 case MADERA_FRF_COEFFICIENT_4L_2:
2823 case MADERA_FRF_COEFFICIENT_4L_3:
2824 case MADERA_FRF_COEFFICIENT_4L_4:
2825 case MADERA_FRF_COEFFICIENT_4R_1:
2826 case MADERA_FRF_COEFFICIENT_4R_2:
2827 case MADERA_FRF_COEFFICIENT_4R_3:
2828 case MADERA_FRF_COEFFICIENT_4R_4:
2829 case MADERA_FRF_COEFFICIENT_5L_1:
2830 case MADERA_FRF_COEFFICIENT_5L_2:
2831 case MADERA_FRF_COEFFICIENT_5L_3:
2832 case MADERA_FRF_COEFFICIENT_5L_4:
2833 case MADERA_FRF_COEFFICIENT_5R_1:
2834 case MADERA_FRF_COEFFICIENT_5R_2:
2835 case MADERA_FRF_COEFFICIENT_5R_3:
2836 case MADERA_FRF_COEFFICIENT_5R_4:
2837 case MADERA_FRF_COEFFICIENT_6L_1:
2838 case MADERA_FRF_COEFFICIENT_6L_2:
2839 case MADERA_FRF_COEFFICIENT_6L_3:
2840 case MADERA_FRF_COEFFICIENT_6L_4:
2841 case MADERA_FRF_COEFFICIENT_6R_1:
2842 case MADERA_FRF_COEFFICIENT_6R_2:
2843 case MADERA_FRF_COEFFICIENT_6R_3:
2844 case MADERA_FRF_COEFFICIENT_6R_4:
2845 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO40_CTRL_2: 2733 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO40_CTRL_2:
2846 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: 2734 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
2847 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: 2735 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33:
diff --git a/drivers/mfd/cs47l90-tables.c b/drivers/mfd/cs47l90-tables.c
index c040d3d7232a..2c761fc241f3 100644
--- a/drivers/mfd/cs47l90-tables.c
+++ b/drivers/mfd/cs47l90-tables.c
@@ -119,7 +119,6 @@ static const struct reg_default cs47l90_reg_default[] = {
119 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ 119 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
120 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ 120 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
121 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ 121 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
122 { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
123 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ 122 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
124 { 0x0000017a, 0x2906 }, /* R377 (0x17a) - FLL1 Efs 2 */ 123 { 0x0000017a, 0x2906 }, /* R377 (0x17a) - FLL1 Efs 2 */
125 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ 124 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */
@@ -137,7 +136,6 @@ static const struct reg_default cs47l90_reg_default[] = {
137 { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ 136 { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */
138 { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */ 137 { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */
139 { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ 138 { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */
140 { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */
141 { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ 139 { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */
142 { 0x0000019a, 0x2906 }, /* R410 (0x19a) - FLL2 Efs 2 */ 140 { 0x0000019a, 0x2906 }, /* R410 (0x19a) - FLL2 Efs 2 */
143 { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */ 141 { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */
@@ -260,8 +258,6 @@ static const struct reg_default cs47l90_reg_default[] = {
260 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ 258 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */
261 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ 259 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */
262 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ 260 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */
263 { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */
264 { 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */
265 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ 261 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
266 { 0x00000451, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 2 */ 262 { 0x00000451, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 2 */
267 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ 263 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
@@ -1262,40 +1258,6 @@ static const struct reg_default cs47l90_reg_default[] = {
1262 { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */ 1258 { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */
1263 { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */ 1259 { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */
1264 { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */ 1260 { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */
1265 { 0x00001300, 0x050E }, /* R4864 (0x1300) - DAC Comp 1 */
1266 { 0x00001302, 0x0101 }, /* R4866 (0x1302) - DAC Comp 2 */
1267 { 0x00001380, 0x0425 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */
1268 { 0x00001381, 0xF6D8 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */
1269 { 0x00001382, 0x0632 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */
1270 { 0x00001383, 0xFEC8 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */
1271 { 0x00001390, 0x042F }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */
1272 { 0x00001391, 0xF6CA }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */
1273 { 0x00001392, 0x0637 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */
1274 { 0x00001393, 0xFEC8 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */
1275 { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */
1276 { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */
1277 { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */
1278 { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */
1279 { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */
1280 { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */
1281 { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */
1282 { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */
1283 { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */
1284 { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */
1285 { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */
1286 { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */
1287 { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */
1288 { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */
1289 { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */
1290 { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */
1291 { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */
1292 { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */
1293 { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */
1294 { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */
1295 { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */
1296 { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */
1297 { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */
1298 { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */
1299 { 0x00001480, 0x0000 }, /* R5248 (0x1480) - DFC1_CTRL */ 1261 { 0x00001480, 0x0000 }, /* R5248 (0x1480) - DFC1_CTRL */
1300 { 0x00001482, 0x1f00 }, /* R5250 (0x1482) - DFC1_RX */ 1262 { 0x00001482, 0x1f00 }, /* R5250 (0x1482) - DFC1_RX */
1301 { 0x00001484, 0x1f00 }, /* R5252 (0x1486) - DFC1_TX */ 1263 { 0x00001484, 0x1f00 }, /* R5252 (0x1486) - DFC1_TX */
@@ -1535,7 +1497,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev,
1535 case MADERA_FLL1_CONTROL_6: 1497 case MADERA_FLL1_CONTROL_6:
1536 case MADERA_FLL1_CONTROL_7: 1498 case MADERA_FLL1_CONTROL_7:
1537 case MADERA_FLL1_EFS_2: 1499 case MADERA_FLL1_EFS_2:
1538 case MADERA_FLL1_LOOP_FILTER_TEST_1:
1539 case MADERA_FLL1_SYNCHRONISER_1: 1500 case MADERA_FLL1_SYNCHRONISER_1:
1540 case MADERA_FLL1_SYNCHRONISER_2: 1501 case MADERA_FLL1_SYNCHRONISER_2:
1541 case MADERA_FLL1_SYNCHRONISER_3: 1502 case MADERA_FLL1_SYNCHRONISER_3:
@@ -1553,7 +1514,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev,
1553 case MADERA_FLL2_CONTROL_6: 1514 case MADERA_FLL2_CONTROL_6:
1554 case MADERA_FLL2_CONTROL_7: 1515 case MADERA_FLL2_CONTROL_7:
1555 case MADERA_FLL2_EFS_2: 1516 case MADERA_FLL2_EFS_2:
1556 case MADERA_FLL2_LOOP_FILTER_TEST_1:
1557 case MADERA_FLL2_SYNCHRONISER_1: 1517 case MADERA_FLL2_SYNCHRONISER_1:
1558 case MADERA_FLL2_SYNCHRONISER_2: 1518 case MADERA_FLL2_SYNCHRONISER_2:
1559 case MADERA_FLL2_SYNCHRONISER_3: 1519 case MADERA_FLL2_SYNCHRONISER_3:
@@ -1690,8 +1650,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev,
1690 case MADERA_OUTPUT_PATH_CONFIG_5R: 1650 case MADERA_OUTPUT_PATH_CONFIG_5R:
1691 case MADERA_DAC_DIGITAL_VOLUME_5R: 1651 case MADERA_DAC_DIGITAL_VOLUME_5R:
1692 case MADERA_NOISE_GATE_SELECT_5R: 1652 case MADERA_NOISE_GATE_SELECT_5R:
1693 case MADERA_DRE_ENABLE:
1694 case MADERA_EDRE_ENABLE:
1695 case MADERA_DAC_AEC_CONTROL_1: 1653 case MADERA_DAC_AEC_CONTROL_1:
1696 case MADERA_DAC_AEC_CONTROL_2: 1654 case MADERA_DAC_AEC_CONTROL_2:
1697 case MADERA_NOISE_GATE_CONTROL: 1655 case MADERA_NOISE_GATE_CONTROL:
@@ -2449,40 +2407,6 @@ static bool cs47l90_16bit_readable_register(struct device *dev,
2449 case MADERA_FCR_FILTER_CONTROL: 2407 case MADERA_FCR_FILTER_CONTROL:
2450 case MADERA_FCR_ADC_REFORMATTER_CONTROL: 2408 case MADERA_FCR_ADC_REFORMATTER_CONTROL:
2451 case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END: 2409 case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END:
2452 case MADERA_DAC_COMP_1:
2453 case MADERA_DAC_COMP_2:
2454 case MADERA_FRF_COEFFICIENT_1L_1:
2455 case MADERA_FRF_COEFFICIENT_1L_2:
2456 case MADERA_FRF_COEFFICIENT_1L_3:
2457 case MADERA_FRF_COEFFICIENT_1L_4:
2458 case MADERA_FRF_COEFFICIENT_1R_1:
2459 case MADERA_FRF_COEFFICIENT_1R_2:
2460 case MADERA_FRF_COEFFICIENT_1R_3:
2461 case MADERA_FRF_COEFFICIENT_1R_4:
2462 case MADERA_FRF_COEFFICIENT_2L_1:
2463 case MADERA_FRF_COEFFICIENT_2L_2:
2464 case MADERA_FRF_COEFFICIENT_2L_3:
2465 case MADERA_FRF_COEFFICIENT_2L_4:
2466 case MADERA_FRF_COEFFICIENT_2R_1:
2467 case MADERA_FRF_COEFFICIENT_2R_2:
2468 case MADERA_FRF_COEFFICIENT_2R_3:
2469 case MADERA_FRF_COEFFICIENT_2R_4:
2470 case MADERA_FRF_COEFFICIENT_3L_1:
2471 case MADERA_FRF_COEFFICIENT_3L_2:
2472 case MADERA_FRF_COEFFICIENT_3L_3:
2473 case MADERA_FRF_COEFFICIENT_3L_4:
2474 case MADERA_FRF_COEFFICIENT_3R_1:
2475 case MADERA_FRF_COEFFICIENT_3R_2:
2476 case MADERA_FRF_COEFFICIENT_3R_3:
2477 case MADERA_FRF_COEFFICIENT_3R_4:
2478 case MADERA_FRF_COEFFICIENT_5L_1:
2479 case MADERA_FRF_COEFFICIENT_5L_2:
2480 case MADERA_FRF_COEFFICIENT_5L_3:
2481 case MADERA_FRF_COEFFICIENT_5L_4:
2482 case MADERA_FRF_COEFFICIENT_5R_1:
2483 case MADERA_FRF_COEFFICIENT_5R_2:
2484 case MADERA_FRF_COEFFICIENT_5R_3:
2485 case MADERA_FRF_COEFFICIENT_5R_4:
2486 case MADERA_DFC1_CTRL: 2410 case MADERA_DFC1_CTRL:
2487 case MADERA_DFC1_RX: 2411 case MADERA_DFC1_RX:
2488 case MADERA_DFC1_TX: 2412 case MADERA_DFC1_TX:
diff --git a/drivers/mfd/cs47l92-tables.c b/drivers/mfd/cs47l92-tables.c
index 3dc1fefe68f5..c8a234381350 100644
--- a/drivers/mfd/cs47l92-tables.c
+++ b/drivers/mfd/cs47l92-tables.c
@@ -1063,7 +1063,6 @@ static const struct reg_default cs47l92_reg_default[] = {
1063 { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */ 1063 { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */
1064 { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */ 1064 { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */
1065 { 0x00001860, 0x0001 }, /* R6240 (0x1860) - IRQ1 Mask 33 */ 1065 { 0x00001860, 0x0001 }, /* R6240 (0x1860) - IRQ1 Mask 33 */
1066 { 0x00001948, 0x031f }, /* R6472 (0x1948) - IRQ2 Mask 9 */
1067 { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ 1066 { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */
1068 { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 Ctrl */ 1067 { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 Ctrl */
1069}; 1068};
diff --git a/include/linux/mfd/madera/registers.h b/include/linux/mfd/madera/registers.h
index 6439c0282ac6..53c2377b54b2 100644
--- a/include/linux/mfd/madera/registers.h
+++ b/include/linux/mfd/madera/registers.h
@@ -76,9 +76,7 @@
76#define MADERA_FLL1_CONTROL_4 0x174 76#define MADERA_FLL1_CONTROL_4 0x174
77#define MADERA_FLL1_CONTROL_5 0x175 77#define MADERA_FLL1_CONTROL_5 0x175
78#define MADERA_FLL1_CONTROL_6 0x176 78#define MADERA_FLL1_CONTROL_6 0x176
79#define MADERA_FLL1_LOOP_FILTER_TEST_1 0x177
80#define CS47L92_FLL1_CONTROL_7 0x177 79#define CS47L92_FLL1_CONTROL_7 0x177
81#define MADERA_FLL1_NCO_TEST_0 0x178
82#define CS47L92_FLL1_CONTROL_8 0x178 80#define CS47L92_FLL1_CONTROL_8 0x178
83#define MADERA_FLL1_CONTROL_7 0x179 81#define MADERA_FLL1_CONTROL_7 0x179
84#define CS47L92_FLL1_CONTROL_9 0x179 82#define CS47L92_FLL1_CONTROL_9 0x179
@@ -111,9 +109,7 @@
111#define MADERA_FLL2_CONTROL_4 0x194 109#define MADERA_FLL2_CONTROL_4 0x194
112#define MADERA_FLL2_CONTROL_5 0x195 110#define MADERA_FLL2_CONTROL_5 0x195
113#define MADERA_FLL2_CONTROL_6 0x196 111#define MADERA_FLL2_CONTROL_6 0x196
114#define MADERA_FLL2_LOOP_FILTER_TEST_1 0x197
115#define CS47L92_FLL2_CONTROL_7 0x197 112#define CS47L92_FLL2_CONTROL_7 0x197
116#define MADERA_FLL2_NCO_TEST_0 0x198
117#define CS47L92_FLL2_CONTROL_8 0x198 113#define CS47L92_FLL2_CONTROL_8 0x198
118#define MADERA_FLL2_CONTROL_7 0x199 114#define MADERA_FLL2_CONTROL_7 0x199
119#define CS47L92_FLL2_CONTROL_9 0x199 115#define CS47L92_FLL2_CONTROL_9 0x199
@@ -137,8 +133,6 @@
137#define MADERA_FLL3_CONTROL_4 0x1B4 133#define MADERA_FLL3_CONTROL_4 0x1B4
138#define MADERA_FLL3_CONTROL_5 0x1B5 134#define MADERA_FLL3_CONTROL_5 0x1B5
139#define MADERA_FLL3_CONTROL_6 0x1B6 135#define MADERA_FLL3_CONTROL_6 0x1B6
140#define MADERA_FLL3_LOOP_FILTER_TEST_1 0x1B7
141#define MADERA_FLL3_NCO_TEST_0 0x1B8
142#define MADERA_FLL3_CONTROL_7 0x1B9 136#define MADERA_FLL3_CONTROL_7 0x1B9
143#define MADERA_FLL3_SYNCHRONISER_1 0x1C1 137#define MADERA_FLL3_SYNCHRONISER_1 0x1C1
144#define MADERA_FLL3_SYNCHRONISER_2 0x1C2 138#define MADERA_FLL3_SYNCHRONISER_2 0x1C2
@@ -304,9 +298,6 @@
304#define MADERA_OUTPUT_PATH_CONFIG_6R 0x43C 298#define MADERA_OUTPUT_PATH_CONFIG_6R 0x43C
305#define MADERA_DAC_DIGITAL_VOLUME_6R 0x43D 299#define MADERA_DAC_DIGITAL_VOLUME_6R 0x43D
306#define MADERA_NOISE_GATE_SELECT_6R 0x43F 300#define MADERA_NOISE_GATE_SELECT_6R 0x43F
307#define MADERA_DRE_ENABLE 0x440
308#define MADERA_EDRE_ENABLE 0x448
309#define MADERA_EDRE_MANUAL 0x44A
310#define MADERA_DAC_AEC_CONTROL_1 0x450 301#define MADERA_DAC_AEC_CONTROL_1 0x450
311#define MADERA_DAC_AEC_CONTROL_2 0x451 302#define MADERA_DAC_AEC_CONTROL_2 0x451
312#define MADERA_NOISE_GATE_CONTROL 0x458 303#define MADERA_NOISE_GATE_CONTROL 0x458
@@ -1182,68 +1173,6 @@
1182#define MADERA_FCR_COEFF_END 0xFC5 1173#define MADERA_FCR_COEFF_END 0xFC5
1183#define MADERA_AUXPDM1_CTRL_0 0x10C0 1174#define MADERA_AUXPDM1_CTRL_0 0x10C0
1184#define MADERA_AUXPDM1_CTRL_1 0x10C1 1175#define MADERA_AUXPDM1_CTRL_1 0x10C1
1185#define MADERA_DAC_COMP_1 0x1300
1186#define MADERA_DAC_COMP_2 0x1302
1187#define MADERA_FRF_COEFFICIENT_1L_1 0x1380
1188#define MADERA_FRF_COEFFICIENT_1L_2 0x1381
1189#define MADERA_FRF_COEFFICIENT_1L_3 0x1382
1190#define MADERA_FRF_COEFFICIENT_1L_4 0x1383
1191#define MADERA_FRF_COEFFICIENT_1R_1 0x1390
1192#define MADERA_FRF_COEFFICIENT_1R_2 0x1391
1193#define MADERA_FRF_COEFFICIENT_1R_3 0x1392
1194#define MADERA_FRF_COEFFICIENT_1R_4 0x1393
1195#define MADERA_FRF_COEFFICIENT_2L_1 0x13A0
1196#define MADERA_FRF_COEFFICIENT_2L_2 0x13A1
1197#define MADERA_FRF_COEFFICIENT_2L_3 0x13A2
1198#define MADERA_FRF_COEFFICIENT_2L_4 0x13A3
1199#define MADERA_FRF_COEFFICIENT_2R_1 0x13B0
1200#define MADERA_FRF_COEFFICIENT_2R_2 0x13B1
1201#define MADERA_FRF_COEFFICIENT_2R_3 0x13B2
1202#define MADERA_FRF_COEFFICIENT_2R_4 0x13B3
1203#define MADERA_FRF_COEFFICIENT_3L_1 0x13C0
1204#define MADERA_FRF_COEFFICIENT_3L_2 0x13C1
1205#define MADERA_FRF_COEFFICIENT_3L_3 0x13C2
1206#define MADERA_FRF_COEFFICIENT_3L_4 0x13C3
1207#define MADERA_FRF_COEFFICIENT_3R_1 0x13D0
1208#define MADERA_FRF_COEFFICIENT_3R_2 0x13D1
1209#define MADERA_FRF_COEFFICIENT_3R_3 0x13D2
1210#define MADERA_FRF_COEFFICIENT_3R_4 0x13D3
1211#define MADERA_FRF_COEFFICIENT_4L_1 0x13E0
1212#define MADERA_FRF_COEFFICIENT_4L_2 0x13E1
1213#define MADERA_FRF_COEFFICIENT_4L_3 0x13E2
1214#define MADERA_FRF_COEFFICIENT_4L_4 0x13E3
1215#define MADERA_FRF_COEFFICIENT_4R_1 0x13F0
1216#define MADERA_FRF_COEFFICIENT_4R_2 0x13F1
1217#define MADERA_FRF_COEFFICIENT_4R_3 0x13F2
1218#define MADERA_FRF_COEFFICIENT_4R_4 0x13F3
1219#define CS47L35_FRF_COEFFICIENT_4L_1 0x13A0
1220#define CS47L35_FRF_COEFFICIENT_4L_2 0x13A1
1221#define CS47L35_FRF_COEFFICIENT_4L_3 0x13A2
1222#define CS47L35_FRF_COEFFICIENT_4L_4 0x13A3
1223#define CS47L35_FRF_COEFFICIENT_5L_1 0x13B0
1224#define CS47L35_FRF_COEFFICIENT_5L_2 0x13B1
1225#define CS47L35_FRF_COEFFICIENT_5L_3 0x13B2
1226#define CS47L35_FRF_COEFFICIENT_5L_4 0x13B3
1227#define CS47L35_FRF_COEFFICIENT_5R_1 0x13C0
1228#define CS47L35_FRF_COEFFICIENT_5R_2 0x13C1
1229#define CS47L35_FRF_COEFFICIENT_5R_3 0x13C2
1230#define CS47L35_FRF_COEFFICIENT_5R_4 0x13C3
1231#define MADERA_FRF_COEFFICIENT_5L_1 0x1400
1232#define MADERA_FRF_COEFFICIENT_5L_2 0x1401
1233#define MADERA_FRF_COEFFICIENT_5L_3 0x1402
1234#define MADERA_FRF_COEFFICIENT_5L_4 0x1403
1235#define MADERA_FRF_COEFFICIENT_5R_1 0x1410
1236#define MADERA_FRF_COEFFICIENT_5R_2 0x1411
1237#define MADERA_FRF_COEFFICIENT_5R_3 0x1412
1238#define MADERA_FRF_COEFFICIENT_5R_4 0x1413
1239#define MADERA_FRF_COEFFICIENT_6L_1 0x1420
1240#define MADERA_FRF_COEFFICIENT_6L_2 0x1421
1241#define MADERA_FRF_COEFFICIENT_6L_3 0x1422
1242#define MADERA_FRF_COEFFICIENT_6L_4 0x1423
1243#define MADERA_FRF_COEFFICIENT_6R_1 0x1430
1244#define MADERA_FRF_COEFFICIENT_6R_2 0x1431
1245#define MADERA_FRF_COEFFICIENT_6R_3 0x1432
1246#define MADERA_FRF_COEFFICIENT_6R_4 0x1433
1247#define MADERA_DFC1_CTRL 0x1480 1176#define MADERA_DFC1_CTRL 0x1480
1248#define MADERA_DFC1_RX 0x1482 1177#define MADERA_DFC1_RX 0x1482
1249#define MADERA_DFC1_TX 0x1484 1178#define MADERA_DFC1_TX 0x1484
@@ -1573,15 +1502,6 @@
1573#define MADERA_FLL1_REFCLK_SRC_SHIFT 0 1502#define MADERA_FLL1_REFCLK_SRC_SHIFT 0
1574#define MADERA_FLL1_REFCLK_SRC_WIDTH 4 1503#define MADERA_FLL1_REFCLK_SRC_WIDTH 4
1575 1504
1576/* (0x0177) FLL1_Loop_Filter_Test_1 */
1577#define MADERA_FLL1_FRC_INTEG_UPD 0x8000
1578#define MADERA_FLL1_FRC_INTEG_UPD_MASK 0x8000
1579#define MADERA_FLL1_FRC_INTEG_UPD_SHIFT 15
1580#define MADERA_FLL1_FRC_INTEG_UPD_WIDTH 1
1581#define MADERA_FLL1_FRC_INTEG_VAL_MASK 0x0FFF
1582#define MADERA_FLL1_FRC_INTEG_VAL_SHIFT 0
1583#define MADERA_FLL1_FRC_INTEG_VAL_WIDTH 12
1584
1585/* (0x0179) FLL1_Control_7 */ 1505/* (0x0179) FLL1_Control_7 */
1586#define MADERA_FLL1_GAIN_MASK 0x003c 1506#define MADERA_FLL1_GAIN_MASK 0x003c
1587#define MADERA_FLL1_GAIN_SHIFT 2 1507#define MADERA_FLL1_GAIN_SHIFT 2