diff options
author | Jonas Gorski <jonas.gorski@gmail.com> | 2017-09-20 07:14:08 -0400 |
---|---|---|
committer | James Hogan <jhogan@kernel.org> | 2017-11-07 13:33:20 -0500 |
commit | 072916f55ddbb94330dd14118a126930c0e20751 (patch) | |
tree | 637aa1802698759f3adc8ba57e2c7e99de05027f | |
parent | ef4235159555e8c8d20cb47f04a74cb4abacd63a (diff) |
MIPS: BCM63XX: split out swpkt_sar/usb clocks
Make the secondary switch clocks their own clocks. This allows proper
enable reference counting between SAR/XTM and the main switch clocks,
and controlling them individually from drivers.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-mips@linux-mips.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-serial@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: bcm-kernel-feedback-list@broadcom.com
Patchwork: https://patchwork.linux-mips.org/patch/17332/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: James Hogan <jhogan@kernel.org>
-rw-r--r-- | arch/mips/bcm63xx/clk.c | 61 |
1 files changed, 51 insertions, 10 deletions
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c index 2018425fe97e..164115944a7f 100644 --- a/arch/mips/bcm63xx/clk.c +++ b/arch/mips/bcm63xx/clk.c | |||
@@ -122,21 +122,56 @@ static struct clk clk_ephy = { | |||
122 | }; | 122 | }; |
123 | 123 | ||
124 | /* | 124 | /* |
125 | * Ethernet switch SAR clock | ||
126 | */ | ||
127 | static void swpkt_sar_set(struct clk *clk, int enable) | ||
128 | { | ||
129 | if (BCMCPU_IS_6368()) | ||
130 | bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable); | ||
131 | else | ||
132 | return; | ||
133 | } | ||
134 | |||
135 | static struct clk clk_swpkt_sar = { | ||
136 | .set = swpkt_sar_set, | ||
137 | }; | ||
138 | |||
139 | /* | ||
140 | * Ethernet switch USB clock | ||
141 | */ | ||
142 | static void swpkt_usb_set(struct clk *clk, int enable) | ||
143 | { | ||
144 | if (BCMCPU_IS_6368()) | ||
145 | bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable); | ||
146 | else | ||
147 | return; | ||
148 | } | ||
149 | |||
150 | static struct clk clk_swpkt_usb = { | ||
151 | .set = swpkt_usb_set, | ||
152 | }; | ||
153 | |||
154 | /* | ||
125 | * Ethernet switch clock | 155 | * Ethernet switch clock |
126 | */ | 156 | */ |
127 | static void enetsw_set(struct clk *clk, int enable) | 157 | static void enetsw_set(struct clk *clk, int enable) |
128 | { | 158 | { |
129 | if (BCMCPU_IS_6328()) | 159 | if (BCMCPU_IS_6328()) { |
130 | bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); | 160 | bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); |
131 | else if (BCMCPU_IS_6362()) | 161 | } else if (BCMCPU_IS_6362()) { |
132 | bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); | 162 | bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); |
133 | else if (BCMCPU_IS_6368()) | 163 | } else if (BCMCPU_IS_6368()) { |
134 | bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | | 164 | if (enable) { |
135 | CKCTL_6368_SWPKT_USB_EN | | 165 | clk_enable_unlocked(&clk_swpkt_sar); |
136 | CKCTL_6368_SWPKT_SAR_EN, | 166 | clk_enable_unlocked(&clk_swpkt_usb); |
137 | enable); | 167 | } else { |
138 | else | 168 | clk_disable_unlocked(&clk_swpkt_usb); |
169 | clk_disable_unlocked(&clk_swpkt_sar); | ||
170 | } | ||
171 | bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable); | ||
172 | } else { | ||
139 | return; | 173 | return; |
174 | } | ||
140 | 175 | ||
141 | if (enable) { | 176 | if (enable) { |
142 | /* reset switch core afer clock change */ | 177 | /* reset switch core afer clock change */ |
@@ -261,8 +296,12 @@ static void xtm_set(struct clk *clk, int enable) | |||
261 | if (!BCMCPU_IS_6368()) | 296 | if (!BCMCPU_IS_6368()) |
262 | return; | 297 | return; |
263 | 298 | ||
264 | bcm_hwclock_set(CKCTL_6368_SAR_EN | | 299 | if (enable) |
265 | CKCTL_6368_SWPKT_SAR_EN, enable); | 300 | clk_enable_unlocked(&clk_swpkt_sar); |
301 | else | ||
302 | clk_disable_unlocked(&clk_swpkt_sar); | ||
303 | |||
304 | bcm_hwclock_set(CKCTL_6368_SAR_EN, enable); | ||
266 | 305 | ||
267 | if (enable) { | 306 | if (enable) { |
268 | /* reset sar core afer clock change */ | 307 | /* reset sar core afer clock change */ |
@@ -451,6 +490,8 @@ static struct clk_lookup bcm6358_clks[] = { | |||
451 | CLKDEV_INIT(NULL, "usbd", &clk_usbd), | 490 | CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
452 | CLKDEV_INIT(NULL, "spi", &clk_spi), | 491 | CLKDEV_INIT(NULL, "spi", &clk_spi), |
453 | CLKDEV_INIT(NULL, "pcm", &clk_pcm), | 492 | CLKDEV_INIT(NULL, "pcm", &clk_pcm), |
493 | CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar), | ||
494 | CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb), | ||
454 | CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), | 495 | CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), |
455 | CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), | 496 | CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), |
456 | }; | 497 | }; |