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authorAlex Deucher <alexander.deucher@amd.com>2016-10-18 00:32:00 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-10-21 11:18:37 -0400
commit0711257ee6d1e8bec08fdf26021f968d4d041e91 (patch)
tree7e594bebef8402010f605a2ff81c1422906a3f78
parent1304f0c7ddd80b359282bb2077c8a7bc51f06c3a (diff)
drm/amdgpu/st: move ATC CG golden init from gfx to mc
It's technically an MC register so make sure we initialize it in the MC module rather than the gfx module. Since other bits in the same register are used to enable ATC CG features make sure we apply the golden setting first. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c1
2 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ee6a48a09214..bb97182dc749 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -640,7 +640,6 @@ static const u32 stoney_mgcg_cgcg_init[] =
640 mmCP_MEM_SLP_CNTL, 0xffffffff, 0x00020201, 640 mmCP_MEM_SLP_CNTL, 0xffffffff, 0x00020201,
641 mmRLC_MEM_SLP_CNTL, 0xffffffff, 0x00020201, 641 mmRLC_MEM_SLP_CNTL, 0xffffffff, 0x00020201,
642 mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200, 642 mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200,
643 mmATC_MISC_CG, 0xffffffff, 0x000c0200,
644}; 643};
645 644
646static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev); 645static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index c22ef140a542..a16b2201d52c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -100,6 +100,7 @@ static const u32 cz_mgcg_cgcg_init[] =
100 100
101static const u32 stoney_mgcg_cgcg_init[] = 101static const u32 stoney_mgcg_cgcg_init[] =
102{ 102{
103 mmATC_MISC_CG, 0xffffffff, 0x000c0200,
103 mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104 104 mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104
104}; 105};
105 106