diff options
author | Krzysztof Kozlowski <krzk@kernel.org> | 2018-08-30 13:21:53 -0400 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2018-09-26 11:07:47 -0400 |
commit | 06d561ca0fa73a5b12ef6dfe0da7053e0ee37315 (patch) | |
tree | f37b78c3860b0bd6e4f29d18ecec1c808c25e897 | |
parent | fee8cdc2df088fa2ee4b7f86a803918a3664a26b (diff) |
ARM: tegra: tegra20: Fix mixed tabs-spaces indentation
Fix indentation and alignment when spaces were used instead of tabs.
This fixes checkpatch errors like:
ERROR: code indent should use tabs where possible
#306: FILE: arch/arm/boot/dts/tegra20-paz00.dts:306:
+^I^I <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;$
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | arch/arm/boot/dts/tegra20-paz00.dts | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index ef245291924f..7d8aef6ebd3a 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts | |||
@@ -303,7 +303,7 @@ | |||
303 | request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; | 303 | request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; |
304 | slave-addr = <138>; | 304 | slave-addr = <138>; |
305 | clocks = <&tegra_car TEGRA20_CLK_I2C3>, | 305 | clocks = <&tegra_car TEGRA20_CLK_I2C3>, |
306 | <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; | 306 | <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; |
307 | clock-names = "div-clk", "fast-clk"; | 307 | clock-names = "div-clk", "fast-clk"; |
308 | resets = <&tegra_car 67>; | 308 | resets = <&tegra_car 67>; |
309 | reset-names = "i2c"; | 309 | reset-names = "i2c"; |
@@ -599,8 +599,8 @@ | |||
599 | GPIO_ACTIVE_HIGH>; | 599 | GPIO_ACTIVE_HIGH>; |
600 | 600 | ||
601 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, | 601 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
602 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, | 602 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, |
603 | <&tegra_car TEGRA20_CLK_CDEV1>; | 603 | <&tegra_car TEGRA20_CLK_CDEV1>; |
604 | clock-names = "pll_a", "pll_a_out0", "mclk"; | 604 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
605 | }; | 605 | }; |
606 | }; | 606 | }; |