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authorRex Zhu <Rex.Zhu@amd.com>2016-06-27 05:30:24 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-06-29 12:10:02 -0400
commit0636e0d666e0238fa22348172c20a49f42a94395 (patch)
tree66372faecf62efcb4dd9f423abd9784b3039f199
parent3a8bd717ee3e0508fc0dd517b97e950989e15f8c (diff)
drm/amd/powerplay: fix issue uvd dpm can't enabled on Polaris11.
1. Populate correct value of VDDCI voltage for SMC SAMU, VCE, and UVD levels depending on whether VDDCi control is SVI2 or GPIO. 2. Populate SMC ACPI minimum voltage using VBIOS boot SCLK and MCLK When static voltage is configured as VDDCI, driver still tries to program a voltage for MM minVoltage using VDDC-VDDCI delta requirement. minVoltage should be set as boot up voltage. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c101
1 files changed, 60 insertions, 41 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
index d15584c84595..ec2a7ada346a 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
@@ -1423,22 +1423,19 @@ static int polaris10_populate_smc_acpi_level(struct pp_hwmgr *hwmgr,
1423 1423
1424 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; 1424 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;
1425 1425
1426 if (!data->sclk_dpm_key_disabled) { 1426
1427 /* Get MinVoltage and Frequency from DPM0, 1427 /* Get MinVoltage and Frequency from DPM0,
1428 * already converted to SMC_UL */ 1428 * already converted to SMC_UL */
1429 sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value; 1429 sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value;
1430 result = polaris10_get_dependency_volt_by_clk(hwmgr, 1430 result = polaris10_get_dependency_volt_by_clk(hwmgr,
1431 table_info->vdd_dep_on_sclk, 1431 table_info->vdd_dep_on_sclk,
1432 table->ACPILevel.SclkFrequency, 1432 sclk_frequency,
1433 &table->ACPILevel.MinVoltage, &mvdd); 1433 &table->ACPILevel.MinVoltage, &mvdd);
1434 PP_ASSERT_WITH_CODE((0 == result), 1434 PP_ASSERT_WITH_CODE((0 == result),
1435 "Cannot find ACPI VDDC voltage value " 1435 "Cannot find ACPI VDDC voltage value "
1436 "in Clock Dependency Table", ); 1436 "in Clock Dependency Table",
1437 } else { 1437 );
1438 sclk_frequency = data->vbios_boot_state.sclk_bootup_value; 1438
1439 table->ACPILevel.MinVoltage =
1440 data->vbios_boot_state.vddc_bootup_value * VOLTAGE_SCALE;
1441 }
1442 1439
1443 result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting)); 1440 result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting));
1444 PP_ASSERT_WITH_CODE(result == 0, "Error retrieving Engine Clock dividers from VBIOS.", return result); 1441 PP_ASSERT_WITH_CODE(result == 0, "Error retrieving Engine Clock dividers from VBIOS.", return result);
@@ -1463,24 +1460,18 @@ static int polaris10_populate_smc_acpi_level(struct pp_hwmgr *hwmgr,
1463 CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw1_frac); 1460 CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw1_frac);
1464 CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Sclk_ss_slew_rate); 1461 CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Sclk_ss_slew_rate);
1465 1462
1466 if (!data->mclk_dpm_key_disabled) { 1463
1467 /* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */ 1464 /* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */
1468 table->MemoryACPILevel.MclkFrequency = 1465 table->MemoryACPILevel.MclkFrequency =
1469 data->dpm_table.mclk_table.dpm_levels[0].value; 1466 data->dpm_table.mclk_table.dpm_levels[0].value;
1470 result = polaris10_get_dependency_volt_by_clk(hwmgr, 1467 result = polaris10_get_dependency_volt_by_clk(hwmgr,
1471 table_info->vdd_dep_on_mclk, 1468 table_info->vdd_dep_on_mclk,
1472 table->MemoryACPILevel.MclkFrequency, 1469 table->MemoryACPILevel.MclkFrequency,
1473 &table->MemoryACPILevel.MinVoltage, &mvdd); 1470 &table->MemoryACPILevel.MinVoltage, &mvdd);
1474 PP_ASSERT_WITH_CODE((0 == result), 1471 PP_ASSERT_WITH_CODE((0 == result),
1475 "Cannot find ACPI VDDCI voltage value " 1472 "Cannot find ACPI VDDCI voltage value "
1476 "in Clock Dependency Table", 1473 "in Clock Dependency Table",
1477 ); 1474 );
1478 } else {
1479 table->MemoryACPILevel.MclkFrequency =
1480 data->vbios_boot_state.mclk_bootup_value;
1481 table->MemoryACPILevel.MinVoltage =
1482 data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE;
1483 }
1484 1475
1485 us_mvdd = 0; 1476 us_mvdd = 0;
1486 if ((POLARIS10_VOLTAGE_CONTROL_NONE == data->mvdd_control) || 1477 if ((POLARIS10_VOLTAGE_CONTROL_NONE == data->mvdd_control) ||
@@ -1525,6 +1516,7 @@ static int polaris10_populate_smc_vce_level(struct pp_hwmgr *hwmgr,
1525 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = 1516 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
1526 table_info->mm_dep_table; 1517 table_info->mm_dep_table;
1527 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); 1518 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
1519 uint32_t vddci;
1528 1520
1529 table->VceLevelCount = (uint8_t)(mm_table->count); 1521 table->VceLevelCount = (uint8_t)(mm_table->count);
1530 table->VceBootLevel = 0; 1522 table->VceBootLevel = 0;
@@ -1534,9 +1526,18 @@ static int polaris10_populate_smc_vce_level(struct pp_hwmgr *hwmgr,
1534 table->VceLevel[count].MinVoltage = 0; 1526 table->VceLevel[count].MinVoltage = 0;
1535 table->VceLevel[count].MinVoltage |= 1527 table->VceLevel[count].MinVoltage |=
1536 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; 1528 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
1529
1530 if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control)
1531 vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table),
1532 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
1533 else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control)
1534 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
1535 else
1536 vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT;
1537
1538
1537 table->VceLevel[count].MinVoltage |= 1539 table->VceLevel[count].MinVoltage |=
1538 ((mm_table->entries[count].vddc - data->vddc_vddci_delta) * 1540 (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1539 VOLTAGE_SCALE) << VDDCI_SHIFT;
1540 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1541 table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT;
1541 1542
1542 /*retrieve divider value for VBIOS */ 1543 /*retrieve divider value for VBIOS */
@@ -1565,6 +1566,7 @@ static int polaris10_populate_smc_samu_level(struct pp_hwmgr *hwmgr,
1565 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = 1566 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
1566 table_info->mm_dep_table; 1567 table_info->mm_dep_table;
1567 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); 1568 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
1569 uint32_t vddci;
1568 1570
1569 table->SamuBootLevel = 0; 1571 table->SamuBootLevel = 0;
1570 table->SamuLevelCount = (uint8_t)(mm_table->count); 1572 table->SamuLevelCount = (uint8_t)(mm_table->count);
@@ -1575,8 +1577,16 @@ static int polaris10_populate_smc_samu_level(struct pp_hwmgr *hwmgr,
1575 table->SamuLevel[count].Frequency = mm_table->entries[count].samclock; 1577 table->SamuLevel[count].Frequency = mm_table->entries[count].samclock;
1576 table->SamuLevel[count].MinVoltage |= (mm_table->entries[count].vddc * 1578 table->SamuLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
1577 VOLTAGE_SCALE) << VDDC_SHIFT; 1579 VOLTAGE_SCALE) << VDDC_SHIFT;
1578 table->SamuLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - 1580
1579 data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT; 1581 if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control)
1582 vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table),
1583 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
1584 else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control)
1585 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
1586 else
1587 vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT;
1588
1589 table->SamuLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1580 table->SamuLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1590 table->SamuLevel[count].MinVoltage |= 1 << PHASES_SHIFT;
1581 1591
1582 /* retrieve divider value for VBIOS */ 1592 /* retrieve divider value for VBIOS */
@@ -1659,6 +1669,7 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr,
1659 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = 1669 struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
1660 table_info->mm_dep_table; 1670 table_info->mm_dep_table;
1661 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); 1671 struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
1672 uint32_t vddci;
1662 1673
1663 table->UvdLevelCount = (uint8_t)(mm_table->count); 1674 table->UvdLevelCount = (uint8_t)(mm_table->count);
1664 table->UvdBootLevel = 0; 1675 table->UvdBootLevel = 0;
@@ -1669,8 +1680,16 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr,
1669 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; 1680 table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
1670 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * 1681 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
1671 VOLTAGE_SCALE) << VDDC_SHIFT; 1682 VOLTAGE_SCALE) << VDDC_SHIFT;
1672 table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - 1683
1673 data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT; 1684 if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control)
1685 vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table),
1686 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
1687 else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control)
1688 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
1689 else
1690 vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT;
1691
1692 table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1674 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; 1693 table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT;
1675 1694
1676 /* retrieve divider value for VBIOS */ 1695 /* retrieve divider value for VBIOS */
@@ -1691,8 +1710,8 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr,
1691 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); 1710 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);
1692 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); 1711 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency);
1693 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage); 1712 CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage);
1694
1695 } 1713 }
1714
1696 return result; 1715 return result;
1697} 1716}
1698 1717