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authorJames Hogan <james.hogan@imgtec.com>2017-04-04 02:53:38 -0400
committerJames Hogan <james.hogan@imgtec.com>2017-04-05 10:25:08 -0400
commit049520dcb3966ee0471f2757ca3f5f5e317f33cd (patch)
treefb4fe3951288723ba2c558620e533b942a7171aa
parentb884a190afcecdbef34ca508ea5ee88bb7c77861 (diff)
metag/usercopy: Reformat rapf loop inline asm
Reformat rapf loop inline assembly to make it more readable and easier to modify in future. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-metag@vger.kernel.org
Diffstat
-rw-r--r--arch/metag/lib/usercopy.c214
1 files changed, 85 insertions, 129 deletions
diff --git a/arch/metag/lib/usercopy.c b/arch/metag/lib/usercopy.c
index 2792fc621088..7abed2f45c83 100644
--- a/arch/metag/lib/usercopy.c
+++ b/arch/metag/lib/usercopy.c
@@ -246,65 +246,49 @@
246#define __asm_copy_user_64bit_rapf_loop( \ 246#define __asm_copy_user_64bit_rapf_loop( \
247 to, from, ret, n, id, FIXUP) \ 247 to, from, ret, n, id, FIXUP) \
248 asm volatile ( \ 248 asm volatile ( \
249 ".balign 8\n" \ 249 ".balign 8\n" \
250 "MOV RAPF, %1\n" \ 250 " MOV RAPF, %1\n" \
251 "MSETL [A0StP++], D0Ar6, D0FrT, D0.5, D0.6, D0.7\n" \ 251 " MSETL [A0StP++], D0Ar6, D0FrT, D0.5, D0.6, D0.7\n" \
252 "MOV D0Ar6, #0\n" \ 252 " MOV D0Ar6, #0\n" \
253 "LSR D1Ar5, %3, #6\n" \ 253 " LSR D1Ar5, %3, #6\n" \
254 "SUB TXRPT, D1Ar5, #2\n" \ 254 " SUB TXRPT, D1Ar5, #2\n" \
255 "MOV RAPF, %1\n" \ 255 " MOV RAPF, %1\n" \
256 "$Lloop"id":\n" \ 256 "$Lloop"id":\n" \
257 "ADD RAPF, %1, #64\n" \ 257 " ADD RAPF, %1, #64\n" \
258 "21:\n" \ 258 "21: MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
259 "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 259 "22: MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
260 "22:\n" \ 260 "23: SUB %3, %3, #32\n" \
261 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 261 "24: MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
262 "23:\n" \ 262 "25: MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
263 "SUB %3, %3, #32\n" \ 263 "26: SUB %3, %3, #32\n" \
264 "24:\n" \ 264 " DCACHE [%1+#-64], D0Ar6\n" \
265 "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 265 " BR $Lloop"id"\n" \
266 "25:\n" \
267 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
268 "26:\n" \
269 "SUB %3, %3, #32\n" \
270 "DCACHE [%1+#-64], D0Ar6\n" \
271 "BR $Lloop"id"\n" \
272 \ 266 \
273 "MOV RAPF, %1\n" \ 267 " MOV RAPF, %1\n" \
274 "27:\n" \ 268 "27: MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
275 "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 269 "28: MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
276 "28:\n" \ 270 "29: SUB %3, %3, #32\n" \
277 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 271 "30: MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
278 "29:\n" \ 272 "31: MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
279 "SUB %3, %3, #32\n" \ 273 "32: SUB %0, %0, #8\n" \
280 "30:\n" \ 274 "33: SETL [%0++], D0.7, D1.7\n" \
281 "MGETL D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 275 " SUB %3, %3, #32\n" \
282 "31:\n" \ 276 "1: DCACHE [%1+#-64], D0Ar6\n" \
283 "MSETL [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 277 " GETL D0Ar6, D1Ar5, [A0StP+#-40]\n" \
284 "32:\n" \ 278 " GETL D0FrT, D1RtP, [A0StP+#-32]\n" \
285 "SUB %0, %0, #8\n" \ 279 " GETL D0.5, D1.5, [A0StP+#-24]\n" \
286 "33:\n" \ 280 " GETL D0.6, D1.6, [A0StP+#-16]\n" \
287 "SETL [%0++], D0.7, D1.7\n" \ 281 " GETL D0.7, D1.7, [A0StP+#-8]\n" \
288 "SUB %3, %3, #32\n" \ 282 " SUB A0StP, A0StP, #40\n" \
289 "1:" \
290 "DCACHE [%1+#-64], D0Ar6\n" \
291 "GETL D0Ar6, D1Ar5, [A0StP+#-40]\n" \
292 "GETL D0FrT, D1RtP, [A0StP+#-32]\n" \
293 "GETL D0.5, D1.5, [A0StP+#-24]\n" \
294 "GETL D0.6, D1.6, [A0StP+#-16]\n" \
295 "GETL D0.7, D1.7, [A0StP+#-8]\n" \
296 "SUB A0StP, A0StP, #40\n" \
297 " .section .fixup,\"ax\"\n" \ 283 " .section .fixup,\"ax\"\n" \
298 "4:\n" \ 284 "4: ADD %0, %0, #8\n" \
299 " ADD %0, %0, #8\n" \ 285 "3: MOV D0Ar2, TXSTATUS\n" \
300 "3:\n" \
301 " MOV D0Ar2, TXSTATUS\n" \
302 " MOV D1Ar1, TXSTATUS\n" \ 286 " MOV D1Ar1, TXSTATUS\n" \
303 " AND D1Ar1, D1Ar1, #0xFFFFF8FF\n" \ 287 " AND D1Ar1, D1Ar1, #0xFFFFF8FF\n" \
304 " MOV TXSTATUS, D1Ar1\n" \ 288 " MOV TXSTATUS, D1Ar1\n" \
305 FIXUP \ 289 FIXUP \
306 " MOVT D0Ar2,#HI(1b)\n" \ 290 " MOVT D0Ar2, #HI(1b)\n" \
307 " JUMP D0Ar2,#LO(1b)\n" \ 291 " JUMP D0Ar2, #LO(1b)\n" \
308 " .previous\n" \ 292 " .previous\n" \
309 " .section __ex_table,\"a\"\n" \ 293 " .section __ex_table,\"a\"\n" \
310 " .long 21b,3b\n" \ 294 " .long 21b,3b\n" \
@@ -397,89 +381,61 @@
397#define __asm_copy_user_32bit_rapf_loop( \ 381#define __asm_copy_user_32bit_rapf_loop( \
398 to, from, ret, n, id, FIXUP) \ 382 to, from, ret, n, id, FIXUP) \
399 asm volatile ( \ 383 asm volatile ( \
400 ".balign 8\n" \ 384 ".balign 8\n" \
401 "MOV RAPF, %1\n" \ 385 " MOV RAPF, %1\n" \
402 "MSETL [A0StP++], D0Ar6, D0FrT, D0.5, D0.6, D0.7\n" \ 386 " MSETL [A0StP++], D0Ar6, D0FrT, D0.5, D0.6, D0.7\n" \
403 "MOV D0Ar6, #0\n" \ 387 " MOV D0Ar6, #0\n" \
404 "LSR D1Ar5, %3, #6\n" \ 388 " LSR D1Ar5, %3, #6\n" \
405 "SUB TXRPT, D1Ar5, #2\n" \ 389 " SUB TXRPT, D1Ar5, #2\n" \
406 "MOV RAPF, %1\n" \ 390 " MOV RAPF, %1\n" \
407 "$Lloop"id":\n" \ 391 "$Lloop"id":\n" \
408 "ADD RAPF, %1, #64\n" \ 392 " ADD RAPF, %1, #64\n" \
409 "21:\n" \ 393 "21: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
410 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 394 "22: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
411 "22:\n" \ 395 "23: SUB %3, %3, #16\n" \
412 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 396 "24: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
413 "23:\n" \ 397 "25: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
414 "SUB %3, %3, #16\n" \ 398 "26: SUB %3, %3, #16\n" \
415 "24:\n" \ 399 "27: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
416 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 400 "28: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
417 "25:\n" \ 401 "29: SUB %3, %3, #16\n" \
418 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 402 "30: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
419 "26:\n" \ 403 "31: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
420 "SUB %3, %3, #16\n" \ 404 "32: SUB %3, %3, #16\n" \
421 "27:\n" \ 405 " DCACHE [%1+#-64], D0Ar6\n" \
422 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 406 " BR $Lloop"id"\n" \
423 "28:\n" \
424 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
425 "29:\n" \
426 "SUB %3, %3, #16\n" \
427 "30:\n" \
428 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
429 "31:\n" \
430 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
431 "32:\n" \
432 "SUB %3, %3, #16\n" \
433 "DCACHE [%1+#-64], D0Ar6\n" \
434 "BR $Lloop"id"\n" \
435 \ 407 \
436 "MOV RAPF, %1\n" \ 408 " MOV RAPF, %1\n" \
437 "33:\n" \ 409 "33: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
438 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 410 "34: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
439 "34:\n" \ 411 "35: SUB %3, %3, #16\n" \
440 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 412 "36: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
441 "35:\n" \ 413 "37: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
442 "SUB %3, %3, #16\n" \ 414 "38: SUB %3, %3, #16\n" \
443 "36:\n" \ 415 "39: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
444 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 416 "40: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
445 "37:\n" \ 417 "41: SUB %3, %3, #16\n" \
446 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 418 "42: MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \
447 "38:\n" \ 419 "43: MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
448 "SUB %3, %3, #16\n" \ 420 "44: SUB %0, %0, #4\n" \
449 "39:\n" \ 421 "45: SETD [%0++], D0.7\n" \
450 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 422 " SUB %3, %3, #16\n" \
451 "40:\n" \ 423 "1: DCACHE [%1+#-64], D0Ar6\n" \
452 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \ 424 " GETL D0Ar6, D1Ar5, [A0StP+#-40]\n" \
453 "41:\n" \ 425 " GETL D0FrT, D1RtP, [A0StP+#-32]\n" \
454 "SUB %3, %3, #16\n" \ 426 " GETL D0.5, D1.5, [A0StP+#-24]\n" \
455 "42:\n" \ 427 " GETL D0.6, D1.6, [A0StP+#-16]\n" \
456 "MGETD D0FrT, D0.5, D0.6, D0.7, [%1++]\n" \ 428 " GETL D0.7, D1.7, [A0StP+#-8]\n" \
457 "43:\n" \ 429 " SUB A0StP, A0StP, #40\n" \
458 "MSETD [%0++], D0FrT, D0.5, D0.6, D0.7\n" \
459 "44:\n" \
460 "SUB %0, %0, #4\n" \
461 "45:\n" \
462 "SETD [%0++], D0.7\n" \
463 "SUB %3, %3, #16\n" \
464 "1:" \
465 "DCACHE [%1+#-64], D0Ar6\n" \
466 "GETL D0Ar6, D1Ar5, [A0StP+#-40]\n" \
467 "GETL D0FrT, D1RtP, [A0StP+#-32]\n" \
468 "GETL D0.5, D1.5, [A0StP+#-24]\n" \
469 "GETL D0.6, D1.6, [A0StP+#-16]\n" \
470 "GETL D0.7, D1.7, [A0StP+#-8]\n" \
471 "SUB A0StP, A0StP, #40\n" \
472 " .section .fixup,\"ax\"\n" \ 430 " .section .fixup,\"ax\"\n" \
473 "4:\n" \ 431 "4: ADD %0, %0, #4\n" \
474 " ADD %0, %0, #4\n" \ 432 "3: MOV D0Ar2, TXSTATUS\n" \
475 "3:\n" \
476 " MOV D0Ar2, TXSTATUS\n" \
477 " MOV D1Ar1, TXSTATUS\n" \ 433 " MOV D1Ar1, TXSTATUS\n" \
478 " AND D1Ar1, D1Ar1, #0xFFFFF8FF\n" \ 434 " AND D1Ar1, D1Ar1, #0xFFFFF8FF\n" \
479 " MOV TXSTATUS, D1Ar1\n" \ 435 " MOV TXSTATUS, D1Ar1\n" \
480 FIXUP \ 436 FIXUP \
481 " MOVT D0Ar2,#HI(1b)\n" \ 437 " MOVT D0Ar2, #HI(1b)\n" \
482 " JUMP D0Ar2,#LO(1b)\n" \ 438 " JUMP D0Ar2, #LO(1b)\n" \
483 " .previous\n" \ 439 " .previous\n" \
484 " .section __ex_table,\"a\"\n" \ 440 " .section __ex_table,\"a\"\n" \
485 " .long 21b,3b\n" \ 441 " .long 21b,3b\n" \
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