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authorLinus Torvalds <torvalds@linux-foundation.org>2016-12-13 14:10:36 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2016-12-13 14:10:36 -0500
commit03f8d4cca352fd41f26b5c88dec1e4d3f507f5de (patch)
treed6aece65d391a0d55cc67fadb558a0910b13616c
parenta67485d4bf97918225dfb5246e531643755a7ee1 (diff)
parentd8a12b7117b42fd708f1e908498350232bdbd5ff (diff)
Merge tag 'usb-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY updates from Greg KH: "Here's the big set of USB/PHY patches for 4.10-rc1. A number of new drivers are here in this set of changes. We have a new USB controller type "mtu3", a new usb-serial driver, and the usual churn in the gadget subsystem and the xhci host controller driver, along with a few other new small drivers added. And lots of little other changes all over the USB and PHY driver tree. Full details are in the shortlog All of these have been in linux-next for a while with no reported issues" * tag 'usb-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (309 commits) USB: serial: option: add dlink dwm-158 USB: serial: option: add support for Telit LE922A PIDs 0x1040, 0x1041 USB: OHCI: nxp: fix code warnings USB: OHCI: nxp: remove useless extern declaration USB: OHCI: at91: remove useless extern declaration usb: misc: rio500: fix result type for error message usb: mtu3: fix U3 port link issue usb: mtu3: enable auto switch from U3 to U2 usbip: fix warning in vhci_hcd_probe/lockdep_init_map usb: core: usbport: Use proper LED API to fix potential crash usbip: add missing compile time generated files to .gitignore usb: hcd.h: construct hub class request constants from simpler constants USB: OHCI: ohci-pxa27x: remove useless functions USB: OHCI: omap: remove useless extern declaration USB: OHCI: ohci-omap: remove useless functions USB: OHCI: ohci-s3c2410: remove useless functions USB: cdc-acm: add device id for GW Instek AFG-125 fsl/usb: Workarourd for USB erratum-A005697 usb: hub: Wait for connection to be reestablished after port reset usbip: vudc: Refactor init_vudc_hw() to be more obvious ...
-rw-r--r--Documentation/ABI/stable/sysfs-devices14
-rw-r--r--Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb215
-rw-r--r--Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt3
-rw-r--r--Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt (renamed from Documentation/devicetree/bindings/phy/meson-usb2-phy.txt)6
-rw-r--r--Documentation/devicetree/bindings/usb/da8xx-usb.txt43
-rw-r--r--Documentation/devicetree/bindings/usb/dwc2.txt5
-rw-r--r--Documentation/devicetree/bindings/usb/mt8173-mtu3.txt87
-rw-r--r--Documentation/devicetree/bindings/usb/mt8173-xhci.txt54
-rw-r--r--Documentation/devicetree/bindings/usb/ohci-da8xx.txt23
-rw-r--r--Documentation/devicetree/bindings/usb/s3c2410-usb.txt22
-rw-r--r--Documentation/devicetree/bindings/usb/usb-xhci.txt1
-rw-r--r--arch/arm/boot/dts/rk3036.dtsi1
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi1
-rw-r--r--arch/arm/boot/dts/rk3xxx.dtsi1
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi6220.dtsi1
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173-evb.dts63
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173.dtsi29
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi1
-rw-r--r--drivers/extcon/extcon-usb-gpio.c169
-rw-r--r--drivers/media/usb/usbtv/usbtv-core.c7
-rw-r--r--drivers/media/usb/uvc/uvc_video.c6
-rw-r--r--drivers/phy/Kconfig33
-rw-r--r--drivers/phy/Makefile3
-rw-r--r--drivers/phy/phy-berlin-sata.c3
-rw-r--r--drivers/phy/phy-brcm-sata.c6
-rw-r--r--drivers/phy/phy-da8xx-usb.c5
-rw-r--r--drivers/phy/phy-exynos-mipi-video.c15
-rw-r--r--drivers/phy/phy-exynos4210-usb2.c4
-rw-r--r--drivers/phy/phy-exynos4x12-usb2.c4
-rw-r--r--drivers/phy/phy-exynos5250-usb2.c2
-rw-r--r--drivers/phy/phy-meson8b-usb2.c286
-rw-r--r--drivers/phy/phy-miphy365x.c625
-rw-r--r--drivers/phy/phy-rcar-gen3-usb2.c118
-rw-r--r--drivers/phy/phy-rockchip-emmc.c2
-rw-r--r--drivers/phy/phy-rockchip-inno-usb2.c607
-rw-r--r--drivers/phy/phy-s5pv210-usb2.c4
-rw-r--r--drivers/phy/phy-stih41x-usb.c188
-rw-r--r--drivers/phy/phy-sun4i-usb.c14
-rw-r--r--drivers/phy/phy-ti-pipe3.c10
-rw-r--r--drivers/phy/phy-twl4030-usb.c3
-rw-r--r--drivers/phy/tegra/xusb-tegra124.c3
-rw-r--r--drivers/phy/tegra/xusb.c10
-rw-r--r--drivers/usb/Kconfig2
-rw-r--r--drivers/usb/Makefile1
-rw-r--r--drivers/usb/chipidea/ci_hdrc_imx.c4
-rw-r--r--drivers/usb/chipidea/ci_hdrc_imx.h1
-rw-r--r--drivers/usb/chipidea/udc.c12
-rw-r--r--drivers/usb/chipidea/udc.h12
-rw-r--r--drivers/usb/chipidea/usbmisc_imx.c86
-rw-r--r--drivers/usb/class/cdc-acm.c216
-rw-r--r--drivers/usb/class/cdc-acm.h5
-rw-r--r--drivers/usb/class/usbtmc.c5
-rw-r--r--drivers/usb/core/buffer.c3
-rw-r--r--drivers/usb/core/config.c5
-rw-r--r--drivers/usb/core/devices.c12
-rw-r--r--drivers/usb/core/driver.c3
-rw-r--r--drivers/usb/core/endpoint.c7
-rw-r--r--drivers/usb/core/file.c2
-rw-r--r--drivers/usb/core/generic.c2
-rw-r--r--drivers/usb/core/hub.c114
-rw-r--r--drivers/usb/core/ledtrig-usbport.c7
-rw-r--r--drivers/usb/core/message.c3
-rw-r--r--drivers/usb/core/notify.c2
-rw-r--r--drivers/usb/core/sysfs.c17
-rw-r--r--drivers/usb/core/urb.c12
-rw-r--r--drivers/usb/core/usb.c3
-rw-r--r--drivers/usb/core/usb.h5
-rw-r--r--drivers/usb/dwc2/Makefile1
-rw-r--r--drivers/usb/dwc2/core.c930
-rw-r--r--drivers/usb/dwc2/core.h324
-rw-r--r--drivers/usb/dwc2/core_intr.c6
-rw-r--r--drivers/usb/dwc2/debugfs.c2
-rw-r--r--drivers/usb/dwc2/gadget.c1126
-rw-r--r--drivers/usb/dwc2/hcd.c264
-rw-r--r--drivers/usb/dwc2/hcd.h7
-rw-r--r--drivers/usb/dwc2/hcd_ddma.c56
-rw-r--r--drivers/usb/dwc2/hcd_intr.c55
-rw-r--r--drivers/usb/dwc2/hcd_queue.c87
-rw-r--r--drivers/usb/dwc2/hw.h48
-rw-r--r--drivers/usb/dwc2/params.c1435
-rw-r--r--drivers/usb/dwc2/pci.c18
-rw-r--r--drivers/usb/dwc2/platform.c207
-rw-r--r--drivers/usb/dwc3/Kconfig6
-rw-r--r--drivers/usb/dwc3/Makefile6
-rw-r--r--drivers/usb/dwc3/core.c358
-rw-r--r--drivers/usb/dwc3/core.h53
-rw-r--r--drivers/usb/dwc3/debug.c32
-rw-r--r--drivers/usb/dwc3/debug.h41
-rw-r--r--drivers/usb/dwc3/dwc3-exynos.c10
-rw-r--r--drivers/usb/dwc3/dwc3-pci.c134
-rw-r--r--drivers/usb/dwc3/dwc3-st.c1
-rw-r--r--drivers/usb/dwc3/ep0.c347
-rw-r--r--drivers/usb/dwc3/gadget.c576
-rw-r--r--drivers/usb/dwc3/gadget.h5
-rw-r--r--drivers/usb/dwc3/host.c88
-rw-r--r--drivers/usb/dwc3/io.h6
-rw-r--r--drivers/usb/dwc3/trace.h123
-rw-r--r--drivers/usb/gadget/composite.c23
-rw-r--r--drivers/usb/gadget/function/f_fs.c2
-rw-r--r--drivers/usb/gadget/function/f_hid.c67
-rw-r--r--drivers/usb/gadget/function/f_ncm.c11
-rw-r--r--drivers/usb/gadget/function/f_uac2.c14
-rw-r--r--drivers/usb/gadget/function/rndis.c12
-rw-r--r--drivers/usb/gadget/function/rndis.h51
-rw-r--r--drivers/usb/gadget/function/u_ether.c5
-rw-r--r--drivers/usb/gadget/function/u_serial.c7
-rw-r--r--drivers/usb/gadget/function/uvc.h18
-rw-r--r--drivers/usb/gadget/function/uvc_v4l2.c3
-rw-r--r--drivers/usb/gadget/function/uvc_video.c2
-rw-r--r--drivers/usb/gadget/udc/at91_udc.h2
-rw-r--r--drivers/usb/gadget/udc/atmel_usba_udc.c8
-rw-r--r--drivers/usb/gadget/udc/bdc/bdc_cmd.c2
-rw-r--r--drivers/usb/gadget/udc/bdc/bdc_ep.c2
-rw-r--r--drivers/usb/gadget/udc/dummy_hcd.c5
-rw-r--r--drivers/usb/gadget/udc/fsl_udc_core.c3
-rw-r--r--drivers/usb/gadget/udc/fsl_usb2_udc.h2
-rw-r--r--drivers/usb/gadget/udc/fusb300_udc.c2
-rw-r--r--drivers/usb/gadget/udc/gr_udc.c2
-rw-r--r--drivers/usb/gadget/udc/m66592-udc.c4
-rw-r--r--drivers/usb/gadget/udc/mv_u3d_core.c34
-rw-r--r--drivers/usb/gadget/udc/mv_udc_core.c3
-rw-r--r--drivers/usb/gadget/udc/net2272.c4
-rw-r--r--drivers/usb/gadget/udc/net2280.c6
-rw-r--r--drivers/usb/gadget/udc/omap_udc.h2
-rw-r--r--drivers/usb/gadget/udc/pxa25x_udc.h2
-rw-r--r--drivers/usb/gadget/udc/s3c2410_udc.c4
-rw-r--r--drivers/usb/host/Kconfig5
-rw-r--r--drivers/usb/host/Makefile1
-rw-r--r--drivers/usb/host/ehci-fsl.c3
-rw-r--r--drivers/usb/host/ehci-hub.c14
-rw-r--r--drivers/usb/host/ehci-pci.c3
-rw-r--r--drivers/usb/host/ehci-q.c30
-rw-r--r--drivers/usb/host/ehci-sched.c3
-rw-r--r--drivers/usb/host/ehci-w90x900.c30
-rw-r--r--drivers/usb/host/ehci.h8
-rw-r--r--drivers/usb/host/fsl-mph-dr-of.c2
-rw-r--r--drivers/usb/host/isp1362-hcd.c27
-rw-r--r--drivers/usb/host/ohci-at91.c123
-rw-r--r--drivers/usb/host/ohci-da8xx.c522
-rw-r--r--drivers/usb/host/ohci-hcd.c18
-rw-r--r--drivers/usb/host/ohci-mem.c6
-rw-r--r--drivers/usb/host/ohci-nxp.c7
-rw-r--r--drivers/usb/host/ohci-omap.c39
-rw-r--r--drivers/usb/host/ohci-pxa27x.c36
-rw-r--r--drivers/usb/host/ohci-s3c2410.c47
-rw-r--r--drivers/usb/host/xhci-mem.c16
-rw-r--r--drivers/usb/host/xhci-mtk-sch.c4
-rw-r--r--drivers/usb/host/xhci-mtk.c38
-rw-r--r--drivers/usb/host/xhci-mtk.h1
-rw-r--r--drivers/usb/host/xhci-plat.c9
-rw-r--r--drivers/usb/host/xhci-rcar.c4
-rw-r--r--drivers/usb/host/xhci-rcar.h1
-rw-r--r--drivers/usb/host/xhci-ring.c686
-rw-r--r--drivers/usb/host/xhci.c44
-rw-r--r--drivers/usb/host/xhci.h13
-rw-r--r--drivers/usb/isp1760/isp1760-if.c2
-rw-r--r--drivers/usb/misc/chaoskey.c14
-rw-r--r--drivers/usb/misc/rio500.c2
-rw-r--r--drivers/usb/misc/usbtest.c6
-rw-r--r--drivers/usb/mtu3/Kconfig54
-rw-r--r--drivers/usb/mtu3/Makefile18
-rw-r--r--drivers/usb/mtu3/mtu3.h417
-rw-r--r--drivers/usb/mtu3/mtu3_core.c863
-rw-r--r--drivers/usb/mtu3/mtu3_dr.c379
-rw-r--r--drivers/usb/mtu3/mtu3_dr.h108
-rw-r--r--drivers/usb/mtu3/mtu3_gadget.c730
-rw-r--r--drivers/usb/mtu3/mtu3_gadget_ep0.c881
-rw-r--r--drivers/usb/mtu3/mtu3_host.c294
-rw-r--r--drivers/usb/mtu3/mtu3_hw_regs.h473
-rw-r--r--drivers/usb/mtu3/mtu3_plat.c484
-rw-r--r--drivers/usb/mtu3/mtu3_qmu.c573
-rw-r--r--drivers/usb/mtu3/mtu3_qmu.h43
-rw-r--r--drivers/usb/musb/da8xx.c70
-rw-r--r--drivers/usb/musb/musb_core.c29
-rw-r--r--drivers/usb/musb/musb_core.h6
-rw-r--r--drivers/usb/musb/musb_gadget.c8
-rw-r--r--drivers/usb/musb/musb_host.c2
-rw-r--r--drivers/usb/musb/musb_virthub.c1
-rw-r--r--drivers/usb/musb/omap2430.c6
-rw-r--r--drivers/usb/musb/sunxi.c25
-rw-r--r--drivers/usb/phy/Kconfig1
-rw-r--r--drivers/usb/phy/phy-am335x-control.c2
-rw-r--r--drivers/usb/phy/phy-generic.c9
-rw-r--r--drivers/usb/phy/phy-isp1301-omap.c2
-rw-r--r--drivers/usb/phy/phy-twl6030-usb.c23
-rw-r--r--drivers/usb/renesas_usbhs/fifo.c5
-rw-r--r--drivers/usb/serial/Kconfig10
-rw-r--r--drivers/usb/serial/Makefile1
-rw-r--r--drivers/usb/serial/ch341.c113
-rw-r--r--drivers/usb/serial/cp210x.c411
-rw-r--r--drivers/usb/serial/f81534.c1409
-rw-r--r--drivers/usb/serial/ftdi_sio.c5
-rw-r--r--drivers/usb/serial/io_edgeport.c3
-rw-r--r--drivers/usb/serial/io_ti.c3
-rw-r--r--drivers/usb/serial/kl5kusb105.c35
-rw-r--r--drivers/usb/serial/mos7720.c3
-rw-r--r--drivers/usb/serial/mos7840.c3
-rw-r--r--drivers/usb/serial/opticon.c3
-rw-r--r--drivers/usb/serial/option.c7
-rw-r--r--drivers/usb/serial/quatech2.c3
-rw-r--r--drivers/usb/serial/ssu100.c3
-rw-r--r--drivers/usb/serial/ti_usb_3410_5052.c3
-rw-r--r--drivers/usb/serial/usb_wwan.c3
-rw-r--r--drivers/usb/storage/usb.c1
-rw-r--r--drivers/usb/usbip/vhci_hcd.c3
-rw-r--r--drivers/usb/usbip/vhci_sysfs.c1
-rw-r--r--drivers/usb/usbip/vudc_dev.c45
-rw-r--r--drivers/usb/usbip/vudc_transfer.c8
-rw-r--r--drivers/usb/wusbcore/dev-sysfs.c6
-rw-r--r--drivers/usb/wusbcore/security.c1
-rw-r--r--drivers/usb/wusbcore/wa-nep.c1
-rw-r--r--drivers/usb/wusbcore/wa-xfer.c1
-rw-r--r--drivers/usb/wusbcore/wusbhc.c13
-rw-r--r--include/linux/fsl_devices.h1
-rw-r--r--include/linux/usb.h2
-rw-r--r--include/linux/usb/gadget.h4
-rw-r--r--include/linux/usb/hcd.h19
-rw-r--r--include/uapi/linux/usb/ch9.h24
-rw-r--r--tools/usb/usbip/.gitignore4
-rw-r--r--tools/usb/usbip/src/usbipd.c7
220 files changed, 14119 insertions, 5002 deletions
diff --git a/Documentation/ABI/stable/sysfs-devices b/Documentation/ABI/stable/sysfs-devices
index df449d79b563..35c457f8ce73 100644
--- a/Documentation/ABI/stable/sysfs-devices
+++ b/Documentation/ABI/stable/sysfs-devices
@@ -8,3 +8,17 @@ Description:
8 Any device associated with a device-tree node will have 8 Any device associated with a device-tree node will have
9 an of_path symlink pointing to the corresponding device 9 an of_path symlink pointing to the corresponding device
10 node in /sys/firmware/devicetree/ 10 node in /sys/firmware/devicetree/
11
12What: /sys/devices/*/devspec
13Date: October 2016
14Contact: Device Tree mailing list <devicetree@vger.kernel.org>
15Description:
16 If CONFIG_OF is enabled, then this file is present. When
17 read, it returns full name of the device node.
18
19What: /sys/devices/*/obppath
20Date: October 2016
21Contact: Device Tree mailing list <devicetree@vger.kernel.org>
22Description:
23 If CONFIG_OF is enabled, then this file is present. When
24 read, it returns full name of the device node.
diff --git a/Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2 b/Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2
new file mode 100644
index 000000000000..6212697bbf6f
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-platform-phy-rcar-gen3-usb2
@@ -0,0 +1,15 @@
1What: /sys/devices/platform/<phy-name>/role
2Date: October 2016
3KernelVersion: 4.10
4Contact: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
5Description:
6 This file can be read and write.
7 The file can show/change the phy mode for role swap of usb.
8
9 Write the following strings to change the mode:
10 "host" - switching mode from peripheral to host.
11 "peripheral" - switching mode from host to peripheral.
12
13 Read the file, then it shows the following strings:
14 "host" - The mode is host now.
15 "peripheral" - The mode is peripheral now.
diff --git a/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt b/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt
index af0b903de293..dfc14f71e81f 100644
--- a/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt
+++ b/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt
@@ -5,7 +5,10 @@ connected to a GPIO pin.
5 5
6Required properties: 6Required properties:
7- compatible: Should be "linux,extcon-usb-gpio" 7- compatible: Should be "linux,extcon-usb-gpio"
8
9Either one of id-gpio or vbus-gpio must be present. Both can be present as well.
8- id-gpio: gpio for USB ID pin. See gpio binding. 10- id-gpio: gpio for USB ID pin. See gpio binding.
11- vbus-gpio: gpio for USB VBUS pin.
9 12
10Example: Examples of extcon-usb-gpio node in dra7-evm.dts as listed below: 13Example: Examples of extcon-usb-gpio node in dra7-evm.dts as listed below:
11 extcon_usb1 { 14 extcon_usb1 {
diff --git a/Documentation/devicetree/bindings/phy/meson-usb2-phy.txt b/Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt
index 9da5ea234154..5fa73b9d20f5 100644
--- a/Documentation/devicetree/bindings/phy/meson-usb2-phy.txt
+++ b/Documentation/devicetree/bindings/phy/meson8b-usb2-phy.txt
@@ -1,4 +1,4 @@
1* Amlogic USB2 PHY 1* Amlogic Meson8b and GXBB USB2 PHY
2 2
3Required properties: 3Required properties:
4- compatible: Depending on the platform this should be one of: 4- compatible: Depending on the platform this should be one of:
@@ -16,10 +16,10 @@ Optional properties:
16 16
17Example: 17Example:
18 18
19usb0_phy: usb_phy@0 { 19usb0_phy: usb-phy@c0000000 {
20 compatible = "amlogic,meson-gxbb-usb2-phy"; 20 compatible = "amlogic,meson-gxbb-usb2-phy";
21 #phy-cells = <0>; 21 #phy-cells = <0>;
22 reg = <0x0 0x0 0x0 0x20>; 22 reg = <0x0 0xc0000000 0x0 0x20>;
23 resets = <&reset RESET_USB_OTG>; 23 resets = <&reset RESET_USB_OTG>;
24 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; 24 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
25 clock-names = "usb_general", "usb"; 25 clock-names = "usb_general", "usb";
diff --git a/Documentation/devicetree/bindings/usb/da8xx-usb.txt b/Documentation/devicetree/bindings/usb/da8xx-usb.txt
new file mode 100644
index 000000000000..ccb844aba7d4
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/da8xx-usb.txt
@@ -0,0 +1,43 @@
1TI DA8xx MUSB
2~~~~~~~~~~~~~
3For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
4
5Required properties:
6~~~~~~~~~~~~~~~~~~~~
7 - compatible : Should be set to "ti,da830-musb".
8
9 - reg: Offset and length of the USB controller register set.
10
11 - interrupts: The USB interrupt number.
12
13 - interrupt-names: Should be set to "mc".
14
15 - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg".
16
17 - phys: Phandle for the PHY device
18
19 - phy-names: Should be "usb-phy"
20
21Optional properties:
22~~~~~~~~~~~~~~~~~~~~
23 - vbus-supply: Phandle to a regulator providing the USB bus power.
24
25Example:
26 usb_phy: usb-phy {
27 compatible = "ti,da830-usb-phy";
28 #phy-cells = <0>;
29 status = "okay";
30 };
31 usb0: usb@200000 {
32 compatible = "ti,da830-musb";
33 reg = <0x00200000 0x10000>;
34 interrupts = <58>;
35 interrupt-names = "mc";
36
37 dr_mode = "host";
38 vbus-supply = <&usb_vbus>;
39 phys = <&usb_phy 0>;
40 phy-names = "usb-phy";
41
42 status = "okay";
43 };
diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
index 2c30a5479069..6c7c2bce6d0c 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -12,6 +12,7 @@ Required properties:
12 - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs; 12 - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
13 - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs; 13 - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
14 - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs; 14 - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
15 - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
15 - snps,dwc2: A generic DWC2 USB controller with default parameters. 16 - snps,dwc2: A generic DWC2 USB controller with default parameters.
16- reg : Should contain 1 register range (address and length) 17- reg : Should contain 1 register range (address and length)
17- interrupts : Should contain 1 interrupt 18- interrupts : Should contain 1 interrupt
@@ -25,11 +26,13 @@ Optional properties:
25Refer to phy/phy-bindings.txt for generic phy consumer properties 26Refer to phy/phy-bindings.txt for generic phy consumer properties
26- dr_mode: shall be one of "host", "peripheral" and "otg" 27- dr_mode: shall be one of "host", "peripheral" and "otg"
27 Refer to usb/generic.txt 28 Refer to usb/generic.txt
28- g-use-dma: enable dma usage in gadget driver.
29- g-rx-fifo-size: size of rx fifo size in gadget mode. 29- g-rx-fifo-size: size of rx fifo size in gadget mode.
30- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode. 30- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
31- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode. 31- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
32 32
33Deprecated properties:
34- g-use-dma: gadget DMA mode is automatically detected
35
33Example: 36Example:
34 37
35 usb@101c0000 { 38 usb@101c0000 {
diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
new file mode 100644
index 000000000000..e049d199bf0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt
@@ -0,0 +1,87 @@
1The device node for Mediatek USB3.0 DRD controller
2
3Required properties:
4 - compatible : should be "mediatek,mt8173-mtu3"
5 - reg : specifies physical base address and size of the registers
6 - reg-names: should be "mac" for device IP and "ippc" for IP port control
7 - interrupts : interrupt used by the device IP
8 - power-domains : a phandle to USB power domain node to control USB's
9 mtcmos
10 - vusb33-supply : regulator of USB avdd3.3v
11 - clocks : a list of phandle + clock-specifier pairs, one for each
12 entry in clock-names
13 - clock-names : must contain "sys_ck" for clock of controller;
14 "wakeup_deb_p0" and "wakeup_deb_p1" are optional, they are
15 depends on "mediatek,enable-wakeup"
16 - phys : a list of phandle + phy specifier pairs
17 - dr_mode : should be one of "host", "peripheral" or "otg",
18 refer to usb/generic.txt
19
20Optional properties:
21 - #address-cells, #size-cells : should be '2' if the device has sub-nodes
22 with 'reg' property
23 - ranges : allows valid 1:1 translation between child's address space and
24 parent's address space
25 - extcon : external connector for vbus and idpin changes detection, needed
26 when supports dual-role mode.
27 - vbus-supply : reference to the VBUS regulator, needed when supports
28 dual-role mode.
29 - pinctl-names : a pinctrl state named "default" must be defined,
30 "id_float" and "id_ground" are optinal which depends on
31 "mediatek,enable-manual-drd"
32 - pinctrl-0 : pin control group
33 See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt
34
35 - maximum-speed : valid arguments are "super-speed", "high-speed" and
36 "full-speed"; refer to usb/generic.txt
37 - enable-manual-drd : supports manual dual-role switch via debugfs; usually
38 used when receptacle is TYPE-A and also wants to support dual-role
39 mode.
40 - mediatek,enable-wakeup : supports ip sleep wakeup used by host mode
41 - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
42 control register, it depends on "mediatek,enable-wakeup".
43
44Sub-nodes:
45The xhci should be added as subnode to mtu3 as shown in the following example
46if host mode is enabled. The DT binding details of xhci can be found in:
47Documentation/devicetree/bindings/usb/mt8173-xhci.txt
48
49Example:
50ssusb: usb@11271000 {
51 compatible = "mediatek,mt8173-mtu3";
52 reg = <0 0x11271000 0 0x3000>,
53 <0 0x11280700 0 0x0100>;
54 reg-names = "mac", "ippc";
55 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
56 phys = <&phy_port0 PHY_TYPE_USB3>,
57 <&phy_port1 PHY_TYPE_USB2>;
58 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
59 clocks = <&topckgen CLK_TOP_USB30_SEL>,
60 <&pericfg CLK_PERI_USB0>,
61 <&pericfg CLK_PERI_USB1>;
62 clock-names = "sys_ck",
63 "wakeup_deb_p0",
64 "wakeup_deb_p1";
65 vusb33-supply = <&mt6397_vusb_reg>;
66 vbus-supply = <&usb_p0_vbus>;
67 extcon = <&extcon_usb>;
68 dr_mode = "otg";
69 mediatek,enable-wakeup;
70 mediatek,syscon-wakeup = <&pericfg>;
71 #address-cells = <2>;
72 #size-cells = <2>;
73 ranges;
74 status = "disabled";
75
76 usb_host: xhci@11270000 {
77 compatible = "mediatek,mt8173-xhci";
78 reg = <0 0x11270000 0 0x1000>;
79 reg-names = "mac";
80 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
81 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
82 clocks = <&topckgen CLK_TOP_USB30_SEL>;
83 clock-names = "sys_ck";
84 vusb33-supply = <&mt6397_vusb_reg>;
85 status = "disabled";
86 };
87};
diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
index b3a7ffa48852..2a930bd52b94 100644
--- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
@@ -2,10 +2,18 @@ MT8173 xHCI
2 2
3The device node for Mediatek SOC USB3.0 host controller 3The device node for Mediatek SOC USB3.0 host controller
4 4
5There are two scenarios: the first one only supports xHCI driver;
6the second one supports dual-role mode, and the host is based on xHCI
7driver. Take account of backward compatibility, we divide bindings
8into two parts.
9
101st: only supports xHCI driver
11------------------------------------------------------------------------
12
5Required properties: 13Required properties:
6 - compatible : should contain "mediatek,mt8173-xhci" 14 - compatible : should contain "mediatek,mt8173-xhci"
7 - reg : specifies physical base address and size of the registers, 15 - reg : specifies physical base address and size of the registers
8 the first one for MAC, the second for IPPC 16 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
9 - interrupts : interrupt used by the controller 17 - interrupts : interrupt used by the controller
10 - power-domains : a phandle to USB power domain node to control USB's 18 - power-domains : a phandle to USB power domain node to control USB's
11 mtcmos 19 mtcmos
@@ -27,12 +35,16 @@ Optional properties:
27 control register, it depends on "mediatek,wakeup-src". 35 control register, it depends on "mediatek,wakeup-src".
28 - vbus-supply : reference to the VBUS regulator; 36 - vbus-supply : reference to the VBUS regulator;
29 - usb3-lpm-capable : supports USB3.0 LPM 37 - usb3-lpm-capable : supports USB3.0 LPM
38 - pinctrl-names : a pinctrl state named "default" must be defined
39 - pinctrl-0 : pin control group
40 See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt
30 41
31Example: 42Example:
32usb30: usb@11270000 { 43usb30: usb@11270000 {
33 compatible = "mediatek,mt8173-xhci"; 44 compatible = "mediatek,mt8173-xhci";
34 reg = <0 0x11270000 0 0x1000>, 45 reg = <0 0x11270000 0 0x1000>,
35 <0 0x11280700 0 0x0100>; 46 <0 0x11280700 0 0x0100>;
47 reg-names = "mac", "ippc";
36 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 48 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
37 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 49 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
38 clocks = <&topckgen CLK_TOP_USB30_SEL>, 50 clocks = <&topckgen CLK_TOP_USB30_SEL>,
@@ -49,3 +61,41 @@ usb30: usb@11270000 {
49 mediatek,syscon-wakeup = <&pericfg>; 61 mediatek,syscon-wakeup = <&pericfg>;
50 mediatek,wakeup-src = <1>; 62 mediatek,wakeup-src = <1>;
51}; 63};
64
652nd: dual-role mode with xHCI driver
66------------------------------------------------------------------------
67
68In the case, xhci is added as subnode to mtu3. An example and the DT binding
69details of mtu3 can be found in:
70Documentation/devicetree/bindings/usb/mtu3.txt
71
72Required properties:
73 - compatible : should contain "mediatek,mt8173-xhci"
74 - reg : specifies physical base address and size of the registers
75 - reg-names: should be "mac" for xHCI MAC
76 - interrupts : interrupt used by the host controller
77 - power-domains : a phandle to USB power domain node to control USB's
78 mtcmos
79 - vusb33-supply : regulator of USB avdd3.3v
80
81 - clocks : a list of phandle + clock-specifier pairs, one for each
82 entry in clock-names
83 - clock-names : must be
84 "sys_ck": for clock of xHCI MAC
85
86Optional properties:
87 - vbus-supply : reference to the VBUS regulator;
88 - usb3-lpm-capable : supports USB3.0 LPM
89
90Example:
91usb30: usb@11270000 {
92 compatible = "mediatek,mt8173-xhci";
93 reg = <0 0x11270000 0 0x1000>;
94 reg-names = "mac";
95 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
96 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
97 clocks = <&topckgen CLK_TOP_USB30_SEL>;
98 clock-names = "sys_ck";
99 vusb33-supply = <&mt6397_vusb_reg>;
100 usb3-lpm-capable;
101};
diff --git a/Documentation/devicetree/bindings/usb/ohci-da8xx.txt b/Documentation/devicetree/bindings/usb/ohci-da8xx.txt
new file mode 100644
index 000000000000..2dc8f67eda39
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ohci-da8xx.txt
@@ -0,0 +1,23 @@
1DA8XX USB OHCI controller
2
3Required properties:
4
5 - compatible: Should be "ti,da830-ohci"
6 - reg: Should contain one register range i.e. start and length
7 - interrupts: Description of the interrupt line
8 - phys: Phandle for the PHY device
9 - phy-names: Should be "usb-phy"
10
11Optional properties:
12 - vbus-supply: phandle of regulator that controls vbus power / over-current
13
14Example:
15
16ohci: usb@0225000 {
17 compatible = "ti,da830-ohci";
18 reg = <0x225000 0x1000>;
19 interrupts = <59>;
20 phys = <&usb_phy 1>;
21 phy-names = "usb-phy";
22 vbus-supply = <&reg_usb_ohci>;
23};
diff --git a/Documentation/devicetree/bindings/usb/s3c2410-usb.txt b/Documentation/devicetree/bindings/usb/s3c2410-usb.txt
new file mode 100644
index 000000000000..e45b38ce2986
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/s3c2410-usb.txt
@@ -0,0 +1,22 @@
1Samsung S3C2410 and compatible SoC USB controller
2
3OHCI
4
5Required properties:
6 - compatible: should be "samsung,s3c2410-ohci" for USB host controller
7 - reg: address and lenght of the controller memory mapped region
8 - interrupts: interrupt number for the USB OHCI controller
9 - clocks: Should reference the bus and host clocks
10 - clock-names: Should contain two strings
11 "usb-bus-host" for the USB bus clock
12 "usb-host" for the USB host clock
13
14Example:
15
16usb0: ohci@49000000 {
17 compatible = "samsung,s3c2410-ohci";
18 reg = <0x49000000 0x100>;
19 interrupts = <0 0 26 3>;
20 clocks = <&clocks UCLK>, <&clocks HCLK_USBH>;
21 clock-names = "usb-bus-host", "usb-host";
22};
diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
index 966885c636d0..0b7d8576001c 100644
--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
@@ -11,6 +11,7 @@ Required properties:
11 - "renesas,xhci-r8a7791" for r8a7791 SoC 11 - "renesas,xhci-r8a7791" for r8a7791 SoC
12 - "renesas,xhci-r8a7793" for r8a7793 SoC 12 - "renesas,xhci-r8a7793" for r8a7793 SoC
13 - "renesas,xhci-r8a7795" for r8a7795 SoC 13 - "renesas,xhci-r8a7795" for r8a7795 SoC
14 - "renesas,xhci-r8a7796" for r8a7796 SoC
14 - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 compatible device 15 - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 compatible device
15 - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device 16 - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
16 - "xhci-platform" (deprecated) 17 - "xhci-platform" (deprecated)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index a935523a1eb8..7c2dc19925a1 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -204,7 +204,6 @@
204 g-np-tx-fifo-size = <16>; 204 g-np-tx-fifo-size = <16>;
205 g-rx-fifo-size = <275>; 205 g-rx-fifo-size = <275>;
206 g-tx-fifo-size = <256 128 128 64 64 32>; 206 g-tx-fifo-size = <256 128 128 64 64 32>;
207 g-use-dma;
208 status = "disabled"; 207 status = "disabled";
209 }; 208 };
210 209
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 17ec2e2d7a60..74a749c566ee 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -596,7 +596,6 @@
596 g-np-tx-fifo-size = <16>; 596 g-np-tx-fifo-size = <16>;
597 g-rx-fifo-size = <275>; 597 g-rx-fifo-size = <275>;
598 g-tx-fifo-size = <256 128 128 64 64 32>; 598 g-tx-fifo-size = <256 128 128 64 64 32>;
599 g-use-dma;
600 phys = <&usbphy0>; 599 phys = <&usbphy0>;
601 phy-names = "usb2-phy"; 600 phy-names = "usb2-phy";
602 status = "disabled"; 601 status = "disabled";
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index e15beb3c671e..8fbd3c806fa0 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -181,7 +181,6 @@
181 g-np-tx-fifo-size = <16>; 181 g-np-tx-fifo-size = <16>;
182 g-rx-fifo-size = <275>; 182 g-rx-fifo-size = <275>;
183 g-tx-fifo-size = <256 128 128 64 64 32>; 183 g-tx-fifo-size = <256 128 128 64 64 32>;
184 g-use-dma;
185 phys = <&usbphy0>; 184 phys = <&usbphy0>;
186 phy-names = "usb2-phy"; 185 phy-names = "usb2-phy";
187 status = "disabled"; 186 status = "disabled";
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 17839db585d5..e0ea60382087 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -747,7 +747,6 @@
747 clocks = <&sys_ctrl HI6220_USBOTG_HCLK>; 747 clocks = <&sys_ctrl HI6220_USBOTG_HCLK>;
748 clock-names = "otg"; 748 clock-names = "otg";
749 dr_mode = "otg"; 749 dr_mode = "otg";
750 g-use-dma;
751 g-rx-fifo-size = <512>; 750 g-rx-fifo-size = <512>;
752 g-np-tx-fifo-size = <128>; 751 g-np-tx-fifo-size = <128>;
753 g-tx-fifo-size = <128 128 128 128 128 128>; 752 g-tx-fifo-size = <128 128 128 128 128 128>;
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 2a7f731c7759..0ecaad4333a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -34,15 +34,6 @@
34 34
35 chosen { }; 35 chosen { };
36 36
37 usb_p1_vbus: regulator@0 {
38 compatible = "regulator-fixed";
39 regulator-name = "usb_vbus";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
42 gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
43 enable-active-high;
44 };
45
46 connector { 37 connector {
47 compatible = "hdmi-connector"; 38 compatible = "hdmi-connector";
48 label = "hdmi"; 39 label = "hdmi";
@@ -54,6 +45,29 @@
54 }; 45 };
55 }; 46 };
56 }; 47 };
48
49 extcon_usb: extcon_iddig {
50 compatible = "linux,extcon-usb-gpio";
51 id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
52 };
53
54 usb_p1_vbus: regulator@0 {
55 compatible = "regulator-fixed";
56 regulator-name = "usb_vbus";
57 regulator-min-microvolt = <5000000>;
58 regulator-max-microvolt = <5000000>;
59 gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
60 enable-active-high;
61 };
62
63 usb_p0_vbus: regulator@1 {
64 compatible = "regulator-fixed";
65 regulator-name = "vbus";
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
68 gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
69 enable-active-high;
70 };
57}; 71};
58 72
59&cec { 73&cec {
@@ -243,6 +257,20 @@
243 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 257 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
244 }; 258 };
245 }; 259 };
260
261 usb_id_pins_float: usb_iddig_pull_up {
262 pins_iddig {
263 pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
264 bias-pull-up;
265 };
266 };
267
268 usb_id_pins_ground: usb_iddig_pull_down {
269 pins_iddig {
270 pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
271 bias-pull-down;
272 };
273 };
246}; 274};
247 275
248&pwm0 { 276&pwm0 {
@@ -469,12 +497,25 @@
469 status = "okay"; 497 status = "okay";
470}; 498};
471 499
500&ssusb {
501 vusb33-supply = <&mt6397_vusb_reg>;
502 vbus-supply = <&usb_p0_vbus>;
503 extcon = <&extcon_usb>;
504 dr_mode = "otg";
505 mediatek,enable-wakeup;
506 pinctrl-names = "default", "id_float", "id_ground";
507 pinctrl-0 = <&usb_id_pins_float>;
508 pinctrl-1 = <&usb_id_pins_float>;
509 pinctrl-2 = <&usb_id_pins_ground>;
510 status = "okay";
511};
512
472&uart0 { 513&uart0 {
473 status = "okay"; 514 status = "okay";
474}; 515};
475 516
476&usb30 { 517&usb_host {
477 vusb33-supply = <&mt6397_vusb_reg>; 518 vusb33-supply = <&mt6397_vusb_reg>;
478 vbus-supply = <&usb_p1_vbus>; 519 vbus-supply = <&usb_p1_vbus>;
479 mediatek,wakeup-src = <1>; 520 status = "okay";
480}; 521};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 1c71e256601d..c2d588ca59b7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -707,11 +707,14 @@
707 status = "disabled"; 707 status = "disabled";
708 }; 708 };
709 709
710 usb30: usb@11270000 { 710 ssusb: usb@11271000 {
711 compatible = "mediatek,mt8173-xhci"; 711 compatible = "mediatek,mt8173-mtu3";
712 reg = <0 0x11270000 0 0x1000>, 712 reg = <0 0x11271000 0 0x3000>,
713 <0 0x11280700 0 0x0100>; 713 <0 0x11280700 0 0x0100>;
714 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 714 reg-names = "mac", "ippc";
715 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
716 phys = <&phy_port0 PHY_TYPE_USB3>,
717 <&phy_port1 PHY_TYPE_USB2>;
715 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 718 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
716 clocks = <&topckgen CLK_TOP_USB30_SEL>, 719 clocks = <&topckgen CLK_TOP_USB30_SEL>,
717 <&pericfg CLK_PERI_USB0>, 720 <&pericfg CLK_PERI_USB0>,
@@ -719,10 +722,22 @@
719 clock-names = "sys_ck", 722 clock-names = "sys_ck",
720 "wakeup_deb_p0", 723 "wakeup_deb_p0",
721 "wakeup_deb_p1"; 724 "wakeup_deb_p1";
722 phys = <&phy_port0 PHY_TYPE_USB3>,
723 <&phy_port1 PHY_TYPE_USB2>;
724 mediatek,syscon-wakeup = <&pericfg>; 725 mediatek,syscon-wakeup = <&pericfg>;
725 status = "okay"; 726 #address-cells = <2>;
727 #size-cells = <2>;
728 ranges;
729 status = "disabled";
730
731 usb_host: xhci@11270000 {
732 compatible = "mediatek,mt8173-xhci";
733 reg = <0 0x11270000 0 0x1000>;
734 reg-names = "mac";
735 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
736 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
737 clocks = <&topckgen CLK_TOP_USB30_SEL>;
738 clock-names = "sys_ck";
739 status = "disabled";
740 };
726 }; 741 };
727 742
728 u3phy: usb-phy@11290000 { 743 u3phy: usb-phy@11290000 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 0fcb2147c9f9..df231c4df5a5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -537,7 +537,6 @@
537 g-np-tx-fifo-size = <16>; 537 g-np-tx-fifo-size = <16>;
538 g-rx-fifo-size = <275>; 538 g-rx-fifo-size = <275>;
539 g-tx-fifo-size = <256 128 128 64 64 32>; 539 g-tx-fifo-size = <256 128 128 64 64 32>;
540 g-use-dma;
541 status = "disabled"; 540 status = "disabled";
542 }; 541 };
543 542
diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb-gpio.c
index a27d350f69e3..d589c5feff3d 100644
--- a/drivers/extcon/extcon-usb-gpio.c
+++ b/drivers/extcon/extcon-usb-gpio.c
@@ -24,7 +24,6 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/of_gpio.h> 25#include <linux/of_gpio.h>
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/pm_wakeirq.h>
28#include <linux/slab.h> 27#include <linux/slab.h>
29#include <linux/workqueue.h> 28#include <linux/workqueue.h>
30#include <linux/acpi.h> 29#include <linux/acpi.h>
@@ -36,7 +35,9 @@ struct usb_extcon_info {
36 struct extcon_dev *edev; 35 struct extcon_dev *edev;
37 36
38 struct gpio_desc *id_gpiod; 37 struct gpio_desc *id_gpiod;
38 struct gpio_desc *vbus_gpiod;
39 int id_irq; 39 int id_irq;
40 int vbus_irq;
40 41
41 unsigned long debounce_jiffies; 42 unsigned long debounce_jiffies;
42 struct delayed_work wq_detcable; 43 struct delayed_work wq_detcable;
@@ -48,31 +49,47 @@ static const unsigned int usb_extcon_cable[] = {
48 EXTCON_NONE, 49 EXTCON_NONE,
49}; 50};
50 51
52/*
53 * "USB" = VBUS and "USB-HOST" = !ID, so we have:
54 * Both "USB" and "USB-HOST" can't be set as active at the
55 * same time so if "USB-HOST" is active (i.e. ID is 0) we keep "USB" inactive
56 * even if VBUS is on.
57 *
58 * State | ID | VBUS
59 * ----------------------------------------
60 * [1] USB | H | H
61 * [2] none | H | L
62 * [3] USB-HOST | L | H
63 * [4] USB-HOST | L | L
64 *
65 * In case we have only one of these signals:
66 * - VBUS only - we want to distinguish between [1] and [2], so ID is always 1.
67 * - ID only - we want to distinguish between [1] and [4], so VBUS = ID.
68*/
51static void usb_extcon_detect_cable(struct work_struct *work) 69static void usb_extcon_detect_cable(struct work_struct *work)
52{ 70{
53 int id; 71 int id, vbus;
54 struct usb_extcon_info *info = container_of(to_delayed_work(work), 72 struct usb_extcon_info *info = container_of(to_delayed_work(work),
55 struct usb_extcon_info, 73 struct usb_extcon_info,
56 wq_detcable); 74 wq_detcable);
57 75
58 /* check ID and update cable state */ 76 /* check ID and VBUS and update cable state */
59 id = gpiod_get_value_cansleep(info->id_gpiod); 77 id = info->id_gpiod ?
60 if (id) { 78 gpiod_get_value_cansleep(info->id_gpiod) : 1;
61 /* 79 vbus = info->vbus_gpiod ?
62 * ID = 1 means USB HOST cable detached. 80 gpiod_get_value_cansleep(info->vbus_gpiod) : id;
63 * As we don't have event for USB peripheral cable attached, 81
64 * we simulate USB peripheral attach here. 82 /* at first we clean states which are no longer active */
65 */ 83 if (id)
66 extcon_set_state_sync(info->edev, EXTCON_USB_HOST, false); 84 extcon_set_state_sync(info->edev, EXTCON_USB_HOST, false);
67 extcon_set_state_sync(info->edev, EXTCON_USB, true); 85 if (!vbus)
68 } else {
69 /*
70 * ID = 0 means USB HOST cable attached.
71 * As we don't have event for USB peripheral cable detached,
72 * we simulate USB peripheral detach here.
73 */
74 extcon_set_state_sync(info->edev, EXTCON_USB, false); 86 extcon_set_state_sync(info->edev, EXTCON_USB, false);
87
88 if (!id) {
75 extcon_set_state_sync(info->edev, EXTCON_USB_HOST, true); 89 extcon_set_state_sync(info->edev, EXTCON_USB_HOST, true);
90 } else {
91 if (vbus)
92 extcon_set_state_sync(info->edev, EXTCON_USB, true);
76 } 93 }
77} 94}
78 95
@@ -101,12 +118,21 @@ static int usb_extcon_probe(struct platform_device *pdev)
101 return -ENOMEM; 118 return -ENOMEM;
102 119
103 info->dev = dev; 120 info->dev = dev;
104 info->id_gpiod = devm_gpiod_get(&pdev->dev, "id", GPIOD_IN); 121 info->id_gpiod = devm_gpiod_get_optional(&pdev->dev, "id", GPIOD_IN);
105 if (IS_ERR(info->id_gpiod)) { 122 info->vbus_gpiod = devm_gpiod_get_optional(&pdev->dev, "vbus",
106 dev_err(dev, "failed to get ID GPIO\n"); 123 GPIOD_IN);
107 return PTR_ERR(info->id_gpiod); 124
125 if (!info->id_gpiod && !info->vbus_gpiod) {
126 dev_err(dev, "failed to get gpios\n");
127 return -ENODEV;
108 } 128 }
109 129
130 if (IS_ERR(info->id_gpiod))
131 return PTR_ERR(info->id_gpiod);
132
133 if (IS_ERR(info->vbus_gpiod))
134 return PTR_ERR(info->vbus_gpiod);
135
110 info->edev = devm_extcon_dev_allocate(dev, usb_extcon_cable); 136 info->edev = devm_extcon_dev_allocate(dev, usb_extcon_cable);
111 if (IS_ERR(info->edev)) { 137 if (IS_ERR(info->edev)) {
112 dev_err(dev, "failed to allocate extcon device\n"); 138 dev_err(dev, "failed to allocate extcon device\n");
@@ -119,32 +145,56 @@ static int usb_extcon_probe(struct platform_device *pdev)
119 return ret; 145 return ret;
120 } 146 }
121 147
122 ret = gpiod_set_debounce(info->id_gpiod, 148 if (info->id_gpiod)
123 USB_GPIO_DEBOUNCE_MS * 1000); 149 ret = gpiod_set_debounce(info->id_gpiod,
150 USB_GPIO_DEBOUNCE_MS * 1000);
151 if (!ret && info->vbus_gpiod)
152 ret = gpiod_set_debounce(info->vbus_gpiod,
153 USB_GPIO_DEBOUNCE_MS * 1000);
154
124 if (ret < 0) 155 if (ret < 0)
125 info->debounce_jiffies = msecs_to_jiffies(USB_GPIO_DEBOUNCE_MS); 156 info->debounce_jiffies = msecs_to_jiffies(USB_GPIO_DEBOUNCE_MS);
126 157
127 INIT_DELAYED_WORK(&info->wq_detcable, usb_extcon_detect_cable); 158 INIT_DELAYED_WORK(&info->wq_detcable, usb_extcon_detect_cable);
128 159
129 info->id_irq = gpiod_to_irq(info->id_gpiod); 160 if (info->id_gpiod) {
130 if (info->id_irq < 0) { 161 info->id_irq = gpiod_to_irq(info->id_gpiod);
131 dev_err(dev, "failed to get ID IRQ\n"); 162 if (info->id_irq < 0) {
132 return info->id_irq; 163 dev_err(dev, "failed to get ID IRQ\n");
164 return info->id_irq;
165 }
166
167 ret = devm_request_threaded_irq(dev, info->id_irq, NULL,
168 usb_irq_handler,
169 IRQF_TRIGGER_RISING |
170 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
171 pdev->name, info);
172 if (ret < 0) {
173 dev_err(dev, "failed to request handler for ID IRQ\n");
174 return ret;
175 }
133 } 176 }
134 177
135 ret = devm_request_threaded_irq(dev, info->id_irq, NULL, 178 if (info->vbus_gpiod) {
136 usb_irq_handler, 179 info->vbus_irq = gpiod_to_irq(info->vbus_gpiod);
137 IRQF_TRIGGER_RISING | 180 if (info->vbus_irq < 0) {
138 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 181 dev_err(dev, "failed to get VBUS IRQ\n");
139 pdev->name, info); 182 return info->vbus_irq;
140 if (ret < 0) { 183 }
141 dev_err(dev, "failed to request handler for ID IRQ\n"); 184
142 return ret; 185 ret = devm_request_threaded_irq(dev, info->vbus_irq, NULL,
186 usb_irq_handler,
187 IRQF_TRIGGER_RISING |
188 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
189 pdev->name, info);
190 if (ret < 0) {
191 dev_err(dev, "failed to request handler for VBUS IRQ\n");
192 return ret;
193 }
143 } 194 }
144 195
145 platform_set_drvdata(pdev, info); 196 platform_set_drvdata(pdev, info);
146 device_init_wakeup(dev, true); 197 device_init_wakeup(dev, true);
147 dev_pm_set_wake_irq(dev, info->id_irq);
148 198
149 /* Perform initial detection */ 199 /* Perform initial detection */
150 usb_extcon_detect_cable(&info->wq_detcable.work); 200 usb_extcon_detect_cable(&info->wq_detcable.work);
@@ -157,8 +207,6 @@ static int usb_extcon_remove(struct platform_device *pdev)
157 struct usb_extcon_info *info = platform_get_drvdata(pdev); 207 struct usb_extcon_info *info = platform_get_drvdata(pdev);
158 208
159 cancel_delayed_work_sync(&info->wq_detcable); 209 cancel_delayed_work_sync(&info->wq_detcable);
160
161 dev_pm_clear_wake_irq(&pdev->dev);
162 device_init_wakeup(&pdev->dev, false); 210 device_init_wakeup(&pdev->dev, false);
163 211
164 return 0; 212 return 0;
@@ -170,12 +218,32 @@ static int usb_extcon_suspend(struct device *dev)
170 struct usb_extcon_info *info = dev_get_drvdata(dev); 218 struct usb_extcon_info *info = dev_get_drvdata(dev);
171 int ret = 0; 219 int ret = 0;
172 220
221 if (device_may_wakeup(dev)) {
222 if (info->id_gpiod) {
223 ret = enable_irq_wake(info->id_irq);
224 if (ret)
225 return ret;
226 }
227 if (info->vbus_gpiod) {
228 ret = enable_irq_wake(info->vbus_irq);
229 if (ret) {
230 if (info->id_gpiod)
231 disable_irq_wake(info->id_irq);
232
233 return ret;
234 }
235 }
236 }
237
173 /* 238 /*
174 * We don't want to process any IRQs after this point 239 * We don't want to process any IRQs after this point
175 * as GPIOs used behind I2C subsystem might not be 240 * as GPIOs used behind I2C subsystem might not be
176 * accessible until resume completes. So disable IRQ. 241 * accessible until resume completes. So disable IRQ.
177 */ 242 */
178 disable_irq(info->id_irq); 243 if (info->id_gpiod)
244 disable_irq(info->id_irq);
245 if (info->vbus_gpiod)
246 disable_irq(info->vbus_irq);
179 247
180 return ret; 248 return ret;
181} 249}
@@ -185,7 +253,28 @@ static int usb_extcon_resume(struct device *dev)
185 struct usb_extcon_info *info = dev_get_drvdata(dev); 253 struct usb_extcon_info *info = dev_get_drvdata(dev);
186 int ret = 0; 254 int ret = 0;
187 255
188 enable_irq(info->id_irq); 256 if (device_may_wakeup(dev)) {
257 if (info->id_gpiod) {
258 ret = disable_irq_wake(info->id_irq);
259 if (ret)
260 return ret;
261 }
262 if (info->vbus_gpiod) {
263 ret = disable_irq_wake(info->vbus_irq);
264 if (ret) {
265 if (info->id_gpiod)
266 enable_irq_wake(info->id_irq);
267
268 return ret;
269 }
270 }
271 }
272
273 if (info->id_gpiod)
274 enable_irq(info->id_irq);
275 if (info->vbus_gpiod)
276 enable_irq(info->vbus_irq);
277
189 if (!device_may_wakeup(dev)) 278 if (!device_may_wakeup(dev))
190 queue_delayed_work(system_power_efficient_wq, 279 queue_delayed_work(system_power_efficient_wq,
191 &info->wq_detcable, 0); 280 &info->wq_detcable, 0);
diff --git a/drivers/media/usb/usbtv/usbtv-core.c b/drivers/media/usb/usbtv/usbtv-core.c
index dc76fd41e00f..ceb953be0770 100644
--- a/drivers/media/usb/usbtv/usbtv-core.c
+++ b/drivers/media/usb/usbtv/usbtv-core.c
@@ -71,6 +71,7 @@ static int usbtv_probe(struct usb_interface *intf,
71 int size; 71 int size;
72 struct device *dev = &intf->dev; 72 struct device *dev = &intf->dev;
73 struct usbtv *usbtv; 73 struct usbtv *usbtv;
74 struct usb_host_endpoint *ep;
74 75
75 /* Checks that the device is what we think it is. */ 76 /* Checks that the device is what we think it is. */
76 if (intf->num_altsetting != 2) 77 if (intf->num_altsetting != 2)
@@ -78,10 +79,12 @@ static int usbtv_probe(struct usb_interface *intf,
78 if (intf->altsetting[1].desc.bNumEndpoints != 4) 79 if (intf->altsetting[1].desc.bNumEndpoints != 4)
79 return -ENODEV; 80 return -ENODEV;
80 81
82 ep = &intf->altsetting[1].endpoint[0];
83
81 /* Packet size is split into 11 bits of base size and count of 84 /* Packet size is split into 11 bits of base size and count of
82 * extra multiplies of it.*/ 85 * extra multiplies of it.*/
83 size = usb_endpoint_maxp(&intf->altsetting[1].endpoint[0].desc); 86 size = usb_endpoint_maxp(&ep->desc);
84 size = (size & 0x07ff) * (((size & 0x1800) >> 11) + 1); 87 size = (size & 0x07ff) * usb_endpoint_maxp_mult(&ep->desc);
85 88
86 /* Device structure */ 89 /* Device structure */
87 usbtv = kzalloc(sizeof(struct usbtv), GFP_KERNEL); 90 usbtv = kzalloc(sizeof(struct usbtv), GFP_KERNEL);
diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c
index b5589d5f5da4..f3c1c852e401 100644
--- a/drivers/media/usb/uvc/uvc_video.c
+++ b/drivers/media/usb/uvc/uvc_video.c
@@ -1467,6 +1467,7 @@ static unsigned int uvc_endpoint_max_bpi(struct usb_device *dev,
1467 struct usb_host_endpoint *ep) 1467 struct usb_host_endpoint *ep)
1468{ 1468{
1469 u16 psize; 1469 u16 psize;
1470 u16 mult;
1470 1471
1471 switch (dev->speed) { 1472 switch (dev->speed) {
1472 case USB_SPEED_SUPER: 1473 case USB_SPEED_SUPER:
@@ -1474,7 +1475,8 @@ static unsigned int uvc_endpoint_max_bpi(struct usb_device *dev,
1474 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval); 1475 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
1475 case USB_SPEED_HIGH: 1476 case USB_SPEED_HIGH:
1476 psize = usb_endpoint_maxp(&ep->desc); 1477 psize = usb_endpoint_maxp(&ep->desc);
1477 return (psize & 0x07ff) * (1 + ((psize >> 11) & 3)); 1478 mult = usb_endpoint_maxp_mult(&ep->desc);
1479 return (psize & 0x07ff) * mult;
1478 case USB_SPEED_WIRELESS: 1480 case USB_SPEED_WIRELESS:
1479 psize = usb_endpoint_maxp(&ep->desc); 1481 psize = usb_endpoint_maxp(&ep->desc);
1480 return psize; 1482 return psize;
@@ -1551,7 +1553,7 @@ static int uvc_init_video_bulk(struct uvc_streaming *stream,
1551 u16 psize; 1553 u16 psize;
1552 u32 size; 1554 u32 size;
1553 1555
1554 psize = usb_endpoint_maxp(&ep->desc) & 0x7ff; 1556 psize = usb_endpoint_maxp(&ep->desc);
1555 size = stream->ctrl.dwMaxPayloadTransferSize; 1557 size = stream->ctrl.dwMaxPayloadTransferSize;
1556 stream->bulk.max_payload_size = size; 1558 stream->bulk.max_payload_size = size;
1557 1559
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fe00f9134d51..e8eb7f225a88 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -129,16 +129,6 @@ config PHY_MIPHY28LP
129 Enable this to support the miphy transceiver (for SATA/PCIE/USB3) 129 Enable this to support the miphy transceiver (for SATA/PCIE/USB3)
130 that is part of STMicroelectronics STiH407 SoC. 130 that is part of STMicroelectronics STiH407 SoC.
131 131
132config PHY_MIPHY365X
133 tristate "STMicroelectronics MIPHY365X PHY driver for STiH41x series"
134 depends on ARCH_STI
135 depends on HAS_IOMEM
136 depends on OF
137 select GENERIC_PHY
138 help
139 Enable this to support the miphy transceiver (for SATA/PCIE)
140 that is part of STMicroelectronics STiH41x SoC series.
141
142config PHY_RCAR_GEN2 132config PHY_RCAR_GEN2
143 tristate "Renesas R-Car generation 2 USB PHY driver" 133 tristate "Renesas R-Car generation 2 USB PHY driver"
144 depends on ARCH_RENESAS 134 depends on ARCH_RENESAS
@@ -373,7 +363,9 @@ config PHY_ROCKCHIP_INNO_USB2
373 tristate "Rockchip INNO USB2PHY Driver" 363 tristate "Rockchip INNO USB2PHY Driver"
374 depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF 364 depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF
375 depends on COMMON_CLK 365 depends on COMMON_CLK
366 depends on USB_SUPPORT
376 select GENERIC_PHY 367 select GENERIC_PHY
368 select USB_COMMON
377 help 369 help
378 Support for Rockchip USB2.0 PHY with Innosilicon IP block. 370 Support for Rockchip USB2.0 PHY with Innosilicon IP block.
379 371
@@ -438,14 +430,6 @@ config PHY_STIH407_USB
438 Enable this support to enable the picoPHY device used by USB2 430 Enable this support to enable the picoPHY device used by USB2
439 and USB3 controllers on STMicroelectronics STiH407 SoC families. 431 and USB3 controllers on STMicroelectronics STiH407 SoC families.
440 432
441config PHY_STIH41X_USB
442 tristate "STMicroelectronics USB2 PHY driver for STiH41x series"
443 depends on ARCH_STI
444 select GENERIC_PHY
445 help
446 Enable this to support the USB transceiver that is part of
447 STMicroelectronics STiH41x SoC series.
448
449config PHY_QCOM_UFS 433config PHY_QCOM_UFS
450 tristate "Qualcomm UFS PHY driver" 434 tristate "Qualcomm UFS PHY driver"
451 depends on OF && ARCH_QCOM 435 depends on OF && ARCH_QCOM
@@ -489,4 +473,17 @@ config PHY_NS2_PCIE
489 help 473 help
490 Enable this to support the Broadcom Northstar2 PCIe PHY. 474 Enable this to support the Broadcom Northstar2 PCIe PHY.
491 If unsure, say N. 475 If unsure, say N.
476
477config PHY_MESON8B_USB2
478 tristate "Meson8b and GXBB USB2 PHY driver"
479 default ARCH_MESON
480 depends on OF && (ARCH_MESON || COMPILE_TEST)
481 depends on USB_SUPPORT
482 select USB_COMMON
483 select GENERIC_PHY
484 help
485 Enable this to support the Meson USB2 PHYs found in Meson8b
486 and GXBB SoCs.
487 If unsure, say N.
488
492endmenu 489endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a534cf5be07d..65eb2f436a41 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_PHY_PXA_28NM_USB2) += phy-pxa-28nm-usb2.o
18obj-$(CONFIG_PHY_PXA_28NM_HSIC) += phy-pxa-28nm-hsic.o 18obj-$(CONFIG_PHY_PXA_28NM_HSIC) += phy-pxa-28nm-hsic.o
19obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o 19obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
20obj-$(CONFIG_PHY_MIPHY28LP) += phy-miphy28lp.o 20obj-$(CONFIG_PHY_MIPHY28LP) += phy-miphy28lp.o
21obj-$(CONFIG_PHY_MIPHY365X) += phy-miphy365x.o
22obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o 21obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
23obj-$(CONFIG_PHY_RCAR_GEN3_USB2) += phy-rcar-gen3-usb2.o 22obj-$(CONFIG_PHY_RCAR_GEN3_USB2) += phy-rcar-gen3-usb2.o
24obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o 23obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
@@ -50,7 +49,6 @@ obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY) += phy-spear1310-miphy.o
50obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY) += phy-spear1340-miphy.o 49obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY) += phy-spear1340-miphy.o
51obj-$(CONFIG_PHY_XGENE) += phy-xgene.o 50obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
52obj-$(CONFIG_PHY_STIH407_USB) += phy-stih407-usb.o 51obj-$(CONFIG_PHY_STIH407_USB) += phy-stih407-usb.o
53obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
54obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o 52obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
55obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o 53obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
56obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o 54obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
@@ -60,3 +58,4 @@ obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
60obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o 58obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o
61obj-$(CONFIG_ARCH_TEGRA) += tegra/ 59obj-$(CONFIG_ARCH_TEGRA) += tegra/
62obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o 60obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
61obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c
index f84a33a1bdd9..2c7a57f2d595 100644
--- a/drivers/phy/phy-berlin-sata.c
+++ b/drivers/phy/phy-berlin-sata.c
@@ -85,7 +85,6 @@ static int phy_berlin_sata_power_on(struct phy *phy)
85 struct phy_berlin_desc *desc = phy_get_drvdata(phy); 85 struct phy_berlin_desc *desc = phy_get_drvdata(phy);
86 struct phy_berlin_priv *priv = dev_get_drvdata(phy->dev.parent); 86 struct phy_berlin_priv *priv = dev_get_drvdata(phy->dev.parent);
87 void __iomem *ctrl_reg = priv->base + 0x60 + (desc->index * 0x80); 87 void __iomem *ctrl_reg = priv->base + 0x60 + (desc->index * 0x80);
88 int ret = 0;
89 u32 regval; 88 u32 regval;
90 89
91 clk_prepare_enable(priv->clk); 90 clk_prepare_enable(priv->clk);
@@ -130,7 +129,7 @@ static int phy_berlin_sata_power_on(struct phy *phy)
130 129
131 clk_disable_unprepare(priv->clk); 130 clk_disable_unprepare(priv->clk);
132 131
133 return ret; 132 return 0;
134} 133}
135 134
136static int phy_berlin_sata_power_off(struct phy *phy) 135static int phy_berlin_sata_power_off(struct phy *phy)
diff --git a/drivers/phy/phy-brcm-sata.c b/drivers/phy/phy-brcm-sata.c
index 8ffc44afdb75..ccbc3d994998 100644
--- a/drivers/phy/phy-brcm-sata.c
+++ b/drivers/phy/phy-brcm-sata.c
@@ -140,7 +140,7 @@ static inline void __iomem *brcm_sata_pcb_base(struct brcm_sata_port *port)
140 default: 140 default:
141 dev_err(priv->dev, "invalid phy version\n"); 141 dev_err(priv->dev, "invalid phy version\n");
142 break; 142 break;
143 }; 143 }
144 144
145 return priv->phy_base + (port->portnum * size); 145 return priv->phy_base + (port->portnum * size);
146} 146}
@@ -157,7 +157,7 @@ static inline void __iomem *brcm_sata_ctrl_base(struct brcm_sata_port *port)
157 default: 157 default:
158 dev_err(priv->dev, "invalid phy version\n"); 158 dev_err(priv->dev, "invalid phy version\n");
159 break; 159 break;
160 }; 160 }
161 161
162 return priv->ctrl_base + (port->portnum * size); 162 return priv->ctrl_base + (port->portnum * size);
163} 163}
@@ -365,7 +365,7 @@ static int brcm_sata_phy_init(struct phy *phy)
365 break; 365 break;
366 default: 366 default:
367 rc = -ENODEV; 367 rc = -ENODEV;
368 }; 368 }
369 369
370 return rc; 370 return rc;
371} 371}
diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c
index c85fb0b59729..1b82bff6330f 100644
--- a/drivers/phy/phy-da8xx-usb.c
+++ b/drivers/phy/phy-da8xx-usb.c
@@ -23,6 +23,8 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/regmap.h> 24#include <linux/regmap.h>
25 25
26#define PHY_INIT_BITS (CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN)
27
26struct da8xx_usb_phy { 28struct da8xx_usb_phy {
27 struct phy_provider *phy_provider; 29 struct phy_provider *phy_provider;
28 struct phy *usb11_phy; 30 struct phy *usb11_phy;
@@ -208,6 +210,9 @@ static int da8xx_usb_phy_probe(struct platform_device *pdev)
208 dev_warn(dev, "Failed to create usb20 phy lookup\n"); 210 dev_warn(dev, "Failed to create usb20 phy lookup\n");
209 } 211 }
210 212
213 regmap_write_bits(d_phy->regmap, CFGCHIP(2),
214 PHY_INIT_BITS, PHY_INIT_BITS);
215
211 return 0; 216 return 0;
212} 217}
213 218
diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c
index 8b851f718123..6bee04cc4d53 100644
--- a/drivers/phy/phy-exynos-mipi-video.c
+++ b/drivers/phy/phy-exynos-mipi-video.c
@@ -229,19 +229,6 @@ struct exynos_mipi_video_phy {
229 spinlock_t slock; 229 spinlock_t slock;
230}; 230};
231 231
232static inline int __is_running(const struct exynos_mipi_phy_desc *data,
233 struct exynos_mipi_video_phy *state)
234{
235 u32 val;
236 int ret;
237
238 ret = regmap_read(state->regmaps[data->resetn_map], data->resetn_reg, &val);
239 if (ret)
240 return 0;
241
242 return val & data->resetn_val;
243}
244
245static int __set_phy_state(const struct exynos_mipi_phy_desc *data, 232static int __set_phy_state(const struct exynos_mipi_phy_desc *data,
246 struct exynos_mipi_video_phy *state, unsigned int on) 233 struct exynos_mipi_video_phy *state, unsigned int on)
247{ 234{
@@ -251,7 +238,7 @@ static int __set_phy_state(const struct exynos_mipi_phy_desc *data,
251 238
252 /* disable in PMU sysreg */ 239 /* disable in PMU sysreg */
253 if (!on && data->coupled_phy_id >= 0 && 240 if (!on && data->coupled_phy_id >= 0 &&
254 !__is_running(state->phys[data->coupled_phy_id].data, state)) { 241 state->phys[data->coupled_phy_id].phy->power_count == 0) {
255 regmap_read(state->regmaps[data->enable_map], data->enable_reg, 242 regmap_read(state->regmaps[data->enable_map], data->enable_reg,
256 &val); 243 &val);
257 val &= ~data->enable_val; 244 val &= ~data->enable_val;
diff --git a/drivers/phy/phy-exynos4210-usb2.c b/drivers/phy/phy-exynos4210-usb2.c
index f30bbb0fb3b2..1f50e1004828 100644
--- a/drivers/phy/phy-exynos4210-usb2.c
+++ b/drivers/phy/phy-exynos4210-usb2.c
@@ -141,7 +141,7 @@ static void exynos4210_isol(struct samsung_usb2_phy_instance *inst, bool on)
141 break; 141 break;
142 default: 142 default:
143 return; 143 return;
144 }; 144 }
145 145
146 regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask); 146 regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask);
147} 147}
@@ -179,7 +179,7 @@ static void exynos4210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on)
179 rstbits = EXYNOS_4210_URSTCON_PHY1_P1P2 | 179 rstbits = EXYNOS_4210_URSTCON_PHY1_P1P2 |
180 EXYNOS_4210_URSTCON_HOST_LINK_P2; 180 EXYNOS_4210_URSTCON_HOST_LINK_P2;
181 break; 181 break;
182 }; 182 }
183 183
184 if (on) { 184 if (on) {
185 clk = readl(drv->reg_phy + EXYNOS_4210_UPHYCLK); 185 clk = readl(drv->reg_phy + EXYNOS_4210_UPHYCLK);
diff --git a/drivers/phy/phy-exynos4x12-usb2.c b/drivers/phy/phy-exynos4x12-usb2.c
index 765da90a536f..7f27a91acf87 100644
--- a/drivers/phy/phy-exynos4x12-usb2.c
+++ b/drivers/phy/phy-exynos4x12-usb2.c
@@ -187,7 +187,7 @@ static void exynos4x12_isol(struct samsung_usb2_phy_instance *inst, bool on)
187 break; 187 break;
188 default: 188 default:
189 return; 189 return;
190 }; 190 }
191 191
192 regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask); 192 regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask);
193} 193}
@@ -237,7 +237,7 @@ static void exynos4x12_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on)
237 rstbits = EXYNOS_4x12_URSTCON_HSIC1 | 237 rstbits = EXYNOS_4x12_URSTCON_HSIC1 |
238 EXYNOS_4x12_URSTCON_HOST_LINK_P1; 238 EXYNOS_4x12_URSTCON_HOST_LINK_P1;
239 break; 239 break;
240 }; 240 }
241 241
242 if (on) { 242 if (on) {
243 pwr = readl(drv->reg_phy + EXYNOS_4x12_UPHYPWR); 243 pwr = readl(drv->reg_phy + EXYNOS_4x12_UPHYPWR);
diff --git a/drivers/phy/phy-exynos5250-usb2.c b/drivers/phy/phy-exynos5250-usb2.c
index 2ed1735a076a..aad806272305 100644
--- a/drivers/phy/phy-exynos5250-usb2.c
+++ b/drivers/phy/phy-exynos5250-usb2.c
@@ -192,7 +192,7 @@ static void exynos5250_isol(struct samsung_usb2_phy_instance *inst, bool on)
192 break; 192 break;
193 default: 193 default:
194 return; 194 return;
195 }; 195 }
196 196
197 regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask); 197 regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask);
198} 198}
diff --git a/drivers/phy/phy-meson8b-usb2.c b/drivers/phy/phy-meson8b-usb2.c
new file mode 100644
index 000000000000..33c9f4ba157d
--- /dev/null
+++ b/drivers/phy/phy-meson8b-usb2.c
@@ -0,0 +1,286 @@
1/*
2 * Meson8b and GXBB USB2 PHY driver
3 *
4 * Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program. If not, see <http://www.gnu.org/licenses/>.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/of_device.h>
19#include <linux/reset.h>
20#include <linux/phy/phy.h>
21#include <linux/platform_device.h>
22#include <linux/usb/of.h>
23
24#define REG_CONFIG 0x00
25 #define REG_CONFIG_CLK_EN BIT(0)
26 #define REG_CONFIG_CLK_SEL_MASK GENMASK(3, 1)
27 #define REG_CONFIG_CLK_DIV_MASK GENMASK(10, 4)
28 #define REG_CONFIG_CLK_32k_ALTSEL BIT(15)
29 #define REG_CONFIG_TEST_TRIG BIT(31)
30
31#define REG_CTRL 0x04
32 #define REG_CTRL_SOFT_PRST BIT(0)
33 #define REG_CTRL_SOFT_HRESET BIT(1)
34 #define REG_CTRL_SS_SCALEDOWN_MODE_MASK GENMASK(3, 2)
35 #define REG_CTRL_CLK_DET_RST BIT(4)
36 #define REG_CTRL_INTR_SEL BIT(5)
37 #define REG_CTRL_CLK_DETECTED BIT(8)
38 #define REG_CTRL_SOF_SENT_RCVD_TGL BIT(9)
39 #define REG_CTRL_SOF_TOGGLE_OUT BIT(10)
40 #define REG_CTRL_POWER_ON_RESET BIT(15)
41 #define REG_CTRL_SLEEPM BIT(16)
42 #define REG_CTRL_TX_BITSTUFF_ENN_H BIT(17)
43 #define REG_CTRL_TX_BITSTUFF_ENN BIT(18)
44 #define REG_CTRL_COMMON_ON BIT(19)
45 #define REG_CTRL_REF_CLK_SEL_MASK GENMASK(21, 20)
46 #define REG_CTRL_REF_CLK_SEL_SHIFT 20
47 #define REG_CTRL_FSEL_MASK GENMASK(24, 22)
48 #define REG_CTRL_FSEL_SHIFT 22
49 #define REG_CTRL_PORT_RESET BIT(25)
50 #define REG_CTRL_THREAD_ID_MASK GENMASK(31, 26)
51
52#define REG_ENDP_INTR 0x08
53
54/* bits [31:26], [24:21] and [15:3] seem to be read-only */
55#define REG_ADP_BC 0x0c
56 #define REG_ADP_BC_VBUS_VLD_EXT_SEL BIT(0)
57 #define REG_ADP_BC_VBUS_VLD_EXT BIT(1)
58 #define REG_ADP_BC_OTG_DISABLE BIT(2)
59 #define REG_ADP_BC_ID_PULLUP BIT(3)
60 #define REG_ADP_BC_DRV_VBUS BIT(4)
61 #define REG_ADP_BC_ADP_PRB_EN BIT(5)
62 #define REG_ADP_BC_ADP_DISCHARGE BIT(6)
63 #define REG_ADP_BC_ADP_CHARGE BIT(7)
64 #define REG_ADP_BC_SESS_END BIT(8)
65 #define REG_ADP_BC_DEVICE_SESS_VLD BIT(9)
66 #define REG_ADP_BC_B_VALID BIT(10)
67 #define REG_ADP_BC_A_VALID BIT(11)
68 #define REG_ADP_BC_ID_DIG BIT(12)
69 #define REG_ADP_BC_VBUS_VALID BIT(13)
70 #define REG_ADP_BC_ADP_PROBE BIT(14)
71 #define REG_ADP_BC_ADP_SENSE BIT(15)
72 #define REG_ADP_BC_ACA_ENABLE BIT(16)
73 #define REG_ADP_BC_DCD_ENABLE BIT(17)
74 #define REG_ADP_BC_VDAT_DET_EN_B BIT(18)
75 #define REG_ADP_BC_VDAT_SRC_EN_B BIT(19)
76 #define REG_ADP_BC_CHARGE_SEL BIT(20)
77 #define REG_ADP_BC_CHARGE_DETECT BIT(21)
78 #define REG_ADP_BC_ACA_PIN_RANGE_C BIT(22)
79 #define REG_ADP_BC_ACA_PIN_RANGE_B BIT(23)
80 #define REG_ADP_BC_ACA_PIN_RANGE_A BIT(24)
81 #define REG_ADP_BC_ACA_PIN_GND BIT(25)
82 #define REG_ADP_BC_ACA_PIN_FLOAT BIT(26)
83
84#define REG_DBG_UART 0x14
85
86#define REG_TEST 0x18
87 #define REG_TEST_DATA_IN_MASK GENMASK(3, 0)
88 #define REG_TEST_EN_MASK GENMASK(7, 4)
89 #define REG_TEST_ADDR_MASK GENMASK(11, 8)
90 #define REG_TEST_DATA_OUT_SEL BIT(12)
91 #define REG_TEST_CLK BIT(13)
92 #define REG_TEST_VA_TEST_EN_B_MASK GENMASK(15, 14)
93 #define REG_TEST_DATA_OUT_MASK GENMASK(19, 16)
94 #define REG_TEST_DISABLE_ID_PULLUP BIT(20)
95
96#define REG_TUNE 0x1c
97 #define REG_TUNE_TX_RES_TUNE_MASK GENMASK(1, 0)
98 #define REG_TUNE_TX_HSXV_TUNE_MASK GENMASK(3, 2)
99 #define REG_TUNE_TX_VREF_TUNE_MASK GENMASK(7, 4)
100 #define REG_TUNE_TX_RISE_TUNE_MASK GENMASK(9, 8)
101 #define REG_TUNE_TX_PREEMP_PULSE_TUNE BIT(10)
102 #define REG_TUNE_TX_PREEMP_AMP_TUNE_MASK GENMASK(12, 11)
103 #define REG_TUNE_TX_FSLS_TUNE_MASK GENMASK(16, 13)
104 #define REG_TUNE_SQRX_TUNE_MASK GENMASK(19, 17)
105 #define REG_TUNE_OTG_TUNE GENMASK(22, 20)
106 #define REG_TUNE_COMP_DIS_TUNE GENMASK(25, 23)
107 #define REG_TUNE_HOST_DM_PULLDOWN BIT(26)
108 #define REG_TUNE_HOST_DP_PULLDOWN BIT(27)
109
110#define RESET_COMPLETE_TIME 500
111#define ACA_ENABLE_COMPLETE_TIME 50
112
113struct phy_meson8b_usb2_priv {
114 void __iomem *regs;
115 enum usb_dr_mode dr_mode;
116 struct clk *clk_usb_general;
117 struct clk *clk_usb;
118 struct reset_control *reset;
119};
120
121static u32 phy_meson8b_usb2_read(struct phy_meson8b_usb2_priv *phy_priv,
122 u32 reg)
123{
124 return readl(phy_priv->regs + reg);
125}
126
127static void phy_meson8b_usb2_mask_bits(struct phy_meson8b_usb2_priv *phy_priv,
128 u32 reg, u32 mask, u32 value)
129{
130 u32 data;
131
132 data = phy_meson8b_usb2_read(phy_priv, reg);
133 data &= ~mask;
134 data |= (value & mask);
135
136 writel(data, phy_priv->regs + reg);
137}
138
139static int phy_meson8b_usb2_power_on(struct phy *phy)
140{
141 struct phy_meson8b_usb2_priv *priv = phy_get_drvdata(phy);
142 int ret;
143
144 if (!IS_ERR_OR_NULL(priv->reset)) {
145 ret = reset_control_reset(priv->reset);
146 if (ret) {
147 dev_err(&phy->dev, "Failed to trigger USB reset\n");
148 return ret;
149 }
150 }
151
152 ret = clk_prepare_enable(priv->clk_usb_general);
153 if (ret) {
154 dev_err(&phy->dev, "Failed to enable USB general clock\n");
155 return ret;
156 }
157
158 ret = clk_prepare_enable(priv->clk_usb);
159 if (ret) {
160 dev_err(&phy->dev, "Failed to enable USB DDR clock\n");
161 clk_disable_unprepare(priv->clk_usb_general);
162 return ret;
163 }
164
165 phy_meson8b_usb2_mask_bits(priv, REG_CONFIG, REG_CONFIG_CLK_32k_ALTSEL,
166 REG_CONFIG_CLK_32k_ALTSEL);
167
168 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK,
169 0x2 << REG_CTRL_REF_CLK_SEL_SHIFT);
170
171 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_FSEL_MASK,
172 0x5 << REG_CTRL_FSEL_SHIFT);
173
174 /* reset the PHY */
175 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_POWER_ON_RESET,
176 REG_CTRL_POWER_ON_RESET);
177 udelay(RESET_COMPLETE_TIME);
178 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_POWER_ON_RESET, 0);
179 udelay(RESET_COMPLETE_TIME);
180
181 phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT,
182 REG_CTRL_SOF_TOGGLE_OUT);
183
184 if (priv->dr_mode == USB_DR_MODE_HOST) {
185 phy_meson8b_usb2_mask_bits(priv, REG_ADP_BC,
186 REG_ADP_BC_ACA_ENABLE,
187 REG_ADP_BC_ACA_ENABLE);
188
189 udelay(ACA_ENABLE_COMPLETE_TIME);
190
191 if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
192 REG_ADP_BC_ACA_PIN_FLOAT) {
193 dev_warn(&phy->dev, "USB ID detect failed!\n");
194 clk_disable_unprepare(priv->clk_usb);
195 clk_disable_unprepare(priv->clk_usb_general);
196 return -EINVAL;
197 }
198 }
199
200 return 0;
201}
202
203static int phy_meson8b_usb2_power_off(struct phy *phy)
204{
205 struct phy_meson8b_usb2_priv *priv = phy_get_drvdata(phy);
206
207 clk_disable_unprepare(priv->clk_usb);
208 clk_disable_unprepare(priv->clk_usb_general);
209
210 return 0;
211}
212
213static const struct phy_ops phy_meson8b_usb2_ops = {
214 .power_on = phy_meson8b_usb2_power_on,
215 .power_off = phy_meson8b_usb2_power_off,
216 .owner = THIS_MODULE,
217};
218
219static int phy_meson8b_usb2_probe(struct platform_device *pdev)
220{
221 struct phy_meson8b_usb2_priv *priv;
222 struct resource *res;
223 struct phy *phy;
224 struct phy_provider *phy_provider;
225
226 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
227 if (!priv)
228 return -ENOMEM;
229
230 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
231 priv->regs = devm_ioremap_resource(&pdev->dev, res);
232 if (IS_ERR(priv->regs))
233 return PTR_ERR(priv->regs);
234
235 priv->clk_usb_general = devm_clk_get(&pdev->dev, "usb_general");
236 if (IS_ERR(priv->clk_usb_general))
237 return PTR_ERR(priv->clk_usb_general);
238
239 priv->clk_usb = devm_clk_get(&pdev->dev, "usb");
240 if (IS_ERR(priv->clk_usb))
241 return PTR_ERR(priv->clk_usb);
242
243 priv->reset = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
244 if (PTR_ERR(priv->reset) == -EPROBE_DEFER)
245 return PTR_ERR(priv->reset);
246
247 priv->dr_mode = of_usb_get_dr_mode_by_phy(pdev->dev.of_node, -1);
248 if (priv->dr_mode == USB_DR_MODE_UNKNOWN) {
249 dev_err(&pdev->dev,
250 "missing dual role configuration of the controller\n");
251 return -EINVAL;
252 }
253
254 phy = devm_phy_create(&pdev->dev, NULL, &phy_meson8b_usb2_ops);
255 if (IS_ERR(phy)) {
256 dev_err(&pdev->dev, "failed to create PHY\n");
257 return PTR_ERR(phy);
258 }
259
260 phy_set_drvdata(phy, priv);
261
262 phy_provider =
263 devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
264
265 return PTR_ERR_OR_ZERO(phy_provider);
266}
267
268static const struct of_device_id phy_meson8b_usb2_of_match[] = {
269 { .compatible = "amlogic,meson8b-usb2-phy", },
270 { .compatible = "amlogic,meson-gxbb-usb2-phy", },
271 { },
272};
273MODULE_DEVICE_TABLE(of, phy_meson8b_usb2_of_match);
274
275static struct platform_driver phy_meson8b_usb2_driver = {
276 .probe = phy_meson8b_usb2_probe,
277 .driver = {
278 .name = "phy-meson-usb2",
279 .of_match_table = phy_meson8b_usb2_of_match,
280 },
281};
282module_platform_driver(phy_meson8b_usb2_driver);
283
284MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
285MODULE_DESCRIPTION("Meson8b and GXBB USB2 PHY driver");
286MODULE_LICENSE("GPL");
diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c
deleted file mode 100644
index e661f3b36eaa..000000000000
--- a/drivers/phy/phy-miphy365x.c
+++ /dev/null
@@ -1,625 +0,0 @@
1/*
2 * Copyright (C) 2014 STMicroelectronics – All Rights Reserved
3 *
4 * STMicroelectronics PHY driver MiPHY365 (for SoC STiH416).
5 *
6 * Authors: Alexandre Torgue <alexandre.torgue@st.com>
7 * Lee Jones <lee.jones@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2, as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_platform.h>
21#include <linux/of_address.h>
22#include <linux/clk.h>
23#include <linux/phy/phy.h>
24#include <linux/delay.h>
25#include <linux/mfd/syscon.h>
26#include <linux/regmap.h>
27
28#include <dt-bindings/phy/phy.h>
29
30#define HFC_TIMEOUT 100
31
32#define SYSCFG_SELECT_SATA_MASK BIT(1)
33#define SYSCFG_SELECT_SATA_POS 1
34
35/* MiPHY365x register definitions */
36#define RESET_REG 0x00
37#define RST_PLL BIT(1)
38#define RST_PLL_CAL BIT(2)
39#define RST_RX BIT(4)
40#define RST_MACRO BIT(7)
41
42#define STATUS_REG 0x01
43#define IDLL_RDY BIT(0)
44#define PLL_RDY BIT(1)
45#define DES_BIT_LOCK BIT(2)
46#define DES_SYMBOL_LOCK BIT(3)
47
48#define CTRL_REG 0x02
49#define TERM_EN BIT(0)
50#define PCI_EN BIT(2)
51#define DES_BIT_LOCK_EN BIT(3)
52#define TX_POL BIT(5)
53
54#define INT_CTRL_REG 0x03
55
56#define BOUNDARY1_REG 0x10
57#define SPDSEL_SEL BIT(0)
58
59#define BOUNDARY3_REG 0x12
60#define TX_SPDSEL_GEN1_VAL 0
61#define TX_SPDSEL_GEN2_VAL 0x01
62#define TX_SPDSEL_GEN3_VAL 0x02
63#define RX_SPDSEL_GEN1_VAL 0
64#define RX_SPDSEL_GEN2_VAL (0x01 << 3)
65#define RX_SPDSEL_GEN3_VAL (0x02 << 3)
66
67#define PCIE_REG 0x16
68
69#define BUF_SEL_REG 0x20
70#define CONF_GEN_SEL_GEN3 0x02
71#define CONF_GEN_SEL_GEN2 0x01
72#define PD_VDDTFILTER BIT(4)
73
74#define TXBUF1_REG 0x21
75#define SWING_VAL 0x04
76#define SWING_VAL_GEN1 0x03
77#define PREEMPH_VAL (0x3 << 5)
78
79#define TXBUF2_REG 0x22
80#define TXSLEW_VAL 0x2
81#define TXSLEW_VAL_GEN1 0x4
82
83#define RXBUF_OFFSET_CTRL_REG 0x23
84
85#define RXBUF_REG 0x25
86#define SDTHRES_VAL 0x01
87#define EQ_ON3 (0x03 << 4)
88#define EQ_ON1 (0x01 << 4)
89
90#define COMP_CTRL1_REG 0x40
91#define START_COMSR BIT(0)
92#define START_COMZC BIT(1)
93#define COMSR_DONE BIT(2)
94#define COMZC_DONE BIT(3)
95#define COMP_AUTO_LOAD BIT(4)
96
97#define COMP_CTRL2_REG 0x41
98#define COMP_2MHZ_RAT_GEN1 0x1e
99#define COMP_2MHZ_RAT 0xf
100
101#define COMP_CTRL3_REG 0x42
102#define COMSR_COMP_REF 0x33
103
104#define COMP_IDLL_REG 0x47
105#define COMZC_IDLL 0x2a
106
107#define PLL_CTRL1_REG 0x50
108#define PLL_START_CAL BIT(0)
109#define BUF_EN BIT(2)
110#define SYNCHRO_TX BIT(3)
111#define SSC_EN BIT(6)
112#define CONFIG_PLL BIT(7)
113
114#define PLL_CTRL2_REG 0x51
115#define BYPASS_PLL_CAL BIT(1)
116
117#define PLL_RAT_REG 0x52
118
119#define PLL_SSC_STEP_MSB_REG 0x56
120#define PLL_SSC_STEP_MSB_VAL 0x03
121
122#define PLL_SSC_STEP_LSB_REG 0x57
123#define PLL_SSC_STEP_LSB_VAL 0x63
124
125#define PLL_SSC_PER_MSB_REG 0x58
126#define PLL_SSC_PER_MSB_VAL 0
127
128#define PLL_SSC_PER_LSB_REG 0x59
129#define PLL_SSC_PER_LSB_VAL 0xf1
130
131#define IDLL_TEST_REG 0x72
132#define START_CLK_HF BIT(6)
133
134#define DES_BITLOCK_REG 0x86
135#define BIT_LOCK_LEVEL 0x01
136#define BIT_LOCK_CNT_512 (0x03 << 5)
137
138struct miphy365x_phy {
139 struct phy *phy;
140 void __iomem *base;
141 bool pcie_tx_pol_inv;
142 bool sata_tx_pol_inv;
143 u32 sata_gen;
144 u32 ctrlreg;
145 u8 type;
146};
147
148struct miphy365x_dev {
149 struct device *dev;
150 struct regmap *regmap;
151 struct mutex miphy_mutex;
152 struct miphy365x_phy **phys;
153 int nphys;
154};
155
156/*
157 * These values are represented in Device tree. They are considered to be ABI
158 * and although they can be extended any existing values must not change.
159 */
160enum miphy_sata_gen {
161 SATA_GEN1 = 1,
162 SATA_GEN2,
163 SATA_GEN3
164};
165
166static u8 rx_tx_spd[] = {
167 0, /* GEN0 doesn't exist. */
168 TX_SPDSEL_GEN1_VAL | RX_SPDSEL_GEN1_VAL,
169 TX_SPDSEL_GEN2_VAL | RX_SPDSEL_GEN2_VAL,
170 TX_SPDSEL_GEN3_VAL | RX_SPDSEL_GEN3_VAL
171};
172
173/*
174 * This function selects the system configuration,
175 * either two SATA, one SATA and one PCIe, or two PCIe lanes.
176 */
177static int miphy365x_set_path(struct miphy365x_phy *miphy_phy,
178 struct miphy365x_dev *miphy_dev)
179{
180 bool sata = (miphy_phy->type == PHY_TYPE_SATA);
181
182 return regmap_update_bits(miphy_dev->regmap,
183 miphy_phy->ctrlreg,
184 SYSCFG_SELECT_SATA_MASK,
185 sata << SYSCFG_SELECT_SATA_POS);
186}
187
188static int miphy365x_init_pcie_port(struct miphy365x_phy *miphy_phy,
189 struct miphy365x_dev *miphy_dev)
190{
191 u8 val;
192
193 if (miphy_phy->pcie_tx_pol_inv) {
194 /* Invert Tx polarity and clear pci_txdetect_pol bit */
195 val = TERM_EN | PCI_EN | DES_BIT_LOCK_EN | TX_POL;
196 writeb_relaxed(val, miphy_phy->base + CTRL_REG);
197 writeb_relaxed(0x00, miphy_phy->base + PCIE_REG);
198 }
199
200 return 0;
201}
202
203static inline int miphy365x_hfc_not_rdy(struct miphy365x_phy *miphy_phy,
204 struct miphy365x_dev *miphy_dev)
205{
206 unsigned long timeout = jiffies + msecs_to_jiffies(HFC_TIMEOUT);
207 u8 mask = IDLL_RDY | PLL_RDY;
208 u8 regval;
209
210 do {
211 regval = readb_relaxed(miphy_phy->base + STATUS_REG);
212 if (!(regval & mask))
213 return 0;
214
215 usleep_range(2000, 2500);
216 } while (time_before(jiffies, timeout));
217
218 dev_err(miphy_dev->dev, "HFC ready timeout!\n");
219 return -EBUSY;
220}
221
222static inline int miphy365x_rdy(struct miphy365x_phy *miphy_phy,
223 struct miphy365x_dev *miphy_dev)
224{
225 unsigned long timeout = jiffies + msecs_to_jiffies(HFC_TIMEOUT);
226 u8 mask = IDLL_RDY | PLL_RDY;
227 u8 regval;
228
229 do {
230 regval = readb_relaxed(miphy_phy->base + STATUS_REG);
231 if ((regval & mask) == mask)
232 return 0;
233
234 usleep_range(2000, 2500);
235 } while (time_before(jiffies, timeout));
236
237 dev_err(miphy_dev->dev, "PHY not ready timeout!\n");
238 return -EBUSY;
239}
240
241static inline void miphy365x_set_comp(struct miphy365x_phy *miphy_phy,
242 struct miphy365x_dev *miphy_dev)
243{
244 u8 val, mask;
245
246 if (miphy_phy->sata_gen == SATA_GEN1)
247 writeb_relaxed(COMP_2MHZ_RAT_GEN1,
248 miphy_phy->base + COMP_CTRL2_REG);
249 else
250 writeb_relaxed(COMP_2MHZ_RAT,
251 miphy_phy->base + COMP_CTRL2_REG);
252
253 if (miphy_phy->sata_gen != SATA_GEN3) {
254 writeb_relaxed(COMSR_COMP_REF,
255 miphy_phy->base + COMP_CTRL3_REG);
256 /*
257 * Force VCO current to value defined by address 0x5A
258 * and disable PCIe100Mref bit
259 * Enable auto load compensation for pll_i_bias
260 */
261 writeb_relaxed(BYPASS_PLL_CAL, miphy_phy->base + PLL_CTRL2_REG);
262 writeb_relaxed(COMZC_IDLL, miphy_phy->base + COMP_IDLL_REG);
263 }
264
265 /*
266 * Force restart compensation and enable auto load
267 * for Comzc_Tx, Comzc_Rx and Comsr on macro
268 */
269 val = START_COMSR | START_COMZC | COMP_AUTO_LOAD;
270 writeb_relaxed(val, miphy_phy->base + COMP_CTRL1_REG);
271
272 mask = COMSR_DONE | COMZC_DONE;
273 while ((readb_relaxed(miphy_phy->base + COMP_CTRL1_REG) & mask) != mask)
274 cpu_relax();
275}
276
277static inline void miphy365x_set_ssc(struct miphy365x_phy *miphy_phy,
278 struct miphy365x_dev *miphy_dev)
279{
280 u8 val;
281
282 /*
283 * SSC Settings. SSC will be enabled through Link
284 * SSC Ampl. = 0.4%
285 * SSC Freq = 31KHz
286 */
287 writeb_relaxed(PLL_SSC_STEP_MSB_VAL,
288 miphy_phy->base + PLL_SSC_STEP_MSB_REG);
289 writeb_relaxed(PLL_SSC_STEP_LSB_VAL,
290 miphy_phy->base + PLL_SSC_STEP_LSB_REG);
291 writeb_relaxed(PLL_SSC_PER_MSB_VAL,
292 miphy_phy->base + PLL_SSC_PER_MSB_REG);
293 writeb_relaxed(PLL_SSC_PER_LSB_VAL,
294 miphy_phy->base + PLL_SSC_PER_LSB_REG);
295
296 /* SSC Settings complete */
297 if (miphy_phy->sata_gen == SATA_GEN1) {
298 val = PLL_START_CAL | BUF_EN | SYNCHRO_TX | CONFIG_PLL;
299 writeb_relaxed(val, miphy_phy->base + PLL_CTRL1_REG);
300 } else {
301 val = SSC_EN | PLL_START_CAL | BUF_EN | SYNCHRO_TX | CONFIG_PLL;
302 writeb_relaxed(val, miphy_phy->base + PLL_CTRL1_REG);
303 }
304}
305
306static int miphy365x_init_sata_port(struct miphy365x_phy *miphy_phy,
307 struct miphy365x_dev *miphy_dev)
308{
309 int ret;
310 u8 val;
311
312 /*
313 * Force PHY macro reset, PLL calibration reset, PLL reset
314 * and assert Deserializer Reset
315 */
316 val = RST_PLL | RST_PLL_CAL | RST_RX | RST_MACRO;
317 writeb_relaxed(val, miphy_phy->base + RESET_REG);
318
319 if (miphy_phy->sata_tx_pol_inv)
320 writeb_relaxed(TX_POL, miphy_phy->base + CTRL_REG);
321
322 /*
323 * Force macro1 to use rx_lspd, tx_lspd
324 * Force Rx_Clock on first I-DLL phase
325 * Force Des in HP mode on macro, rx_lspd, tx_lspd for Gen2/3
326 */
327 writeb_relaxed(SPDSEL_SEL, miphy_phy->base + BOUNDARY1_REG);
328 writeb_relaxed(START_CLK_HF, miphy_phy->base + IDLL_TEST_REG);
329 val = rx_tx_spd[miphy_phy->sata_gen];
330 writeb_relaxed(val, miphy_phy->base + BOUNDARY3_REG);
331
332 /* Wait for HFC_READY = 0 */
333 ret = miphy365x_hfc_not_rdy(miphy_phy, miphy_dev);
334 if (ret)
335 return ret;
336
337 /* Compensation Recalibration */
338 miphy365x_set_comp(miphy_phy, miphy_dev);
339
340 switch (miphy_phy->sata_gen) {
341 case SATA_GEN3:
342 /*
343 * TX Swing target 550-600mv peak to peak diff
344 * Tx Slew target 90-110ps rising/falling time
345 * Rx Eq ON3, Sigdet threshold SDTH1
346 */
347 val = PD_VDDTFILTER | CONF_GEN_SEL_GEN3;
348 writeb_relaxed(val, miphy_phy->base + BUF_SEL_REG);
349 val = SWING_VAL | PREEMPH_VAL;
350 writeb_relaxed(val, miphy_phy->base + TXBUF1_REG);
351 writeb_relaxed(TXSLEW_VAL, miphy_phy->base + TXBUF2_REG);
352 writeb_relaxed(0x00, miphy_phy->base + RXBUF_OFFSET_CTRL_REG);
353 val = SDTHRES_VAL | EQ_ON3;
354 writeb_relaxed(val, miphy_phy->base + RXBUF_REG);
355 break;
356 case SATA_GEN2:
357 /*
358 * conf gen sel=0x1 to program Gen2 banked registers
359 * VDDT filter ON
360 * Tx Swing target 550-600mV peak-to-peak diff
361 * Tx Slew target 90-110 ps rising/falling time
362 * RX Equalization ON1, Sigdet threshold SDTH1
363 */
364 writeb_relaxed(CONF_GEN_SEL_GEN2,
365 miphy_phy->base + BUF_SEL_REG);
366 writeb_relaxed(SWING_VAL, miphy_phy->base + TXBUF1_REG);
367 writeb_relaxed(TXSLEW_VAL, miphy_phy->base + TXBUF2_REG);
368 val = SDTHRES_VAL | EQ_ON1;
369 writeb_relaxed(val, miphy_phy->base + RXBUF_REG);
370 break;
371 case SATA_GEN1:
372 /*
373 * conf gen sel = 00b to program Gen1 banked registers
374 * VDDT filter ON
375 * Tx Swing target 500-550mV peak-to-peak diff
376 * Tx Slew target120-140 ps rising/falling time
377 */
378 writeb_relaxed(PD_VDDTFILTER, miphy_phy->base + BUF_SEL_REG);
379 writeb_relaxed(SWING_VAL_GEN1, miphy_phy->base + TXBUF1_REG);
380 writeb_relaxed(TXSLEW_VAL_GEN1, miphy_phy->base + TXBUF2_REG);
381 break;
382 default:
383 break;
384 }
385
386 /* Force Macro1 in partial mode & release pll cal reset */
387 writeb_relaxed(RST_RX, miphy_phy->base + RESET_REG);
388 usleep_range(100, 150);
389
390 miphy365x_set_ssc(miphy_phy, miphy_dev);
391
392 /* Wait for phy_ready */
393 ret = miphy365x_rdy(miphy_phy, miphy_dev);
394 if (ret)
395 return ret;
396
397 /*
398 * Enable macro1 to use rx_lspd & tx_lspd
399 * Release Rx_Clock on first I-DLL phase on macro1
400 * Assert deserializer reset
401 * des_bit_lock_en is set
402 * bit lock detection strength
403 * Deassert deserializer reset
404 */
405 writeb_relaxed(0x00, miphy_phy->base + BOUNDARY1_REG);
406 writeb_relaxed(0x00, miphy_phy->base + IDLL_TEST_REG);
407 writeb_relaxed(RST_RX, miphy_phy->base + RESET_REG);
408 val = miphy_phy->sata_tx_pol_inv ?
409 (TX_POL | DES_BIT_LOCK_EN) : DES_BIT_LOCK_EN;
410 writeb_relaxed(val, miphy_phy->base + CTRL_REG);
411
412 val = BIT_LOCK_CNT_512 | BIT_LOCK_LEVEL;
413 writeb_relaxed(val, miphy_phy->base + DES_BITLOCK_REG);
414 writeb_relaxed(0x00, miphy_phy->base + RESET_REG);
415
416 return 0;
417}
418
419static int miphy365x_init(struct phy *phy)
420{
421 struct miphy365x_phy *miphy_phy = phy_get_drvdata(phy);
422 struct miphy365x_dev *miphy_dev = dev_get_drvdata(phy->dev.parent);
423 int ret = 0;
424
425 mutex_lock(&miphy_dev->miphy_mutex);
426
427 ret = miphy365x_set_path(miphy_phy, miphy_dev);
428 if (ret) {
429 mutex_unlock(&miphy_dev->miphy_mutex);
430 return ret;
431 }
432
433 /* Initialise Miphy for PCIe or SATA */
434 if (miphy_phy->type == PHY_TYPE_PCIE)
435 ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev);
436 else
437 ret = miphy365x_init_sata_port(miphy_phy, miphy_dev);
438
439 mutex_unlock(&miphy_dev->miphy_mutex);
440
441 return ret;
442}
443
444static int miphy365x_get_addr(struct device *dev,
445 struct miphy365x_phy *miphy_phy, int index)
446{
447 struct device_node *phynode = miphy_phy->phy->dev.of_node;
448 const char *name;
449 int type = miphy_phy->type;
450 int ret;
451
452 ret = of_property_read_string_index(phynode, "reg-names", index, &name);
453 if (ret) {
454 dev_err(dev, "no reg-names property not found\n");
455 return ret;
456 }
457
458 if (!((!strncmp(name, "sata", 4) && type == PHY_TYPE_SATA) ||
459 (!strncmp(name, "pcie", 4) && type == PHY_TYPE_PCIE)))
460 return 0;
461
462 miphy_phy->base = of_iomap(phynode, index);
463 if (!miphy_phy->base) {
464 dev_err(dev, "Failed to map %s\n", phynode->full_name);
465 return -EINVAL;
466 }
467
468 return 0;
469}
470
471static struct phy *miphy365x_xlate(struct device *dev,
472 struct of_phandle_args *args)
473{
474 struct miphy365x_dev *miphy_dev = dev_get_drvdata(dev);
475 struct miphy365x_phy *miphy_phy = NULL;
476 struct device_node *phynode = args->np;
477 int ret, index;
478
479 if (args->args_count != 1) {
480 dev_err(dev, "Invalid number of cells in 'phy' property\n");
481 return ERR_PTR(-EINVAL);
482 }
483
484 for (index = 0; index < miphy_dev->nphys; index++)
485 if (phynode == miphy_dev->phys[index]->phy->dev.of_node) {
486 miphy_phy = miphy_dev->phys[index];
487 break;
488 }
489
490 if (!miphy_phy) {
491 dev_err(dev, "Failed to find appropriate phy\n");
492 return ERR_PTR(-EINVAL);
493 }
494
495 miphy_phy->type = args->args[0];
496
497 if (!(miphy_phy->type == PHY_TYPE_SATA ||
498 miphy_phy->type == PHY_TYPE_PCIE)) {
499 dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type);
500 return ERR_PTR(-EINVAL);
501 }
502
503 /* Each port handles SATA and PCIE - third entry is always sysconf. */
504 for (index = 0; index < 3; index++) {
505 ret = miphy365x_get_addr(dev, miphy_phy, index);
506 if (ret < 0)
507 return ERR_PTR(ret);
508 }
509
510 return miphy_phy->phy;
511}
512
513static const struct phy_ops miphy365x_ops = {
514 .init = miphy365x_init,
515 .owner = THIS_MODULE,
516};
517
518static int miphy365x_of_probe(struct device_node *phynode,
519 struct miphy365x_phy *miphy_phy)
520{
521 of_property_read_u32(phynode, "st,sata-gen", &miphy_phy->sata_gen);
522 if (!miphy_phy->sata_gen)
523 miphy_phy->sata_gen = SATA_GEN1;
524
525 miphy_phy->pcie_tx_pol_inv =
526 of_property_read_bool(phynode, "st,pcie-tx-pol-inv");
527
528 miphy_phy->sata_tx_pol_inv =
529 of_property_read_bool(phynode, "st,sata-tx-pol-inv");
530
531 return 0;
532}
533
534static int miphy365x_probe(struct platform_device *pdev)
535{
536 struct device_node *child, *np = pdev->dev.of_node;
537 struct miphy365x_dev *miphy_dev;
538 struct phy_provider *provider;
539 struct phy *phy;
540 int ret, port = 0;
541
542 miphy_dev = devm_kzalloc(&pdev->dev, sizeof(*miphy_dev), GFP_KERNEL);
543 if (!miphy_dev)
544 return -ENOMEM;
545
546 miphy_dev->nphys = of_get_child_count(np);
547 miphy_dev->phys = devm_kcalloc(&pdev->dev, miphy_dev->nphys,
548 sizeof(*miphy_dev->phys), GFP_KERNEL);
549 if (!miphy_dev->phys)
550 return -ENOMEM;
551
552 miphy_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
553 if (IS_ERR(miphy_dev->regmap)) {
554 dev_err(miphy_dev->dev, "No syscfg phandle specified\n");
555 return PTR_ERR(miphy_dev->regmap);
556 }
557
558 miphy_dev->dev = &pdev->dev;
559
560 dev_set_drvdata(&pdev->dev, miphy_dev);
561
562 mutex_init(&miphy_dev->miphy_mutex);
563
564 for_each_child_of_node(np, child) {
565 struct miphy365x_phy *miphy_phy;
566
567 miphy_phy = devm_kzalloc(&pdev->dev, sizeof(*miphy_phy),
568 GFP_KERNEL);
569 if (!miphy_phy) {
570 ret = -ENOMEM;
571 goto put_child;
572 }
573
574 miphy_dev->phys[port] = miphy_phy;
575
576 phy = devm_phy_create(&pdev->dev, child, &miphy365x_ops);
577 if (IS_ERR(phy)) {
578 dev_err(&pdev->dev, "failed to create PHY\n");
579 ret = PTR_ERR(phy);
580 goto put_child;
581 }
582
583 miphy_dev->phys[port]->phy = phy;
584
585 ret = miphy365x_of_probe(child, miphy_phy);
586 if (ret)
587 goto put_child;
588
589 phy_set_drvdata(phy, miphy_dev->phys[port]);
590
591 port++;
592 /* sysconfig offsets are indexed from 1 */
593 ret = of_property_read_u32_index(np, "st,syscfg", port,
594 &miphy_phy->ctrlreg);
595 if (ret) {
596 dev_err(&pdev->dev, "No sysconfig offset found\n");
597 goto put_child;
598 }
599 }
600
601 provider = devm_of_phy_provider_register(&pdev->dev, miphy365x_xlate);
602 return PTR_ERR_OR_ZERO(provider);
603put_child:
604 of_node_put(child);
605 return ret;
606}
607
608static const struct of_device_id miphy365x_of_match[] = {
609 { .compatible = "st,miphy365x-phy", },
610 { },
611};
612MODULE_DEVICE_TABLE(of, miphy365x_of_match);
613
614static struct platform_driver miphy365x_driver = {
615 .probe = miphy365x_probe,
616 .driver = {
617 .name = "miphy365x-phy",
618 .of_match_table = miphy365x_of_match,
619 }
620};
621module_platform_driver(miphy365x_driver);
622
623MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
624MODULE_DESCRIPTION("STMicroelectronics miphy365x driver");
625MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-rcar-gen3-usb2.c b/drivers/phy/phy-rcar-gen3-usb2.c
index 3d97eadd247d..c63da1b955c1 100644
--- a/drivers/phy/phy-rcar-gen3-usb2.c
+++ b/drivers/phy/phy-rcar-gen3-usb2.c
@@ -70,6 +70,7 @@
70#define USB2_LINECTRL1_DP_RPD BIT(18) 70#define USB2_LINECTRL1_DP_RPD BIT(18)
71#define USB2_LINECTRL1_DMRPD_EN BIT(17) 71#define USB2_LINECTRL1_DMRPD_EN BIT(17)
72#define USB2_LINECTRL1_DM_RPD BIT(16) 72#define USB2_LINECTRL1_DM_RPD BIT(16)
73#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
73 74
74/* ADPCTRL */ 75/* ADPCTRL */
75#define USB2_ADPCTRL_OTGSESSVLD BIT(20) 76#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
@@ -161,6 +162,43 @@ static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
161 schedule_work(&ch->work); 162 schedule_work(&ch->work);
162} 163}
163 164
165static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
166{
167 void __iomem *usb2_base = ch->base;
168 u32 val;
169
170 val = readl(usb2_base + USB2_LINECTRL1);
171 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
172
173 rcar_gen3_set_linectrl(ch, 1, 1);
174 rcar_gen3_set_host_mode(ch, 1);
175 rcar_gen3_enable_vbus_ctrl(ch, 0);
176
177 val = readl(usb2_base + USB2_LINECTRL1);
178 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
179}
180
181static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
182{
183 rcar_gen3_set_linectrl(ch, 0, 1);
184 rcar_gen3_set_host_mode(ch, 0);
185 rcar_gen3_enable_vbus_ctrl(ch, 1);
186}
187
188static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
189{
190 void __iomem *usb2_base = ch->base;
191 u32 val;
192
193 val = readl(usb2_base + USB2_OBINTEN);
194 writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
195
196 rcar_gen3_enable_vbus_ctrl(ch, 0);
197 rcar_gen3_init_for_host(ch);
198
199 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
200}
201
164static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) 202static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
165{ 203{
166 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); 204 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
@@ -174,6 +212,65 @@ static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
174 rcar_gen3_init_for_peri(ch); 212 rcar_gen3_init_for_peri(ch);
175} 213}
176 214
215static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
216{
217 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
218}
219
220static ssize_t role_store(struct device *dev, struct device_attribute *attr,
221 const char *buf, size_t count)
222{
223 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
224 bool is_b_device, is_host, new_mode_is_host;
225
226 if (!ch->has_otg || !ch->phy->init_count)
227 return -EIO;
228
229 /*
230 * is_b_device: true is B-Device. false is A-Device.
231 * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
232 */
233 is_b_device = rcar_gen3_check_id(ch);
234 is_host = rcar_gen3_is_host(ch);
235 if (!strncmp(buf, "host", strlen("host")))
236 new_mode_is_host = true;
237 else if (!strncmp(buf, "peripheral", strlen("peripheral")))
238 new_mode_is_host = false;
239 else
240 return -EINVAL;
241
242 /* If current and new mode is the same, this returns the error */
243 if (is_host == new_mode_is_host)
244 return -EINVAL;
245
246 if (new_mode_is_host) { /* And is_host must be false */
247 if (!is_b_device) /* A-Peripheral */
248 rcar_gen3_init_from_a_peri_to_a_host(ch);
249 else /* B-Peripheral */
250 rcar_gen3_init_for_b_host(ch);
251 } else { /* And is_host must be true */
252 if (!is_b_device) /* A-Host */
253 rcar_gen3_init_for_a_peri(ch);
254 else /* B-Host */
255 rcar_gen3_init_for_peri(ch);
256 }
257
258 return count;
259}
260
261static ssize_t role_show(struct device *dev, struct device_attribute *attr,
262 char *buf)
263{
264 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
265
266 if (!ch->has_otg || !ch->phy->init_count)
267 return -EIO;
268
269 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
270 "peripheral");
271}
272static DEVICE_ATTR_RW(role);
273
177static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) 274static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
178{ 275{
179 void __iomem *usb2_base = ch->base; 276 void __iomem *usb2_base = ch->base;
@@ -351,21 +448,40 @@ static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
351 channel->vbus = NULL; 448 channel->vbus = NULL;
352 } 449 }
353 450
451 platform_set_drvdata(pdev, channel);
354 phy_set_drvdata(channel->phy, channel); 452 phy_set_drvdata(channel->phy, channel);
355 453
356 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); 454 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
357 if (IS_ERR(provider)) 455 if (IS_ERR(provider)) {
358 dev_err(dev, "Failed to register PHY provider\n"); 456 dev_err(dev, "Failed to register PHY provider\n");
457 } else if (channel->has_otg) {
458 int ret;
459
460 ret = device_create_file(dev, &dev_attr_role);
461 if (ret < 0)
462 return ret;
463 }
359 464
360 return PTR_ERR_OR_ZERO(provider); 465 return PTR_ERR_OR_ZERO(provider);
361} 466}
362 467
468static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
469{
470 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
471
472 if (channel->has_otg)
473 device_remove_file(&pdev->dev, &dev_attr_role);
474
475 return 0;
476};
477
363static struct platform_driver rcar_gen3_phy_usb2_driver = { 478static struct platform_driver rcar_gen3_phy_usb2_driver = {
364 .driver = { 479 .driver = {
365 .name = "phy_rcar_gen3_usb2", 480 .name = "phy_rcar_gen3_usb2",
366 .of_match_table = rcar_gen3_phy_usb2_match_table, 481 .of_match_table = rcar_gen3_phy_usb2_match_table,
367 }, 482 },
368 .probe = rcar_gen3_phy_usb2_probe, 483 .probe = rcar_gen3_phy_usb2_probe,
484 .remove = rcar_gen3_phy_usb2_remove,
369}; 485};
370module_platform_driver(rcar_gen3_phy_usb2_driver); 486module_platform_driver(rcar_gen3_phy_usb2_driver);
371 487
diff --git a/drivers/phy/phy-rockchip-emmc.c b/drivers/phy/phy-rockchip-emmc.c
index fd57345ffed2..f1b24f18e9b2 100644
--- a/drivers/phy/phy-rockchip-emmc.c
+++ b/drivers/phy/phy-rockchip-emmc.c
@@ -132,7 +132,7 @@ static int rockchip_emmc_phy_power(struct phy *phy, bool on_off)
132 default: 132 default:
133 ideal_rate = 200000000; 133 ideal_rate = 200000000;
134 break; 134 break;
135 }; 135 }
136 136
137 diff = (rate > ideal_rate) ? 137 diff = (rate > ideal_rate) ?
138 rate - ideal_rate : ideal_rate - rate; 138 rate - ideal_rate : ideal_rate - rate;
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index ac203107b071..2f99ec95079c 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -17,6 +17,7 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/clk-provider.h> 18#include <linux/clk-provider.h>
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/extcon.h>
20#include <linux/interrupt.h> 21#include <linux/interrupt.h>
21#include <linux/io.h> 22#include <linux/io.h>
22#include <linux/gpio/consumer.h> 23#include <linux/gpio/consumer.h>
@@ -30,11 +31,15 @@
30#include <linux/of_platform.h> 31#include <linux/of_platform.h>
31#include <linux/phy/phy.h> 32#include <linux/phy/phy.h>
32#include <linux/platform_device.h> 33#include <linux/platform_device.h>
34#include <linux/power_supply.h>
33#include <linux/regmap.h> 35#include <linux/regmap.h>
34#include <linux/mfd/syscon.h> 36#include <linux/mfd/syscon.h>
37#include <linux/usb/of.h>
38#include <linux/usb/otg.h>
35 39
36#define BIT_WRITEABLE_SHIFT 16 40#define BIT_WRITEABLE_SHIFT 16
37#define SCHEDULE_DELAY (60 * HZ) 41#define SCHEDULE_DELAY (60 * HZ)
42#define OTG_SCHEDULE_DELAY (2 * HZ)
38 43
39enum rockchip_usb2phy_port_id { 44enum rockchip_usb2phy_port_id {
40 USB2PHY_PORT_OTG, 45 USB2PHY_PORT_OTG,
@@ -49,6 +54,37 @@ enum rockchip_usb2phy_host_state {
49 PHY_STATE_FS_LS_ONLINE = 4, 54 PHY_STATE_FS_LS_ONLINE = 4,
50}; 55};
51 56
57/**
58 * Different states involved in USB charger detection.
59 * USB_CHG_STATE_UNDEFINED USB charger is not connected or detection
60 * process is not yet started.
61 * USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact.
62 * USB_CHG_STATE_DCD_DONE Data pin contact is detected.
63 * USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects
64 * between SDP and DCP/CDP).
65 * USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
66 * between DCP and CDP).
67 * USB_CHG_STATE_DETECTED USB charger type is determined.
68 */
69enum usb_chg_state {
70 USB_CHG_STATE_UNDEFINED = 0,
71 USB_CHG_STATE_WAIT_FOR_DCD,
72 USB_CHG_STATE_DCD_DONE,
73 USB_CHG_STATE_PRIMARY_DONE,
74 USB_CHG_STATE_SECONDARY_DONE,
75 USB_CHG_STATE_DETECTED,
76};
77
78static const unsigned int rockchip_usb2phy_extcon_cable[] = {
79 EXTCON_USB,
80 EXTCON_USB_HOST,
81 EXTCON_CHG_USB_SDP,
82 EXTCON_CHG_USB_CDP,
83 EXTCON_CHG_USB_DCP,
84 EXTCON_CHG_USB_SLOW,
85 EXTCON_NONE,
86};
87
52struct usb2phy_reg { 88struct usb2phy_reg {
53 unsigned int offset; 89 unsigned int offset;
54 unsigned int bitend; 90 unsigned int bitend;
@@ -58,19 +94,55 @@ struct usb2phy_reg {
58}; 94};
59 95
60/** 96/**
97 * struct rockchip_chg_det_reg: usb charger detect registers
98 * @cp_det: charging port detected successfully.
99 * @dcp_det: dedicated charging port detected successfully.
100 * @dp_det: assert data pin connect successfully.
101 * @idm_sink_en: open dm sink curren.
102 * @idp_sink_en: open dp sink current.
103 * @idp_src_en: open dm source current.
104 * @rdm_pdwn_en: open dm pull down resistor.
105 * @vdm_src_en: open dm voltage source.
106 * @vdp_src_en: open dp voltage source.
107 * @opmode: utmi operational mode.
108 */
109struct rockchip_chg_det_reg {
110 struct usb2phy_reg cp_det;
111 struct usb2phy_reg dcp_det;
112 struct usb2phy_reg dp_det;
113 struct usb2phy_reg idm_sink_en;
114 struct usb2phy_reg idp_sink_en;
115 struct usb2phy_reg idp_src_en;
116 struct usb2phy_reg rdm_pdwn_en;
117 struct usb2phy_reg vdm_src_en;
118 struct usb2phy_reg vdp_src_en;
119 struct usb2phy_reg opmode;
120};
121
122/**
61 * struct rockchip_usb2phy_port_cfg: usb-phy port configuration. 123 * struct rockchip_usb2phy_port_cfg: usb-phy port configuration.
62 * @phy_sus: phy suspend register. 124 * @phy_sus: phy suspend register.
125 * @bvalid_det_en: vbus valid rise detection enable register.
126 * @bvalid_det_st: vbus valid rise detection status register.
127 * @bvalid_det_clr: vbus valid rise detection clear register.
63 * @ls_det_en: linestate detection enable register. 128 * @ls_det_en: linestate detection enable register.
64 * @ls_det_st: linestate detection state register. 129 * @ls_det_st: linestate detection state register.
65 * @ls_det_clr: linestate detection clear register. 130 * @ls_det_clr: linestate detection clear register.
131 * @utmi_avalid: utmi vbus avalid status register.
132 * @utmi_bvalid: utmi vbus bvalid status register.
66 * @utmi_ls: utmi linestate state register. 133 * @utmi_ls: utmi linestate state register.
67 * @utmi_hstdet: utmi host disconnect register. 134 * @utmi_hstdet: utmi host disconnect register.
68 */ 135 */
69struct rockchip_usb2phy_port_cfg { 136struct rockchip_usb2phy_port_cfg {
70 struct usb2phy_reg phy_sus; 137 struct usb2phy_reg phy_sus;
138 struct usb2phy_reg bvalid_det_en;
139 struct usb2phy_reg bvalid_det_st;
140 struct usb2phy_reg bvalid_det_clr;
71 struct usb2phy_reg ls_det_en; 141 struct usb2phy_reg ls_det_en;
72 struct usb2phy_reg ls_det_st; 142 struct usb2phy_reg ls_det_st;
73 struct usb2phy_reg ls_det_clr; 143 struct usb2phy_reg ls_det_clr;
144 struct usb2phy_reg utmi_avalid;
145 struct usb2phy_reg utmi_bvalid;
74 struct usb2phy_reg utmi_ls; 146 struct usb2phy_reg utmi_ls;
75 struct usb2phy_reg utmi_hstdet; 147 struct usb2phy_reg utmi_hstdet;
76}; 148};
@@ -80,31 +152,51 @@ struct rockchip_usb2phy_port_cfg {
80 * @reg: the address offset of grf for usb-phy config. 152 * @reg: the address offset of grf for usb-phy config.
81 * @num_ports: specify how many ports that the phy has. 153 * @num_ports: specify how many ports that the phy has.
82 * @clkout_ctl: keep on/turn off output clk of phy. 154 * @clkout_ctl: keep on/turn off output clk of phy.
155 * @chg_det: charger detection registers.
83 */ 156 */
84struct rockchip_usb2phy_cfg { 157struct rockchip_usb2phy_cfg {
85 unsigned int reg; 158 unsigned int reg;
86 unsigned int num_ports; 159 unsigned int num_ports;
87 struct usb2phy_reg clkout_ctl; 160 struct usb2phy_reg clkout_ctl;
88 const struct rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS]; 161 const struct rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS];
162 const struct rockchip_chg_det_reg chg_det;
89}; 163};
90 164
91/** 165/**
92 * struct rockchip_usb2phy_port: usb-phy port data. 166 * struct rockchip_usb2phy_port: usb-phy port data.
93 * @port_id: flag for otg port or host port. 167 * @port_id: flag for otg port or host port.
94 * @suspended: phy suspended flag. 168 * @suspended: phy suspended flag.
169 * @utmi_avalid: utmi avalid status usage flag.
170 * true - use avalid to get vbus status
171 * flase - use bvalid to get vbus status
172 * @vbus_attached: otg device vbus status.
173 * @bvalid_irq: IRQ number assigned for vbus valid rise detection.
95 * @ls_irq: IRQ number assigned for linestate detection. 174 * @ls_irq: IRQ number assigned for linestate detection.
96 * @mutex: for register updating in sm_work. 175 * @mutex: for register updating in sm_work.
97 * @sm_work: OTG state machine work. 176 * @chg_work: charge detect work.
177 * @otg_sm_work: OTG state machine work.
178 * @sm_work: HOST state machine work.
98 * @phy_cfg: port register configuration, assigned by driver data. 179 * @phy_cfg: port register configuration, assigned by driver data.
180 * @event_nb: hold event notification callback.
181 * @state: define OTG enumeration states before device reset.
182 * @mode: the dr_mode of the controller.
99 */ 183 */
100struct rockchip_usb2phy_port { 184struct rockchip_usb2phy_port {
101 struct phy *phy; 185 struct phy *phy;
102 unsigned int port_id; 186 unsigned int port_id;
103 bool suspended; 187 bool suspended;
188 bool utmi_avalid;
189 bool vbus_attached;
190 int bvalid_irq;
104 int ls_irq; 191 int ls_irq;
105 struct mutex mutex; 192 struct mutex mutex;
193 struct delayed_work chg_work;
194 struct delayed_work otg_sm_work;
106 struct delayed_work sm_work; 195 struct delayed_work sm_work;
107 const struct rockchip_usb2phy_port_cfg *port_cfg; 196 const struct rockchip_usb2phy_port_cfg *port_cfg;
197 struct notifier_block event_nb;
198 enum usb_otg_state state;
199 enum usb_dr_mode mode;
108}; 200};
109 201
110/** 202/**
@@ -113,6 +205,11 @@ struct rockchip_usb2phy_port {
113 * @clk: clock struct of phy input clk. 205 * @clk: clock struct of phy input clk.
114 * @clk480m: clock struct of phy output clk. 206 * @clk480m: clock struct of phy output clk.
115 * @clk_hw: clock struct of phy output clk management. 207 * @clk_hw: clock struct of phy output clk management.
208 * @chg_state: states involved in USB charger detection.
209 * @chg_type: USB charger types.
210 * @dcd_retries: The retry count used to track Data contact
211 * detection process.
212 * @edev: extcon device for notification registration
116 * @phy_cfg: phy register configuration, assigned by driver data. 213 * @phy_cfg: phy register configuration, assigned by driver data.
117 * @ports: phy port instance. 214 * @ports: phy port instance.
118 */ 215 */
@@ -122,6 +219,10 @@ struct rockchip_usb2phy {
122 struct clk *clk; 219 struct clk *clk;
123 struct clk *clk480m; 220 struct clk *clk480m;
124 struct clk_hw clk480m_hw; 221 struct clk_hw clk480m_hw;
222 enum usb_chg_state chg_state;
223 enum power_supply_type chg_type;
224 u8 dcd_retries;
225 struct extcon_dev *edev;
125 const struct rockchip_usb2phy_cfg *phy_cfg; 226 const struct rockchip_usb2phy_cfg *phy_cfg;
126 struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS]; 227 struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
127}; 228};
@@ -153,7 +254,7 @@ static inline bool property_enabled(struct rockchip_usb2phy *rphy,
153 return tmp == reg->enable; 254 return tmp == reg->enable;
154} 255}
155 256
156static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw) 257static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw)
157{ 258{
158 struct rockchip_usb2phy *rphy = 259 struct rockchip_usb2phy *rphy =
159 container_of(hw, struct rockchip_usb2phy, clk480m_hw); 260 container_of(hw, struct rockchip_usb2phy, clk480m_hw);
@@ -165,14 +266,14 @@ static int rockchip_usb2phy_clk480m_enable(struct clk_hw *hw)
165 if (ret) 266 if (ret)
166 return ret; 267 return ret;
167 268
168 /* waitting for the clk become stable */ 269 /* waiting for the clk become stable */
169 mdelay(1); 270 usleep_range(1200, 1300);
170 } 271 }
171 272
172 return 0; 273 return 0;
173} 274}
174 275
175static void rockchip_usb2phy_clk480m_disable(struct clk_hw *hw) 276static void rockchip_usb2phy_clk480m_unprepare(struct clk_hw *hw)
176{ 277{
177 struct rockchip_usb2phy *rphy = 278 struct rockchip_usb2phy *rphy =
178 container_of(hw, struct rockchip_usb2phy, clk480m_hw); 279 container_of(hw, struct rockchip_usb2phy, clk480m_hw);
@@ -181,7 +282,7 @@ static void rockchip_usb2phy_clk480m_disable(struct clk_hw *hw)
181 property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false); 282 property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false);
182} 283}
183 284
184static int rockchip_usb2phy_clk480m_enabled(struct clk_hw *hw) 285static int rockchip_usb2phy_clk480m_prepared(struct clk_hw *hw)
185{ 286{
186 struct rockchip_usb2phy *rphy = 287 struct rockchip_usb2phy *rphy =
187 container_of(hw, struct rockchip_usb2phy, clk480m_hw); 288 container_of(hw, struct rockchip_usb2phy, clk480m_hw);
@@ -197,9 +298,9 @@ rockchip_usb2phy_clk480m_recalc_rate(struct clk_hw *hw,
197} 298}
198 299
199static const struct clk_ops rockchip_usb2phy_clkout_ops = { 300static const struct clk_ops rockchip_usb2phy_clkout_ops = {
200 .enable = rockchip_usb2phy_clk480m_enable, 301 .prepare = rockchip_usb2phy_clk480m_prepare,
201 .disable = rockchip_usb2phy_clk480m_disable, 302 .unprepare = rockchip_usb2phy_clk480m_unprepare,
202 .is_enabled = rockchip_usb2phy_clk480m_enabled, 303 .is_prepared = rockchip_usb2phy_clk480m_prepared,
203 .recalc_rate = rockchip_usb2phy_clk480m_recalc_rate, 304 .recalc_rate = rockchip_usb2phy_clk480m_recalc_rate,
204}; 305};
205 306
@@ -263,33 +364,84 @@ err_ret:
263 return ret; 364 return ret;
264} 365}
265 366
266static int rockchip_usb2phy_init(struct phy *phy) 367static int rockchip_usb2phy_extcon_register(struct rockchip_usb2phy *rphy)
267{ 368{
268 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
269 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
270 int ret; 369 int ret;
370 struct device_node *node = rphy->dev->of_node;
371 struct extcon_dev *edev;
372
373 if (of_property_read_bool(node, "extcon")) {
374 edev = extcon_get_edev_by_phandle(rphy->dev, 0);
375 if (IS_ERR(edev)) {
376 if (PTR_ERR(edev) != -EPROBE_DEFER)
377 dev_err(rphy->dev, "Invalid or missing extcon\n");
378 return PTR_ERR(edev);
379 }
380 } else {
381 /* Initialize extcon device */
382 edev = devm_extcon_dev_allocate(rphy->dev,
383 rockchip_usb2phy_extcon_cable);
271 384
272 if (rport->port_id == USB2PHY_PORT_HOST) { 385 if (IS_ERR(edev))
273 /* clear linestate and enable linestate detect irq */ 386 return -ENOMEM;
274 mutex_lock(&rport->mutex);
275 387
276 ret = property_enable(rphy, &rport->port_cfg->ls_det_clr, true); 388 ret = devm_extcon_dev_register(rphy->dev, edev);
277 if (ret) { 389 if (ret) {
278 mutex_unlock(&rport->mutex); 390 dev_err(rphy->dev, "failed to register extcon device\n");
279 return ret; 391 return ret;
280 } 392 }
393 }
281 394
282 ret = property_enable(rphy, &rport->port_cfg->ls_det_en, true); 395 rphy->edev = edev;
283 if (ret) { 396
284 mutex_unlock(&rport->mutex); 397 return 0;
285 return ret; 398}
399
400static int rockchip_usb2phy_init(struct phy *phy)
401{
402 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
403 struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
404 int ret = 0;
405
406 mutex_lock(&rport->mutex);
407
408 if (rport->port_id == USB2PHY_PORT_OTG) {
409 if (rport->mode != USB_DR_MODE_HOST) {
410 /* clear bvalid status and enable bvalid detect irq */
411 ret = property_enable(rphy,
412 &rport->port_cfg->bvalid_det_clr,
413 true);
414 if (ret)
415 goto out;
416
417 ret = property_enable(rphy,
418 &rport->port_cfg->bvalid_det_en,
419 true);
420 if (ret)
421 goto out;
422
423 schedule_delayed_work(&rport->otg_sm_work,
424 OTG_SCHEDULE_DELAY);
425 } else {
426 /* If OTG works in host only mode, do nothing. */
427 dev_dbg(&rport->phy->dev, "mode %d\n", rport->mode);
286 } 428 }
429 } else if (rport->port_id == USB2PHY_PORT_HOST) {
430 /* clear linestate and enable linestate detect irq */
431 ret = property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
432 if (ret)
433 goto out;
434
435 ret = property_enable(rphy, &rport->port_cfg->ls_det_en, true);
436 if (ret)
437 goto out;
287 438
288 mutex_unlock(&rport->mutex);
289 schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY); 439 schedule_delayed_work(&rport->sm_work, SCHEDULE_DELAY);
290 } 440 }
291 441
292 return 0; 442out:
443 mutex_unlock(&rport->mutex);
444 return ret;
293} 445}
294 446
295static int rockchip_usb2phy_power_on(struct phy *phy) 447static int rockchip_usb2phy_power_on(struct phy *phy)
@@ -340,7 +492,11 @@ static int rockchip_usb2phy_exit(struct phy *phy)
340{ 492{
341 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy); 493 struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
342 494
343 if (rport->port_id == USB2PHY_PORT_HOST) 495 if (rport->port_id == USB2PHY_PORT_OTG &&
496 rport->mode != USB_DR_MODE_HOST) {
497 cancel_delayed_work_sync(&rport->otg_sm_work);
498 cancel_delayed_work_sync(&rport->chg_work);
499 } else if (rport->port_id == USB2PHY_PORT_HOST)
344 cancel_delayed_work_sync(&rport->sm_work); 500 cancel_delayed_work_sync(&rport->sm_work);
345 501
346 return 0; 502 return 0;
@@ -354,6 +510,249 @@ static const struct phy_ops rockchip_usb2phy_ops = {
354 .owner = THIS_MODULE, 510 .owner = THIS_MODULE,
355}; 511};
356 512
513static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
514{
515 struct rockchip_usb2phy_port *rport =
516 container_of(work, struct rockchip_usb2phy_port,
517 otg_sm_work.work);
518 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
519 static unsigned int cable;
520 unsigned long delay;
521 bool vbus_attach, sch_work, notify_charger;
522
523 if (rport->utmi_avalid)
524 vbus_attach =
525 property_enabled(rphy, &rport->port_cfg->utmi_avalid);
526 else
527 vbus_attach =
528 property_enabled(rphy, &rport->port_cfg->utmi_bvalid);
529
530 sch_work = false;
531 notify_charger = false;
532 delay = OTG_SCHEDULE_DELAY;
533 dev_dbg(&rport->phy->dev, "%s otg sm work\n",
534 usb_otg_state_string(rport->state));
535
536 switch (rport->state) {
537 case OTG_STATE_UNDEFINED:
538 rport->state = OTG_STATE_B_IDLE;
539 if (!vbus_attach)
540 rockchip_usb2phy_power_off(rport->phy);
541 /* fall through */
542 case OTG_STATE_B_IDLE:
543 if (extcon_get_cable_state_(rphy->edev, EXTCON_USB_HOST) > 0) {
544 dev_dbg(&rport->phy->dev, "usb otg host connect\n");
545 rport->state = OTG_STATE_A_HOST;
546 rockchip_usb2phy_power_on(rport->phy);
547 return;
548 } else if (vbus_attach) {
549 dev_dbg(&rport->phy->dev, "vbus_attach\n");
550 switch (rphy->chg_state) {
551 case USB_CHG_STATE_UNDEFINED:
552 schedule_delayed_work(&rport->chg_work, 0);
553 return;
554 case USB_CHG_STATE_DETECTED:
555 switch (rphy->chg_type) {
556 case POWER_SUPPLY_TYPE_USB:
557 dev_dbg(&rport->phy->dev,
558 "sdp cable is connecetd\n");
559 rockchip_usb2phy_power_on(rport->phy);
560 rport->state = OTG_STATE_B_PERIPHERAL;
561 notify_charger = true;
562 sch_work = true;
563 cable = EXTCON_CHG_USB_SDP;
564 break;
565 case POWER_SUPPLY_TYPE_USB_DCP:
566 dev_dbg(&rport->phy->dev,
567 "dcp cable is connecetd\n");
568 rockchip_usb2phy_power_off(rport->phy);
569 notify_charger = true;
570 sch_work = true;
571 cable = EXTCON_CHG_USB_DCP;
572 break;
573 case POWER_SUPPLY_TYPE_USB_CDP:
574 dev_dbg(&rport->phy->dev,
575 "cdp cable is connecetd\n");
576 rockchip_usb2phy_power_on(rport->phy);
577 rport->state = OTG_STATE_B_PERIPHERAL;
578 notify_charger = true;
579 sch_work = true;
580 cable = EXTCON_CHG_USB_CDP;
581 break;
582 default:
583 break;
584 }
585 break;
586 default:
587 break;
588 }
589 } else {
590 notify_charger = true;
591 rphy->chg_state = USB_CHG_STATE_UNDEFINED;
592 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
593 }
594
595 if (rport->vbus_attached != vbus_attach) {
596 rport->vbus_attached = vbus_attach;
597
598 if (notify_charger && rphy->edev)
599 extcon_set_cable_state_(rphy->edev,
600 cable, vbus_attach);
601 }
602 break;
603 case OTG_STATE_B_PERIPHERAL:
604 if (!vbus_attach) {
605 dev_dbg(&rport->phy->dev, "usb disconnect\n");
606 rphy->chg_state = USB_CHG_STATE_UNDEFINED;
607 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
608 rport->state = OTG_STATE_B_IDLE;
609 delay = 0;
610 rockchip_usb2phy_power_off(rport->phy);
611 }
612 sch_work = true;
613 break;
614 case OTG_STATE_A_HOST:
615 if (extcon_get_cable_state_(rphy->edev, EXTCON_USB_HOST) == 0) {
616 dev_dbg(&rport->phy->dev, "usb otg host disconnect\n");
617 rport->state = OTG_STATE_B_IDLE;
618 rockchip_usb2phy_power_off(rport->phy);
619 }
620 break;
621 default:
622 break;
623 }
624
625 if (sch_work)
626 schedule_delayed_work(&rport->otg_sm_work, delay);
627}
628
629static const char *chg_to_string(enum power_supply_type chg_type)
630{
631 switch (chg_type) {
632 case POWER_SUPPLY_TYPE_USB:
633 return "USB_SDP_CHARGER";
634 case POWER_SUPPLY_TYPE_USB_DCP:
635 return "USB_DCP_CHARGER";
636 case POWER_SUPPLY_TYPE_USB_CDP:
637 return "USB_CDP_CHARGER";
638 default:
639 return "INVALID_CHARGER";
640 }
641}
642
643static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
644 bool en)
645{
646 property_enable(rphy, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
647 property_enable(rphy, &rphy->phy_cfg->chg_det.idp_src_en, en);
648}
649
650static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
651 bool en)
652{
653 property_enable(rphy, &rphy->phy_cfg->chg_det.vdp_src_en, en);
654 property_enable(rphy, &rphy->phy_cfg->chg_det.idm_sink_en, en);
655}
656
657static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
658 bool en)
659{
660 property_enable(rphy, &rphy->phy_cfg->chg_det.vdm_src_en, en);
661 property_enable(rphy, &rphy->phy_cfg->chg_det.idp_sink_en, en);
662}
663
664#define CHG_DCD_POLL_TIME (100 * HZ / 1000)
665#define CHG_DCD_MAX_RETRIES 6
666#define CHG_PRIMARY_DET_TIME (40 * HZ / 1000)
667#define CHG_SECONDARY_DET_TIME (40 * HZ / 1000)
668static void rockchip_chg_detect_work(struct work_struct *work)
669{
670 struct rockchip_usb2phy_port *rport =
671 container_of(work, struct rockchip_usb2phy_port, chg_work.work);
672 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
673 bool is_dcd, tmout, vout;
674 unsigned long delay;
675
676 dev_dbg(&rport->phy->dev, "chg detection work state = %d\n",
677 rphy->chg_state);
678 switch (rphy->chg_state) {
679 case USB_CHG_STATE_UNDEFINED:
680 if (!rport->suspended)
681 rockchip_usb2phy_power_off(rport->phy);
682 /* put the controller in non-driving mode */
683 property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, false);
684 /* Start DCD processing stage 1 */
685 rockchip_chg_enable_dcd(rphy, true);
686 rphy->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
687 rphy->dcd_retries = 0;
688 delay = CHG_DCD_POLL_TIME;
689 break;
690 case USB_CHG_STATE_WAIT_FOR_DCD:
691 /* get data contact detection status */
692 is_dcd = property_enabled(rphy, &rphy->phy_cfg->chg_det.dp_det);
693 tmout = ++rphy->dcd_retries == CHG_DCD_MAX_RETRIES;
694 /* stage 2 */
695 if (is_dcd || tmout) {
696 /* stage 4 */
697 /* Turn off DCD circuitry */
698 rockchip_chg_enable_dcd(rphy, false);
699 /* Voltage Source on DP, Probe on DM */
700 rockchip_chg_enable_primary_det(rphy, true);
701 delay = CHG_PRIMARY_DET_TIME;
702 rphy->chg_state = USB_CHG_STATE_DCD_DONE;
703 } else {
704 /* stage 3 */
705 delay = CHG_DCD_POLL_TIME;
706 }
707 break;
708 case USB_CHG_STATE_DCD_DONE:
709 vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.cp_det);
710 rockchip_chg_enable_primary_det(rphy, false);
711 if (vout) {
712 /* Voltage Source on DM, Probe on DP */
713 rockchip_chg_enable_secondary_det(rphy, true);
714 delay = CHG_SECONDARY_DET_TIME;
715 rphy->chg_state = USB_CHG_STATE_PRIMARY_DONE;
716 } else {
717 if (rphy->dcd_retries == CHG_DCD_MAX_RETRIES) {
718 /* floating charger found */
719 rphy->chg_type = POWER_SUPPLY_TYPE_USB_DCP;
720 rphy->chg_state = USB_CHG_STATE_DETECTED;
721 delay = 0;
722 } else {
723 rphy->chg_type = POWER_SUPPLY_TYPE_USB;
724 rphy->chg_state = USB_CHG_STATE_DETECTED;
725 delay = 0;
726 }
727 }
728 break;
729 case USB_CHG_STATE_PRIMARY_DONE:
730 vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.dcp_det);
731 /* Turn off voltage source */
732 rockchip_chg_enable_secondary_det(rphy, false);
733 if (vout)
734 rphy->chg_type = POWER_SUPPLY_TYPE_USB_DCP;
735 else
736 rphy->chg_type = POWER_SUPPLY_TYPE_USB_CDP;
737 /* fall through */
738 case USB_CHG_STATE_SECONDARY_DONE:
739 rphy->chg_state = USB_CHG_STATE_DETECTED;
740 delay = 0;
741 /* fall through */
742 case USB_CHG_STATE_DETECTED:
743 /* put the controller in normal mode */
744 property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, true);
745 rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work);
746 dev_info(&rport->phy->dev, "charger = %s\n",
747 chg_to_string(rphy->chg_type));
748 return;
749 default:
750 return;
751 }
752
753 schedule_delayed_work(&rport->chg_work, delay);
754}
755
357/* 756/*
358 * The function manage host-phy port state and suspend/resume phy port 757 * The function manage host-phy port state and suspend/resume phy port
359 * to save power. 758 * to save power.
@@ -485,6 +884,26 @@ static irqreturn_t rockchip_usb2phy_linestate_irq(int irq, void *data)
485 return IRQ_HANDLED; 884 return IRQ_HANDLED;
486} 885}
487 886
887static irqreturn_t rockchip_usb2phy_bvalid_irq(int irq, void *data)
888{
889 struct rockchip_usb2phy_port *rport = data;
890 struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
891
892 if (!property_enabled(rphy, &rport->port_cfg->bvalid_det_st))
893 return IRQ_NONE;
894
895 mutex_lock(&rport->mutex);
896
897 /* clear bvalid detect irq pending status */
898 property_enable(rphy, &rport->port_cfg->bvalid_det_clr, true);
899
900 mutex_unlock(&rport->mutex);
901
902 rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work);
903
904 return IRQ_HANDLED;
905}
906
488static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy, 907static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
489 struct rockchip_usb2phy_port *rport, 908 struct rockchip_usb2phy_port *rport,
490 struct device_node *child_np) 909 struct device_node *child_np)
@@ -509,13 +928,86 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
509 IRQF_ONESHOT, 928 IRQF_ONESHOT,
510 "rockchip_usb2phy", rport); 929 "rockchip_usb2phy", rport);
511 if (ret) { 930 if (ret) {
512 dev_err(rphy->dev, "failed to request irq handle\n"); 931 dev_err(rphy->dev, "failed to request linestate irq handle\n");
513 return ret; 932 return ret;
514 } 933 }
515 934
516 return 0; 935 return 0;
517} 936}
518 937
938static int rockchip_otg_event(struct notifier_block *nb,
939 unsigned long event, void *ptr)
940{
941 struct rockchip_usb2phy_port *rport =
942 container_of(nb, struct rockchip_usb2phy_port, event_nb);
943
944 schedule_delayed_work(&rport->otg_sm_work, OTG_SCHEDULE_DELAY);
945
946 return NOTIFY_DONE;
947}
948
949static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
950 struct rockchip_usb2phy_port *rport,
951 struct device_node *child_np)
952{
953 int ret;
954
955 rport->port_id = USB2PHY_PORT_OTG;
956 rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
957 rport->state = OTG_STATE_UNDEFINED;
958
959 /*
960 * set suspended flag to true, but actually don't
961 * put phy in suspend mode, it aims to enable usb
962 * phy and clock in power_on() called by usb controller
963 * driver during probe.
964 */
965 rport->suspended = true;
966 rport->vbus_attached = false;
967
968 mutex_init(&rport->mutex);
969
970 rport->mode = of_usb_get_dr_mode_by_phy(child_np, -1);
971 if (rport->mode == USB_DR_MODE_HOST) {
972 ret = 0;
973 goto out;
974 }
975
976 INIT_DELAYED_WORK(&rport->chg_work, rockchip_chg_detect_work);
977 INIT_DELAYED_WORK(&rport->otg_sm_work, rockchip_usb2phy_otg_sm_work);
978
979 rport->utmi_avalid =
980 of_property_read_bool(child_np, "rockchip,utmi-avalid");
981
982 rport->bvalid_irq = of_irq_get_byname(child_np, "otg-bvalid");
983 if (rport->bvalid_irq < 0) {
984 dev_err(rphy->dev, "no vbus valid irq provided\n");
985 ret = rport->bvalid_irq;
986 goto out;
987 }
988
989 ret = devm_request_threaded_irq(rphy->dev, rport->bvalid_irq, NULL,
990 rockchip_usb2phy_bvalid_irq,
991 IRQF_ONESHOT,
992 "rockchip_usb2phy_bvalid", rport);
993 if (ret) {
994 dev_err(rphy->dev, "failed to request otg-bvalid irq handle\n");
995 goto out;
996 }
997
998 if (!IS_ERR(rphy->edev)) {
999 rport->event_nb.notifier_call = rockchip_otg_event;
1000
1001 ret = extcon_register_notifier(rphy->edev, EXTCON_USB_HOST,
1002 &rport->event_nb);
1003 if (ret)
1004 dev_err(rphy->dev, "register USB HOST notifier failed\n");
1005 }
1006
1007out:
1008 return ret;
1009}
1010
519static int rockchip_usb2phy_probe(struct platform_device *pdev) 1011static int rockchip_usb2phy_probe(struct platform_device *pdev)
520{ 1012{
521 struct device *dev = &pdev->dev; 1013 struct device *dev = &pdev->dev;
@@ -553,8 +1045,14 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
553 1045
554 rphy->dev = dev; 1046 rphy->dev = dev;
555 phy_cfgs = match->data; 1047 phy_cfgs = match->data;
1048 rphy->chg_state = USB_CHG_STATE_UNDEFINED;
1049 rphy->chg_type = POWER_SUPPLY_TYPE_UNKNOWN;
556 platform_set_drvdata(pdev, rphy); 1050 platform_set_drvdata(pdev, rphy);
557 1051
1052 ret = rockchip_usb2phy_extcon_register(rphy);
1053 if (ret)
1054 return ret;
1055
558 /* find out a proper config which can be matched with dt. */ 1056 /* find out a proper config which can be matched with dt. */
559 index = 0; 1057 index = 0;
560 while (phy_cfgs[index].reg) { 1058 while (phy_cfgs[index].reg) {
@@ -591,13 +1089,9 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
591 struct rockchip_usb2phy_port *rport = &rphy->ports[index]; 1089 struct rockchip_usb2phy_port *rport = &rphy->ports[index];
592 struct phy *phy; 1090 struct phy *phy;
593 1091
594 /* 1092 /* This driver aims to support both otg-port and host-port */
595 * This driver aim to support both otg-port and host-port, 1093 if (of_node_cmp(child_np->name, "host-port") &&
596 * but unfortunately, the otg part is not ready in current, 1094 of_node_cmp(child_np->name, "otg-port"))
597 * so this comments and below codes are interim, which should
598 * be changed after otg-port is supplied soon.
599 */
600 if (of_node_cmp(child_np->name, "host-port"))
601 goto next_child; 1095 goto next_child;
602 1096
603 phy = devm_phy_create(dev, child_np, &rockchip_usb2phy_ops); 1097 phy = devm_phy_create(dev, child_np, &rockchip_usb2phy_ops);
@@ -610,9 +1104,18 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
610 rport->phy = phy; 1104 rport->phy = phy;
611 phy_set_drvdata(rport->phy, rport); 1105 phy_set_drvdata(rport->phy, rport);
612 1106
613 ret = rockchip_usb2phy_host_port_init(rphy, rport, child_np); 1107 /* initialize otg/host port separately */
614 if (ret) 1108 if (!of_node_cmp(child_np->name, "host-port")) {
615 goto put_child; 1109 ret = rockchip_usb2phy_host_port_init(rphy, rport,
1110 child_np);
1111 if (ret)
1112 goto put_child;
1113 } else {
1114 ret = rockchip_usb2phy_otg_port_init(rphy, rport,
1115 child_np);
1116 if (ret)
1117 goto put_child;
1118 }
616 1119
617next_child: 1120next_child:
618 /* to prevent out of boundary */ 1121 /* to prevent out of boundary */
@@ -654,10 +1157,18 @@ static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
654 1157
655static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { 1158static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
656 { 1159 {
657 .reg = 0xe450, 1160 .reg = 0xe450,
658 .num_ports = 2, 1161 .num_ports = 2,
659 .clkout_ctl = { 0xe450, 4, 4, 1, 0 }, 1162 .clkout_ctl = { 0xe450, 4, 4, 1, 0 },
660 .port_cfgs = { 1163 .port_cfgs = {
1164 [USB2PHY_PORT_OTG] = {
1165 .phy_sus = { 0xe454, 1, 0, 2, 1 },
1166 .bvalid_det_en = { 0xe3c0, 3, 3, 0, 1 },
1167 .bvalid_det_st = { 0xe3e0, 3, 3, 0, 1 },
1168 .bvalid_det_clr = { 0xe3d0, 3, 3, 0, 1 },
1169 .utmi_avalid = { 0xe2ac, 7, 7, 0, 1 },
1170 .utmi_bvalid = { 0xe2ac, 12, 12, 0, 1 },
1171 },
661 [USB2PHY_PORT_HOST] = { 1172 [USB2PHY_PORT_HOST] = {
662 .phy_sus = { 0xe458, 1, 0, 0x2, 0x1 }, 1173 .phy_sus = { 0xe458, 1, 0, 0x2, 0x1 },
663 .ls_det_en = { 0xe3c0, 6, 6, 0, 1 }, 1174 .ls_det_en = { 0xe3c0, 6, 6, 0, 1 },
@@ -667,12 +1178,32 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
667 .utmi_hstdet = { 0xe2ac, 23, 23, 0, 1 } 1178 .utmi_hstdet = { 0xe2ac, 23, 23, 0, 1 }
668 } 1179 }
669 }, 1180 },
1181 .chg_det = {
1182 .opmode = { 0xe454, 3, 0, 5, 1 },
1183 .cp_det = { 0xe2ac, 2, 2, 0, 1 },
1184 .dcp_det = { 0xe2ac, 1, 1, 0, 1 },
1185 .dp_det = { 0xe2ac, 0, 0, 0, 1 },
1186 .idm_sink_en = { 0xe450, 8, 8, 0, 1 },
1187 .idp_sink_en = { 0xe450, 7, 7, 0, 1 },
1188 .idp_src_en = { 0xe450, 9, 9, 0, 1 },
1189 .rdm_pdwn_en = { 0xe450, 10, 10, 0, 1 },
1190 .vdm_src_en = { 0xe450, 12, 12, 0, 1 },
1191 .vdp_src_en = { 0xe450, 11, 11, 0, 1 },
1192 },
670 }, 1193 },
671 { 1194 {
672 .reg = 0xe460, 1195 .reg = 0xe460,
673 .num_ports = 2, 1196 .num_ports = 2,
674 .clkout_ctl = { 0xe460, 4, 4, 1, 0 }, 1197 .clkout_ctl = { 0xe460, 4, 4, 1, 0 },
675 .port_cfgs = { 1198 .port_cfgs = {
1199 [USB2PHY_PORT_OTG] = {
1200 .phy_sus = { 0xe464, 1, 0, 2, 1 },
1201 .bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 },
1202 .bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 },
1203 .bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
1204 .utmi_avalid = { 0xe2ac, 10, 10, 0, 1 },
1205 .utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 },
1206 },
676 [USB2PHY_PORT_HOST] = { 1207 [USB2PHY_PORT_HOST] = {
677 .phy_sus = { 0xe468, 1, 0, 0x2, 0x1 }, 1208 .phy_sus = { 0xe468, 1, 0, 0x2, 0x1 },
678 .ls_det_en = { 0xe3c0, 11, 11, 0, 1 }, 1209 .ls_det_en = { 0xe3c0, 11, 11, 0, 1 },
diff --git a/drivers/phy/phy-s5pv210-usb2.c b/drivers/phy/phy-s5pv210-usb2.c
index 004d320767e4..f6f72339bbc3 100644
--- a/drivers/phy/phy-s5pv210-usb2.c
+++ b/drivers/phy/phy-s5pv210-usb2.c
@@ -103,7 +103,7 @@ static void s5pv210_isol(struct samsung_usb2_phy_instance *inst, bool on)
103 break; 103 break;
104 default: 104 default:
105 return; 105 return;
106 }; 106 }
107 107
108 regmap_update_bits(drv->reg_pmu, S5PV210_USB_ISOL_OFFSET, 108 regmap_update_bits(drv->reg_pmu, S5PV210_USB_ISOL_OFFSET,
109 mask, on ? 0 : mask); 109 mask, on ? 0 : mask);
@@ -127,7 +127,7 @@ static void s5pv210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on)
127 rstbits = S5PV210_URSTCON_PHY1_ALL | 127 rstbits = S5PV210_URSTCON_PHY1_ALL |
128 S5PV210_URSTCON_HOST_LINK_ALL; 128 S5PV210_URSTCON_HOST_LINK_ALL;
129 break; 129 break;
130 }; 130 }
131 131
132 if (on) { 132 if (on) {
133 writel(drv->ref_reg_val, drv->reg_phy + S5PV210_UPHYCLK); 133 writel(drv->ref_reg_val, drv->reg_phy + S5PV210_UPHYCLK);
diff --git a/drivers/phy/phy-stih41x-usb.c b/drivers/phy/phy-stih41x-usb.c
deleted file mode 100644
index 0ac74639ad02..000000000000
--- a/drivers/phy/phy-stih41x-usb.c
+++ /dev/null
@@ -1,188 +0,0 @@
1/*
2 * Copyright (C) 2014 STMicroelectronics
3 *
4 * STMicroelectronics PHY driver for STiH41x USB.
5 *
6 * Author: Maxime Coquelin <maxime.coquelin@st.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2, as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/of_platform.h>
20#include <linux/clk.h>
21#include <linux/phy/phy.h>
22#include <linux/regmap.h>
23#include <linux/mfd/syscon.h>
24
25#define SYSCFG332 0x80
26#define SYSCFG2520 0x820
27
28/**
29 * struct stih41x_usb_cfg - SoC specific PHY register mapping
30 * @syscfg: Offset in syscfg registers bank
31 * @cfg_mask: Bits mask for PHY configuration
32 * @cfg: Static configuration value for PHY
33 * @oscok: Notify the PHY oscillator clock is ready
34 * Setting this bit enable the PHY
35 */
36struct stih41x_usb_cfg {
37 u32 syscfg;
38 u32 cfg_mask;
39 u32 cfg;
40 u32 oscok;
41};
42
43/**
44 * struct stih41x_usb_phy - Private data for the PHY
45 * @dev: device for this controller
46 * @regmap: Syscfg registers bank in which PHY is configured
47 * @cfg: SoC specific PHY register mapping
48 * @clk: Oscillator used by the PHY
49 */
50struct stih41x_usb_phy {
51 struct device *dev;
52 struct regmap *regmap;
53 const struct stih41x_usb_cfg *cfg;
54 struct clk *clk;
55};
56
57static struct stih41x_usb_cfg stih415_usb_phy_cfg = {
58 .syscfg = SYSCFG332,
59 .cfg_mask = 0x3f,
60 .cfg = 0x38,
61 .oscok = BIT(6),
62};
63
64static struct stih41x_usb_cfg stih416_usb_phy_cfg = {
65 .syscfg = SYSCFG2520,
66 .cfg_mask = 0x33f,
67 .cfg = 0x238,
68 .oscok = BIT(6),
69};
70
71static int stih41x_usb_phy_init(struct phy *phy)
72{
73 struct stih41x_usb_phy *phy_dev = phy_get_drvdata(phy);
74
75 return regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
76 phy_dev->cfg->cfg_mask, phy_dev->cfg->cfg);
77}
78
79static int stih41x_usb_phy_power_on(struct phy *phy)
80{
81 struct stih41x_usb_phy *phy_dev = phy_get_drvdata(phy);
82 int ret;
83
84 ret = clk_prepare_enable(phy_dev->clk);
85 if (ret) {
86 dev_err(phy_dev->dev, "Failed to enable osc_phy clock\n");
87 return ret;
88 }
89
90 ret = regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
91 phy_dev->cfg->oscok, phy_dev->cfg->oscok);
92 if (ret)
93 clk_disable_unprepare(phy_dev->clk);
94
95 return ret;
96}
97
98static int stih41x_usb_phy_power_off(struct phy *phy)
99{
100 struct stih41x_usb_phy *phy_dev = phy_get_drvdata(phy);
101 int ret;
102
103 ret = regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
104 phy_dev->cfg->oscok, 0);
105 if (ret) {
106 dev_err(phy_dev->dev, "Failed to clear oscok bit\n");
107 return ret;
108 }
109
110 clk_disable_unprepare(phy_dev->clk);
111
112 return 0;
113}
114
115static const struct phy_ops stih41x_usb_phy_ops = {
116 .init = stih41x_usb_phy_init,
117 .power_on = stih41x_usb_phy_power_on,
118 .power_off = stih41x_usb_phy_power_off,
119 .owner = THIS_MODULE,
120};
121
122static const struct of_device_id stih41x_usb_phy_of_match[];
123
124static int stih41x_usb_phy_probe(struct platform_device *pdev)
125{
126 struct device_node *np = pdev->dev.of_node;
127 const struct of_device_id *match;
128 struct stih41x_usb_phy *phy_dev;
129 struct device *dev = &pdev->dev;
130 struct phy_provider *phy_provider;
131 struct phy *phy;
132
133 phy_dev = devm_kzalloc(dev, sizeof(*phy_dev), GFP_KERNEL);
134 if (!phy_dev)
135 return -ENOMEM;
136
137 match = of_match_device(stih41x_usb_phy_of_match, &pdev->dev);
138 if (!match)
139 return -ENODEV;
140
141 phy_dev->cfg = match->data;
142
143 phy_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
144 if (IS_ERR(phy_dev->regmap)) {
145 dev_err(dev, "No syscfg phandle specified\n");
146 return PTR_ERR(phy_dev->regmap);
147 }
148
149 phy_dev->clk = devm_clk_get(dev, "osc_phy");
150 if (IS_ERR(phy_dev->clk)) {
151 dev_err(dev, "osc_phy clk not found\n");
152 return PTR_ERR(phy_dev->clk);
153 }
154
155 phy = devm_phy_create(dev, NULL, &stih41x_usb_phy_ops);
156
157 if (IS_ERR(phy)) {
158 dev_err(dev, "failed to create phy\n");
159 return PTR_ERR(phy);
160 }
161
162 phy_dev->dev = dev;
163
164 phy_set_drvdata(phy, phy_dev);
165
166 phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
167 return PTR_ERR_OR_ZERO(phy_provider);
168}
169
170static const struct of_device_id stih41x_usb_phy_of_match[] = {
171 { .compatible = "st,stih415-usb-phy", .data = &stih415_usb_phy_cfg },
172 { .compatible = "st,stih416-usb-phy", .data = &stih416_usb_phy_cfg },
173 { /* sentinel */ },
174};
175MODULE_DEVICE_TABLE(of, stih41x_usb_phy_of_match);
176
177static struct platform_driver stih41x_usb_phy_driver = {
178 .probe = stih41x_usb_phy_probe,
179 .driver = {
180 .name = "stih41x-usb-phy",
181 .of_match_table = stih41x_usb_phy_of_match,
182 }
183};
184module_platform_driver(stih41x_usb_phy_driver);
185
186MODULE_AUTHOR("Maxime Coquelin <maxime.coquelin@st.com>");
187MODULE_DESCRIPTION("STMicroelectronics USB PHY driver for STiH41x series");
188MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index fec34f5213c4..bf28a0fdd569 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -436,25 +436,31 @@ static int sun4i_usb_phy_set_mode(struct phy *_phy, enum phy_mode mode)
436{ 436{
437 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 437 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
438 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); 438 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
439 int new_mode;
439 440
440 if (phy->index != 0) 441 if (phy->index != 0)
441 return -EINVAL; 442 return -EINVAL;
442 443
443 switch (mode) { 444 switch (mode) {
444 case PHY_MODE_USB_HOST: 445 case PHY_MODE_USB_HOST:
445 data->dr_mode = USB_DR_MODE_HOST; 446 new_mode = USB_DR_MODE_HOST;
446 break; 447 break;
447 case PHY_MODE_USB_DEVICE: 448 case PHY_MODE_USB_DEVICE:
448 data->dr_mode = USB_DR_MODE_PERIPHERAL; 449 new_mode = USB_DR_MODE_PERIPHERAL;
449 break; 450 break;
450 case PHY_MODE_USB_OTG: 451 case PHY_MODE_USB_OTG:
451 data->dr_mode = USB_DR_MODE_OTG; 452 new_mode = USB_DR_MODE_OTG;
452 break; 453 break;
453 default: 454 default:
454 return -EINVAL; 455 return -EINVAL;
455 } 456 }
456 457
457 dev_info(&_phy->dev, "Changing dr_mode to %d\n", (int)data->dr_mode); 458 if (new_mode != data->dr_mode) {
459 dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
460 data->dr_mode = new_mode;
461 }
462
463 data->id_det = -1; /* Force reprocessing of id */
458 data->force_session_end = true; 464 data->force_session_end = true;
459 queue_delayed_work(system_wq, &data->detect, 0); 465 queue_delayed_work(system_wq, &data->detect, 0);
460 466
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index bf46844dc387..9c84d32c6f60 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -537,10 +537,7 @@ static int ti_pipe3_get_pll_base(struct ti_pipe3 *phy)
537 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 537 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
538 "pll_ctrl"); 538 "pll_ctrl");
539 phy->pll_ctrl_base = devm_ioremap_resource(dev, res); 539 phy->pll_ctrl_base = devm_ioremap_resource(dev, res);
540 if (IS_ERR(phy->pll_ctrl_base)) 540 return PTR_ERR_OR_ZERO(phy->pll_ctrl_base);
541 return PTR_ERR(phy->pll_ctrl_base);
542
543 return 0;
544} 541}
545 542
546static int ti_pipe3_probe(struct platform_device *pdev) 543static int ti_pipe3_probe(struct platform_device *pdev)
@@ -592,10 +589,7 @@ static int ti_pipe3_probe(struct platform_device *pdev)
592 ti_pipe3_power_off(generic_phy); 589 ti_pipe3_power_off(generic_phy);
593 590
594 phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); 591 phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
595 if (IS_ERR(phy_provider)) 592 return PTR_ERR_OR_ZERO(phy_provider);
596 return PTR_ERR(phy_provider);
597
598 return 0;
599} 593}
600 594
601static int ti_pipe3_remove(struct platform_device *pdev) 595static int ti_pipe3_remove(struct platform_device *pdev)
diff --git a/drivers/phy/phy-twl4030-usb.c b/drivers/phy/phy-twl4030-usb.c
index 547ca7b3f098..2990b3965460 100644
--- a/drivers/phy/phy-twl4030-usb.c
+++ b/drivers/phy/phy-twl4030-usb.c
@@ -317,6 +317,9 @@ static enum musb_vbus_id_status
317 linkstat = MUSB_VBUS_OFF; 317 linkstat = MUSB_VBUS_OFF;
318 } 318 }
319 319
320 kobject_uevent(&twl->dev->kobj, linkstat == MUSB_VBUS_VALID
321 ? KOBJ_ONLINE : KOBJ_OFFLINE);
322
320 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n", 323 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
321 status, status, linkstat); 324 status, status, linkstat);
322 325
diff --git a/drivers/phy/tegra/xusb-tegra124.c b/drivers/phy/tegra/xusb-tegra124.c
index 119957249a51..c45cbedc6634 100644
--- a/drivers/phy/tegra/xusb-tegra124.c
+++ b/drivers/phy/tegra/xusb-tegra124.c
@@ -1483,7 +1483,6 @@ static int tegra124_usb3_port_enable(struct tegra_xusb_port *port)
1483 struct tegra_xusb_padctl *padctl = port->padctl; 1483 struct tegra_xusb_padctl *padctl = port->padctl;
1484 struct tegra_xusb_lane *lane = usb3->base.lane; 1484 struct tegra_xusb_lane *lane = usb3->base.lane;
1485 unsigned int index = port->index, offset; 1485 unsigned int index = port->index, offset;
1486 int ret = 0;
1487 u32 value; 1486 u32 value;
1488 1487
1489 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP); 1488 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP);
@@ -1612,7 +1611,7 @@ static int tegra124_usb3_port_enable(struct tegra_xusb_port *port)
1612 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(index); 1611 value &= ~XUSB_PADCTL_ELPG_PROGRAM_SSPX_ELPG_CLAMP_EN(index);
1613 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); 1612 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);
1614 1613
1615 return ret; 1614 return 0;
1616} 1615}
1617 1616
1618static void tegra124_usb3_port_disable(struct tegra_xusb_port *port) 1617static void tegra124_usb3_port_disable(struct tegra_xusb_port *port)
diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c
index 873424ab0e32..3cbcb2537657 100644
--- a/drivers/phy/tegra/xusb.c
+++ b/drivers/phy/tegra/xusb.c
@@ -561,10 +561,7 @@ static int tegra_xusb_usb2_port_parse_dt(struct tegra_xusb_usb2_port *usb2)
561 usb2->internal = of_property_read_bool(np, "nvidia,internal"); 561 usb2->internal = of_property_read_bool(np, "nvidia,internal");
562 562
563 usb2->supply = devm_regulator_get(&port->dev, "vbus"); 563 usb2->supply = devm_regulator_get(&port->dev, "vbus");
564 if (IS_ERR(usb2->supply)) 564 return PTR_ERR_OR_ZERO(usb2->supply);
565 return PTR_ERR(usb2->supply);
566
567 return 0;
568} 565}
569 566
570static int tegra_xusb_add_usb2_port(struct tegra_xusb_padctl *padctl, 567static int tegra_xusb_add_usb2_port(struct tegra_xusb_padctl *padctl,
@@ -731,10 +728,7 @@ static int tegra_xusb_usb3_port_parse_dt(struct tegra_xusb_usb3_port *usb3)
731 usb3->internal = of_property_read_bool(np, "nvidia,internal"); 728 usb3->internal = of_property_read_bool(np, "nvidia,internal");
732 729
733 usb3->supply = devm_regulator_get(&port->dev, "vbus"); 730 usb3->supply = devm_regulator_get(&port->dev, "vbus");
734 if (IS_ERR(usb3->supply)) 731 return PTR_ERR_OR_ZERO(usb3->supply);
735 return PTR_ERR(usb3->supply);
736
737 return 0;
738} 732}
739 733
740static int tegra_xusb_add_usb3_port(struct tegra_xusb_padctl *padctl, 734static int tegra_xusb_add_usb3_port(struct tegra_xusb_padctl *padctl,
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 644e978cbd3e..fbe493d44e81 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -95,6 +95,8 @@ source "drivers/usb/usbip/Kconfig"
95 95
96endif 96endif
97 97
98source "drivers/usb/mtu3/Kconfig"
99
98source "drivers/usb/musb/Kconfig" 100source "drivers/usb/musb/Kconfig"
99 101
100source "drivers/usb/dwc3/Kconfig" 102source "drivers/usb/dwc3/Kconfig"
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index dca78565eb55..7791af6c102c 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_USB_DWC2) += dwc2/
12obj-$(CONFIG_USB_ISP1760) += isp1760/ 12obj-$(CONFIG_USB_ISP1760) += isp1760/
13 13
14obj-$(CONFIG_USB_MON) += mon/ 14obj-$(CONFIG_USB_MON) += mon/
15obj-$(CONFIG_USB_MTU3) += mtu3/
15 16
16obj-$(CONFIG_PCI) += host/ 17obj-$(CONFIG_PCI) += host/
17obj-$(CONFIG_USB_EHCI_HCD) += host/ 18obj-$(CONFIG_USB_EHCI_HCD) += host/
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index 099179457f60..5f4a8157fad8 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -18,6 +18,7 @@
18#include <linux/pm_runtime.h> 18#include <linux/pm_runtime.h>
19#include <linux/dma-mapping.h> 19#include <linux/dma-mapping.h>
20#include <linux/usb/chipidea.h> 20#include <linux/usb/chipidea.h>
21#include <linux/usb/of.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22 23
23#include "ci.h" 24#include "ci.h"
@@ -146,6 +147,9 @@ static struct imx_usbmisc_data *usbmisc_get_init_data(struct device *dev)
146 if (of_find_property(np, "external-vbus-divider", NULL)) 147 if (of_find_property(np, "external-vbus-divider", NULL))
147 data->evdo = 1; 148 data->evdo = 1;
148 149
150 if (of_usb_get_phy_mode(np) == USBPHY_INTERFACE_MODE_ULPI)
151 data->ulpi = 1;
152
149 return data; 153 return data;
150} 154}
151 155
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.h b/drivers/usb/chipidea/ci_hdrc_imx.h
index 409aa5ca8dda..d666c9f036ba 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.h
+++ b/drivers/usb/chipidea/ci_hdrc_imx.h
@@ -19,6 +19,7 @@ struct imx_usbmisc_data {
19 unsigned int disable_oc:1; /* over current detect disabled */ 19 unsigned int disable_oc:1; /* over current detect disabled */
20 unsigned int oc_polarity:1; /* over current polarity if oc enabled */ 20 unsigned int oc_polarity:1; /* over current polarity if oc enabled */
21 unsigned int evdo:1; /* set external vbus divider option */ 21 unsigned int evdo:1; /* set external vbus divider option */
22 unsigned int ulpi:1; /* connected to an ULPI phy */
22}; 23};
23 24
24int imx_usbmisc_init(struct imx_usbmisc_data *); 25int imx_usbmisc_init(struct imx_usbmisc_data *);
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index c9e80ad48fdc..cf132f057137 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -365,7 +365,7 @@ static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
365 if (hwreq->req.length == 0 365 if (hwreq->req.length == 0
366 || hwreq->req.length % hwep->ep.maxpacket) 366 || hwreq->req.length % hwep->ep.maxpacket)
367 mul++; 367 mul++;
368 node->ptr->token |= mul << __ffs(TD_MULTO); 368 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
369 } 369 }
370 370
371 temp = (u32) (hwreq->req.dma + hwreq->req.actual); 371 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
@@ -504,7 +504,7 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
504 if (hwreq->req.length == 0 504 if (hwreq->req.length == 0
505 || hwreq->req.length % hwep->ep.maxpacket) 505 || hwreq->req.length % hwep->ep.maxpacket)
506 mul++; 506 mul++;
507 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); 507 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
508 } 508 }
509 509
510 ret = hw_ep_prime(ci, hwep->num, hwep->dir, 510 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
@@ -529,7 +529,7 @@ static void free_pending_td(struct ci_hw_ep *hwep)
529static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep, 529static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
530 struct td_node *node) 530 struct td_node *node)
531{ 531{
532 hwep->qh.ptr->td.next = node->dma; 532 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
533 hwep->qh.ptr->td.token &= 533 hwep->qh.ptr->td.token &=
534 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE)); 534 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
535 535
@@ -821,7 +821,7 @@ static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
821 } 821 }
822 822
823 if (usb_endpoint_xfer_isoc(hwep->ep.desc) && 823 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
824 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { 824 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
825 dev_err(hwep->ci->dev, "request length too big for isochronous\n"); 825 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
826 return -EMSGSIZE; 826 return -EMSGSIZE;
827 } 827 }
@@ -1253,8 +1253,8 @@ static int ep_enable(struct usb_ep *ep,
1253 hwep->num = usb_endpoint_num(desc); 1253 hwep->num = usb_endpoint_num(desc);
1254 hwep->type = usb_endpoint_type(desc); 1254 hwep->type = usb_endpoint_type(desc);
1255 1255
1256 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; 1256 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1257 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); 1257 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1258 1258
1259 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) 1259 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1260 cap |= QH_IOS; 1260 cap |= QH_IOS;
diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h
index e66df0020bd4..2ecd1174d66c 100644
--- a/drivers/usb/chipidea/udc.h
+++ b/drivers/usb/chipidea/udc.h
@@ -22,11 +22,11 @@
22/* DMA layout of transfer descriptors */ 22/* DMA layout of transfer descriptors */
23struct ci_hw_td { 23struct ci_hw_td {
24 /* 0 */ 24 /* 0 */
25 u32 next; 25 __le32 next;
26#define TD_TERMINATE BIT(0) 26#define TD_TERMINATE BIT(0)
27#define TD_ADDR_MASK (0xFFFFFFEUL << 5) 27#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
28 /* 1 */ 28 /* 1 */
29 u32 token; 29 __le32 token;
30#define TD_STATUS (0x00FFUL << 0) 30#define TD_STATUS (0x00FFUL << 0)
31#define TD_STATUS_TR_ERR BIT(3) 31#define TD_STATUS_TR_ERR BIT(3)
32#define TD_STATUS_DT_ERR BIT(5) 32#define TD_STATUS_DT_ERR BIT(5)
@@ -36,7 +36,7 @@ struct ci_hw_td {
36#define TD_IOC BIT(15) 36#define TD_IOC BIT(15)
37#define TD_TOTAL_BYTES (0x7FFFUL << 16) 37#define TD_TOTAL_BYTES (0x7FFFUL << 16)
38 /* 2 */ 38 /* 2 */
39 u32 page[5]; 39 __le32 page[5];
40#define TD_CURR_OFFSET (0x0FFFUL << 0) 40#define TD_CURR_OFFSET (0x0FFFUL << 0)
41#define TD_FRAME_NUM (0x07FFUL << 0) 41#define TD_FRAME_NUM (0x07FFUL << 0)
42#define TD_RESERVED_MASK (0x0FFFUL << 0) 42#define TD_RESERVED_MASK (0x0FFFUL << 0)
@@ -45,18 +45,18 @@ struct ci_hw_td {
45/* DMA layout of queue heads */ 45/* DMA layout of queue heads */
46struct ci_hw_qh { 46struct ci_hw_qh {
47 /* 0 */ 47 /* 0 */
48 u32 cap; 48 __le32 cap;
49#define QH_IOS BIT(15) 49#define QH_IOS BIT(15)
50#define QH_MAX_PKT (0x07FFUL << 16) 50#define QH_MAX_PKT (0x07FFUL << 16)
51#define QH_ZLT BIT(29) 51#define QH_ZLT BIT(29)
52#define QH_MULT (0x0003UL << 30) 52#define QH_MULT (0x0003UL << 30)
53#define QH_ISO_MULT(x) ((x >> 11) & 0x03) 53#define QH_ISO_MULT(x) ((x >> 11) & 0x03)
54 /* 1 */ 54 /* 1 */
55 u32 curr; 55 __le32 curr;
56 /* 2 - 8 */ 56 /* 2 - 8 */
57 struct ci_hw_td td; 57 struct ci_hw_td td;
58 /* 9 */ 58 /* 9 */
59 u32 RESERVED; 59 __le32 RESERVED;
60 struct usb_ctrlrequest setup; 60 struct usb_ctrlrequest setup;
61} __attribute__ ((packed, aligned(4))); 61} __attribute__ ((packed, aligned(4)));
62 62
diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
index 20d02a5e418d..e77a4ed4f021 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -46,11 +46,23 @@
46 46
47#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08 47#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
48#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c 48#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
49#define MX53_USB_CTRL_1_OFFSET 0x10
50#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
51#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
52#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
53#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
49#define MX53_USB_UH2_CTRL_OFFSET 0x14 54#define MX53_USB_UH2_CTRL_OFFSET 0x14
50#define MX53_USB_UH3_CTRL_OFFSET 0x18 55#define MX53_USB_UH3_CTRL_OFFSET 0x18
56#define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24
57#define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21)
58#define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22)
51#define MX53_BM_OVER_CUR_DIS_H1 BIT(5) 59#define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
52#define MX53_BM_OVER_CUR_DIS_OTG BIT(8) 60#define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
53#define MX53_BM_OVER_CUR_DIS_UHx BIT(30) 61#define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
62#define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26)
63#define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27)
64#define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7)
65#define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8)
54#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3 66#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
55#define MX53_USB_PLL_DIV_24_MHZ 0x01 67#define MX53_USB_PLL_DIV_24_MHZ 0x01
56 68
@@ -199,31 +211,77 @@ static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
199 val |= MX53_USB_PLL_DIV_24_MHZ; 211 val |= MX53_USB_PLL_DIV_24_MHZ;
200 writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); 212 writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
201 213
202 if (data->disable_oc) { 214 spin_lock_irqsave(&usbmisc->lock, flags);
203 spin_lock_irqsave(&usbmisc->lock, flags); 215
204 switch (data->index) { 216 switch (data->index) {
205 case 0: 217 case 0:
218 if (data->disable_oc) {
206 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; 219 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
207 val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG; 220 val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
208 break; 221 writel(val, reg);
209 case 1: 222 }
223 break;
224 case 1:
225 if (data->disable_oc) {
210 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET; 226 reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
211 val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1; 227 val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
212 break; 228 writel(val, reg);
213 case 2: 229 }
230 break;
231 case 2:
232 if (data->ulpi) {
233 /* set USBH2 into ULPI-mode. */
234 reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
235 val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN;
236 /* select ULPI clock */
237 val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK;
238 val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI;
239 writel(val, reg);
240 /* Set interrupt wake up enable */
241 reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
242 val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
243 | MX53_USB_UHx_CTRL_ULPI_INT_EN;
244 writel(val, reg);
245 /* Disable internal 60Mhz clock */
246 reg = usbmisc->base + MX53_USB_CLKONOFF_CTRL_OFFSET;
247 val = readl(reg) | MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF;
248 writel(val, reg);
249 }
250 if (data->disable_oc) {
214 reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET; 251 reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
215 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; 252 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
216 break; 253 writel(val, reg);
217 case 3: 254 }
255 break;
256 case 3:
257 if (data->ulpi) {
258 /* set USBH3 into ULPI-mode. */
259 reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
260 val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN;
261 /* select ULPI clock */
262 val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK;
263 val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI;
264 writel(val, reg);
265 /* Set interrupt wake up enable */
218 reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET; 266 reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
219 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx; 267 val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
220 break; 268 | MX53_USB_UHx_CTRL_ULPI_INT_EN;
269 writel(val, reg);
270 /* Disable internal 60Mhz clock */
271 reg = usbmisc->base + MX53_USB_CLKONOFF_CTRL_OFFSET;
272 val = readl(reg) | MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF;
273 writel(val, reg);
221 } 274 }
222 if (reg && val) 275 if (data->disable_oc) {
276 reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
277 val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
223 writel(val, reg); 278 writel(val, reg);
224 spin_unlock_irqrestore(&usbmisc->lock, flags); 279 }
280 break;
225 } 281 }
226 282
283 spin_unlock_irqrestore(&usbmisc->lock, flags);
284
227 return 0; 285 return 0;
228} 286}
229 287
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index fada988512a1..e35b1508d3eb 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -133,8 +133,8 @@ static int acm_ctrl_msg(struct acm *acm, int request, int value,
133 buf, len, 5000); 133 buf, len, 5000);
134 134
135 dev_dbg(&acm->control->dev, 135 dev_dbg(&acm->control->dev,
136 "%s - rq 0x%02x, val %#x, len %#x, result %d\n", 136 "%s - rq 0x%02x, val %#x, len %#x, result %d\n",
137 __func__, request, value, len, retval); 137 __func__, request, value, len, retval);
138 138
139 usb_autopm_put_interface(acm->control); 139 usb_autopm_put_interface(acm->control);
140 140
@@ -158,6 +158,17 @@ static inline int acm_set_control(struct acm *acm, int control)
158#define acm_send_break(acm, ms) \ 158#define acm_send_break(acm, ms) \
159 acm_ctrl_msg(acm, USB_CDC_REQ_SEND_BREAK, ms, NULL, 0) 159 acm_ctrl_msg(acm, USB_CDC_REQ_SEND_BREAK, ms, NULL, 0)
160 160
161static void acm_kill_urbs(struct acm *acm)
162{
163 int i;
164
165 usb_kill_urb(acm->ctrlurb);
166 for (i = 0; i < ACM_NW; i++)
167 usb_kill_urb(acm->wb[i].urb);
168 for (i = 0; i < acm->rx_buflimit; i++)
169 usb_kill_urb(acm->read_urbs[i]);
170}
171
161/* 172/*
162 * Write buffer management. 173 * Write buffer management.
163 * All of these assume proper locks taken by the caller. 174 * All of these assume proper locks taken by the caller.
@@ -291,13 +302,13 @@ static void acm_ctrl_irq(struct urb *urb)
291 case -ESHUTDOWN: 302 case -ESHUTDOWN:
292 /* this urb is terminated, clean up */ 303 /* this urb is terminated, clean up */
293 dev_dbg(&acm->control->dev, 304 dev_dbg(&acm->control->dev,
294 "%s - urb shutting down with status: %d\n", 305 "%s - urb shutting down with status: %d\n",
295 __func__, status); 306 __func__, status);
296 return; 307 return;
297 default: 308 default:
298 dev_dbg(&acm->control->dev, 309 dev_dbg(&acm->control->dev,
299 "%s - nonzero urb status received: %d\n", 310 "%s - nonzero urb status received: %d\n",
300 __func__, status); 311 __func__, status);
301 goto exit; 312 goto exit;
302 } 313 }
303 314
@@ -306,16 +317,16 @@ static void acm_ctrl_irq(struct urb *urb)
306 data = (unsigned char *)(dr + 1); 317 data = (unsigned char *)(dr + 1);
307 switch (dr->bNotificationType) { 318 switch (dr->bNotificationType) {
308 case USB_CDC_NOTIFY_NETWORK_CONNECTION: 319 case USB_CDC_NOTIFY_NETWORK_CONNECTION:
309 dev_dbg(&acm->control->dev, "%s - network connection: %d\n", 320 dev_dbg(&acm->control->dev,
310 __func__, dr->wValue); 321 "%s - network connection: %d\n", __func__, dr->wValue);
311 break; 322 break;
312 323
313 case USB_CDC_NOTIFY_SERIAL_STATE: 324 case USB_CDC_NOTIFY_SERIAL_STATE:
314 newctrl = get_unaligned_le16(data); 325 newctrl = get_unaligned_le16(data);
315 326
316 if (!acm->clocal && (acm->ctrlin & ~newctrl & ACM_CTRL_DCD)) { 327 if (!acm->clocal && (acm->ctrlin & ~newctrl & ACM_CTRL_DCD)) {
317 dev_dbg(&acm->control->dev, "%s - calling hangup\n", 328 dev_dbg(&acm->control->dev,
318 __func__); 329 "%s - calling hangup\n", __func__);
319 tty_port_tty_hangup(&acm->port, false); 330 tty_port_tty_hangup(&acm->port, false);
320 } 331 }
321 332
@@ -357,8 +368,8 @@ static void acm_ctrl_irq(struct urb *urb)
357exit: 368exit:
358 retval = usb_submit_urb(urb, GFP_ATOMIC); 369 retval = usb_submit_urb(urb, GFP_ATOMIC);
359 if (retval && retval != -EPERM) 370 if (retval && retval != -EPERM)
360 dev_err(&acm->control->dev, "%s - usb_submit_urb failed: %d\n", 371 dev_err(&acm->control->dev,
361 __func__, retval); 372 "%s - usb_submit_urb failed: %d\n", __func__, retval);
362} 373}
363 374
364static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags) 375static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags)
@@ -372,8 +383,8 @@ static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags)
372 if (res) { 383 if (res) {
373 if (res != -EPERM) { 384 if (res != -EPERM) {
374 dev_err(&acm->data->dev, 385 dev_err(&acm->data->dev,
375 "urb %d failed submission with %d\n", 386 "urb %d failed submission with %d\n",
376 index, res); 387 index, res);
377 } 388 }
378 set_bit(index, &acm->read_urbs_free); 389 set_bit(index, &acm->read_urbs_free);
379 return res; 390 return res;
@@ -416,30 +427,43 @@ static void acm_read_bulk_callback(struct urb *urb)
416 int status = urb->status; 427 int status = urb->status;
417 428
418 dev_vdbg(&acm->data->dev, "got urb %d, len %d, status %d\n", 429 dev_vdbg(&acm->data->dev, "got urb %d, len %d, status %d\n",
419 rb->index, urb->actual_length, 430 rb->index, urb->actual_length, status);
420 status); 431
432 set_bit(rb->index, &acm->read_urbs_free);
421 433
422 if (!acm->dev) { 434 if (!acm->dev) {
423 set_bit(rb->index, &acm->read_urbs_free);
424 dev_dbg(&acm->data->dev, "%s - disconnected\n", __func__); 435 dev_dbg(&acm->data->dev, "%s - disconnected\n", __func__);
425 return; 436 return;
426 } 437 }
427 438
428 if (status) { 439 switch (status) {
429 set_bit(rb->index, &acm->read_urbs_free); 440 case 0:
430 if ((status != -ENOENT) || (urb->actual_length == 0)) 441 usb_mark_last_busy(acm->dev);
431 return; 442 acm_process_read_urb(acm, urb);
443 break;
444 case -EPIPE:
445 set_bit(EVENT_RX_STALL, &acm->flags);
446 schedule_work(&acm->work);
447 return;
448 case -ENOENT:
449 case -ECONNRESET:
450 case -ESHUTDOWN:
451 dev_dbg(&acm->data->dev,
452 "%s - urb shutting down with status: %d\n",
453 __func__, status);
454 return;
455 default:
456 dev_dbg(&acm->data->dev,
457 "%s - nonzero urb status received: %d\n",
458 __func__, status);
459 break;
432 } 460 }
433 461
434 usb_mark_last_busy(acm->dev);
435
436 acm_process_read_urb(acm, urb);
437 /* 462 /*
438 * Unthrottle may run on another CPU which needs to see events 463 * Unthrottle may run on another CPU which needs to see events
439 * in the same order. Submission has an implict barrier 464 * in the same order. Submission has an implict barrier
440 */ 465 */
441 smp_mb__before_atomic(); 466 smp_mb__before_atomic();
442 set_bit(rb->index, &acm->read_urbs_free);
443 467
444 /* throttle device if requested by tty */ 468 /* throttle device if requested by tty */
445 spin_lock_irqsave(&acm->read_lock, flags); 469 spin_lock_irqsave(&acm->read_lock, flags);
@@ -469,14 +493,30 @@ static void acm_write_bulk(struct urb *urb)
469 spin_lock_irqsave(&acm->write_lock, flags); 493 spin_lock_irqsave(&acm->write_lock, flags);
470 acm_write_done(acm, wb); 494 acm_write_done(acm, wb);
471 spin_unlock_irqrestore(&acm->write_lock, flags); 495 spin_unlock_irqrestore(&acm->write_lock, flags);
496 set_bit(EVENT_TTY_WAKEUP, &acm->flags);
472 schedule_work(&acm->work); 497 schedule_work(&acm->work);
473} 498}
474 499
475static void acm_softint(struct work_struct *work) 500static void acm_softint(struct work_struct *work)
476{ 501{
502 int i;
477 struct acm *acm = container_of(work, struct acm, work); 503 struct acm *acm = container_of(work, struct acm, work);
478 504
479 tty_port_tty_wakeup(&acm->port); 505 if (test_bit(EVENT_RX_STALL, &acm->flags)) {
506 if (!(usb_autopm_get_interface(acm->data))) {
507 for (i = 0; i < acm->rx_buflimit; i++)
508 usb_kill_urb(acm->read_urbs[i]);
509 usb_clear_halt(acm->dev, acm->in);
510 acm_submit_read_urbs(acm, GFP_KERNEL);
511 usb_autopm_put_interface(acm->data);
512 }
513 clear_bit(EVENT_RX_STALL, &acm->flags);
514 }
515
516 if (test_bit(EVENT_TTY_WAKEUP, &acm->flags)) {
517 tty_port_tty_wakeup(&acm->port);
518 clear_bit(EVENT_TTY_WAKEUP, &acm->flags);
519 }
480} 520}
481 521
482/* 522/*
@@ -608,7 +648,6 @@ static void acm_port_shutdown(struct tty_port *port)
608 struct acm *acm = container_of(port, struct acm, port); 648 struct acm *acm = container_of(port, struct acm, port);
609 struct urb *urb; 649 struct urb *urb;
610 struct acm_wb *wb; 650 struct acm_wb *wb;
611 int i;
612 651
613 /* 652 /*
614 * Need to grab write_lock to prevent race with resume, but no need to 653 * Need to grab write_lock to prevent race with resume, but no need to
@@ -630,11 +669,7 @@ static void acm_port_shutdown(struct tty_port *port)
630 usb_autopm_put_interface_async(acm->control); 669 usb_autopm_put_interface_async(acm->control);
631 } 670 }
632 671
633 usb_kill_urb(acm->ctrlurb); 672 acm_kill_urbs(acm);
634 for (i = 0; i < ACM_NW; i++)
635 usb_kill_urb(acm->wb[i].urb);
636 for (i = 0; i < acm->rx_buflimit; i++)
637 usb_kill_urb(acm->read_urbs[i]);
638} 673}
639 674
640static void acm_tty_cleanup(struct tty_struct *tty) 675static void acm_tty_cleanup(struct tty_struct *tty)
@@ -837,8 +872,8 @@ static int acm_tty_break_ctl(struct tty_struct *tty, int state)
837 872
838 retval = acm_send_break(acm, state ? 0xffff : 0); 873 retval = acm_send_break(acm, state ? 0xffff : 0);
839 if (retval < 0) 874 if (retval < 0)
840 dev_dbg(&acm->control->dev, "%s - send break failed\n", 875 dev_dbg(&acm->control->dev,
841 __func__); 876 "%s - send break failed\n", __func__);
842 return retval; 877 return retval;
843} 878}
844 879
@@ -877,9 +912,6 @@ static int get_serial_info(struct acm *acm, struct serial_struct __user *info)
877{ 912{
878 struct serial_struct tmp; 913 struct serial_struct tmp;
879 914
880 if (!info)
881 return -EINVAL;
882
883 memset(&tmp, 0, sizeof(tmp)); 915 memset(&tmp, 0, sizeof(tmp));
884 tmp.flags = ASYNC_LOW_LATENCY; 916 tmp.flags = ASYNC_LOW_LATENCY;
885 tmp.xmit_fifo_size = acm->writesize; 917 tmp.xmit_fifo_size = acm->writesize;
@@ -969,25 +1001,20 @@ static int wait_serial_change(struct acm *acm, unsigned long arg)
969 return rv; 1001 return rv;
970} 1002}
971 1003
972static int get_serial_usage(struct acm *acm, 1004static int acm_tty_get_icount(struct tty_struct *tty,
973 struct serial_icounter_struct __user *count) 1005 struct serial_icounter_struct *icount)
974{ 1006{
975 struct serial_icounter_struct icount; 1007 struct acm *acm = tty->driver_data;
976 int rv = 0;
977
978 memset(&icount, 0, sizeof(icount));
979 icount.dsr = acm->iocount.dsr;
980 icount.rng = acm->iocount.rng;
981 icount.dcd = acm->iocount.dcd;
982 icount.frame = acm->iocount.frame;
983 icount.overrun = acm->iocount.overrun;
984 icount.parity = acm->iocount.parity;
985 icount.brk = acm->iocount.brk;
986 1008
987 if (copy_to_user(count, &icount, sizeof(icount)) > 0) 1009 icount->dsr = acm->iocount.dsr;
988 rv = -EFAULT; 1010 icount->rng = acm->iocount.rng;
1011 icount->dcd = acm->iocount.dcd;
1012 icount->frame = acm->iocount.frame;
1013 icount->overrun = acm->iocount.overrun;
1014 icount->parity = acm->iocount.parity;
1015 icount->brk = acm->iocount.brk;
989 1016
990 return rv; 1017 return 0;
991} 1018}
992 1019
993static int acm_tty_ioctl(struct tty_struct *tty, 1020static int acm_tty_ioctl(struct tty_struct *tty,
@@ -1012,9 +1039,6 @@ static int acm_tty_ioctl(struct tty_struct *tty,
1012 rv = wait_serial_change(acm, arg); 1039 rv = wait_serial_change(acm, arg);
1013 usb_autopm_put_interface(acm->control); 1040 usb_autopm_put_interface(acm->control);
1014 break; 1041 break;
1015 case TIOCGICOUNT:
1016 rv = get_serial_usage(acm, (struct serial_icounter_struct __user *) arg);
1017 break;
1018 } 1042 }
1019 1043
1020 return rv; 1044 return rv;
@@ -1088,19 +1112,17 @@ static void acm_write_buffers_free(struct acm *acm)
1088{ 1112{
1089 int i; 1113 int i;
1090 struct acm_wb *wb; 1114 struct acm_wb *wb;
1091 struct usb_device *usb_dev = interface_to_usbdev(acm->control);
1092 1115
1093 for (wb = &acm->wb[0], i = 0; i < ACM_NW; i++, wb++) 1116 for (wb = &acm->wb[0], i = 0; i < ACM_NW; i++, wb++)
1094 usb_free_coherent(usb_dev, acm->writesize, wb->buf, wb->dmah); 1117 usb_free_coherent(acm->dev, acm->writesize, wb->buf, wb->dmah);
1095} 1118}
1096 1119
1097static void acm_read_buffers_free(struct acm *acm) 1120static void acm_read_buffers_free(struct acm *acm)
1098{ 1121{
1099 struct usb_device *usb_dev = interface_to_usbdev(acm->control);
1100 int i; 1122 int i;
1101 1123
1102 for (i = 0; i < acm->rx_buflimit; i++) 1124 for (i = 0; i < acm->rx_buflimit; i++)
1103 usb_free_coherent(usb_dev, acm->readsize, 1125 usb_free_coherent(acm->dev, acm->readsize,
1104 acm->read_buffers[i].base, acm->read_buffers[i].dma); 1126 acm->read_buffers[i].base, acm->read_buffers[i].dma);
1105} 1127}
1106 1128
@@ -1345,9 +1367,16 @@ made_compressed_probe:
1345 spin_lock_init(&acm->write_lock); 1367 spin_lock_init(&acm->write_lock);
1346 spin_lock_init(&acm->read_lock); 1368 spin_lock_init(&acm->read_lock);
1347 mutex_init(&acm->mutex); 1369 mutex_init(&acm->mutex);
1348 acm->is_int_ep = usb_endpoint_xfer_int(epread); 1370 if (usb_endpoint_xfer_int(epread)) {
1349 if (acm->is_int_ep)
1350 acm->bInterval = epread->bInterval; 1371 acm->bInterval = epread->bInterval;
1372 acm->in = usb_rcvintpipe(usb_dev, epread->bEndpointAddress);
1373 } else {
1374 acm->in = usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress);
1375 }
1376 if (usb_endpoint_xfer_int(epwrite))
1377 acm->out = usb_sndintpipe(usb_dev, epwrite->bEndpointAddress);
1378 else
1379 acm->out = usb_sndbulkpipe(usb_dev, epwrite->bEndpointAddress);
1351 tty_port_init(&acm->port); 1380 tty_port_init(&acm->port);
1352 acm->port.ops = &acm_port_ops; 1381 acm->port.ops = &acm_port_ops;
1353 init_usb_anchor(&acm->delayed); 1382 init_usb_anchor(&acm->delayed);
@@ -1382,20 +1411,15 @@ made_compressed_probe:
1382 1411
1383 urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; 1412 urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
1384 urb->transfer_dma = rb->dma; 1413 urb->transfer_dma = rb->dma;
1385 if (acm->is_int_ep) { 1414 if (usb_endpoint_xfer_int(epread))
1386 usb_fill_int_urb(urb, acm->dev, 1415 usb_fill_int_urb(urb, acm->dev, acm->in, rb->base,
1387 usb_rcvintpipe(usb_dev, epread->bEndpointAddress),
1388 rb->base,
1389 acm->readsize, 1416 acm->readsize,
1390 acm_read_bulk_callback, rb, 1417 acm_read_bulk_callback, rb,
1391 acm->bInterval); 1418 acm->bInterval);
1392 } else { 1419 else
1393 usb_fill_bulk_urb(urb, acm->dev, 1420 usb_fill_bulk_urb(urb, acm->dev, acm->in, rb->base,
1394 usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress),
1395 rb->base,
1396 acm->readsize, 1421 acm->readsize,
1397 acm_read_bulk_callback, rb); 1422 acm_read_bulk_callback, rb);
1398 }
1399 1423
1400 acm->read_urbs[i] = urb; 1424 acm->read_urbs[i] = urb;
1401 __set_bit(i, &acm->read_urbs_free); 1425 __set_bit(i, &acm->read_urbs_free);
@@ -1408,12 +1432,10 @@ made_compressed_probe:
1408 goto alloc_fail7; 1432 goto alloc_fail7;
1409 1433
1410 if (usb_endpoint_xfer_int(epwrite)) 1434 if (usb_endpoint_xfer_int(epwrite))
1411 usb_fill_int_urb(snd->urb, usb_dev, 1435 usb_fill_int_urb(snd->urb, usb_dev, acm->out,
1412 usb_sndintpipe(usb_dev, epwrite->bEndpointAddress),
1413 NULL, acm->writesize, acm_write_bulk, snd, epwrite->bInterval); 1436 NULL, acm->writesize, acm_write_bulk, snd, epwrite->bInterval);
1414 else 1437 else
1415 usb_fill_bulk_urb(snd->urb, usb_dev, 1438 usb_fill_bulk_urb(snd->urb, usb_dev, acm->out,
1416 usb_sndbulkpipe(usb_dev, epwrite->bEndpointAddress),
1417 NULL, acm->writesize, acm_write_bulk, snd); 1439 NULL, acm->writesize, acm_write_bulk, snd);
1418 snd->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; 1440 snd->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
1419 if (quirks & SEND_ZERO_PACKET) 1441 if (quirks & SEND_ZERO_PACKET)
@@ -1485,8 +1507,8 @@ skip_countries:
1485 } 1507 }
1486 1508
1487 if (quirks & CLEAR_HALT_CONDITIONS) { 1509 if (quirks & CLEAR_HALT_CONDITIONS) {
1488 usb_clear_halt(usb_dev, usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress)); 1510 usb_clear_halt(usb_dev, acm->in);
1489 usb_clear_halt(usb_dev, usb_sndbulkpipe(usb_dev, epwrite->bEndpointAddress)); 1511 usb_clear_halt(usb_dev, acm->out);
1490 } 1512 }
1491 1513
1492 return 0; 1514 return 0;
@@ -1520,25 +1542,10 @@ alloc_fail:
1520 return rv; 1542 return rv;
1521} 1543}
1522 1544
1523static void stop_data_traffic(struct acm *acm)
1524{
1525 int i;
1526
1527 usb_kill_urb(acm->ctrlurb);
1528 for (i = 0; i < ACM_NW; i++)
1529 usb_kill_urb(acm->wb[i].urb);
1530 for (i = 0; i < acm->rx_buflimit; i++)
1531 usb_kill_urb(acm->read_urbs[i]);
1532
1533 cancel_work_sync(&acm->work);
1534}
1535
1536static void acm_disconnect(struct usb_interface *intf) 1545static void acm_disconnect(struct usb_interface *intf)
1537{ 1546{
1538 struct acm *acm = usb_get_intfdata(intf); 1547 struct acm *acm = usb_get_intfdata(intf);
1539 struct usb_device *usb_dev = interface_to_usbdev(intf);
1540 struct tty_struct *tty; 1548 struct tty_struct *tty;
1541 int i;
1542 1549
1543 /* sibling interface is already cleaning up */ 1550 /* sibling interface is already cleaning up */
1544 if (!acm) 1551 if (!acm)
@@ -1564,17 +1571,13 @@ static void acm_disconnect(struct usb_interface *intf)
1564 tty_kref_put(tty); 1571 tty_kref_put(tty);
1565 } 1572 }
1566 1573
1567 stop_data_traffic(acm); 1574 acm_kill_urbs(acm);
1575 cancel_work_sync(&acm->work);
1568 1576
1569 tty_unregister_device(acm_tty_driver, acm->minor); 1577 tty_unregister_device(acm_tty_driver, acm->minor);
1570 1578
1571 usb_free_urb(acm->ctrlurb);
1572 for (i = 0; i < ACM_NW; i++)
1573 usb_free_urb(acm->wb[i].urb);
1574 for (i = 0; i < acm->rx_buflimit; i++)
1575 usb_free_urb(acm->read_urbs[i]);
1576 acm_write_buffers_free(acm); 1579 acm_write_buffers_free(acm);
1577 usb_free_coherent(usb_dev, acm->ctrlsize, acm->ctrl_buffer, acm->ctrl_dma); 1580 usb_free_coherent(acm->dev, acm->ctrlsize, acm->ctrl_buffer, acm->ctrl_dma);
1578 acm_read_buffers_free(acm); 1581 acm_read_buffers_free(acm);
1579 1582
1580 if (!acm->combined_interfaces) 1583 if (!acm->combined_interfaces)
@@ -1603,7 +1606,8 @@ static int acm_suspend(struct usb_interface *intf, pm_message_t message)
1603 if (cnt) 1606 if (cnt)
1604 return 0; 1607 return 0;
1605 1608
1606 stop_data_traffic(acm); 1609 acm_kill_urbs(acm);
1610 cancel_work_sync(&acm->work);
1607 1611
1608 return 0; 1612 return 0;
1609} 1613}
@@ -1657,6 +1661,15 @@ static int acm_reset_resume(struct usb_interface *intf)
1657 1661
1658#endif /* CONFIG_PM */ 1662#endif /* CONFIG_PM */
1659 1663
1664static int acm_pre_reset(struct usb_interface *intf)
1665{
1666 struct acm *acm = usb_get_intfdata(intf);
1667
1668 clear_bit(EVENT_RX_STALL, &acm->flags);
1669
1670 return 0;
1671}
1672
1660#define NOKIA_PCSUITE_ACM_INFO(x) \ 1673#define NOKIA_PCSUITE_ACM_INFO(x) \
1661 USB_DEVICE_AND_INTERFACE_INFO(0x0421, x, \ 1674 USB_DEVICE_AND_INTERFACE_INFO(0x0421, x, \
1662 USB_CLASS_COMM, USB_CDC_SUBCLASS_ACM, \ 1675 USB_CLASS_COMM, USB_CDC_SUBCLASS_ACM, \
@@ -1719,6 +1732,7 @@ static const struct usb_device_id acm_ids[] = {
1719 { USB_DEVICE(0x20df, 0x0001), /* Simtec Electronics Entropy Key */ 1732 { USB_DEVICE(0x20df, 0x0001), /* Simtec Electronics Entropy Key */
1720 .driver_info = QUIRK_CONTROL_LINE_STATE, }, 1733 .driver_info = QUIRK_CONTROL_LINE_STATE, },
1721 { USB_DEVICE(0x2184, 0x001c) }, /* GW Instek AFG-2225 */ 1734 { USB_DEVICE(0x2184, 0x001c) }, /* GW Instek AFG-2225 */
1735 { USB_DEVICE(0x2184, 0x0036) }, /* GW Instek AFG-125 */
1722 { USB_DEVICE(0x22b8, 0x6425), /* Motorola MOTOMAGX phones */ 1736 { USB_DEVICE(0x22b8, 0x6425), /* Motorola MOTOMAGX phones */
1723 }, 1737 },
1724 /* Motorola H24 HSPA module: */ 1738 /* Motorola H24 HSPA module: */
@@ -1898,6 +1912,7 @@ static struct usb_driver acm_driver = {
1898 .resume = acm_resume, 1912 .resume = acm_resume,
1899 .reset_resume = acm_reset_resume, 1913 .reset_resume = acm_reset_resume,
1900#endif 1914#endif
1915 .pre_reset = acm_pre_reset,
1901 .id_table = acm_ids, 1916 .id_table = acm_ids,
1902#ifdef CONFIG_PM 1917#ifdef CONFIG_PM
1903 .supports_autosuspend = 1, 1918 .supports_autosuspend = 1,
@@ -1927,6 +1942,7 @@ static const struct tty_operations acm_ops = {
1927 .set_termios = acm_tty_set_termios, 1942 .set_termios = acm_tty_set_termios,
1928 .tiocmget = acm_tty_tiocmget, 1943 .tiocmget = acm_tty_tiocmget,
1929 .tiocmset = acm_tty_tiocmset, 1944 .tiocmset = acm_tty_tiocmset,
1945 .get_icount = acm_tty_get_icount,
1930}; 1946};
1931 1947
1932/* 1948/*
diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h
index 1f1eabfd8462..c980f11cdf56 100644
--- a/drivers/usb/class/cdc-acm.h
+++ b/drivers/usb/class/cdc-acm.h
@@ -83,6 +83,7 @@ struct acm {
83 struct usb_device *dev; /* the corresponding usb device */ 83 struct usb_device *dev; /* the corresponding usb device */
84 struct usb_interface *control; /* control interface */ 84 struct usb_interface *control; /* control interface */
85 struct usb_interface *data; /* data interface */ 85 struct usb_interface *data; /* data interface */
86 unsigned in, out; /* i/o pipes */
86 struct tty_port port; /* our tty port data */ 87 struct tty_port port; /* our tty port data */
87 struct urb *ctrlurb; /* urbs */ 88 struct urb *ctrlurb; /* urbs */
88 u8 *ctrl_buffer; /* buffers of urbs */ 89 u8 *ctrl_buffer; /* buffers of urbs */
@@ -102,6 +103,9 @@ struct acm {
102 spinlock_t write_lock; 103 spinlock_t write_lock;
103 struct mutex mutex; 104 struct mutex mutex;
104 bool disconnected; 105 bool disconnected;
106 unsigned long flags;
107# define EVENT_TTY_WAKEUP 0
108# define EVENT_RX_STALL 1
105 struct usb_cdc_line_coding line; /* bits, stop, parity */ 109 struct usb_cdc_line_coding line; /* bits, stop, parity */
106 struct work_struct work; /* work queue entry for line discipline waking up */ 110 struct work_struct work; /* work queue entry for line discipline waking up */
107 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */ 111 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */
@@ -116,7 +120,6 @@ struct acm {
116 unsigned int ctrl_caps; /* control capabilities from the class specific header */ 120 unsigned int ctrl_caps; /* control capabilities from the class specific header */
117 unsigned int susp_count; /* number of suspended interfaces */ 121 unsigned int susp_count; /* number of suspended interfaces */
118 unsigned int combined_interfaces:1; /* control and data collapsed */ 122 unsigned int combined_interfaces:1; /* control and data collapsed */
119 unsigned int is_int_ep:1; /* interrupt endpoints contrary to spec used */
120 unsigned int throttled:1; /* actually throttled */ 123 unsigned int throttled:1; /* actually throttled */
121 unsigned int throttle_req:1; /* throttle requested */ 124 unsigned int throttle_req:1; /* throttle requested */
122 u8 bInterval; 125 u8 bInterval;
diff --git a/drivers/usb/class/usbtmc.c b/drivers/usb/class/usbtmc.c
index a6c1fae7d52a..f03692ec5520 100644
--- a/drivers/usb/class/usbtmc.c
+++ b/drivers/usb/class/usbtmc.c
@@ -157,6 +157,7 @@ static int usbtmc_open(struct inode *inode, struct file *filp)
157 } 157 }
158 158
159 data = usb_get_intfdata(intf); 159 data = usb_get_intfdata(intf);
160 /* Protect reference to data from file structure until release */
160 kref_get(&data->kref); 161 kref_get(&data->kref);
161 162
162 /* Store pointer in file structure's private data field */ 163 /* Store pointer in file structure's private data field */
@@ -531,7 +532,7 @@ static int usbtmc488_ioctl_simple(struct usbtmc_device_data *data,
531} 532}
532 533
533/* 534/*
534 * Sends a REQUEST_DEV_DEP_MSG_IN message on the Bulk-IN endpoint. 535 * Sends a REQUEST_DEV_DEP_MSG_IN message on the Bulk-OUT endpoint.
535 * @transfer_size: number of bytes to request from the device. 536 * @transfer_size: number of bytes to request from the device.
536 * 537 *
537 * See the USBTMC specification, Table 4. 538 * See the USBTMC specification, Table 4.
@@ -1471,7 +1472,7 @@ static int usbtmc_probe(struct usb_interface *intf,
1471 if (!data->iin_urb) 1472 if (!data->iin_urb)
1472 goto error_register; 1473 goto error_register;
1473 1474
1474 /* will reference data in int urb */ 1475 /* Protect interrupt in endpoint data until iin_urb is freed */
1475 kref_get(&data->kref); 1476 kref_get(&data->kref);
1476 1477
1477 /* allocate buffer for interrupt in */ 1478 /* allocate buffer for interrupt in */
diff --git a/drivers/usb/core/buffer.c b/drivers/usb/core/buffer.c
index 98e39f91723a..b9bf6e2eb6fe 100644
--- a/drivers/usb/core/buffer.c
+++ b/drivers/usb/core/buffer.c
@@ -3,6 +3,9 @@
3 * 3 *
4 * This implementation plugs in through generic "usb_bus" level methods, 4 * This implementation plugs in through generic "usb_bus" level methods,
5 * and should work with all USB controllers, regardless of bus type. 5 * and should work with all USB controllers, regardless of bus type.
6 *
7 * Released under the GPLv2 only.
8 * SPDX-License-Identifier: GPL-2.0
6 */ 9 */
7 10
8#include <linux/module.h> 11#include <linux/module.h>
diff --git a/drivers/usb/core/config.c b/drivers/usb/core/config.c
index a2d90aca779f..0aa9e7d697a5 100644
--- a/drivers/usb/core/config.c
+++ b/drivers/usb/core/config.c
@@ -1,3 +1,8 @@
1/*
2 * Released under the GPLv2 only.
3 * SPDX-License-Identifier: GPL-2.0
4 */
5
1#include <linux/usb.h> 6#include <linux/usb.h>
2#include <linux/usb/ch9.h> 7#include <linux/usb/ch9.h>
3#include <linux/usb/hcd.h> 8#include <linux/usb/hcd.h>
diff --git a/drivers/usb/core/devices.c b/drivers/usb/core/devices.c
index ef04b50e6bbb..f2987ddb1cde 100644
--- a/drivers/usb/core/devices.c
+++ b/drivers/usb/core/devices.c
@@ -182,14 +182,8 @@ static char *usb_dump_endpoint_descriptor(int speed, char *start, char *end,
182 182
183 dir = usb_endpoint_dir_in(desc) ? 'I' : 'O'; 183 dir = usb_endpoint_dir_in(desc) ? 'I' : 'O';
184 184
185 if (speed == USB_SPEED_HIGH) { 185 if (speed == USB_SPEED_HIGH)
186 switch (usb_endpoint_maxp(desc) & (0x03 << 11)) { 186 bandwidth = usb_endpoint_maxp_mult(desc);
187 case 1 << 11:
188 bandwidth = 2; break;
189 case 2 << 11:
190 bandwidth = 3; break;
191 }
192 }
193 187
194 /* this isn't checking for illegal values */ 188 /* this isn't checking for illegal values */
195 switch (usb_endpoint_type(desc)) { 189 switch (usb_endpoint_type(desc)) {
@@ -233,7 +227,7 @@ static char *usb_dump_endpoint_descriptor(int speed, char *start, char *end,
233 227
234 start += sprintf(start, format_endpt, desc->bEndpointAddress, dir, 228 start += sprintf(start, format_endpt, desc->bEndpointAddress, dir,
235 desc->bmAttributes, type, 229 desc->bmAttributes, type,
236 (usb_endpoint_maxp(desc) & 0x07ff) * 230 usb_endpoint_maxp(desc) *
237 bandwidth, 231 bandwidth,
238 interval, unit); 232 interval, unit);
239 return start; 233 return start;
diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
index dadd1e8dfe09..cdee5130638b 100644
--- a/drivers/usb/core/driver.c
+++ b/drivers/usb/core/driver.c
@@ -15,6 +15,9 @@
15 * (usb_device_id matching changes by Adam J. Richter) 15 * (usb_device_id matching changes by Adam J. Richter)
16 * (C) Copyright Greg Kroah-Hartman 2002-2003 16 * (C) Copyright Greg Kroah-Hartman 2002-2003
17 * 17 *
18 * Released under the GPLv2 only.
19 * SPDX-License-Identifier: GPL-2.0
20 *
18 * NOTE! This is not actually a driver at all, rather this is 21 * NOTE! This is not actually a driver at all, rather this is
19 * just a collection of helper routines that implement the 22 * just a collection of helper routines that implement the
20 * matching, probing, releasing, suspending and resuming for 23 * matching, probing, releasing, suspending and resuming for
diff --git a/drivers/usb/core/endpoint.c b/drivers/usb/core/endpoint.c
index 101983b7e8d2..a60bc830a056 100644
--- a/drivers/usb/core/endpoint.c
+++ b/drivers/usb/core/endpoint.c
@@ -5,8 +5,10 @@
5 * (C) Copyright 2002,2004 IBM Corp. 5 * (C) Copyright 2002,2004 IBM Corp.
6 * (C) Copyright 2006 Novell Inc. 6 * (C) Copyright 2006 Novell Inc.
7 * 7 *
8 * Endpoint sysfs stuff 8 * Released under the GPLv2 only.
9 * SPDX-License-Identifier: GPL-2.0
9 * 10 *
11 * Endpoint sysfs stuff
10 */ 12 */
11 13
12#include <linux/kernel.h> 14#include <linux/kernel.h>
@@ -50,8 +52,7 @@ static ssize_t wMaxPacketSize_show(struct device *dev,
50 struct device_attribute *attr, char *buf) 52 struct device_attribute *attr, char *buf)
51{ 53{
52 struct ep_device *ep = to_ep_device(dev); 54 struct ep_device *ep = to_ep_device(dev);
53 return sprintf(buf, "%04x\n", 55 return sprintf(buf, "%04x\n", usb_endpoint_maxp(ep->desc));
54 usb_endpoint_maxp(ep->desc) & 0x07ff);
55} 56}
56static DEVICE_ATTR_RO(wMaxPacketSize); 57static DEVICE_ATTR_RO(wMaxPacketSize);
57 58
diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c
index 822ced9639aa..e26bd5e773ad 100644
--- a/drivers/usb/core/file.c
+++ b/drivers/usb/core/file.c
@@ -13,6 +13,8 @@
13 * (usb_device_id matching changes by Adam J. Richter) 13 * (usb_device_id matching changes by Adam J. Richter)
14 * (C) Copyright Greg Kroah-Hartman 2002-2003 14 * (C) Copyright Greg Kroah-Hartman 2002-2003
15 * 15 *
16 * Released under the GPLv2 only.
17 * SPDX-License-Identifier: GPL-2.0
16 */ 18 */
17 19
18#include <linux/module.h> 20#include <linux/module.h>
diff --git a/drivers/usb/core/generic.c b/drivers/usb/core/generic.c
index 358ca8dd784f..bd3e0c5a6db2 100644
--- a/drivers/usb/core/generic.c
+++ b/drivers/usb/core/generic.c
@@ -15,6 +15,8 @@
15 * (usb_device_id matching changes by Adam J. Richter) 15 * (usb_device_id matching changes by Adam J. Richter)
16 * (C) Copyright Greg Kroah-Hartman 2002-2003 16 * (C) Copyright Greg Kroah-Hartman 2002-2003
17 * 17 *
18 * Released under the GPLv2 only.
19 * SPDX-License-Identifier: GPL-2.0
18 */ 20 */
19 21
20#include <linux/usb.h> 22#include <linux/usb.h>
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index cbb146736f57..143454ea385b 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -6,6 +6,8 @@
6 * (C) Copyright 1999 Gregory P. Smith 6 * (C) Copyright 1999 Gregory P. Smith
7 * (C) Copyright 2001 Brad Hards (bhards@bigpond.net.au) 7 * (C) Copyright 2001 Brad Hards (bhards@bigpond.net.au)
8 * 8 *
9 * Released under the GPLv2 only.
10 * SPDX-License-Identifier: GPL-2.0
9 */ 11 */
10 12
11#include <linux/kernel.h> 13#include <linux/kernel.h>
@@ -101,6 +103,8 @@ EXPORT_SYMBOL_GPL(ehci_cf_port_reset_rwsem);
101 103
102static void hub_release(struct kref *kref); 104static void hub_release(struct kref *kref);
103static int usb_reset_and_verify_device(struct usb_device *udev); 105static int usb_reset_and_verify_device(struct usb_device *udev);
106static void hub_usb3_port_prepare_disable(struct usb_hub *hub,
107 struct usb_port *port_dev);
104 108
105static inline char *portspeed(struct usb_hub *hub, int portstatus) 109static inline char *portspeed(struct usb_hub *hub, int portstatus)
106{ 110{
@@ -899,82 +903,28 @@ static int hub_set_port_link_state(struct usb_hub *hub, int port1,
899} 903}
900 904
901/* 905/*
902 * If USB 3.0 ports are placed into the Disabled state, they will no longer 906 * USB-3 does not have a similar link state as USB-2 that will avoid negotiating
903 * detect any device connects or disconnects. This is generally not what the 907 * a connection with a plugged-in cable but will signal the host when the cable
904 * USB core wants, since it expects a disabled port to produce a port status 908 * is unplugged. Disable remote wake and set link state to U3 for USB-3 devices
905 * change event when a new device connects.
906 *
907 * Instead, set the link state to Disabled, wait for the link to settle into
908 * that state, clear any change bits, and then put the port into the RxDetect
909 * state.
910 */ 909 */
911static int hub_usb3_port_disable(struct usb_hub *hub, int port1)
912{
913 int ret;
914 int total_time;
915 u16 portchange, portstatus;
916
917 if (!hub_is_superspeed(hub->hdev))
918 return -EINVAL;
919
920 ret = hub_port_status(hub, port1, &portstatus, &portchange);
921 if (ret < 0)
922 return ret;
923
924 /*
925 * USB controller Advanced Micro Devices, Inc. [AMD] FCH USB XHCI
926 * Controller [1022:7814] will have spurious result making the following
927 * usb 3.0 device hotplugging route to the 2.0 root hub and recognized
928 * as high-speed device if we set the usb 3.0 port link state to
929 * Disabled. Since it's already in USB_SS_PORT_LS_RX_DETECT state, we
930 * check the state here to avoid the bug.
931 */
932 if ((portstatus & USB_PORT_STAT_LINK_STATE) ==
933 USB_SS_PORT_LS_RX_DETECT) {
934 dev_dbg(&hub->ports[port1 - 1]->dev,
935 "Not disabling port; link state is RxDetect\n");
936 return ret;
937 }
938
939 ret = hub_set_port_link_state(hub, port1, USB_SS_PORT_LS_SS_DISABLED);
940 if (ret)
941 return ret;
942
943 /* Wait for the link to enter the disabled state. */
944 for (total_time = 0; ; total_time += HUB_DEBOUNCE_STEP) {
945 ret = hub_port_status(hub, port1, &portstatus, &portchange);
946 if (ret < 0)
947 return ret;
948
949 if ((portstatus & USB_PORT_STAT_LINK_STATE) ==
950 USB_SS_PORT_LS_SS_DISABLED)
951 break;
952 if (total_time >= HUB_DEBOUNCE_TIMEOUT)
953 break;
954 msleep(HUB_DEBOUNCE_STEP);
955 }
956 if (total_time >= HUB_DEBOUNCE_TIMEOUT)
957 dev_warn(&hub->ports[port1 - 1]->dev,
958 "Could not disable after %d ms\n", total_time);
959
960 return hub_set_port_link_state(hub, port1, USB_SS_PORT_LS_RX_DETECT);
961}
962
963static int hub_port_disable(struct usb_hub *hub, int port1, int set_state) 910static int hub_port_disable(struct usb_hub *hub, int port1, int set_state)
964{ 911{
965 struct usb_port *port_dev = hub->ports[port1 - 1]; 912 struct usb_port *port_dev = hub->ports[port1 - 1];
966 struct usb_device *hdev = hub->hdev; 913 struct usb_device *hdev = hub->hdev;
967 int ret = 0; 914 int ret = 0;
968 915
969 if (port_dev->child && set_state)
970 usb_set_device_state(port_dev->child, USB_STATE_NOTATTACHED);
971 if (!hub->error) { 916 if (!hub->error) {
972 if (hub_is_superspeed(hub->hdev)) 917 if (hub_is_superspeed(hub->hdev)) {
973 ret = hub_usb3_port_disable(hub, port1); 918 hub_usb3_port_prepare_disable(hub, port_dev);
974 else 919 ret = hub_set_port_link_state(hub, port_dev->portnum,
920 USB_SS_PORT_LS_U3);
921 } else {
975 ret = usb_clear_port_feature(hdev, port1, 922 ret = usb_clear_port_feature(hdev, port1,
976 USB_PORT_FEAT_ENABLE); 923 USB_PORT_FEAT_ENABLE);
924 }
977 } 925 }
926 if (port_dev->child && set_state)
927 usb_set_device_state(port_dev->child, USB_STATE_NOTATTACHED);
978 if (ret && ret != -ENODEV) 928 if (ret && ret != -ENODEV)
979 dev_err(&port_dev->dev, "cannot disable (err = %d)\n", ret); 929 dev_err(&port_dev->dev, "cannot disable (err = %d)\n", ret);
980 return ret; 930 return ret;
@@ -2731,8 +2681,15 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
2731 if (ret < 0) 2681 if (ret < 0)
2732 return ret; 2682 return ret;
2733 2683
2734 /* The port state is unknown until the reset completes. */ 2684 /*
2735 if (!(portstatus & USB_PORT_STAT_RESET)) 2685 * The port state is unknown until the reset completes.
2686 *
2687 * On top of that, some chips may require additional time
2688 * to re-establish a connection after the reset is complete,
2689 * so also wait for the connection to be re-established.
2690 */
2691 if (!(portstatus & USB_PORT_STAT_RESET) &&
2692 (portstatus & USB_PORT_STAT_CONNECTION))
2736 break; 2693 break;
2737 2694
2738 /* switch to the long delay after two short delay failures */ 2695 /* switch to the long delay after two short delay failures */
@@ -4140,6 +4097,26 @@ void usb_unlocked_enable_lpm(struct usb_device *udev)
4140} 4097}
4141EXPORT_SYMBOL_GPL(usb_unlocked_enable_lpm); 4098EXPORT_SYMBOL_GPL(usb_unlocked_enable_lpm);
4142 4099
4100/* usb3 devices use U3 for disabled, make sure remote wakeup is disabled */
4101static void hub_usb3_port_prepare_disable(struct usb_hub *hub,
4102 struct usb_port *port_dev)
4103{
4104 struct usb_device *udev = port_dev->child;
4105 int ret;
4106
4107 if (udev && udev->port_is_suspended && udev->do_remote_wakeup) {
4108 ret = hub_set_port_link_state(hub, port_dev->portnum,
4109 USB_SS_PORT_LS_U0);
4110 if (!ret) {
4111 msleep(USB_RESUME_TIMEOUT);
4112 ret = usb_disable_remote_wakeup(udev);
4113 }
4114 if (ret)
4115 dev_warn(&udev->dev,
4116 "Port disable: can't disable remote wake\n");
4117 udev->do_remote_wakeup = 0;
4118 }
4119}
4143 4120
4144#else /* CONFIG_PM */ 4121#else /* CONFIG_PM */
4145 4122
@@ -4147,6 +4124,9 @@ EXPORT_SYMBOL_GPL(usb_unlocked_enable_lpm);
4147#define hub_resume NULL 4124#define hub_resume NULL
4148#define hub_reset_resume NULL 4125#define hub_reset_resume NULL
4149 4126
4127static inline void hub_usb3_port_prepare_disable(struct usb_hub *hub,
4128 struct usb_port *port_dev) { }
4129
4150int usb_disable_lpm(struct usb_device *udev) 4130int usb_disable_lpm(struct usb_device *udev)
4151{ 4131{
4152 return 0; 4132 return 0;
diff --git a/drivers/usb/core/ledtrig-usbport.c b/drivers/usb/core/ledtrig-usbport.c
index 3ed5162677ad..1713248ab15a 100644
--- a/drivers/usb/core/ledtrig-usbport.c
+++ b/drivers/usb/core/ledtrig-usbport.c
@@ -74,8 +74,7 @@ static void usbport_trig_update_count(struct usbport_trig_data *usbport_data)
74 74
75 usbport_data->count = 0; 75 usbport_data->count = 0;
76 usb_for_each_dev(usbport_data, usbport_trig_usb_dev_check); 76 usb_for_each_dev(usbport_data, usbport_trig_usb_dev_check);
77 led_cdev->brightness_set(led_cdev, 77 led_set_brightness(led_cdev, usbport_data->count ? LED_FULL : LED_OFF);
78 usbport_data->count ? LED_FULL : LED_OFF);
79} 78}
80 79
81/*************************************** 80/***************************************
@@ -228,12 +227,12 @@ static int usbport_trig_notify(struct notifier_block *nb, unsigned long action,
228 case USB_DEVICE_ADD: 227 case USB_DEVICE_ADD:
229 usbport_trig_add_usb_dev_ports(usb_dev, usbport_data); 228 usbport_trig_add_usb_dev_ports(usb_dev, usbport_data);
230 if (observed && usbport_data->count++ == 0) 229 if (observed && usbport_data->count++ == 0)
231 led_cdev->brightness_set(led_cdev, LED_FULL); 230 led_set_brightness(led_cdev, LED_FULL);
232 return NOTIFY_OK; 231 return NOTIFY_OK;
233 case USB_DEVICE_REMOVE: 232 case USB_DEVICE_REMOVE:
234 usbport_trig_remove_usb_dev_ports(usbport_data, usb_dev); 233 usbport_trig_remove_usb_dev_ports(usbport_data, usb_dev);
235 if (observed && --usbport_data->count == 0) 234 if (observed && --usbport_data->count == 0)
236 led_cdev->brightness_set(led_cdev, LED_OFF); 235 led_set_brightness(led_cdev, LED_OFF);
237 return NOTIFY_OK; 236 return NOTIFY_OK;
238 } 237 }
239 238
diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
index 3a4707746157..dea55914d641 100644
--- a/drivers/usb/core/message.c
+++ b/drivers/usb/core/message.c
@@ -1,5 +1,8 @@
1/* 1/*
2 * message.c - synchronous message handling 2 * message.c - synchronous message handling
3 *
4 * Released under the GPLv2 only.
5 * SPDX-License-Identifier: GPL-2.0
3 */ 6 */
4 7
5#include <linux/pci.h> /* for scatterlist macros */ 8#include <linux/pci.h> /* for scatterlist macros */
diff --git a/drivers/usb/core/notify.c b/drivers/usb/core/notify.c
index 7728c91dfa2e..b12a463a3e22 100644
--- a/drivers/usb/core/notify.c
+++ b/drivers/usb/core/notify.c
@@ -6,6 +6,8 @@
6 * notifier functions originally based on those in kernel/sys.c 6 * notifier functions originally based on those in kernel/sys.c
7 * but fixed up to not be so broken. 7 * but fixed up to not be so broken.
8 * 8 *
9 * Released under the GPLv2 only.
10 * SPDX-License-Identifier: GPL-2.0
9 */ 11 */
10 12
11 13
diff --git a/drivers/usb/core/sysfs.c b/drivers/usb/core/sysfs.c
index c953a0f1c695..dfc68ed24db1 100644
--- a/drivers/usb/core/sysfs.c
+++ b/drivers/usb/core/sysfs.c
@@ -7,6 +7,8 @@
7 * 7 *
8 * All of the sysfs file attributes for usb devices and interfaces. 8 * All of the sysfs file attributes for usb devices and interfaces.
9 * 9 *
10 * Released under the GPLv2 only.
11 * SPDX-License-Identifier: GPL-2.0
10 */ 12 */
11 13
12 14
@@ -14,6 +16,7 @@
14#include <linux/string.h> 16#include <linux/string.h>
15#include <linux/usb.h> 17#include <linux/usb.h>
16#include <linux/usb/quirks.h> 18#include <linux/usb/quirks.h>
19#include <linux/of.h>
17#include "usb.h" 20#include "usb.h"
18 21
19/* Active configuration fields */ 22/* Active configuration fields */
@@ -104,6 +107,17 @@ static ssize_t bConfigurationValue_store(struct device *dev,
104static DEVICE_ATTR_IGNORE_LOCKDEP(bConfigurationValue, S_IRUGO | S_IWUSR, 107static DEVICE_ATTR_IGNORE_LOCKDEP(bConfigurationValue, S_IRUGO | S_IWUSR,
105 bConfigurationValue_show, bConfigurationValue_store); 108 bConfigurationValue_show, bConfigurationValue_store);
106 109
110#ifdef CONFIG_OF
111static ssize_t devspec_show(struct device *dev, struct device_attribute *attr,
112 char *buf)
113{
114 struct device_node *of_node = dev->of_node;
115
116 return sprintf(buf, "%s\n", of_node_full_name(of_node));
117}
118static DEVICE_ATTR_RO(devspec);
119#endif
120
107/* String fields */ 121/* String fields */
108#define usb_string_attr(name) \ 122#define usb_string_attr(name) \
109static ssize_t name##_show(struct device *dev, \ 123static ssize_t name##_show(struct device *dev, \
@@ -786,6 +800,9 @@ static struct attribute *dev_attrs[] = {
786 &dev_attr_remove.attr, 800 &dev_attr_remove.attr,
787 &dev_attr_removable.attr, 801 &dev_attr_removable.attr,
788 &dev_attr_ltm_capable.attr, 802 &dev_attr_ltm_capable.attr,
803#ifdef CONFIG_OF
804 &dev_attr_devspec.attr,
805#endif
789 NULL, 806 NULL,
790}; 807};
791static struct attribute_group dev_attr_grp = { 808static struct attribute_group dev_attr_grp = {
diff --git a/drivers/usb/core/urb.c b/drivers/usb/core/urb.c
index a9039696476e..d75cb8c0f7df 100644
--- a/drivers/usb/core/urb.c
+++ b/drivers/usb/core/urb.c
@@ -1,3 +1,8 @@
1/*
2 * Released under the GPLv2 only.
3 * SPDX-License-Identifier: GPL-2.0
4 */
5
1#include <linux/module.h> 6#include <linux/module.h>
2#include <linux/string.h> 7#include <linux/string.h>
3#include <linux/bitops.h> 8#include <linux/bitops.h>
@@ -407,11 +412,8 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags)
407 } 412 }
408 413
409 /* "high bandwidth" mode, 1-3 packets/uframe? */ 414 /* "high bandwidth" mode, 1-3 packets/uframe? */
410 if (dev->speed == USB_SPEED_HIGH) { 415 if (dev->speed == USB_SPEED_HIGH)
411 int mult = 1 + ((max >> 11) & 0x03); 416 max *= usb_endpoint_maxp_mult(&ep->desc);
412 max &= 0x07ff;
413 max *= mult;
414 }
415 417
416 if (urb->number_of_packets <= 0) 418 if (urb->number_of_packets <= 0)
417 return -EINVAL; 419 return -EINVAL;
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
index 592151461017..a2ccc69fb45c 100644
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -12,6 +12,9 @@
12 * (usb_device_id matching changes by Adam J. Richter) 12 * (usb_device_id matching changes by Adam J. Richter)
13 * (C) Copyright Greg Kroah-Hartman 2002-2003 13 * (C) Copyright Greg Kroah-Hartman 2002-2003
14 * 14 *
15 * Released under the GPLv2 only.
16 * SPDX-License-Identifier: GPL-2.0
17 *
15 * NOTE! This is not actually a driver at all, rather this is 18 * NOTE! This is not actually a driver at all, rather this is
16 * just a collection of helper routines that implement the 19 * just a collection of helper routines that implement the
17 * generic USB things that the real drivers can use.. 20 * generic USB things that the real drivers can use..
diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
index 53318126ed91..dc6949248823 100644
--- a/drivers/usb/core/usb.h
+++ b/drivers/usb/core/usb.h
@@ -1,3 +1,8 @@
1/*
2 * Released under the GPLv2 only.
3 * SPDX-License-Identifier: GPL-2.0
4 */
5
1#include <linux/pm.h> 6#include <linux/pm.h>
2#include <linux/acpi.h> 7#include <linux/acpi.h>
3 8
diff --git a/drivers/usb/dwc2/Makefile b/drivers/usb/dwc2/Makefile
index 50fdaace1e73..b9237e1e45d0 100644
--- a/drivers/usb/dwc2/Makefile
+++ b/drivers/usb/dwc2/Makefile
@@ -3,6 +3,7 @@ ccflags-$(CONFIG_USB_DWC2_VERBOSE) += -DVERBOSE_DEBUG
3 3
4obj-$(CONFIG_USB_DWC2) += dwc2.o 4obj-$(CONFIG_USB_DWC2) += dwc2.o
5dwc2-y := core.o core_intr.o platform.o 5dwc2-y := core.o core_intr.o platform.o
6dwc2-y += params.o
6 7
7ifneq ($(filter y,$(CONFIG_USB_DWC2_HOST) $(CONFIG_USB_DWC2_DUAL_ROLE)),) 8ifneq ($(filter y,$(CONFIG_USB_DWC2_HOST) $(CONFIG_USB_DWC2_DUAL_ROLE)),)
8 dwc2-y += hcd.o hcd_intr.o 9 dwc2-y += hcd.o hcd_intr.o
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 4c0fa0b17353..11d8ae9aead1 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -135,7 +135,7 @@ int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore)
135 u32 pcgcctl; 135 u32 pcgcctl;
136 int ret = 0; 136 int ret = 0;
137 137
138 if (!hsotg->core_params->hibernation) 138 if (!hsotg->params.hibernation)
139 return -ENOTSUPP; 139 return -ENOTSUPP;
140 140
141 pcgcctl = dwc2_readl(hsotg->regs + PCGCTL); 141 pcgcctl = dwc2_readl(hsotg->regs + PCGCTL);
@@ -188,7 +188,7 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg)
188 u32 pcgcctl; 188 u32 pcgcctl;
189 int ret = 0; 189 int ret = 0;
190 190
191 if (!hsotg->core_params->hibernation) 191 if (!hsotg->params.hibernation)
192 return -ENOTSUPP; 192 return -ENOTSUPP;
193 193
194 /* Backup all registers */ 194 /* Backup all registers */
@@ -445,7 +445,7 @@ static bool dwc2_force_mode(struct dwc2_hsotg *hsotg, bool host)
445 * the force mode. We only need to call this once during probe if 445 * the force mode. We only need to call this once during probe if
446 * dr_mode == OTG. 446 * dr_mode == OTG.
447 */ 447 */
448static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg) 448void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
449{ 449{
450 u32 gusbcfg; 450 u32 gusbcfg;
451 451
@@ -541,7 +541,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
541 addr = hsotg->regs + HAINTMSK; 541 addr = hsotg->regs + HAINTMSK;
542 dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n", 542 dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n",
543 (unsigned long)addr, dwc2_readl(addr)); 543 (unsigned long)addr, dwc2_readl(addr));
544 if (hsotg->core_params->dma_desc_enable > 0) { 544 if (hsotg->params.dma_desc_enable > 0) {
545 addr = hsotg->regs + HFLBADDR; 545 addr = hsotg->regs + HFLBADDR;
546 dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n", 546 dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n",
547 (unsigned long)addr, dwc2_readl(addr)); 547 (unsigned long)addr, dwc2_readl(addr));
@@ -551,7 +551,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
551 dev_dbg(hsotg->dev, "HPRT0 @0x%08lX : 0x%08X\n", 551 dev_dbg(hsotg->dev, "HPRT0 @0x%08lX : 0x%08X\n",
552 (unsigned long)addr, dwc2_readl(addr)); 552 (unsigned long)addr, dwc2_readl(addr));
553 553
554 for (i = 0; i < hsotg->core_params->host_channels; i++) { 554 for (i = 0; i < hsotg->params.host_channels; i++) {
555 dev_dbg(hsotg->dev, "Host Channel %d Specific Registers\n", i); 555 dev_dbg(hsotg->dev, "Host Channel %d Specific Registers\n", i);
556 addr = hsotg->regs + HCCHAR(i); 556 addr = hsotg->regs + HCCHAR(i);
557 dev_dbg(hsotg->dev, "HCCHAR @0x%08lX : 0x%08X\n", 557 dev_dbg(hsotg->dev, "HCCHAR @0x%08lX : 0x%08X\n",
@@ -571,7 +571,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
571 addr = hsotg->regs + HCDMA(i); 571 addr = hsotg->regs + HCDMA(i);
572 dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n", 572 dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n",
573 (unsigned long)addr, dwc2_readl(addr)); 573 (unsigned long)addr, dwc2_readl(addr));
574 if (hsotg->core_params->dma_desc_enable > 0) { 574 if (hsotg->params.dma_desc_enable > 0) {
575 addr = hsotg->regs + HCDMAB(i); 575 addr = hsotg->regs + HCDMAB(i);
576 dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n", 576 dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n",
577 (unsigned long)addr, dwc2_readl(addr)); 577 (unsigned long)addr, dwc2_readl(addr));
@@ -735,704 +735,13 @@ void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg)
735 udelay(1); 735 udelay(1);
736} 736}
737 737
738#define DWC2_OUT_OF_BOUNDS(a, b, c) ((a) < (b) || (a) > (c))
739
740/* Parameter access functions */
741void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val)
742{
743 int valid = 1;
744
745 switch (val) {
746 case DWC2_CAP_PARAM_HNP_SRP_CAPABLE:
747 if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE)
748 valid = 0;
749 break;
750 case DWC2_CAP_PARAM_SRP_ONLY_CAPABLE:
751 switch (hsotg->hw_params.op_mode) {
752 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
753 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
754 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
755 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
756 break;
757 default:
758 valid = 0;
759 break;
760 }
761 break;
762 case DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE:
763 /* always valid */
764 break;
765 default:
766 valid = 0;
767 break;
768 }
769
770 if (!valid) {
771 if (val >= 0)
772 dev_err(hsotg->dev,
773 "%d invalid for otg_cap parameter. Check HW configuration.\n",
774 val);
775 switch (hsotg->hw_params.op_mode) {
776 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
777 val = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
778 break;
779 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
780 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
781 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
782 val = DWC2_CAP_PARAM_SRP_ONLY_CAPABLE;
783 break;
784 default:
785 val = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
786 break;
787 }
788 dev_dbg(hsotg->dev, "Setting otg_cap to %d\n", val);
789 }
790
791 hsotg->core_params->otg_cap = val;
792}
793
794void dwc2_set_param_dma_enable(struct dwc2_hsotg *hsotg, int val)
795{
796 int valid = 1;
797
798 if (val > 0 && hsotg->hw_params.arch == GHWCFG2_SLAVE_ONLY_ARCH)
799 valid = 0;
800 if (val < 0)
801 valid = 0;
802
803 if (!valid) {
804 if (val >= 0)
805 dev_err(hsotg->dev,
806 "%d invalid for dma_enable parameter. Check HW configuration.\n",
807 val);
808 val = hsotg->hw_params.arch != GHWCFG2_SLAVE_ONLY_ARCH;
809 dev_dbg(hsotg->dev, "Setting dma_enable to %d\n", val);
810 }
811
812 hsotg->core_params->dma_enable = val;
813}
814
815void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val)
816{
817 int valid = 1;
818
819 if (val > 0 && (hsotg->core_params->dma_enable <= 0 ||
820 !hsotg->hw_params.dma_desc_enable))
821 valid = 0;
822 if (val < 0)
823 valid = 0;
824
825 if (!valid) {
826 if (val >= 0)
827 dev_err(hsotg->dev,
828 "%d invalid for dma_desc_enable parameter. Check HW configuration.\n",
829 val);
830 val = (hsotg->core_params->dma_enable > 0 &&
831 hsotg->hw_params.dma_desc_enable);
832 dev_dbg(hsotg->dev, "Setting dma_desc_enable to %d\n", val);
833 }
834
835 hsotg->core_params->dma_desc_enable = val;
836}
837
838void dwc2_set_param_dma_desc_fs_enable(struct dwc2_hsotg *hsotg, int val)
839{
840 int valid = 1;
841
842 if (val > 0 && (hsotg->core_params->dma_enable <= 0 ||
843 !hsotg->hw_params.dma_desc_enable))
844 valid = 0;
845 if (val < 0)
846 valid = 0;
847
848 if (!valid) {
849 if (val >= 0)
850 dev_err(hsotg->dev,
851 "%d invalid for dma_desc_fs_enable parameter. Check HW configuration.\n",
852 val);
853 val = (hsotg->core_params->dma_enable > 0 &&
854 hsotg->hw_params.dma_desc_enable);
855 }
856
857 hsotg->core_params->dma_desc_fs_enable = val;
858 dev_dbg(hsotg->dev, "Setting dma_desc_fs_enable to %d\n", val);
859}
860
861void dwc2_set_param_host_support_fs_ls_low_power(struct dwc2_hsotg *hsotg,
862 int val)
863{
864 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
865 if (val >= 0) {
866 dev_err(hsotg->dev,
867 "Wrong value for host_support_fs_low_power\n");
868 dev_err(hsotg->dev,
869 "host_support_fs_low_power must be 0 or 1\n");
870 }
871 val = 0;
872 dev_dbg(hsotg->dev,
873 "Setting host_support_fs_low_power to %d\n", val);
874 }
875
876 hsotg->core_params->host_support_fs_ls_low_power = val;
877}
878
879void dwc2_set_param_enable_dynamic_fifo(struct dwc2_hsotg *hsotg, int val)
880{
881 int valid = 1;
882
883 if (val > 0 && !hsotg->hw_params.enable_dynamic_fifo)
884 valid = 0;
885 if (val < 0)
886 valid = 0;
887
888 if (!valid) {
889 if (val >= 0)
890 dev_err(hsotg->dev,
891 "%d invalid for enable_dynamic_fifo parameter. Check HW configuration.\n",
892 val);
893 val = hsotg->hw_params.enable_dynamic_fifo;
894 dev_dbg(hsotg->dev, "Setting enable_dynamic_fifo to %d\n", val);
895 }
896
897 hsotg->core_params->enable_dynamic_fifo = val;
898}
899
900void dwc2_set_param_host_rx_fifo_size(struct dwc2_hsotg *hsotg, int val)
901{
902 int valid = 1;
903
904 if (val < 16 || val > hsotg->hw_params.host_rx_fifo_size)
905 valid = 0;
906
907 if (!valid) {
908 if (val >= 0)
909 dev_err(hsotg->dev,
910 "%d invalid for host_rx_fifo_size. Check HW configuration.\n",
911 val);
912 val = hsotg->hw_params.host_rx_fifo_size;
913 dev_dbg(hsotg->dev, "Setting host_rx_fifo_size to %d\n", val);
914 }
915
916 hsotg->core_params->host_rx_fifo_size = val;
917}
918
919void dwc2_set_param_host_nperio_tx_fifo_size(struct dwc2_hsotg *hsotg, int val)
920{
921 int valid = 1;
922
923 if (val < 16 || val > hsotg->hw_params.host_nperio_tx_fifo_size)
924 valid = 0;
925
926 if (!valid) {
927 if (val >= 0)
928 dev_err(hsotg->dev,
929 "%d invalid for host_nperio_tx_fifo_size. Check HW configuration.\n",
930 val);
931 val = hsotg->hw_params.host_nperio_tx_fifo_size;
932 dev_dbg(hsotg->dev, "Setting host_nperio_tx_fifo_size to %d\n",
933 val);
934 }
935
936 hsotg->core_params->host_nperio_tx_fifo_size = val;
937}
938
939void dwc2_set_param_host_perio_tx_fifo_size(struct dwc2_hsotg *hsotg, int val)
940{
941 int valid = 1;
942
943 if (val < 16 || val > hsotg->hw_params.host_perio_tx_fifo_size)
944 valid = 0;
945
946 if (!valid) {
947 if (val >= 0)
948 dev_err(hsotg->dev,
949 "%d invalid for host_perio_tx_fifo_size. Check HW configuration.\n",
950 val);
951 val = hsotg->hw_params.host_perio_tx_fifo_size;
952 dev_dbg(hsotg->dev, "Setting host_perio_tx_fifo_size to %d\n",
953 val);
954 }
955
956 hsotg->core_params->host_perio_tx_fifo_size = val;
957}
958
959void dwc2_set_param_max_transfer_size(struct dwc2_hsotg *hsotg, int val)
960{
961 int valid = 1;
962
963 if (val < 2047 || val > hsotg->hw_params.max_transfer_size)
964 valid = 0;
965
966 if (!valid) {
967 if (val >= 0)
968 dev_err(hsotg->dev,
969 "%d invalid for max_transfer_size. Check HW configuration.\n",
970 val);
971 val = hsotg->hw_params.max_transfer_size;
972 dev_dbg(hsotg->dev, "Setting max_transfer_size to %d\n", val);
973 }
974
975 hsotg->core_params->max_transfer_size = val;
976}
977
978void dwc2_set_param_max_packet_count(struct dwc2_hsotg *hsotg, int val)
979{
980 int valid = 1;
981
982 if (val < 15 || val > hsotg->hw_params.max_packet_count)
983 valid = 0;
984
985 if (!valid) {
986 if (val >= 0)
987 dev_err(hsotg->dev,
988 "%d invalid for max_packet_count. Check HW configuration.\n",
989 val);
990 val = hsotg->hw_params.max_packet_count;
991 dev_dbg(hsotg->dev, "Setting max_packet_count to %d\n", val);
992 }
993
994 hsotg->core_params->max_packet_count = val;
995}
996
997void dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val)
998{
999 int valid = 1;
1000
1001 if (val < 1 || val > hsotg->hw_params.host_channels)
1002 valid = 0;
1003
1004 if (!valid) {
1005 if (val >= 0)
1006 dev_err(hsotg->dev,
1007 "%d invalid for host_channels. Check HW configuration.\n",
1008 val);
1009 val = hsotg->hw_params.host_channels;
1010 dev_dbg(hsotg->dev, "Setting host_channels to %d\n", val);
1011 }
1012
1013 hsotg->core_params->host_channels = val;
1014}
1015
1016void dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val)
1017{
1018 int valid = 0;
1019 u32 hs_phy_type, fs_phy_type;
1020
1021 if (DWC2_OUT_OF_BOUNDS(val, DWC2_PHY_TYPE_PARAM_FS,
1022 DWC2_PHY_TYPE_PARAM_ULPI)) {
1023 if (val >= 0) {
1024 dev_err(hsotg->dev, "Wrong value for phy_type\n");
1025 dev_err(hsotg->dev, "phy_type must be 0, 1 or 2\n");
1026 }
1027
1028 valid = 0;
1029 }
1030
1031 hs_phy_type = hsotg->hw_params.hs_phy_type;
1032 fs_phy_type = hsotg->hw_params.fs_phy_type;
1033 if (val == DWC2_PHY_TYPE_PARAM_UTMI &&
1034 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI ||
1035 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
1036 valid = 1;
1037 else if (val == DWC2_PHY_TYPE_PARAM_ULPI &&
1038 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI ||
1039 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
1040 valid = 1;
1041 else if (val == DWC2_PHY_TYPE_PARAM_FS &&
1042 fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED)
1043 valid = 1;
1044
1045 if (!valid) {
1046 if (val >= 0)
1047 dev_err(hsotg->dev,
1048 "%d invalid for phy_type. Check HW configuration.\n",
1049 val);
1050 val = DWC2_PHY_TYPE_PARAM_FS;
1051 if (hs_phy_type != GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED) {
1052 if (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI ||
1053 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI)
1054 val = DWC2_PHY_TYPE_PARAM_UTMI;
1055 else
1056 val = DWC2_PHY_TYPE_PARAM_ULPI;
1057 }
1058 dev_dbg(hsotg->dev, "Setting phy_type to %d\n", val);
1059 }
1060
1061 hsotg->core_params->phy_type = val;
1062}
1063
1064static int dwc2_get_param_phy_type(struct dwc2_hsotg *hsotg)
1065{
1066 return hsotg->core_params->phy_type;
1067}
1068
1069void dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val)
1070{
1071 int valid = 1;
1072
1073 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1074 if (val >= 0) {
1075 dev_err(hsotg->dev, "Wrong value for speed parameter\n");
1076 dev_err(hsotg->dev, "max_speed parameter must be 0 or 1\n");
1077 }
1078 valid = 0;
1079 }
1080
1081 if (val == DWC2_SPEED_PARAM_HIGH &&
1082 dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS)
1083 valid = 0;
1084
1085 if (!valid) {
1086 if (val >= 0)
1087 dev_err(hsotg->dev,
1088 "%d invalid for speed parameter. Check HW configuration.\n",
1089 val);
1090 val = dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS ?
1091 DWC2_SPEED_PARAM_FULL : DWC2_SPEED_PARAM_HIGH;
1092 dev_dbg(hsotg->dev, "Setting speed to %d\n", val);
1093 }
1094
1095 hsotg->core_params->speed = val;
1096}
1097
1098void dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg, int val)
1099{
1100 int valid = 1;
1101
1102 if (DWC2_OUT_OF_BOUNDS(val, DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ,
1103 DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ)) {
1104 if (val >= 0) {
1105 dev_err(hsotg->dev,
1106 "Wrong value for host_ls_low_power_phy_clk parameter\n");
1107 dev_err(hsotg->dev,
1108 "host_ls_low_power_phy_clk must be 0 or 1\n");
1109 }
1110 valid = 0;
1111 }
1112
1113 if (val == DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ &&
1114 dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS)
1115 valid = 0;
1116
1117 if (!valid) {
1118 if (val >= 0)
1119 dev_err(hsotg->dev,
1120 "%d invalid for host_ls_low_power_phy_clk. Check HW configuration.\n",
1121 val);
1122 val = dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS
1123 ? DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ
1124 : DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ;
1125 dev_dbg(hsotg->dev, "Setting host_ls_low_power_phy_clk to %d\n",
1126 val);
1127 }
1128
1129 hsotg->core_params->host_ls_low_power_phy_clk = val;
1130}
1131
1132void dwc2_set_param_phy_ulpi_ddr(struct dwc2_hsotg *hsotg, int val)
1133{
1134 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1135 if (val >= 0) {
1136 dev_err(hsotg->dev, "Wrong value for phy_ulpi_ddr\n");
1137 dev_err(hsotg->dev, "phy_upli_ddr must be 0 or 1\n");
1138 }
1139 val = 0;
1140 dev_dbg(hsotg->dev, "Setting phy_upli_ddr to %d\n", val);
1141 }
1142
1143 hsotg->core_params->phy_ulpi_ddr = val;
1144}
1145
1146void dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val)
1147{
1148 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1149 if (val >= 0) {
1150 dev_err(hsotg->dev,
1151 "Wrong value for phy_ulpi_ext_vbus\n");
1152 dev_err(hsotg->dev,
1153 "phy_ulpi_ext_vbus must be 0 or 1\n");
1154 }
1155 val = 0;
1156 dev_dbg(hsotg->dev, "Setting phy_ulpi_ext_vbus to %d\n", val);
1157 }
1158
1159 hsotg->core_params->phy_ulpi_ext_vbus = val;
1160}
1161
1162void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val)
1163{
1164 int valid = 0;
1165
1166 switch (hsotg->hw_params.utmi_phy_data_width) {
1167 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8:
1168 valid = (val == 8);
1169 break;
1170 case GHWCFG4_UTMI_PHY_DATA_WIDTH_16:
1171 valid = (val == 16);
1172 break;
1173 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16:
1174 valid = (val == 8 || val == 16);
1175 break;
1176 }
1177
1178 if (!valid) {
1179 if (val >= 0) {
1180 dev_err(hsotg->dev,
1181 "%d invalid for phy_utmi_width. Check HW configuration.\n",
1182 val);
1183 }
1184 val = (hsotg->hw_params.utmi_phy_data_width ==
1185 GHWCFG4_UTMI_PHY_DATA_WIDTH_8) ? 8 : 16;
1186 dev_dbg(hsotg->dev, "Setting phy_utmi_width to %d\n", val);
1187 }
1188
1189 hsotg->core_params->phy_utmi_width = val;
1190}
1191
1192void dwc2_set_param_ulpi_fs_ls(struct dwc2_hsotg *hsotg, int val)
1193{
1194 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1195 if (val >= 0) {
1196 dev_err(hsotg->dev, "Wrong value for ulpi_fs_ls\n");
1197 dev_err(hsotg->dev, "ulpi_fs_ls must be 0 or 1\n");
1198 }
1199 val = 0;
1200 dev_dbg(hsotg->dev, "Setting ulpi_fs_ls to %d\n", val);
1201 }
1202
1203 hsotg->core_params->ulpi_fs_ls = val;
1204}
1205
1206void dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val)
1207{
1208 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1209 if (val >= 0) {
1210 dev_err(hsotg->dev, "Wrong value for ts_dline\n");
1211 dev_err(hsotg->dev, "ts_dline must be 0 or 1\n");
1212 }
1213 val = 0;
1214 dev_dbg(hsotg->dev, "Setting ts_dline to %d\n", val);
1215 }
1216
1217 hsotg->core_params->ts_dline = val;
1218}
1219
1220void dwc2_set_param_i2c_enable(struct dwc2_hsotg *hsotg, int val)
1221{
1222 int valid = 1;
1223
1224 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1225 if (val >= 0) {
1226 dev_err(hsotg->dev, "Wrong value for i2c_enable\n");
1227 dev_err(hsotg->dev, "i2c_enable must be 0 or 1\n");
1228 }
1229
1230 valid = 0;
1231 }
1232
1233 if (val == 1 && !(hsotg->hw_params.i2c_enable))
1234 valid = 0;
1235
1236 if (!valid) {
1237 if (val >= 0)
1238 dev_err(hsotg->dev,
1239 "%d invalid for i2c_enable. Check HW configuration.\n",
1240 val);
1241 val = hsotg->hw_params.i2c_enable;
1242 dev_dbg(hsotg->dev, "Setting i2c_enable to %d\n", val);
1243 }
1244
1245 hsotg->core_params->i2c_enable = val;
1246}
1247
1248void dwc2_set_param_en_multiple_tx_fifo(struct dwc2_hsotg *hsotg, int val)
1249{
1250 int valid = 1;
1251
1252 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1253 if (val >= 0) {
1254 dev_err(hsotg->dev,
1255 "Wrong value for en_multiple_tx_fifo,\n");
1256 dev_err(hsotg->dev,
1257 "en_multiple_tx_fifo must be 0 or 1\n");
1258 }
1259 valid = 0;
1260 }
1261
1262 if (val == 1 && !hsotg->hw_params.en_multiple_tx_fifo)
1263 valid = 0;
1264
1265 if (!valid) {
1266 if (val >= 0)
1267 dev_err(hsotg->dev,
1268 "%d invalid for parameter en_multiple_tx_fifo. Check HW configuration.\n",
1269 val);
1270 val = hsotg->hw_params.en_multiple_tx_fifo;
1271 dev_dbg(hsotg->dev, "Setting en_multiple_tx_fifo to %d\n", val);
1272 }
1273
1274 hsotg->core_params->en_multiple_tx_fifo = val;
1275}
1276
1277void dwc2_set_param_reload_ctl(struct dwc2_hsotg *hsotg, int val)
1278{
1279 int valid = 1;
1280
1281 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1282 if (val >= 0) {
1283 dev_err(hsotg->dev,
1284 "'%d' invalid for parameter reload_ctl\n", val);
1285 dev_err(hsotg->dev, "reload_ctl must be 0 or 1\n");
1286 }
1287 valid = 0;
1288 }
1289
1290 if (val == 1 && hsotg->hw_params.snpsid < DWC2_CORE_REV_2_92a)
1291 valid = 0;
1292
1293 if (!valid) {
1294 if (val >= 0)
1295 dev_err(hsotg->dev,
1296 "%d invalid for parameter reload_ctl. Check HW configuration.\n",
1297 val);
1298 val = hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_92a;
1299 dev_dbg(hsotg->dev, "Setting reload_ctl to %d\n", val);
1300 }
1301
1302 hsotg->core_params->reload_ctl = val;
1303}
1304
1305void dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val)
1306{
1307 if (val != -1)
1308 hsotg->core_params->ahbcfg = val;
1309 else
1310 hsotg->core_params->ahbcfg = GAHBCFG_HBSTLEN_INCR4 <<
1311 GAHBCFG_HBSTLEN_SHIFT;
1312}
1313
1314void dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val)
1315{
1316 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1317 if (val >= 0) {
1318 dev_err(hsotg->dev,
1319 "'%d' invalid for parameter otg_ver\n", val);
1320 dev_err(hsotg->dev,
1321 "otg_ver must be 0 (for OTG 1.3 support) or 1 (for OTG 2.0 support)\n");
1322 }
1323 val = 0;
1324 dev_dbg(hsotg->dev, "Setting otg_ver to %d\n", val);
1325 }
1326
1327 hsotg->core_params->otg_ver = val;
1328}
1329
1330static void dwc2_set_param_uframe_sched(struct dwc2_hsotg *hsotg, int val)
1331{
1332 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1333 if (val >= 0) {
1334 dev_err(hsotg->dev,
1335 "'%d' invalid for parameter uframe_sched\n",
1336 val);
1337 dev_err(hsotg->dev, "uframe_sched must be 0 or 1\n");
1338 }
1339 val = 1;
1340 dev_dbg(hsotg->dev, "Setting uframe_sched to %d\n", val);
1341 }
1342
1343 hsotg->core_params->uframe_sched = val;
1344}
1345
1346static void dwc2_set_param_external_id_pin_ctl(struct dwc2_hsotg *hsotg,
1347 int val)
1348{
1349 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1350 if (val >= 0) {
1351 dev_err(hsotg->dev,
1352 "'%d' invalid for parameter external_id_pin_ctl\n",
1353 val);
1354 dev_err(hsotg->dev, "external_id_pin_ctl must be 0 or 1\n");
1355 }
1356 val = 0;
1357 dev_dbg(hsotg->dev, "Setting external_id_pin_ctl to %d\n", val);
1358 }
1359
1360 hsotg->core_params->external_id_pin_ctl = val;
1361}
1362
1363static void dwc2_set_param_hibernation(struct dwc2_hsotg *hsotg,
1364 int val)
1365{
1366 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1367 if (val >= 0) {
1368 dev_err(hsotg->dev,
1369 "'%d' invalid for parameter hibernation\n",
1370 val);
1371 dev_err(hsotg->dev, "hibernation must be 0 or 1\n");
1372 }
1373 val = 0;
1374 dev_dbg(hsotg->dev, "Setting hibernation to %d\n", val);
1375 }
1376
1377 hsotg->core_params->hibernation = val;
1378}
1379
1380/*
1381 * This function is called during module intialization to pass module parameters
1382 * for the DWC_otg core.
1383 */
1384void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
1385 const struct dwc2_core_params *params)
1386{
1387 dev_dbg(hsotg->dev, "%s()\n", __func__);
1388
1389 dwc2_set_param_otg_cap(hsotg, params->otg_cap);
1390 dwc2_set_param_dma_enable(hsotg, params->dma_enable);
1391 dwc2_set_param_dma_desc_enable(hsotg, params->dma_desc_enable);
1392 dwc2_set_param_dma_desc_fs_enable(hsotg, params->dma_desc_fs_enable);
1393 dwc2_set_param_host_support_fs_ls_low_power(hsotg,
1394 params->host_support_fs_ls_low_power);
1395 dwc2_set_param_enable_dynamic_fifo(hsotg,
1396 params->enable_dynamic_fifo);
1397 dwc2_set_param_host_rx_fifo_size(hsotg,
1398 params->host_rx_fifo_size);
1399 dwc2_set_param_host_nperio_tx_fifo_size(hsotg,
1400 params->host_nperio_tx_fifo_size);
1401 dwc2_set_param_host_perio_tx_fifo_size(hsotg,
1402 params->host_perio_tx_fifo_size);
1403 dwc2_set_param_max_transfer_size(hsotg,
1404 params->max_transfer_size);
1405 dwc2_set_param_max_packet_count(hsotg,
1406 params->max_packet_count);
1407 dwc2_set_param_host_channels(hsotg, params->host_channels);
1408 dwc2_set_param_phy_type(hsotg, params->phy_type);
1409 dwc2_set_param_speed(hsotg, params->speed);
1410 dwc2_set_param_host_ls_low_power_phy_clk(hsotg,
1411 params->host_ls_low_power_phy_clk);
1412 dwc2_set_param_phy_ulpi_ddr(hsotg, params->phy_ulpi_ddr);
1413 dwc2_set_param_phy_ulpi_ext_vbus(hsotg,
1414 params->phy_ulpi_ext_vbus);
1415 dwc2_set_param_phy_utmi_width(hsotg, params->phy_utmi_width);
1416 dwc2_set_param_ulpi_fs_ls(hsotg, params->ulpi_fs_ls);
1417 dwc2_set_param_ts_dline(hsotg, params->ts_dline);
1418 dwc2_set_param_i2c_enable(hsotg, params->i2c_enable);
1419 dwc2_set_param_en_multiple_tx_fifo(hsotg,
1420 params->en_multiple_tx_fifo);
1421 dwc2_set_param_reload_ctl(hsotg, params->reload_ctl);
1422 dwc2_set_param_ahbcfg(hsotg, params->ahbcfg);
1423 dwc2_set_param_otg_ver(hsotg, params->otg_ver);
1424 dwc2_set_param_uframe_sched(hsotg, params->uframe_sched);
1425 dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl);
1426 dwc2_set_param_hibernation(hsotg, params->hibernation);
1427}
1428
1429/* 738/*
1430 * Forces either host or device mode if the controller is not 739 * Forces either host or device mode if the controller is not
1431 * currently in that mode. 740 * currently in that mode.
1432 * 741 *
1433 * Returns true if the mode was forced. 742 * Returns true if the mode was forced.
1434 */ 743 */
1435static bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host) 744bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host)
1436{ 745{
1437 if (host && dwc2_is_host_mode(hsotg)) 746 if (host && dwc2_is_host_mode(hsotg))
1438 return false; 747 return false;
@@ -1442,232 +751,9 @@ static bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host)
1442 return dwc2_force_mode(hsotg, host); 751 return dwc2_force_mode(hsotg, host);
1443} 752}
1444 753
1445/*
1446 * Gets host hardware parameters. Forces host mode if not currently in
1447 * host mode. Should be called immediately after a core soft reset in
1448 * order to get the reset values.
1449 */
1450static void dwc2_get_host_hwparams(struct dwc2_hsotg *hsotg)
1451{
1452 struct dwc2_hw_params *hw = &hsotg->hw_params;
1453 u32 gnptxfsiz;
1454 u32 hptxfsiz;
1455 bool forced;
1456
1457 if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
1458 return;
1459
1460 forced = dwc2_force_mode_if_needed(hsotg, true);
1461
1462 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
1463 hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ);
1464 dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
1465 dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz);
1466
1467 if (forced)
1468 dwc2_clear_force_mode(hsotg);
1469
1470 hw->host_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >>
1471 FIFOSIZE_DEPTH_SHIFT;
1472 hw->host_perio_tx_fifo_size = (hptxfsiz & FIFOSIZE_DEPTH_MASK) >>
1473 FIFOSIZE_DEPTH_SHIFT;
1474}
1475
1476/*
1477 * Gets device hardware parameters. Forces device mode if not
1478 * currently in device mode. Should be called immediately after a core
1479 * soft reset in order to get the reset values.
1480 */
1481static void dwc2_get_dev_hwparams(struct dwc2_hsotg *hsotg)
1482{
1483 struct dwc2_hw_params *hw = &hsotg->hw_params;
1484 bool forced;
1485 u32 gnptxfsiz;
1486
1487 if (hsotg->dr_mode == USB_DR_MODE_HOST)
1488 return;
1489
1490 forced = dwc2_force_mode_if_needed(hsotg, false);
1491
1492 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
1493 dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
1494
1495 if (forced)
1496 dwc2_clear_force_mode(hsotg);
1497
1498 hw->dev_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >>
1499 FIFOSIZE_DEPTH_SHIFT;
1500}
1501
1502/**
1503 * During device initialization, read various hardware configuration
1504 * registers and interpret the contents.
1505 */
1506int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
1507{
1508 struct dwc2_hw_params *hw = &hsotg->hw_params;
1509 unsigned width;
1510 u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4;
1511 u32 grxfsiz;
1512
1513 /*
1514 * Attempt to ensure this device is really a DWC_otg Controller.
1515 * Read and verify the GSNPSID register contents. The value should be
1516 * 0x45f42xxx or 0x45f43xxx, which corresponds to either "OT2" or "OT3",
1517 * as in "OTG version 2.xx" or "OTG version 3.xx".
1518 */
1519 hw->snpsid = dwc2_readl(hsotg->regs + GSNPSID);
1520 if ((hw->snpsid & 0xfffff000) != 0x4f542000 &&
1521 (hw->snpsid & 0xfffff000) != 0x4f543000) {
1522 dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n",
1523 hw->snpsid);
1524 return -ENODEV;
1525 }
1526
1527 dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n",
1528 hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf,
1529 hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid);
1530
1531 hwcfg1 = dwc2_readl(hsotg->regs + GHWCFG1);
1532 hwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2);
1533 hwcfg3 = dwc2_readl(hsotg->regs + GHWCFG3);
1534 hwcfg4 = dwc2_readl(hsotg->regs + GHWCFG4);
1535 grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ);
1536
1537 dev_dbg(hsotg->dev, "hwcfg1=%08x\n", hwcfg1);
1538 dev_dbg(hsotg->dev, "hwcfg2=%08x\n", hwcfg2);
1539 dev_dbg(hsotg->dev, "hwcfg3=%08x\n", hwcfg3);
1540 dev_dbg(hsotg->dev, "hwcfg4=%08x\n", hwcfg4);
1541 dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz);
1542
1543 /*
1544 * Host specific hardware parameters. Reading these parameters
1545 * requires the controller to be in host mode. The mode will
1546 * be forced, if necessary, to read these values.
1547 */
1548 dwc2_get_host_hwparams(hsotg);
1549 dwc2_get_dev_hwparams(hsotg);
1550
1551 /* hwcfg1 */
1552 hw->dev_ep_dirs = hwcfg1;
1553
1554 /* hwcfg2 */
1555 hw->op_mode = (hwcfg2 & GHWCFG2_OP_MODE_MASK) >>
1556 GHWCFG2_OP_MODE_SHIFT;
1557 hw->arch = (hwcfg2 & GHWCFG2_ARCHITECTURE_MASK) >>
1558 GHWCFG2_ARCHITECTURE_SHIFT;
1559 hw->enable_dynamic_fifo = !!(hwcfg2 & GHWCFG2_DYNAMIC_FIFO);
1560 hw->host_channels = 1 + ((hwcfg2 & GHWCFG2_NUM_HOST_CHAN_MASK) >>
1561 GHWCFG2_NUM_HOST_CHAN_SHIFT);
1562 hw->hs_phy_type = (hwcfg2 & GHWCFG2_HS_PHY_TYPE_MASK) >>
1563 GHWCFG2_HS_PHY_TYPE_SHIFT;
1564 hw->fs_phy_type = (hwcfg2 & GHWCFG2_FS_PHY_TYPE_MASK) >>
1565 GHWCFG2_FS_PHY_TYPE_SHIFT;
1566 hw->num_dev_ep = (hwcfg2 & GHWCFG2_NUM_DEV_EP_MASK) >>
1567 GHWCFG2_NUM_DEV_EP_SHIFT;
1568 hw->nperio_tx_q_depth =
1569 (hwcfg2 & GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK) >>
1570 GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT << 1;
1571 hw->host_perio_tx_q_depth =
1572 (hwcfg2 & GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK) >>
1573 GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT << 1;
1574 hw->dev_token_q_depth =
1575 (hwcfg2 & GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK) >>
1576 GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT;
1577
1578 /* hwcfg3 */
1579 width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >>
1580 GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT;
1581 hw->max_transfer_size = (1 << (width + 11)) - 1;
1582 width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >>
1583 GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT;
1584 hw->max_packet_count = (1 << (width + 4)) - 1;
1585 hw->i2c_enable = !!(hwcfg3 & GHWCFG3_I2C);
1586 hw->total_fifo_size = (hwcfg3 & GHWCFG3_DFIFO_DEPTH_MASK) >>
1587 GHWCFG3_DFIFO_DEPTH_SHIFT;
1588
1589 /* hwcfg4 */
1590 hw->en_multiple_tx_fifo = !!(hwcfg4 & GHWCFG4_DED_FIFO_EN);
1591 hw->num_dev_perio_in_ep = (hwcfg4 & GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK) >>
1592 GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT;
1593 hw->dma_desc_enable = !!(hwcfg4 & GHWCFG4_DESC_DMA);
1594 hw->power_optimized = !!(hwcfg4 & GHWCFG4_POWER_OPTIMIZ);
1595 hw->utmi_phy_data_width = (hwcfg4 & GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK) >>
1596 GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT;
1597
1598 /* fifo sizes */
1599 hw->host_rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >>
1600 GRXFSIZ_DEPTH_SHIFT;
1601
1602 dev_dbg(hsotg->dev, "Detected values from hardware:\n");
1603 dev_dbg(hsotg->dev, " op_mode=%d\n",
1604 hw->op_mode);
1605 dev_dbg(hsotg->dev, " arch=%d\n",
1606 hw->arch);
1607 dev_dbg(hsotg->dev, " dma_desc_enable=%d\n",
1608 hw->dma_desc_enable);
1609 dev_dbg(hsotg->dev, " power_optimized=%d\n",
1610 hw->power_optimized);
1611 dev_dbg(hsotg->dev, " i2c_enable=%d\n",
1612 hw->i2c_enable);
1613 dev_dbg(hsotg->dev, " hs_phy_type=%d\n",
1614 hw->hs_phy_type);
1615 dev_dbg(hsotg->dev, " fs_phy_type=%d\n",
1616 hw->fs_phy_type);
1617 dev_dbg(hsotg->dev, " utmi_phy_data_width=%d\n",
1618 hw->utmi_phy_data_width);
1619 dev_dbg(hsotg->dev, " num_dev_ep=%d\n",
1620 hw->num_dev_ep);
1621 dev_dbg(hsotg->dev, " num_dev_perio_in_ep=%d\n",
1622 hw->num_dev_perio_in_ep);
1623 dev_dbg(hsotg->dev, " host_channels=%d\n",
1624 hw->host_channels);
1625 dev_dbg(hsotg->dev, " max_transfer_size=%d\n",
1626 hw->max_transfer_size);
1627 dev_dbg(hsotg->dev, " max_packet_count=%d\n",
1628 hw->max_packet_count);
1629 dev_dbg(hsotg->dev, " nperio_tx_q_depth=0x%0x\n",
1630 hw->nperio_tx_q_depth);
1631 dev_dbg(hsotg->dev, " host_perio_tx_q_depth=0x%0x\n",
1632 hw->host_perio_tx_q_depth);
1633 dev_dbg(hsotg->dev, " dev_token_q_depth=0x%0x\n",
1634 hw->dev_token_q_depth);
1635 dev_dbg(hsotg->dev, " enable_dynamic_fifo=%d\n",
1636 hw->enable_dynamic_fifo);
1637 dev_dbg(hsotg->dev, " en_multiple_tx_fifo=%d\n",
1638 hw->en_multiple_tx_fifo);
1639 dev_dbg(hsotg->dev, " total_fifo_size=%d\n",
1640 hw->total_fifo_size);
1641 dev_dbg(hsotg->dev, " host_rx_fifo_size=%d\n",
1642 hw->host_rx_fifo_size);
1643 dev_dbg(hsotg->dev, " host_nperio_tx_fifo_size=%d\n",
1644 hw->host_nperio_tx_fifo_size);
1645 dev_dbg(hsotg->dev, " host_perio_tx_fifo_size=%d\n",
1646 hw->host_perio_tx_fifo_size);
1647 dev_dbg(hsotg->dev, "\n");
1648
1649 return 0;
1650}
1651
1652/*
1653 * Sets all parameters to the given value.
1654 *
1655 * Assumes that the dwc2_core_params struct contains only integers.
1656 */
1657void dwc2_set_all_params(struct dwc2_core_params *params, int value)
1658{
1659 int *p = (int *)params;
1660 size_t size = sizeof(*params) / sizeof(*p);
1661 int i;
1662
1663 for (i = 0; i < size; i++)
1664 p[i] = value;
1665}
1666
1667
1668u16 dwc2_get_otg_version(struct dwc2_hsotg *hsotg) 754u16 dwc2_get_otg_version(struct dwc2_hsotg *hsotg)
1669{ 755{
1670 return hsotg->core_params->otg_ver == 1 ? 0x0200 : 0x0103; 756 return hsotg->params.otg_ver == 1 ? 0x0200 : 0x0103;
1671} 757}
1672 758
1673bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg) 759bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg)
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 2a21a0414b1d..9548d3e03453 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -172,6 +172,11 @@ struct dwc2_hsotg_req;
172 * @periodic: Set if this is a periodic ep, such as Interrupt 172 * @periodic: Set if this is a periodic ep, such as Interrupt
173 * @isochronous: Set if this is a isochronous ep 173 * @isochronous: Set if this is a isochronous ep
174 * @send_zlp: Set if we need to send a zero-length packet. 174 * @send_zlp: Set if we need to send a zero-length packet.
175 * @desc_list_dma: The DMA address of descriptor chain currently in use.
176 * @desc_list: Pointer to descriptor DMA chain head currently in use.
177 * @desc_count: Count of entries within the DMA descriptor chain of EP.
178 * @isoc_chain_num: Number of ISOC chain currently in use - either 0 or 1.
179 * @next_desc: index of next free descriptor in the ISOC chain under SW control.
175 * @total_data: The total number of data bytes done. 180 * @total_data: The total number of data bytes done.
176 * @fifo_size: The size of the FIFO (for periodic IN endpoints) 181 * @fifo_size: The size of the FIFO (for periodic IN endpoints)
177 * @fifo_load: The amount of data loaded into the FIFO (periodic IN) 182 * @fifo_load: The amount of data loaded into the FIFO (periodic IN)
@@ -219,6 +224,13 @@ struct dwc2_hsotg_ep {
219#define TARGET_FRAME_INITIAL 0xFFFFFFFF 224#define TARGET_FRAME_INITIAL 0xFFFFFFFF
220 bool frame_overrun; 225 bool frame_overrun;
221 226
227 dma_addr_t desc_list_dma;
228 struct dwc2_dma_desc *desc_list;
229 u8 desc_count;
230
231 unsigned char isoc_chain_num;
232 unsigned int next_desc;
233
222 char name[10]; 234 char name[10];
223}; 235};
224 236
@@ -286,7 +298,7 @@ enum dwc2_ep0_state {
286 * @otg_ver: OTG version supported 298 * @otg_ver: OTG version supported
287 * 0 - 1.3 (default) 299 * 0 - 1.3 (default)
288 * 1 - 2.0 300 * 1 - 2.0
289 * @dma_enable: Specifies whether to use slave or DMA mode for accessing 301 * @host_dma: Specifies whether to use slave or DMA mode for accessing
290 * the data FIFOs. The driver will automatically detect the 302 * the data FIFOs. The driver will automatically detect the
291 * value for this parameter if none is specified. 303 * value for this parameter if none is specified.
292 * 0 - Slave (always available) 304 * 0 - Slave (always available)
@@ -314,7 +326,8 @@ enum dwc2_ep0_state {
314 * @enable_dynamic_fifo: 0 - Use coreConsultant-specified FIFO size parameters 326 * @enable_dynamic_fifo: 0 - Use coreConsultant-specified FIFO size parameters
315 * 1 - Allow dynamic FIFO sizing (default, if available) 327 * 1 - Allow dynamic FIFO sizing (default, if available)
316 * @en_multiple_tx_fifo: Specifies whether dedicated per-endpoint transmit FIFOs 328 * @en_multiple_tx_fifo: Specifies whether dedicated per-endpoint transmit FIFOs
317 * are enabled 329 * are enabled for non-periodic IN endpoints in device
330 * mode.
318 * @host_rx_fifo_size: Number of 4-byte words in the Rx FIFO in host mode when 331 * @host_rx_fifo_size: Number of 4-byte words in the Rx FIFO in host mode when
319 * dynamic FIFO sizing is enabled 332 * dynamic FIFO sizing is enabled
320 * 16 to 32768 333 * 16 to 32768
@@ -417,6 +430,20 @@ enum dwc2_ep0_state {
417 * needed. 430 * needed.
418 * 0 - No (default) 431 * 0 - No (default)
419 * 1 - Yes 432 * 1 - Yes
433 * @g_dma: Enables gadget dma usage (default: autodetect).
434 * @g_dma_desc: Enables gadget descriptor DMA (default: autodetect).
435 * @g_rx_fifo_size: The periodic rx fifo size for the device, in
436 * DWORDS from 16-32768 (default: 2048 if
437 * possible, otherwise autodetect).
438 * @g_np_tx_fifo_size: The non-periodic tx fifo size for the device in
439 * DWORDS from 16-32768 (default: 1024 if
440 * possible, otherwise autodetect).
441 * @g_tx_fifo_size: An array of TX fifo sizes in dedicated fifo
442 * mode. Each value corresponds to one EP
443 * starting from EP1 (max 15 values). Sizes are
444 * in DWORDS with possible values from from
445 * 16-32768 (default: 256, 256, 256, 256, 768,
446 * 768, 768, 768, 0, 0, 0, 0, 0, 0, 0).
420 * 447 *
421 * The following parameters may be specified when starting the module. These 448 * The following parameters may be specified when starting the module. These
422 * parameters define how the DWC_otg controller should be configured. A 449 * parameters define how the DWC_otg controller should be configured. A
@@ -430,11 +457,18 @@ struct dwc2_core_params {
430 * dwc2_set_all_params! 457 * dwc2_set_all_params!
431 */ 458 */
432 int otg_cap; 459 int otg_cap;
460#define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0
461#define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1
462#define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE 2
463
433 int otg_ver; 464 int otg_ver;
434 int dma_enable;
435 int dma_desc_enable; 465 int dma_desc_enable;
436 int dma_desc_fs_enable; 466 int dma_desc_fs_enable;
437 int speed; 467 int speed;
468#define DWC2_SPEED_PARAM_HIGH 0
469#define DWC2_SPEED_PARAM_FULL 1
470#define DWC2_SPEED_PARAM_LOW 2
471
438 int enable_dynamic_fifo; 472 int enable_dynamic_fifo;
439 int en_multiple_tx_fifo; 473 int en_multiple_tx_fifo;
440 int host_rx_fifo_size; 474 int host_rx_fifo_size;
@@ -444,19 +478,44 @@ struct dwc2_core_params {
444 int max_packet_count; 478 int max_packet_count;
445 int host_channels; 479 int host_channels;
446 int phy_type; 480 int phy_type;
481#define DWC2_PHY_TYPE_PARAM_FS 0
482#define DWC2_PHY_TYPE_PARAM_UTMI 1
483#define DWC2_PHY_TYPE_PARAM_ULPI 2
484
447 int phy_utmi_width; 485 int phy_utmi_width;
448 int phy_ulpi_ddr; 486 int phy_ulpi_ddr;
449 int phy_ulpi_ext_vbus; 487 int phy_ulpi_ext_vbus;
488#define DWC2_PHY_ULPI_INTERNAL_VBUS 0
489#define DWC2_PHY_ULPI_EXTERNAL_VBUS 1
490
450 int i2c_enable; 491 int i2c_enable;
451 int ulpi_fs_ls; 492 int ulpi_fs_ls;
452 int host_support_fs_ls_low_power; 493 int host_support_fs_ls_low_power;
453 int host_ls_low_power_phy_clk; 494 int host_ls_low_power_phy_clk;
495#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
496#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1
497
454 int ts_dline; 498 int ts_dline;
455 int reload_ctl; 499 int reload_ctl;
456 int ahbcfg; 500 int ahbcfg;
457 int uframe_sched; 501 int uframe_sched;
458 int external_id_pin_ctl; 502 int external_id_pin_ctl;
459 int hibernation; 503 int hibernation;
504
505 /*
506 * The following parameters are *only* set via device
507 * properties and cannot be set directly in this structure.
508 */
509
510 /* Host parameters */
511 bool host_dma;
512
513 /* Gadget parameters */
514 bool g_dma;
515 bool g_dma_desc;
516 u16 g_rx_fifo_size;
517 u16 g_np_tx_fifo_size;
518 u32 g_tx_fifo_size[MAX_EPS_CHANNELS];
460}; 519};
461 520
462/** 521/**
@@ -516,10 +575,9 @@ struct dwc2_hw_params {
516 unsigned op_mode:3; 575 unsigned op_mode:3;
517 unsigned arch:2; 576 unsigned arch:2;
518 unsigned dma_desc_enable:1; 577 unsigned dma_desc_enable:1;
519 unsigned dma_desc_fs_enable:1;
520 unsigned enable_dynamic_fifo:1; 578 unsigned enable_dynamic_fifo:1;
521 unsigned en_multiple_tx_fifo:1; 579 unsigned en_multiple_tx_fifo:1;
522 unsigned host_rx_fifo_size:16; 580 unsigned rx_fifo_size:16;
523 unsigned host_nperio_tx_fifo_size:16; 581 unsigned host_nperio_tx_fifo_size:16;
524 unsigned dev_nperio_tx_fifo_size:16; 582 unsigned dev_nperio_tx_fifo_size:16;
525 unsigned host_perio_tx_fifo_size:16; 583 unsigned host_perio_tx_fifo_size:16;
@@ -839,11 +897,13 @@ struct dwc2_hregs_backup {
839 * @ctrl_req: Request for EP0 control packets. 897 * @ctrl_req: Request for EP0 control packets.
840 * @ep0_state: EP0 control transfers state 898 * @ep0_state: EP0 control transfers state
841 * @test_mode: USB test mode requested by the host 899 * @test_mode: USB test mode requested by the host
900 * @setup_desc_dma: EP0 setup stage desc chain DMA address
901 * @setup_desc: EP0 setup stage desc chain pointer
902 * @ctrl_in_desc_dma: EP0 IN data phase desc chain DMA address
903 * @ctrl_in_desc: EP0 IN data phase desc chain pointer
904 * @ctrl_out_desc_dma: EP0 OUT data phase desc chain DMA address
905 * @ctrl_out_desc: EP0 OUT data phase desc chain pointer
842 * @eps: The endpoints being supplied to the gadget framework 906 * @eps: The endpoints being supplied to the gadget framework
843 * @g_using_dma: Indicate if dma usage is enabled
844 * @g_rx_fifo_sz: Contains rx fifo size value
845 * @g_np_g_tx_fifo_sz: Contains Non-Periodic tx fifo size value
846 * @g_tx_fifo_sz: Contains tx fifo size value per endpoints
847 */ 907 */
848struct dwc2_hsotg { 908struct dwc2_hsotg {
849 struct device *dev; 909 struct device *dev;
@@ -851,7 +911,7 @@ struct dwc2_hsotg {
851 /** Params detected from hardware */ 911 /** Params detected from hardware */
852 struct dwc2_hw_params hw_params; 912 struct dwc2_hw_params hw_params;
853 /** Params to actually use */ 913 /** Params to actually use */
854 struct dwc2_core_params *core_params; 914 struct dwc2_core_params params;
855 enum usb_otg_state op_state; 915 enum usb_otg_state op_state;
856 enum usb_dr_mode dr_mode; 916 enum usb_dr_mode dr_mode;
857 unsigned int hcd_enabled:1; 917 unsigned int hcd_enabled:1;
@@ -891,6 +951,8 @@ struct dwc2_hsotg {
891#define DWC2_CORE_REV_2_94a 0x4f54294a 951#define DWC2_CORE_REV_2_94a 0x4f54294a
892#define DWC2_CORE_REV_3_00a 0x4f54300a 952#define DWC2_CORE_REV_3_00a 0x4f54300a
893#define DWC2_CORE_REV_3_10a 0x4f54310a 953#define DWC2_CORE_REV_3_10a 0x4f54310a
954#define DWC2_FS_IOT_REV_1_00a 0x5531100a
955#define DWC2_HS_IOT_REV_1_00a 0x5532100a
894 956
895#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 957#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
896 union dwc2_hcd_internal_flags { 958 union dwc2_hcd_internal_flags {
@@ -986,15 +1048,18 @@ struct dwc2_hsotg {
986 enum dwc2_ep0_state ep0_state; 1048 enum dwc2_ep0_state ep0_state;
987 u8 test_mode; 1049 u8 test_mode;
988 1050
1051 dma_addr_t setup_desc_dma[2];
1052 struct dwc2_dma_desc *setup_desc[2];
1053 dma_addr_t ctrl_in_desc_dma;
1054 struct dwc2_dma_desc *ctrl_in_desc;
1055 dma_addr_t ctrl_out_desc_dma;
1056 struct dwc2_dma_desc *ctrl_out_desc;
1057
989 struct usb_gadget gadget; 1058 struct usb_gadget gadget;
990 unsigned int enabled:1; 1059 unsigned int enabled:1;
991 unsigned int connected:1; 1060 unsigned int connected:1;
992 struct dwc2_hsotg_ep *eps_in[MAX_EPS_CHANNELS]; 1061 struct dwc2_hsotg_ep *eps_in[MAX_EPS_CHANNELS];
993 struct dwc2_hsotg_ep *eps_out[MAX_EPS_CHANNELS]; 1062 struct dwc2_hsotg_ep *eps_out[MAX_EPS_CHANNELS];
994 u32 g_using_dma;
995 u32 g_rx_fifo_sz;
996 u32 g_np_g_tx_fifo_sz;
997 u32 g_tx_fifo_sz[MAX_EPS_CHANNELS];
998#endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */ 1063#endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
999}; 1064};
1000 1065
@@ -1016,6 +1081,22 @@ enum dwc2_halt_status {
1016 DWC2_HC_XFER_URB_DEQUEUE, 1081 DWC2_HC_XFER_URB_DEQUEUE,
1017}; 1082};
1018 1083
1084/* Core version information */
1085static inline bool dwc2_is_iot(struct dwc2_hsotg *hsotg)
1086{
1087 return (hsotg->hw_params.snpsid & 0xfff00000) == 0x55300000;
1088}
1089
1090static inline bool dwc2_is_fs_iot(struct dwc2_hsotg *hsotg)
1091{
1092 return (hsotg->hw_params.snpsid & 0xffff0000) == 0x55310000;
1093}
1094
1095static inline bool dwc2_is_hs_iot(struct dwc2_hsotg *hsotg)
1096{
1097 return (hsotg->hw_params.snpsid & 0xffff0000) == 0x55320000;
1098}
1099
1019/* 1100/*
1020 * The following functions support initialization of the core driver component 1101 * The following functions support initialization of the core driver component
1021 * and the DWC_otg controller 1102 * and the DWC_otg controller
@@ -1025,6 +1106,8 @@ extern int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg);
1025extern int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg); 1106extern int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg);
1026extern int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore); 1107extern int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore);
1027 1108
1109bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, bool host);
1110void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg);
1028void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg); 1111void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg);
1029 1112
1030extern bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg); 1113extern bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg);
@@ -1044,217 +1127,16 @@ extern void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd);
1044/* This function should be called on every hardware interrupt. */ 1127/* This function should be called on every hardware interrupt. */
1045extern irqreturn_t dwc2_handle_common_intr(int irq, void *dev); 1128extern irqreturn_t dwc2_handle_common_intr(int irq, void *dev);
1046 1129
1047/* OTG Core Parameters */ 1130/* The device ID match table */
1048 1131extern const struct of_device_id dwc2_of_match_table[];
1049/*
1050 * Specifies the OTG capabilities. The driver will automatically
1051 * detect the value for this parameter if none is specified.
1052 * 0 - HNP and SRP capable (default)
1053 * 1 - SRP Only capable
1054 * 2 - No HNP/SRP capable
1055 */
1056extern void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val);
1057#define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0
1058#define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1
1059#define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE 2
1060
1061/*
1062 * Specifies whether to use slave or DMA mode for accessing the data
1063 * FIFOs. The driver will automatically detect the value for this
1064 * parameter if none is specified.
1065 * 0 - Slave
1066 * 1 - DMA (default, if available)
1067 */
1068extern void dwc2_set_param_dma_enable(struct dwc2_hsotg *hsotg, int val);
1069
1070/*
1071 * When DMA mode is enabled specifies whether to use
1072 * address DMA or DMA Descritor mode for accessing the data
1073 * FIFOs in device mode. The driver will automatically detect
1074 * the value for this parameter if none is specified.
1075 * 0 - address DMA
1076 * 1 - DMA Descriptor(default, if available)
1077 */
1078extern void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val);
1079
1080/*
1081 * When DMA mode is enabled specifies whether to use
1082 * address DMA or DMA Descritor mode with full speed devices
1083 * for accessing the data FIFOs in host mode.
1084 * 0 - address DMA
1085 * 1 - FS DMA Descriptor(default, if available)
1086 */
1087extern void dwc2_set_param_dma_desc_fs_enable(struct dwc2_hsotg *hsotg,
1088 int val);
1089
1090/*
1091 * Specifies the maximum speed of operation in host and device mode.
1092 * The actual speed depends on the speed of the attached device and
1093 * the value of phy_type. The actual speed depends on the speed of the
1094 * attached device.
1095 * 0 - High Speed (default)
1096 * 1 - Full Speed
1097 */
1098extern void dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val);
1099#define DWC2_SPEED_PARAM_HIGH 0
1100#define DWC2_SPEED_PARAM_FULL 1
1101
1102/*
1103 * Specifies whether low power mode is supported when attached
1104 * to a Full Speed or Low Speed device in host mode.
1105 *
1106 * 0 - Don't support low power mode (default)
1107 * 1 - Support low power mode
1108 */
1109extern void dwc2_set_param_host_support_fs_ls_low_power(
1110 struct dwc2_hsotg *hsotg, int val);
1111
1112/*
1113 * Specifies the PHY clock rate in low power mode when connected to a
1114 * Low Speed device in host mode. This parameter is applicable only if
1115 * HOST_SUPPORT_FS_LS_LOW_POWER is enabled. If PHY_TYPE is set to FS
1116 * then defaults to 6 MHZ otherwise 48 MHZ.
1117 *
1118 * 0 - 48 MHz
1119 * 1 - 6 MHz
1120 */
1121extern void dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg,
1122 int val);
1123#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
1124#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1
1125
1126/*
1127 * 0 - Use cC FIFO size parameters
1128 * 1 - Allow dynamic FIFO sizing (default)
1129 */
1130extern void dwc2_set_param_enable_dynamic_fifo(struct dwc2_hsotg *hsotg,
1131 int val);
1132
1133/*
1134 * Number of 4-byte words in the Rx FIFO in host mode when dynamic
1135 * FIFO sizing is enabled.
1136 * 16 to 32768 (default 1024)
1137 */
1138extern void dwc2_set_param_host_rx_fifo_size(struct dwc2_hsotg *hsotg, int val);
1139
1140/*
1141 * Number of 4-byte words in the non-periodic Tx FIFO in host mode
1142 * when Dynamic FIFO sizing is enabled in the core.
1143 * 16 to 32768 (default 256)
1144 */
1145extern void dwc2_set_param_host_nperio_tx_fifo_size(struct dwc2_hsotg *hsotg,
1146 int val);
1147
1148/*
1149 * Number of 4-byte words in the host periodic Tx FIFO when dynamic
1150 * FIFO sizing is enabled.
1151 * 16 to 32768 (default 256)
1152 */
1153extern void dwc2_set_param_host_perio_tx_fifo_size(struct dwc2_hsotg *hsotg,
1154 int val);
1155
1156/*
1157 * The maximum transfer size supported in bytes.
1158 * 2047 to 65,535 (default 65,535)
1159 */
1160extern void dwc2_set_param_max_transfer_size(struct dwc2_hsotg *hsotg, int val);
1161
1162/*
1163 * The maximum number of packets in a transfer.
1164 * 15 to 511 (default 511)
1165 */
1166extern void dwc2_set_param_max_packet_count(struct dwc2_hsotg *hsotg, int val);
1167
1168/*
1169 * The number of host channel registers to use.
1170 * 1 to 16 (default 11)
1171 * Note: The FPGA configuration supports a maximum of 11 host channels.
1172 */
1173extern void dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val);
1174
1175/*
1176 * Specifies the type of PHY interface to use. By default, the driver
1177 * will automatically detect the phy_type.
1178 *
1179 * 0 - Full Speed PHY
1180 * 1 - UTMI+ (default)
1181 * 2 - ULPI
1182 */
1183extern void dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val);
1184#define DWC2_PHY_TYPE_PARAM_FS 0
1185#define DWC2_PHY_TYPE_PARAM_UTMI 1
1186#define DWC2_PHY_TYPE_PARAM_ULPI 2
1187
1188/*
1189 * Specifies the UTMI+ Data Width. This parameter is
1190 * applicable for a PHY_TYPE of UTMI+ or ULPI. (For a ULPI
1191 * PHY_TYPE, this parameter indicates the data width between
1192 * the MAC and the ULPI Wrapper.) Also, this parameter is
1193 * applicable only if the OTG_HSPHY_WIDTH cC parameter was set
1194 * to "8 and 16 bits", meaning that the core has been
1195 * configured to work at either data path width.
1196 *
1197 * 8 or 16 bits (default 16)
1198 */
1199extern void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val);
1200
1201/*
1202 * Specifies whether the ULPI operates at double or single
1203 * data rate. This parameter is only applicable if PHY_TYPE is
1204 * ULPI.
1205 *
1206 * 0 - single data rate ULPI interface with 8 bit wide data
1207 * bus (default)
1208 * 1 - double data rate ULPI interface with 4 bit wide data
1209 * bus
1210 */
1211extern void dwc2_set_param_phy_ulpi_ddr(struct dwc2_hsotg *hsotg, int val);
1212
1213/*
1214 * Specifies whether to use the internal or external supply to
1215 * drive the vbus with a ULPI phy.
1216 */
1217extern void dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val);
1218#define DWC2_PHY_ULPI_INTERNAL_VBUS 0
1219#define DWC2_PHY_ULPI_EXTERNAL_VBUS 1
1220
1221/*
1222 * Specifies whether to use the I2Cinterface for full speed PHY. This
1223 * parameter is only applicable if PHY_TYPE is FS.
1224 * 0 - No (default)
1225 * 1 - Yes
1226 */
1227extern void dwc2_set_param_i2c_enable(struct dwc2_hsotg *hsotg, int val);
1228
1229extern void dwc2_set_param_ulpi_fs_ls(struct dwc2_hsotg *hsotg, int val);
1230
1231extern void dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val);
1232
1233/*
1234 * Specifies whether dedicated transmit FIFOs are
1235 * enabled for non periodic IN endpoints in device mode
1236 * 0 - No
1237 * 1 - Yes
1238 */
1239extern void dwc2_set_param_en_multiple_tx_fifo(struct dwc2_hsotg *hsotg,
1240 int val);
1241
1242extern void dwc2_set_param_reload_ctl(struct dwc2_hsotg *hsotg, int val);
1243
1244extern void dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val);
1245
1246extern void dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val);
1247
1248extern void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
1249 const struct dwc2_core_params *params);
1250
1251extern void dwc2_set_all_params(struct dwc2_core_params *params, int value);
1252
1253extern int dwc2_get_hwparams(struct dwc2_hsotg *hsotg);
1254 1132
1255extern int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg); 1133extern int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg);
1256extern int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg); 1134extern int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg);
1257 1135
1136/* Parameters */
1137int dwc2_get_hwparams(struct dwc2_hsotg *hsotg);
1138int dwc2_init_params(struct dwc2_hsotg *hsotg);
1139
1258/* 1140/*
1259 * The following functions check the controller's OTG operation mode 1141 * The following functions check the controller's OTG operation mode
1260 * capability (GHWCFG2.OTG_MODE). 1142 * capability (GHWCFG2.OTG_MODE).
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index d85c5c9f96c1..5b228ba6045f 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -159,9 +159,9 @@ static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
159 " ++OTG Interrupt: Session Request Success Status Change++\n"); 159 " ++OTG Interrupt: Session Request Success Status Change++\n");
160 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL); 160 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
161 if (gotgctl & GOTGCTL_SESREQSCS) { 161 if (gotgctl & GOTGCTL_SESREQSCS) {
162 if (hsotg->core_params->phy_type == 162 if (hsotg->params.phy_type ==
163 DWC2_PHY_TYPE_PARAM_FS 163 DWC2_PHY_TYPE_PARAM_FS
164 && hsotg->core_params->i2c_enable > 0) { 164 && hsotg->params.i2c_enable > 0) {
165 hsotg->srp_success = 1; 165 hsotg->srp_success = 1;
166 } else { 166 } else {
167 /* Clear Session Request */ 167 /* Clear Session Request */
@@ -370,7 +370,7 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
370 /* Change to L0 state */ 370 /* Change to L0 state */
371 hsotg->lx_state = DWC2_L0; 371 hsotg->lx_state = DWC2_L0;
372 } else { 372 } else {
373 if (hsotg->core_params->hibernation) 373 if (hsotg->params.hibernation)
374 return; 374 return;
375 375
376 if (hsotg->lx_state != DWC2_L1) { 376 if (hsotg->lx_state != DWC2_L1) {
diff --git a/drivers/usb/dwc2/debugfs.c b/drivers/usb/dwc2/debugfs.c
index 55d91f24f94a..0a130916a91c 100644
--- a/drivers/usb/dwc2/debugfs.c
+++ b/drivers/usb/dwc2/debugfs.c
@@ -213,7 +213,7 @@ static int fifo_show(struct seq_file *seq, void *v)
213 val = dwc2_readl(regs + GNPTXFSIZ); 213 val = dwc2_readl(regs + GNPTXFSIZ);
214 seq_printf(seq, "NPTXFIFO: Size %d, Start 0x%08x\n", 214 seq_printf(seq, "NPTXFIFO: Size %d, Start 0x%08x\n",
215 val >> FIFOSIZE_DEPTH_SHIFT, 215 val >> FIFOSIZE_DEPTH_SHIFT,
216 val & FIFOSIZE_DEPTH_MASK); 216 val & FIFOSIZE_STARTADDR_MASK);
217 217
218 seq_puts(seq, "\nPeriodic TXFIFOs:\n"); 218 seq_puts(seq, "\nPeriodic TXFIFOs:\n");
219 219
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 24fbebc9b409..b95930f20d90 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -93,7 +93,18 @@ static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg);
93 */ 93 */
94static inline bool using_dma(struct dwc2_hsotg *hsotg) 94static inline bool using_dma(struct dwc2_hsotg *hsotg)
95{ 95{
96 return hsotg->g_using_dma; 96 return hsotg->params.g_dma;
97}
98
99/*
100 * using_desc_dma - return the descriptor DMA status of the driver.
101 * @hsotg: The driver state.
102 *
103 * Return true if we're using descriptor DMA.
104 */
105static inline bool using_desc_dma(struct dwc2_hsotg *hsotg)
106{
107 return hsotg->params.g_dma_desc;
97} 108}
98 109
99/** 110/**
@@ -190,16 +201,17 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
190 unsigned int addr; 201 unsigned int addr;
191 int timeout; 202 int timeout;
192 u32 val; 203 u32 val;
204 u32 *txfsz = hsotg->params.g_tx_fifo_size;
193 205
194 /* Reset fifo map if not correctly cleared during previous session */ 206 /* Reset fifo map if not correctly cleared during previous session */
195 WARN_ON(hsotg->fifo_map); 207 WARN_ON(hsotg->fifo_map);
196 hsotg->fifo_map = 0; 208 hsotg->fifo_map = 0;
197 209
198 /* set RX/NPTX FIFO sizes */ 210 /* set RX/NPTX FIFO sizes */
199 dwc2_writel(hsotg->g_rx_fifo_sz, hsotg->regs + GRXFSIZ); 211 dwc2_writel(hsotg->params.g_rx_fifo_size, hsotg->regs + GRXFSIZ);
200 dwc2_writel((hsotg->g_rx_fifo_sz << FIFOSIZE_STARTADDR_SHIFT) | 212 dwc2_writel((hsotg->params.g_rx_fifo_size << FIFOSIZE_STARTADDR_SHIFT) |
201 (hsotg->g_np_g_tx_fifo_sz << FIFOSIZE_DEPTH_SHIFT), 213 (hsotg->params.g_np_tx_fifo_size << FIFOSIZE_DEPTH_SHIFT),
202 hsotg->regs + GNPTXFSIZ); 214 hsotg->regs + GNPTXFSIZ);
203 215
204 /* 216 /*
205 * arange all the rest of the TX FIFOs, as some versions of this 217 * arange all the rest of the TX FIFOs, as some versions of this
@@ -209,7 +221,7 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
209 */ 221 */
210 222
211 /* start at the end of the GNPTXFSIZ, rounded up */ 223 /* start at the end of the GNPTXFSIZ, rounded up */
212 addr = hsotg->g_rx_fifo_sz + hsotg->g_np_g_tx_fifo_sz; 224 addr = hsotg->params.g_rx_fifo_size + hsotg->params.g_np_tx_fifo_size;
213 225
214 /* 226 /*
215 * Configure fifos sizes from provided configuration and assign 227 * Configure fifos sizes from provided configuration and assign
@@ -217,15 +229,16 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
217 * given endpoint. 229 * given endpoint.
218 */ 230 */
219 for (ep = 1; ep < MAX_EPS_CHANNELS; ep++) { 231 for (ep = 1; ep < MAX_EPS_CHANNELS; ep++) {
220 if (!hsotg->g_tx_fifo_sz[ep]) 232 if (!txfsz[ep])
221 continue; 233 continue;
222 val = addr; 234 val = addr;
223 val |= hsotg->g_tx_fifo_sz[ep] << FIFOSIZE_DEPTH_SHIFT; 235 val |= txfsz[ep] << FIFOSIZE_DEPTH_SHIFT;
224 WARN_ONCE(addr + hsotg->g_tx_fifo_sz[ep] > hsotg->fifo_mem, 236 WARN_ONCE(addr + txfsz[ep] > hsotg->fifo_mem,
225 "insufficient fifo memory"); 237 "insufficient fifo memory");
226 addr += hsotg->g_tx_fifo_sz[ep]; 238 addr += txfsz[ep];
227 239
228 dwc2_writel(val, hsotg->regs + DPTXFSIZN(ep)); 240 dwc2_writel(val, hsotg->regs + DPTXFSIZN(ep));
241 val = dwc2_readl(hsotg->regs + DPTXFSIZN(ep));
229 } 242 }
230 243
231 /* 244 /*
@@ -303,12 +316,55 @@ static void dwc2_hsotg_unmap_dma(struct dwc2_hsotg *hsotg,
303 struct dwc2_hsotg_req *hs_req) 316 struct dwc2_hsotg_req *hs_req)
304{ 317{
305 struct usb_request *req = &hs_req->req; 318 struct usb_request *req = &hs_req->req;
319 usb_gadget_unmap_request(&hsotg->gadget, req, hs_ep->dir_in);
320}
306 321
307 /* ignore this if we're not moving any data */ 322/*
308 if (hs_req->req.length == 0) 323 * dwc2_gadget_alloc_ctrl_desc_chains - allocate DMA descriptor chains
309 return; 324 * for Control endpoint
325 * @hsotg: The device state.
326 *
327 * This function will allocate 4 descriptor chains for EP 0: 2 for
328 * Setup stage, per one for IN and OUT data/status transactions.
329 */
330static int dwc2_gadget_alloc_ctrl_desc_chains(struct dwc2_hsotg *hsotg)
331{
332 hsotg->setup_desc[0] =
333 dmam_alloc_coherent(hsotg->dev,
334 sizeof(struct dwc2_dma_desc),
335 &hsotg->setup_desc_dma[0],
336 GFP_KERNEL);
337 if (!hsotg->setup_desc[0])
338 goto fail;
339
340 hsotg->setup_desc[1] =
341 dmam_alloc_coherent(hsotg->dev,
342 sizeof(struct dwc2_dma_desc),
343 &hsotg->setup_desc_dma[1],
344 GFP_KERNEL);
345 if (!hsotg->setup_desc[1])
346 goto fail;
347
348 hsotg->ctrl_in_desc =
349 dmam_alloc_coherent(hsotg->dev,
350 sizeof(struct dwc2_dma_desc),
351 &hsotg->ctrl_in_desc_dma,
352 GFP_KERNEL);
353 if (!hsotg->ctrl_in_desc)
354 goto fail;
355
356 hsotg->ctrl_out_desc =
357 dmam_alloc_coherent(hsotg->dev,
358 sizeof(struct dwc2_dma_desc),
359 &hsotg->ctrl_out_desc_dma,
360 GFP_KERNEL);
361 if (!hsotg->ctrl_out_desc)
362 goto fail;
310 363
311 usb_gadget_unmap_request(&hsotg->gadget, req, hs_ep->dir_in); 364 return 0;
365
366fail:
367 return -ENOMEM;
312} 368}
313 369
314/** 370/**
@@ -541,6 +597,273 @@ static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg)
541} 597}
542 598
543/** 599/**
600 * dwc2_gadget_get_chain_limit - get the maximum data payload value of the
601 * DMA descriptor chain prepared for specific endpoint
602 * @hs_ep: The endpoint
603 *
604 * Return the maximum data that can be queued in one go on a given endpoint
605 * depending on its descriptor chain capacity so that transfers that
606 * are too long can be split.
607 */
608static unsigned int dwc2_gadget_get_chain_limit(struct dwc2_hsotg_ep *hs_ep)
609{
610 int is_isoc = hs_ep->isochronous;
611 unsigned int maxsize;
612
613 if (is_isoc)
614 maxsize = hs_ep->dir_in ? DEV_DMA_ISOC_TX_NBYTES_LIMIT :
615 DEV_DMA_ISOC_RX_NBYTES_LIMIT;
616 else
617 maxsize = DEV_DMA_NBYTES_LIMIT;
618
619 /* Above size of one descriptor was chosen, multiple it */
620 maxsize *= MAX_DMA_DESC_NUM_GENERIC;
621
622 return maxsize;
623}
624
625/*
626 * dwc2_gadget_get_desc_params - get DMA descriptor parameters.
627 * @hs_ep: The endpoint
628 * @mask: RX/TX bytes mask to be defined
629 *
630 * Returns maximum data payload for one descriptor after analyzing endpoint
631 * characteristics.
632 * DMA descriptor transfer bytes limit depends on EP type:
633 * Control out - MPS,
634 * Isochronous - descriptor rx/tx bytes bitfield limit,
635 * Control In/Bulk/Interrupt - multiple of mps. This will allow to not
636 * have concatenations from various descriptors within one packet.
637 *
638 * Selects corresponding mask for RX/TX bytes as well.
639 */
640static u32 dwc2_gadget_get_desc_params(struct dwc2_hsotg_ep *hs_ep, u32 *mask)
641{
642 u32 mps = hs_ep->ep.maxpacket;
643 int dir_in = hs_ep->dir_in;
644 u32 desc_size = 0;
645
646 if (!hs_ep->index && !dir_in) {
647 desc_size = mps;
648 *mask = DEV_DMA_NBYTES_MASK;
649 } else if (hs_ep->isochronous) {
650 if (dir_in) {
651 desc_size = DEV_DMA_ISOC_TX_NBYTES_LIMIT;
652 *mask = DEV_DMA_ISOC_TX_NBYTES_MASK;
653 } else {
654 desc_size = DEV_DMA_ISOC_RX_NBYTES_LIMIT;
655 *mask = DEV_DMA_ISOC_RX_NBYTES_MASK;
656 }
657 } else {
658 desc_size = DEV_DMA_NBYTES_LIMIT;
659 *mask = DEV_DMA_NBYTES_MASK;
660
661 /* Round down desc_size to be mps multiple */
662 desc_size -= desc_size % mps;
663 }
664
665 return desc_size;
666}
667
668/*
669 * dwc2_gadget_config_nonisoc_xfer_ddma - prepare non ISOC DMA desc chain.
670 * @hs_ep: The endpoint
671 * @dma_buff: DMA address to use
672 * @len: Length of the transfer
673 *
674 * This function will iterate over descriptor chain and fill its entries
675 * with corresponding information based on transfer data.
676 */
677static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep,
678 dma_addr_t dma_buff,
679 unsigned int len)
680{
681 struct dwc2_hsotg *hsotg = hs_ep->parent;
682 int dir_in = hs_ep->dir_in;
683 struct dwc2_dma_desc *desc = hs_ep->desc_list;
684 u32 mps = hs_ep->ep.maxpacket;
685 u32 maxsize = 0;
686 u32 offset = 0;
687 u32 mask = 0;
688 int i;
689
690 maxsize = dwc2_gadget_get_desc_params(hs_ep, &mask);
691
692 hs_ep->desc_count = (len / maxsize) +
693 ((len % maxsize) ? 1 : 0);
694 if (len == 0)
695 hs_ep->desc_count = 1;
696
697 for (i = 0; i < hs_ep->desc_count; ++i) {
698 desc->status = 0;
699 desc->status |= (DEV_DMA_BUFF_STS_HBUSY
700 << DEV_DMA_BUFF_STS_SHIFT);
701
702 if (len > maxsize) {
703 if (!hs_ep->index && !dir_in)
704 desc->status |= (DEV_DMA_L | DEV_DMA_IOC);
705
706 desc->status |= (maxsize <<
707 DEV_DMA_NBYTES_SHIFT & mask);
708 desc->buf = dma_buff + offset;
709
710 len -= maxsize;
711 offset += maxsize;
712 } else {
713 desc->status |= (DEV_DMA_L | DEV_DMA_IOC);
714
715 if (dir_in)
716 desc->status |= (len % mps) ? DEV_DMA_SHORT :
717 ((hs_ep->send_zlp) ? DEV_DMA_SHORT : 0);
718 if (len > maxsize)
719 dev_err(hsotg->dev, "wrong len %d\n", len);
720
721 desc->status |=
722 len << DEV_DMA_NBYTES_SHIFT & mask;
723 desc->buf = dma_buff + offset;
724 }
725
726 desc->status &= ~DEV_DMA_BUFF_STS_MASK;
727 desc->status |= (DEV_DMA_BUFF_STS_HREADY
728 << DEV_DMA_BUFF_STS_SHIFT);
729 desc++;
730 }
731}
732
733/*
734 * dwc2_gadget_fill_isoc_desc - fills next isochronous descriptor in chain.
735 * @hs_ep: The isochronous endpoint.
736 * @dma_buff: usb requests dma buffer.
737 * @len: usb request transfer length.
738 *
739 * Finds out index of first free entry either in the bottom or up half of
740 * descriptor chain depend on which is under SW control and not processed
741 * by HW. Then fills that descriptor with the data of the arrived usb request,
742 * frame info, sets Last and IOC bits increments next_desc. If filled
743 * descriptor is not the first one, removes L bit from the previous descriptor
744 * status.
745 */
746static int dwc2_gadget_fill_isoc_desc(struct dwc2_hsotg_ep *hs_ep,
747 dma_addr_t dma_buff, unsigned int len)
748{
749 struct dwc2_dma_desc *desc;
750 struct dwc2_hsotg *hsotg = hs_ep->parent;
751 u32 index;
752 u32 maxsize = 0;
753 u32 mask = 0;
754
755 maxsize = dwc2_gadget_get_desc_params(hs_ep, &mask);
756 if (len > maxsize) {
757 dev_err(hsotg->dev, "wrong len %d\n", len);
758 return -EINVAL;
759 }
760
761 /*
762 * If SW has already filled half of chain, then return and wait for
763 * the other chain to be processed by HW.
764 */
765 if (hs_ep->next_desc == MAX_DMA_DESC_NUM_GENERIC / 2)
766 return -EBUSY;
767
768 /* Increment frame number by interval for IN */
769 if (hs_ep->dir_in)
770 dwc2_gadget_incr_frame_num(hs_ep);
771
772 index = (MAX_DMA_DESC_NUM_GENERIC / 2) * hs_ep->isoc_chain_num +
773 hs_ep->next_desc;
774
775 /* Sanity check of calculated index */
776 if ((hs_ep->isoc_chain_num && index > MAX_DMA_DESC_NUM_GENERIC) ||
777 (!hs_ep->isoc_chain_num && index > MAX_DMA_DESC_NUM_GENERIC / 2)) {
778 dev_err(hsotg->dev, "wrong index %d for iso chain\n", index);
779 return -EINVAL;
780 }
781
782 desc = &hs_ep->desc_list[index];
783
784 /* Clear L bit of previous desc if more than one entries in the chain */
785 if (hs_ep->next_desc)
786 hs_ep->desc_list[index - 1].status &= ~DEV_DMA_L;
787
788 dev_dbg(hsotg->dev, "%s: Filling ep %d, dir %s isoc desc # %d\n",
789 __func__, hs_ep->index, hs_ep->dir_in ? "in" : "out", index);
790
791 desc->status = 0;
792 desc->status |= (DEV_DMA_BUFF_STS_HBUSY << DEV_DMA_BUFF_STS_SHIFT);
793
794 desc->buf = dma_buff;
795 desc->status |= (DEV_DMA_L | DEV_DMA_IOC |
796 ((len << DEV_DMA_NBYTES_SHIFT) & mask));
797
798 if (hs_ep->dir_in) {
799 desc->status |= ((hs_ep->mc << DEV_DMA_ISOC_PID_SHIFT) &
800 DEV_DMA_ISOC_PID_MASK) |
801 ((len % hs_ep->ep.maxpacket) ?
802 DEV_DMA_SHORT : 0) |
803 ((hs_ep->target_frame <<
804 DEV_DMA_ISOC_FRNUM_SHIFT) &
805 DEV_DMA_ISOC_FRNUM_MASK);
806 }
807
808 desc->status &= ~DEV_DMA_BUFF_STS_MASK;
809 desc->status |= (DEV_DMA_BUFF_STS_HREADY << DEV_DMA_BUFF_STS_SHIFT);
810
811 /* Update index of last configured entry in the chain */
812 hs_ep->next_desc++;
813
814 return 0;
815}
816
817/*
818 * dwc2_gadget_start_isoc_ddma - start isochronous transfer in DDMA
819 * @hs_ep: The isochronous endpoint.
820 *
821 * Prepare first descriptor chain for isochronous endpoints. Afterwards
822 * write DMA address to HW and enable the endpoint.
823 *
824 * Switch between descriptor chains via isoc_chain_num to give SW opportunity
825 * to prepare second descriptor chain while first one is being processed by HW.
826 */
827static void dwc2_gadget_start_isoc_ddma(struct dwc2_hsotg_ep *hs_ep)
828{
829 struct dwc2_hsotg *hsotg = hs_ep->parent;
830 struct dwc2_hsotg_req *hs_req, *treq;
831 int index = hs_ep->index;
832 int ret;
833 u32 dma_reg;
834 u32 depctl;
835 u32 ctrl;
836
837 if (list_empty(&hs_ep->queue)) {
838 dev_dbg(hsotg->dev, "%s: No requests in queue\n", __func__);
839 return;
840 }
841
842 list_for_each_entry_safe(hs_req, treq, &hs_ep->queue, queue) {
843 ret = dwc2_gadget_fill_isoc_desc(hs_ep, hs_req->req.dma,
844 hs_req->req.length);
845 if (ret) {
846 dev_dbg(hsotg->dev, "%s: desc chain full\n", __func__);
847 break;
848 }
849 }
850
851 depctl = hs_ep->dir_in ? DIEPCTL(index) : DOEPCTL(index);
852 dma_reg = hs_ep->dir_in ? DIEPDMA(index) : DOEPDMA(index);
853
854 /* write descriptor chain address to control register */
855 dwc2_writel(hs_ep->desc_list_dma, hsotg->regs + dma_reg);
856
857 ctrl = dwc2_readl(hsotg->regs + depctl);
858 ctrl |= DXEPCTL_EPENA | DXEPCTL_CNAK;
859 dwc2_writel(ctrl, hsotg->regs + depctl);
860
861 /* Switch ISOC descriptor chain number being processed by SW*/
862 hs_ep->isoc_chain_num = (hs_ep->isoc_chain_num ^ 1) & 0x1;
863 hs_ep->next_desc = 0;
864}
865
866/**
544 * dwc2_hsotg_start_req - start a USB request from an endpoint's queue 867 * dwc2_hsotg_start_req - start a USB request from an endpoint's queue
545 * @hsotg: The controller state. 868 * @hsotg: The controller state.
546 * @hs_ep: The endpoint to process a request for 869 * @hs_ep: The endpoint to process a request for
@@ -565,6 +888,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
565 unsigned length; 888 unsigned length;
566 unsigned packets; 889 unsigned packets;
567 unsigned maxreq; 890 unsigned maxreq;
891 unsigned int dma_reg;
568 892
569 if (index != 0) { 893 if (index != 0) {
570 if (hs_ep->req && !continuing) { 894 if (hs_ep->req && !continuing) {
@@ -579,6 +903,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
579 } 903 }
580 } 904 }
581 905
906 dma_reg = dir_in ? DIEPDMA(index) : DOEPDMA(index);
582 epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); 907 epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index);
583 epsize_reg = dir_in ? DIEPTSIZ(index) : DOEPTSIZ(index); 908 epsize_reg = dir_in ? DIEPTSIZ(index) : DOEPTSIZ(index);
584 909
@@ -598,7 +923,11 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
598 dev_dbg(hsotg->dev, "ureq->length:%d ureq->actual:%d\n", 923 dev_dbg(hsotg->dev, "ureq->length:%d ureq->actual:%d\n",
599 ureq->length, ureq->actual); 924 ureq->length, ureq->actual);
600 925
601 maxreq = get_ep_limit(hs_ep); 926 if (!using_desc_dma(hsotg))
927 maxreq = get_ep_limit(hs_ep);
928 else
929 maxreq = dwc2_gadget_get_chain_limit(hs_ep);
930
602 if (length > maxreq) { 931 if (length > maxreq) {
603 int round = maxreq % hs_ep->ep.maxpacket; 932 int round = maxreq % hs_ep->ep.maxpacket;
604 933
@@ -650,22 +979,51 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
650 /* store the request as the current one we're doing */ 979 /* store the request as the current one we're doing */
651 hs_ep->req = hs_req; 980 hs_ep->req = hs_req;
652 981
653 /* write size / packets */ 982 if (using_desc_dma(hsotg)) {
654 dwc2_writel(epsize, hsotg->regs + epsize_reg); 983 u32 offset = 0;
984 u32 mps = hs_ep->ep.maxpacket;
655 985
656 if (using_dma(hsotg) && !continuing) { 986 /* Adjust length: EP0 - MPS, other OUT EPs - multiple of MPS */
657 unsigned int dma_reg; 987 if (!dir_in) {
988 if (!index)
989 length = mps;
990 else if (length % mps)
991 length += (mps - (length % mps));
992 }
658 993
659 /* 994 /*
660 * write DMA address to control register, buffer already 995 * If more data to send, adjust DMA for EP0 out data stage.
661 * synced by dwc2_hsotg_ep_queue(). 996 * ureq->dma stays unchanged, hence increment it by already
997 * passed passed data count before starting new transaction.
662 */ 998 */
999 if (!index && hsotg->ep0_state == DWC2_EP0_DATA_OUT &&
1000 continuing)
1001 offset = ureq->actual;
663 1002
664 dma_reg = dir_in ? DIEPDMA(index) : DOEPDMA(index); 1003 /* Fill DDMA chain entries */
665 dwc2_writel(ureq->dma, hsotg->regs + dma_reg); 1004 dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq->dma + offset,
1005 length);
666 1006
667 dev_dbg(hsotg->dev, "%s: %pad => 0x%08x\n", 1007 /* write descriptor chain address to control register */
668 __func__, &ureq->dma, dma_reg); 1008 dwc2_writel(hs_ep->desc_list_dma, hsotg->regs + dma_reg);
1009
1010 dev_dbg(hsotg->dev, "%s: %08x pad => 0x%08x\n",
1011 __func__, (u32)hs_ep->desc_list_dma, dma_reg);
1012 } else {
1013 /* write size / packets */
1014 dwc2_writel(epsize, hsotg->regs + epsize_reg);
1015
1016 if (using_dma(hsotg) && !continuing && (length != 0)) {
1017 /*
1018 * write DMA address to control register, buffer
1019 * already synced by dwc2_hsotg_ep_queue().
1020 */
1021
1022 dwc2_writel(ureq->dma, hsotg->regs + dma_reg);
1023
1024 dev_dbg(hsotg->dev, "%s: %pad => 0x%08x\n",
1025 __func__, &ureq->dma, dma_reg);
1026 }
669 } 1027 }
670 1028
671 if (hs_ep->isochronous && hs_ep->interval == 1) { 1029 if (hs_ep->isochronous && hs_ep->interval == 1) {
@@ -738,13 +1096,8 @@ static int dwc2_hsotg_map_dma(struct dwc2_hsotg *hsotg,
738 struct dwc2_hsotg_ep *hs_ep, 1096 struct dwc2_hsotg_ep *hs_ep,
739 struct usb_request *req) 1097 struct usb_request *req)
740{ 1098{
741 struct dwc2_hsotg_req *hs_req = our_req(req);
742 int ret; 1099 int ret;
743 1100
744 /* if the length is zero, ignore the DMA data */
745 if (hs_req->req.length == 0)
746 return 0;
747
748 ret = usb_gadget_map_request(&hsotg->gadget, req, hs_ep->dir_in); 1101 ret = usb_gadget_map_request(&hsotg->gadget, req, hs_ep->dir_in);
749 if (ret) 1102 if (ret)
750 goto dma_error; 1103 goto dma_error;
@@ -835,6 +1188,41 @@ static bool dwc2_gadget_target_frame_elapsed(struct dwc2_hsotg_ep *hs_ep)
835 return false; 1188 return false;
836} 1189}
837 1190
1191/*
1192 * dwc2_gadget_set_ep0_desc_chain - Set EP's desc chain pointers
1193 * @hsotg: The driver state
1194 * @hs_ep: the ep descriptor chain is for
1195 *
1196 * Called to update EP0 structure's pointers depend on stage of
1197 * control transfer.
1198 */
1199static int dwc2_gadget_set_ep0_desc_chain(struct dwc2_hsotg *hsotg,
1200 struct dwc2_hsotg_ep *hs_ep)
1201{
1202 switch (hsotg->ep0_state) {
1203 case DWC2_EP0_SETUP:
1204 case DWC2_EP0_STATUS_OUT:
1205 hs_ep->desc_list = hsotg->setup_desc[0];
1206 hs_ep->desc_list_dma = hsotg->setup_desc_dma[0];
1207 break;
1208 case DWC2_EP0_DATA_IN:
1209 case DWC2_EP0_STATUS_IN:
1210 hs_ep->desc_list = hsotg->ctrl_in_desc;
1211 hs_ep->desc_list_dma = hsotg->ctrl_in_desc_dma;
1212 break;
1213 case DWC2_EP0_DATA_OUT:
1214 hs_ep->desc_list = hsotg->ctrl_out_desc;
1215 hs_ep->desc_list_dma = hsotg->ctrl_out_desc_dma;
1216 break;
1217 default:
1218 dev_err(hsotg->dev, "invalid EP 0 state in queue %d\n",
1219 hsotg->ep0_state);
1220 return -EINVAL;
1221 }
1222
1223 return 0;
1224}
1225
838static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req, 1226static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req,
839 gfp_t gfp_flags) 1227 gfp_t gfp_flags)
840{ 1228{
@@ -870,10 +1258,32 @@ static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req,
870 if (ret) 1258 if (ret)
871 return ret; 1259 return ret;
872 } 1260 }
1261 /* If using descriptor DMA configure EP0 descriptor chain pointers */
1262 if (using_desc_dma(hs) && !hs_ep->index) {
1263 ret = dwc2_gadget_set_ep0_desc_chain(hs, hs_ep);
1264 if (ret)
1265 return ret;
1266 }
873 1267
874 first = list_empty(&hs_ep->queue); 1268 first = list_empty(&hs_ep->queue);
875 list_add_tail(&hs_req->queue, &hs_ep->queue); 1269 list_add_tail(&hs_req->queue, &hs_ep->queue);
876 1270
1271 /*
1272 * Handle DDMA isochronous transfers separately - just add new entry
1273 * to the half of descriptor chain that is not processed by HW.
1274 * Transfer will be started once SW gets either one of NAK or
1275 * OutTknEpDis interrupts.
1276 */
1277 if (using_desc_dma(hs) && hs_ep->isochronous &&
1278 hs_ep->target_frame != TARGET_FRAME_INITIAL) {
1279 ret = dwc2_gadget_fill_isoc_desc(hs_ep, hs_req->req.dma,
1280 hs_req->req.length);
1281 if (ret)
1282 dev_dbg(hs->dev, "%s: ISO desc chain full\n", __func__);
1283
1284 return 0;
1285 }
1286
877 if (first) { 1287 if (first) {
878 if (!hs_ep->isochronous) { 1288 if (!hs_ep->isochronous) {
879 dwc2_hsotg_start_req(hs, hs_ep, hs_req, false); 1289 dwc2_hsotg_start_req(hs, hs_ep, hs_req, false);
@@ -1099,10 +1509,8 @@ static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value, bool now);
1099 */ 1509 */
1100static struct dwc2_hsotg_req *get_ep_head(struct dwc2_hsotg_ep *hs_ep) 1510static struct dwc2_hsotg_req *get_ep_head(struct dwc2_hsotg_ep *hs_ep)
1101{ 1511{
1102 if (list_empty(&hs_ep->queue)) 1512 return list_first_entry_or_null(&hs_ep->queue, struct dwc2_hsotg_req,
1103 return NULL; 1513 queue);
1104
1105 return list_first_entry(&hs_ep->queue, struct dwc2_hsotg_req, queue);
1106} 1514}
1107 1515
1108/** 1516/**
@@ -1440,14 +1848,21 @@ static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg,
1440 1848
1441 if (hs_ep->dir_in) 1849 if (hs_ep->dir_in)
1442 dev_dbg(hsotg->dev, "Sending zero-length packet on ep%d\n", 1850 dev_dbg(hsotg->dev, "Sending zero-length packet on ep%d\n",
1443 index); 1851 index);
1444 else 1852 else
1445 dev_dbg(hsotg->dev, "Receiving zero-length packet on ep%d\n", 1853 dev_dbg(hsotg->dev, "Receiving zero-length packet on ep%d\n",
1446 index); 1854 index);
1855 if (using_desc_dma(hsotg)) {
1856 /* Not specific buffer needed for ep0 ZLP */
1857 dma_addr_t dma = hs_ep->desc_list_dma;
1447 1858
1448 dwc2_writel(DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) | 1859 dwc2_gadget_set_ep0_desc_chain(hsotg, hs_ep);
1449 DXEPTSIZ_XFERSIZE(0), hsotg->regs + 1860 dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, dma, 0);
1450 epsiz_reg); 1861 } else {
1862 dwc2_writel(DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) |
1863 DXEPTSIZ_XFERSIZE(0), hsotg->regs +
1864 epsiz_reg);
1865 }
1451 1866
1452 ctrl = dwc2_readl(hsotg->regs + epctl_reg); 1867 ctrl = dwc2_readl(hsotg->regs + epctl_reg);
1453 ctrl |= DXEPCTL_CNAK; /* clear NAK set by core */ 1868 ctrl |= DXEPCTL_CNAK; /* clear NAK set by core */
@@ -1510,6 +1925,10 @@ static void dwc2_hsotg_complete_request(struct dwc2_hsotg *hsotg,
1510 spin_lock(&hsotg->lock); 1925 spin_lock(&hsotg->lock);
1511 } 1926 }
1512 1927
1928 /* In DDMA don't need to proceed to starting of next ISOC request */
1929 if (using_desc_dma(hsotg) && hs_ep->isochronous)
1930 return;
1931
1513 /* 1932 /*
1514 * Look to see if there is anything else to do. Note, the completion 1933 * Look to see if there is anything else to do. Note, the completion
1515 * of the previous request may have caused a new request to be started 1934 * of the previous request may have caused a new request to be started
@@ -1521,6 +1940,115 @@ static void dwc2_hsotg_complete_request(struct dwc2_hsotg *hsotg,
1521 } 1940 }
1522} 1941}
1523 1942
1943/*
1944 * dwc2_gadget_complete_isoc_request_ddma - complete an isoc request in DDMA
1945 * @hs_ep: The endpoint the request was on.
1946 *
1947 * Get first request from the ep queue, determine descriptor on which complete
1948 * happened. SW based on isoc_chain_num discovers which half of the descriptor
1949 * chain is currently in use by HW, adjusts dma_address and calculates index
1950 * of completed descriptor based on the value of DEPDMA register. Update actual
1951 * length of request, giveback to gadget.
1952 */
1953static void dwc2_gadget_complete_isoc_request_ddma(struct dwc2_hsotg_ep *hs_ep)
1954{
1955 struct dwc2_hsotg *hsotg = hs_ep->parent;
1956 struct dwc2_hsotg_req *hs_req;
1957 struct usb_request *ureq;
1958 int index;
1959 dma_addr_t dma_addr;
1960 u32 dma_reg;
1961 u32 depdma;
1962 u32 desc_sts;
1963 u32 mask;
1964
1965 hs_req = get_ep_head(hs_ep);
1966 if (!hs_req) {
1967 dev_warn(hsotg->dev, "%s: ISOC EP queue empty\n", __func__);
1968 return;
1969 }
1970 ureq = &hs_req->req;
1971
1972 dma_addr = hs_ep->desc_list_dma;
1973
1974 /*
1975 * If lower half of descriptor chain is currently use by SW,
1976 * that means higher half is being processed by HW, so shift
1977 * DMA address to higher half of descriptor chain.
1978 */
1979 if (!hs_ep->isoc_chain_num)
1980 dma_addr += sizeof(struct dwc2_dma_desc) *
1981 (MAX_DMA_DESC_NUM_GENERIC / 2);
1982
1983 dma_reg = hs_ep->dir_in ? DIEPDMA(hs_ep->index) : DOEPDMA(hs_ep->index);
1984 depdma = dwc2_readl(hsotg->regs + dma_reg);
1985
1986 index = (depdma - dma_addr) / sizeof(struct dwc2_dma_desc) - 1;
1987 desc_sts = hs_ep->desc_list[index].status;
1988
1989 mask = hs_ep->dir_in ? DEV_DMA_ISOC_TX_NBYTES_MASK :
1990 DEV_DMA_ISOC_RX_NBYTES_MASK;
1991 ureq->actual = ureq->length -
1992 ((desc_sts & mask) >> DEV_DMA_ISOC_NBYTES_SHIFT);
1993
1994 /* Adjust actual length for ISOC Out if length is not align of 4 */
1995 if (!hs_ep->dir_in && ureq->length & 0x3)
1996 ureq->actual += 4 - (ureq->length & 0x3);
1997
1998 dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0);
1999}
2000
2001/*
2002 * dwc2_gadget_start_next_isoc_ddma - start next isoc request, if any.
2003 * @hs_ep: The isochronous endpoint to be re-enabled.
2004 *
2005 * If ep has been disabled due to last descriptor servicing (IN endpoint) or
2006 * BNA (OUT endpoint) check the status of other half of descriptor chain that
2007 * was under SW control till HW was busy and restart the endpoint if needed.
2008 */
2009static void dwc2_gadget_start_next_isoc_ddma(struct dwc2_hsotg_ep *hs_ep)
2010{
2011 struct dwc2_hsotg *hsotg = hs_ep->parent;
2012 u32 depctl;
2013 u32 dma_reg;
2014 u32 ctrl;
2015 u32 dma_addr = hs_ep->desc_list_dma;
2016 unsigned char index = hs_ep->index;
2017
2018 dma_reg = hs_ep->dir_in ? DIEPDMA(index) : DOEPDMA(index);
2019 depctl = hs_ep->dir_in ? DIEPCTL(index) : DOEPCTL(index);
2020
2021 ctrl = dwc2_readl(hsotg->regs + depctl);
2022
2023 /*
2024 * EP was disabled if HW has processed last descriptor or BNA was set.
2025 * So restart ep if SW has prepared new descriptor chain in ep_queue
2026 * routine while HW was busy.
2027 */
2028 if (!(ctrl & DXEPCTL_EPENA)) {
2029 if (!hs_ep->next_desc) {
2030 dev_dbg(hsotg->dev, "%s: No more ISOC requests\n",
2031 __func__);
2032 return;
2033 }
2034
2035 dma_addr += sizeof(struct dwc2_dma_desc) *
2036 (MAX_DMA_DESC_NUM_GENERIC / 2) *
2037 hs_ep->isoc_chain_num;
2038 dwc2_writel(dma_addr, hsotg->regs + dma_reg);
2039
2040 ctrl |= DXEPCTL_EPENA | DXEPCTL_CNAK;
2041 dwc2_writel(ctrl, hsotg->regs + depctl);
2042
2043 /* Switch ISOC descriptor chain number being processed by SW*/
2044 hs_ep->isoc_chain_num = (hs_ep->isoc_chain_num ^ 1) & 0x1;
2045 hs_ep->next_desc = 0;
2046
2047 dev_dbg(hsotg->dev, "%s: Restarted isochronous endpoint\n",
2048 __func__);
2049 }
2050}
2051
1524/** 2052/**
1525 * dwc2_hsotg_rx_data - receive data from the FIFO for an endpoint 2053 * dwc2_hsotg_rx_data - receive data from the FIFO for an endpoint
1526 * @hsotg: The device state. 2054 * @hsotg: The device state.
@@ -1618,6 +2146,36 @@ static void dwc2_hsotg_change_ep_iso_parity(struct dwc2_hsotg *hsotg,
1618 dwc2_writel(ctrl, hsotg->regs + epctl_reg); 2146 dwc2_writel(ctrl, hsotg->regs + epctl_reg);
1619} 2147}
1620 2148
2149/*
2150 * dwc2_gadget_get_xfersize_ddma - get transferred bytes amount from desc
2151 * @hs_ep - The endpoint on which transfer went
2152 *
2153 * Iterate over endpoints descriptor chain and get info on bytes remained
2154 * in DMA descriptors after transfer has completed. Used for non isoc EPs.
2155 */
2156static unsigned int dwc2_gadget_get_xfersize_ddma(struct dwc2_hsotg_ep *hs_ep)
2157{
2158 struct dwc2_hsotg *hsotg = hs_ep->parent;
2159 unsigned int bytes_rem = 0;
2160 struct dwc2_dma_desc *desc = hs_ep->desc_list;
2161 int i;
2162 u32 status;
2163
2164 if (!desc)
2165 return -EINVAL;
2166
2167 for (i = 0; i < hs_ep->desc_count; ++i) {
2168 status = desc->status;
2169 bytes_rem += status & DEV_DMA_NBYTES_MASK;
2170
2171 if (status & DEV_DMA_STS_MASK)
2172 dev_err(hsotg->dev, "descriptor %d closed with %x\n",
2173 i, status & DEV_DMA_STS_MASK);
2174 }
2175
2176 return bytes_rem;
2177}
2178
1621/** 2179/**
1622 * dwc2_hsotg_handle_outdone - handle receiving OutDone/SetupDone from RXFIFO 2180 * dwc2_hsotg_handle_outdone - handle receiving OutDone/SetupDone from RXFIFO
1623 * @hsotg: The device instance 2181 * @hsotg: The device instance
@@ -1648,6 +2206,9 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
1648 return; 2206 return;
1649 } 2207 }
1650 2208
2209 if (using_desc_dma(hsotg))
2210 size_left = dwc2_gadget_get_xfersize_ddma(hs_ep);
2211
1651 if (using_dma(hsotg)) { 2212 if (using_dma(hsotg)) {
1652 unsigned size_done; 2213 unsigned size_done;
1653 2214
@@ -1682,7 +2243,9 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
1682 */ 2243 */
1683 } 2244 }
1684 2245
1685 if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_DATA_OUT) { 2246 /* DDMA IN status phase will start from StsPhseRcvd interrupt */
2247 if (!using_desc_dma(hsotg) && epnum == 0 &&
2248 hsotg->ep0_state == DWC2_EP0_DATA_OUT) {
1686 /* Move to STATUS IN */ 2249 /* Move to STATUS IN */
1687 dwc2_hsotg_ep0_zlp(hsotg, true); 2250 dwc2_hsotg_ep0_zlp(hsotg, true);
1688 return; 2251 return;
@@ -1812,17 +2375,17 @@ static u32 dwc2_hsotg_ep0_mps(unsigned int mps)
1812 * @hsotg: The driver state. 2375 * @hsotg: The driver state.
1813 * @ep: The index number of the endpoint 2376 * @ep: The index number of the endpoint
1814 * @mps: The maximum packet size in bytes 2377 * @mps: The maximum packet size in bytes
2378 * @mc: The multicount value
1815 * 2379 *
1816 * Configure the maximum packet size for the given endpoint, updating 2380 * Configure the maximum packet size for the given endpoint, updating
1817 * the hardware control registers to reflect this. 2381 * the hardware control registers to reflect this.
1818 */ 2382 */
1819static void dwc2_hsotg_set_ep_maxpacket(struct dwc2_hsotg *hsotg, 2383static void dwc2_hsotg_set_ep_maxpacket(struct dwc2_hsotg *hsotg,
1820 unsigned int ep, unsigned int mps, unsigned int dir_in) 2384 unsigned int ep, unsigned int mps,
2385 unsigned int mc, unsigned int dir_in)
1821{ 2386{
1822 struct dwc2_hsotg_ep *hs_ep; 2387 struct dwc2_hsotg_ep *hs_ep;
1823 void __iomem *regs = hsotg->regs; 2388 void __iomem *regs = hsotg->regs;
1824 u32 mpsval;
1825 u32 mcval;
1826 u32 reg; 2389 u32 reg;
1827 2390
1828 hs_ep = index_to_ep(hsotg, ep, dir_in); 2391 hs_ep = index_to_ep(hsotg, ep, dir_in);
@@ -1830,32 +2393,32 @@ static void dwc2_hsotg_set_ep_maxpacket(struct dwc2_hsotg *hsotg,
1830 return; 2393 return;
1831 2394
1832 if (ep == 0) { 2395 if (ep == 0) {
2396 u32 mps_bytes = mps;
2397
1833 /* EP0 is a special case */ 2398 /* EP0 is a special case */
1834 mpsval = dwc2_hsotg_ep0_mps(mps); 2399 mps = dwc2_hsotg_ep0_mps(mps_bytes);
1835 if (mpsval > 3) 2400 if (mps > 3)
1836 goto bad_mps; 2401 goto bad_mps;
1837 hs_ep->ep.maxpacket = mps; 2402 hs_ep->ep.maxpacket = mps_bytes;
1838 hs_ep->mc = 1; 2403 hs_ep->mc = 1;
1839 } else { 2404 } else {
1840 mpsval = mps & DXEPCTL_MPS_MASK; 2405 if (mps > 1024)
1841 if (mpsval > 1024)
1842 goto bad_mps; 2406 goto bad_mps;
1843 mcval = ((mps >> 11) & 0x3) + 1; 2407 hs_ep->mc = mc;
1844 hs_ep->mc = mcval; 2408 if (mc > 3)
1845 if (mcval > 3)
1846 goto bad_mps; 2409 goto bad_mps;
1847 hs_ep->ep.maxpacket = mpsval; 2410 hs_ep->ep.maxpacket = mps;
1848 } 2411 }
1849 2412
1850 if (dir_in) { 2413 if (dir_in) {
1851 reg = dwc2_readl(regs + DIEPCTL(ep)); 2414 reg = dwc2_readl(regs + DIEPCTL(ep));
1852 reg &= ~DXEPCTL_MPS_MASK; 2415 reg &= ~DXEPCTL_MPS_MASK;
1853 reg |= mpsval; 2416 reg |= mps;
1854 dwc2_writel(reg, regs + DIEPCTL(ep)); 2417 dwc2_writel(reg, regs + DIEPCTL(ep));
1855 } else { 2418 } else {
1856 reg = dwc2_readl(regs + DOEPCTL(ep)); 2419 reg = dwc2_readl(regs + DOEPCTL(ep));
1857 reg &= ~DXEPCTL_MPS_MASK; 2420 reg &= ~DXEPCTL_MPS_MASK;
1858 reg |= mpsval; 2421 reg |= mps;
1859 dwc2_writel(reg, regs + DOEPCTL(ep)); 2422 dwc2_writel(reg, regs + DOEPCTL(ep));
1860 } 2423 }
1861 2424
@@ -1954,6 +2517,13 @@ static void dwc2_hsotg_complete_in(struct dwc2_hsotg *hsotg,
1954 /* Finish ZLP handling for IN EP0 transactions */ 2517 /* Finish ZLP handling for IN EP0 transactions */
1955 if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_IN) { 2518 if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_IN) {
1956 dev_dbg(hsotg->dev, "zlp packet sent\n"); 2519 dev_dbg(hsotg->dev, "zlp packet sent\n");
2520
2521 /*
2522 * While send zlp for DWC2_EP0_STATUS_IN EP direction was
2523 * changed to IN. Change back to complete OUT transfer request
2524 */
2525 hs_ep->dir_in = 0;
2526
1957 dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); 2527 dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0);
1958 if (hsotg->test_mode) { 2528 if (hsotg->test_mode) {
1959 int ret; 2529 int ret;
@@ -1979,8 +2549,14 @@ static void dwc2_hsotg_complete_in(struct dwc2_hsotg *hsotg,
1979 * past the end of the buffer (DMA transfers are always 32bit 2549 * past the end of the buffer (DMA transfers are always 32bit
1980 * aligned). 2550 * aligned).
1981 */ 2551 */
1982 2552 if (using_desc_dma(hsotg)) {
1983 size_left = DXEPTSIZ_XFERSIZE_GET(epsize); 2553 size_left = dwc2_gadget_get_xfersize_ddma(hs_ep);
2554 if (size_left < 0)
2555 dev_err(hsotg->dev, "error parsing DDMA results %d\n",
2556 size_left);
2557 } else {
2558 size_left = DXEPTSIZ_XFERSIZE_GET(epsize);
2559 }
1984 2560
1985 size_done = hs_ep->size_loaded - size_left; 2561 size_done = hs_ep->size_loaded - size_left;
1986 size_done += hs_ep->last_load; 2562 size_done += hs_ep->last_load;
@@ -2128,12 +2704,28 @@ static void dwc2_gadget_handle_out_token_ep_disabled(struct dwc2_hsotg_ep *ep)
2128 struct dwc2_hsotg *hsotg = ep->parent; 2704 struct dwc2_hsotg *hsotg = ep->parent;
2129 int dir_in = ep->dir_in; 2705 int dir_in = ep->dir_in;
2130 u32 doepmsk; 2706 u32 doepmsk;
2707 u32 tmp;
2131 2708
2132 if (dir_in || !ep->isochronous) 2709 if (dir_in || !ep->isochronous)
2133 return; 2710 return;
2134 2711
2712 /*
2713 * Store frame in which irq was asserted here, as
2714 * it can change while completing request below.
2715 */
2716 tmp = dwc2_hsotg_read_frameno(hsotg);
2717
2135 dwc2_hsotg_complete_request(hsotg, ep, get_ep_head(ep), -ENODATA); 2718 dwc2_hsotg_complete_request(hsotg, ep, get_ep_head(ep), -ENODATA);
2136 2719
2720 if (using_desc_dma(hsotg)) {
2721 if (ep->target_frame == TARGET_FRAME_INITIAL) {
2722 /* Start first ISO Out */
2723 ep->target_frame = tmp;
2724 dwc2_gadget_start_isoc_ddma(ep);
2725 }
2726 return;
2727 }
2728
2137 if (ep->interval > 1 && 2729 if (ep->interval > 1 &&
2138 ep->target_frame == TARGET_FRAME_INITIAL) { 2730 ep->target_frame == TARGET_FRAME_INITIAL) {
2139 u32 dsts; 2731 u32 dsts;
@@ -2182,6 +2774,12 @@ static void dwc2_gadget_handle_nak(struct dwc2_hsotg_ep *hs_ep)
2182 2774
2183 if (hs_ep->target_frame == TARGET_FRAME_INITIAL) { 2775 if (hs_ep->target_frame == TARGET_FRAME_INITIAL) {
2184 hs_ep->target_frame = dwc2_hsotg_read_frameno(hsotg); 2776 hs_ep->target_frame = dwc2_hsotg_read_frameno(hsotg);
2777
2778 if (using_desc_dma(hsotg)) {
2779 dwc2_gadget_start_isoc_ddma(hs_ep);
2780 return;
2781 }
2782
2185 if (hs_ep->interval > 1) { 2783 if (hs_ep->interval > 1) {
2186 u32 ctrl = dwc2_readl(hsotg->regs + 2784 u32 ctrl = dwc2_readl(hsotg->regs +
2187 DIEPCTL(hs_ep->index)); 2785 DIEPCTL(hs_ep->index));
@@ -2237,8 +2835,15 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
2237 if (idx == 0 && (ints & (DXEPINT_SETUP | DXEPINT_SETUP_RCVD))) 2835 if (idx == 0 && (ints & (DXEPINT_SETUP | DXEPINT_SETUP_RCVD)))
2238 ints &= ~DXEPINT_XFERCOMPL; 2836 ints &= ~DXEPINT_XFERCOMPL;
2239 2837
2240 if (ints & DXEPINT_STSPHSERCVD) 2838 /*
2241 dev_dbg(hsotg->dev, "%s: StsPhseRcvd asserted\n", __func__); 2839 * Don't process XferCompl interrupt in DDMA if EP0 is still in SETUP
2840 * stage and xfercomplete was generated without SETUP phase done
2841 * interrupt. SW should parse received setup packet only after host's
2842 * exit from setup phase of control transfer.
2843 */
2844 if (using_desc_dma(hsotg) && idx == 0 && !hs_ep->dir_in &&
2845 hsotg->ep0_state == DWC2_EP0_SETUP && !(ints & DXEPINT_SETUP))
2846 ints &= ~DXEPINT_XFERCOMPL;
2242 2847
2243 if (ints & DXEPINT_XFERCOMPL) { 2848 if (ints & DXEPINT_XFERCOMPL) {
2244 dev_dbg(hsotg->dev, 2849 dev_dbg(hsotg->dev,
@@ -2246,11 +2851,17 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
2246 __func__, dwc2_readl(hsotg->regs + epctl_reg), 2851 __func__, dwc2_readl(hsotg->regs + epctl_reg),
2247 dwc2_readl(hsotg->regs + epsiz_reg)); 2852 dwc2_readl(hsotg->regs + epsiz_reg));
2248 2853
2249 /* 2854 /* In DDMA handle isochronous requests separately */
2250 * we get OutDone from the FIFO, so we only need to look 2855 if (using_desc_dma(hsotg) && hs_ep->isochronous) {
2251 * at completing IN requests here 2856 dwc2_gadget_complete_isoc_request_ddma(hs_ep);
2252 */ 2857 /* Try to start next isoc request */
2253 if (dir_in) { 2858 dwc2_gadget_start_next_isoc_ddma(hs_ep);
2859 } else if (dir_in) {
2860 /*
2861 * We get OutDone from the FIFO, so we only
2862 * need to look at completing IN requests here
2863 * if operating slave mode
2864 */
2254 if (hs_ep->isochronous && hs_ep->interval > 1) 2865 if (hs_ep->isochronous && hs_ep->interval > 1)
2255 dwc2_gadget_incr_frame_num(hs_ep); 2866 dwc2_gadget_incr_frame_num(hs_ep);
2256 2867
@@ -2302,9 +2913,30 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
2302 } 2913 }
2303 } 2914 }
2304 2915
2916 if (ints & DXEPINT_STSPHSERCVD) {
2917 dev_dbg(hsotg->dev, "%s: StsPhseRcvd\n", __func__);
2918
2919 /* Move to STATUS IN for DDMA */
2920 if (using_desc_dma(hsotg))
2921 dwc2_hsotg_ep0_zlp(hsotg, true);
2922 }
2923
2305 if (ints & DXEPINT_BACK2BACKSETUP) 2924 if (ints & DXEPINT_BACK2BACKSETUP)
2306 dev_dbg(hsotg->dev, "%s: B2BSetup/INEPNakEff\n", __func__); 2925 dev_dbg(hsotg->dev, "%s: B2BSetup/INEPNakEff\n", __func__);
2307 2926
2927 if (ints & DXEPINT_BNAINTR) {
2928 dev_dbg(hsotg->dev, "%s: BNA interrupt\n", __func__);
2929
2930 /*
2931 * Try to start next isoc request, if any.
2932 * Sometimes the endpoint remains enabled after BNA interrupt
2933 * assertion, which is not expected, hence we can enter here
2934 * couple of times.
2935 */
2936 if (hs_ep->isochronous)
2937 dwc2_gadget_start_next_isoc_ddma(hs_ep);
2938 }
2939
2308 if (dir_in && !hs_ep->isochronous) { 2940 if (dir_in && !hs_ep->isochronous) {
2309 /* not sure if this is important, but we'll clear it anyway */ 2941 /* not sure if this is important, but we'll clear it anyway */
2310 if (ints & DXEPINT_INTKNTXFEMP) { 2942 if (ints & DXEPINT_INTKNTXFEMP) {
@@ -2372,6 +3004,8 @@ static void dwc2_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg)
2372 3004
2373 case DSTS_ENUMSPD_LS: 3005 case DSTS_ENUMSPD_LS:
2374 hsotg->gadget.speed = USB_SPEED_LOW; 3006 hsotg->gadget.speed = USB_SPEED_LOW;
3007 ep0_mps = 8;
3008 ep_mps = 8;
2375 /* 3009 /*
2376 * note, we don't actually support LS in this driver at the 3010 * note, we don't actually support LS in this driver at the
2377 * moment, and the documentation seems to imply that it isn't 3011 * moment, and the documentation seems to imply that it isn't
@@ -2390,13 +3024,15 @@ static void dwc2_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg)
2390 if (ep0_mps) { 3024 if (ep0_mps) {
2391 int i; 3025 int i;
2392 /* Initialize ep0 for both in and out directions */ 3026 /* Initialize ep0 for both in and out directions */
2393 dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 1); 3027 dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 0, 1);
2394 dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 0); 3028 dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 0, 0);
2395 for (i = 1; i < hsotg->num_of_eps; i++) { 3029 for (i = 1; i < hsotg->num_of_eps; i++) {
2396 if (hsotg->eps_in[i]) 3030 if (hsotg->eps_in[i])
2397 dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 1); 3031 dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps,
3032 0, 1);
2398 if (hsotg->eps_out[i]) 3033 if (hsotg->eps_out[i])
2399 dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 0); 3034 dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps,
3035 0, 0);
2400 } 3036 }
2401 } 3037 }
2402 3038
@@ -2516,6 +3152,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
2516 u32 intmsk; 3152 u32 intmsk;
2517 u32 val; 3153 u32 val;
2518 u32 usbcfg; 3154 u32 usbcfg;
3155 u32 dcfg = 0;
2519 3156
2520 /* Kill any ep0 requests as controller will be reinitialized */ 3157 /* Kill any ep0 requests as controller will be reinitialized */
2521 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); 3158 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
@@ -2534,10 +3171,17 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
2534 usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP | 3171 usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
2535 GUSBCFG_HNPCAP); 3172 GUSBCFG_HNPCAP);
2536 3173
2537 /* set the PLL on, remove the HNP/SRP and set the PHY */ 3174 if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
2538 val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; 3175 (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
2539 usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) | 3176 hsotg->params.speed == DWC2_SPEED_PARAM_LOW)) {
2540 (val << GUSBCFG_USBTRDTIM_SHIFT); 3177 /* FS/LS Dedicated Transceiver Interface */
3178 usbcfg |= GUSBCFG_PHYSEL;
3179 } else {
3180 /* set the PLL on, remove the HNP/SRP and set the PHY */
3181 val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
3182 usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
3183 (val << GUSBCFG_USBTRDTIM_SHIFT);
3184 }
2541 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG); 3185 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
2542 3186
2543 dwc2_hsotg_init_fifo(hsotg); 3187 dwc2_hsotg_init_fifo(hsotg);
@@ -2545,7 +3189,23 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
2545 if (!is_usb_reset) 3189 if (!is_usb_reset)
2546 __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); 3190 __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON);
2547 3191
2548 dwc2_writel(DCFG_EPMISCNT(1) | DCFG_DEVSPD_HS, hsotg->regs + DCFG); 3192 dcfg |= DCFG_EPMISCNT(1);
3193
3194 switch (hsotg->params.speed) {
3195 case DWC2_SPEED_PARAM_LOW:
3196 dcfg |= DCFG_DEVSPD_LS;
3197 break;
3198 case DWC2_SPEED_PARAM_FULL:
3199 if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS)
3200 dcfg |= DCFG_DEVSPD_FS48;
3201 else
3202 dcfg |= DCFG_DEVSPD_FS;
3203 break;
3204 default:
3205 dcfg |= DCFG_DEVSPD_HS;
3206 }
3207
3208 dwc2_writel(dcfg, hsotg->regs + DCFG);
2549 3209
2550 /* Clear any pending OTG interrupts */ 3210 /* Clear any pending OTG interrupts */
2551 dwc2_writel(0xffffffff, hsotg->regs + GOTGINT); 3211 dwc2_writel(0xffffffff, hsotg->regs + GOTGINT);
@@ -2556,23 +3216,31 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
2556 GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF | 3216 GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF |
2557 GINTSTS_USBRST | GINTSTS_RESETDET | 3217 GINTSTS_USBRST | GINTSTS_RESETDET |
2558 GINTSTS_ENUMDONE | GINTSTS_OTGINT | 3218 GINTSTS_ENUMDONE | GINTSTS_OTGINT |
2559 GINTSTS_USBSUSP | GINTSTS_WKUPINT | 3219 GINTSTS_USBSUSP | GINTSTS_WKUPINT;
2560 GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT;
2561 3220
2562 if (hsotg->core_params->external_id_pin_ctl <= 0) 3221 if (!using_desc_dma(hsotg))
3222 intmsk |= GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT;
3223
3224 if (hsotg->params.external_id_pin_ctl <= 0)
2563 intmsk |= GINTSTS_CONIDSTSCHNG; 3225 intmsk |= GINTSTS_CONIDSTSCHNG;
2564 3226
2565 dwc2_writel(intmsk, hsotg->regs + GINTMSK); 3227 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
2566 3228
2567 if (using_dma(hsotg)) 3229 if (using_dma(hsotg)) {
2568 dwc2_writel(GAHBCFG_GLBL_INTR_EN | GAHBCFG_DMA_EN | 3230 dwc2_writel(GAHBCFG_GLBL_INTR_EN | GAHBCFG_DMA_EN |
2569 (GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT), 3231 (GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT),
2570 hsotg->regs + GAHBCFG); 3232 hsotg->regs + GAHBCFG);
2571 else 3233
3234 /* Set DDMA mode support in the core if needed */
3235 if (using_desc_dma(hsotg))
3236 __orr32(hsotg->regs + DCFG, DCFG_DESCDMA_EN);
3237
3238 } else {
2572 dwc2_writel(((hsotg->dedicated_fifos) ? 3239 dwc2_writel(((hsotg->dedicated_fifos) ?
2573 (GAHBCFG_NP_TXF_EMP_LVL | 3240 (GAHBCFG_NP_TXF_EMP_LVL |
2574 GAHBCFG_P_TXF_EMP_LVL) : 0) | 3241 GAHBCFG_P_TXF_EMP_LVL) : 0) |
2575 GAHBCFG_GLBL_INTR_EN, hsotg->regs + GAHBCFG); 3242 GAHBCFG_GLBL_INTR_EN, hsotg->regs + GAHBCFG);
3243 }
2576 3244
2577 /* 3245 /*
2578 * If INTknTXFEmpMsk is enabled, it's important to disable ep interrupts 3246 * If INTknTXFEmpMsk is enabled, it's important to disable ep interrupts
@@ -2588,13 +3256,18 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
2588 3256
2589 /* 3257 /*
2590 * don't need XferCompl, we get that from RXFIFO in slave mode. In 3258 * don't need XferCompl, we get that from RXFIFO in slave mode. In
2591 * DMA mode we may need this. 3259 * DMA mode we may need this and StsPhseRcvd.
2592 */ 3260 */
2593 dwc2_writel((using_dma(hsotg) ? (DIEPMSK_XFERCOMPLMSK) : 0) | 3261 dwc2_writel((using_dma(hsotg) ? (DIEPMSK_XFERCOMPLMSK |
3262 DOEPMSK_STSPHSERCVDMSK) : 0) |
2594 DOEPMSK_EPDISBLDMSK | DOEPMSK_AHBERRMSK | 3263 DOEPMSK_EPDISBLDMSK | DOEPMSK_AHBERRMSK |
2595 DOEPMSK_SETUPMSK | DOEPMSK_STSPHSERCVDMSK, 3264 DOEPMSK_SETUPMSK,
2596 hsotg->regs + DOEPMSK); 3265 hsotg->regs + DOEPMSK);
2597 3266
3267 /* Enable BNA interrupt for DDMA */
3268 if (using_desc_dma(hsotg))
3269 __orr32(hsotg->regs + DOEPMSK, DOEPMSK_BNAMSK);
3270
2598 dwc2_writel(0, hsotg->regs + DAINTMSK); 3271 dwc2_writel(0, hsotg->regs + DAINTMSK);
2599 3272
2600 dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", 3273 dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n",
@@ -2935,6 +3608,95 @@ irq_retry:
2935 return IRQ_HANDLED; 3608 return IRQ_HANDLED;
2936} 3609}
2937 3610
3611static int dwc2_hsotg_wait_bit_set(struct dwc2_hsotg *hs_otg, u32 reg,
3612 u32 bit, u32 timeout)
3613{
3614 u32 i;
3615
3616 for (i = 0; i < timeout; i++) {
3617 if (dwc2_readl(hs_otg->regs + reg) & bit)
3618 return 0;
3619 udelay(1);
3620 }
3621
3622 return -ETIMEDOUT;
3623}
3624
3625static void dwc2_hsotg_ep_stop_xfr(struct dwc2_hsotg *hsotg,
3626 struct dwc2_hsotg_ep *hs_ep)
3627{
3628 u32 epctrl_reg;
3629 u32 epint_reg;
3630
3631 epctrl_reg = hs_ep->dir_in ? DIEPCTL(hs_ep->index) :
3632 DOEPCTL(hs_ep->index);
3633 epint_reg = hs_ep->dir_in ? DIEPINT(hs_ep->index) :
3634 DOEPINT(hs_ep->index);
3635
3636 dev_dbg(hsotg->dev, "%s: stopping transfer on %s\n", __func__,
3637 hs_ep->name);
3638
3639 if (hs_ep->dir_in) {
3640 if (hsotg->dedicated_fifos || hs_ep->periodic) {
3641 __orr32(hsotg->regs + epctrl_reg, DXEPCTL_SNAK);
3642 /* Wait for Nak effect */
3643 if (dwc2_hsotg_wait_bit_set(hsotg, epint_reg,
3644 DXEPINT_INEPNAKEFF, 100))
3645 dev_warn(hsotg->dev,
3646 "%s: timeout DIEPINT.NAKEFF\n",
3647 __func__);
3648 } else {
3649 __orr32(hsotg->regs + DCTL, DCTL_SGNPINNAK);
3650 /* Wait for Nak effect */
3651 if (dwc2_hsotg_wait_bit_set(hsotg, GINTSTS,
3652 GINTSTS_GINNAKEFF, 100))
3653 dev_warn(hsotg->dev,
3654 "%s: timeout GINTSTS.GINNAKEFF\n",
3655 __func__);
3656 }
3657 } else {
3658 if (!(dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_GOUTNAKEFF))
3659 __orr32(hsotg->regs + DCTL, DCTL_SGOUTNAK);
3660
3661 /* Wait for global nak to take effect */
3662 if (dwc2_hsotg_wait_bit_set(hsotg, GINTSTS,
3663 GINTSTS_GOUTNAKEFF, 100))
3664 dev_warn(hsotg->dev, "%s: timeout GINTSTS.GOUTNAKEFF\n",
3665 __func__);
3666 }
3667
3668 /* Disable ep */
3669 __orr32(hsotg->regs + epctrl_reg, DXEPCTL_EPDIS | DXEPCTL_SNAK);
3670
3671 /* Wait for ep to be disabled */
3672 if (dwc2_hsotg_wait_bit_set(hsotg, epint_reg, DXEPINT_EPDISBLD, 100))
3673 dev_warn(hsotg->dev,
3674 "%s: timeout DOEPCTL.EPDisable\n", __func__);
3675
3676 /* Clear EPDISBLD interrupt */
3677 __orr32(hsotg->regs + epint_reg, DXEPINT_EPDISBLD);
3678
3679 if (hs_ep->dir_in) {
3680 unsigned short fifo_index;
3681
3682 if (hsotg->dedicated_fifos || hs_ep->periodic)
3683 fifo_index = hs_ep->fifo_index;
3684 else
3685 fifo_index = 0;
3686
3687 /* Flush TX FIFO */
3688 dwc2_flush_tx_fifo(hsotg, fifo_index);
3689
3690 /* Clear Global In NP NAK in Shared FIFO for non periodic ep */
3691 if (!hsotg->dedicated_fifos && !hs_ep->periodic)
3692 __orr32(hsotg->regs + DCTL, DCTL_CGNPINNAK);
3693
3694 } else {
3695 /* Remove global NAKs */
3696 __orr32(hsotg->regs + DCTL, DCTL_CGOUTNAK);
3697 }
3698}
3699
2938/** 3700/**
2939 * dwc2_hsotg_ep_enable - enable the given endpoint 3701 * dwc2_hsotg_ep_enable - enable the given endpoint
2940 * @ep: The USB endpint to configure 3702 * @ep: The USB endpint to configure
@@ -2952,6 +3714,7 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
2952 u32 epctrl_reg; 3714 u32 epctrl_reg;
2953 u32 epctrl; 3715 u32 epctrl;
2954 u32 mps; 3716 u32 mps;
3717 u32 mc;
2955 u32 mask; 3718 u32 mask;
2956 unsigned int dir_in; 3719 unsigned int dir_in;
2957 unsigned int i, val, size; 3720 unsigned int i, val, size;
@@ -2975,6 +3738,7 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
2975 } 3738 }
2976 3739
2977 mps = usb_endpoint_maxp(desc); 3740 mps = usb_endpoint_maxp(desc);
3741 mc = usb_endpoint_maxp_mult(desc);
2978 3742
2979 /* note, we handle this here instead of dwc2_hsotg_set_ep_maxpacket */ 3743 /* note, we handle this here instead of dwc2_hsotg_set_ep_maxpacket */
2980 3744
@@ -2984,6 +3748,18 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
2984 dev_dbg(hsotg->dev, "%s: read DxEPCTL=0x%08x from 0x%08x\n", 3748 dev_dbg(hsotg->dev, "%s: read DxEPCTL=0x%08x from 0x%08x\n",
2985 __func__, epctrl, epctrl_reg); 3749 __func__, epctrl, epctrl_reg);
2986 3750
3751 /* Allocate DMA descriptor chain for non-ctrl endpoints */
3752 if (using_desc_dma(hsotg)) {
3753 hs_ep->desc_list = dma_alloc_coherent(hsotg->dev,
3754 MAX_DMA_DESC_NUM_GENERIC *
3755 sizeof(struct dwc2_dma_desc),
3756 &hs_ep->desc_list_dma, GFP_KERNEL);
3757 if (!hs_ep->desc_list) {
3758 ret = -ENOMEM;
3759 goto error2;
3760 }
3761 }
3762
2987 spin_lock_irqsave(&hsotg->lock, flags); 3763 spin_lock_irqsave(&hsotg->lock, flags);
2988 3764
2989 epctrl &= ~(DXEPCTL_EPTYPE_MASK | DXEPCTL_MPS_MASK); 3765 epctrl &= ~(DXEPCTL_EPTYPE_MASK | DXEPCTL_MPS_MASK);
@@ -2996,7 +3772,7 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
2996 epctrl |= DXEPCTL_USBACTEP; 3772 epctrl |= DXEPCTL_USBACTEP;
2997 3773
2998 /* update the endpoint state */ 3774 /* update the endpoint state */
2999 dwc2_hsotg_set_ep_maxpacket(hsotg, hs_ep->index, mps, dir_in); 3775 dwc2_hsotg_set_ep_maxpacket(hsotg, hs_ep->index, mps, mc, dir_in);
3000 3776
3001 /* default, set to non-periodic */ 3777 /* default, set to non-periodic */
3002 hs_ep->isochronous = 0; 3778 hs_ep->isochronous = 0;
@@ -3011,6 +3787,8 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
3011 hs_ep->isochronous = 1; 3787 hs_ep->isochronous = 1;
3012 hs_ep->interval = 1 << (desc->bInterval - 1); 3788 hs_ep->interval = 1 << (desc->bInterval - 1);
3013 hs_ep->target_frame = TARGET_FRAME_INITIAL; 3789 hs_ep->target_frame = TARGET_FRAME_INITIAL;
3790 hs_ep->isoc_chain_num = 0;
3791 hs_ep->next_desc = 0;
3014 if (dir_in) { 3792 if (dir_in) {
3015 hs_ep->periodic = 1; 3793 hs_ep->periodic = 1;
3016 mask = dwc2_readl(hsotg->regs + DIEPMSK); 3794 mask = dwc2_readl(hsotg->regs + DIEPMSK);
@@ -3067,7 +3845,7 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
3067 dev_err(hsotg->dev, 3845 dev_err(hsotg->dev,
3068 "%s: No suitable fifo found\n", __func__); 3846 "%s: No suitable fifo found\n", __func__);
3069 ret = -ENOMEM; 3847 ret = -ENOMEM;
3070 goto error; 3848 goto error1;
3071 } 3849 }
3072 hsotg->fifo_map |= 1 << fifo_index; 3850 hsotg->fifo_map |= 1 << fifo_index;
3073 epctrl |= DXEPCTL_TXFNUM(fifo_index); 3851 epctrl |= DXEPCTL_TXFNUM(fifo_index);
@@ -3089,8 +3867,17 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
3089 /* enable the endpoint interrupt */ 3867 /* enable the endpoint interrupt */
3090 dwc2_hsotg_ctrl_epint(hsotg, index, dir_in, 1); 3868 dwc2_hsotg_ctrl_epint(hsotg, index, dir_in, 1);
3091 3869
3092error: 3870error1:
3093 spin_unlock_irqrestore(&hsotg->lock, flags); 3871 spin_unlock_irqrestore(&hsotg->lock, flags);
3872
3873error2:
3874 if (ret && using_desc_dma(hsotg) && hs_ep->desc_list) {
3875 dma_free_coherent(hsotg->dev, MAX_DMA_DESC_NUM_GENERIC *
3876 sizeof(struct dwc2_dma_desc),
3877 hs_ep->desc_list, hs_ep->desc_list_dma);
3878 hs_ep->desc_list = NULL;
3879 }
3880
3094 return ret; 3881 return ret;
3095} 3882}
3096 3883
@@ -3115,11 +3902,23 @@ static int dwc2_hsotg_ep_disable(struct usb_ep *ep)
3115 return -EINVAL; 3902 return -EINVAL;
3116 } 3903 }
3117 3904
3905 /* Remove DMA memory allocated for non-control Endpoints */
3906 if (using_desc_dma(hsotg)) {
3907 dma_free_coherent(hsotg->dev, MAX_DMA_DESC_NUM_GENERIC *
3908 sizeof(struct dwc2_dma_desc),
3909 hs_ep->desc_list, hs_ep->desc_list_dma);
3910 hs_ep->desc_list = NULL;
3911 }
3912
3118 epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); 3913 epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index);
3119 3914
3120 spin_lock_irqsave(&hsotg->lock, flags); 3915 spin_lock_irqsave(&hsotg->lock, flags);
3121 3916
3122 ctrl = dwc2_readl(hsotg->regs + epctrl_reg); 3917 ctrl = dwc2_readl(hsotg->regs + epctrl_reg);
3918
3919 if (ctrl & DXEPCTL_EPENA)
3920 dwc2_hsotg_ep_stop_xfr(hsotg, hs_ep);
3921
3123 ctrl &= ~DXEPCTL_EPENA; 3922 ctrl &= ~DXEPCTL_EPENA;
3124 ctrl &= ~DXEPCTL_USBACTEP; 3923 ctrl &= ~DXEPCTL_USBACTEP;
3125 ctrl |= DXEPCTL_SNAK; 3924 ctrl |= DXEPCTL_SNAK;
@@ -3158,77 +3957,6 @@ static bool on_list(struct dwc2_hsotg_ep *ep, struct dwc2_hsotg_req *test)
3158 return false; 3957 return false;
3159} 3958}
3160 3959
3161static int dwc2_hsotg_wait_bit_set(struct dwc2_hsotg *hs_otg, u32 reg,
3162 u32 bit, u32 timeout)
3163{
3164 u32 i;
3165
3166 for (i = 0; i < timeout; i++) {
3167 if (dwc2_readl(hs_otg->regs + reg) & bit)
3168 return 0;
3169 udelay(1);
3170 }
3171
3172 return -ETIMEDOUT;
3173}
3174
3175static void dwc2_hsotg_ep_stop_xfr(struct dwc2_hsotg *hsotg,
3176 struct dwc2_hsotg_ep *hs_ep)
3177{
3178 u32 epctrl_reg;
3179 u32 epint_reg;
3180
3181 epctrl_reg = hs_ep->dir_in ? DIEPCTL(hs_ep->index) :
3182 DOEPCTL(hs_ep->index);
3183 epint_reg = hs_ep->dir_in ? DIEPINT(hs_ep->index) :
3184 DOEPINT(hs_ep->index);
3185
3186 dev_dbg(hsotg->dev, "%s: stopping transfer on %s\n", __func__,
3187 hs_ep->name);
3188 if (hs_ep->dir_in) {
3189 __orr32(hsotg->regs + epctrl_reg, DXEPCTL_SNAK);
3190 /* Wait for Nak effect */
3191 if (dwc2_hsotg_wait_bit_set(hsotg, epint_reg,
3192 DXEPINT_INEPNAKEFF, 100))
3193 dev_warn(hsotg->dev,
3194 "%s: timeout DIEPINT.NAKEFF\n", __func__);
3195 } else {
3196 if (!(dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_GOUTNAKEFF))
3197 __orr32(hsotg->regs + DCTL, DCTL_SGOUTNAK);
3198
3199 /* Wait for global nak to take effect */
3200 if (dwc2_hsotg_wait_bit_set(hsotg, GINTSTS,
3201 GINTSTS_GOUTNAKEFF, 100))
3202 dev_warn(hsotg->dev,
3203 "%s: timeout GINTSTS.GOUTNAKEFF\n", __func__);
3204 }
3205
3206 /* Disable ep */
3207 __orr32(hsotg->regs + epctrl_reg, DXEPCTL_EPDIS | DXEPCTL_SNAK);
3208
3209 /* Wait for ep to be disabled */
3210 if (dwc2_hsotg_wait_bit_set(hsotg, epint_reg, DXEPINT_EPDISBLD, 100))
3211 dev_warn(hsotg->dev,
3212 "%s: timeout DOEPCTL.EPDisable\n", __func__);
3213
3214 if (hs_ep->dir_in) {
3215 if (hsotg->dedicated_fifos) {
3216 dwc2_writel(GRSTCTL_TXFNUM(hs_ep->fifo_index) |
3217 GRSTCTL_TXFFLSH, hsotg->regs + GRSTCTL);
3218 /* Wait for fifo flush */
3219 if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL,
3220 GRSTCTL_TXFFLSH, 100))
3221 dev_warn(hsotg->dev,
3222 "%s: timeout flushing fifos\n",
3223 __func__);
3224 }
3225 /* TODO: Flush shared tx fifo */
3226 } else {
3227 /* Remove global NAKs */
3228 __bic32(hsotg->regs + DCTL, DCTL_SGOUTNAK);
3229 }
3230}
3231
3232/** 3960/**
3233 * dwc2_hsotg_ep_dequeue - dequeue given endpoint 3961 * dwc2_hsotg_ep_dequeue - dequeue given endpoint
3234 * @ep: The endpoint to dequeue. 3962 * @ep: The endpoint to dequeue.
@@ -3665,14 +4393,21 @@ static void dwc2_hsotg_initep(struct dwc2_hsotg *hsotg,
3665 4393
3666 hs_ep->parent = hsotg; 4394 hs_ep->parent = hsotg;
3667 hs_ep->ep.name = hs_ep->name; 4395 hs_ep->ep.name = hs_ep->name;
3668 usb_ep_set_maxpacket_limit(&hs_ep->ep, epnum ? 1024 : EP0_MPS_LIMIT); 4396
4397 if (hsotg->params.speed == DWC2_SPEED_PARAM_LOW)
4398 usb_ep_set_maxpacket_limit(&hs_ep->ep, 8);
4399 else
4400 usb_ep_set_maxpacket_limit(&hs_ep->ep,
4401 epnum ? 1024 : EP0_MPS_LIMIT);
3669 hs_ep->ep.ops = &dwc2_hsotg_ep_ops; 4402 hs_ep->ep.ops = &dwc2_hsotg_ep_ops;
3670 4403
3671 if (epnum == 0) { 4404 if (epnum == 0) {
3672 hs_ep->ep.caps.type_control = true; 4405 hs_ep->ep.caps.type_control = true;
3673 } else { 4406 } else {
3674 hs_ep->ep.caps.type_iso = true; 4407 if (hsotg->params.speed != DWC2_SPEED_PARAM_LOW) {
3675 hs_ep->ep.caps.type_bulk = true; 4408 hs_ep->ep.caps.type_iso = true;
4409 hs_ep->ep.caps.type_bulk = true;
4410 }
3676 hs_ep->ep.caps.type_int = true; 4411 hs_ep->ep.caps.type_int = true;
3677 } 4412 }
3678 4413
@@ -3802,51 +4537,6 @@ static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg)
3802#endif 4537#endif
3803} 4538}
3804 4539
3805#ifdef CONFIG_OF
3806static void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg)
3807{
3808 struct device_node *np = hsotg->dev->of_node;
3809 u32 len = 0;
3810 u32 i = 0;
3811
3812 /* Enable dma if requested in device tree */
3813 hsotg->g_using_dma = of_property_read_bool(np, "g-use-dma");
3814
3815 /*
3816 * Register TX periodic fifo size per endpoint.
3817 * EP0 is excluded since it has no fifo configuration.
3818 */
3819 if (!of_find_property(np, "g-tx-fifo-size", &len))
3820 goto rx_fifo;
3821
3822 len /= sizeof(u32);
3823
3824 /* Read tx fifo sizes other than ep0 */
3825 if (of_property_read_u32_array(np, "g-tx-fifo-size",
3826 &hsotg->g_tx_fifo_sz[1], len))
3827 goto rx_fifo;
3828
3829 /* Add ep0 */
3830 len++;
3831
3832 /* Make remaining TX fifos unavailable */
3833 if (len < MAX_EPS_CHANNELS) {
3834 for (i = len; i < MAX_EPS_CHANNELS; i++)
3835 hsotg->g_tx_fifo_sz[i] = 0;
3836 }
3837
3838rx_fifo:
3839 /* Register RX fifo size */
3840 of_property_read_u32(np, "g-rx-fifo-size", &hsotg->g_rx_fifo_sz);
3841
3842 /* Register NPTX fifo size */
3843 of_property_read_u32(np, "g-np-tx-fifo-size",
3844 &hsotg->g_np_g_tx_fifo_sz);
3845}
3846#else
3847static inline void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg) { }
3848#endif
3849
3850/** 4540/**
3851 * dwc2_gadget_init - init function for gadget 4541 * dwc2_gadget_init - init function for gadget
3852 * @dwc2: The data structure for the DWC2 driver. 4542 * @dwc2: The data structure for the DWC2 driver.
@@ -3857,33 +4547,11 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
3857 struct device *dev = hsotg->dev; 4547 struct device *dev = hsotg->dev;
3858 int epnum; 4548 int epnum;
3859 int ret; 4549 int ret;
3860 int i;
3861 u32 p_tx_fifo[] = DWC2_G_P_LEGACY_TX_FIFO_SIZE;
3862
3863 /* Initialize to legacy fifo configuration values */
3864 hsotg->g_rx_fifo_sz = 2048;
3865 hsotg->g_np_g_tx_fifo_sz = 1024;
3866 memcpy(&hsotg->g_tx_fifo_sz[1], p_tx_fifo, sizeof(p_tx_fifo));
3867 /* Device tree specific probe */
3868 dwc2_hsotg_of_probe(hsotg);
3869
3870 /* Check against largest possible value. */
3871 if (hsotg->g_np_g_tx_fifo_sz >
3872 hsotg->hw_params.dev_nperio_tx_fifo_size) {
3873 dev_warn(dev, "Specified GNPTXFDEP=%d > %d\n",
3874 hsotg->g_np_g_tx_fifo_sz,
3875 hsotg->hw_params.dev_nperio_tx_fifo_size);
3876 hsotg->g_np_g_tx_fifo_sz =
3877 hsotg->hw_params.dev_nperio_tx_fifo_size;
3878 }
3879 4550
3880 /* Dump fifo information */ 4551 /* Dump fifo information */
3881 dev_dbg(dev, "NonPeriodic TXFIFO size: %d\n", 4552 dev_dbg(dev, "NonPeriodic TXFIFO size: %d\n",
3882 hsotg->g_np_g_tx_fifo_sz); 4553 hsotg->params.g_np_tx_fifo_size);
3883 dev_dbg(dev, "RXFIFO size: %d\n", hsotg->g_rx_fifo_sz); 4554 dev_dbg(dev, "RXFIFO size: %d\n", hsotg->params.g_rx_fifo_size);
3884 for (i = 0; i < MAX_EPS_CHANNELS; i++)
3885 dev_dbg(dev, "Periodic TXFIFO%2d size: %d\n", i,
3886 hsotg->g_tx_fifo_sz[i]);
3887 4555
3888 hsotg->gadget.max_speed = USB_SPEED_HIGH; 4556 hsotg->gadget.max_speed = USB_SPEED_HIGH;
3889 hsotg->gadget.ops = &dwc2_hsotg_gadget_ops; 4557 hsotg->gadget.ops = &dwc2_hsotg_gadget_ops;
@@ -3909,6 +4577,12 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
3909 if (!hsotg->ep0_buff) 4577 if (!hsotg->ep0_buff)
3910 return -ENOMEM; 4578 return -ENOMEM;
3911 4579
4580 if (using_desc_dma(hsotg)) {
4581 ret = dwc2_gadget_alloc_ctrl_desc_chains(hsotg);
4582 if (ret < 0)
4583 return ret;
4584 }
4585
3912 ret = devm_request_irq(hsotg->dev, irq, dwc2_hsotg_irq, IRQF_SHARED, 4586 ret = devm_request_irq(hsotg->dev, irq, dwc2_hsotg_irq, IRQF_SHARED,
3913 dev_name(hsotg->dev), hsotg); 4587 dev_name(hsotg->dev), hsotg);
3914 if (ret < 0) { 4588 if (ret < 0) {
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index df5a06578005..911c3b36ac06 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -79,9 +79,9 @@ static void dwc2_enable_common_interrupts(struct dwc2_hsotg *hsotg)
79 /* Enable the interrupts in the GINTMSK */ 79 /* Enable the interrupts in the GINTMSK */
80 intmsk = GINTSTS_MODEMIS | GINTSTS_OTGINT; 80 intmsk = GINTSTS_MODEMIS | GINTSTS_OTGINT;
81 81
82 if (hsotg->core_params->dma_enable <= 0) 82 if (hsotg->params.host_dma <= 0)
83 intmsk |= GINTSTS_RXFLVL; 83 intmsk |= GINTSTS_RXFLVL;
84 if (hsotg->core_params->external_id_pin_ctl <= 0) 84 if (hsotg->params.external_id_pin_ctl <= 0)
85 intmsk |= GINTSTS_CONIDSTSCHNG; 85 intmsk |= GINTSTS_CONIDSTSCHNG;
86 86
87 intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP | 87 intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP |
@@ -100,8 +100,8 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
100 100
101 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && 101 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
102 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && 102 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
103 hsotg->core_params->ulpi_fs_ls > 0) || 103 hsotg->params.ulpi_fs_ls > 0) ||
104 hsotg->core_params->phy_type == DWC2_PHY_TYPE_PARAM_FS) { 104 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) {
105 /* Full speed PHY */ 105 /* Full speed PHY */
106 val = HCFG_FSLSPCLKSEL_48_MHZ; 106 val = HCFG_FSLSPCLKSEL_48_MHZ;
107 } else { 107 } else {
@@ -152,7 +152,7 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
152 if (dwc2_is_host_mode(hsotg)) 152 if (dwc2_is_host_mode(hsotg))
153 dwc2_init_fs_ls_pclk_sel(hsotg); 153 dwc2_init_fs_ls_pclk_sel(hsotg);
154 154
155 if (hsotg->core_params->i2c_enable > 0) { 155 if (hsotg->params.i2c_enable > 0) {
156 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n"); 156 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n");
157 157
158 /* Program GUSBCFG.OtgUtmiFsSel to I2C */ 158 /* Program GUSBCFG.OtgUtmiFsSel to I2C */
@@ -189,20 +189,20 @@ static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
189 * so only program the first time. Do a soft reset immediately after 189 * so only program the first time. Do a soft reset immediately after
190 * setting phyif. 190 * setting phyif.
191 */ 191 */
192 switch (hsotg->core_params->phy_type) { 192 switch (hsotg->params.phy_type) {
193 case DWC2_PHY_TYPE_PARAM_ULPI: 193 case DWC2_PHY_TYPE_PARAM_ULPI:
194 /* ULPI interface */ 194 /* ULPI interface */
195 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n"); 195 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n");
196 usbcfg |= GUSBCFG_ULPI_UTMI_SEL; 196 usbcfg |= GUSBCFG_ULPI_UTMI_SEL;
197 usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL); 197 usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL);
198 if (hsotg->core_params->phy_ulpi_ddr > 0) 198 if (hsotg->params.phy_ulpi_ddr > 0)
199 usbcfg |= GUSBCFG_DDRSEL; 199 usbcfg |= GUSBCFG_DDRSEL;
200 break; 200 break;
201 case DWC2_PHY_TYPE_PARAM_UTMI: 201 case DWC2_PHY_TYPE_PARAM_UTMI:
202 /* UTMI+ interface */ 202 /* UTMI+ interface */
203 dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n"); 203 dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n");
204 usbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16); 204 usbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16);
205 if (hsotg->core_params->phy_utmi_width == 16) 205 if (hsotg->params.phy_utmi_width == 16)
206 usbcfg |= GUSBCFG_PHYIF16; 206 usbcfg |= GUSBCFG_PHYIF16;
207 break; 207 break;
208 default: 208 default:
@@ -230,9 +230,10 @@ static int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
230 u32 usbcfg; 230 u32 usbcfg;
231 int retval = 0; 231 int retval = 0;
232 232
233 if (hsotg->core_params->speed == DWC2_SPEED_PARAM_FULL && 233 if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
234 hsotg->core_params->phy_type == DWC2_PHY_TYPE_PARAM_FS) { 234 hsotg->params.speed == DWC2_SPEED_PARAM_LOW) &&
235 /* If FS mode with FS PHY */ 235 hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS) {
236 /* If FS/LS mode with FS/LS PHY */
236 retval = dwc2_fs_phy_init(hsotg, select_phy); 237 retval = dwc2_fs_phy_init(hsotg, select_phy);
237 if (retval) 238 if (retval)
238 return retval; 239 return retval;
@@ -245,7 +246,7 @@ static int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
245 246
246 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && 247 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
247 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && 248 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
248 hsotg->core_params->ulpi_fs_ls > 0) { 249 hsotg->params.ulpi_fs_ls > 0) {
249 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n"); 250 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n");
250 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); 251 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
251 usbcfg |= GUSBCFG_ULPI_FS_LS; 252 usbcfg |= GUSBCFG_ULPI_FS_LS;
@@ -272,9 +273,9 @@ static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
272 273
273 case GHWCFG2_INT_DMA_ARCH: 274 case GHWCFG2_INT_DMA_ARCH:
274 dev_dbg(hsotg->dev, "Internal DMA Mode\n"); 275 dev_dbg(hsotg->dev, "Internal DMA Mode\n");
275 if (hsotg->core_params->ahbcfg != -1) { 276 if (hsotg->params.ahbcfg != -1) {
276 ahbcfg &= GAHBCFG_CTRL_MASK; 277 ahbcfg &= GAHBCFG_CTRL_MASK;
277 ahbcfg |= hsotg->core_params->ahbcfg & 278 ahbcfg |= hsotg->params.ahbcfg &
278 ~GAHBCFG_CTRL_MASK; 279 ~GAHBCFG_CTRL_MASK;
279 } 280 }
280 break; 281 break;
@@ -285,21 +286,21 @@ static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
285 break; 286 break;
286 } 287 }
287 288
288 dev_dbg(hsotg->dev, "dma_enable:%d dma_desc_enable:%d\n", 289 dev_dbg(hsotg->dev, "host_dma:%d dma_desc_enable:%d\n",
289 hsotg->core_params->dma_enable, 290 hsotg->params.host_dma,
290 hsotg->core_params->dma_desc_enable); 291 hsotg->params.dma_desc_enable);
291 292
292 if (hsotg->core_params->dma_enable > 0) { 293 if (hsotg->params.host_dma > 0) {
293 if (hsotg->core_params->dma_desc_enable > 0) 294 if (hsotg->params.dma_desc_enable > 0)
294 dev_dbg(hsotg->dev, "Using Descriptor DMA mode\n"); 295 dev_dbg(hsotg->dev, "Using Descriptor DMA mode\n");
295 else 296 else
296 dev_dbg(hsotg->dev, "Using Buffer DMA mode\n"); 297 dev_dbg(hsotg->dev, "Using Buffer DMA mode\n");
297 } else { 298 } else {
298 dev_dbg(hsotg->dev, "Using Slave mode\n"); 299 dev_dbg(hsotg->dev, "Using Slave mode\n");
299 hsotg->core_params->dma_desc_enable = 0; 300 hsotg->params.dma_desc_enable = 0;
300 } 301 }
301 302
302 if (hsotg->core_params->dma_enable > 0) 303 if (hsotg->params.host_dma > 0)
303 ahbcfg |= GAHBCFG_DMA_EN; 304 ahbcfg |= GAHBCFG_DMA_EN;
304 305
305 dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG); 306 dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG);
@@ -316,10 +317,10 @@ static void dwc2_gusbcfg_init(struct dwc2_hsotg *hsotg)
316 317
317 switch (hsotg->hw_params.op_mode) { 318 switch (hsotg->hw_params.op_mode) {
318 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE: 319 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
319 if (hsotg->core_params->otg_cap == 320 if (hsotg->params.otg_cap ==
320 DWC2_CAP_PARAM_HNP_SRP_CAPABLE) 321 DWC2_CAP_PARAM_HNP_SRP_CAPABLE)
321 usbcfg |= GUSBCFG_HNPCAP; 322 usbcfg |= GUSBCFG_HNPCAP;
322 if (hsotg->core_params->otg_cap != 323 if (hsotg->params.otg_cap !=
323 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE) 324 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE)
324 usbcfg |= GUSBCFG_SRPCAP; 325 usbcfg |= GUSBCFG_SRPCAP;
325 break; 326 break;
@@ -327,7 +328,7 @@ static void dwc2_gusbcfg_init(struct dwc2_hsotg *hsotg)
327 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE: 328 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
328 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE: 329 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
329 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST: 330 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
330 if (hsotg->core_params->otg_cap != 331 if (hsotg->params.otg_cap !=
331 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE) 332 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE)
332 usbcfg |= GUSBCFG_SRPCAP; 333 usbcfg |= GUSBCFG_SRPCAP;
333 break; 334 break;
@@ -390,7 +391,7 @@ static void dwc2_disable_host_interrupts(struct dwc2_hsotg *hsotg)
390 */ 391 */
391static void dwc2_calculate_dynamic_fifo(struct dwc2_hsotg *hsotg) 392static void dwc2_calculate_dynamic_fifo(struct dwc2_hsotg *hsotg)
392{ 393{
393 struct dwc2_core_params *params = hsotg->core_params; 394 struct dwc2_core_params *params = &hsotg->params;
394 struct dwc2_hw_params *hw = &hsotg->hw_params; 395 struct dwc2_hw_params *hw = &hsotg->hw_params;
395 u32 rxfsiz, nptxfsiz, ptxfsiz, total_fifo_size; 396 u32 rxfsiz, nptxfsiz, ptxfsiz, total_fifo_size;
396 397
@@ -449,7 +450,7 @@ static void dwc2_calculate_dynamic_fifo(struct dwc2_hsotg *hsotg)
449 450
450static void dwc2_config_fifos(struct dwc2_hsotg *hsotg) 451static void dwc2_config_fifos(struct dwc2_hsotg *hsotg)
451{ 452{
452 struct dwc2_core_params *params = hsotg->core_params; 453 struct dwc2_core_params *params = &hsotg->params;
453 u32 nptxfsiz, hptxfsiz, dfifocfg, grxfsiz; 454 u32 nptxfsiz, hptxfsiz, dfifocfg, grxfsiz;
454 455
455 if (!params->enable_dynamic_fifo) 456 if (!params->enable_dynamic_fifo)
@@ -490,7 +491,7 @@ static void dwc2_config_fifos(struct dwc2_hsotg *hsotg)
490 dev_dbg(hsotg->dev, "new hptxfsiz=%08x\n", 491 dev_dbg(hsotg->dev, "new hptxfsiz=%08x\n",
491 dwc2_readl(hsotg->regs + HPTXFSIZ)); 492 dwc2_readl(hsotg->regs + HPTXFSIZ));
492 493
493 if (hsotg->core_params->en_multiple_tx_fifo > 0 && 494 if (hsotg->params.en_multiple_tx_fifo > 0 &&
494 hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) { 495 hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) {
495 /* 496 /*
496 * Global DFIFOCFG calculation for Host mode - 497 * Global DFIFOCFG calculation for Host mode -
@@ -598,7 +599,7 @@ static void dwc2_dump_channel_info(struct dwc2_hsotg *hsotg,
598 struct dwc2_host_chan *chan) 599 struct dwc2_host_chan *chan)
599{ 600{
600#ifdef VERBOSE_DEBUG 601#ifdef VERBOSE_DEBUG
601 int num_channels = hsotg->core_params->host_channels; 602 int num_channels = hsotg->params.host_channels;
602 struct dwc2_qh *qh; 603 struct dwc2_qh *qh;
603 u32 hcchar; 604 u32 hcchar;
604 u32 hcsplt; 605 u32 hcsplt;
@@ -648,6 +649,35 @@ static void dwc2_dump_channel_info(struct dwc2_hsotg *hsotg,
648#endif /* VERBOSE_DEBUG */ 649#endif /* VERBOSE_DEBUG */
649} 650}
650 651
652static int _dwc2_hcd_start(struct usb_hcd *hcd);
653
654static void dwc2_host_start(struct dwc2_hsotg *hsotg)
655{
656 struct usb_hcd *hcd = dwc2_hsotg_to_hcd(hsotg);
657
658 hcd->self.is_b_host = dwc2_hcd_is_b_host(hsotg);
659 _dwc2_hcd_start(hcd);
660}
661
662static void dwc2_host_disconnect(struct dwc2_hsotg *hsotg)
663{
664 struct usb_hcd *hcd = dwc2_hsotg_to_hcd(hsotg);
665
666 hcd->self.is_b_host = 0;
667}
668
669static void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context,
670 int *hub_addr, int *hub_port)
671{
672 struct urb *urb = context;
673
674 if (urb->dev->tt)
675 *hub_addr = urb->dev->tt->hub->devnum;
676 else
677 *hub_addr = 0;
678 *hub_port = urb->dev->ttport;
679}
680
651/* 681/*
652 * ========================================================================= 682 * =========================================================================
653 * Low Level Host Channel Access Functions 683 * Low Level Host Channel Access Functions
@@ -741,7 +771,7 @@ static void dwc2_hc_enable_dma_ints(struct dwc2_hsotg *hsotg,
741 * For Descriptor DMA mode core halts the channel on AHB error. 771 * For Descriptor DMA mode core halts the channel on AHB error.
742 * Interrupt is not required. 772 * Interrupt is not required.
743 */ 773 */
744 if (hsotg->core_params->dma_desc_enable <= 0) { 774 if (hsotg->params.dma_desc_enable <= 0) {
745 if (dbg_hc(chan)) 775 if (dbg_hc(chan))
746 dev_vdbg(hsotg->dev, "desc DMA disabled\n"); 776 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
747 hcintmsk |= HCINTMSK_AHBERR; 777 hcintmsk |= HCINTMSK_AHBERR;
@@ -774,7 +804,7 @@ static void dwc2_hc_enable_ints(struct dwc2_hsotg *hsotg,
774{ 804{
775 u32 intmsk; 805 u32 intmsk;
776 806
777 if (hsotg->core_params->dma_enable > 0) { 807 if (hsotg->params.host_dma > 0) {
778 if (dbg_hc(chan)) 808 if (dbg_hc(chan))
779 dev_vdbg(hsotg->dev, "DMA enabled\n"); 809 dev_vdbg(hsotg->dev, "DMA enabled\n");
780 dwc2_hc_enable_dma_ints(hsotg, chan); 810 dwc2_hc_enable_dma_ints(hsotg, chan);
@@ -994,7 +1024,7 @@ void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
994 1024
995 /* No need to set the bit in DDMA for disabling the channel */ 1025 /* No need to set the bit in DDMA for disabling the channel */
996 /* TODO check it everywhere channel is disabled */ 1026 /* TODO check it everywhere channel is disabled */
997 if (hsotg->core_params->dma_desc_enable <= 0) { 1027 if (hsotg->params.dma_desc_enable <= 0) {
998 if (dbg_hc(chan)) 1028 if (dbg_hc(chan))
999 dev_vdbg(hsotg->dev, "desc DMA disabled\n"); 1029 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
1000 hcchar |= HCCHAR_CHENA; 1030 hcchar |= HCCHAR_CHENA;
@@ -1004,7 +1034,7 @@ void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
1004 } 1034 }
1005 hcchar |= HCCHAR_CHDIS; 1035 hcchar |= HCCHAR_CHDIS;
1006 1036
1007 if (hsotg->core_params->dma_enable <= 0) { 1037 if (hsotg->params.host_dma <= 0) {
1008 if (dbg_hc(chan)) 1038 if (dbg_hc(chan))
1009 dev_vdbg(hsotg->dev, "DMA not enabled\n"); 1039 dev_vdbg(hsotg->dev, "DMA not enabled\n");
1010 hcchar |= HCCHAR_CHENA; 1040 hcchar |= HCCHAR_CHENA;
@@ -1143,7 +1173,7 @@ static void dwc2_hc_set_even_odd_frame(struct dwc2_hsotg *hsotg,
1143 fifo_space = (dwc2_readl(hsotg->regs + HPTXSTS) & 1173 fifo_space = (dwc2_readl(hsotg->regs + HPTXSTS) &
1144 TXSTS_FSPCAVAIL_MASK) >> TXSTS_FSPCAVAIL_SHIFT; 1174 TXSTS_FSPCAVAIL_MASK) >> TXSTS_FSPCAVAIL_SHIFT;
1145 bytes_in_fifo = sizeof(u32) * 1175 bytes_in_fifo = sizeof(u32) *
1146 (hsotg->core_params->host_perio_tx_fifo_size - 1176 (hsotg->params.host_perio_tx_fifo_size -
1147 fifo_space); 1177 fifo_space);
1148 1178
1149 /* 1179 /*
@@ -1339,8 +1369,8 @@ static void dwc2_hc_do_ping(struct dwc2_hsotg *hsotg,
1339static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg, 1369static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1340 struct dwc2_host_chan *chan) 1370 struct dwc2_host_chan *chan)
1341{ 1371{
1342 u32 max_hc_xfer_size = hsotg->core_params->max_transfer_size; 1372 u32 max_hc_xfer_size = hsotg->params.max_transfer_size;
1343 u16 max_hc_pkt_count = hsotg->core_params->max_packet_count; 1373 u16 max_hc_pkt_count = hsotg->params.max_packet_count;
1344 u32 hcchar; 1374 u32 hcchar;
1345 u32 hctsiz = 0; 1375 u32 hctsiz = 0;
1346 u16 num_packets; 1376 u16 num_packets;
@@ -1350,7 +1380,7 @@ static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1350 dev_vdbg(hsotg->dev, "%s()\n", __func__); 1380 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1351 1381
1352 if (chan->do_ping) { 1382 if (chan->do_ping) {
1353 if (hsotg->core_params->dma_enable <= 0) { 1383 if (hsotg->params.host_dma <= 0) {
1354 if (dbg_hc(chan)) 1384 if (dbg_hc(chan))
1355 dev_vdbg(hsotg->dev, "ping, no DMA\n"); 1385 dev_vdbg(hsotg->dev, "ping, no DMA\n");
1356 dwc2_hc_do_ping(hsotg, chan); 1386 dwc2_hc_do_ping(hsotg, chan);
@@ -1478,7 +1508,7 @@ static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1478 TSIZ_SC_MC_PID_SHIFT); 1508 TSIZ_SC_MC_PID_SHIFT);
1479 } 1509 }
1480 1510
1481 if (hsotg->core_params->dma_enable > 0) { 1511 if (hsotg->params.host_dma > 0) {
1482 dwc2_writel((u32)chan->xfer_dma, 1512 dwc2_writel((u32)chan->xfer_dma,
1483 hsotg->regs + HCDMA(chan->hc_num)); 1513 hsotg->regs + HCDMA(chan->hc_num));
1484 if (dbg_hc(chan)) 1514 if (dbg_hc(chan))
@@ -1521,7 +1551,7 @@ static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1521 chan->xfer_started = 1; 1551 chan->xfer_started = 1;
1522 chan->requests++; 1552 chan->requests++;
1523 1553
1524 if (hsotg->core_params->dma_enable <= 0 && 1554 if (hsotg->params.host_dma <= 0 &&
1525 !chan->ep_is_in && chan->xfer_len > 0) 1555 !chan->ep_is_in && chan->xfer_len > 0)
1526 /* Load OUT packet into the appropriate Tx FIFO */ 1556 /* Load OUT packet into the appropriate Tx FIFO */
1527 dwc2_hc_write_packet(hsotg, chan); 1557 dwc2_hc_write_packet(hsotg, chan);
@@ -1799,12 +1829,12 @@ void dwc2_hcd_start(struct dwc2_hsotg *hsotg)
1799/* Must be called with interrupt disabled and spinlock held */ 1829/* Must be called with interrupt disabled and spinlock held */
1800static void dwc2_hcd_cleanup_channels(struct dwc2_hsotg *hsotg) 1830static void dwc2_hcd_cleanup_channels(struct dwc2_hsotg *hsotg)
1801{ 1831{
1802 int num_channels = hsotg->core_params->host_channels; 1832 int num_channels = hsotg->params.host_channels;
1803 struct dwc2_host_chan *channel; 1833 struct dwc2_host_chan *channel;
1804 u32 hcchar; 1834 u32 hcchar;
1805 int i; 1835 int i;
1806 1836
1807 if (hsotg->core_params->dma_enable <= 0) { 1837 if (hsotg->params.host_dma <= 0) {
1808 /* Flush out any channel requests in slave mode */ 1838 /* Flush out any channel requests in slave mode */
1809 for (i = 0; i < num_channels; i++) { 1839 for (i = 0; i < num_channels; i++) {
1810 channel = hsotg->hc_ptr_array[i]; 1840 channel = hsotg->hc_ptr_array[i];
@@ -1840,9 +1870,9 @@ static void dwc2_hcd_cleanup_channels(struct dwc2_hsotg *hsotg)
1840 channel->qh = NULL; 1870 channel->qh = NULL;
1841 } 1871 }
1842 /* All channels have been freed, mark them available */ 1872 /* All channels have been freed, mark them available */
1843 if (hsotg->core_params->uframe_sched > 0) { 1873 if (hsotg->params.uframe_sched > 0) {
1844 hsotg->available_host_channels = 1874 hsotg->available_host_channels =
1845 hsotg->core_params->host_channels; 1875 hsotg->params.host_channels;
1846 } else { 1876 } else {
1847 hsotg->non_periodic_channels = 0; 1877 hsotg->non_periodic_channels = 0;
1848 hsotg->periodic_channels = 0; 1878 hsotg->periodic_channels = 0;
@@ -2077,7 +2107,7 @@ static int dwc2_hcd_urb_dequeue(struct dwc2_hsotg *hsotg,
2077 * Free the QTD and clean up the associated QH. Leave the QH in the 2107 * Free the QTD and clean up the associated QH. Leave the QH in the
2078 * schedule if it has any remaining QTDs. 2108 * schedule if it has any remaining QTDs.
2079 */ 2109 */
2080 if (hsotg->core_params->dma_desc_enable <= 0) { 2110 if (hsotg->params.dma_desc_enable <= 0) {
2081 u8 in_process = urb_qtd->in_process; 2111 u8 in_process = urb_qtd->in_process;
2082 2112
2083 dwc2_hcd_qtd_unlink_and_free(hsotg, urb_qtd, qh); 2113 dwc2_hcd_qtd_unlink_and_free(hsotg, urb_qtd, qh);
@@ -2185,13 +2215,13 @@ static int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup)
2185 2215
2186 /* Set ULPI External VBUS bit if needed */ 2216 /* Set ULPI External VBUS bit if needed */
2187 usbcfg &= ~GUSBCFG_ULPI_EXT_VBUS_DRV; 2217 usbcfg &= ~GUSBCFG_ULPI_EXT_VBUS_DRV;
2188 if (hsotg->core_params->phy_ulpi_ext_vbus == 2218 if (hsotg->params.phy_ulpi_ext_vbus ==
2189 DWC2_PHY_ULPI_EXTERNAL_VBUS) 2219 DWC2_PHY_ULPI_EXTERNAL_VBUS)
2190 usbcfg |= GUSBCFG_ULPI_EXT_VBUS_DRV; 2220 usbcfg |= GUSBCFG_ULPI_EXT_VBUS_DRV;
2191 2221
2192 /* Set external TS Dline pulsing bit if needed */ 2222 /* Set external TS Dline pulsing bit if needed */
2193 usbcfg &= ~GUSBCFG_TERMSELDLPULSE; 2223 usbcfg &= ~GUSBCFG_TERMSELDLPULSE;
2194 if (hsotg->core_params->ts_dline > 0) 2224 if (hsotg->params.ts_dline > 0)
2195 usbcfg |= GUSBCFG_TERMSELDLPULSE; 2225 usbcfg |= GUSBCFG_TERMSELDLPULSE;
2196 2226
2197 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG); 2227 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
@@ -2230,10 +2260,10 @@ static int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup)
2230 /* Program the GOTGCTL register */ 2260 /* Program the GOTGCTL register */
2231 otgctl = dwc2_readl(hsotg->regs + GOTGCTL); 2261 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
2232 otgctl &= ~GOTGCTL_OTGVER; 2262 otgctl &= ~GOTGCTL_OTGVER;
2233 if (hsotg->core_params->otg_ver > 0) 2263 if (hsotg->params.otg_ver > 0)
2234 otgctl |= GOTGCTL_OTGVER; 2264 otgctl |= GOTGCTL_OTGVER;
2235 dwc2_writel(otgctl, hsotg->regs + GOTGCTL); 2265 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
2236 dev_dbg(hsotg->dev, "OTG VER PARAM: %d\n", hsotg->core_params->otg_ver); 2266 dev_dbg(hsotg->dev, "OTG VER PARAM: %d\n", hsotg->params.otg_ver);
2237 2267
2238 /* Clear the SRP success bit for FS-I2c */ 2268 /* Clear the SRP success bit for FS-I2c */
2239 hsotg->srp_success = 0; 2269 hsotg->srp_success = 0;
@@ -2277,7 +2307,8 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2277 2307
2278 /* Initialize Host Configuration Register */ 2308 /* Initialize Host Configuration Register */
2279 dwc2_init_fs_ls_pclk_sel(hsotg); 2309 dwc2_init_fs_ls_pclk_sel(hsotg);
2280 if (hsotg->core_params->speed == DWC2_SPEED_PARAM_FULL) { 2310 if (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
2311 hsotg->params.speed == DWC2_SPEED_PARAM_LOW) {
2281 hcfg = dwc2_readl(hsotg->regs + HCFG); 2312 hcfg = dwc2_readl(hsotg->regs + HCFG);
2282 hcfg |= HCFG_FSLSSUPP; 2313 hcfg |= HCFG_FSLSSUPP;
2283 dwc2_writel(hcfg, hsotg->regs + HCFG); 2314 dwc2_writel(hcfg, hsotg->regs + HCFG);
@@ -2288,13 +2319,13 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2288 * runtime. This bit needs to be programmed during initial configuration 2319 * runtime. This bit needs to be programmed during initial configuration
2289 * and its value must not be changed during runtime. 2320 * and its value must not be changed during runtime.
2290 */ 2321 */
2291 if (hsotg->core_params->reload_ctl > 0) { 2322 if (hsotg->params.reload_ctl > 0) {
2292 hfir = dwc2_readl(hsotg->regs + HFIR); 2323 hfir = dwc2_readl(hsotg->regs + HFIR);
2293 hfir |= HFIR_RLDCTRL; 2324 hfir |= HFIR_RLDCTRL;
2294 dwc2_writel(hfir, hsotg->regs + HFIR); 2325 dwc2_writel(hfir, hsotg->regs + HFIR);
2295 } 2326 }
2296 2327
2297 if (hsotg->core_params->dma_desc_enable > 0) { 2328 if (hsotg->params.dma_desc_enable > 0) {
2298 u32 op_mode = hsotg->hw_params.op_mode; 2329 u32 op_mode = hsotg->hw_params.op_mode;
2299 2330
2300 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a || 2331 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a ||
@@ -2306,7 +2337,7 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2306 "Hardware does not support descriptor DMA mode -\n"); 2337 "Hardware does not support descriptor DMA mode -\n");
2307 dev_err(hsotg->dev, 2338 dev_err(hsotg->dev,
2308 "falling back to buffer DMA mode.\n"); 2339 "falling back to buffer DMA mode.\n");
2309 hsotg->core_params->dma_desc_enable = 0; 2340 hsotg->params.dma_desc_enable = 0;
2310 } else { 2341 } else {
2311 hcfg = dwc2_readl(hsotg->regs + HCFG); 2342 hcfg = dwc2_readl(hsotg->regs + HCFG);
2312 hcfg |= HCFG_DESCDMA; 2343 hcfg |= HCFG_DESCDMA;
@@ -2332,12 +2363,12 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2332 otgctl &= ~GOTGCTL_HSTSETHNPEN; 2363 otgctl &= ~GOTGCTL_HSTSETHNPEN;
2333 dwc2_writel(otgctl, hsotg->regs + GOTGCTL); 2364 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
2334 2365
2335 if (hsotg->core_params->dma_desc_enable <= 0) { 2366 if (hsotg->params.dma_desc_enable <= 0) {
2336 int num_channels, i; 2367 int num_channels, i;
2337 u32 hcchar; 2368 u32 hcchar;
2338 2369
2339 /* Flush out any leftover queued requests */ 2370 /* Flush out any leftover queued requests */
2340 num_channels = hsotg->core_params->host_channels; 2371 num_channels = hsotg->params.host_channels;
2341 for (i = 0; i < num_channels; i++) { 2372 for (i = 0; i < num_channels; i++) {
2342 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i)); 2373 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i));
2343 hcchar &= ~HCCHAR_CHENA; 2374 hcchar &= ~HCCHAR_CHENA;
@@ -2399,9 +2430,9 @@ static void dwc2_hcd_reinit(struct dwc2_hsotg *hsotg)
2399 hsotg->flags.d32 = 0; 2430 hsotg->flags.d32 = 0;
2400 hsotg->non_periodic_qh_ptr = &hsotg->non_periodic_sched_active; 2431 hsotg->non_periodic_qh_ptr = &hsotg->non_periodic_sched_active;
2401 2432
2402 if (hsotg->core_params->uframe_sched > 0) { 2433 if (hsotg->params.uframe_sched > 0) {
2403 hsotg->available_host_channels = 2434 hsotg->available_host_channels =
2404 hsotg->core_params->host_channels; 2435 hsotg->params.host_channels;
2405 } else { 2436 } else {
2406 hsotg->non_periodic_channels = 0; 2437 hsotg->non_periodic_channels = 0;
2407 hsotg->periodic_channels = 0; 2438 hsotg->periodic_channels = 0;
@@ -2415,7 +2446,7 @@ static void dwc2_hcd_reinit(struct dwc2_hsotg *hsotg)
2415 hc_list_entry) 2446 hc_list_entry)
2416 list_del_init(&chan->hc_list_entry); 2447 list_del_init(&chan->hc_list_entry);
2417 2448
2418 num_channels = hsotg->core_params->host_channels; 2449 num_channels = hsotg->params.host_channels;
2419 for (i = 0; i < num_channels; i++) { 2450 for (i = 0; i < num_channels; i++) {
2420 chan = hsotg->hc_ptr_array[i]; 2451 chan = hsotg->hc_ptr_array[i];
2421 list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list); 2452 list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list);
@@ -2457,7 +2488,7 @@ static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
2457 chan->do_ping = 0; 2488 chan->do_ping = 0;
2458 chan->ep_is_in = 0; 2489 chan->ep_is_in = 0;
2459 chan->data_pid_start = DWC2_HC_PID_SETUP; 2490 chan->data_pid_start = DWC2_HC_PID_SETUP;
2460 if (hsotg->core_params->dma_enable > 0) 2491 if (hsotg->params.host_dma > 0)
2461 chan->xfer_dma = urb->setup_dma; 2492 chan->xfer_dma = urb->setup_dma;
2462 else 2493 else
2463 chan->xfer_buf = urb->setup_packet; 2494 chan->xfer_buf = urb->setup_packet;
@@ -2484,7 +2515,7 @@ static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
2484 chan->do_ping = 0; 2515 chan->do_ping = 0;
2485 chan->data_pid_start = DWC2_HC_PID_DATA1; 2516 chan->data_pid_start = DWC2_HC_PID_DATA1;
2486 chan->xfer_len = 0; 2517 chan->xfer_len = 0;
2487 if (hsotg->core_params->dma_enable > 0) 2518 if (hsotg->params.host_dma > 0)
2488 chan->xfer_dma = hsotg->status_buf_dma; 2519 chan->xfer_dma = hsotg->status_buf_dma;
2489 else 2520 else
2490 chan->xfer_buf = hsotg->status_buf; 2521 chan->xfer_buf = hsotg->status_buf;
@@ -2502,13 +2533,13 @@ static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
2502 2533
2503 case USB_ENDPOINT_XFER_ISOC: 2534 case USB_ENDPOINT_XFER_ISOC:
2504 chan->ep_type = USB_ENDPOINT_XFER_ISOC; 2535 chan->ep_type = USB_ENDPOINT_XFER_ISOC;
2505 if (hsotg->core_params->dma_desc_enable > 0) 2536 if (hsotg->params.dma_desc_enable > 0)
2506 break; 2537 break;
2507 2538
2508 frame_desc = &urb->iso_descs[qtd->isoc_frame_index]; 2539 frame_desc = &urb->iso_descs[qtd->isoc_frame_index];
2509 frame_desc->status = 0; 2540 frame_desc->status = 0;
2510 2541
2511 if (hsotg->core_params->dma_enable > 0) { 2542 if (hsotg->params.host_dma > 0) {
2512 chan->xfer_dma = urb->dma; 2543 chan->xfer_dma = urb->dma;
2513 chan->xfer_dma += frame_desc->offset + 2544 chan->xfer_dma += frame_desc->offset +
2514 qtd->isoc_split_offset; 2545 qtd->isoc_split_offset;
@@ -2690,7 +2721,7 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
2690 !dwc2_hcd_is_pipe_in(&urb->pipe_info)) 2721 !dwc2_hcd_is_pipe_in(&urb->pipe_info))
2691 urb->actual_length = urb->length; 2722 urb->actual_length = urb->length;
2692 2723
2693 if (hsotg->core_params->dma_enable > 0) 2724 if (hsotg->params.host_dma > 0)
2694 chan->xfer_dma = urb->dma + urb->actual_length; 2725 chan->xfer_dma = urb->dma + urb->actual_length;
2695 else 2726 else
2696 chan->xfer_buf = (u8 *)urb->buf + urb->actual_length; 2727 chan->xfer_buf = (u8 *)urb->buf + urb->actual_length;
@@ -2715,7 +2746,7 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
2715 */ 2746 */
2716 chan->multi_count = dwc2_hb_mult(qh->maxp); 2747 chan->multi_count = dwc2_hb_mult(qh->maxp);
2717 2748
2718 if (hsotg->core_params->dma_desc_enable > 0) { 2749 if (hsotg->params.dma_desc_enable > 0) {
2719 chan->desc_list_addr = qh->desc_list_dma; 2750 chan->desc_list_addr = qh->desc_list_dma;
2720 chan->desc_list_sz = qh->desc_list_sz; 2751 chan->desc_list_sz = qh->desc_list_sz;
2721 } 2752 }
@@ -2752,7 +2783,7 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
2752 while (qh_ptr != &hsotg->periodic_sched_ready) { 2783 while (qh_ptr != &hsotg->periodic_sched_ready) {
2753 if (list_empty(&hsotg->free_hc_list)) 2784 if (list_empty(&hsotg->free_hc_list))
2754 break; 2785 break;
2755 if (hsotg->core_params->uframe_sched > 0) { 2786 if (hsotg->params.uframe_sched > 0) {
2756 if (hsotg->available_host_channels <= 1) 2787 if (hsotg->available_host_channels <= 1)
2757 break; 2788 break;
2758 hsotg->available_host_channels--; 2789 hsotg->available_host_channels--;
@@ -2776,17 +2807,17 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
2776 * schedule. Some free host channels may not be used if they are 2807 * schedule. Some free host channels may not be used if they are
2777 * reserved for periodic transfers. 2808 * reserved for periodic transfers.
2778 */ 2809 */
2779 num_channels = hsotg->core_params->host_channels; 2810 num_channels = hsotg->params.host_channels;
2780 qh_ptr = hsotg->non_periodic_sched_inactive.next; 2811 qh_ptr = hsotg->non_periodic_sched_inactive.next;
2781 while (qh_ptr != &hsotg->non_periodic_sched_inactive) { 2812 while (qh_ptr != &hsotg->non_periodic_sched_inactive) {
2782 if (hsotg->core_params->uframe_sched <= 0 && 2813 if (hsotg->params.uframe_sched <= 0 &&
2783 hsotg->non_periodic_channels >= num_channels - 2814 hsotg->non_periodic_channels >= num_channels -
2784 hsotg->periodic_channels) 2815 hsotg->periodic_channels)
2785 break; 2816 break;
2786 if (list_empty(&hsotg->free_hc_list)) 2817 if (list_empty(&hsotg->free_hc_list))
2787 break; 2818 break;
2788 qh = list_entry(qh_ptr, struct dwc2_qh, qh_list_entry); 2819 qh = list_entry(qh_ptr, struct dwc2_qh, qh_list_entry);
2789 if (hsotg->core_params->uframe_sched > 0) { 2820 if (hsotg->params.uframe_sched > 0) {
2790 if (hsotg->available_host_channels < 1) 2821 if (hsotg->available_host_channels < 1)
2791 break; 2822 break;
2792 hsotg->available_host_channels--; 2823 hsotg->available_host_channels--;
@@ -2808,7 +2839,7 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
2808 else 2839 else
2809 ret_val = DWC2_TRANSACTION_ALL; 2840 ret_val = DWC2_TRANSACTION_ALL;
2810 2841
2811 if (hsotg->core_params->uframe_sched <= 0) 2842 if (hsotg->params.uframe_sched <= 0)
2812 hsotg->non_periodic_channels++; 2843 hsotg->non_periodic_channels++;
2813 } 2844 }
2814 2845
@@ -2847,8 +2878,8 @@ static int dwc2_queue_transaction(struct dwc2_hsotg *hsotg,
2847 list_move_tail(&chan->split_order_list_entry, 2878 list_move_tail(&chan->split_order_list_entry,
2848 &hsotg->split_order); 2879 &hsotg->split_order);
2849 2880
2850 if (hsotg->core_params->dma_enable > 0) { 2881 if (hsotg->params.host_dma > 0) {
2851 if (hsotg->core_params->dma_desc_enable > 0) { 2882 if (hsotg->params.dma_desc_enable > 0) {
2852 if (!chan->xfer_started || 2883 if (!chan->xfer_started ||
2853 chan->ep_type == USB_ENDPOINT_XFER_ISOC) { 2884 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
2854 dwc2_hcd_start_xfer_ddma(hsotg, chan->qh); 2885 dwc2_hcd_start_xfer_ddma(hsotg, chan->qh);
@@ -2957,7 +2988,7 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
2957 * The flag prevents any halts to get into the request queue in 2988 * The flag prevents any halts to get into the request queue in
2958 * the middle of multiple high-bandwidth packets getting queued. 2989 * the middle of multiple high-bandwidth packets getting queued.
2959 */ 2990 */
2960 if (hsotg->core_params->dma_enable <= 0 && 2991 if (hsotg->params.host_dma <= 0 &&
2961 qh->channel->multi_count > 1) 2992 qh->channel->multi_count > 1)
2962 hsotg->queuing_high_bandwidth = 1; 2993 hsotg->queuing_high_bandwidth = 1;
2963 2994
@@ -2976,7 +3007,7 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
2976 * controller automatically handles multiple packets for 3007 * controller automatically handles multiple packets for
2977 * high-bandwidth transfers. 3008 * high-bandwidth transfers.
2978 */ 3009 */
2979 if (hsotg->core_params->dma_enable > 0 || status == 0 || 3010 if (hsotg->params.host_dma > 0 || status == 0 ||
2980 qh->channel->requests == qh->channel->multi_count) { 3011 qh->channel->requests == qh->channel->multi_count) {
2981 qh_ptr = qh_ptr->next; 3012 qh_ptr = qh_ptr->next;
2982 /* 3013 /*
@@ -2993,7 +3024,7 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
2993 3024
2994exit: 3025exit:
2995 if (no_queue_space || no_fifo_space || 3026 if (no_queue_space || no_fifo_space ||
2996 (hsotg->core_params->dma_enable <= 0 && 3027 (hsotg->params.host_dma <= 0 &&
2997 !list_empty(&hsotg->periodic_sched_assigned))) { 3028 !list_empty(&hsotg->periodic_sched_assigned))) {
2998 /* 3029 /*
2999 * May need to queue more transactions as the request 3030 * May need to queue more transactions as the request
@@ -3073,7 +3104,7 @@ static void dwc2_process_non_periodic_channels(struct dwc2_hsotg *hsotg)
3073 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS); 3104 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS);
3074 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> 3105 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >>
3075 TXSTS_QSPCAVAIL_SHIFT; 3106 TXSTS_QSPCAVAIL_SHIFT;
3076 if (hsotg->core_params->dma_enable <= 0 && qspcavail == 0) { 3107 if (hsotg->params.host_dma <= 0 && qspcavail == 0) {
3077 no_queue_space = 1; 3108 no_queue_space = 1;
3078 break; 3109 break;
3079 } 3110 }
@@ -3106,7 +3137,7 @@ next:
3106 hsotg->non_periodic_qh_ptr->next; 3137 hsotg->non_periodic_qh_ptr->next;
3107 } while (hsotg->non_periodic_qh_ptr != orig_qh_ptr); 3138 } while (hsotg->non_periodic_qh_ptr != orig_qh_ptr);
3108 3139
3109 if (hsotg->core_params->dma_enable <= 0) { 3140 if (hsotg->params.host_dma <= 0) {
3110 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS); 3141 tx_status = dwc2_readl(hsotg->regs + GNPTXSTS);
3111 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> 3142 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >>
3112 TXSTS_QSPCAVAIL_SHIFT; 3143 TXSTS_QSPCAVAIL_SHIFT;
@@ -3307,7 +3338,7 @@ static void dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)
3307 * If hibernation is supported, Phy clock will be suspended 3338 * If hibernation is supported, Phy clock will be suspended
3308 * after registers are backuped. 3339 * after registers are backuped.
3309 */ 3340 */
3310 if (!hsotg->core_params->hibernation) { 3341 if (!hsotg->params.hibernation) {
3311 /* Suspend the Phy Clock */ 3342 /* Suspend the Phy Clock */
3312 pcgctl = dwc2_readl(hsotg->regs + PCGCTL); 3343 pcgctl = dwc2_readl(hsotg->regs + PCGCTL);
3313 pcgctl |= PCGCTL_STOPPCLK; 3344 pcgctl |= PCGCTL_STOPPCLK;
@@ -3342,7 +3373,7 @@ static void dwc2_port_resume(struct dwc2_hsotg *hsotg)
3342 * If hibernation is supported, Phy clock is already resumed 3373 * If hibernation is supported, Phy clock is already resumed
3343 * after registers restore. 3374 * after registers restore.
3344 */ 3375 */
3345 if (!hsotg->core_params->hibernation) { 3376 if (!hsotg->params.hibernation) {
3346 pcgctl = dwc2_readl(hsotg->regs + PCGCTL); 3377 pcgctl = dwc2_readl(hsotg->regs + PCGCTL);
3347 pcgctl &= ~PCGCTL_STOPPCLK; 3378 pcgctl &= ~PCGCTL_STOPPCLK;
3348 dwc2_writel(pcgctl, hsotg->regs + PCGCTL); 3379 dwc2_writel(pcgctl, hsotg->regs + PCGCTL);
@@ -3569,7 +3600,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
3569 port_status |= USB_PORT_STAT_TEST; 3600 port_status |= USB_PORT_STAT_TEST;
3570 /* USB_PORT_FEAT_INDICATOR unsupported always 0 */ 3601 /* USB_PORT_FEAT_INDICATOR unsupported always 0 */
3571 3602
3572 if (hsotg->core_params->dma_desc_fs_enable) { 3603 if (hsotg->params.dma_desc_fs_enable) {
3573 /* 3604 /*
3574 * Enable descriptor DMA only if a full speed 3605 * Enable descriptor DMA only if a full speed
3575 * device is connected. 3606 * device is connected.
@@ -3583,7 +3614,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
3583 u32 hcfg; 3614 u32 hcfg;
3584 3615
3585 dev_info(hsotg->dev, "Enabling descriptor DMA mode\n"); 3616 dev_info(hsotg->dev, "Enabling descriptor DMA mode\n");
3586 hsotg->core_params->dma_desc_enable = 1; 3617 hsotg->params.dma_desc_enable = 1;
3587 hcfg = dwc2_readl(hsotg->regs + HCFG); 3618 hcfg = dwc2_readl(hsotg->regs + HCFG);
3588 hcfg |= HCFG_DESCDMA; 3619 hcfg |= HCFG_DESCDMA;
3589 dwc2_writel(hcfg, hsotg->regs + HCFG); 3620 dwc2_writel(hcfg, hsotg->regs + HCFG);
@@ -3824,7 +3855,7 @@ void dwc2_hcd_dump_state(struct dwc2_hsotg *hsotg)
3824 u32 p_tx_status; 3855 u32 p_tx_status;
3825 int i; 3856 int i;
3826 3857
3827 num_channels = hsotg->core_params->host_channels; 3858 num_channels = hsotg->params.host_channels;
3828 dev_dbg(hsotg->dev, "\n"); 3859 dev_dbg(hsotg->dev, "\n");
3829 dev_dbg(hsotg->dev, 3860 dev_dbg(hsotg->dev,
3830 "************************************************************\n"); 3861 "************************************************************\n");
@@ -4020,35 +4051,6 @@ static struct dwc2_hsotg *dwc2_hcd_to_hsotg(struct usb_hcd *hcd)
4020 return p->hsotg; 4051 return p->hsotg;
4021} 4052}
4022 4053
4023static int _dwc2_hcd_start(struct usb_hcd *hcd);
4024
4025void dwc2_host_start(struct dwc2_hsotg *hsotg)
4026{
4027 struct usb_hcd *hcd = dwc2_hsotg_to_hcd(hsotg);
4028
4029 hcd->self.is_b_host = dwc2_hcd_is_b_host(hsotg);
4030 _dwc2_hcd_start(hcd);
4031}
4032
4033void dwc2_host_disconnect(struct dwc2_hsotg *hsotg)
4034{
4035 struct usb_hcd *hcd = dwc2_hsotg_to_hcd(hsotg);
4036
4037 hcd->self.is_b_host = 0;
4038}
4039
4040void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr,
4041 int *hub_port)
4042{
4043 struct urb *urb = context;
4044
4045 if (urb->dev->tt)
4046 *hub_addr = urb->dev->tt->hub->devnum;
4047 else
4048 *hub_addr = 0;
4049 *hub_port = urb->dev->ttport;
4050}
4051
4052/** 4054/**
4053 * dwc2_host_get_tt_info() - Get the dwc2_tt associated with context 4055 * dwc2_host_get_tt_info() - Get the dwc2_tt associated with context
4054 * 4056 *
@@ -4365,7 +4367,7 @@ static int _dwc2_hcd_suspend(struct usb_hcd *hcd)
4365 if (!HCD_HW_ACCESSIBLE(hcd)) 4367 if (!HCD_HW_ACCESSIBLE(hcd))
4366 goto unlock; 4368 goto unlock;
4367 4369
4368 if (!hsotg->core_params->hibernation) 4370 if (!hsotg->params.hibernation)
4369 goto skip_power_saving; 4371 goto skip_power_saving;
4370 4372
4371 /* 4373 /*
@@ -4417,7 +4419,7 @@ static int _dwc2_hcd_resume(struct usb_hcd *hcd)
4417 if (hsotg->lx_state != DWC2_L2) 4419 if (hsotg->lx_state != DWC2_L2)
4418 goto unlock; 4420 goto unlock;
4419 4421
4420 if (!hsotg->core_params->hibernation) { 4422 if (!hsotg->params.hibernation) {
4421 hsotg->lx_state = DWC2_L0; 4423 hsotg->lx_state = DWC2_L0;
4422 goto unlock; 4424 goto unlock;
4423 } 4425 }
@@ -4510,9 +4512,6 @@ static void dwc2_dump_urb_info(struct usb_hcd *hcd, struct urb *urb,
4510 case PIPE_ISOCHRONOUS: 4512 case PIPE_ISOCHRONOUS:
4511 pipetype = "ISOCHRONOUS"; 4513 pipetype = "ISOCHRONOUS";
4512 break; 4514 break;
4513 default:
4514 pipetype = "UNKNOWN";
4515 break;
4516 } 4515 }
4517 4516
4518 dev_vdbg(hsotg->dev, " Endpoint type: %s %s (%s)\n", pipetype, 4517 dev_vdbg(hsotg->dev, " Endpoint type: %s %s (%s)\n", pipetype,
@@ -4609,8 +4608,6 @@ static int _dwc2_hcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
4609 case PIPE_INTERRUPT: 4608 case PIPE_INTERRUPT:
4610 ep_type = USB_ENDPOINT_XFER_INT; 4609 ep_type = USB_ENDPOINT_XFER_INT;
4611 break; 4610 break;
4612 default:
4613 dev_warn(hsotg->dev, "Wrong ep type\n");
4614 } 4611 }
4615 4612
4616 dwc2_urb = dwc2_hcd_urb_alloc(hsotg, urb->number_of_packets, 4613 dwc2_urb = dwc2_hcd_urb_alloc(hsotg, urb->number_of_packets,
@@ -4919,7 +4916,7 @@ static void dwc2_hcd_free(struct dwc2_hsotg *hsotg)
4919 } 4916 }
4920 } 4917 }
4921 4918
4922 if (hsotg->core_params->dma_enable > 0) { 4919 if (hsotg->params.host_dma > 0) {
4923 if (hsotg->status_buf) { 4920 if (hsotg->status_buf) {
4924 dma_free_coherent(hsotg->dev, DWC2_HCD_STATUS_BUF_SIZE, 4921 dma_free_coherent(hsotg->dev, DWC2_HCD_STATUS_BUF_SIZE,
4925 hsotg->status_buf, 4922 hsotg->status_buf,
@@ -4999,16 +4996,16 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
4999 hsotg->last_frame_num = HFNUM_MAX_FRNUM; 4996 hsotg->last_frame_num = HFNUM_MAX_FRNUM;
5000 4997
5001 /* Check if the bus driver or platform code has setup a dma_mask */ 4998 /* Check if the bus driver or platform code has setup a dma_mask */
5002 if (hsotg->core_params->dma_enable > 0 && 4999 if (hsotg->params.host_dma > 0 &&
5003 hsotg->dev->dma_mask == NULL) { 5000 hsotg->dev->dma_mask == NULL) {
5004 dev_warn(hsotg->dev, 5001 dev_warn(hsotg->dev,
5005 "dma_mask not set, disabling DMA\n"); 5002 "dma_mask not set, disabling DMA\n");
5006 hsotg->core_params->dma_enable = 0; 5003 hsotg->params.host_dma = 0;
5007 hsotg->core_params->dma_desc_enable = 0; 5004 hsotg->params.dma_desc_enable = 0;
5008 } 5005 }
5009 5006
5010 /* Set device flags indicating whether the HCD supports DMA */ 5007 /* Set device flags indicating whether the HCD supports DMA */
5011 if (hsotg->core_params->dma_enable > 0) { 5008 if (hsotg->params.host_dma > 0) {
5012 if (dma_set_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0) 5009 if (dma_set_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0)
5013 dev_warn(hsotg->dev, "can't set DMA mask\n"); 5010 dev_warn(hsotg->dev, "can't set DMA mask\n");
5014 if (dma_set_coherent_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0) 5011 if (dma_set_coherent_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0)
@@ -5019,7 +5016,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5019 if (!hcd) 5016 if (!hcd)
5020 goto error1; 5017 goto error1;
5021 5018
5022 if (hsotg->core_params->dma_enable <= 0) 5019 if (hsotg->params.host_dma <= 0)
5023 hcd->self.uses_dma = 0; 5020 hcd->self.uses_dma = 0;
5024 5021
5025 hcd->has_tt = 1; 5022 hcd->has_tt = 1;
@@ -5067,7 +5064,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5067 * in the controller. Initialize the channel descriptor array. 5064 * in the controller. Initialize the channel descriptor array.
5068 */ 5065 */
5069 INIT_LIST_HEAD(&hsotg->free_hc_list); 5066 INIT_LIST_HEAD(&hsotg->free_hc_list);
5070 num_channels = hsotg->core_params->host_channels; 5067 num_channels = hsotg->params.host_channels;
5071 memset(&hsotg->hc_ptr_array[0], 0, sizeof(hsotg->hc_ptr_array)); 5068 memset(&hsotg->hc_ptr_array[0], 0, sizeof(hsotg->hc_ptr_array));
5072 5069
5073 for (i = 0; i < num_channels; i++) { 5070 for (i = 0; i < num_channels; i++) {
@@ -5091,7 +5088,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5091 * done after usb_add_hcd since that function allocates the DMA buffer 5088 * done after usb_add_hcd since that function allocates the DMA buffer
5092 * pool. 5089 * pool.
5093 */ 5090 */
5094 if (hsotg->core_params->dma_enable > 0) 5091 if (hsotg->params.host_dma > 0)
5095 hsotg->status_buf = dma_alloc_coherent(hsotg->dev, 5092 hsotg->status_buf = dma_alloc_coherent(hsotg->dev,
5096 DWC2_HCD_STATUS_BUF_SIZE, 5093 DWC2_HCD_STATUS_BUF_SIZE,
5097 &hsotg->status_buf_dma, GFP_KERNEL); 5094 &hsotg->status_buf_dma, GFP_KERNEL);
@@ -5107,10 +5104,10 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5107 * DMA mode. 5104 * DMA mode.
5108 * Alignment must be set to 512 bytes. 5105 * Alignment must be set to 512 bytes.
5109 */ 5106 */
5110 if (hsotg->core_params->dma_desc_enable || 5107 if (hsotg->params.dma_desc_enable ||
5111 hsotg->core_params->dma_desc_fs_enable) { 5108 hsotg->params.dma_desc_fs_enable) {
5112 hsotg->desc_gen_cache = kmem_cache_create("dwc2-gen-desc", 5109 hsotg->desc_gen_cache = kmem_cache_create("dwc2-gen-desc",
5113 sizeof(struct dwc2_hcd_dma_desc) * 5110 sizeof(struct dwc2_dma_desc) *
5114 MAX_DMA_DESC_NUM_GENERIC, 512, SLAB_CACHE_DMA, 5111 MAX_DMA_DESC_NUM_GENERIC, 512, SLAB_CACHE_DMA,
5115 NULL); 5112 NULL);
5116 if (!hsotg->desc_gen_cache) { 5113 if (!hsotg->desc_gen_cache) {
@@ -5121,12 +5118,12 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5121 * Disable descriptor dma mode since it will not be 5118 * Disable descriptor dma mode since it will not be
5122 * usable. 5119 * usable.
5123 */ 5120 */
5124 hsotg->core_params->dma_desc_enable = 0; 5121 hsotg->params.dma_desc_enable = 0;
5125 hsotg->core_params->dma_desc_fs_enable = 0; 5122 hsotg->params.dma_desc_fs_enable = 0;
5126 } 5123 }
5127 5124
5128 hsotg->desc_hsisoc_cache = kmem_cache_create("dwc2-hsisoc-desc", 5125 hsotg->desc_hsisoc_cache = kmem_cache_create("dwc2-hsisoc-desc",
5129 sizeof(struct dwc2_hcd_dma_desc) * 5126 sizeof(struct dwc2_dma_desc) *
5130 MAX_DMA_DESC_NUM_HS_ISOC, 512, 0, NULL); 5127 MAX_DMA_DESC_NUM_HS_ISOC, 512, 0, NULL);
5131 if (!hsotg->desc_hsisoc_cache) { 5128 if (!hsotg->desc_hsisoc_cache) {
5132 dev_err(hsotg->dev, 5129 dev_err(hsotg->dev,
@@ -5138,8 +5135,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
5138 * Disable descriptor dma mode since it will not be 5135 * Disable descriptor dma mode since it will not be
5139 * usable. 5136 * usable.
5140 */ 5137 */
5141 hsotg->core_params->dma_desc_enable = 0; 5138 hsotg->params.dma_desc_enable = 0;
5142 hsotg->core_params->dma_desc_fs_enable = 0; 5139 hsotg->params.dma_desc_fs_enable = 0;
5143 } 5140 }
5144 } 5141 }
5145 5142
@@ -5184,7 +5181,6 @@ error3:
5184error2: 5181error2:
5185 usb_put_hcd(hcd); 5182 usb_put_hcd(hcd);
5186error1: 5183error1:
5187 kfree(hsotg->core_params);
5188 5184
5189#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS 5185#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS
5190 kfree(hsotg->last_frame_num_array); 5186 kfree(hsotg->last_frame_num_array);
@@ -5250,7 +5246,7 @@ int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
5250 hr = &hsotg->hr_backup; 5246 hr = &hsotg->hr_backup;
5251 hr->hcfg = dwc2_readl(hsotg->regs + HCFG); 5247 hr->hcfg = dwc2_readl(hsotg->regs + HCFG);
5252 hr->haintmsk = dwc2_readl(hsotg->regs + HAINTMSK); 5248 hr->haintmsk = dwc2_readl(hsotg->regs + HAINTMSK);
5253 for (i = 0; i < hsotg->core_params->host_channels; ++i) 5249 for (i = 0; i < hsotg->params.host_channels; ++i)
5254 hr->hcintmsk[i] = dwc2_readl(hsotg->regs + HCINTMSK(i)); 5250 hr->hcintmsk[i] = dwc2_readl(hsotg->regs + HCINTMSK(i));
5255 5251
5256 hr->hprt0 = dwc2_read_hprt0(hsotg); 5252 hr->hprt0 = dwc2_read_hprt0(hsotg);
@@ -5286,7 +5282,7 @@ int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg)
5286 dwc2_writel(hr->hcfg, hsotg->regs + HCFG); 5282 dwc2_writel(hr->hcfg, hsotg->regs + HCFG);
5287 dwc2_writel(hr->haintmsk, hsotg->regs + HAINTMSK); 5283 dwc2_writel(hr->haintmsk, hsotg->regs + HAINTMSK);
5288 5284
5289 for (i = 0; i < hsotg->core_params->host_channels; ++i) 5285 for (i = 0; i < hsotg->params.host_channels; ++i)
5290 dwc2_writel(hr->hcintmsk[i], hsotg->regs + HCINTMSK(i)); 5286 dwc2_writel(hr->hcintmsk[i], hsotg->regs + HCINTMSK(i));
5291 5287
5292 dwc2_writel(hr->hprt0, hsotg->regs + HPRT0); 5288 dwc2_writel(hr->hprt0, hsotg->regs + HPRT0);
diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
index 7758bfb644ff..1ed5fa2beff4 100644
--- a/drivers/usb/dwc2/hcd.h
+++ b/drivers/usb/dwc2/hcd.h
@@ -348,7 +348,7 @@ struct dwc2_qh {
348 struct list_head qtd_list; 348 struct list_head qtd_list;
349 struct dwc2_host_chan *channel; 349 struct dwc2_host_chan *channel;
350 struct list_head qh_list_entry; 350 struct list_head qh_list_entry;
351 struct dwc2_hcd_dma_desc *desc_list; 351 struct dwc2_dma_desc *desc_list;
352 dma_addr_t desc_list_dma; 352 dma_addr_t desc_list_dma;
353 u32 desc_list_sz; 353 u32 desc_list_sz;
354 u32 *n_bytes; 354 u32 *n_bytes;
@@ -793,11 +793,6 @@ extern void dwc2_hcd_dump_frrem(struct dwc2_hsotg *hsotg);
793#define URB_SEND_ZERO_PACKET 0x2 793#define URB_SEND_ZERO_PACKET 0x2
794 794
795/* Host driver callbacks */ 795/* Host driver callbacks */
796
797extern void dwc2_host_start(struct dwc2_hsotg *hsotg);
798extern void dwc2_host_disconnect(struct dwc2_hsotg *hsotg);
799extern void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context,
800 int *hub_addr, int *hub_port);
801extern struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg, 796extern struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg,
802 void *context, gfp_t mem_flags, 797 void *context, gfp_t mem_flags,
803 int *ttport); 798 int *ttport);
diff --git a/drivers/usb/dwc2/hcd_ddma.c b/drivers/usb/dwc2/hcd_ddma.c
index 0e1d42b5dec5..cf0367768cb3 100644
--- a/drivers/usb/dwc2/hcd_ddma.c
+++ b/drivers/usb/dwc2/hcd_ddma.c
@@ -95,7 +95,7 @@ static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
95 else 95 else
96 desc_cache = hsotg->desc_gen_cache; 96 desc_cache = hsotg->desc_gen_cache;
97 97
98 qh->desc_list_sz = sizeof(struct dwc2_hcd_dma_desc) * 98 qh->desc_list_sz = sizeof(struct dwc2_dma_desc) *
99 dwc2_max_desc_num(qh); 99 dwc2_max_desc_num(qh);
100 100
101 qh->desc_list = kmem_cache_zalloc(desc_cache, flags | GFP_DMA); 101 qh->desc_list = kmem_cache_zalloc(desc_cache, flags | GFP_DMA);
@@ -297,7 +297,7 @@ static void dwc2_release_channel_ddma(struct dwc2_hsotg *hsotg,
297 struct dwc2_host_chan *chan = qh->channel; 297 struct dwc2_host_chan *chan = qh->channel;
298 298
299 if (dwc2_qh_is_non_per(qh)) { 299 if (dwc2_qh_is_non_per(qh)) {
300 if (hsotg->core_params->uframe_sched > 0) 300 if (hsotg->params.uframe_sched > 0)
301 hsotg->available_host_channels++; 301 hsotg->available_host_channels++;
302 else 302 else
303 hsotg->non_periodic_channels--; 303 hsotg->non_periodic_channels--;
@@ -322,7 +322,7 @@ static void dwc2_release_channel_ddma(struct dwc2_hsotg *hsotg,
322 qh->ntd = 0; 322 qh->ntd = 0;
323 323
324 if (qh->desc_list) 324 if (qh->desc_list)
325 memset(qh->desc_list, 0, sizeof(struct dwc2_hcd_dma_desc) * 325 memset(qh->desc_list, 0, sizeof(struct dwc2_dma_desc) *
326 dwc2_max_desc_num(qh)); 326 dwc2_max_desc_num(qh));
327} 327}
328 328
@@ -404,7 +404,7 @@ void dwc2_hcd_qh_free_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
404 404
405 if ((qh->ep_type == USB_ENDPOINT_XFER_ISOC || 405 if ((qh->ep_type == USB_ENDPOINT_XFER_ISOC ||
406 qh->ep_type == USB_ENDPOINT_XFER_INT) && 406 qh->ep_type == USB_ENDPOINT_XFER_INT) &&
407 (hsotg->core_params->uframe_sched > 0 || 407 (hsotg->params.uframe_sched > 0 ||
408 !hsotg->periodic_channels) && hsotg->frame_list) { 408 !hsotg->periodic_channels) && hsotg->frame_list) {
409 dwc2_per_sched_disable(hsotg); 409 dwc2_per_sched_disable(hsotg);
410 dwc2_frame_list_free(hsotg); 410 dwc2_frame_list_free(hsotg);
@@ -542,7 +542,7 @@ static void dwc2_fill_host_isoc_dma_desc(struct dwc2_hsotg *hsotg,
542 struct dwc2_qh *qh, u32 max_xfer_size, 542 struct dwc2_qh *qh, u32 max_xfer_size,
543 u16 idx) 543 u16 idx)
544{ 544{
545 struct dwc2_hcd_dma_desc *dma_desc = &qh->desc_list[idx]; 545 struct dwc2_dma_desc *dma_desc = &qh->desc_list[idx];
546 struct dwc2_hcd_iso_packet_desc *frame_desc; 546 struct dwc2_hcd_iso_packet_desc *frame_desc;
547 547
548 memset(dma_desc, 0, sizeof(*dma_desc)); 548 memset(dma_desc, 0, sizeof(*dma_desc));
@@ -571,8 +571,8 @@ static void dwc2_fill_host_isoc_dma_desc(struct dwc2_hsotg *hsotg,
571 571
572 dma_sync_single_for_device(hsotg->dev, 572 dma_sync_single_for_device(hsotg->dev,
573 qh->desc_list_dma + 573 qh->desc_list_dma +
574 (idx * sizeof(struct dwc2_hcd_dma_desc)), 574 (idx * sizeof(struct dwc2_dma_desc)),
575 sizeof(struct dwc2_hcd_dma_desc), 575 sizeof(struct dwc2_dma_desc),
576 DMA_TO_DEVICE); 576 DMA_TO_DEVICE);
577} 577}
578 578
@@ -645,8 +645,8 @@ static void dwc2_init_isoc_dma_desc(struct dwc2_hsotg *hsotg,
645 qh->desc_list[idx].status |= HOST_DMA_IOC; 645 qh->desc_list[idx].status |= HOST_DMA_IOC;
646 dma_sync_single_for_device(hsotg->dev, 646 dma_sync_single_for_device(hsotg->dev,
647 qh->desc_list_dma + (idx * 647 qh->desc_list_dma + (idx *
648 sizeof(struct dwc2_hcd_dma_desc)), 648 sizeof(struct dwc2_dma_desc)),
649 sizeof(struct dwc2_hcd_dma_desc), 649 sizeof(struct dwc2_dma_desc),
650 DMA_TO_DEVICE); 650 DMA_TO_DEVICE);
651 } 651 }
652#else 652#else
@@ -679,8 +679,8 @@ static void dwc2_init_isoc_dma_desc(struct dwc2_hsotg *hsotg,
679 qh->desc_list[idx].status |= HOST_DMA_IOC; 679 qh->desc_list[idx].status |= HOST_DMA_IOC;
680 dma_sync_single_for_device(hsotg->dev, 680 dma_sync_single_for_device(hsotg->dev,
681 qh->desc_list_dma + 681 qh->desc_list_dma +
682 (idx * sizeof(struct dwc2_hcd_dma_desc)), 682 (idx * sizeof(struct dwc2_dma_desc)),
683 sizeof(struct dwc2_hcd_dma_desc), 683 sizeof(struct dwc2_dma_desc),
684 DMA_TO_DEVICE); 684 DMA_TO_DEVICE);
685#endif 685#endif
686} 686}
@@ -690,11 +690,11 @@ static void dwc2_fill_host_dma_desc(struct dwc2_hsotg *hsotg,
690 struct dwc2_qtd *qtd, struct dwc2_qh *qh, 690 struct dwc2_qtd *qtd, struct dwc2_qh *qh,
691 int n_desc) 691 int n_desc)
692{ 692{
693 struct dwc2_hcd_dma_desc *dma_desc = &qh->desc_list[n_desc]; 693 struct dwc2_dma_desc *dma_desc = &qh->desc_list[n_desc];
694 int len = chan->xfer_len; 694 int len = chan->xfer_len;
695 695
696 if (len > MAX_DMA_DESC_SIZE - (chan->max_packet - 1)) 696 if (len > HOST_DMA_NBYTES_LIMIT - (chan->max_packet - 1))
697 len = MAX_DMA_DESC_SIZE - (chan->max_packet - 1); 697 len = HOST_DMA_NBYTES_LIMIT - (chan->max_packet - 1);
698 698
699 if (chan->ep_is_in) { 699 if (chan->ep_is_in) {
700 int num_packets; 700 int num_packets;
@@ -721,8 +721,8 @@ static void dwc2_fill_host_dma_desc(struct dwc2_hsotg *hsotg,
721 721
722 dma_sync_single_for_device(hsotg->dev, 722 dma_sync_single_for_device(hsotg->dev,
723 qh->desc_list_dma + 723 qh->desc_list_dma +
724 (n_desc * sizeof(struct dwc2_hcd_dma_desc)), 724 (n_desc * sizeof(struct dwc2_dma_desc)),
725 sizeof(struct dwc2_hcd_dma_desc), 725 sizeof(struct dwc2_dma_desc),
726 DMA_TO_DEVICE); 726 DMA_TO_DEVICE);
727 727
728 /* 728 /*
@@ -778,8 +778,8 @@ static void dwc2_init_non_isoc_dma_desc(struct dwc2_hsotg *hsotg,
778 dma_sync_single_for_device(hsotg->dev, 778 dma_sync_single_for_device(hsotg->dev,
779 qh->desc_list_dma + 779 qh->desc_list_dma +
780 ((n_desc - 1) * 780 ((n_desc - 1) *
781 sizeof(struct dwc2_hcd_dma_desc)), 781 sizeof(struct dwc2_dma_desc)),
782 sizeof(struct dwc2_hcd_dma_desc), 782 sizeof(struct dwc2_dma_desc),
783 DMA_TO_DEVICE); 783 DMA_TO_DEVICE);
784 } 784 }
785 dwc2_fill_host_dma_desc(hsotg, chan, qtd, qh, n_desc); 785 dwc2_fill_host_dma_desc(hsotg, chan, qtd, qh, n_desc);
@@ -808,8 +808,8 @@ static void dwc2_init_non_isoc_dma_desc(struct dwc2_hsotg *hsotg,
808 n_desc - 1, &qh->desc_list[n_desc - 1]); 808 n_desc - 1, &qh->desc_list[n_desc - 1]);
809 dma_sync_single_for_device(hsotg->dev, 809 dma_sync_single_for_device(hsotg->dev,
810 qh->desc_list_dma + (n_desc - 1) * 810 qh->desc_list_dma + (n_desc - 1) *
811 sizeof(struct dwc2_hcd_dma_desc), 811 sizeof(struct dwc2_dma_desc),
812 sizeof(struct dwc2_hcd_dma_desc), 812 sizeof(struct dwc2_dma_desc),
813 DMA_TO_DEVICE); 813 DMA_TO_DEVICE);
814 if (n_desc > 1) { 814 if (n_desc > 1) {
815 qh->desc_list[0].status |= HOST_DMA_A; 815 qh->desc_list[0].status |= HOST_DMA_A;
@@ -817,7 +817,7 @@ static void dwc2_init_non_isoc_dma_desc(struct dwc2_hsotg *hsotg,
817 &qh->desc_list[0]); 817 &qh->desc_list[0]);
818 dma_sync_single_for_device(hsotg->dev, 818 dma_sync_single_for_device(hsotg->dev,
819 qh->desc_list_dma, 819 qh->desc_list_dma,
820 sizeof(struct dwc2_hcd_dma_desc), 820 sizeof(struct dwc2_dma_desc),
821 DMA_TO_DEVICE); 821 DMA_TO_DEVICE);
822 } 822 }
823 chan->ntd = n_desc; 823 chan->ntd = n_desc;
@@ -893,7 +893,7 @@ static int dwc2_cmpl_host_isoc_dma_desc(struct dwc2_hsotg *hsotg,
893 struct dwc2_qtd *qtd, 893 struct dwc2_qtd *qtd,
894 struct dwc2_qh *qh, u16 idx) 894 struct dwc2_qh *qh, u16 idx)
895{ 895{
896 struct dwc2_hcd_dma_desc *dma_desc; 896 struct dwc2_dma_desc *dma_desc;
897 struct dwc2_hcd_iso_packet_desc *frame_desc; 897 struct dwc2_hcd_iso_packet_desc *frame_desc;
898 u16 remain = 0; 898 u16 remain = 0;
899 int rc = 0; 899 int rc = 0;
@@ -902,8 +902,8 @@ static int dwc2_cmpl_host_isoc_dma_desc(struct dwc2_hsotg *hsotg,
902 return -EINVAL; 902 return -EINVAL;
903 903
904 dma_sync_single_for_cpu(hsotg->dev, qh->desc_list_dma + (idx * 904 dma_sync_single_for_cpu(hsotg->dev, qh->desc_list_dma + (idx *
905 sizeof(struct dwc2_hcd_dma_desc)), 905 sizeof(struct dwc2_dma_desc)),
906 sizeof(struct dwc2_hcd_dma_desc), 906 sizeof(struct dwc2_dma_desc),
907 DMA_FROM_DEVICE); 907 DMA_FROM_DEVICE);
908 908
909 dma_desc = &qh->desc_list[idx]; 909 dma_desc = &qh->desc_list[idx];
@@ -1066,7 +1066,7 @@ stop_scan:
1066static int dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg, 1066static int dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg,
1067 struct dwc2_host_chan *chan, 1067 struct dwc2_host_chan *chan,
1068 struct dwc2_qtd *qtd, 1068 struct dwc2_qtd *qtd,
1069 struct dwc2_hcd_dma_desc *dma_desc, 1069 struct dwc2_dma_desc *dma_desc,
1070 enum dwc2_halt_status halt_status, 1070 enum dwc2_halt_status halt_status,
1071 u32 n_bytes, int *xfer_done) 1071 u32 n_bytes, int *xfer_done)
1072{ 1072{
@@ -1154,7 +1154,7 @@ static int dwc2_process_non_isoc_desc(struct dwc2_hsotg *hsotg,
1154{ 1154{
1155 struct dwc2_qh *qh = chan->qh; 1155 struct dwc2_qh *qh = chan->qh;
1156 struct dwc2_hcd_urb *urb = qtd->urb; 1156 struct dwc2_hcd_urb *urb = qtd->urb;
1157 struct dwc2_hcd_dma_desc *dma_desc; 1157 struct dwc2_dma_desc *dma_desc;
1158 u32 n_bytes; 1158 u32 n_bytes;
1159 int failed; 1159 int failed;
1160 1160
@@ -1165,8 +1165,8 @@ static int dwc2_process_non_isoc_desc(struct dwc2_hsotg *hsotg,
1165 1165
1166 dma_sync_single_for_cpu(hsotg->dev, 1166 dma_sync_single_for_cpu(hsotg->dev,
1167 qh->desc_list_dma + (desc_num * 1167 qh->desc_list_dma + (desc_num *
1168 sizeof(struct dwc2_hcd_dma_desc)), 1168 sizeof(struct dwc2_dma_desc)),
1169 sizeof(struct dwc2_hcd_dma_desc), 1169 sizeof(struct dwc2_dma_desc),
1170 DMA_FROM_DEVICE); 1170 DMA_FROM_DEVICE);
1171 1171
1172 dma_desc = &qh->desc_list[desc_num]; 1172 dma_desc = &qh->desc_list[desc_num];
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index 906f223542ee..b8f4b6aaf1d0 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -256,7 +256,7 @@ static void dwc2_perio_tx_fifo_empty_intr(struct dwc2_hsotg *hsotg)
256static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, 256static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
257 u32 *hprt0_modify) 257 u32 *hprt0_modify)
258{ 258{
259 struct dwc2_core_params *params = hsotg->core_params; 259 struct dwc2_core_params *params = &hsotg->params;
260 int do_reset = 0; 260 int do_reset = 0;
261 u32 usbcfg; 261 u32 usbcfg;
262 u32 prtspd; 262 u32 prtspd;
@@ -395,10 +395,10 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)
395 dwc2_hprt0_enable(hsotg, hprt0, &hprt0_modify); 395 dwc2_hprt0_enable(hsotg, hprt0, &hprt0_modify);
396 } else { 396 } else {
397 hsotg->flags.b.port_enable_change = 1; 397 hsotg->flags.b.port_enable_change = 1;
398 if (hsotg->core_params->dma_desc_fs_enable) { 398 if (hsotg->params.dma_desc_fs_enable) {
399 u32 hcfg; 399 u32 hcfg;
400 400
401 hsotg->core_params->dma_desc_enable = 0; 401 hsotg->params.dma_desc_enable = 0;
402 hsotg->new_connection = false; 402 hsotg->new_connection = false;
403 hcfg = dwc2_readl(hsotg->regs + HCFG); 403 hcfg = dwc2_readl(hsotg->regs + HCFG);
404 hcfg &= ~HCFG_DESCDMA; 404 hcfg &= ~HCFG_DESCDMA;
@@ -604,7 +604,7 @@ static enum dwc2_halt_status dwc2_update_isoc_urb_state(
604 /* Skip whole frame */ 604 /* Skip whole frame */
605 if (chan->qh->do_split && 605 if (chan->qh->do_split &&
606 chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in && 606 chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in &&
607 hsotg->core_params->dma_enable > 0) { 607 hsotg->params.host_dma > 0) {
608 qtd->complete_split = 0; 608 qtd->complete_split = 0;
609 qtd->isoc_split_offset = 0; 609 qtd->isoc_split_offset = 0;
610 } 610 }
@@ -743,7 +743,7 @@ cleanup:
743 dwc2_hc_cleanup(hsotg, chan); 743 dwc2_hc_cleanup(hsotg, chan);
744 list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list); 744 list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list);
745 745
746 if (hsotg->core_params->uframe_sched > 0) { 746 if (hsotg->params.uframe_sched > 0) {
747 hsotg->available_host_channels++; 747 hsotg->available_host_channels++;
748 } else { 748 } else {
749 switch (chan->ep_type) { 749 switch (chan->ep_type) {
@@ -789,7 +789,7 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,
789 if (dbg_hc(chan)) 789 if (dbg_hc(chan))
790 dev_vdbg(hsotg->dev, "%s()\n", __func__); 790 dev_vdbg(hsotg->dev, "%s()\n", __func__);
791 791
792 if (hsotg->core_params->dma_enable > 0) { 792 if (hsotg->params.host_dma > 0) {
793 if (dbg_hc(chan)) 793 if (dbg_hc(chan))
794 dev_vdbg(hsotg->dev, "DMA enabled\n"); 794 dev_vdbg(hsotg->dev, "DMA enabled\n");
795 dwc2_release_channel(hsotg, chan, qtd, halt_status); 795 dwc2_release_channel(hsotg, chan, qtd, halt_status);
@@ -915,6 +915,8 @@ static int dwc2_xfercomp_isoc_split_in(struct dwc2_hsotg *hsotg,
915{ 915{
916 struct dwc2_hcd_iso_packet_desc *frame_desc; 916 struct dwc2_hcd_iso_packet_desc *frame_desc;
917 u32 len; 917 u32 len;
918 u32 hctsiz;
919 u32 pid;
918 920
919 if (!qtd->urb) 921 if (!qtd->urb)
920 return 0; 922 return 0;
@@ -932,7 +934,10 @@ static int dwc2_xfercomp_isoc_split_in(struct dwc2_hsotg *hsotg,
932 934
933 qtd->isoc_split_offset += len; 935 qtd->isoc_split_offset += len;
934 936
935 if (frame_desc->actual_length >= frame_desc->length) { 937 hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum));
938 pid = (hctsiz & TSIZ_SC_MC_PID_MASK) >> TSIZ_SC_MC_PID_SHIFT;
939
940 if (frame_desc->actual_length >= frame_desc->length || pid == 0) {
936 frame_desc->status = 0; 941 frame_desc->status = 0;
937 qtd->isoc_frame_index++; 942 qtd->isoc_frame_index++;
938 qtd->complete_split = 0; 943 qtd->complete_split = 0;
@@ -974,7 +979,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg,
974 979
975 pipe_type = dwc2_hcd_get_pipe_type(&urb->pipe_info); 980 pipe_type = dwc2_hcd_get_pipe_type(&urb->pipe_info);
976 981
977 if (hsotg->core_params->dma_desc_enable > 0) { 982 if (hsotg->params.dma_desc_enable > 0) {
978 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, halt_status); 983 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, halt_status);
979 if (pipe_type == USB_ENDPOINT_XFER_ISOC) 984 if (pipe_type == USB_ENDPOINT_XFER_ISOC)
980 /* Do not disable the interrupt, just clear it */ 985 /* Do not disable the interrupt, just clear it */
@@ -985,7 +990,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg,
985 /* Handle xfer complete on CSPLIT */ 990 /* Handle xfer complete on CSPLIT */
986 if (chan->qh->do_split) { 991 if (chan->qh->do_split) {
987 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in && 992 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in &&
988 hsotg->core_params->dma_enable > 0) { 993 hsotg->params.host_dma > 0) {
989 if (qtd->complete_split && 994 if (qtd->complete_split &&
990 dwc2_xfercomp_isoc_split_in(hsotg, chan, chnum, 995 dwc2_xfercomp_isoc_split_in(hsotg, chan, chnum,
991 qtd)) 996 qtd))
@@ -1097,7 +1102,7 @@ static void dwc2_hc_stall_intr(struct dwc2_hsotg *hsotg,
1097 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: STALL Received--\n", 1102 dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: STALL Received--\n",
1098 chnum); 1103 chnum);
1099 1104
1100 if (hsotg->core_params->dma_desc_enable > 0) { 1105 if (hsotg->params.dma_desc_enable > 0) {
1101 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1106 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1102 DWC2_HC_XFER_STALL); 1107 DWC2_HC_XFER_STALL);
1103 goto handle_stall_done; 1108 goto handle_stall_done;
@@ -1207,7 +1212,7 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg,
1207 switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) { 1212 switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) {
1208 case USB_ENDPOINT_XFER_CONTROL: 1213 case USB_ENDPOINT_XFER_CONTROL:
1209 case USB_ENDPOINT_XFER_BULK: 1214 case USB_ENDPOINT_XFER_BULK:
1210 if (hsotg->core_params->dma_enable > 0 && chan->ep_is_in) { 1215 if (hsotg->params.host_dma > 0 && chan->ep_is_in) {
1211 /* 1216 /*
1212 * NAK interrupts are enabled on bulk/control IN 1217 * NAK interrupts are enabled on bulk/control IN
1213 * transfers in DMA mode for the sole purpose of 1218 * transfers in DMA mode for the sole purpose of
@@ -1353,7 +1358,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
1353 */ 1358 */
1354 if (chan->do_split && chan->complete_split) { 1359 if (chan->do_split && chan->complete_split) {
1355 if (chan->ep_is_in && chan->ep_type == USB_ENDPOINT_XFER_ISOC && 1360 if (chan->ep_is_in && chan->ep_type == USB_ENDPOINT_XFER_ISOC &&
1356 hsotg->core_params->dma_enable > 0) { 1361 hsotg->params.host_dma > 0) {
1357 qtd->complete_split = 0; 1362 qtd->complete_split = 0;
1358 qtd->isoc_split_offset = 0; 1363 qtd->isoc_split_offset = 0;
1359 qtd->isoc_frame_index++; 1364 qtd->isoc_frame_index++;
@@ -1374,7 +1379,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
1374 struct dwc2_qh *qh = chan->qh; 1379 struct dwc2_qh *qh = chan->qh;
1375 bool past_end; 1380 bool past_end;
1376 1381
1377 if (hsotg->core_params->uframe_sched <= 0) { 1382 if (hsotg->params.uframe_sched <= 0) {
1378 int frnum = dwc2_hcd_get_frame_number(hsotg); 1383 int frnum = dwc2_hcd_get_frame_number(hsotg);
1379 1384
1380 /* Don't have num_hs_transfers; simple logic */ 1385 /* Don't have num_hs_transfers; simple logic */
@@ -1467,7 +1472,7 @@ static void dwc2_hc_babble_intr(struct dwc2_hsotg *hsotg,
1467 1472
1468 dwc2_hc_handle_tt_clear(hsotg, chan, qtd); 1473 dwc2_hc_handle_tt_clear(hsotg, chan, qtd);
1469 1474
1470 if (hsotg->core_params->dma_desc_enable > 0) { 1475 if (hsotg->params.dma_desc_enable > 0) {
1471 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1476 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1472 DWC2_HC_XFER_BABBLE_ERR); 1477 DWC2_HC_XFER_BABBLE_ERR);
1473 goto disable_int; 1478 goto disable_int;
@@ -1572,7 +1577,7 @@ static void dwc2_hc_ahberr_intr(struct dwc2_hsotg *hsotg,
1572 dev_err(hsotg->dev, " Interval: %d\n", urb->interval); 1577 dev_err(hsotg->dev, " Interval: %d\n", urb->interval);
1573 1578
1574 /* Core halts the channel for Descriptor DMA mode */ 1579 /* Core halts the channel for Descriptor DMA mode */
1575 if (hsotg->core_params->dma_desc_enable > 0) { 1580 if (hsotg->params.dma_desc_enable > 0) {
1576 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1581 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1577 DWC2_HC_XFER_AHB_ERR); 1582 DWC2_HC_XFER_AHB_ERR);
1578 goto handle_ahberr_done; 1583 goto handle_ahberr_done;
@@ -1604,7 +1609,7 @@ static void dwc2_hc_xacterr_intr(struct dwc2_hsotg *hsotg,
1604 1609
1605 dwc2_hc_handle_tt_clear(hsotg, chan, qtd); 1610 dwc2_hc_handle_tt_clear(hsotg, chan, qtd);
1606 1611
1607 if (hsotg->core_params->dma_desc_enable > 0) { 1612 if (hsotg->params.dma_desc_enable > 0) {
1608 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1613 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1609 DWC2_HC_XFER_XACT_ERR); 1614 DWC2_HC_XFER_XACT_ERR);
1610 goto handle_xacterr_done; 1615 goto handle_xacterr_done;
@@ -1798,8 +1803,8 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
1798 1803
1799 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE || 1804 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE ||
1800 (chan->halt_status == DWC2_HC_XFER_AHB_ERR && 1805 (chan->halt_status == DWC2_HC_XFER_AHB_ERR &&
1801 hsotg->core_params->dma_desc_enable <= 0)) { 1806 hsotg->params.dma_desc_enable <= 0)) {
1802 if (hsotg->core_params->dma_desc_enable > 0) 1807 if (hsotg->params.dma_desc_enable > 0)
1803 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 1808 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
1804 chan->halt_status); 1809 chan->halt_status);
1805 else 1810 else
@@ -1830,7 +1835,7 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
1830 } else if (chan->hcint & HCINTMSK_STALL) { 1835 } else if (chan->hcint & HCINTMSK_STALL) {
1831 dwc2_hc_stall_intr(hsotg, chan, chnum, qtd); 1836 dwc2_hc_stall_intr(hsotg, chan, chnum, qtd);
1832 } else if ((chan->hcint & HCINTMSK_XACTERR) && 1837 } else if ((chan->hcint & HCINTMSK_XACTERR) &&
1833 hsotg->core_params->dma_desc_enable <= 0) { 1838 hsotg->params.dma_desc_enable <= 0) {
1834 if (out_nak_enh) { 1839 if (out_nak_enh) {
1835 if (chan->hcint & 1840 if (chan->hcint &
1836 (HCINTMSK_NYET | HCINTMSK_NAK | HCINTMSK_ACK)) { 1841 (HCINTMSK_NYET | HCINTMSK_NAK | HCINTMSK_ACK)) {
@@ -1850,10 +1855,10 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
1850 */ 1855 */
1851 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd); 1856 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd);
1852 } else if ((chan->hcint & HCINTMSK_XCS_XACT) && 1857 } else if ((chan->hcint & HCINTMSK_XCS_XACT) &&
1853 hsotg->core_params->dma_desc_enable > 0) { 1858 hsotg->params.dma_desc_enable > 0) {
1854 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd); 1859 dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd);
1855 } else if ((chan->hcint & HCINTMSK_AHBERR) && 1860 } else if ((chan->hcint & HCINTMSK_AHBERR) &&
1856 hsotg->core_params->dma_desc_enable > 0) { 1861 hsotg->params.dma_desc_enable > 0) {
1857 dwc2_hc_ahberr_intr(hsotg, chan, chnum, qtd); 1862 dwc2_hc_ahberr_intr(hsotg, chan, chnum, qtd);
1858 } else if (chan->hcint & HCINTMSK_BBLERR) { 1863 } else if (chan->hcint & HCINTMSK_BBLERR) {
1859 dwc2_hc_babble_intr(hsotg, chan, chnum, qtd); 1864 dwc2_hc_babble_intr(hsotg, chan, chnum, qtd);
@@ -1946,7 +1951,7 @@ static void dwc2_hc_chhltd_intr(struct dwc2_hsotg *hsotg,
1946 dev_vdbg(hsotg->dev, "--Host Channel %d Interrupt: Channel Halted--\n", 1951 dev_vdbg(hsotg->dev, "--Host Channel %d Interrupt: Channel Halted--\n",
1947 chnum); 1952 chnum);
1948 1953
1949 if (hsotg->core_params->dma_enable > 0) { 1954 if (hsotg->params.host_dma > 0) {
1950 dwc2_hc_chhltd_intr_dma(hsotg, chan, chnum, qtd); 1955 dwc2_hc_chhltd_intr_dma(hsotg, chan, chnum, qtd);
1951 } else { 1956 } else {
1952 if (!dwc2_halt_status_ok(hsotg, chan, chnum, qtd)) 1957 if (!dwc2_halt_status_ok(hsotg, chan, chnum, qtd))
@@ -2023,7 +2028,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)
2023 * interrupt unmasked 2028 * interrupt unmasked
2024 */ 2029 */
2025 WARN_ON(hcint != HCINTMSK_CHHLTD); 2030 WARN_ON(hcint != HCINTMSK_CHHLTD);
2026 if (hsotg->core_params->dma_desc_enable > 0) 2031 if (hsotg->params.dma_desc_enable > 0)
2027 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, 2032 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
2028 chan->halt_status); 2033 chan->halt_status);
2029 else 2034 else
@@ -2051,7 +2056,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)
2051 qtd = list_first_entry(&chan->qh->qtd_list, struct dwc2_qtd, 2056 qtd = list_first_entry(&chan->qh->qtd_list, struct dwc2_qtd,
2052 qtd_list_entry); 2057 qtd_list_entry);
2053 2058
2054 if (hsotg->core_params->dma_enable <= 0) { 2059 if (hsotg->params.host_dma <= 0) {
2055 if ((hcint & HCINTMSK_CHHLTD) && hcint != HCINTMSK_CHHLTD) 2060 if ((hcint & HCINTMSK_CHHLTD) && hcint != HCINTMSK_CHHLTD)
2056 hcint &= ~HCINTMSK_CHHLTD; 2061 hcint &= ~HCINTMSK_CHHLTD;
2057 } 2062 }
@@ -2156,7 +2161,7 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)
2156 } 2161 }
2157 } 2162 }
2158 2163
2159 for (i = 0; i < hsotg->core_params->host_channels; i++) { 2164 for (i = 0; i < hsotg->params.host_channels; i++) {
2160 if (haint & (1 << i)) 2165 if (haint & (1 << i))
2161 dwc2_hc_n_intr(hsotg, i); 2166 dwc2_hc_n_intr(hsotg, i);
2162 } 2167 }
diff --git a/drivers/usb/dwc2/hcd_queue.c b/drivers/usb/dwc2/hcd_queue.c
index 13754353251f..5713f03a4e56 100644
--- a/drivers/usb/dwc2/hcd_queue.c
+++ b/drivers/usb/dwc2/hcd_queue.c
@@ -75,7 +75,7 @@ static int dwc2_periodic_channel_available(struct dwc2_hsotg *hsotg)
75 int status; 75 int status;
76 int num_channels; 76 int num_channels;
77 77
78 num_channels = hsotg->core_params->host_channels; 78 num_channels = hsotg->params.host_channels;
79 if (hsotg->periodic_channels + hsotg->non_periodic_channels < 79 if (hsotg->periodic_channels + hsotg->non_periodic_channels <
80 num_channels 80 num_channels
81 && hsotg->periodic_channels < num_channels - 1) { 81 && hsotg->periodic_channels < num_channels - 1) {
@@ -355,6 +355,37 @@ static void pmap_unschedule(unsigned long *map, int bits_per_period,
355 } 355 }
356} 356}
357 357
358/**
359 * dwc2_get_ls_map() - Get the map used for the given qh
360 *
361 * @hsotg: The HCD state structure for the DWC OTG controller.
362 * @qh: QH for the periodic transfer.
363 *
364 * We'll always get the periodic map out of our TT. Note that even if we're
365 * running the host straight in low speed / full speed mode it appears as if
366 * a TT is allocated for us, so we'll use it. If that ever changes we can
367 * add logic here to get a map out of "hsotg" if !qh->do_split.
368 *
369 * Returns: the map or NULL if a map couldn't be found.
370 */
371static unsigned long *dwc2_get_ls_map(struct dwc2_hsotg *hsotg,
372 struct dwc2_qh *qh)
373{
374 unsigned long *map;
375
376 /* Don't expect to be missing a TT and be doing low speed scheduling */
377 if (WARN_ON(!qh->dwc_tt))
378 return NULL;
379
380 /* Get the map and adjust if this is a multi_tt hub */
381 map = qh->dwc_tt->periodic_bitmaps;
382 if (qh->dwc_tt->usb_tt->multi)
383 map += DWC2_ELEMENTS_PER_LS_BITMAP * qh->ttport;
384
385 return map;
386}
387
388#ifdef DWC2_PRINT_SCHEDULE
358/* 389/*
359 * cat_printf() - A printf() + strcat() helper 390 * cat_printf() - A printf() + strcat() helper
360 * 391 *
@@ -454,35 +485,6 @@ static void pmap_print(unsigned long *map, int bits_per_period,
454 } 485 }
455} 486}
456 487
457/**
458 * dwc2_get_ls_map() - Get the map used for the given qh
459 *
460 * @hsotg: The HCD state structure for the DWC OTG controller.
461 * @qh: QH for the periodic transfer.
462 *
463 * We'll always get the periodic map out of our TT. Note that even if we're
464 * running the host straight in low speed / full speed mode it appears as if
465 * a TT is allocated for us, so we'll use it. If that ever changes we can
466 * add logic here to get a map out of "hsotg" if !qh->do_split.
467 *
468 * Returns: the map or NULL if a map couldn't be found.
469 */
470static unsigned long *dwc2_get_ls_map(struct dwc2_hsotg *hsotg,
471 struct dwc2_qh *qh)
472{
473 unsigned long *map;
474
475 /* Don't expect to be missing a TT and be doing low speed scheduling */
476 if (WARN_ON(!qh->dwc_tt))
477 return NULL;
478
479 /* Get the map and adjust if this is a multi_tt hub */
480 map = qh->dwc_tt->periodic_bitmaps;
481 if (qh->dwc_tt->usb_tt->multi)
482 map += DWC2_ELEMENTS_PER_LS_BITMAP * qh->ttport;
483
484 return map;
485}
486 488
487struct dwc2_qh_print_data { 489struct dwc2_qh_print_data {
488 struct dwc2_hsotg *hsotg; 490 struct dwc2_hsotg *hsotg;
@@ -519,9 +521,6 @@ static void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
519 * If we don't have tracing turned on, don't run unless the special 521 * If we don't have tracing turned on, don't run unless the special
520 * define is turned on. 522 * define is turned on.
521 */ 523 */
522#ifndef DWC2_PRINT_SCHEDULE
523 return;
524#endif
525 524
526 if (qh->schedule_low_speed) { 525 if (qh->schedule_low_speed) {
527 unsigned long *map = dwc2_get_ls_map(hsotg, qh); 526 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
@@ -559,8 +558,12 @@ static void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
559 DWC2_HS_SCHEDULE_UFRAMES, "uFrame", "us", 558 DWC2_HS_SCHEDULE_UFRAMES, "uFrame", "us",
560 dwc2_qh_print, &print_data); 559 dwc2_qh_print, &print_data);
561 } 560 }
562 561 return;
563} 562}
563#else
564static inline void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
565 struct dwc2_qh *qh) {};
566#endif
564 567
565/** 568/**
566 * dwc2_ls_pmap_schedule() - Schedule a low speed QH 569 * dwc2_ls_pmap_schedule() - Schedule a low speed QH
@@ -1104,7 +1107,7 @@ static void dwc2_pick_first_frame(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1104 next_active_frame = earliest_frame; 1107 next_active_frame = earliest_frame;
1105 1108
1106 /* Get the "no microframe schduler" out of the way... */ 1109 /* Get the "no microframe schduler" out of the way... */
1107 if (hsotg->core_params->uframe_sched <= 0) { 1110 if (hsotg->params.uframe_sched <= 0) {
1108 if (qh->do_split) 1111 if (qh->do_split)
1109 /* Splits are active at microframe 0 minus 1 */ 1112 /* Splits are active at microframe 0 minus 1 */
1110 next_active_frame |= 0x7; 1113 next_active_frame |= 0x7;
@@ -1197,7 +1200,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1197{ 1200{
1198 int status; 1201 int status;
1199 1202
1200 if (hsotg->core_params->uframe_sched > 0) { 1203 if (hsotg->params.uframe_sched > 0) {
1201 status = dwc2_uframe_schedule(hsotg, qh); 1204 status = dwc2_uframe_schedule(hsotg, qh);
1202 } else { 1205 } else {
1203 status = dwc2_periodic_channel_available(hsotg); 1206 status = dwc2_periodic_channel_available(hsotg);
@@ -1218,7 +1221,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1218 return status; 1221 return status;
1219 } 1222 }
1220 1223
1221 if (hsotg->core_params->uframe_sched <= 0) 1224 if (hsotg->params.uframe_sched <= 0)
1222 /* Reserve periodic channel */ 1225 /* Reserve periodic channel */
1223 hsotg->periodic_channels++; 1226 hsotg->periodic_channels++;
1224 1227
@@ -1254,7 +1257,7 @@ static void dwc2_do_unreserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1254 /* Update claimed usecs per (micro)frame */ 1257 /* Update claimed usecs per (micro)frame */
1255 hsotg->periodic_usecs -= qh->host_us; 1258 hsotg->periodic_usecs -= qh->host_us;
1256 1259
1257 if (hsotg->core_params->uframe_sched > 0) { 1260 if (hsotg->params.uframe_sched > 0) {
1258 dwc2_uframe_unschedule(hsotg, qh); 1261 dwc2_uframe_unschedule(hsotg, qh);
1259 } else { 1262 } else {
1260 /* Release periodic channel reservation */ 1263 /* Release periodic channel reservation */
@@ -1328,7 +1331,7 @@ static int dwc2_check_max_xfer_size(struct dwc2_hsotg *hsotg,
1328 int status = 0; 1331 int status = 0;
1329 1332
1330 max_xfer_size = dwc2_max_packet(qh->maxp) * dwc2_hb_mult(qh->maxp); 1333 max_xfer_size = dwc2_max_packet(qh->maxp) * dwc2_hb_mult(qh->maxp);
1331 max_channel_xfer_size = hsotg->core_params->max_transfer_size; 1334 max_channel_xfer_size = hsotg->params.max_transfer_size;
1332 1335
1333 if (max_xfer_size > max_channel_xfer_size) { 1336 if (max_xfer_size > max_channel_xfer_size) {
1334 dev_err(hsotg->dev, 1337 dev_err(hsotg->dev,
@@ -1391,7 +1394,7 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1391 1394
1392 qh->unreserve_pending = 0; 1395 qh->unreserve_pending = 0;
1393 1396
1394 if (hsotg->core_params->dma_desc_enable > 0) 1397 if (hsotg->params.dma_desc_enable > 0)
1395 /* Don't rely on SOF and start in ready schedule */ 1398 /* Don't rely on SOF and start in ready schedule */
1396 list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready); 1399 list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready);
1397 else 1400 else
@@ -1599,7 +1602,7 @@ struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
1599 1602
1600 dwc2_qh_init(hsotg, qh, urb, mem_flags); 1603 dwc2_qh_init(hsotg, qh, urb, mem_flags);
1601 1604
1602 if (hsotg->core_params->dma_desc_enable > 0 && 1605 if (hsotg->params.dma_desc_enable > 0 &&
1603 dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) { 1606 dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) {
1604 dwc2_hcd_qh_free(hsotg, qh); 1607 dwc2_hcd_qh_free(hsotg, qh);
1605 return NULL; 1608 return NULL;
@@ -1711,7 +1714,7 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1711 dwc2_deschedule_periodic(hsotg, qh); 1714 dwc2_deschedule_periodic(hsotg, qh);
1712 hsotg->periodic_qh_count--; 1715 hsotg->periodic_qh_count--;
1713 if (!hsotg->periodic_qh_count && 1716 if (!hsotg->periodic_qh_count &&
1714 hsotg->core_params->dma_desc_enable <= 0) { 1717 hsotg->params.dma_desc_enable <= 0) {
1715 intr_mask = dwc2_readl(hsotg->regs + GINTMSK); 1718 intr_mask = dwc2_readl(hsotg->regs + GINTMSK);
1716 intr_mask &= ~GINTSTS_SOF; 1719 intr_mask &= ~GINTSTS_SOF;
1717 dwc2_writel(intr_mask, hsotg->regs + GINTMSK); 1720 dwc2_writel(intr_mask, hsotg->regs + GINTMSK);
diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
index 91058441e62a..5be056b39e5c 100644
--- a/drivers/usb/dwc2/hw.h
+++ b/drivers/usb/dwc2/hw.h
@@ -412,6 +412,7 @@
412/* Device mode registers */ 412/* Device mode registers */
413 413
414#define DCFG HSOTG_REG(0x800) 414#define DCFG HSOTG_REG(0x800)
415#define DCFG_DESCDMA_EN (1 << 23)
415#define DCFG_EPMISCNT_MASK (0x1f << 18) 416#define DCFG_EPMISCNT_MASK (0x1f << 18)
416#define DCFG_EPMISCNT_SHIFT 18 417#define DCFG_EPMISCNT_SHIFT 18
417#define DCFG_EPMISCNT_LIMIT 0x1f 418#define DCFG_EPMISCNT_LIMIT 0x1f
@@ -473,6 +474,7 @@
473#define DIEPMSK_XFERCOMPLMSK (1 << 0) 474#define DIEPMSK_XFERCOMPLMSK (1 << 0)
474 475
475#define DOEPMSK HSOTG_REG(0x814) 476#define DOEPMSK HSOTG_REG(0x814)
477#define DOEPMSK_BNAMSK (1 << 9)
476#define DOEPMSK_BACK2BACKSETUP (1 << 6) 478#define DOEPMSK_BACK2BACKSETUP (1 << 6)
477#define DOEPMSK_STSPHSERCVDMSK (1 << 5) 479#define DOEPMSK_STSPHSERCVDMSK (1 << 5)
478#define DOEPMSK_OUTTKNEPDISMSK (1 << 4) 480#define DOEPMSK_OUTTKNEPDISMSK (1 << 4)
@@ -790,7 +792,8 @@
790#define HCFIFO(_ch) HSOTG_REG(0x1000 + 0x1000 * (_ch)) 792#define HCFIFO(_ch) HSOTG_REG(0x1000 + 0x1000 * (_ch))
791 793
792/** 794/**
793 * struct dwc2_hcd_dma_desc - Host-mode DMA descriptor structure 795 * struct dwc2_dma_desc - DMA descriptor structure,
796 * used for both host and gadget modes
794 * 797 *
795 * @status: DMA descriptor status quadlet 798 * @status: DMA descriptor status quadlet
796 * @buf: DMA descriptor data buffer pointer 799 * @buf: DMA descriptor data buffer pointer
@@ -798,10 +801,12 @@
798 * DMA Descriptor structure contains two quadlets: 801 * DMA Descriptor structure contains two quadlets:
799 * Status quadlet and Data buffer pointer. 802 * Status quadlet and Data buffer pointer.
800 */ 803 */
801struct dwc2_hcd_dma_desc { 804struct dwc2_dma_desc {
802 u32 status; 805 u32 status;
803 u32 buf; 806 u32 buf;
804}; 807} __packed;
808
809/* Host Mode DMA descriptor status quadlet */
805 810
806#define HOST_DMA_A (1 << 31) 811#define HOST_DMA_A (1 << 31)
807#define HOST_DMA_STS_MASK (0x3 << 28) 812#define HOST_DMA_STS_MASK (0x3 << 28)
@@ -817,8 +822,43 @@ struct dwc2_hcd_dma_desc {
817#define HOST_DMA_ISOC_NBYTES_SHIFT 0 822#define HOST_DMA_ISOC_NBYTES_SHIFT 0
818#define HOST_DMA_NBYTES_MASK (0x1ffff << 0) 823#define HOST_DMA_NBYTES_MASK (0x1ffff << 0)
819#define HOST_DMA_NBYTES_SHIFT 0 824#define HOST_DMA_NBYTES_SHIFT 0
825#define HOST_DMA_NBYTES_LIMIT 131071
826
827/* Device Mode DMA descriptor status quadlet */
828
829#define DEV_DMA_BUFF_STS_MASK (0x3 << 30)
830#define DEV_DMA_BUFF_STS_SHIFT 30
831#define DEV_DMA_BUFF_STS_HREADY 0
832#define DEV_DMA_BUFF_STS_DMABUSY 1
833#define DEV_DMA_BUFF_STS_DMADONE 2
834#define DEV_DMA_BUFF_STS_HBUSY 3
835#define DEV_DMA_STS_MASK (0x3 << 28)
836#define DEV_DMA_STS_SHIFT 28
837#define DEV_DMA_STS_SUCC 0
838#define DEV_DMA_STS_BUFF_FLUSH 1
839#define DEV_DMA_STS_BUFF_ERR 3
840#define DEV_DMA_L (1 << 27)
841#define DEV_DMA_SHORT (1 << 26)
842#define DEV_DMA_IOC (1 << 25)
843#define DEV_DMA_SR (1 << 24)
844#define DEV_DMA_MTRF (1 << 23)
845#define DEV_DMA_ISOC_PID_MASK (0x3 << 23)
846#define DEV_DMA_ISOC_PID_SHIFT 23
847#define DEV_DMA_ISOC_PID_DATA0 0
848#define DEV_DMA_ISOC_PID_DATA2 1
849#define DEV_DMA_ISOC_PID_DATA1 2
850#define DEV_DMA_ISOC_PID_MDATA 3
851#define DEV_DMA_ISOC_FRNUM_MASK (0x7ff << 12)
852#define DEV_DMA_ISOC_FRNUM_SHIFT 12
853#define DEV_DMA_ISOC_TX_NBYTES_MASK (0xfff << 0)
854#define DEV_DMA_ISOC_TX_NBYTES_LIMIT 0xfff
855#define DEV_DMA_ISOC_RX_NBYTES_MASK (0x7ff << 0)
856#define DEV_DMA_ISOC_RX_NBYTES_LIMIT 0x7ff
857#define DEV_DMA_ISOC_NBYTES_SHIFT 0
858#define DEV_DMA_NBYTES_MASK (0xffff << 0)
859#define DEV_DMA_NBYTES_SHIFT 0
860#define DEV_DMA_NBYTES_LIMIT 0xffff
820 861
821#define MAX_DMA_DESC_SIZE 131071
822#define MAX_DMA_DESC_NUM_GENERIC 64 862#define MAX_DMA_DESC_NUM_GENERIC 64
823#define MAX_DMA_DESC_NUM_HS_ISOC 256 863#define MAX_DMA_DESC_NUM_HS_ISOC 256
824 864
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
new file mode 100644
index 000000000000..a786256535b6
--- /dev/null
+++ b/drivers/usb/dwc2/params.c
@@ -0,0 +1,1435 @@
1/*
2 * Copyright (C) 2004-2016 Synopsys, Inc.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions, and the following disclaimer,
9 * without modification.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The names of the above-listed copyright holders may not be used
14 * to endorse or promote products derived from this software without
15 * specific prior written permission.
16 *
17 * ALTERNATIVELY, this software may be distributed under the terms of the
18 * GNU General Public License ("GPL") as published by the Free Software
19 * Foundation; either version 2 of the License, or (at your option) any
20 * later version.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
23 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
24 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
26 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
27 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/of_device.h>
38
39#include "core.h"
40
41static const struct dwc2_core_params params_hi6220 = {
42 .otg_cap = 2, /* No HNP/SRP capable */
43 .otg_ver = 0, /* 1.3 */
44 .dma_desc_enable = 0,
45 .dma_desc_fs_enable = 0,
46 .speed = 0, /* High Speed */
47 .enable_dynamic_fifo = 1,
48 .en_multiple_tx_fifo = 1,
49 .host_rx_fifo_size = 512,
50 .host_nperio_tx_fifo_size = 512,
51 .host_perio_tx_fifo_size = 512,
52 .max_transfer_size = 65535,
53 .max_packet_count = 511,
54 .host_channels = 16,
55 .phy_type = 1, /* UTMI */
56 .phy_utmi_width = 8,
57 .phy_ulpi_ddr = 0, /* Single */
58 .phy_ulpi_ext_vbus = 0,
59 .i2c_enable = 0,
60 .ulpi_fs_ls = 0,
61 .host_support_fs_ls_low_power = 0,
62 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
63 .ts_dline = 0,
64 .reload_ctl = 0,
65 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
66 GAHBCFG_HBSTLEN_SHIFT,
67 .uframe_sched = 0,
68 .external_id_pin_ctl = -1,
69 .hibernation = -1,
70};
71
72static const struct dwc2_core_params params_bcm2835 = {
73 .otg_cap = 0, /* HNP/SRP capable */
74 .otg_ver = 0, /* 1.3 */
75 .dma_desc_enable = 0,
76 .dma_desc_fs_enable = 0,
77 .speed = 0, /* High Speed */
78 .enable_dynamic_fifo = 1,
79 .en_multiple_tx_fifo = 1,
80 .host_rx_fifo_size = 774, /* 774 DWORDs */
81 .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
82 .host_perio_tx_fifo_size = 512, /* 512 DWORDs */
83 .max_transfer_size = 65535,
84 .max_packet_count = 511,
85 .host_channels = 8,
86 .phy_type = 1, /* UTMI */
87 .phy_utmi_width = 8, /* 8 bits */
88 .phy_ulpi_ddr = 0, /* Single */
89 .phy_ulpi_ext_vbus = 0,
90 .i2c_enable = 0,
91 .ulpi_fs_ls = 0,
92 .host_support_fs_ls_low_power = 0,
93 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
94 .ts_dline = 0,
95 .reload_ctl = 0,
96 .ahbcfg = 0x10,
97 .uframe_sched = 0,
98 .external_id_pin_ctl = -1,
99 .hibernation = -1,
100};
101
102static const struct dwc2_core_params params_rk3066 = {
103 .otg_cap = 2, /* non-HNP/non-SRP */
104 .otg_ver = -1,
105 .dma_desc_enable = 0,
106 .dma_desc_fs_enable = 0,
107 .speed = -1,
108 .enable_dynamic_fifo = 1,
109 .en_multiple_tx_fifo = -1,
110 .host_rx_fifo_size = 525, /* 525 DWORDs */
111 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
112 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
113 .max_transfer_size = -1,
114 .max_packet_count = -1,
115 .host_channels = -1,
116 .phy_type = -1,
117 .phy_utmi_width = -1,
118 .phy_ulpi_ddr = -1,
119 .phy_ulpi_ext_vbus = -1,
120 .i2c_enable = -1,
121 .ulpi_fs_ls = -1,
122 .host_support_fs_ls_low_power = -1,
123 .host_ls_low_power_phy_clk = -1,
124 .ts_dline = -1,
125 .reload_ctl = -1,
126 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
127 GAHBCFG_HBSTLEN_SHIFT,
128 .uframe_sched = -1,
129 .external_id_pin_ctl = -1,
130 .hibernation = -1,
131};
132
133static const struct dwc2_core_params params_ltq = {
134 .otg_cap = 2, /* non-HNP/non-SRP */
135 .otg_ver = -1,
136 .dma_desc_enable = -1,
137 .dma_desc_fs_enable = -1,
138 .speed = -1,
139 .enable_dynamic_fifo = -1,
140 .en_multiple_tx_fifo = -1,
141 .host_rx_fifo_size = 288, /* 288 DWORDs */
142 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
143 .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
144 .max_transfer_size = 65535,
145 .max_packet_count = 511,
146 .host_channels = -1,
147 .phy_type = -1,
148 .phy_utmi_width = -1,
149 .phy_ulpi_ddr = -1,
150 .phy_ulpi_ext_vbus = -1,
151 .i2c_enable = -1,
152 .ulpi_fs_ls = -1,
153 .host_support_fs_ls_low_power = -1,
154 .host_ls_low_power_phy_clk = -1,
155 .ts_dline = -1,
156 .reload_ctl = -1,
157 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
158 GAHBCFG_HBSTLEN_SHIFT,
159 .uframe_sched = -1,
160 .external_id_pin_ctl = -1,
161 .hibernation = -1,
162};
163
164static const struct dwc2_core_params params_amlogic = {
165 .otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
166 .otg_ver = -1,
167 .dma_desc_enable = 0,
168 .dma_desc_fs_enable = 0,
169 .speed = DWC2_SPEED_PARAM_HIGH,
170 .enable_dynamic_fifo = 1,
171 .en_multiple_tx_fifo = -1,
172 .host_rx_fifo_size = 512,
173 .host_nperio_tx_fifo_size = 500,
174 .host_perio_tx_fifo_size = 500,
175 .max_transfer_size = -1,
176 .max_packet_count = -1,
177 .host_channels = 16,
178 .phy_type = DWC2_PHY_TYPE_PARAM_UTMI,
179 .phy_utmi_width = -1,
180 .phy_ulpi_ddr = -1,
181 .phy_ulpi_ext_vbus = -1,
182 .i2c_enable = -1,
183 .ulpi_fs_ls = -1,
184 .host_support_fs_ls_low_power = -1,
185 .host_ls_low_power_phy_clk = -1,
186 .ts_dline = -1,
187 .reload_ctl = 1,
188 .ahbcfg = GAHBCFG_HBSTLEN_INCR8 <<
189 GAHBCFG_HBSTLEN_SHIFT,
190 .uframe_sched = 0,
191 .external_id_pin_ctl = -1,
192 .hibernation = -1,
193};
194
195static const struct dwc2_core_params params_default = {
196 .otg_cap = -1,
197 .otg_ver = -1,
198
199 /*
200 * Disable descriptor dma mode by default as the HW can support
201 * it, but does not support it for SPLIT transactions.
202 * Disable it for FS devices as well.
203 */
204 .dma_desc_enable = 0,
205 .dma_desc_fs_enable = 0,
206
207 .speed = -1,
208 .enable_dynamic_fifo = -1,
209 .en_multiple_tx_fifo = -1,
210 .host_rx_fifo_size = -1,
211 .host_nperio_tx_fifo_size = -1,
212 .host_perio_tx_fifo_size = -1,
213 .max_transfer_size = -1,
214 .max_packet_count = -1,
215 .host_channels = -1,
216 .phy_type = -1,
217 .phy_utmi_width = -1,
218 .phy_ulpi_ddr = -1,
219 .phy_ulpi_ext_vbus = -1,
220 .i2c_enable = -1,
221 .ulpi_fs_ls = -1,
222 .host_support_fs_ls_low_power = -1,
223 .host_ls_low_power_phy_clk = -1,
224 .ts_dline = -1,
225 .reload_ctl = -1,
226 .ahbcfg = -1,
227 .uframe_sched = -1,
228 .external_id_pin_ctl = -1,
229 .hibernation = -1,
230};
231
232const struct of_device_id dwc2_of_match_table[] = {
233 { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
234 { .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 },
235 { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
236 { .compatible = "lantiq,arx100-usb", .data = &params_ltq },
237 { .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
238 { .compatible = "snps,dwc2", .data = NULL },
239 { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
240 { .compatible = "amlogic,meson8b-usb", .data = &params_amlogic },
241 { .compatible = "amlogic,meson-gxbb-usb", .data = &params_amlogic },
242 { .compatible = "amcc,dwc-otg", .data = NULL },
243 {},
244};
245MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
246
247static void dwc2_get_device_property(struct dwc2_hsotg *hsotg,
248 char *property, u8 size, u64 *value)
249{
250 u8 val8;
251 u16 val16;
252 u32 val32;
253
254 switch (size) {
255 case 0:
256 *value = device_property_read_bool(hsotg->dev, property);
257 break;
258 case 1:
259 if (device_property_read_u8(hsotg->dev, property, &val8))
260 return;
261
262 *value = val8;
263 break;
264 case 2:
265 if (device_property_read_u16(hsotg->dev, property, &val16))
266 return;
267
268 *value = val16;
269 break;
270 case 4:
271 if (device_property_read_u32(hsotg->dev, property, &val32))
272 return;
273
274 *value = val32;
275 break;
276 case 8:
277 if (device_property_read_u64(hsotg->dev, property, value))
278 return;
279
280 break;
281 default:
282 /*
283 * The size is checked by the only function that calls
284 * this so this should never happen.
285 */
286 WARN_ON(1);
287 return;
288 }
289}
290
291static void dwc2_set_core_param(void *param, u8 size, u64 value)
292{
293 switch (size) {
294 case 0:
295 *((bool *)param) = !!value;
296 break;
297 case 1:
298 *((u8 *)param) = (u8)value;
299 break;
300 case 2:
301 *((u16 *)param) = (u16)value;
302 break;
303 case 4:
304 *((u32 *)param) = (u32)value;
305 break;
306 case 8:
307 *((u64 *)param) = (u64)value;
308 break;
309 default:
310 /*
311 * The size is checked by the only function that calls
312 * this so this should never happen.
313 */
314 WARN_ON(1);
315 return;
316 }
317}
318
319/**
320 * dwc2_set_param() - Set a core parameter
321 *
322 * @hsotg: Programming view of the DWC_otg controller
323 * @param: Pointer to the parameter to set
324 * @lookup: True if the property should be looked up
325 * @property: The device property to read
326 * @legacy: The param value to set if @property is not available. This
327 * will typically be the legacy value set in the static
328 * params structure.
329 * @def: The default value
330 * @min: The minimum value
331 * @max: The maximum value
332 * @size: The size of the core parameter in bytes, or 0 for bool.
333 *
334 * This function looks up @property and sets the @param to that value.
335 * If the property doesn't exist it uses the passed-in @value. It will
336 * verify that the value falls between @min and @max. If it doesn't,
337 * it will output an error and set the parameter to either @def or,
338 * failing that, to @min.
339 *
340 * The @size is used to write to @param and to query the device
341 * properties so that this same function can be used with different
342 * types of parameters.
343 */
344static void dwc2_set_param(struct dwc2_hsotg *hsotg, void *param,
345 bool lookup, char *property, u64 legacy,
346 u64 def, u64 min, u64 max, u8 size)
347{
348 u64 sizemax;
349 u64 value;
350
351 if (WARN_ON(!hsotg || !param || !property))
352 return;
353
354 if (WARN((size > 8) || ((size & (size - 1)) != 0),
355 "Invalid size %d for %s\n", size, property))
356 return;
357
358 dev_vdbg(hsotg->dev, "%s: Setting %s: legacy=%llu, def=%llu, min=%llu, max=%llu, size=%d\n",
359 __func__, property, legacy, def, min, max, size);
360
361 sizemax = (1ULL << (size * 8)) - 1;
362 value = legacy;
363
364 /* Override legacy settings. */
365 if (lookup)
366 dwc2_get_device_property(hsotg, property, size, &value);
367
368 /*
369 * While the value is not valid, try setting it to the default
370 * value, and failing that, set it to the minimum.
371 */
372 while ((value < min) || (value > max)) {
373 /* Print an error unless the value is set to auto. */
374 if (value != sizemax)
375 dev_err(hsotg->dev, "Invalid value %llu for param %s\n",
376 value, property);
377
378 /*
379 * If we are already the default, just set it to the
380 * minimum.
381 */
382 if (value == def) {
383 dev_vdbg(hsotg->dev, "%s: setting value to min=%llu\n",
384 __func__, min);
385 value = min;
386 break;
387 }
388
389 /* Try the default value */
390 dev_vdbg(hsotg->dev, "%s: setting value to default=%llu\n",
391 __func__, def);
392 value = def;
393 }
394
395 dev_dbg(hsotg->dev, "Setting %s to %llu\n", property, value);
396 dwc2_set_core_param(param, size, value);
397}
398
399/**
400 * dwc2_set_param_u16() - Set a u16 parameter
401 *
402 * See dwc2_set_param().
403 */
404static void dwc2_set_param_u16(struct dwc2_hsotg *hsotg, u16 *param,
405 bool lookup, char *property, u16 legacy,
406 u16 def, u16 min, u16 max)
407{
408 dwc2_set_param(hsotg, param, lookup, property,
409 legacy, def, min, max, 2);
410}
411
412/**
413 * dwc2_set_param_bool() - Set a bool parameter
414 *
415 * See dwc2_set_param().
416 *
417 * Note: there is no 'legacy' argument here because there is no legacy
418 * source of bool params.
419 */
420static void dwc2_set_param_bool(struct dwc2_hsotg *hsotg, bool *param,
421 bool lookup, char *property,
422 bool def, bool min, bool max)
423{
424 dwc2_set_param(hsotg, param, lookup, property,
425 def, def, min, max, 0);
426}
427
428#define DWC2_OUT_OF_BOUNDS(a, b, c) ((a) < (b) || (a) > (c))
429
430/* Parameter access functions */
431static void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val)
432{
433 int valid = 1;
434
435 switch (val) {
436 case DWC2_CAP_PARAM_HNP_SRP_CAPABLE:
437 if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE)
438 valid = 0;
439 break;
440 case DWC2_CAP_PARAM_SRP_ONLY_CAPABLE:
441 switch (hsotg->hw_params.op_mode) {
442 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
443 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
444 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
445 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
446 break;
447 default:
448 valid = 0;
449 break;
450 }
451 break;
452 case DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE:
453 /* always valid */
454 break;
455 default:
456 valid = 0;
457 break;
458 }
459
460 if (!valid) {
461 if (val >= 0)
462 dev_err(hsotg->dev,
463 "%d invalid for otg_cap parameter. Check HW configuration.\n",
464 val);
465 switch (hsotg->hw_params.op_mode) {
466 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
467 val = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
468 break;
469 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
470 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
471 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
472 val = DWC2_CAP_PARAM_SRP_ONLY_CAPABLE;
473 break;
474 default:
475 val = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
476 break;
477 }
478 dev_dbg(hsotg->dev, "Setting otg_cap to %d\n", val);
479 }
480
481 hsotg->params.otg_cap = val;
482}
483
484static void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val)
485{
486 int valid = 1;
487
488 if (val > 0 && (hsotg->params.host_dma <= 0 ||
489 !hsotg->hw_params.dma_desc_enable))
490 valid = 0;
491 if (val < 0)
492 valid = 0;
493
494 if (!valid) {
495 if (val >= 0)
496 dev_err(hsotg->dev,
497 "%d invalid for dma_desc_enable parameter. Check HW configuration.\n",
498 val);
499 val = (hsotg->params.host_dma > 0 &&
500 hsotg->hw_params.dma_desc_enable);
501 dev_dbg(hsotg->dev, "Setting dma_desc_enable to %d\n", val);
502 }
503
504 hsotg->params.dma_desc_enable = val;
505}
506
507static void dwc2_set_param_dma_desc_fs_enable(struct dwc2_hsotg *hsotg, int val)
508{
509 int valid = 1;
510
511 if (val > 0 && (hsotg->params.host_dma <= 0 ||
512 !hsotg->hw_params.dma_desc_enable))
513 valid = 0;
514 if (val < 0)
515 valid = 0;
516
517 if (!valid) {
518 if (val >= 0)
519 dev_err(hsotg->dev,
520 "%d invalid for dma_desc_fs_enable parameter. Check HW configuration.\n",
521 val);
522 val = (hsotg->params.host_dma > 0 &&
523 hsotg->hw_params.dma_desc_enable);
524 }
525
526 hsotg->params.dma_desc_fs_enable = val;
527 dev_dbg(hsotg->dev, "Setting dma_desc_fs_enable to %d\n", val);
528}
529
530static void
531dwc2_set_param_host_support_fs_ls_low_power(struct dwc2_hsotg *hsotg,
532 int val)
533{
534 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
535 if (val >= 0) {
536 dev_err(hsotg->dev,
537 "Wrong value for host_support_fs_low_power\n");
538 dev_err(hsotg->dev,
539 "host_support_fs_low_power must be 0 or 1\n");
540 }
541 val = 0;
542 dev_dbg(hsotg->dev,
543 "Setting host_support_fs_low_power to %d\n", val);
544 }
545
546 hsotg->params.host_support_fs_ls_low_power = val;
547}
548
549static void dwc2_set_param_enable_dynamic_fifo(struct dwc2_hsotg *hsotg,
550 int val)
551{
552 int valid = 1;
553
554 if (val > 0 && !hsotg->hw_params.enable_dynamic_fifo)
555 valid = 0;
556 if (val < 0)
557 valid = 0;
558
559 if (!valid) {
560 if (val >= 0)
561 dev_err(hsotg->dev,
562 "%d invalid for enable_dynamic_fifo parameter. Check HW configuration.\n",
563 val);
564 val = hsotg->hw_params.enable_dynamic_fifo;
565 dev_dbg(hsotg->dev, "Setting enable_dynamic_fifo to %d\n", val);
566 }
567
568 hsotg->params.enable_dynamic_fifo = val;
569}
570
571static void dwc2_set_param_host_rx_fifo_size(struct dwc2_hsotg *hsotg, int val)
572{
573 int valid = 1;
574
575 if (val < 16 || val > hsotg->hw_params.rx_fifo_size)
576 valid = 0;
577
578 if (!valid) {
579 if (val >= 0)
580 dev_err(hsotg->dev,
581 "%d invalid for host_rx_fifo_size. Check HW configuration.\n",
582 val);
583 val = hsotg->hw_params.rx_fifo_size;
584 dev_dbg(hsotg->dev, "Setting host_rx_fifo_size to %d\n", val);
585 }
586
587 hsotg->params.host_rx_fifo_size = val;
588}
589
590static void dwc2_set_param_host_nperio_tx_fifo_size(struct dwc2_hsotg *hsotg,
591 int val)
592{
593 int valid = 1;
594
595 if (val < 16 || val > hsotg->hw_params.host_nperio_tx_fifo_size)
596 valid = 0;
597
598 if (!valid) {
599 if (val >= 0)
600 dev_err(hsotg->dev,
601 "%d invalid for host_nperio_tx_fifo_size. Check HW configuration.\n",
602 val);
603 val = hsotg->hw_params.host_nperio_tx_fifo_size;
604 dev_dbg(hsotg->dev, "Setting host_nperio_tx_fifo_size to %d\n",
605 val);
606 }
607
608 hsotg->params.host_nperio_tx_fifo_size = val;
609}
610
611static void dwc2_set_param_host_perio_tx_fifo_size(struct dwc2_hsotg *hsotg,
612 int val)
613{
614 int valid = 1;
615
616 if (val < 16 || val > hsotg->hw_params.host_perio_tx_fifo_size)
617 valid = 0;
618
619 if (!valid) {
620 if (val >= 0)
621 dev_err(hsotg->dev,
622 "%d invalid for host_perio_tx_fifo_size. Check HW configuration.\n",
623 val);
624 val = hsotg->hw_params.host_perio_tx_fifo_size;
625 dev_dbg(hsotg->dev, "Setting host_perio_tx_fifo_size to %d\n",
626 val);
627 }
628
629 hsotg->params.host_perio_tx_fifo_size = val;
630}
631
632static void dwc2_set_param_max_transfer_size(struct dwc2_hsotg *hsotg, int val)
633{
634 int valid = 1;
635
636 if (val < 2047 || val > hsotg->hw_params.max_transfer_size)
637 valid = 0;
638
639 if (!valid) {
640 if (val >= 0)
641 dev_err(hsotg->dev,
642 "%d invalid for max_transfer_size. Check HW configuration.\n",
643 val);
644 val = hsotg->hw_params.max_transfer_size;
645 dev_dbg(hsotg->dev, "Setting max_transfer_size to %d\n", val);
646 }
647
648 hsotg->params.max_transfer_size = val;
649}
650
651static void dwc2_set_param_max_packet_count(struct dwc2_hsotg *hsotg, int val)
652{
653 int valid = 1;
654
655 if (val < 15 || val > hsotg->hw_params.max_packet_count)
656 valid = 0;
657
658 if (!valid) {
659 if (val >= 0)
660 dev_err(hsotg->dev,
661 "%d invalid for max_packet_count. Check HW configuration.\n",
662 val);
663 val = hsotg->hw_params.max_packet_count;
664 dev_dbg(hsotg->dev, "Setting max_packet_count to %d\n", val);
665 }
666
667 hsotg->params.max_packet_count = val;
668}
669
670static void dwc2_set_param_host_channels(struct dwc2_hsotg *hsotg, int val)
671{
672 int valid = 1;
673
674 if (val < 1 || val > hsotg->hw_params.host_channels)
675 valid = 0;
676
677 if (!valid) {
678 if (val >= 0)
679 dev_err(hsotg->dev,
680 "%d invalid for host_channels. Check HW configuration.\n",
681 val);
682 val = hsotg->hw_params.host_channels;
683 dev_dbg(hsotg->dev, "Setting host_channels to %d\n", val);
684 }
685
686 hsotg->params.host_channels = val;
687}
688
689static void dwc2_set_param_phy_type(struct dwc2_hsotg *hsotg, int val)
690{
691 int valid = 0;
692 u32 hs_phy_type, fs_phy_type;
693
694 if (DWC2_OUT_OF_BOUNDS(val, DWC2_PHY_TYPE_PARAM_FS,
695 DWC2_PHY_TYPE_PARAM_ULPI)) {
696 if (val >= 0) {
697 dev_err(hsotg->dev, "Wrong value for phy_type\n");
698 dev_err(hsotg->dev, "phy_type must be 0, 1 or 2\n");
699 }
700
701 valid = 0;
702 }
703
704 hs_phy_type = hsotg->hw_params.hs_phy_type;
705 fs_phy_type = hsotg->hw_params.fs_phy_type;
706 if (val == DWC2_PHY_TYPE_PARAM_UTMI &&
707 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI ||
708 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
709 valid = 1;
710 else if (val == DWC2_PHY_TYPE_PARAM_ULPI &&
711 (hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI ||
712 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
713 valid = 1;
714 else if (val == DWC2_PHY_TYPE_PARAM_FS &&
715 fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED)
716 valid = 1;
717
718 if (!valid) {
719 if (val >= 0)
720 dev_err(hsotg->dev,
721 "%d invalid for phy_type. Check HW configuration.\n",
722 val);
723 val = DWC2_PHY_TYPE_PARAM_FS;
724 if (hs_phy_type != GHWCFG2_HS_PHY_TYPE_NOT_SUPPORTED) {
725 if (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI ||
726 hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI)
727 val = DWC2_PHY_TYPE_PARAM_UTMI;
728 else
729 val = DWC2_PHY_TYPE_PARAM_ULPI;
730 }
731 dev_dbg(hsotg->dev, "Setting phy_type to %d\n", val);
732 }
733
734 hsotg->params.phy_type = val;
735}
736
737static int dwc2_get_param_phy_type(struct dwc2_hsotg *hsotg)
738{
739 return hsotg->params.phy_type;
740}
741
742static void dwc2_set_param_speed(struct dwc2_hsotg *hsotg, int val)
743{
744 int valid = 1;
745
746 if (DWC2_OUT_OF_BOUNDS(val, 0, 2)) {
747 if (val >= 0) {
748 dev_err(hsotg->dev, "Wrong value for speed parameter\n");
749 dev_err(hsotg->dev, "max_speed parameter must be 0, 1, or 2\n");
750 }
751 valid = 0;
752 }
753
754 if (dwc2_is_hs_iot(hsotg) &&
755 val == DWC2_SPEED_PARAM_LOW)
756 valid = 0;
757
758 if (val == DWC2_SPEED_PARAM_HIGH &&
759 dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS)
760 valid = 0;
761
762 if (!valid) {
763 if (val >= 0)
764 dev_err(hsotg->dev,
765 "%d invalid for speed parameter. Check HW configuration.\n",
766 val);
767 val = dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS ?
768 DWC2_SPEED_PARAM_FULL : DWC2_SPEED_PARAM_HIGH;
769 dev_dbg(hsotg->dev, "Setting speed to %d\n", val);
770 }
771
772 hsotg->params.speed = val;
773}
774
775static void dwc2_set_param_host_ls_low_power_phy_clk(struct dwc2_hsotg *hsotg,
776 int val)
777{
778 int valid = 1;
779
780 if (DWC2_OUT_OF_BOUNDS(val, DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ,
781 DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ)) {
782 if (val >= 0) {
783 dev_err(hsotg->dev,
784 "Wrong value for host_ls_low_power_phy_clk parameter\n");
785 dev_err(hsotg->dev,
786 "host_ls_low_power_phy_clk must be 0 or 1\n");
787 }
788 valid = 0;
789 }
790
791 if (val == DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ &&
792 dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS)
793 valid = 0;
794
795 if (!valid) {
796 if (val >= 0)
797 dev_err(hsotg->dev,
798 "%d invalid for host_ls_low_power_phy_clk. Check HW configuration.\n",
799 val);
800 val = dwc2_get_param_phy_type(hsotg) == DWC2_PHY_TYPE_PARAM_FS
801 ? DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ
802 : DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ;
803 dev_dbg(hsotg->dev, "Setting host_ls_low_power_phy_clk to %d\n",
804 val);
805 }
806
807 hsotg->params.host_ls_low_power_phy_clk = val;
808}
809
810static void dwc2_set_param_phy_ulpi_ddr(struct dwc2_hsotg *hsotg, int val)
811{
812 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
813 if (val >= 0) {
814 dev_err(hsotg->dev, "Wrong value for phy_ulpi_ddr\n");
815 dev_err(hsotg->dev, "phy_upli_ddr must be 0 or 1\n");
816 }
817 val = 0;
818 dev_dbg(hsotg->dev, "Setting phy_upli_ddr to %d\n", val);
819 }
820
821 hsotg->params.phy_ulpi_ddr = val;
822}
823
824static void dwc2_set_param_phy_ulpi_ext_vbus(struct dwc2_hsotg *hsotg, int val)
825{
826 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
827 if (val >= 0) {
828 dev_err(hsotg->dev,
829 "Wrong value for phy_ulpi_ext_vbus\n");
830 dev_err(hsotg->dev,
831 "phy_ulpi_ext_vbus must be 0 or 1\n");
832 }
833 val = 0;
834 dev_dbg(hsotg->dev, "Setting phy_ulpi_ext_vbus to %d\n", val);
835 }
836
837 hsotg->params.phy_ulpi_ext_vbus = val;
838}
839
840static void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg, int val)
841{
842 int valid = 0;
843
844 switch (hsotg->hw_params.utmi_phy_data_width) {
845 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8:
846 valid = (val == 8);
847 break;
848 case GHWCFG4_UTMI_PHY_DATA_WIDTH_16:
849 valid = (val == 16);
850 break;
851 case GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16:
852 valid = (val == 8 || val == 16);
853 break;
854 }
855
856 if (!valid) {
857 if (val >= 0) {
858 dev_err(hsotg->dev,
859 "%d invalid for phy_utmi_width. Check HW configuration.\n",
860 val);
861 }
862 val = (hsotg->hw_params.utmi_phy_data_width ==
863 GHWCFG4_UTMI_PHY_DATA_WIDTH_8) ? 8 : 16;
864 dev_dbg(hsotg->dev, "Setting phy_utmi_width to %d\n", val);
865 }
866
867 hsotg->params.phy_utmi_width = val;
868}
869
870static void dwc2_set_param_ulpi_fs_ls(struct dwc2_hsotg *hsotg, int val)
871{
872 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
873 if (val >= 0) {
874 dev_err(hsotg->dev, "Wrong value for ulpi_fs_ls\n");
875 dev_err(hsotg->dev, "ulpi_fs_ls must be 0 or 1\n");
876 }
877 val = 0;
878 dev_dbg(hsotg->dev, "Setting ulpi_fs_ls to %d\n", val);
879 }
880
881 hsotg->params.ulpi_fs_ls = val;
882}
883
884static void dwc2_set_param_ts_dline(struct dwc2_hsotg *hsotg, int val)
885{
886 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
887 if (val >= 0) {
888 dev_err(hsotg->dev, "Wrong value for ts_dline\n");
889 dev_err(hsotg->dev, "ts_dline must be 0 or 1\n");
890 }
891 val = 0;
892 dev_dbg(hsotg->dev, "Setting ts_dline to %d\n", val);
893 }
894
895 hsotg->params.ts_dline = val;
896}
897
898static void dwc2_set_param_i2c_enable(struct dwc2_hsotg *hsotg, int val)
899{
900 int valid = 1;
901
902 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
903 if (val >= 0) {
904 dev_err(hsotg->dev, "Wrong value for i2c_enable\n");
905 dev_err(hsotg->dev, "i2c_enable must be 0 or 1\n");
906 }
907
908 valid = 0;
909 }
910
911 if (val == 1 && !(hsotg->hw_params.i2c_enable))
912 valid = 0;
913
914 if (!valid) {
915 if (val >= 0)
916 dev_err(hsotg->dev,
917 "%d invalid for i2c_enable. Check HW configuration.\n",
918 val);
919 val = hsotg->hw_params.i2c_enable;
920 dev_dbg(hsotg->dev, "Setting i2c_enable to %d\n", val);
921 }
922
923 hsotg->params.i2c_enable = val;
924}
925
926static void dwc2_set_param_en_multiple_tx_fifo(struct dwc2_hsotg *hsotg,
927 int val)
928{
929 int valid = 1;
930
931 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
932 if (val >= 0) {
933 dev_err(hsotg->dev,
934 "Wrong value for en_multiple_tx_fifo,\n");
935 dev_err(hsotg->dev,
936 "en_multiple_tx_fifo must be 0 or 1\n");
937 }
938 valid = 0;
939 }
940
941 if (val == 1 && !hsotg->hw_params.en_multiple_tx_fifo)
942 valid = 0;
943
944 if (!valid) {
945 if (val >= 0)
946 dev_err(hsotg->dev,
947 "%d invalid for parameter en_multiple_tx_fifo. Check HW configuration.\n",
948 val);
949 val = hsotg->hw_params.en_multiple_tx_fifo;
950 dev_dbg(hsotg->dev, "Setting en_multiple_tx_fifo to %d\n", val);
951 }
952
953 hsotg->params.en_multiple_tx_fifo = val;
954}
955
956static void dwc2_set_param_reload_ctl(struct dwc2_hsotg *hsotg, int val)
957{
958 int valid = 1;
959
960 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
961 if (val >= 0) {
962 dev_err(hsotg->dev,
963 "'%d' invalid for parameter reload_ctl\n", val);
964 dev_err(hsotg->dev, "reload_ctl must be 0 or 1\n");
965 }
966 valid = 0;
967 }
968
969 if (val == 1 && hsotg->hw_params.snpsid < DWC2_CORE_REV_2_92a)
970 valid = 0;
971
972 if (!valid) {
973 if (val >= 0)
974 dev_err(hsotg->dev,
975 "%d invalid for parameter reload_ctl. Check HW configuration.\n",
976 val);
977 val = hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_92a;
978 dev_dbg(hsotg->dev, "Setting reload_ctl to %d\n", val);
979 }
980
981 hsotg->params.reload_ctl = val;
982}
983
984static void dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val)
985{
986 if (val != -1)
987 hsotg->params.ahbcfg = val;
988 else
989 hsotg->params.ahbcfg = GAHBCFG_HBSTLEN_INCR4 <<
990 GAHBCFG_HBSTLEN_SHIFT;
991}
992
993static void dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val)
994{
995 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
996 if (val >= 0) {
997 dev_err(hsotg->dev,
998 "'%d' invalid for parameter otg_ver\n", val);
999 dev_err(hsotg->dev,
1000 "otg_ver must be 0 (for OTG 1.3 support) or 1 (for OTG 2.0 support)\n");
1001 }
1002 val = 0;
1003 dev_dbg(hsotg->dev, "Setting otg_ver to %d\n", val);
1004 }
1005
1006 hsotg->params.otg_ver = val;
1007}
1008
1009static void dwc2_set_param_uframe_sched(struct dwc2_hsotg *hsotg, int val)
1010{
1011 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1012 if (val >= 0) {
1013 dev_err(hsotg->dev,
1014 "'%d' invalid for parameter uframe_sched\n",
1015 val);
1016 dev_err(hsotg->dev, "uframe_sched must be 0 or 1\n");
1017 }
1018 val = 1;
1019 dev_dbg(hsotg->dev, "Setting uframe_sched to %d\n", val);
1020 }
1021
1022 hsotg->params.uframe_sched = val;
1023}
1024
1025static void dwc2_set_param_external_id_pin_ctl(struct dwc2_hsotg *hsotg,
1026 int val)
1027{
1028 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1029 if (val >= 0) {
1030 dev_err(hsotg->dev,
1031 "'%d' invalid for parameter external_id_pin_ctl\n",
1032 val);
1033 dev_err(hsotg->dev, "external_id_pin_ctl must be 0 or 1\n");
1034 }
1035 val = 0;
1036 dev_dbg(hsotg->dev, "Setting external_id_pin_ctl to %d\n", val);
1037 }
1038
1039 hsotg->params.external_id_pin_ctl = val;
1040}
1041
1042static void dwc2_set_param_hibernation(struct dwc2_hsotg *hsotg,
1043 int val)
1044{
1045 if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
1046 if (val >= 0) {
1047 dev_err(hsotg->dev,
1048 "'%d' invalid for parameter hibernation\n",
1049 val);
1050 dev_err(hsotg->dev, "hibernation must be 0 or 1\n");
1051 }
1052 val = 0;
1053 dev_dbg(hsotg->dev, "Setting hibernation to %d\n", val);
1054 }
1055
1056 hsotg->params.hibernation = val;
1057}
1058
1059static void dwc2_set_param_tx_fifo_sizes(struct dwc2_hsotg *hsotg)
1060{
1061 int i;
1062 int num;
1063 char *property = "g-tx-fifo-size";
1064 struct dwc2_core_params *p = &hsotg->params;
1065
1066 memset(p->g_tx_fifo_size, 0, sizeof(p->g_tx_fifo_size));
1067
1068 /* Read tx fifo sizes */
1069 num = device_property_read_u32_array(hsotg->dev, property, NULL, 0);
1070
1071 if (num > 0) {
1072 device_property_read_u32_array(hsotg->dev, property,
1073 &p->g_tx_fifo_size[1],
1074 num);
1075 } else {
1076 u32 p_tx_fifo[] = DWC2_G_P_LEGACY_TX_FIFO_SIZE;
1077
1078 memcpy(&p->g_tx_fifo_size[1],
1079 p_tx_fifo,
1080 sizeof(p_tx_fifo));
1081
1082 num = ARRAY_SIZE(p_tx_fifo);
1083 }
1084
1085 for (i = 0; i < num; i++) {
1086 if ((i + 1) >= ARRAY_SIZE(p->g_tx_fifo_size))
1087 break;
1088
1089 dev_dbg(hsotg->dev, "Setting %s[%d] to %d\n",
1090 property, i + 1, p->g_tx_fifo_size[i + 1]);
1091 }
1092}
1093
1094static void dwc2_set_gadget_dma(struct dwc2_hsotg *hsotg)
1095{
1096 struct dwc2_hw_params *hw = &hsotg->hw_params;
1097 struct dwc2_core_params *p = &hsotg->params;
1098 bool dma_capable = !(hw->arch == GHWCFG2_SLAVE_ONLY_ARCH);
1099
1100 /* Buffer DMA */
1101 dwc2_set_param_bool(hsotg, &p->g_dma,
1102 false, "gadget-dma",
1103 true, false,
1104 dma_capable);
1105
1106 /* DMA Descriptor */
1107 dwc2_set_param_bool(hsotg, &p->g_dma_desc, false,
1108 "gadget-dma-desc",
1109 p->g_dma, false,
1110 !!hw->dma_desc_enable);
1111}
1112
1113/**
1114 * dwc2_set_parameters() - Set all core parameters.
1115 *
1116 * @hsotg: Programming view of the DWC_otg controller
1117 * @params: The parameters to set
1118 */
1119static void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
1120 const struct dwc2_core_params *params)
1121{
1122 struct dwc2_hw_params *hw = &hsotg->hw_params;
1123 struct dwc2_core_params *p = &hsotg->params;
1124 bool dma_capable = !(hw->arch == GHWCFG2_SLAVE_ONLY_ARCH);
1125
1126 dwc2_set_param_otg_cap(hsotg, params->otg_cap);
1127 if ((hsotg->dr_mode == USB_DR_MODE_HOST) ||
1128 (hsotg->dr_mode == USB_DR_MODE_OTG)) {
1129 dev_dbg(hsotg->dev, "Setting HOST parameters\n");
1130
1131 dwc2_set_param_bool(hsotg, &p->host_dma,
1132 false, "host-dma",
1133 true, false,
1134 dma_capable);
1135 }
1136 dwc2_set_param_dma_desc_enable(hsotg, params->dma_desc_enable);
1137 dwc2_set_param_dma_desc_fs_enable(hsotg, params->dma_desc_fs_enable);
1138
1139 dwc2_set_param_host_support_fs_ls_low_power(hsotg,
1140 params->host_support_fs_ls_low_power);
1141 dwc2_set_param_enable_dynamic_fifo(hsotg,
1142 params->enable_dynamic_fifo);
1143 dwc2_set_param_host_rx_fifo_size(hsotg,
1144 params->host_rx_fifo_size);
1145 dwc2_set_param_host_nperio_tx_fifo_size(hsotg,
1146 params->host_nperio_tx_fifo_size);
1147 dwc2_set_param_host_perio_tx_fifo_size(hsotg,
1148 params->host_perio_tx_fifo_size);
1149 dwc2_set_param_max_transfer_size(hsotg,
1150 params->max_transfer_size);
1151 dwc2_set_param_max_packet_count(hsotg,
1152 params->max_packet_count);
1153 dwc2_set_param_host_channels(hsotg, params->host_channels);
1154 dwc2_set_param_phy_type(hsotg, params->phy_type);
1155 dwc2_set_param_speed(hsotg, params->speed);
1156 dwc2_set_param_host_ls_low_power_phy_clk(hsotg,
1157 params->host_ls_low_power_phy_clk);
1158 dwc2_set_param_phy_ulpi_ddr(hsotg, params->phy_ulpi_ddr);
1159 dwc2_set_param_phy_ulpi_ext_vbus(hsotg,
1160 params->phy_ulpi_ext_vbus);
1161 dwc2_set_param_phy_utmi_width(hsotg, params->phy_utmi_width);
1162 dwc2_set_param_ulpi_fs_ls(hsotg, params->ulpi_fs_ls);
1163 dwc2_set_param_ts_dline(hsotg, params->ts_dline);
1164 dwc2_set_param_i2c_enable(hsotg, params->i2c_enable);
1165 dwc2_set_param_en_multiple_tx_fifo(hsotg,
1166 params->en_multiple_tx_fifo);
1167 dwc2_set_param_reload_ctl(hsotg, params->reload_ctl);
1168 dwc2_set_param_ahbcfg(hsotg, params->ahbcfg);
1169 dwc2_set_param_otg_ver(hsotg, params->otg_ver);
1170 dwc2_set_param_uframe_sched(hsotg, params->uframe_sched);
1171 dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl);
1172 dwc2_set_param_hibernation(hsotg, params->hibernation);
1173
1174 /*
1175 * Set devicetree-only parameters. These parameters do not
1176 * take any values from @params.
1177 */
1178 if ((hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) ||
1179 (hsotg->dr_mode == USB_DR_MODE_OTG)) {
1180 dev_dbg(hsotg->dev, "Setting peripheral device properties\n");
1181
1182 dwc2_set_gadget_dma(hsotg);
1183
1184 /*
1185 * The values for g_rx_fifo_size (2048) and
1186 * g_np_tx_fifo_size (1024) come from the legacy s3c
1187 * gadget driver. These defaults have been hard-coded
1188 * for some time so many platforms depend on these
1189 * values. Leave them as defaults for now and only
1190 * auto-detect if the hardware does not support the
1191 * default.
1192 */
1193 dwc2_set_param_u16(hsotg, &p->g_rx_fifo_size,
1194 true, "g-rx-fifo-size", 2048,
1195 hw->rx_fifo_size,
1196 16, hw->rx_fifo_size);
1197
1198 dwc2_set_param_u16(hsotg, &p->g_np_tx_fifo_size,
1199 true, "g-np-tx-fifo-size", 1024,
1200 hw->dev_nperio_tx_fifo_size,
1201 16, hw->dev_nperio_tx_fifo_size);
1202
1203 dwc2_set_param_tx_fifo_sizes(hsotg);
1204 }
1205}
1206
1207/*
1208 * Gets host hardware parameters. Forces host mode if not currently in
1209 * host mode. Should be called immediately after a core soft reset in
1210 * order to get the reset values.
1211 */
1212static void dwc2_get_host_hwparams(struct dwc2_hsotg *hsotg)
1213{
1214 struct dwc2_hw_params *hw = &hsotg->hw_params;
1215 u32 gnptxfsiz;
1216 u32 hptxfsiz;
1217 bool forced;
1218
1219 if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
1220 return;
1221
1222 forced = dwc2_force_mode_if_needed(hsotg, true);
1223
1224 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
1225 hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ);
1226 dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
1227 dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz);
1228
1229 if (forced)
1230 dwc2_clear_force_mode(hsotg);
1231
1232 hw->host_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >>
1233 FIFOSIZE_DEPTH_SHIFT;
1234 hw->host_perio_tx_fifo_size = (hptxfsiz & FIFOSIZE_DEPTH_MASK) >>
1235 FIFOSIZE_DEPTH_SHIFT;
1236}
1237
1238/*
1239 * Gets device hardware parameters. Forces device mode if not
1240 * currently in device mode. Should be called immediately after a core
1241 * soft reset in order to get the reset values.
1242 */
1243static void dwc2_get_dev_hwparams(struct dwc2_hsotg *hsotg)
1244{
1245 struct dwc2_hw_params *hw = &hsotg->hw_params;
1246 bool forced;
1247 u32 gnptxfsiz;
1248
1249 if (hsotg->dr_mode == USB_DR_MODE_HOST)
1250 return;
1251
1252 forced = dwc2_force_mode_if_needed(hsotg, false);
1253
1254 gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
1255 dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
1256
1257 if (forced)
1258 dwc2_clear_force_mode(hsotg);
1259
1260 hw->dev_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >>
1261 FIFOSIZE_DEPTH_SHIFT;
1262}
1263
1264/**
1265 * During device initialization, read various hardware configuration
1266 * registers and interpret the contents.
1267 */
1268int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
1269{
1270 struct dwc2_hw_params *hw = &hsotg->hw_params;
1271 unsigned int width;
1272 u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4;
1273 u32 grxfsiz;
1274
1275 /*
1276 * Attempt to ensure this device is really a DWC_otg Controller.
1277 * Read and verify the GSNPSID register contents. The value should be
1278 * 0x45f42xxx or 0x45f43xxx, which corresponds to either "OT2" or "OT3",
1279 * as in "OTG version 2.xx" or "OTG version 3.xx".
1280 */
1281 hw->snpsid = dwc2_readl(hsotg->regs + GSNPSID);
1282 if ((hw->snpsid & 0xfffff000) != 0x4f542000 &&
1283 (hw->snpsid & 0xfffff000) != 0x4f543000 &&
1284 (hw->snpsid & 0xffff0000) != 0x55310000 &&
1285 (hw->snpsid & 0xffff0000) != 0x55320000) {
1286 dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n",
1287 hw->snpsid);
1288 return -ENODEV;
1289 }
1290
1291 dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n",
1292 hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf,
1293 hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid);
1294
1295 hwcfg1 = dwc2_readl(hsotg->regs + GHWCFG1);
1296 hwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2);
1297 hwcfg3 = dwc2_readl(hsotg->regs + GHWCFG3);
1298 hwcfg4 = dwc2_readl(hsotg->regs + GHWCFG4);
1299 grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ);
1300
1301 dev_dbg(hsotg->dev, "hwcfg1=%08x\n", hwcfg1);
1302 dev_dbg(hsotg->dev, "hwcfg2=%08x\n", hwcfg2);
1303 dev_dbg(hsotg->dev, "hwcfg3=%08x\n", hwcfg3);
1304 dev_dbg(hsotg->dev, "hwcfg4=%08x\n", hwcfg4);
1305 dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz);
1306
1307 /*
1308 * Host specific hardware parameters. Reading these parameters
1309 * requires the controller to be in host mode. The mode will
1310 * be forced, if necessary, to read these values.
1311 */
1312 dwc2_get_host_hwparams(hsotg);
1313 dwc2_get_dev_hwparams(hsotg);
1314
1315 /* hwcfg1 */
1316 hw->dev_ep_dirs = hwcfg1;
1317
1318 /* hwcfg2 */
1319 hw->op_mode = (hwcfg2 & GHWCFG2_OP_MODE_MASK) >>
1320 GHWCFG2_OP_MODE_SHIFT;
1321 hw->arch = (hwcfg2 & GHWCFG2_ARCHITECTURE_MASK) >>
1322 GHWCFG2_ARCHITECTURE_SHIFT;
1323 hw->enable_dynamic_fifo = !!(hwcfg2 & GHWCFG2_DYNAMIC_FIFO);
1324 hw->host_channels = 1 + ((hwcfg2 & GHWCFG2_NUM_HOST_CHAN_MASK) >>
1325 GHWCFG2_NUM_HOST_CHAN_SHIFT);
1326 hw->hs_phy_type = (hwcfg2 & GHWCFG2_HS_PHY_TYPE_MASK) >>
1327 GHWCFG2_HS_PHY_TYPE_SHIFT;
1328 hw->fs_phy_type = (hwcfg2 & GHWCFG2_FS_PHY_TYPE_MASK) >>
1329 GHWCFG2_FS_PHY_TYPE_SHIFT;
1330 hw->num_dev_ep = (hwcfg2 & GHWCFG2_NUM_DEV_EP_MASK) >>
1331 GHWCFG2_NUM_DEV_EP_SHIFT;
1332 hw->nperio_tx_q_depth =
1333 (hwcfg2 & GHWCFG2_NONPERIO_TX_Q_DEPTH_MASK) >>
1334 GHWCFG2_NONPERIO_TX_Q_DEPTH_SHIFT << 1;
1335 hw->host_perio_tx_q_depth =
1336 (hwcfg2 & GHWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK) >>
1337 GHWCFG2_HOST_PERIO_TX_Q_DEPTH_SHIFT << 1;
1338 hw->dev_token_q_depth =
1339 (hwcfg2 & GHWCFG2_DEV_TOKEN_Q_DEPTH_MASK) >>
1340 GHWCFG2_DEV_TOKEN_Q_DEPTH_SHIFT;
1341
1342 /* hwcfg3 */
1343 width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >>
1344 GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT;
1345 hw->max_transfer_size = (1 << (width + 11)) - 1;
1346 width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >>
1347 GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT;
1348 hw->max_packet_count = (1 << (width + 4)) - 1;
1349 hw->i2c_enable = !!(hwcfg3 & GHWCFG3_I2C);
1350 hw->total_fifo_size = (hwcfg3 & GHWCFG3_DFIFO_DEPTH_MASK) >>
1351 GHWCFG3_DFIFO_DEPTH_SHIFT;
1352
1353 /* hwcfg4 */
1354 hw->en_multiple_tx_fifo = !!(hwcfg4 & GHWCFG4_DED_FIFO_EN);
1355 hw->num_dev_perio_in_ep = (hwcfg4 & GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK) >>
1356 GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT;
1357 hw->dma_desc_enable = !!(hwcfg4 & GHWCFG4_DESC_DMA);
1358 hw->power_optimized = !!(hwcfg4 & GHWCFG4_POWER_OPTIMIZ);
1359 hw->utmi_phy_data_width = (hwcfg4 & GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK) >>
1360 GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT;
1361
1362 /* fifo sizes */
1363 hw->rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >>
1364 GRXFSIZ_DEPTH_SHIFT;
1365
1366 dev_dbg(hsotg->dev, "Detected values from hardware:\n");
1367 dev_dbg(hsotg->dev, " op_mode=%d\n",
1368 hw->op_mode);
1369 dev_dbg(hsotg->dev, " arch=%d\n",
1370 hw->arch);
1371 dev_dbg(hsotg->dev, " dma_desc_enable=%d\n",
1372 hw->dma_desc_enable);
1373 dev_dbg(hsotg->dev, " power_optimized=%d\n",
1374 hw->power_optimized);
1375 dev_dbg(hsotg->dev, " i2c_enable=%d\n",
1376 hw->i2c_enable);
1377 dev_dbg(hsotg->dev, " hs_phy_type=%d\n",
1378 hw->hs_phy_type);
1379 dev_dbg(hsotg->dev, " fs_phy_type=%d\n",
1380 hw->fs_phy_type);
1381 dev_dbg(hsotg->dev, " utmi_phy_data_width=%d\n",
1382 hw->utmi_phy_data_width);
1383 dev_dbg(hsotg->dev, " num_dev_ep=%d\n",
1384 hw->num_dev_ep);
1385 dev_dbg(hsotg->dev, " num_dev_perio_in_ep=%d\n",
1386 hw->num_dev_perio_in_ep);
1387 dev_dbg(hsotg->dev, " host_channels=%d\n",
1388 hw->host_channels);
1389 dev_dbg(hsotg->dev, " max_transfer_size=%d\n",
1390 hw->max_transfer_size);
1391 dev_dbg(hsotg->dev, " max_packet_count=%d\n",
1392 hw->max_packet_count);
1393 dev_dbg(hsotg->dev, " nperio_tx_q_depth=0x%0x\n",
1394 hw->nperio_tx_q_depth);
1395 dev_dbg(hsotg->dev, " host_perio_tx_q_depth=0x%0x\n",
1396 hw->host_perio_tx_q_depth);
1397 dev_dbg(hsotg->dev, " dev_token_q_depth=0x%0x\n",
1398 hw->dev_token_q_depth);
1399 dev_dbg(hsotg->dev, " enable_dynamic_fifo=%d\n",
1400 hw->enable_dynamic_fifo);
1401 dev_dbg(hsotg->dev, " en_multiple_tx_fifo=%d\n",
1402 hw->en_multiple_tx_fifo);
1403 dev_dbg(hsotg->dev, " total_fifo_size=%d\n",
1404 hw->total_fifo_size);
1405 dev_dbg(hsotg->dev, " rx_fifo_size=%d\n",
1406 hw->rx_fifo_size);
1407 dev_dbg(hsotg->dev, " host_nperio_tx_fifo_size=%d\n",
1408 hw->host_nperio_tx_fifo_size);
1409 dev_dbg(hsotg->dev, " host_perio_tx_fifo_size=%d\n",
1410 hw->host_perio_tx_fifo_size);
1411 dev_dbg(hsotg->dev, "\n");
1412
1413 return 0;
1414}
1415
1416int dwc2_init_params(struct dwc2_hsotg *hsotg)
1417{
1418 const struct of_device_id *match;
1419 struct dwc2_core_params params;
1420
1421 match = of_match_device(dwc2_of_match_table, hsotg->dev);
1422 if (match && match->data)
1423 params = *((struct dwc2_core_params *)match->data);
1424 else
1425 params = params_default;
1426
1427 if (dwc2_is_fs_iot(hsotg)) {
1428 params.speed = DWC2_SPEED_PARAM_FULL;
1429 params.phy_type = DWC2_PHY_TYPE_PARAM_FS;
1430 }
1431
1432 dwc2_set_parameters(hsotg, &params);
1433
1434 return 0;
1435}
diff --git a/drivers/usb/dwc2/pci.c b/drivers/usb/dwc2/pci.c
index ae419615a176..a23329e3d7cd 100644
--- a/drivers/usb/dwc2/pci.c
+++ b/drivers/usb/dwc2/pci.c
@@ -62,6 +62,20 @@ struct dwc2_pci_glue {
62 struct platform_device *phy; 62 struct platform_device *phy;
63}; 63};
64 64
65static int dwc2_pci_quirks(struct pci_dev *pdev, struct platform_device *dwc2)
66{
67 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
68 pdev->device == PCI_PRODUCT_ID_HAPS_HSOTG) {
69 struct property_entry properties[] = {
70 { },
71 };
72
73 return platform_device_add_properties(dwc2, properties);
74 }
75
76 return 0;
77}
78
65static void dwc2_pci_remove(struct pci_dev *pci) 79static void dwc2_pci_remove(struct pci_dev *pci)
66{ 80{
67 struct dwc2_pci_glue *glue = pci_get_drvdata(pci); 81 struct dwc2_pci_glue *glue = pci_get_drvdata(pci);
@@ -122,6 +136,10 @@ static int dwc2_pci_probe(struct pci_dev *pci,
122 return PTR_ERR(phy); 136 return PTR_ERR(phy);
123 } 137 }
124 138
139 ret = dwc2_pci_quirks(pci, dwc2);
140 if (ret)
141 goto err;
142
125 ret = platform_device_add(dwc2); 143 ret = platform_device_add(dwc2);
126 if (ret) { 144 if (ret) {
127 dev_err(dev, "failed to register dwc2 device\n"); 145 dev_err(dev, "failed to register dwc2 device\n");
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 8e1728b39a49..4fc8c603afb8 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -55,165 +55,6 @@
55 55
56static const char dwc2_driver_name[] = "dwc2"; 56static const char dwc2_driver_name[] = "dwc2";
57 57
58static const struct dwc2_core_params params_hi6220 = {
59 .otg_cap = 2, /* No HNP/SRP capable */
60 .otg_ver = 0, /* 1.3 */
61 .dma_enable = 1,
62 .dma_desc_enable = 0,
63 .dma_desc_fs_enable = 0,
64 .speed = 0, /* High Speed */
65 .enable_dynamic_fifo = 1,
66 .en_multiple_tx_fifo = 1,
67 .host_rx_fifo_size = 512,
68 .host_nperio_tx_fifo_size = 512,
69 .host_perio_tx_fifo_size = 512,
70 .max_transfer_size = 65535,
71 .max_packet_count = 511,
72 .host_channels = 16,
73 .phy_type = 1, /* UTMI */
74 .phy_utmi_width = 8,
75 .phy_ulpi_ddr = 0, /* Single */
76 .phy_ulpi_ext_vbus = 0,
77 .i2c_enable = 0,
78 .ulpi_fs_ls = 0,
79 .host_support_fs_ls_low_power = 0,
80 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
81 .ts_dline = 0,
82 .reload_ctl = 0,
83 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
84 GAHBCFG_HBSTLEN_SHIFT,
85 .uframe_sched = 0,
86 .external_id_pin_ctl = -1,
87 .hibernation = -1,
88};
89
90static const struct dwc2_core_params params_bcm2835 = {
91 .otg_cap = 0, /* HNP/SRP capable */
92 .otg_ver = 0, /* 1.3 */
93 .dma_enable = 1,
94 .dma_desc_enable = 0,
95 .dma_desc_fs_enable = 0,
96 .speed = 0, /* High Speed */
97 .enable_dynamic_fifo = 1,
98 .en_multiple_tx_fifo = 1,
99 .host_rx_fifo_size = 774, /* 774 DWORDs */
100 .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
101 .host_perio_tx_fifo_size = 512, /* 512 DWORDs */
102 .max_transfer_size = 65535,
103 .max_packet_count = 511,
104 .host_channels = 8,
105 .phy_type = 1, /* UTMI */
106 .phy_utmi_width = 8, /* 8 bits */
107 .phy_ulpi_ddr = 0, /* Single */
108 .phy_ulpi_ext_vbus = 0,
109 .i2c_enable = 0,
110 .ulpi_fs_ls = 0,
111 .host_support_fs_ls_low_power = 0,
112 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
113 .ts_dline = 0,
114 .reload_ctl = 0,
115 .ahbcfg = 0x10,
116 .uframe_sched = 0,
117 .external_id_pin_ctl = -1,
118 .hibernation = -1,
119};
120
121static const struct dwc2_core_params params_rk3066 = {
122 .otg_cap = 2, /* non-HNP/non-SRP */
123 .otg_ver = -1,
124 .dma_enable = -1,
125 .dma_desc_enable = 0,
126 .dma_desc_fs_enable = 0,
127 .speed = -1,
128 .enable_dynamic_fifo = 1,
129 .en_multiple_tx_fifo = -1,
130 .host_rx_fifo_size = 525, /* 525 DWORDs */
131 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
132 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
133 .max_transfer_size = -1,
134 .max_packet_count = -1,
135 .host_channels = -1,
136 .phy_type = -1,
137 .phy_utmi_width = -1,
138 .phy_ulpi_ddr = -1,
139 .phy_ulpi_ext_vbus = -1,
140 .i2c_enable = -1,
141 .ulpi_fs_ls = -1,
142 .host_support_fs_ls_low_power = -1,
143 .host_ls_low_power_phy_clk = -1,
144 .ts_dline = -1,
145 .reload_ctl = -1,
146 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
147 GAHBCFG_HBSTLEN_SHIFT,
148 .uframe_sched = -1,
149 .external_id_pin_ctl = -1,
150 .hibernation = -1,
151};
152
153static const struct dwc2_core_params params_ltq = {
154 .otg_cap = 2, /* non-HNP/non-SRP */
155 .otg_ver = -1,
156 .dma_enable = -1,
157 .dma_desc_enable = -1,
158 .dma_desc_fs_enable = -1,
159 .speed = -1,
160 .enable_dynamic_fifo = -1,
161 .en_multiple_tx_fifo = -1,
162 .host_rx_fifo_size = 288, /* 288 DWORDs */
163 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
164 .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
165 .max_transfer_size = 65535,
166 .max_packet_count = 511,
167 .host_channels = -1,
168 .phy_type = -1,
169 .phy_utmi_width = -1,
170 .phy_ulpi_ddr = -1,
171 .phy_ulpi_ext_vbus = -1,
172 .i2c_enable = -1,
173 .ulpi_fs_ls = -1,
174 .host_support_fs_ls_low_power = -1,
175 .host_ls_low_power_phy_clk = -1,
176 .ts_dline = -1,
177 .reload_ctl = -1,
178 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
179 GAHBCFG_HBSTLEN_SHIFT,
180 .uframe_sched = -1,
181 .external_id_pin_ctl = -1,
182 .hibernation = -1,
183};
184
185static const struct dwc2_core_params params_amlogic = {
186 .otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
187 .otg_ver = -1,
188 .dma_enable = 1,
189 .dma_desc_enable = 0,
190 .dma_desc_fs_enable = 0,
191 .speed = DWC2_SPEED_PARAM_HIGH,
192 .enable_dynamic_fifo = 1,
193 .en_multiple_tx_fifo = -1,
194 .host_rx_fifo_size = 512,
195 .host_nperio_tx_fifo_size = 500,
196 .host_perio_tx_fifo_size = 500,
197 .max_transfer_size = -1,
198 .max_packet_count = -1,
199 .host_channels = 16,
200 .phy_type = DWC2_PHY_TYPE_PARAM_UTMI,
201 .phy_utmi_width = -1,
202 .phy_ulpi_ddr = -1,
203 .phy_ulpi_ext_vbus = -1,
204 .i2c_enable = -1,
205 .ulpi_fs_ls = -1,
206 .host_support_fs_ls_low_power = -1,
207 .host_ls_low_power_phy_clk = -1,
208 .ts_dline = -1,
209 .reload_ctl = 1,
210 .ahbcfg = GAHBCFG_HBSTLEN_INCR8 <<
211 GAHBCFG_HBSTLEN_SHIFT,
212 .uframe_sched = 0,
213 .external_id_pin_ctl = -1,
214 .hibernation = -1,
215};
216
217/* 58/*
218 * Check the dr_mode against the module configuration and hardware 59 * Check the dr_mode against the module configuration and hardware
219 * capabilities. 60 * capabilities.
@@ -510,20 +351,6 @@ static void dwc2_driver_shutdown(struct platform_device *dev)
510 disable_irq(hsotg->irq); 351 disable_irq(hsotg->irq);
511} 352}
512 353
513static const struct of_device_id dwc2_of_match_table[] = {
514 { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
515 { .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 },
516 { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
517 { .compatible = "lantiq,arx100-usb", .data = &params_ltq },
518 { .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
519 { .compatible = "snps,dwc2", .data = NULL },
520 { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
521 { .compatible = "amlogic,meson8b-usb", .data = &params_amlogic },
522 { .compatible = "amlogic,meson-gxbb-usb", .data = &params_amlogic },
523 {},
524};
525MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
526
527/** 354/**
528 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg 355 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
529 * driver 356 * driver
@@ -538,30 +365,10 @@ MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
538 */ 365 */
539static int dwc2_driver_probe(struct platform_device *dev) 366static int dwc2_driver_probe(struct platform_device *dev)
540{ 367{
541 const struct of_device_id *match;
542 const struct dwc2_core_params *params;
543 struct dwc2_core_params defparams;
544 struct dwc2_hsotg *hsotg; 368 struct dwc2_hsotg *hsotg;
545 struct resource *res; 369 struct resource *res;
546 int retval; 370 int retval;
547 371
548 match = of_match_device(dwc2_of_match_table, &dev->dev);
549 if (match && match->data) {
550 params = match->data;
551 } else {
552 /* Default all params to autodetect */
553 dwc2_set_all_params(&defparams, -1);
554 params = &defparams;
555
556 /*
557 * Disable descriptor dma mode by default as the HW can support
558 * it, but does not support it for SPLIT transactions.
559 * Disable it for FS devices as well.
560 */
561 defparams.dma_desc_enable = 0;
562 defparams.dma_desc_fs_enable = 0;
563 }
564
565 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL); 372 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
566 if (!hsotg) 373 if (!hsotg)
567 return -ENOMEM; 374 return -ENOMEM;
@@ -591,13 +398,6 @@ static int dwc2_driver_probe(struct platform_device *dev)
591 398
592 spin_lock_init(&hsotg->lock); 399 spin_lock_init(&hsotg->lock);
593 400
594 hsotg->core_params = devm_kzalloc(&dev->dev,
595 sizeof(*hsotg->core_params), GFP_KERNEL);
596 if (!hsotg->core_params)
597 return -ENOMEM;
598
599 dwc2_set_all_params(hsotg->core_params, -1);
600
601 hsotg->irq = platform_get_irq(dev, 0); 401 hsotg->irq = platform_get_irq(dev, 0);
602 if (hsotg->irq < 0) { 402 if (hsotg->irq < 0) {
603 dev_err(&dev->dev, "missing IRQ resource\n"); 403 dev_err(&dev->dev, "missing IRQ resource\n");
@@ -631,11 +431,12 @@ static int dwc2_driver_probe(struct platform_device *dev)
631 if (retval) 431 if (retval)
632 goto error; 432 goto error;
633 433
634 /* Validate parameter values */
635 dwc2_set_parameters(hsotg, params);
636
637 dwc2_force_dr_mode(hsotg); 434 dwc2_force_dr_mode(hsotg);
638 435
436 retval = dwc2_init_params(hsotg);
437 if (retval)
438 goto error;
439
639 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 440 if (hsotg->dr_mode != USB_DR_MODE_HOST) {
640 retval = dwc2_gadget_init(hsotg, hsotg->irq); 441 retval = dwc2_gadget_init(hsotg, hsotg->irq);
641 if (retval) 442 if (retval)
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index b97cde76914d..c5aa235863e8 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -62,7 +62,7 @@ config USB_DWC3_OMAP
62 62
63config USB_DWC3_EXYNOS 63config USB_DWC3_EXYNOS
64 tristate "Samsung Exynos Platform" 64 tristate "Samsung Exynos Platform"
65 depends on ARCH_EXYNOS && OF || COMPILE_TEST 65 depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
66 default USB_DWC3 66 default USB_DWC3
67 help 67 help
68 Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside, 68 Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
@@ -70,7 +70,7 @@ config USB_DWC3_EXYNOS
70 70
71config USB_DWC3_PCI 71config USB_DWC3_PCI
72 tristate "PCIe-based Platforms" 72 tristate "PCIe-based Platforms"
73 depends on PCI 73 depends on PCI && ACPI
74 default USB_DWC3 74 default USB_DWC3
75 help 75 help
76 If you're using the DesignWare Core IP with a PCIe, please say 76 If you're using the DesignWare Core IP with a PCIe, please say
@@ -98,7 +98,7 @@ config USB_DWC3_OF_SIMPLE
98 98
99config USB_DWC3_ST 99config USB_DWC3_ST
100 tristate "STMicroelectronics Platforms" 100 tristate "STMicroelectronics Platforms"
101 depends on ARCH_STI && OF 101 depends on (ARCH_STI || COMPILE_TEST) && OF
102 default USB_DWC3 102 default USB_DWC3
103 help 103 help
104 STMicroelectronics SoCs with one DesignWare Core USB3 IP 104 STMicroelectronics SoCs with one DesignWare Core USB3 IP
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 22420e17d68b..ffca34029b21 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -3,7 +3,11 @@ CFLAGS_trace.o := -I$(src)
3 3
4obj-$(CONFIG_USB_DWC3) += dwc3.o 4obj-$(CONFIG_USB_DWC3) += dwc3.o
5 5
6dwc3-y := core.o debug.o trace.o 6dwc3-y := core.o
7
8ifneq ($(CONFIG_FTRACE),)
9 dwc3-y += trace.o
10endif
7 11
8ifneq ($(filter y,$(CONFIG_USB_DWC3_HOST) $(CONFIG_USB_DWC3_DUAL_ROLE)),) 12ifneq ($(filter y,$(CONFIG_USB_DWC3_HOST) $(CONFIG_USB_DWC3_DUAL_ROLE)),)
9 dwc3-y += host.o 13 dwc3-y += host.o
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index fea446900cad..369bab16a824 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -169,33 +169,6 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
169 return -ETIMEDOUT; 169 return -ETIMEDOUT;
170} 170}
171 171
172/**
173 * dwc3_soft_reset - Issue soft reset
174 * @dwc: Pointer to our controller context structure
175 */
176static int dwc3_soft_reset(struct dwc3 *dwc)
177{
178 unsigned long timeout;
179 u32 reg;
180
181 timeout = jiffies + msecs_to_jiffies(500);
182 dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
183 do {
184 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
185 if (!(reg & DWC3_DCTL_CSFTRST))
186 break;
187
188 if (time_after(jiffies, timeout)) {
189 dev_err(dwc->dev, "Reset Timed Out\n");
190 return -ETIMEDOUT;
191 }
192
193 cpu_relax();
194 } while (true);
195
196 return 0;
197}
198
199/* 172/*
200 * dwc3_frame_length_adjustment - Adjusts frame length if required 173 * dwc3_frame_length_adjustment - Adjusts frame length if required
201 * @dwc3: Pointer to our controller context structure 174 * @dwc3: Pointer to our controller context structure
@@ -229,7 +202,7 @@ static void dwc3_frame_length_adjustment(struct dwc3 *dwc)
229static void dwc3_free_one_event_buffer(struct dwc3 *dwc, 202static void dwc3_free_one_event_buffer(struct dwc3 *dwc,
230 struct dwc3_event_buffer *evt) 203 struct dwc3_event_buffer *evt)
231{ 204{
232 dma_free_coherent(dwc->dev, evt->length, evt->buf, evt->dma); 205 dma_free_coherent(dwc->sysdev, evt->length, evt->buf, evt->dma);
233} 206}
234 207
235/** 208/**
@@ -251,7 +224,11 @@ static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc,
251 224
252 evt->dwc = dwc; 225 evt->dwc = dwc;
253 evt->length = length; 226 evt->length = length;
254 evt->buf = dma_alloc_coherent(dwc->dev, length, 227 evt->cache = devm_kzalloc(dwc->dev, length, GFP_KERNEL);
228 if (!evt->cache)
229 return ERR_PTR(-ENOMEM);
230
231 evt->buf = dma_alloc_coherent(dwc->sysdev, length,
255 &evt->dma, GFP_KERNEL); 232 &evt->dma, GFP_KERNEL);
256 if (!evt->buf) 233 if (!evt->buf)
257 return ERR_PTR(-ENOMEM); 234 return ERR_PTR(-ENOMEM);
@@ -305,13 +282,7 @@ static int dwc3_event_buffers_setup(struct dwc3 *dwc)
305 struct dwc3_event_buffer *evt; 282 struct dwc3_event_buffer *evt;
306 283
307 evt = dwc->ev_buf; 284 evt = dwc->ev_buf;
308 dwc3_trace(trace_dwc3_core,
309 "Event buf %p dma %08llx length %d\n",
310 evt->buf, (unsigned long long) evt->dma,
311 evt->length);
312
313 evt->lpos = 0; 285 evt->lpos = 0;
314
315 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0), 286 dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0),
316 lower_32_bits(evt->dma)); 287 lower_32_bits(evt->dma));
317 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0), 288 dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(0),
@@ -370,11 +341,11 @@ static int dwc3_setup_scratch_buffers(struct dwc3 *dwc)
370 if (!WARN_ON(dwc->scratchbuf)) 341 if (!WARN_ON(dwc->scratchbuf))
371 return 0; 342 return 0;
372 343
373 scratch_addr = dma_map_single(dwc->dev, dwc->scratchbuf, 344 scratch_addr = dma_map_single(dwc->sysdev, dwc->scratchbuf,
374 dwc->nr_scratch * DWC3_SCRATCHBUF_SIZE, 345 dwc->nr_scratch * DWC3_SCRATCHBUF_SIZE,
375 DMA_BIDIRECTIONAL); 346 DMA_BIDIRECTIONAL);
376 if (dma_mapping_error(dwc->dev, scratch_addr)) { 347 if (dma_mapping_error(dwc->sysdev, scratch_addr)) {
377 dev_err(dwc->dev, "failed to map scratch buffer\n"); 348 dev_err(dwc->sysdev, "failed to map scratch buffer\n");
378 ret = -EFAULT; 349 ret = -EFAULT;
379 goto err0; 350 goto err0;
380 } 351 }
@@ -398,7 +369,7 @@ static int dwc3_setup_scratch_buffers(struct dwc3 *dwc)
398 return 0; 369 return 0;
399 370
400err1: 371err1:
401 dma_unmap_single(dwc->dev, dwc->scratch_addr, dwc->nr_scratch * 372 dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch *
402 DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 373 DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL);
403 374
404err0: 375err0:
@@ -417,7 +388,7 @@ static void dwc3_free_scratch_buffers(struct dwc3 *dwc)
417 if (!WARN_ON(dwc->scratchbuf)) 388 if (!WARN_ON(dwc->scratchbuf))
418 return; 389 return;
419 390
420 dma_unmap_single(dwc->dev, dwc->scratch_addr, dwc->nr_scratch * 391 dma_unmap_single(dwc->sysdev, dwc->scratch_addr, dwc->nr_scratch *
421 DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL); 392 DWC3_SCRATCHBUF_SIZE, DMA_BIDIRECTIONAL);
422 kfree(dwc->scratchbuf); 393 kfree(dwc->scratchbuf);
423} 394}
@@ -428,9 +399,6 @@ static void dwc3_core_num_eps(struct dwc3 *dwc)
428 399
429 dwc->num_in_eps = DWC3_NUM_IN_EPS(parms); 400 dwc->num_in_eps = DWC3_NUM_IN_EPS(parms);
430 dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps; 401 dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps;
431
432 dwc3_trace(trace_dwc3_core, "found %d IN and %d OUT endpoints",
433 dwc->num_in_eps, dwc->num_out_eps);
434} 402}
435 403
436static void dwc3_cache_hwparams(struct dwc3 *dwc) 404static void dwc3_cache_hwparams(struct dwc3 *dwc)
@@ -524,13 +492,6 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
524 } 492 }
525 /* FALLTHROUGH */ 493 /* FALLTHROUGH */
526 case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI: 494 case DWC3_GHWPARAMS3_HSPHY_IFC_ULPI:
527 /* Making sure the interface and PHY are operational */
528 ret = dwc3_soft_reset(dwc);
529 if (ret)
530 return ret;
531
532 udelay(1);
533
534 ret = dwc3_ulpi_init(dwc); 495 ret = dwc3_ulpi_init(dwc);
535 if (ret) 496 if (ret)
536 return ret; 497 return ret;
@@ -594,19 +555,12 @@ static void dwc3_core_exit(struct dwc3 *dwc)
594 phy_power_off(dwc->usb3_generic_phy); 555 phy_power_off(dwc->usb3_generic_phy);
595} 556}
596 557
597/** 558static bool dwc3_core_is_valid(struct dwc3 *dwc)
598 * dwc3_core_init - Low-level initialization of DWC3 Core
599 * @dwc: Pointer to our controller context structure
600 *
601 * Returns 0 on success otherwise negative errno.
602 */
603static int dwc3_core_init(struct dwc3 *dwc)
604{ 559{
605 u32 hwparams4 = dwc->hwparams.hwparams4; 560 u32 reg;
606 u32 reg;
607 int ret;
608 561
609 reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); 562 reg = dwc3_readl(dwc->regs, DWC3_GSNPSID);
563
610 /* This should read as U3 followed by revision number */ 564 /* This should read as U3 followed by revision number */
611 if ((reg & DWC3_GSNPSID_MASK) == 0x55330000) { 565 if ((reg & DWC3_GSNPSID_MASK) == 0x55330000) {
612 /* Detected DWC_usb3 IP */ 566 /* Detected DWC_usb3 IP */
@@ -616,36 +570,16 @@ static int dwc3_core_init(struct dwc3 *dwc)
616 dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); 570 dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER);
617 dwc->revision |= DWC3_REVISION_IS_DWC31; 571 dwc->revision |= DWC3_REVISION_IS_DWC31;
618 } else { 572 } else {
619 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); 573 return false;
620 ret = -ENODEV;
621 goto err0;
622 } 574 }
623 575
624 /* 576 return true;
625 * Write Linux Version Code to our GUID register so it's easy to figure 577}
626 * out which kernel version a bug was found.
627 */
628 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
629
630 /* Handle USB2.0-only core configuration */
631 if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
632 DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {
633 if (dwc->maximum_speed == USB_SPEED_SUPER)
634 dwc->maximum_speed = USB_SPEED_HIGH;
635 }
636
637 /* issue device SoftReset too */
638 ret = dwc3_soft_reset(dwc);
639 if (ret)
640 goto err0;
641
642 ret = dwc3_core_soft_reset(dwc);
643 if (ret)
644 goto err0;
645 578
646 ret = dwc3_phy_setup(dwc); 579static void dwc3_core_setup_global_control(struct dwc3 *dwc)
647 if (ret) 580{
648 goto err0; 581 u32 hwparams4 = dwc->hwparams.hwparams4;
582 u32 reg;
649 583
650 reg = dwc3_readl(dwc->regs, DWC3_GCTL); 584 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
651 reg &= ~DWC3_GCTL_SCALEDOWN_MASK; 585 reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
@@ -683,13 +617,13 @@ static int dwc3_core_init(struct dwc3 *dwc)
683 reg |= DWC3_GCTL_GBLHIBERNATIONEN; 617 reg |= DWC3_GCTL_GBLHIBERNATIONEN;
684 break; 618 break;
685 default: 619 default:
686 dwc3_trace(trace_dwc3_core, "No power optimization available\n"); 620 /* nothing */
621 break;
687 } 622 }
688 623
689 /* check if current dwc3 is on simulation board */ 624 /* check if current dwc3 is on simulation board */
690 if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) { 625 if (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_EN_FPGA) {
691 dwc3_trace(trace_dwc3_core, 626 dev_info(dwc->dev, "Running with FPGA optmizations\n");
692 "running on FPGA platform\n");
693 dwc->is_fpga = true; 627 dwc->is_fpga = true;
694 } 628 }
695 629
@@ -714,7 +648,47 @@ static int dwc3_core_init(struct dwc3 *dwc)
714 reg |= DWC3_GCTL_U2RSTECN; 648 reg |= DWC3_GCTL_U2RSTECN;
715 649
716 dwc3_writel(dwc->regs, DWC3_GCTL, reg); 650 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
651}
652
653/**
654 * dwc3_core_init - Low-level initialization of DWC3 Core
655 * @dwc: Pointer to our controller context structure
656 *
657 * Returns 0 on success otherwise negative errno.
658 */
659static int dwc3_core_init(struct dwc3 *dwc)
660{
661 u32 reg;
662 int ret;
663
664 if (!dwc3_core_is_valid(dwc)) {
665 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
666 ret = -ENODEV;
667 goto err0;
668 }
669
670 /*
671 * Write Linux Version Code to our GUID register so it's easy to figure
672 * out which kernel version a bug was found.
673 */
674 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
675
676 /* Handle USB2.0-only core configuration */
677 if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
678 DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {
679 if (dwc->maximum_speed == USB_SPEED_SUPER)
680 dwc->maximum_speed = USB_SPEED_HIGH;
681 }
682
683 ret = dwc3_core_soft_reset(dwc);
684 if (ret)
685 goto err0;
717 686
687 ret = dwc3_phy_setup(dwc);
688 if (ret)
689 goto err0;
690
691 dwc3_core_setup_global_control(dwc);
718 dwc3_core_num_eps(dwc); 692 dwc3_core_num_eps(dwc);
719 693
720 ret = dwc3_setup_scratch_buffers(dwc); 694 ret = dwc3_setup_scratch_buffers(dwc);
@@ -766,6 +740,16 @@ static int dwc3_core_init(struct dwc3 *dwc)
766 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 740 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg);
767 } 741 }
768 742
743 /*
744 * Enable hardware control of sending remote wakeup in HS when
745 * the device is in the L1 state.
746 */
747 if (dwc->revision >= DWC3_REVISION_290A) {
748 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
749 reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW;
750 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
751 }
752
769 return 0; 753 return 0;
770 754
771err4: 755err4:
@@ -919,57 +903,13 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
919 } 903 }
920} 904}
921 905
922#define DWC3_ALIGN_MASK (16 - 1) 906static void dwc3_get_properties(struct dwc3 *dwc)
923
924static int dwc3_probe(struct platform_device *pdev)
925{ 907{
926 struct device *dev = &pdev->dev; 908 struct device *dev = dwc->dev;
927 struct resource *res;
928 struct dwc3 *dwc;
929 u8 lpm_nyet_threshold; 909 u8 lpm_nyet_threshold;
930 u8 tx_de_emphasis; 910 u8 tx_de_emphasis;
931 u8 hird_threshold; 911 u8 hird_threshold;
932 912
933 int ret;
934
935 void __iomem *regs;
936 void *mem;
937
938 mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
939 if (!mem)
940 return -ENOMEM;
941
942 dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1);
943 dwc->mem = mem;
944 dwc->dev = dev;
945
946 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
947 if (!res) {
948 dev_err(dev, "missing memory resource\n");
949 return -ENODEV;
950 }
951
952 dwc->xhci_resources[0].start = res->start;
953 dwc->xhci_resources[0].end = dwc->xhci_resources[0].start +
954 DWC3_XHCI_REGS_END;
955 dwc->xhci_resources[0].flags = res->flags;
956 dwc->xhci_resources[0].name = res->name;
957
958 res->start += DWC3_GLOBALS_REGS_START;
959
960 /*
961 * Request memory region but exclude xHCI regs,
962 * since it will be requested by the xhci-plat driver.
963 */
964 regs = devm_ioremap_resource(dev, res);
965 if (IS_ERR(regs)) {
966 ret = PTR_ERR(regs);
967 goto err0;
968 }
969
970 dwc->regs = regs;
971 dwc->regs_size = resource_size(res);
972
973 /* default to highest possible threshold */ 913 /* default to highest possible threshold */
974 lpm_nyet_threshold = 0xff; 914 lpm_nyet_threshold = 0xff;
975 915
@@ -986,6 +926,13 @@ static int dwc3_probe(struct platform_device *pdev)
986 dwc->dr_mode = usb_get_dr_mode(dev); 926 dwc->dr_mode = usb_get_dr_mode(dev);
987 dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node); 927 dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node);
988 928
929 dwc->sysdev_is_parent = device_property_read_bool(dev,
930 "linux,sysdev_is_parent");
931 if (dwc->sysdev_is_parent)
932 dwc->sysdev = dwc->dev->parent;
933 else
934 dwc->sysdev = dwc->dev;
935
989 dwc->has_lpm_erratum = device_property_read_bool(dev, 936 dwc->has_lpm_erratum = device_property_read_bool(dev,
990 "snps,has-lpm-erratum"); 937 "snps,has-lpm-erratum");
991 device_property_read_u8(dev, "snps,lpm-nyet-threshold", 938 device_property_read_u8(dev, "snps,lpm-nyet-threshold",
@@ -1041,6 +988,112 @@ static int dwc3_probe(struct platform_device *pdev)
1041 dwc->hird_threshold = hird_threshold 988 dwc->hird_threshold = hird_threshold
1042 | (dwc->is_utmi_l1_suspend << 4); 989 | (dwc->is_utmi_l1_suspend << 4);
1043 990
991 dwc->imod_interval = 0;
992}
993
994/* check whether the core supports IMOD */
995bool dwc3_has_imod(struct dwc3 *dwc)
996{
997 return ((dwc3_is_usb3(dwc) &&
998 dwc->revision >= DWC3_REVISION_300A) ||
999 (dwc3_is_usb31(dwc) &&
1000 dwc->revision >= DWC3_USB31_REVISION_120A));
1001}
1002
1003static void dwc3_check_params(struct dwc3 *dwc)
1004{
1005 struct device *dev = dwc->dev;
1006
1007 /* Check for proper value of imod_interval */
1008 if (dwc->imod_interval && !dwc3_has_imod(dwc)) {
1009 dev_warn(dwc->dev, "Interrupt moderation not supported\n");
1010 dwc->imod_interval = 0;
1011 }
1012
1013 /*
1014 * Workaround for STAR 9000961433 which affects only version
1015 * 3.00a of the DWC_usb3 core. This prevents the controller
1016 * interrupt from being masked while handling events. IMOD
1017 * allows us to work around this issue. Enable it for the
1018 * affected version.
1019 */
1020 if (!dwc->imod_interval &&
1021 (dwc->revision == DWC3_REVISION_300A))
1022 dwc->imod_interval = 1;
1023
1024 /* Check the maximum_speed parameter */
1025 switch (dwc->maximum_speed) {
1026 case USB_SPEED_LOW:
1027 case USB_SPEED_FULL:
1028 case USB_SPEED_HIGH:
1029 case USB_SPEED_SUPER:
1030 case USB_SPEED_SUPER_PLUS:
1031 break;
1032 default:
1033 dev_err(dev, "invalid maximum_speed parameter %d\n",
1034 dwc->maximum_speed);
1035 /* fall through */
1036 case USB_SPEED_UNKNOWN:
1037 /* default to superspeed */
1038 dwc->maximum_speed = USB_SPEED_SUPER;
1039
1040 /*
1041 * default to superspeed plus if we are capable.
1042 */
1043 if (dwc3_is_usb31(dwc) &&
1044 (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
1045 DWC3_GHWPARAMS3_SSPHY_IFC_GEN2))
1046 dwc->maximum_speed = USB_SPEED_SUPER_PLUS;
1047
1048 break;
1049 }
1050}
1051
1052static int dwc3_probe(struct platform_device *pdev)
1053{
1054 struct device *dev = &pdev->dev;
1055 struct resource *res;
1056 struct dwc3 *dwc;
1057
1058 int ret;
1059
1060 void __iomem *regs;
1061
1062 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
1063 if (!dwc)
1064 return -ENOMEM;
1065
1066 dwc->dev = dev;
1067
1068 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1069 if (!res) {
1070 dev_err(dev, "missing memory resource\n");
1071 return -ENODEV;
1072 }
1073
1074 dwc->xhci_resources[0].start = res->start;
1075 dwc->xhci_resources[0].end = dwc->xhci_resources[0].start +
1076 DWC3_XHCI_REGS_END;
1077 dwc->xhci_resources[0].flags = res->flags;
1078 dwc->xhci_resources[0].name = res->name;
1079
1080 res->start += DWC3_GLOBALS_REGS_START;
1081
1082 /*
1083 * Request memory region but exclude xHCI regs,
1084 * since it will be requested by the xhci-plat driver.
1085 */
1086 regs = devm_ioremap_resource(dev, res);
1087 if (IS_ERR(regs)) {
1088 ret = PTR_ERR(regs);
1089 goto err0;
1090 }
1091
1092 dwc->regs = regs;
1093 dwc->regs_size = resource_size(res);
1094
1095 dwc3_get_properties(dwc);
1096
1044 platform_set_drvdata(pdev, dwc); 1097 platform_set_drvdata(pdev, dwc);
1045 dwc3_cache_hwparams(dwc); 1098 dwc3_cache_hwparams(dwc);
1046 1099
@@ -1050,12 +1103,6 @@ static int dwc3_probe(struct platform_device *pdev)
1050 1103
1051 spin_lock_init(&dwc->lock); 1104 spin_lock_init(&dwc->lock);
1052 1105
1053 if (!dev->dma_mask) {
1054 dev->dma_mask = dev->parent->dma_mask;
1055 dev->dma_parms = dev->parent->dma_parms;
1056 dma_set_coherent_mask(dev, dev->parent->coherent_dma_mask);
1057 }
1058
1059 pm_runtime_set_active(dev); 1106 pm_runtime_set_active(dev);
1060 pm_runtime_use_autosuspend(dev); 1107 pm_runtime_use_autosuspend(dev);
1061 pm_runtime_set_autosuspend_delay(dev, DWC3_DEFAULT_AUTOSUSPEND_DELAY); 1108 pm_runtime_set_autosuspend_delay(dev, DWC3_DEFAULT_AUTOSUSPEND_DELAY);
@@ -1087,32 +1134,7 @@ static int dwc3_probe(struct platform_device *pdev)
1087 goto err4; 1134 goto err4;
1088 } 1135 }
1089 1136
1090 /* Check the maximum_speed parameter */ 1137 dwc3_check_params(dwc);
1091 switch (dwc->maximum_speed) {
1092 case USB_SPEED_LOW:
1093 case USB_SPEED_FULL:
1094 case USB_SPEED_HIGH:
1095 case USB_SPEED_SUPER:
1096 case USB_SPEED_SUPER_PLUS:
1097 break;
1098 default:
1099 dev_err(dev, "invalid maximum_speed parameter %d\n",
1100 dwc->maximum_speed);
1101 /* fall through */
1102 case USB_SPEED_UNKNOWN:
1103 /* default to superspeed */
1104 dwc->maximum_speed = USB_SPEED_SUPER;
1105
1106 /*
1107 * default to superspeed plus if we are capable.
1108 */
1109 if (dwc3_is_usb31(dwc) &&
1110 (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
1111 DWC3_GHWPARAMS3_SSPHY_IFC_GEN2))
1112 dwc->maximum_speed = USB_SPEED_SUPER_PLUS;
1113
1114 break;
1115 }
1116 1138
1117 ret = dwc3_core_init_mode(dwc); 1139 ret = dwc3_core_init_mode(dwc);
1118 if (ret) 1140 if (ret)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 6b60e42626a2..de5a8570be04 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -26,6 +26,7 @@
26#include <linux/dma-mapping.h> 26#include <linux/dma-mapping.h>
27#include <linux/mm.h> 27#include <linux/mm.h>
28#include <linux/debugfs.h> 28#include <linux/debugfs.h>
29#include <linux/wait.h>
29 30
30#include <linux/usb/ch9.h> 31#include <linux/usb/ch9.h>
31#include <linux/usb/gadget.h> 32#include <linux/usb/gadget.h>
@@ -37,6 +38,7 @@
37#define DWC3_MSG_MAX 500 38#define DWC3_MSG_MAX 500
38 39
39/* Global constants */ 40/* Global constants */
41#define DWC3_PULL_UP_TIMEOUT 500 /* ms */
40#define DWC3_ZLP_BUF_SIZE 1024 /* size of a superspeed bulk */ 42#define DWC3_ZLP_BUF_SIZE 1024 /* size of a superspeed bulk */
41#define DWC3_EP0_BOUNCE_SIZE 512 43#define DWC3_EP0_BOUNCE_SIZE 512
42#define DWC3_ENDPOINTS_NUM 32 44#define DWC3_ENDPOINTS_NUM 32
@@ -65,6 +67,7 @@
65#define DWC3_DEVICE_EVENT_OVERFLOW 11 67#define DWC3_DEVICE_EVENT_OVERFLOW 11
66 68
67#define DWC3_GEVNTCOUNT_MASK 0xfffc 69#define DWC3_GEVNTCOUNT_MASK 0xfffc
70#define DWC3_GEVNTCOUNT_EHB (1 << 31)
68#define DWC3_GSNPSID_MASK 0xffff0000 71#define DWC3_GSNPSID_MASK 0xffff0000
69#define DWC3_GSNPSREV_MASK 0xffff 72#define DWC3_GSNPSREV_MASK 0xffff
70 73
@@ -147,6 +150,8 @@
147#define DWC3_DEPCMDPAR0 0x08 150#define DWC3_DEPCMDPAR0 0x08
148#define DWC3_DEPCMD 0x0c 151#define DWC3_DEPCMD 0x0c
149 152
153#define DWC3_DEV_IMOD(n) (0xca00 + (n * 0x4))
154
150/* OTG Registers */ 155/* OTG Registers */
151#define DWC3_OCFG 0xcc00 156#define DWC3_OCFG 0xcc00
152#define DWC3_OCTL 0xcc04 157#define DWC3_OCTL 0xcc04
@@ -198,6 +203,9 @@
198#define DWC3_GCTL_GBLHIBERNATIONEN (1 << 1) 203#define DWC3_GCTL_GBLHIBERNATIONEN (1 << 1)
199#define DWC3_GCTL_DSBLCLKGTNG (1 << 0) 204#define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
200 205
206/* Global User Control 1 Register */
207#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW (1 << 24)
208
201/* Global USB2 PHY Configuration Register */ 209/* Global USB2 PHY Configuration Register */
202#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) 210#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
203#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30) 211#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30)
@@ -450,6 +458,8 @@
450#define DWC3_DEPCMD_SETTRANSFRESOURCE (0x02 << 0) 458#define DWC3_DEPCMD_SETTRANSFRESOURCE (0x02 << 0)
451#define DWC3_DEPCMD_SETEPCONFIG (0x01 << 0) 459#define DWC3_DEPCMD_SETEPCONFIG (0x01 << 0)
452 460
461#define DWC3_DEPCMD_CMD(x) ((x) & 0xf)
462
453/* The EP number goes 0..31 so ep0 is always out and ep1 is always in */ 463/* The EP number goes 0..31 so ep0 is always out and ep1 is always in */
454#define DWC3_DALEPENA_EP(n) (1 << n) 464#define DWC3_DALEPENA_EP(n) (1 << n)
455 465
@@ -458,6 +468,11 @@
458#define DWC3_DEPCMD_TYPE_BULK 2 468#define DWC3_DEPCMD_TYPE_BULK 2
459#define DWC3_DEPCMD_TYPE_INTR 3 469#define DWC3_DEPCMD_TYPE_INTR 3
460 470
471#define DWC3_DEV_IMOD_COUNT_SHIFT 16
472#define DWC3_DEV_IMOD_COUNT_MASK (0xffff << 16)
473#define DWC3_DEV_IMOD_INTERVAL_SHIFT 0
474#define DWC3_DEV_IMOD_INTERVAL_MASK (0xffff << 0)
475
461/* Structures */ 476/* Structures */
462 477
463struct dwc3_trb; 478struct dwc3_trb;
@@ -465,6 +480,7 @@ struct dwc3_trb;
465/** 480/**
466 * struct dwc3_event_buffer - Software event buffer representation 481 * struct dwc3_event_buffer - Software event buffer representation
467 * @buf: _THE_ buffer 482 * @buf: _THE_ buffer
483 * @cache: The buffer cache used in the threaded interrupt
468 * @length: size of this buffer 484 * @length: size of this buffer
469 * @lpos: event offset 485 * @lpos: event offset
470 * @count: cache of last read event count register 486 * @count: cache of last read event count register
@@ -474,6 +490,7 @@ struct dwc3_trb;
474 */ 490 */
475struct dwc3_event_buffer { 491struct dwc3_event_buffer {
476 void *buf; 492 void *buf;
493 void *cache;
477 unsigned length; 494 unsigned length;
478 unsigned int lpos; 495 unsigned int lpos;
479 unsigned int count; 496 unsigned int count;
@@ -499,6 +516,7 @@ struct dwc3_event_buffer {
499 * @endpoint: usb endpoint 516 * @endpoint: usb endpoint
500 * @pending_list: list of pending requests for this endpoint 517 * @pending_list: list of pending requests for this endpoint
501 * @started_list: list of started requests on this endpoint 518 * @started_list: list of started requests on this endpoint
519 * @wait_end_transfer: wait_queue_head_t for waiting on End Transfer complete
502 * @lock: spinlock for endpoint request queue traversal 520 * @lock: spinlock for endpoint request queue traversal
503 * @regs: pointer to first endpoint register 521 * @regs: pointer to first endpoint register
504 * @trb_pool: array of transaction buffers 522 * @trb_pool: array of transaction buffers
@@ -524,12 +542,13 @@ struct dwc3_ep {
524 struct list_head pending_list; 542 struct list_head pending_list;
525 struct list_head started_list; 543 struct list_head started_list;
526 544
545 wait_queue_head_t wait_end_transfer;
546
527 spinlock_t lock; 547 spinlock_t lock;
528 void __iomem *regs; 548 void __iomem *regs;
529 549
530 struct dwc3_trb *trb_pool; 550 struct dwc3_trb *trb_pool;
531 dma_addr_t trb_pool_dma; 551 dma_addr_t trb_pool_dma;
532 const struct usb_ss_ep_comp_descriptor *comp_desc;
533 struct dwc3 *dwc; 552 struct dwc3 *dwc;
534 553
535 u32 saved_state; 554 u32 saved_state;
@@ -540,6 +559,8 @@ struct dwc3_ep {
540#define DWC3_EP_BUSY (1 << 4) 559#define DWC3_EP_BUSY (1 << 4)
541#define DWC3_EP_PENDING_REQUEST (1 << 5) 560#define DWC3_EP_PENDING_REQUEST (1 << 5)
542#define DWC3_EP_MISSED_ISOC (1 << 6) 561#define DWC3_EP_MISSED_ISOC (1 << 6)
562#define DWC3_EP_END_TRANSFER_PENDING (1 << 7)
563#define DWC3_EP_TRANSFER_STARTED (1 << 8)
543 564
544 /* This last one is specific to EP0 */ 565 /* This last one is specific to EP0 */
545#define DWC3_EP0_DIR_IN (1 << 31) 566#define DWC3_EP0_DIR_IN (1 << 31)
@@ -703,7 +724,7 @@ struct dwc3_hwparams {
703 * @dep: struct dwc3_ep owning this request 724 * @dep: struct dwc3_ep owning this request
704 * @sg: pointer to first incomplete sg 725 * @sg: pointer to first incomplete sg
705 * @num_pending_sgs: counter to pending sgs 726 * @num_pending_sgs: counter to pending sgs
706 * @first_trb_index: index to first trb used by this request 727 * @remaining: amount of data remaining
707 * @epnum: endpoint number to which this request refers 728 * @epnum: endpoint number to which this request refers
708 * @trb: pointer to struct dwc3_trb 729 * @trb: pointer to struct dwc3_trb
709 * @trb_dma: DMA address of @trb 730 * @trb_dma: DMA address of @trb
@@ -718,7 +739,7 @@ struct dwc3_request {
718 struct scatterlist *sg; 739 struct scatterlist *sg;
719 740
720 unsigned num_pending_sgs; 741 unsigned num_pending_sgs;
721 u8 first_trb_index; 742 unsigned remaining;
722 u8 epnum; 743 u8 epnum;
723 struct dwc3_trb *trb; 744 struct dwc3_trb *trb;
724 dma_addr_t trb_dma; 745 dma_addr_t trb_dma;
@@ -748,6 +769,7 @@ struct dwc3_scratchpad_array {
748 * @ep0_usb_req: dummy req used while handling STD USB requests 769 * @ep0_usb_req: dummy req used while handling STD USB requests
749 * @ep0_bounce_addr: dma address of ep0_bounce 770 * @ep0_bounce_addr: dma address of ep0_bounce
750 * @scratch_addr: dma address of scratchbuf 771 * @scratch_addr: dma address of scratchbuf
772 * @ep0_in_setup: one control transfer is completed and enter setup phase
751 * @lock: for synchronizing 773 * @lock: for synchronizing
752 * @dev: pointer to our struct device 774 * @dev: pointer to our struct device
753 * @xhci: pointer to our xHCI child 775 * @xhci: pointer to our xHCI child
@@ -784,7 +806,6 @@ struct dwc3_scratchpad_array {
784 * @ep0state: state of endpoint zero 806 * @ep0state: state of endpoint zero
785 * @link_state: link state 807 * @link_state: link state
786 * @speed: device speed (super, high, full, low) 808 * @speed: device speed (super, high, full, low)
787 * @mem: points to start of memory which is used for this struct.
788 * @hwparams: copy of hwparams registers 809 * @hwparams: copy of hwparams registers
789 * @root: debugfs root folder pointer 810 * @root: debugfs root folder pointer
790 * @regset: debugfs pointer to regdump file 811 * @regset: debugfs pointer to regdump file
@@ -798,6 +819,7 @@ struct dwc3_scratchpad_array {
798 * @ep0_bounced: true when we used bounce buffer 819 * @ep0_bounced: true when we used bounce buffer
799 * @ep0_expect_in: true when we expect a DATA IN transfer 820 * @ep0_expect_in: true when we expect a DATA IN transfer
800 * @has_hibernation: true when dwc3 was configured with Hibernation 821 * @has_hibernation: true when dwc3 was configured with Hibernation
822 * @sysdev_is_parent: true when dwc3 device has a parent driver
801 * @has_lpm_erratum: true when core was configured with LPM Erratum. Note that 823 * @has_lpm_erratum: true when core was configured with LPM Erratum. Note that
802 * there's now way for software to detect this in runtime. 824 * there's now way for software to detect this in runtime.
803 * @is_utmi_l1_suspend: the core asserts output signal 825 * @is_utmi_l1_suspend: the core asserts output signal
@@ -833,6 +855,8 @@ struct dwc3_scratchpad_array {
833 * 1 - -3.5dB de-emphasis 855 * 1 - -3.5dB de-emphasis
834 * 2 - No de-emphasis 856 * 2 - No de-emphasis
835 * 3 - Reserved 857 * 3 - Reserved
858 * @imod_interval: set the interrupt moderation interval in 250ns
859 * increments or 0 to disable.
836 */ 860 */
837struct dwc3 { 861struct dwc3 {
838 struct usb_ctrlrequest *ctrl_req; 862 struct usb_ctrlrequest *ctrl_req;
@@ -846,11 +870,13 @@ struct dwc3 {
846 dma_addr_t ep0_bounce_addr; 870 dma_addr_t ep0_bounce_addr;
847 dma_addr_t scratch_addr; 871 dma_addr_t scratch_addr;
848 struct dwc3_request ep0_usb_req; 872 struct dwc3_request ep0_usb_req;
873 struct completion ep0_in_setup;
849 874
850 /* device lock */ 875 /* device lock */
851 spinlock_t lock; 876 spinlock_t lock;
852 877
853 struct device *dev; 878 struct device *dev;
879 struct device *sysdev;
854 880
855 struct platform_device *xhci; 881 struct platform_device *xhci;
856 struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM]; 882 struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM];
@@ -909,6 +935,7 @@ struct dwc3 {
909#define DWC3_REVISION_260A 0x5533260a 935#define DWC3_REVISION_260A 0x5533260a
910#define DWC3_REVISION_270A 0x5533270a 936#define DWC3_REVISION_270A 0x5533270a
911#define DWC3_REVISION_280A 0x5533280a 937#define DWC3_REVISION_280A 0x5533280a
938#define DWC3_REVISION_290A 0x5533290a
912#define DWC3_REVISION_300A 0x5533300a 939#define DWC3_REVISION_300A 0x5533300a
913#define DWC3_REVISION_310A 0x5533310a 940#define DWC3_REVISION_310A 0x5533310a
914 941
@@ -918,6 +945,7 @@ struct dwc3 {
918 */ 945 */
919#define DWC3_REVISION_IS_DWC31 0x80000000 946#define DWC3_REVISION_IS_DWC31 0x80000000
920#define DWC3_USB31_REVISION_110A (0x3131302a | DWC3_REVISION_IS_DWC31) 947#define DWC3_USB31_REVISION_110A (0x3131302a | DWC3_REVISION_IS_DWC31)
948#define DWC3_USB31_REVISION_120A (0x3132302a | DWC3_REVISION_IS_DWC31)
921 949
922 enum dwc3_ep0_next ep0_next_event; 950 enum dwc3_ep0_next ep0_next_event;
923 enum dwc3_ep0_state ep0state; 951 enum dwc3_ep0_state ep0state;
@@ -934,8 +962,6 @@ struct dwc3 {
934 u8 num_out_eps; 962 u8 num_out_eps;
935 u8 num_in_eps; 963 u8 num_in_eps;
936 964
937 void *mem;
938
939 struct dwc3_hwparams hwparams; 965 struct dwc3_hwparams hwparams;
940 struct dentry *root; 966 struct dentry *root;
941 struct debugfs_regset32 *regset; 967 struct debugfs_regset32 *regset;
@@ -952,6 +978,7 @@ struct dwc3 {
952 unsigned ep0_bounced:1; 978 unsigned ep0_bounced:1;
953 unsigned ep0_expect_in:1; 979 unsigned ep0_expect_in:1;
954 unsigned has_hibernation:1; 980 unsigned has_hibernation:1;
981 unsigned sysdev_is_parent:1;
955 unsigned has_lpm_erratum:1; 982 unsigned has_lpm_erratum:1;
956 unsigned is_utmi_l1_suspend:1; 983 unsigned is_utmi_l1_suspend:1;
957 unsigned is_fpga:1; 984 unsigned is_fpga:1;
@@ -978,6 +1005,8 @@ struct dwc3 {
978 1005
979 unsigned tx_de_emphasis_quirk:1; 1006 unsigned tx_de_emphasis_quirk:1;
980 unsigned tx_de_emphasis:2; 1007 unsigned tx_de_emphasis:2;
1008
1009 u16 imod_interval;
981}; 1010};
982 1011
983/* -------------------------------------------------------------------------- */ 1012/* -------------------------------------------------------------------------- */
@@ -1039,12 +1068,16 @@ struct dwc3_event_depevt {
1039/* Control-only Status */ 1068/* Control-only Status */
1040#define DEPEVT_STATUS_CONTROL_DATA 1 1069#define DEPEVT_STATUS_CONTROL_DATA 1
1041#define DEPEVT_STATUS_CONTROL_STATUS 2 1070#define DEPEVT_STATUS_CONTROL_STATUS 2
1071#define DEPEVT_STATUS_CONTROL_PHASE(n) ((n) & 3)
1042 1072
1043/* In response to Start Transfer */ 1073/* In response to Start Transfer */
1044#define DEPEVT_TRANSFER_NO_RESOURCE 1 1074#define DEPEVT_TRANSFER_NO_RESOURCE 1
1045#define DEPEVT_TRANSFER_BUS_EXPIRY 2 1075#define DEPEVT_TRANSFER_BUS_EXPIRY 2
1046 1076
1047 u32 parameters:16; 1077 u32 parameters:16;
1078
1079/* For Command Complete Events */
1080#define DEPEVT_PARAMETER_CMD(n) (((n) & (0xf << 8)) >> 8)
1048} __packed; 1081} __packed;
1049 1082
1050/** 1083/**
@@ -1133,12 +1166,20 @@ struct dwc3_gadget_ep_cmd_params {
1133void dwc3_set_mode(struct dwc3 *dwc, u32 mode); 1166void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
1134u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type); 1167u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type);
1135 1168
1169/* check whether we are on the DWC_usb3 core */
1170static inline bool dwc3_is_usb3(struct dwc3 *dwc)
1171{
1172 return !(dwc->revision & DWC3_REVISION_IS_DWC31);
1173}
1174
1136/* check whether we are on the DWC_usb31 core */ 1175/* check whether we are on the DWC_usb31 core */
1137static inline bool dwc3_is_usb31(struct dwc3 *dwc) 1176static inline bool dwc3_is_usb31(struct dwc3 *dwc)
1138{ 1177{
1139 return !!(dwc->revision & DWC3_REVISION_IS_DWC31); 1178 return !!(dwc->revision & DWC3_REVISION_IS_DWC31);
1140} 1179}
1141 1180
1181bool dwc3_has_imod(struct dwc3 *dwc);
1182
1142#if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) 1183#if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)
1143int dwc3_host_init(struct dwc3 *dwc); 1184int dwc3_host_init(struct dwc3 *dwc);
1144void dwc3_host_exit(struct dwc3 *dwc); 1185void dwc3_host_exit(struct dwc3 *dwc);
diff --git a/drivers/usb/dwc3/debug.c b/drivers/usb/dwc3/debug.c
deleted file mode 100644
index 0be6885bc370..000000000000
--- a/drivers/usb/dwc3/debug.c
+++ /dev/null
@@ -1,32 +0,0 @@
1/**
2 * debug.c - DesignWare USB3 DRD Controller Debug/Trace Support
3 *
4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Author: Felipe Balbi <balbi@ti.com>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 of
10 * the License as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include "debug.h"
19
20void dwc3_trace(void (*trace)(struct va_format *), const char *fmt, ...)
21{
22 struct va_format vaf;
23 va_list args;
24
25 va_start(args, fmt);
26 vaf.fmt = fmt;
27 vaf.va = &args;
28
29 trace(&vaf);
30
31 va_end(args);
32}
diff --git a/drivers/usb/dwc3/debug.h b/drivers/usb/dwc3/debug.h
index 33ab2a203c1b..eeed4ffd8131 100644
--- a/drivers/usb/dwc3/debug.h
+++ b/drivers/usb/dwc3/debug.h
@@ -124,6 +124,22 @@ dwc3_gadget_link_string(enum dwc3_link_state link_state)
124 } 124 }
125} 125}
126 126
127static inline const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)
128{
129 switch (state) {
130 case EP0_UNCONNECTED:
131 return "Unconnected";
132 case EP0_SETUP_PHASE:
133 return "Setup Phase";
134 case EP0_DATA_PHASE:
135 return "Data Phase";
136 case EP0_STATUS_PHASE:
137 return "Status Phase";
138 default:
139 return "UNKNOWN";
140 }
141}
142
127/** 143/**
128 * dwc3_gadget_event_string - returns event name 144 * dwc3_gadget_event_string - returns event name
129 * @event: the event code 145 * @event: the event code
@@ -184,10 +200,11 @@ dwc3_gadget_event_string(const struct dwc3_event_devt *event)
184 * @event: then event code 200 * @event: then event code
185 */ 201 */
186static inline const char * 202static inline const char *
187dwc3_ep_event_string(const struct dwc3_event_depevt *event) 203dwc3_ep_event_string(const struct dwc3_event_depevt *event, u32 ep0state)
188{ 204{
189 u8 epnum = event->endpoint_number; 205 u8 epnum = event->endpoint_number;
190 static char str[256]; 206 static char str[256];
207 size_t len;
191 int status; 208 int status;
192 int ret; 209 int ret;
193 210
@@ -199,6 +216,10 @@ dwc3_ep_event_string(const struct dwc3_event_depevt *event)
199 switch (event->endpoint_event) { 216 switch (event->endpoint_event) {
200 case DWC3_DEPEVT_XFERCOMPLETE: 217 case DWC3_DEPEVT_XFERCOMPLETE:
201 strcat(str, "Transfer Complete"); 218 strcat(str, "Transfer Complete");
219 len = strlen(str);
220
221 if (epnum <= 1)
222 sprintf(str + len, " [%s]", dwc3_ep0_state_string(ep0state));
202 break; 223 break;
203 case DWC3_DEPEVT_XFERINPROGRESS: 224 case DWC3_DEPEVT_XFERINPROGRESS:
204 strcat(str, "Transfer In-Progress"); 225 strcat(str, "Transfer In-Progress");
@@ -207,6 +228,19 @@ dwc3_ep_event_string(const struct dwc3_event_depevt *event)
207 strcat(str, "Transfer Not Ready"); 228 strcat(str, "Transfer Not Ready");
208 status = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE; 229 status = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE;
209 strcat(str, status ? " (Active)" : " (Not Active)"); 230 strcat(str, status ? " (Active)" : " (Not Active)");
231
232 /* Control Endpoints */
233 if (epnum <= 1) {
234 int phase = DEPEVT_STATUS_CONTROL_PHASE(event->status);
235
236 switch (phase) {
237 case DEPEVT_STATUS_CONTROL_DATA:
238 strcat(str, " [Data Phase]");
239 break;
240 case DEPEVT_STATUS_CONTROL_STATUS:
241 strcat(str, " [Status Phase]");
242 }
243 }
210 break; 244 break;
211 case DWC3_DEPEVT_RXTXFIFOEVT: 245 case DWC3_DEPEVT_RXTXFIFOEVT:
212 strcat(str, "FIFO"); 246 strcat(str, "FIFO");
@@ -270,14 +304,14 @@ static inline const char *dwc3_gadget_event_type_string(u8 event)
270 } 304 }
271} 305}
272 306
273static inline const char *dwc3_decode_event(u32 event) 307static inline const char *dwc3_decode_event(u32 event, u32 ep0state)
274{ 308{
275 const union dwc3_event evt = (union dwc3_event) event; 309 const union dwc3_event evt = (union dwc3_event) event;
276 310
277 if (evt.type.is_devspec) 311 if (evt.type.is_devspec)
278 return dwc3_gadget_event_string(&evt.devt); 312 return dwc3_gadget_event_string(&evt.devt);
279 else 313 else
280 return dwc3_ep_event_string(&evt.depevt); 314 return dwc3_ep_event_string(&evt.depevt, ep0state);
281} 315}
282 316
283static inline const char *dwc3_ep_cmd_status_string(int status) 317static inline const char *dwc3_ep_cmd_status_string(int status)
@@ -310,7 +344,6 @@ static inline const char *dwc3_gadget_generic_cmd_status_string(int status)
310 } 344 }
311} 345}
312 346
313void dwc3_trace(void (*trace)(struct va_format *), const char *fmt, ...);
314 347
315#ifdef CONFIG_DEBUG_FS 348#ifdef CONFIG_DEBUG_FS
316extern void dwc3_debugfs_init(struct dwc3 *); 349extern void dwc3_debugfs_init(struct dwc3 *);
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c
index 2f1fb7e7aa54..e27899bb5706 100644
--- a/drivers/usb/dwc3/dwc3-exynos.c
+++ b/drivers/usb/dwc3/dwc3-exynos.c
@@ -20,7 +20,6 @@
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/dma-mapping.h>
24#include <linux/clk.h> 23#include <linux/clk.h>
25#include <linux/usb/otg.h> 24#include <linux/usb/otg.h>
26#include <linux/usb/usb_phy_generic.h> 25#include <linux/usb/usb_phy_generic.h>
@@ -117,15 +116,6 @@ static int dwc3_exynos_probe(struct platform_device *pdev)
117 if (!exynos) 116 if (!exynos)
118 return -ENOMEM; 117 return -ENOMEM;
119 118
120 /*
121 * Right now device-tree probed devices don't get dma_mask set.
122 * Since shared usb code relies on it, set it here for now.
123 * Once we move to full device tree support this will vanish off.
124 */
125 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
126 if (ret)
127 return ret;
128
129 platform_set_drvdata(pdev, exynos); 119 platform_set_drvdata(pdev, exynos);
130 120
131 exynos->dev = dev; 121 exynos->dev = dev;
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index 6df0f5dad9a4..2b73339f286b 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
@@ -39,6 +39,27 @@
39#define PCI_DEVICE_ID_INTEL_APL 0x5aaa 39#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
40#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0 40#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
41 41
42#define PCI_INTEL_BXT_DSM_UUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
43#define PCI_INTEL_BXT_FUNC_PMU_PWR 4
44#define PCI_INTEL_BXT_STATE_D0 0
45#define PCI_INTEL_BXT_STATE_D3 3
46
47/**
48 * struct dwc3_pci - Driver private structure
49 * @dwc3: child dwc3 platform_device
50 * @pci: our link to PCI bus
51 * @uuid: _DSM UUID
52 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
53 */
54struct dwc3_pci {
55 struct platform_device *dwc3;
56 struct pci_dev *pci;
57
58 u8 uuid[16];
59
60 unsigned int has_dsm_for_pm:1;
61};
62
42static const struct acpi_gpio_params reset_gpios = { 0, 0, false }; 63static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
43static const struct acpi_gpio_params cs_gpios = { 1, 0, false }; 64static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
44 65
@@ -48,8 +69,21 @@ static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
48 { }, 69 { },
49}; 70};
50 71
51static int dwc3_pci_quirks(struct pci_dev *pdev, struct platform_device *dwc3) 72static int dwc3_pci_quirks(struct dwc3_pci *dwc)
52{ 73{
74 struct platform_device *dwc3 = dwc->dwc3;
75 struct pci_dev *pdev = dwc->pci;
76 int ret;
77
78 struct property_entry sysdev_property[] = {
79 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
80 { },
81 };
82
83 ret = platform_device_add_properties(dwc3, sysdev_property);
84 if (ret)
85 return ret;
86
53 if (pdev->vendor == PCI_VENDOR_ID_AMD && 87 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
54 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) { 88 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
55 struct property_entry properties[] = { 89 struct property_entry properties[] = {
@@ -89,6 +123,12 @@ static int dwc3_pci_quirks(struct pci_dev *pdev, struct platform_device *dwc3)
89 if (ret < 0) 123 if (ret < 0)
90 return ret; 124 return ret;
91 125
126 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
127 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
128 acpi_str_to_uuid(PCI_INTEL_BXT_DSM_UUID, dwc->uuid);
129 dwc->has_dsm_for_pm = true;
130 }
131
92 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) { 132 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
93 struct gpio_desc *gpio; 133 struct gpio_desc *gpio;
94 134
@@ -139,8 +179,8 @@ static int dwc3_pci_quirks(struct pci_dev *pdev, struct platform_device *dwc3)
139static int dwc3_pci_probe(struct pci_dev *pci, 179static int dwc3_pci_probe(struct pci_dev *pci,
140 const struct pci_device_id *id) 180 const struct pci_device_id *id)
141{ 181{
182 struct dwc3_pci *dwc;
142 struct resource res[2]; 183 struct resource res[2];
143 struct platform_device *dwc3;
144 int ret; 184 int ret;
145 struct device *dev = &pci->dev; 185 struct device *dev = &pci->dev;
146 186
@@ -152,11 +192,13 @@ static int dwc3_pci_probe(struct pci_dev *pci,
152 192
153 pci_set_master(pci); 193 pci_set_master(pci);
154 194
155 dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); 195 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
156 if (!dwc3) { 196 if (!dwc)
157 dev_err(dev, "couldn't allocate dwc3 device\n"); 197 return -ENOMEM;
198
199 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
200 if (!dwc->dwc3)
158 return -ENOMEM; 201 return -ENOMEM;
159 }
160 202
161 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); 203 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
162 204
@@ -169,20 +211,21 @@ static int dwc3_pci_probe(struct pci_dev *pci,
169 res[1].name = "dwc_usb3"; 211 res[1].name = "dwc_usb3";
170 res[1].flags = IORESOURCE_IRQ; 212 res[1].flags = IORESOURCE_IRQ;
171 213
172 ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res)); 214 ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
173 if (ret) { 215 if (ret) {
174 dev_err(dev, "couldn't add resources to dwc3 device\n"); 216 dev_err(dev, "couldn't add resources to dwc3 device\n");
175 return ret; 217 return ret;
176 } 218 }
177 219
178 dwc3->dev.parent = dev; 220 dwc->pci = pci;
179 ACPI_COMPANION_SET(&dwc3->dev, ACPI_COMPANION(dev)); 221 dwc->dwc3->dev.parent = dev;
222 ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
180 223
181 ret = dwc3_pci_quirks(pci, dwc3); 224 ret = dwc3_pci_quirks(dwc);
182 if (ret) 225 if (ret)
183 goto err; 226 goto err;
184 227
185 ret = platform_device_add(dwc3); 228 ret = platform_device_add(dwc->dwc3);
186 if (ret) { 229 if (ret) {
187 dev_err(dev, "failed to register dwc3 device\n"); 230 dev_err(dev, "failed to register dwc3 device\n");
188 goto err; 231 goto err;
@@ -190,21 +233,23 @@ static int dwc3_pci_probe(struct pci_dev *pci,
190 233
191 device_init_wakeup(dev, true); 234 device_init_wakeup(dev, true);
192 device_set_run_wake(dev, true); 235 device_set_run_wake(dev, true);
193 pci_set_drvdata(pci, dwc3); 236 pci_set_drvdata(pci, dwc);
194 pm_runtime_put(dev); 237 pm_runtime_put(dev);
195 238
196 return 0; 239 return 0;
197err: 240err:
198 platform_device_put(dwc3); 241 platform_device_put(dwc->dwc3);
199 return ret; 242 return ret;
200} 243}
201 244
202static void dwc3_pci_remove(struct pci_dev *pci) 245static void dwc3_pci_remove(struct pci_dev *pci)
203{ 246{
247 struct dwc3_pci *dwc = pci_get_drvdata(pci);
248
204 device_init_wakeup(&pci->dev, false); 249 device_init_wakeup(&pci->dev, false);
205 pm_runtime_get(&pci->dev); 250 pm_runtime_get(&pci->dev);
206 acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev)); 251 acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev));
207 platform_device_unregister(pci_get_drvdata(pci)); 252 platform_device_unregister(dwc->dwc3);
208} 253}
209 254
210static const struct pci_device_id dwc3_pci_id_table[] = { 255static const struct pci_device_id dwc3_pci_id_table[] = {
@@ -234,40 +279,75 @@ static const struct pci_device_id dwc3_pci_id_table[] = {
234}; 279};
235MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 280MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
236 281
282#if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
283static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
284{
285 union acpi_object *obj;
286 union acpi_object tmp;
287 union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
288
289 if (!dwc->has_dsm_for_pm)
290 return 0;
291
292 tmp.type = ACPI_TYPE_INTEGER;
293 tmp.integer.value = param;
294
295 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), dwc->uuid,
296 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
297 if (!obj) {
298 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
299 return -EIO;
300 }
301
302 ACPI_FREE(obj);
303
304 return 0;
305}
306#endif /* CONFIG_PM || CONFIG_PM_SLEEP */
307
237#ifdef CONFIG_PM 308#ifdef CONFIG_PM
238static int dwc3_pci_runtime_suspend(struct device *dev) 309static int dwc3_pci_runtime_suspend(struct device *dev)
239{ 310{
311 struct dwc3_pci *dwc = dev_get_drvdata(dev);
312
240 if (device_run_wake(dev)) 313 if (device_run_wake(dev))
241 return 0; 314 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
242 315
243 return -EBUSY; 316 return -EBUSY;
244} 317}
245 318
246static int dwc3_pci_runtime_resume(struct device *dev) 319static int dwc3_pci_runtime_resume(struct device *dev)
247{ 320{
248 struct platform_device *dwc3 = dev_get_drvdata(dev); 321 struct dwc3_pci *dwc = dev_get_drvdata(dev);
322 struct platform_device *dwc3 = dwc->dwc3;
323 int ret;
324
325 ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
326 if (ret)
327 return ret;
249 328
250 return pm_runtime_get(&dwc3->dev); 329 return pm_runtime_get(&dwc3->dev);
251} 330}
252#endif /* CONFIG_PM */ 331#endif /* CONFIG_PM */
253 332
254#ifdef CONFIG_PM_SLEEP 333#ifdef CONFIG_PM_SLEEP
255static int dwc3_pci_pm_dummy(struct device *dev) 334static int dwc3_pci_suspend(struct device *dev)
256{ 335{
257 /* 336 struct dwc3_pci *dwc = dev_get_drvdata(dev);
258 * There's nothing to do here. No, seriously. Everything is either taken 337
259 * care either by PCI subsystem or dwc3/core.c, so we have nothing 338 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
260 * missing here. 339}
261 * 340
262 * So you'd think we didn't need this at all, but PCI subsystem will 341static int dwc3_pci_resume(struct device *dev)
263 * bail out if we don't have a valid callback :-s 342{
264 */ 343 struct dwc3_pci *dwc = dev_get_drvdata(dev);
265 return 0; 344
345 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
266} 346}
267#endif /* CONFIG_PM_SLEEP */ 347#endif /* CONFIG_PM_SLEEP */
268 348
269static struct dev_pm_ops dwc3_pci_dev_pm_ops = { 349static struct dev_pm_ops dwc3_pci_dev_pm_ops = {
270 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_pm_dummy, dwc3_pci_pm_dummy) 350 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
271 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume, 351 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
272 NULL) 352 NULL)
273}; 353};
diff --git a/drivers/usb/dwc3/dwc3-st.c b/drivers/usb/dwc3/dwc3-st.c
index aaaf256f71dd..dfbf464eb88c 100644
--- a/drivers/usb/dwc3/dwc3-st.c
+++ b/drivers/usb/dwc3/dwc3-st.c
@@ -219,7 +219,6 @@ static int st_dwc3_probe(struct platform_device *pdev)
219 if (IS_ERR(regmap)) 219 if (IS_ERR(regmap))
220 return PTR_ERR(regmap); 220 return PTR_ERR(regmap);
221 221
222 dma_set_coherent_mask(dev, dev->coherent_dma_mask);
223 dwc3_data->dev = dev; 222 dwc3_data->dev = dev;
224 dwc3_data->regmap = regmap; 223 dwc3_data->regmap = regmap;
225 224
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index fe79d771dee4..4878d187c7d4 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -39,22 +39,6 @@ static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep);
39static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, 39static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
40 struct dwc3_ep *dep, struct dwc3_request *req); 40 struct dwc3_ep *dep, struct dwc3_request *req);
41 41
42static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)
43{
44 switch (state) {
45 case EP0_UNCONNECTED:
46 return "Unconnected";
47 case EP0_SETUP_PHASE:
48 return "Setup Phase";
49 case EP0_DATA_PHASE:
50 return "Data Phase";
51 case EP0_STATUS_PHASE:
52 return "Status Phase";
53 default:
54 return "UNKNOWN";
55 }
56}
57
58static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma, 42static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
59 u32 len, u32 type, bool chain) 43 u32 len, u32 type, bool chain)
60{ 44{
@@ -65,10 +49,8 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
65 int ret; 49 int ret;
66 50
67 dep = dwc->eps[epnum]; 51 dep = dwc->eps[epnum];
68 if (dep->flags & DWC3_EP_BUSY) { 52 if (dep->flags & DWC3_EP_BUSY)
69 dwc3_trace(trace_dwc3_ep0, "%s still busy", dep->name);
70 return 0; 53 return 0;
71 }
72 54
73 trb = &dwc->ep0_trb[dep->trb_enqueue]; 55 trb = &dwc->ep0_trb[dep->trb_enqueue];
74 56
@@ -99,11 +81,8 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
99 trace_dwc3_prepare_trb(dep, trb); 81 trace_dwc3_prepare_trb(dep, trb);
100 82
101 ret = dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_STARTTRANSFER, &params); 83 ret = dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_STARTTRANSFER, &params);
102 if (ret < 0) { 84 if (ret < 0)
103 dwc3_trace(trace_dwc3_ep0, "%s STARTTRANSFER failed",
104 dep->name);
105 return ret; 85 return ret;
106 }
107 86
108 dep->flags |= DWC3_EP_BUSY; 87 dep->flags |= DWC3_EP_BUSY;
109 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep); 88 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
@@ -163,9 +142,6 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
163 142
164 if (dwc->ep0state == EP0_STATUS_PHASE) 143 if (dwc->ep0state == EP0_STATUS_PHASE)
165 __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]); 144 __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]);
166 else
167 dwc3_trace(trace_dwc3_ep0,
168 "too early for delayed status");
169 145
170 return 0; 146 return 0;
171 } 147 }
@@ -229,9 +205,8 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
229 205
230 spin_lock_irqsave(&dwc->lock, flags); 206 spin_lock_irqsave(&dwc->lock, flags);
231 if (!dep->endpoint.desc) { 207 if (!dep->endpoint.desc) {
232 dwc3_trace(trace_dwc3_ep0, 208 dev_err(dwc->dev, "%s: can't queue to disabled endpoint\n",
233 "trying to queue request %p to disabled %s", 209 dep->name);
234 request, dep->name);
235 ret = -ESHUTDOWN; 210 ret = -ESHUTDOWN;
236 goto out; 211 goto out;
237 } 212 }
@@ -242,11 +217,6 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
242 goto out; 217 goto out;
243 } 218 }
244 219
245 dwc3_trace(trace_dwc3_ep0,
246 "queueing request %p to %s length %d state '%s'",
247 request, dep->name, request->length,
248 dwc3_ep0_state_string(dwc->ep0state));
249
250 ret = __dwc3_gadget_ep0_queue(dep, req); 220 ret = __dwc3_gadget_ep0_queue(dep, req);
251 221
252out: 222out:
@@ -308,6 +278,8 @@ void dwc3_ep0_out_start(struct dwc3 *dwc)
308{ 278{
309 int ret; 279 int ret;
310 280
281 complete(&dwc->ep0_in_setup);
282
311 ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8, 283 ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8,
312 DWC3_TRBCTL_CONTROL_SETUP, false); 284 DWC3_TRBCTL_CONTROL_SETUP, false);
313 WARN_ON(ret < 0); 285 WARN_ON(ret < 0);
@@ -395,126 +367,198 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc,
395 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req); 367 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
396} 368}
397 369
398static int dwc3_ep0_handle_feature(struct dwc3 *dwc, 370static int dwc3_ep0_handle_u1(struct dwc3 *dwc, enum usb_device_state state,
371 int set)
372{
373 u32 reg;
374
375 if (state != USB_STATE_CONFIGURED)
376 return -EINVAL;
377 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
378 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
379 return -EINVAL;
380
381 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
382 if (set)
383 reg |= DWC3_DCTL_INITU1ENA;
384 else
385 reg &= ~DWC3_DCTL_INITU1ENA;
386 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
387
388 return 0;
389}
390
391static int dwc3_ep0_handle_u2(struct dwc3 *dwc, enum usb_device_state state,
392 int set)
393{
394 u32 reg;
395
396
397 if (state != USB_STATE_CONFIGURED)
398 return -EINVAL;
399 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
400 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
401 return -EINVAL;
402
403 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
404 if (set)
405 reg |= DWC3_DCTL_INITU2ENA;
406 else
407 reg &= ~DWC3_DCTL_INITU2ENA;
408 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
409
410 return 0;
411}
412
413static int dwc3_ep0_handle_test(struct dwc3 *dwc, enum usb_device_state state,
414 u32 wIndex, int set)
415{
416 if ((wIndex & 0xff) != 0)
417 return -EINVAL;
418 if (!set)
419 return -EINVAL;
420
421 switch (wIndex >> 8) {
422 case TEST_J:
423 case TEST_K:
424 case TEST_SE0_NAK:
425 case TEST_PACKET:
426 case TEST_FORCE_EN:
427 dwc->test_mode_nr = wIndex >> 8;
428 dwc->test_mode = true;
429 break;
430 default:
431 return -EINVAL;
432 }
433
434 return 0;
435}
436
437static int dwc3_ep0_handle_device(struct dwc3 *dwc,
399 struct usb_ctrlrequest *ctrl, int set) 438 struct usb_ctrlrequest *ctrl, int set)
400{ 439{
401 struct dwc3_ep *dep; 440 enum usb_device_state state;
402 u32 recip;
403 u32 wValue; 441 u32 wValue;
404 u32 wIndex; 442 u32 wIndex;
405 u32 reg; 443 int ret = 0;
406 int ret;
407 enum usb_device_state state;
408 444
409 wValue = le16_to_cpu(ctrl->wValue); 445 wValue = le16_to_cpu(ctrl->wValue);
410 wIndex = le16_to_cpu(ctrl->wIndex); 446 wIndex = le16_to_cpu(ctrl->wIndex);
411 recip = ctrl->bRequestType & USB_RECIP_MASK;
412 state = dwc->gadget.state; 447 state = dwc->gadget.state;
413 448
414 switch (recip) { 449 switch (wValue) {
415 case USB_RECIP_DEVICE: 450 case USB_DEVICE_REMOTE_WAKEUP:
451 break;
452 /*
453 * 9.4.1 says only only for SS, in AddressState only for
454 * default control pipe
455 */
456 case USB_DEVICE_U1_ENABLE:
457 ret = dwc3_ep0_handle_u1(dwc, state, set);
458 break;
459 case USB_DEVICE_U2_ENABLE:
460 ret = dwc3_ep0_handle_u2(dwc, state, set);
461 break;
462 case USB_DEVICE_LTM_ENABLE:
463 ret = -EINVAL;
464 break;
465 case USB_DEVICE_TEST_MODE:
466 ret = dwc3_ep0_handle_test(dwc, state, wIndex, set);
467 break;
468 default:
469 ret = -EINVAL;
470 }
416 471
417 switch (wValue) { 472 return ret;
418 case USB_DEVICE_REMOTE_WAKEUP: 473}
419 break; 474
475static int dwc3_ep0_handle_intf(struct dwc3 *dwc,
476 struct usb_ctrlrequest *ctrl, int set)
477{
478 enum usb_device_state state;
479 u32 wValue;
480 u32 wIndex;
481 int ret = 0;
482
483 wValue = le16_to_cpu(ctrl->wValue);
484 wIndex = le16_to_cpu(ctrl->wIndex);
485 state = dwc->gadget.state;
486
487 switch (wValue) {
488 case USB_INTRF_FUNC_SUSPEND:
420 /* 489 /*
421 * 9.4.1 says only only for SS, in AddressState only for 490 * REVISIT: Ideally we would enable some low power mode here,
422 * default control pipe 491 * however it's unclear what we should be doing here.
492 *
493 * For now, we're not doing anything, just making sure we return
494 * 0 so USB Command Verifier tests pass without any errors.
423 */ 495 */
424 case USB_DEVICE_U1_ENABLE: 496 break;
425 if (state != USB_STATE_CONFIGURED) 497 default:
426 return -EINVAL; 498 ret = -EINVAL;
427 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) && 499 }
428 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
429 return -EINVAL;
430 500
431 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 501 return ret;
432 if (set) 502}
433 reg |= DWC3_DCTL_INITU1ENA;
434 else
435 reg &= ~DWC3_DCTL_INITU1ENA;
436 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
437 break;
438 503
439 case USB_DEVICE_U2_ENABLE: 504static int dwc3_ep0_handle_endpoint(struct dwc3 *dwc,
440 if (state != USB_STATE_CONFIGURED) 505 struct usb_ctrlrequest *ctrl, int set)
441 return -EINVAL; 506{
442 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) && 507 struct dwc3_ep *dep;
443 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS)) 508 enum usb_device_state state;
444 return -EINVAL; 509 u32 wValue;
510 u32 wIndex;
511 int ret;
445 512
446 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 513 wValue = le16_to_cpu(ctrl->wValue);
447 if (set) 514 wIndex = le16_to_cpu(ctrl->wIndex);
448 reg |= DWC3_DCTL_INITU2ENA; 515 state = dwc->gadget.state;
449 else
450 reg &= ~DWC3_DCTL_INITU2ENA;
451 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
452 break;
453 516
454 case USB_DEVICE_LTM_ENABLE: 517 switch (wValue) {
518 case USB_ENDPOINT_HALT:
519 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
520 if (!dep)
455 return -EINVAL; 521 return -EINVAL;
456 522
457 case USB_DEVICE_TEST_MODE: 523 if (set == 0 && (dep->flags & DWC3_EP_WEDGE))
458 if ((wIndex & 0xff) != 0)
459 return -EINVAL;
460 if (!set)
461 return -EINVAL;
462
463 switch (wIndex >> 8) {
464 case TEST_J:
465 case TEST_K:
466 case TEST_SE0_NAK:
467 case TEST_PACKET:
468 case TEST_FORCE_EN:
469 dwc->test_mode_nr = wIndex >> 8;
470 dwc->test_mode = true;
471 break;
472 default:
473 return -EINVAL;
474 }
475 break; 524 break;
476 default: 525
526 ret = __dwc3_gadget_ep_set_halt(dep, set, true);
527 if (ret)
477 return -EINVAL; 528 return -EINVAL;
478 }
479 break; 529 break;
530 default:
531 return -EINVAL;
532 }
480 533
534 return 0;
535}
536
537static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
538 struct usb_ctrlrequest *ctrl, int set)
539{
540 u32 recip;
541 int ret;
542 enum usb_device_state state;
543
544 recip = ctrl->bRequestType & USB_RECIP_MASK;
545 state = dwc->gadget.state;
546
547 switch (recip) {
548 case USB_RECIP_DEVICE:
549 ret = dwc3_ep0_handle_device(dwc, ctrl, set);
550 break;
481 case USB_RECIP_INTERFACE: 551 case USB_RECIP_INTERFACE:
482 switch (wValue) { 552 ret = dwc3_ep0_handle_intf(dwc, ctrl, set);
483 case USB_INTRF_FUNC_SUSPEND:
484 if (wIndex & USB_INTRF_FUNC_SUSPEND_LP)
485 /* XXX enable Low power suspend */
486 ;
487 if (wIndex & USB_INTRF_FUNC_SUSPEND_RW)
488 /* XXX enable remote wakeup */
489 ;
490 break;
491 default:
492 return -EINVAL;
493 }
494 break; 553 break;
495
496 case USB_RECIP_ENDPOINT: 554 case USB_RECIP_ENDPOINT:
497 switch (wValue) { 555 ret = dwc3_ep0_handle_endpoint(dwc, ctrl, set);
498 case USB_ENDPOINT_HALT:
499 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
500 if (!dep)
501 return -EINVAL;
502 if (set == 0 && (dep->flags & DWC3_EP_WEDGE))
503 break;
504 ret = __dwc3_gadget_ep_set_halt(dep, set, true);
505 if (ret)
506 return -EINVAL;
507 break;
508 default:
509 return -EINVAL;
510 }
511 break; 556 break;
512
513 default: 557 default:
514 return -EINVAL; 558 ret = -EINVAL;
515 } 559 }
516 560
517 return 0; 561 return ret;
518} 562}
519 563
520static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) 564static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
@@ -525,13 +569,12 @@ static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
525 569
526 addr = le16_to_cpu(ctrl->wValue); 570 addr = le16_to_cpu(ctrl->wValue);
527 if (addr > 127) { 571 if (addr > 127) {
528 dwc3_trace(trace_dwc3_ep0, "invalid device address %d", addr); 572 dev_err(dwc->dev, "invalid device address %d\n", addr);
529 return -EINVAL; 573 return -EINVAL;
530 } 574 }
531 575
532 if (state == USB_STATE_CONFIGURED) { 576 if (state == USB_STATE_CONFIGURED) {
533 dwc3_trace(trace_dwc3_ep0, 577 dev_err(dwc->dev, "can't SetAddress() from Configured State\n");
534 "trying to set address when configured");
535 return -EINVAL; 578 return -EINVAL;
536 } 579 }
537 580
@@ -716,35 +759,27 @@ static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
716 759
717 switch (ctrl->bRequest) { 760 switch (ctrl->bRequest) {
718 case USB_REQ_GET_STATUS: 761 case USB_REQ_GET_STATUS:
719 dwc3_trace(trace_dwc3_ep0, "USB_REQ_GET_STATUS");
720 ret = dwc3_ep0_handle_status(dwc, ctrl); 762 ret = dwc3_ep0_handle_status(dwc, ctrl);
721 break; 763 break;
722 case USB_REQ_CLEAR_FEATURE: 764 case USB_REQ_CLEAR_FEATURE:
723 dwc3_trace(trace_dwc3_ep0, "USB_REQ_CLEAR_FEATURE");
724 ret = dwc3_ep0_handle_feature(dwc, ctrl, 0); 765 ret = dwc3_ep0_handle_feature(dwc, ctrl, 0);
725 break; 766 break;
726 case USB_REQ_SET_FEATURE: 767 case USB_REQ_SET_FEATURE:
727 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_FEATURE");
728 ret = dwc3_ep0_handle_feature(dwc, ctrl, 1); 768 ret = dwc3_ep0_handle_feature(dwc, ctrl, 1);
729 break; 769 break;
730 case USB_REQ_SET_ADDRESS: 770 case USB_REQ_SET_ADDRESS:
731 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_ADDRESS");
732 ret = dwc3_ep0_set_address(dwc, ctrl); 771 ret = dwc3_ep0_set_address(dwc, ctrl);
733 break; 772 break;
734 case USB_REQ_SET_CONFIGURATION: 773 case USB_REQ_SET_CONFIGURATION:
735 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_CONFIGURATION");
736 ret = dwc3_ep0_set_config(dwc, ctrl); 774 ret = dwc3_ep0_set_config(dwc, ctrl);
737 break; 775 break;
738 case USB_REQ_SET_SEL: 776 case USB_REQ_SET_SEL:
739 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_SEL");
740 ret = dwc3_ep0_set_sel(dwc, ctrl); 777 ret = dwc3_ep0_set_sel(dwc, ctrl);
741 break; 778 break;
742 case USB_REQ_SET_ISOCH_DELAY: 779 case USB_REQ_SET_ISOCH_DELAY:
743 dwc3_trace(trace_dwc3_ep0, "USB_REQ_SET_ISOCH_DELAY");
744 ret = dwc3_ep0_set_isoch_delay(dwc, ctrl); 780 ret = dwc3_ep0_set_isoch_delay(dwc, ctrl);
745 break; 781 break;
746 default: 782 default:
747 dwc3_trace(trace_dwc3_ep0, "Forwarding to gadget driver");
748 ret = dwc3_ep0_delegate_req(dwc, ctrl); 783 ret = dwc3_ep0_delegate_req(dwc, ctrl);
749 break; 784 break;
750 } 785 }
@@ -820,9 +855,6 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
820 status = DWC3_TRB_SIZE_TRBSTS(trb->size); 855 status = DWC3_TRB_SIZE_TRBSTS(trb->size);
821 if (status == DWC3_TRBSTS_SETUP_PENDING) { 856 if (status == DWC3_TRBSTS_SETUP_PENDING) {
822 dwc->setup_packet_pending = true; 857 dwc->setup_packet_pending = true;
823
824 dwc3_trace(trace_dwc3_ep0, "Setup Pending received");
825
826 if (r) 858 if (r)
827 dwc3_gadget_giveback(ep0, r, -ECONNRESET); 859 dwc3_gadget_giveback(ep0, r, -ECONNRESET);
828 860
@@ -912,7 +944,7 @@ static void dwc3_ep0_complete_status(struct dwc3 *dwc,
912 944
913 ret = dwc3_gadget_set_test_mode(dwc, dwc->test_mode_nr); 945 ret = dwc3_gadget_set_test_mode(dwc, dwc->test_mode_nr);
914 if (ret < 0) { 946 if (ret < 0) {
915 dwc3_trace(trace_dwc3_ep0, "Invalid Test #%d", 947 dev_err(dwc->dev, "invalid test #%d\n",
916 dwc->test_mode_nr); 948 dwc->test_mode_nr);
917 dwc3_ep0_stall_and_restart(dwc); 949 dwc3_ep0_stall_and_restart(dwc);
918 return; 950 return;
@@ -920,10 +952,8 @@ static void dwc3_ep0_complete_status(struct dwc3 *dwc,
920 } 952 }
921 953
922 status = DWC3_TRB_SIZE_TRBSTS(trb->size); 954 status = DWC3_TRB_SIZE_TRBSTS(trb->size);
923 if (status == DWC3_TRBSTS_SETUP_PENDING) { 955 if (status == DWC3_TRBSTS_SETUP_PENDING)
924 dwc->setup_packet_pending = true; 956 dwc->setup_packet_pending = true;
925 dwc3_trace(trace_dwc3_ep0, "Setup Pending received");
926 }
927 957
928 dwc->ep0state = EP0_SETUP_PHASE; 958 dwc->ep0state = EP0_SETUP_PHASE;
929 dwc3_ep0_out_start(dwc); 959 dwc3_ep0_out_start(dwc);
@@ -940,17 +970,14 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
940 970
941 switch (dwc->ep0state) { 971 switch (dwc->ep0state) {
942 case EP0_SETUP_PHASE: 972 case EP0_SETUP_PHASE:
943 dwc3_trace(trace_dwc3_ep0, "Setup Phase");
944 dwc3_ep0_inspect_setup(dwc, event); 973 dwc3_ep0_inspect_setup(dwc, event);
945 break; 974 break;
946 975
947 case EP0_DATA_PHASE: 976 case EP0_DATA_PHASE:
948 dwc3_trace(trace_dwc3_ep0, "Data Phase");
949 dwc3_ep0_complete_data(dwc, event); 977 dwc3_ep0_complete_data(dwc, event);
950 break; 978 break;
951 979
952 case EP0_STATUS_PHASE: 980 case EP0_STATUS_PHASE:
953 dwc3_trace(trace_dwc3_ep0, "Status Phase");
954 dwc3_ep0_complete_status(dwc, event); 981 dwc3_ep0_complete_status(dwc, event);
955 break; 982 break;
956 default: 983 default:
@@ -974,12 +1001,10 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
974 u32 transfer_size = 0; 1001 u32 transfer_size = 0;
975 u32 maxpacket; 1002 u32 maxpacket;
976 1003
977 ret = usb_gadget_map_request(&dwc->gadget, &req->request, 1004 ret = usb_gadget_map_request_by_dev(dwc->sysdev,
978 dep->number); 1005 &req->request, dep->number);
979 if (ret) { 1006 if (ret)
980 dwc3_trace(trace_dwc3_ep0, "failed to map request");
981 return; 1007 return;
982 }
983 1008
984 maxpacket = dep->endpoint.maxpacket; 1009 maxpacket = dep->endpoint.maxpacket;
985 1010
@@ -1002,12 +1027,10 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
1002 dwc->ep0_bounce_addr, transfer_size, 1027 dwc->ep0_bounce_addr, transfer_size,
1003 DWC3_TRBCTL_CONTROL_DATA, false); 1028 DWC3_TRBCTL_CONTROL_DATA, false);
1004 } else { 1029 } else {
1005 ret = usb_gadget_map_request(&dwc->gadget, &req->request, 1030 ret = usb_gadget_map_request_by_dev(dwc->sysdev,
1006 dep->number); 1031 &req->request, dep->number);
1007 if (ret) { 1032 if (ret)
1008 dwc3_trace(trace_dwc3_ep0, "failed to map request");
1009 return; 1033 return;
1010 }
1011 1034
1012 ret = dwc3_ep0_start_trans(dwc, dep->number, req->request.dma, 1035 ret = dwc3_ep0_start_trans(dwc, dep->number, req->request.dma,
1013 req->request.length, DWC3_TRBCTL_CONTROL_DATA, 1036 req->request.length, DWC3_TRBCTL_CONTROL_DATA,
@@ -1065,8 +1088,6 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
1065{ 1088{
1066 switch (event->status) { 1089 switch (event->status) {
1067 case DEPEVT_STATUS_CONTROL_DATA: 1090 case DEPEVT_STATUS_CONTROL_DATA:
1068 dwc3_trace(trace_dwc3_ep0, "Control Data");
1069
1070 /* 1091 /*
1071 * We already have a DATA transfer in the controller's cache, 1092 * We already have a DATA transfer in the controller's cache,
1072 * if we receive a XferNotReady(DATA) we will ignore it, unless 1093 * if we receive a XferNotReady(DATA) we will ignore it, unless
@@ -1079,8 +1100,7 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
1079 if (dwc->ep0_expect_in != event->endpoint_number) { 1100 if (dwc->ep0_expect_in != event->endpoint_number) {
1080 struct dwc3_ep *dep = dwc->eps[dwc->ep0_expect_in]; 1101 struct dwc3_ep *dep = dwc->eps[dwc->ep0_expect_in];
1081 1102
1082 dwc3_trace(trace_dwc3_ep0, 1103 dev_err(dwc->dev, "unexpected direction for Data Phase\n");
1083 "Wrong direction for Data phase");
1084 dwc3_ep0_end_control_data(dwc, dep); 1104 dwc3_ep0_end_control_data(dwc, dep);
1085 dwc3_ep0_stall_and_restart(dwc); 1105 dwc3_ep0_stall_and_restart(dwc);
1086 return; 1106 return;
@@ -1092,13 +1112,10 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
1092 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) 1112 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS)
1093 return; 1113 return;
1094 1114
1095 dwc3_trace(trace_dwc3_ep0, "Control Status");
1096
1097 dwc->ep0state = EP0_STATUS_PHASE; 1115 dwc->ep0state = EP0_STATUS_PHASE;
1098 1116
1099 if (dwc->delayed_status) { 1117 if (dwc->delayed_status) {
1100 WARN_ON_ONCE(event->endpoint_number != 1); 1118 WARN_ON_ONCE(event->endpoint_number != 1);
1101 dwc3_trace(trace_dwc3_ep0, "Delayed Status");
1102 return; 1119 return;
1103 } 1120 }
1104 1121
@@ -1109,10 +1126,6 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
1109void dwc3_ep0_interrupt(struct dwc3 *dwc, 1126void dwc3_ep0_interrupt(struct dwc3 *dwc,
1110 const struct dwc3_event_depevt *event) 1127 const struct dwc3_event_depevt *event)
1111{ 1128{
1112 dwc3_trace(trace_dwc3_ep0, "%s: state '%s'",
1113 dwc3_ep_event_string(event),
1114 dwc3_ep0_state_string(dwc->ep0state));
1115
1116 switch (event->endpoint_event) { 1129 switch (event->endpoint_event) {
1117 case DWC3_DEPEVT_XFERCOMPLETE: 1130 case DWC3_DEPEVT_XFERCOMPLETE:
1118 dwc3_ep0_xfer_complete(dwc, event); 1131 dwc3_ep0_xfer_complete(dwc, event);
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 1dfa56a5f1c5..678559525618 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -139,9 +139,6 @@ int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)
139 udelay(5); 139 udelay(5);
140 } 140 }
141 141
142 dwc3_trace(trace_dwc3_gadget,
143 "link state change request timed out");
144
145 return -ETIMEDOUT; 142 return -ETIMEDOUT;
146} 143}
147 144
@@ -178,6 +175,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
178 req->started = false; 175 req->started = false;
179 list_del(&req->list); 176 list_del(&req->list);
180 req->trb = NULL; 177 req->trb = NULL;
178 req->remaining = 0;
181 179
182 if (req->request.status == -EINPROGRESS) 180 if (req->request.status == -EINPROGRESS)
183 req->request.status = status; 181 req->request.status = status;
@@ -185,8 +183,8 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
185 if (dwc->ep0_bounced && dep->number == 0) 183 if (dwc->ep0_bounced && dep->number == 0)
186 dwc->ep0_bounced = false; 184 dwc->ep0_bounced = false;
187 else 185 else
188 usb_gadget_unmap_request(&dwc->gadget, &req->request, 186 usb_gadget_unmap_request_by_dev(dwc->sysdev,
189 req->direction); 187 &req->request, req->direction);
190 188
191 trace_dwc3_gadget_giveback(req); 189 trace_dwc3_gadget_giveback(req);
192 190
@@ -216,7 +214,7 @@ int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param)
216 ret = -EINVAL; 214 ret = -EINVAL;
217 break; 215 break;
218 } 216 }
219 } while (timeout--); 217 } while (--timeout);
220 218
221 if (!timeout) { 219 if (!timeout) {
222 ret = -ETIMEDOUT; 220 ret = -ETIMEDOUT;
@@ -233,6 +231,7 @@ static int __dwc3_gadget_wakeup(struct dwc3 *dwc);
233int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd, 231int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
234 struct dwc3_gadget_ep_cmd_params *params) 232 struct dwc3_gadget_ep_cmd_params *params)
235{ 233{
234 const struct usb_endpoint_descriptor *desc = dep->endpoint.desc;
236 struct dwc3 *dwc = dep->dwc; 235 struct dwc3 *dwc = dep->dwc;
237 u32 timeout = 500; 236 u32 timeout = 500;
238 u32 reg; 237 u32 reg;
@@ -258,7 +257,7 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
258 } 257 }
259 } 258 }
260 259
261 if (cmd == DWC3_DEPCMD_STARTTRANSFER) { 260 if (DWC3_DEPCMD_CMD(cmd) == DWC3_DEPCMD_STARTTRANSFER) {
262 int needs_wakeup; 261 int needs_wakeup;
263 262
264 needs_wakeup = (dwc->link_state == DWC3_LINK_STATE_U1 || 263 needs_wakeup = (dwc->link_state == DWC3_LINK_STATE_U1 ||
@@ -276,7 +275,28 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
276 dwc3_writel(dep->regs, DWC3_DEPCMDPAR1, params->param1); 275 dwc3_writel(dep->regs, DWC3_DEPCMDPAR1, params->param1);
277 dwc3_writel(dep->regs, DWC3_DEPCMDPAR2, params->param2); 276 dwc3_writel(dep->regs, DWC3_DEPCMDPAR2, params->param2);
278 277
279 dwc3_writel(dep->regs, DWC3_DEPCMD, cmd | DWC3_DEPCMD_CMDACT); 278 /*
279 * Synopsys Databook 2.60a states in section 6.3.2.5.6 of that if we're
280 * not relying on XferNotReady, we can make use of a special "No
281 * Response Update Transfer" command where we should clear both CmdAct
282 * and CmdIOC bits.
283 *
284 * With this, we don't need to wait for command completion and can
285 * straight away issue further commands to the endpoint.
286 *
287 * NOTICE: We're making an assumption that control endpoints will never
288 * make use of Update Transfer command. This is a safe assumption
289 * because we can never have more than one request at a time with
290 * Control Endpoints. If anybody changes that assumption, this chunk
291 * needs to be updated accordingly.
292 */
293 if (DWC3_DEPCMD_CMD(cmd) == DWC3_DEPCMD_UPDATETRANSFER &&
294 !usb_endpoint_xfer_isoc(desc))
295 cmd &= ~(DWC3_DEPCMD_CMDIOC | DWC3_DEPCMD_CMDACT);
296 else
297 cmd |= DWC3_DEPCMD_CMDACT;
298
299 dwc3_writel(dep->regs, DWC3_DEPCMD, cmd);
280 do { 300 do {
281 reg = dwc3_readl(dep->regs, DWC3_DEPCMD); 301 reg = dwc3_readl(dep->regs, DWC3_DEPCMD);
282 if (!(reg & DWC3_DEPCMD_CMDACT)) { 302 if (!(reg & DWC3_DEPCMD_CMDACT)) {
@@ -318,6 +338,20 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
318 338
319 trace_dwc3_gadget_ep_cmd(dep, cmd, params, cmd_status); 339 trace_dwc3_gadget_ep_cmd(dep, cmd, params, cmd_status);
320 340
341 if (ret == 0) {
342 switch (DWC3_DEPCMD_CMD(cmd)) {
343 case DWC3_DEPCMD_STARTTRANSFER:
344 dep->flags |= DWC3_EP_TRANSFER_STARTED;
345 break;
346 case DWC3_DEPCMD_ENDTRANSFER:
347 dep->flags &= ~DWC3_EP_TRANSFER_STARTED;
348 break;
349 default:
350 /* nothing */
351 break;
352 }
353 }
354
321 if (unlikely(susphy)) { 355 if (unlikely(susphy)) {
322 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); 356 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
323 reg |= DWC3_GUSB2PHYCFG_SUSPHY; 357 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
@@ -365,7 +399,7 @@ static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)
365 if (dep->trb_pool) 399 if (dep->trb_pool)
366 return 0; 400 return 0;
367 401
368 dep->trb_pool = dma_alloc_coherent(dwc->dev, 402 dep->trb_pool = dma_alloc_coherent(dwc->sysdev,
369 sizeof(struct dwc3_trb) * DWC3_TRB_NUM, 403 sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
370 &dep->trb_pool_dma, GFP_KERNEL); 404 &dep->trb_pool_dma, GFP_KERNEL);
371 if (!dep->trb_pool) { 405 if (!dep->trb_pool) {
@@ -381,7 +415,7 @@ static void dwc3_free_trb_pool(struct dwc3_ep *dep)
381{ 415{
382 struct dwc3 *dwc = dep->dwc; 416 struct dwc3 *dwc = dep->dwc;
383 417
384 dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM, 418 dma_free_coherent(dwc->sysdev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
385 dep->trb_pool, dep->trb_pool_dma); 419 dep->trb_pool, dep->trb_pool_dma);
386 420
387 dep->trb_pool = NULL; 421 dep->trb_pool = NULL;
@@ -454,16 +488,19 @@ static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
454} 488}
455 489
456static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, 490static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
457 const struct usb_endpoint_descriptor *desc,
458 const struct usb_ss_ep_comp_descriptor *comp_desc,
459 bool modify, bool restore) 491 bool modify, bool restore)
460{ 492{
493 const struct usb_ss_ep_comp_descriptor *comp_desc;
494 const struct usb_endpoint_descriptor *desc;
461 struct dwc3_gadget_ep_cmd_params params; 495 struct dwc3_gadget_ep_cmd_params params;
462 496
463 if (dev_WARN_ONCE(dwc->dev, modify && restore, 497 if (dev_WARN_ONCE(dwc->dev, modify && restore,
464 "Can't modify and restore\n")) 498 "Can't modify and restore\n"))
465 return -EINVAL; 499 return -EINVAL;
466 500
501 comp_desc = dep->endpoint.comp_desc;
502 desc = dep->endpoint.desc;
503
467 memset(&params, 0x00, sizeof(params)); 504 memset(&params, 0x00, sizeof(params));
468 505
469 params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc)) 506 params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc))
@@ -542,24 +579,21 @@ static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
542 * Caller should take care of locking 579 * Caller should take care of locking
543 */ 580 */
544static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, 581static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
545 const struct usb_endpoint_descriptor *desc,
546 const struct usb_ss_ep_comp_descriptor *comp_desc,
547 bool modify, bool restore) 582 bool modify, bool restore)
548{ 583{
584 const struct usb_endpoint_descriptor *desc = dep->endpoint.desc;
549 struct dwc3 *dwc = dep->dwc; 585 struct dwc3 *dwc = dep->dwc;
586
550 u32 reg; 587 u32 reg;
551 int ret; 588 int ret;
552 589
553 dwc3_trace(trace_dwc3_gadget, "Enabling %s", dep->name);
554
555 if (!(dep->flags & DWC3_EP_ENABLED)) { 590 if (!(dep->flags & DWC3_EP_ENABLED)) {
556 ret = dwc3_gadget_start_config(dwc, dep); 591 ret = dwc3_gadget_start_config(dwc, dep);
557 if (ret) 592 if (ret)
558 return ret; 593 return ret;
559 } 594 }
560 595
561 ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc, modify, 596 ret = dwc3_gadget_set_ep_config(dwc, dep, modify, restore);
562 restore);
563 if (ret) 597 if (ret)
564 return ret; 598 return ret;
565 599
@@ -567,17 +601,18 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
567 struct dwc3_trb *trb_st_hw; 601 struct dwc3_trb *trb_st_hw;
568 struct dwc3_trb *trb_link; 602 struct dwc3_trb *trb_link;
569 603
570 dep->endpoint.desc = desc;
571 dep->comp_desc = comp_desc;
572 dep->type = usb_endpoint_type(desc); 604 dep->type = usb_endpoint_type(desc);
573 dep->flags |= DWC3_EP_ENABLED; 605 dep->flags |= DWC3_EP_ENABLED;
606 dep->flags &= ~DWC3_EP_END_TRANSFER_PENDING;
574 607
575 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA); 608 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
576 reg |= DWC3_DALEPENA_EP(dep->number); 609 reg |= DWC3_DALEPENA_EP(dep->number);
577 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg); 610 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
578 611
612 init_waitqueue_head(&dep->wait_end_transfer);
613
579 if (usb_endpoint_xfer_control(desc)) 614 if (usb_endpoint_xfer_control(desc))
580 return 0; 615 goto out;
581 616
582 /* Initialize the TRB ring */ 617 /* Initialize the TRB ring */
583 dep->trb_dequeue = 0; 618 dep->trb_dequeue = 0;
@@ -595,6 +630,39 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
595 trb_link->ctrl |= DWC3_TRB_CTRL_HWO; 630 trb_link->ctrl |= DWC3_TRB_CTRL_HWO;
596 } 631 }
597 632
633 /*
634 * Issue StartTransfer here with no-op TRB so we can always rely on No
635 * Response Update Transfer command.
636 */
637 if (usb_endpoint_xfer_bulk(desc)) {
638 struct dwc3_gadget_ep_cmd_params params;
639 struct dwc3_trb *trb;
640 dma_addr_t trb_dma;
641 u32 cmd;
642
643 memset(&params, 0, sizeof(params));
644 trb = &dep->trb_pool[0];
645 trb_dma = dwc3_trb_dma_offset(dep, trb);
646
647 params.param0 = upper_32_bits(trb_dma);
648 params.param1 = lower_32_bits(trb_dma);
649
650 cmd = DWC3_DEPCMD_STARTTRANSFER;
651
652 ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
653 if (ret < 0)
654 return ret;
655
656 dep->flags |= DWC3_EP_BUSY;
657
658 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
659 WARN_ON_ONCE(!dep->resource_index);
660 }
661
662
663out:
664 trace_dwc3_gadget_ep_enable(dep);
665
598 return 0; 666 return 0;
599} 667}
600 668
@@ -632,7 +700,7 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
632 struct dwc3 *dwc = dep->dwc; 700 struct dwc3 *dwc = dep->dwc;
633 u32 reg; 701 u32 reg;
634 702
635 dwc3_trace(trace_dwc3_gadget, "Disabling %s", dep->name); 703 trace_dwc3_gadget_ep_disable(dep);
636 704
637 dwc3_remove_requests(dwc, dep); 705 dwc3_remove_requests(dwc, dep);
638 706
@@ -645,10 +713,14 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
645 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg); 713 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
646 714
647 dep->stream_capable = false; 715 dep->stream_capable = false;
648 dep->endpoint.desc = NULL;
649 dep->comp_desc = NULL;
650 dep->type = 0; 716 dep->type = 0;
651 dep->flags = 0; 717 dep->flags &= DWC3_EP_END_TRANSFER_PENDING;
718
719 /* Clear out the ep descriptors for non-ep0 */
720 if (dep->number > 1) {
721 dep->endpoint.comp_desc = NULL;
722 dep->endpoint.desc = NULL;
723 }
652 724
653 return 0; 725 return 0;
654} 726}
@@ -695,7 +767,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
695 return 0; 767 return 0;
696 768
697 spin_lock_irqsave(&dwc->lock, flags); 769 spin_lock_irqsave(&dwc->lock, flags);
698 ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc, false, false); 770 ret = __dwc3_gadget_ep_enable(dep, false, false);
699 spin_unlock_irqrestore(&dwc->lock, flags); 771 spin_unlock_irqrestore(&dwc->lock, flags);
700 772
701 return ret; 773 return ret;
@@ -771,10 +843,9 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
771 unsigned length, unsigned chain, unsigned node) 843 unsigned length, unsigned chain, unsigned node)
772{ 844{
773 struct dwc3_trb *trb; 845 struct dwc3_trb *trb;
774 846 struct dwc3 *dwc = dep->dwc;
775 dwc3_trace(trace_dwc3_gadget, "%s: req %p dma %08llx length %d%s", 847 struct usb_gadget *gadget = &dwc->gadget;
776 dep->name, req, (unsigned long long) dma, 848 enum usb_device_speed speed = gadget->speed;
777 length, chain ? " chain" : "");
778 849
779 trb = &dep->trb_pool[dep->trb_enqueue]; 850 trb = &dep->trb_pool[dep->trb_enqueue];
780 851
@@ -782,7 +853,6 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
782 dwc3_gadget_move_started_request(req); 853 dwc3_gadget_move_started_request(req);
783 req->trb = trb; 854 req->trb = trb;
784 req->trb_dma = dwc3_trb_dma_offset(dep, trb); 855 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
785 req->first_trb_index = dep->trb_enqueue;
786 dep->queued_requests++; 856 dep->queued_requests++;
787 } 857 }
788 858
@@ -798,10 +868,16 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
798 break; 868 break;
799 869
800 case USB_ENDPOINT_XFER_ISOC: 870 case USB_ENDPOINT_XFER_ISOC:
801 if (!node) 871 if (!node) {
802 trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST; 872 trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
803 else 873
874 if (speed == USB_SPEED_HIGH) {
875 struct usb_ep *ep = &dep->endpoint;
876 trb->size |= DWC3_TRB_SIZE_PCM1(ep->mult - 1);
877 }
878 } else {
804 trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS; 879 trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS;
880 }
805 881
806 /* always enable Interrupt on Missed ISOC */ 882 /* always enable Interrupt on Missed ISOC */
807 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI; 883 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
@@ -816,15 +892,21 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
816 * This is only possible with faulty memory because we 892 * This is only possible with faulty memory because we
817 * checked it already :) 893 * checked it already :)
818 */ 894 */
819 BUG(); 895 dev_WARN(dwc->dev, "Unknown endpoint type %d\n",
896 usb_endpoint_type(dep->endpoint.desc));
820 } 897 }
821 898
822 /* always enable Continue on Short Packet */ 899 /* always enable Continue on Short Packet */
823 trb->ctrl |= DWC3_TRB_CTRL_CSP; 900 if (usb_endpoint_dir_out(dep->endpoint.desc)) {
901 trb->ctrl |= DWC3_TRB_CTRL_CSP;
902
903 if (req->request.short_not_ok)
904 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
905 }
824 906
825 if ((!req->request.no_interrupt && !chain) || 907 if ((!req->request.no_interrupt && !chain) ||
826 (dwc3_calc_trbs_left(dep) == 0)) 908 (dwc3_calc_trbs_left(dep) == 0))
827 trb->ctrl |= DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI; 909 trb->ctrl |= DWC3_TRB_CTRL_IOC;
828 910
829 if (chain) 911 if (chain)
830 trb->ctrl |= DWC3_TRB_CTRL_CHN; 912 trb->ctrl |= DWC3_TRB_CTRL_CHN;
@@ -859,6 +941,7 @@ static struct dwc3_trb *dwc3_ep_prev_trb(struct dwc3_ep *dep, u8 index)
859static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep) 941static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep)
860{ 942{
861 struct dwc3_trb *tmp; 943 struct dwc3_trb *tmp;
944 struct dwc3 *dwc = dep->dwc;
862 u8 trbs_left; 945 u8 trbs_left;
863 946
864 /* 947 /*
@@ -870,7 +953,8 @@ static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep)
870 */ 953 */
871 if (dep->trb_enqueue == dep->trb_dequeue) { 954 if (dep->trb_enqueue == dep->trb_dequeue) {
872 tmp = dwc3_ep_prev_trb(dep, dep->trb_enqueue); 955 tmp = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
873 if (tmp->ctrl & DWC3_TRB_CTRL_HWO) 956 if (dev_WARN_ONCE(dwc->dev, tmp->ctrl & DWC3_TRB_CTRL_HWO,
957 "%s No TRBS left\n", dep->name))
874 return 0; 958 return 0;
875 959
876 return DWC3_TRB_NUM - 1; 960 return DWC3_TRB_NUM - 1;
@@ -941,6 +1025,24 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep)
941 if (!dwc3_calc_trbs_left(dep)) 1025 if (!dwc3_calc_trbs_left(dep))
942 return; 1026 return;
943 1027
1028 /*
1029 * We can get in a situation where there's a request in the started list
1030 * but there weren't enough TRBs to fully kick it in the first time
1031 * around, so it has been waiting for more TRBs to be freed up.
1032 *
1033 * In that case, we should check if we have a request with pending_sgs
1034 * in the started list and prepare TRBs for that request first,
1035 * otherwise we will prepare TRBs completely out of order and that will
1036 * break things.
1037 */
1038 list_for_each_entry(req, &dep->started_list, list) {
1039 if (req->num_pending_sgs > 0)
1040 dwc3_prepare_one_trb_sg(dep, req);
1041
1042 if (!dwc3_calc_trbs_left(dep))
1043 return;
1044 }
1045
944 list_for_each_entry_safe(req, n, &dep->pending_list, list) { 1046 list_for_each_entry_safe(req, n, &dep->pending_list, list) {
945 if (req->num_pending_sgs > 0) 1047 if (req->num_pending_sgs > 0)
946 dwc3_prepare_one_trb_sg(dep, req); 1048 dwc3_prepare_one_trb_sg(dep, req);
@@ -956,7 +1058,6 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param)
956{ 1058{
957 struct dwc3_gadget_ep_cmd_params params; 1059 struct dwc3_gadget_ep_cmd_params params;
958 struct dwc3_request *req; 1060 struct dwc3_request *req;
959 struct dwc3 *dwc = dep->dwc;
960 int starting; 1061 int starting;
961 int ret; 1062 int ret;
962 u32 cmd; 1063 u32 cmd;
@@ -989,9 +1090,10 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param)
989 * here and stop, unmap, free and del each of the linked 1090 * here and stop, unmap, free and del each of the linked
990 * requests instead of what we do now. 1091 * requests instead of what we do now.
991 */ 1092 */
992 usb_gadget_unmap_request(&dwc->gadget, &req->request, 1093 if (req->trb)
993 req->direction); 1094 memset(req->trb, 0, sizeof(struct dwc3_trb));
994 list_del(&req->list); 1095 dep->queued_requests--;
1096 dwc3_gadget_giveback(dep, req, ret);
995 return ret; 1097 return ret;
996 } 1098 }
997 1099
@@ -1005,14 +1107,21 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param)
1005 return 0; 1107 return 0;
1006} 1108}
1007 1109
1110static int __dwc3_gadget_get_frame(struct dwc3 *dwc)
1111{
1112 u32 reg;
1113
1114 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1115 return DWC3_DSTS_SOFFN(reg);
1116}
1117
1008static void __dwc3_gadget_start_isoc(struct dwc3 *dwc, 1118static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,
1009 struct dwc3_ep *dep, u32 cur_uf) 1119 struct dwc3_ep *dep, u32 cur_uf)
1010{ 1120{
1011 u32 uf; 1121 u32 uf;
1012 1122
1013 if (list_empty(&dep->pending_list)) { 1123 if (list_empty(&dep->pending_list)) {
1014 dwc3_trace(trace_dwc3_gadget, 1124 dev_info(dwc->dev, "%s: ran out of requests\n",
1015 "ISOC ep %s run out for requests",
1016 dep->name); 1125 dep->name);
1017 dep->flags |= DWC3_EP_PENDING_REQUEST; 1126 dep->flags |= DWC3_EP_PENDING_REQUEST;
1018 return; 1127 return;
@@ -1041,16 +1150,15 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1041 int ret; 1150 int ret;
1042 1151
1043 if (!dep->endpoint.desc) { 1152 if (!dep->endpoint.desc) {
1044 dwc3_trace(trace_dwc3_gadget, 1153 dev_err(dwc->dev, "%s: can't queue to disabled endpoint\n",
1045 "trying to queue request %p to disabled %s", 1154 dep->name);
1046 &req->request, dep->endpoint.name);
1047 return -ESHUTDOWN; 1155 return -ESHUTDOWN;
1048 } 1156 }
1049 1157
1050 if (WARN(req->dep != dep, "request %p belongs to '%s'\n", 1158 if (WARN(req->dep != dep, "request %p belongs to '%s'\n",
1051 &req->request, req->dep->name)) { 1159 &req->request, req->dep->name)) {
1052 dwc3_trace(trace_dwc3_gadget, "request %p belongs to '%s'", 1160 dev_err(dwc->dev, "%s: request %p belongs to '%s'\n",
1053 &req->request, req->dep->name); 1161 dep->name, &req->request, req->dep->name);
1054 return -EINVAL; 1162 return -EINVAL;
1055 } 1163 }
1056 1164
@@ -1063,8 +1171,8 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1063 1171
1064 trace_dwc3_ep_queue(req); 1172 trace_dwc3_ep_queue(req);
1065 1173
1066 ret = usb_gadget_map_request(&dwc->gadget, &req->request, 1174 ret = usb_gadget_map_request_by_dev(dwc->sysdev, &req->request,
1067 dep->direction); 1175 dep->direction);
1068 if (ret) 1176 if (ret)
1069 return ret; 1177 return ret;
1070 1178
@@ -1082,10 +1190,17 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1082 * errors which will force us issue EndTransfer command. 1190 * errors which will force us issue EndTransfer command.
1083 */ 1191 */
1084 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) { 1192 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1085 if ((dep->flags & DWC3_EP_PENDING_REQUEST) && 1193 if ((dep->flags & DWC3_EP_PENDING_REQUEST)) {
1086 list_empty(&dep->started_list)) { 1194 if (dep->flags & DWC3_EP_TRANSFER_STARTED) {
1087 dwc3_stop_active_transfer(dwc, dep->number, true); 1195 dwc3_stop_active_transfer(dwc, dep->number, true);
1088 dep->flags = DWC3_EP_ENABLED; 1196 dep->flags = DWC3_EP_ENABLED;
1197 } else {
1198 u32 cur_uf;
1199
1200 cur_uf = __dwc3_gadget_get_frame(dwc);
1201 __dwc3_gadget_start_isoc(dwc, dep, cur_uf);
1202 dep->flags &= ~DWC3_EP_PENDING_REQUEST;
1203 }
1089 } 1204 }
1090 return 0; 1205 return 0;
1091 } 1206 }
@@ -1094,10 +1209,6 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1094 return 0; 1209 return 0;
1095 1210
1096 ret = __dwc3_gadget_kick_transfer(dep, 0); 1211 ret = __dwc3_gadget_kick_transfer(dep, 0);
1097 if (ret && ret != -EBUSY)
1098 dwc3_trace(trace_dwc3_gadget,
1099 "%s: failed to kick transfers",
1100 dep->name);
1101 if (ret == -EBUSY) 1212 if (ret == -EBUSY)
1102 ret = 0; 1213 ret = 0;
1103 1214
@@ -1116,7 +1227,6 @@ static int __dwc3_gadget_ep_queue_zlp(struct dwc3 *dwc, struct dwc3_ep *dep)
1116 struct usb_request *request; 1227 struct usb_request *request;
1117 struct usb_ep *ep = &dep->endpoint; 1228 struct usb_ep *ep = &dep->endpoint;
1118 1229
1119 dwc3_trace(trace_dwc3_gadget, "queueing ZLP");
1120 request = dwc3_gadget_ep_alloc_request(ep, GFP_ATOMIC); 1230 request = dwc3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
1121 if (!request) 1231 if (!request)
1122 return -ENOMEM; 1232 return -ENOMEM;
@@ -1235,9 +1345,6 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)
1235 1345
1236 if (!protocol && ((dep->direction && transfer_in_flight) || 1346 if (!protocol && ((dep->direction && transfer_in_flight) ||
1237 (!dep->direction && started))) { 1347 (!dep->direction && started))) {
1238 dwc3_trace(trace_dwc3_gadget,
1239 "%s: pending request, cannot halt",
1240 dep->name);
1241 return -EAGAIN; 1348 return -EAGAIN;
1242 } 1349 }
1243 1350
@@ -1331,10 +1438,8 @@ static const struct usb_ep_ops dwc3_gadget_ep_ops = {
1331static int dwc3_gadget_get_frame(struct usb_gadget *g) 1438static int dwc3_gadget_get_frame(struct usb_gadget *g)
1332{ 1439{
1333 struct dwc3 *dwc = gadget_to_dwc(g); 1440 struct dwc3 *dwc = gadget_to_dwc(g);
1334 u32 reg;
1335 1441
1336 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 1442 return __dwc3_gadget_get_frame(dwc);
1337 return DWC3_DSTS_SOFFN(reg);
1338} 1443}
1339 1444
1340static int __dwc3_gadget_wakeup(struct dwc3 *dwc) 1445static int __dwc3_gadget_wakeup(struct dwc3 *dwc)
@@ -1357,10 +1462,8 @@ static int __dwc3_gadget_wakeup(struct dwc3 *dwc)
1357 1462
1358 speed = reg & DWC3_DSTS_CONNECTSPD; 1463 speed = reg & DWC3_DSTS_CONNECTSPD;
1359 if ((speed == DWC3_DSTS_SUPERSPEED) || 1464 if ((speed == DWC3_DSTS_SUPERSPEED) ||
1360 (speed == DWC3_DSTS_SUPERSPEED_PLUS)) { 1465 (speed == DWC3_DSTS_SUPERSPEED_PLUS))
1361 dwc3_trace(trace_dwc3_gadget, "no wakeup on SuperSpeed");
1362 return 0; 1466 return 0;
1363 }
1364 1467
1365 link_state = DWC3_DSTS_USBLNKST(reg); 1468 link_state = DWC3_DSTS_USBLNKST(reg);
1366 1469
@@ -1369,9 +1472,6 @@ static int __dwc3_gadget_wakeup(struct dwc3 *dwc)
1369 case DWC3_LINK_STATE_U3: /* in HS, means SUSPEND */ 1472 case DWC3_LINK_STATE_U3: /* in HS, means SUSPEND */
1370 break; 1473 break;
1371 default: 1474 default:
1372 dwc3_trace(trace_dwc3_gadget,
1373 "can't wakeup from '%s'",
1374 dwc3_gadget_link_string(link_state));
1375 return -EINVAL; 1475 return -EINVAL;
1376 } 1476 }
1377 1477
@@ -1476,11 +1576,6 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
1476 if (!timeout) 1576 if (!timeout)
1477 return -ETIMEDOUT; 1577 return -ETIMEDOUT;
1478 1578
1479 dwc3_trace(trace_dwc3_gadget, "gadget %s data soft-%s",
1480 dwc->gadget_driver
1481 ? dwc->gadget_driver->function : "no-function",
1482 is_on ? "connect" : "disconnect");
1483
1484 return 0; 1579 return 0;
1485} 1580}
1486 1581
@@ -1492,6 +1587,21 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
1492 1587
1493 is_on = !!is_on; 1588 is_on = !!is_on;
1494 1589
1590 /*
1591 * Per databook, when we want to stop the gadget, if a control transfer
1592 * is still in process, complete it and get the core into setup phase.
1593 */
1594 if (!is_on && dwc->ep0state != EP0_SETUP_PHASE) {
1595 reinit_completion(&dwc->ep0_in_setup);
1596
1597 ret = wait_for_completion_timeout(&dwc->ep0_in_setup,
1598 msecs_to_jiffies(DWC3_PULL_UP_TIMEOUT));
1599 if (ret == 0) {
1600 dev_err(dwc->dev, "timed out waiting for SETUP phase\n");
1601 return -ETIMEDOUT;
1602 }
1603 }
1604
1495 spin_lock_irqsave(&dwc->lock, flags); 1605 spin_lock_irqsave(&dwc->lock, flags);
1496 ret = dwc3_gadget_run_stop(dwc, is_on, false); 1606 ret = dwc3_gadget_run_stop(dwc, is_on, false);
1497 spin_unlock_irqrestore(&dwc->lock, flags); 1607 spin_unlock_irqrestore(&dwc->lock, flags);
@@ -1509,11 +1619,13 @@ static void dwc3_gadget_enable_irq(struct dwc3 *dwc)
1509 DWC3_DEVTEN_CMDCMPLTEN | 1619 DWC3_DEVTEN_CMDCMPLTEN |
1510 DWC3_DEVTEN_ERRTICERREN | 1620 DWC3_DEVTEN_ERRTICERREN |
1511 DWC3_DEVTEN_WKUPEVTEN | 1621 DWC3_DEVTEN_WKUPEVTEN |
1512 DWC3_DEVTEN_ULSTCNGEN |
1513 DWC3_DEVTEN_CONNECTDONEEN | 1622 DWC3_DEVTEN_CONNECTDONEEN |
1514 DWC3_DEVTEN_USBRSTEN | 1623 DWC3_DEVTEN_USBRSTEN |
1515 DWC3_DEVTEN_DISCONNEVTEN); 1624 DWC3_DEVTEN_DISCONNEVTEN);
1516 1625
1626 if (dwc->revision < DWC3_REVISION_250A)
1627 reg |= DWC3_DEVTEN_ULSTCNGEN;
1628
1517 dwc3_writel(dwc->regs, DWC3_DEVTEN, reg); 1629 dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
1518} 1630}
1519 1631
@@ -1573,6 +1685,17 @@ static int __dwc3_gadget_start(struct dwc3 *dwc)
1573 int ret = 0; 1685 int ret = 0;
1574 u32 reg; 1686 u32 reg;
1575 1687
1688 /*
1689 * Use IMOD if enabled via dwc->imod_interval. Otherwise, if
1690 * the core supports IMOD, disable it.
1691 */
1692 if (dwc->imod_interval) {
1693 dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), dwc->imod_interval);
1694 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), DWC3_GEVNTCOUNT_EHB);
1695 } else if (dwc3_has_imod(dwc)) {
1696 dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), 0);
1697 }
1698
1576 reg = dwc3_readl(dwc->regs, DWC3_DCFG); 1699 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1577 reg &= ~(DWC3_DCFG_SPEED_MASK); 1700 reg &= ~(DWC3_DCFG_SPEED_MASK);
1578 1701
@@ -1633,16 +1756,14 @@ static int __dwc3_gadget_start(struct dwc3 *dwc)
1633 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); 1756 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1634 1757
1635 dep = dwc->eps[0]; 1758 dep = dwc->eps[0];
1636 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false, 1759 ret = __dwc3_gadget_ep_enable(dep, false, false);
1637 false);
1638 if (ret) { 1760 if (ret) {
1639 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1761 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1640 goto err0; 1762 goto err0;
1641 } 1763 }
1642 1764
1643 dep = dwc->eps[1]; 1765 dep = dwc->eps[1];
1644 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false, 1766 ret = __dwc3_gadget_ep_enable(dep, false, false);
1645 false);
1646 if (ret) { 1767 if (ret) {
1647 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 1768 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1648 goto err1; 1769 goto err1;
@@ -1708,9 +1829,6 @@ err0:
1708 1829
1709static void __dwc3_gadget_stop(struct dwc3 *dwc) 1830static void __dwc3_gadget_stop(struct dwc3 *dwc)
1710{ 1831{
1711 if (pm_runtime_suspended(dwc->dev))
1712 return;
1713
1714 dwc3_gadget_disable_irq(dwc); 1832 dwc3_gadget_disable_irq(dwc);
1715 __dwc3_gadget_ep_disable(dwc->eps[0]); 1833 __dwc3_gadget_ep_disable(dwc->eps[0]);
1716 __dwc3_gadget_ep_disable(dwc->eps[1]); 1834 __dwc3_gadget_ep_disable(dwc->eps[1]);
@@ -1720,9 +1838,30 @@ static int dwc3_gadget_stop(struct usb_gadget *g)
1720{ 1838{
1721 struct dwc3 *dwc = gadget_to_dwc(g); 1839 struct dwc3 *dwc = gadget_to_dwc(g);
1722 unsigned long flags; 1840 unsigned long flags;
1841 int epnum;
1723 1842
1724 spin_lock_irqsave(&dwc->lock, flags); 1843 spin_lock_irqsave(&dwc->lock, flags);
1844
1845 if (pm_runtime_suspended(dwc->dev))
1846 goto out;
1847
1725 __dwc3_gadget_stop(dwc); 1848 __dwc3_gadget_stop(dwc);
1849
1850 for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1851 struct dwc3_ep *dep = dwc->eps[epnum];
1852
1853 if (!dep)
1854 continue;
1855
1856 if (!(dep->flags & DWC3_EP_END_TRANSFER_PENDING))
1857 continue;
1858
1859 wait_event_lock_irq(dep->wait_end_transfer,
1860 !(dep->flags & DWC3_EP_END_TRANSFER_PENDING),
1861 dwc->lock);
1862 }
1863
1864out:
1726 dwc->gadget_driver = NULL; 1865 dwc->gadget_driver = NULL;
1727 spin_unlock_irqrestore(&dwc->lock, flags); 1866 spin_unlock_irqrestore(&dwc->lock, flags);
1728 1867
@@ -1765,9 +1904,13 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
1765 (epnum & 1) ? "in" : "out"); 1904 (epnum & 1) ? "in" : "out");
1766 1905
1767 dep->endpoint.name = dep->name; 1906 dep->endpoint.name = dep->name;
1768 spin_lock_init(&dep->lock);
1769 1907
1770 dwc3_trace(trace_dwc3_gadget, "initializing %s", dep->name); 1908 if (!(dep->number > 1)) {
1909 dep->endpoint.desc = &dwc3_gadget_ep0_desc;
1910 dep->endpoint.comp_desc = NULL;
1911 }
1912
1913 spin_lock_init(&dep->lock);
1771 1914
1772 if (epnum == 0 || epnum == 1) { 1915 if (epnum == 0 || epnum == 1) {
1773 usb_ep_set_maxpacket_limit(&dep->endpoint, 512); 1916 usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
@@ -1815,15 +1958,13 @@ static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1815 1958
1816 ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0); 1959 ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
1817 if (ret < 0) { 1960 if (ret < 0) {
1818 dwc3_trace(trace_dwc3_gadget, 1961 dev_err(dwc->dev, "failed to initialize OUT endpoints\n");
1819 "failed to allocate OUT endpoints");
1820 return ret; 1962 return ret;
1821 } 1963 }
1822 1964
1823 ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1); 1965 ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
1824 if (ret < 0) { 1966 if (ret < 0) {
1825 dwc3_trace(trace_dwc3_gadget, 1967 dev_err(dwc->dev, "failed to initialize IN endpoints\n");
1826 "failed to allocate IN endpoints");
1827 return ret; 1968 return ret;
1828 } 1969 }
1829 1970
@@ -1892,15 +2033,12 @@ static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
1892 return 1; 2033 return 1;
1893 2034
1894 count = trb->size & DWC3_TRB_SIZE_MASK; 2035 count = trb->size & DWC3_TRB_SIZE_MASK;
1895 req->request.actual += count; 2036 req->remaining += count;
1896 2037
1897 if (dep->direction) { 2038 if (dep->direction) {
1898 if (count) { 2039 if (count) {
1899 trb_status = DWC3_TRB_SIZE_TRBSTS(trb->size); 2040 trb_status = DWC3_TRB_SIZE_TRBSTS(trb->size);
1900 if (trb_status == DWC3_TRBSTS_MISSED_ISOC) { 2041 if (trb_status == DWC3_TRBSTS_MISSED_ISOC) {
1901 dwc3_trace(trace_dwc3_gadget,
1902 "%s: incomplete IN transfer",
1903 dep->name);
1904 /* 2042 /*
1905 * If missed isoc occurred and there is 2043 * If missed isoc occurred and there is
1906 * no request queued then issue END 2044 * no request queued then issue END
@@ -1946,11 +2084,10 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1946 struct dwc3_request *req, *n; 2084 struct dwc3_request *req, *n;
1947 struct dwc3_trb *trb; 2085 struct dwc3_trb *trb;
1948 bool ioc = false; 2086 bool ioc = false;
1949 int ret; 2087 int ret = 0;
1950 2088
1951 list_for_each_entry_safe(req, n, &dep->started_list, list) { 2089 list_for_each_entry_safe(req, n, &dep->started_list, list) {
1952 unsigned length; 2090 unsigned length;
1953 unsigned actual;
1954 int chain; 2091 int chain;
1955 2092
1956 length = req->request.length; 2093 length = req->request.length;
@@ -1964,6 +2101,9 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1964 for_each_sg(sg, s, pending, i) { 2101 for_each_sg(sg, s, pending, i) {
1965 trb = &dep->trb_pool[dep->trb_dequeue]; 2102 trb = &dep->trb_pool[dep->trb_dequeue];
1966 2103
2104 if (trb->ctrl & DWC3_TRB_CTRL_HWO)
2105 break;
2106
1967 req->sg = sg_next(s); 2107 req->sg = sg_next(s);
1968 req->num_pending_sgs--; 2108 req->num_pending_sgs--;
1969 2109
@@ -1978,17 +2118,9 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1978 event, status, chain); 2118 event, status, chain);
1979 } 2119 }
1980 2120
1981 /* 2121 req->request.actual = length - req->remaining;
1982 * We assume here we will always receive the entire data block
1983 * which we should receive. Meaning, if we program RX to
1984 * receive 4K but we receive only 2K, we assume that's all we
1985 * should receive and we simply bounce the request back to the
1986 * gadget driver for further processing.
1987 */
1988 actual = length - req->request.actual;
1989 req->request.actual = actual;
1990 2122
1991 if (ret && chain && (actual < length) && req->num_pending_sgs) 2123 if ((req->request.actual < length) && req->num_pending_sgs)
1992 return __dwc3_gadget_kick_transfer(dep, 0); 2124 return __dwc3_gadget_kick_transfer(dep, 0);
1993 2125
1994 dwc3_gadget_giveback(dep, req, status); 2126 dwc3_gadget_giveback(dep, req, status);
@@ -2096,10 +2228,12 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2096{ 2228{
2097 struct dwc3_ep *dep; 2229 struct dwc3_ep *dep;
2098 u8 epnum = event->endpoint_number; 2230 u8 epnum = event->endpoint_number;
2231 u8 cmd;
2099 2232
2100 dep = dwc->eps[epnum]; 2233 dep = dwc->eps[epnum];
2101 2234
2102 if (!(dep->flags & DWC3_EP_ENABLED)) 2235 if (!(dep->flags & DWC3_EP_ENABLED) &&
2236 !(dep->flags & DWC3_EP_END_TRANSFER_PENDING))
2103 return; 2237 return;
2104 2238
2105 if (epnum == 0 || epnum == 1) { 2239 if (epnum == 0 || epnum == 1) {
@@ -2112,9 +2246,7 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2112 dep->resource_index = 0; 2246 dep->resource_index = 0;
2113 2247
2114 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) { 2248 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2115 dwc3_trace(trace_dwc3_gadget, 2249 dev_err(dwc->dev, "XferComplete for Isochronous endpoint\n");
2116 "%s is an Isochronous endpoint",
2117 dep->name);
2118 return; 2250 return;
2119 } 2251 }
2120 2252
@@ -2127,22 +2259,11 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2127 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) { 2259 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2128 dwc3_gadget_start_isoc(dwc, dep, event); 2260 dwc3_gadget_start_isoc(dwc, dep, event);
2129 } else { 2261 } else {
2130 int active;
2131 int ret; 2262 int ret;
2132 2263
2133 active = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE;
2134
2135 dwc3_trace(trace_dwc3_gadget, "%s: reason %s",
2136 dep->name, active ? "Transfer Active"
2137 : "Transfer Not Active");
2138
2139 ret = __dwc3_gadget_kick_transfer(dep, 0); 2264 ret = __dwc3_gadget_kick_transfer(dep, 0);
2140 if (!ret || ret == -EBUSY) 2265 if (!ret || ret == -EBUSY)
2141 return; 2266 return;
2142
2143 dwc3_trace(trace_dwc3_gadget,
2144 "%s: failed to kick transfers",
2145 dep->name);
2146 } 2267 }
2147 2268
2148 break; 2269 break;
@@ -2152,26 +2273,16 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2152 dep->name); 2273 dep->name);
2153 return; 2274 return;
2154 } 2275 }
2276 break;
2277 case DWC3_DEPEVT_EPCMDCMPLT:
2278 cmd = DEPEVT_PARAMETER_CMD(event->parameters);
2155 2279
2156 switch (event->status) { 2280 if (cmd == DWC3_DEPCMD_ENDTRANSFER) {
2157 case DEPEVT_STREAMEVT_FOUND: 2281 dep->flags &= ~DWC3_EP_END_TRANSFER_PENDING;
2158 dwc3_trace(trace_dwc3_gadget, 2282 wake_up(&dep->wait_end_transfer);
2159 "Stream %d found and started",
2160 event->parameters);
2161
2162 break;
2163 case DEPEVT_STREAMEVT_NOTFOUND:
2164 /* FALLTHROUGH */
2165 default:
2166 dwc3_trace(trace_dwc3_gadget,
2167 "unable to find suitable stream");
2168 } 2283 }
2169 break; 2284 break;
2170 case DWC3_DEPEVT_RXTXFIFOEVT: 2285 case DWC3_DEPEVT_RXTXFIFOEVT:
2171 dwc3_trace(trace_dwc3_gadget, "%s FIFO Overrun", dep->name);
2172 break;
2173 case DWC3_DEPEVT_EPCMDCMPLT:
2174 dwc3_trace(trace_dwc3_gadget, "Endpoint Command Complete");
2175 break; 2286 break;
2176 } 2287 }
2177} 2288}
@@ -2224,7 +2335,8 @@ static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
2224 2335
2225 dep = dwc->eps[epnum]; 2336 dep = dwc->eps[epnum];
2226 2337
2227 if (!dep->resource_index) 2338 if ((dep->flags & DWC3_EP_END_TRANSFER_PENDING) ||
2339 !dep->resource_index)
2228 return; 2340 return;
2229 2341
2230 /* 2342 /*
@@ -2268,25 +2380,9 @@ static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
2268 dep->resource_index = 0; 2380 dep->resource_index = 0;
2269 dep->flags &= ~DWC3_EP_BUSY; 2381 dep->flags &= ~DWC3_EP_BUSY;
2270 2382
2271 if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) 2383 if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) {
2384 dep->flags |= DWC3_EP_END_TRANSFER_PENDING;
2272 udelay(100); 2385 udelay(100);
2273}
2274
2275static void dwc3_stop_active_transfers(struct dwc3 *dwc)
2276{
2277 u32 epnum;
2278
2279 for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2280 struct dwc3_ep *dep;
2281
2282 dep = dwc->eps[epnum];
2283 if (!dep)
2284 continue;
2285
2286 if (!(dep->flags & DWC3_EP_ENABLED))
2287 continue;
2288
2289 dwc3_remove_requests(dwc, dep);
2290 } 2386 }
2291} 2387}
2292 2388
@@ -2375,8 +2471,6 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
2375 reg &= ~DWC3_DCTL_TSTCTRL_MASK; 2471 reg &= ~DWC3_DCTL_TSTCTRL_MASK;
2376 dwc3_writel(dwc->regs, DWC3_DCTL, reg); 2472 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2377 dwc->test_mode = false; 2473 dwc->test_mode = false;
2378
2379 dwc3_stop_active_transfers(dwc);
2380 dwc3_clear_stall_all_ep(dwc); 2474 dwc3_clear_stall_all_ep(dwc);
2381 2475
2382 /* Reset device address to zero */ 2476 /* Reset device address to zero */
@@ -2385,32 +2479,6 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
2385 dwc3_writel(dwc->regs, DWC3_DCFG, reg); 2479 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2386} 2480}
2387 2481
2388static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
2389{
2390 u32 reg;
2391 u32 usb30_clock = DWC3_GCTL_CLK_BUS;
2392
2393 /*
2394 * We change the clock only at SS but I dunno why I would want to do
2395 * this. Maybe it becomes part of the power saving plan.
2396 */
2397
2398 if ((speed != DWC3_DSTS_SUPERSPEED) &&
2399 (speed != DWC3_DSTS_SUPERSPEED_PLUS))
2400 return;
2401
2402 /*
2403 * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
2404 * each time on Connect Done.
2405 */
2406 if (!usb30_clock)
2407 return;
2408
2409 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
2410 reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
2411 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
2412}
2413
2414static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) 2482static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2415{ 2483{
2416 struct dwc3_ep *dep; 2484 struct dwc3_ep *dep;
@@ -2422,7 +2490,14 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2422 speed = reg & DWC3_DSTS_CONNECTSPD; 2490 speed = reg & DWC3_DSTS_CONNECTSPD;
2423 dwc->speed = speed; 2491 dwc->speed = speed;
2424 2492
2425 dwc3_update_ram_clk_sel(dwc, speed); 2493 /*
2494 * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
2495 * each time on Connect Done.
2496 *
2497 * Currently we always use the reset value. If any platform
2498 * wants to set this to a different value, we need to add a
2499 * setting and update GCTL.RAMCLKSEL here.
2500 */
2426 2501
2427 switch (speed) { 2502 switch (speed) {
2428 case DWC3_DSTS_SUPERSPEED_PLUS: 2503 case DWC3_DSTS_SUPERSPEED_PLUS:
@@ -2504,16 +2579,14 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2504 } 2579 }
2505 2580
2506 dep = dwc->eps[0]; 2581 dep = dwc->eps[0];
2507 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true, 2582 ret = __dwc3_gadget_ep_enable(dep, true, false);
2508 false);
2509 if (ret) { 2583 if (ret) {
2510 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 2584 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2511 return; 2585 return;
2512 } 2586 }
2513 2587
2514 dep = dwc->eps[1]; 2588 dep = dwc->eps[1];
2515 ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true, 2589 ret = __dwc3_gadget_ep_enable(dep, true, false);
2516 false);
2517 if (ret) { 2590 if (ret) {
2518 dev_err(dwc->dev, "failed to enable %s\n", dep->name); 2591 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2519 return; 2592 return;
@@ -2570,8 +2643,6 @@ static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
2570 (pwropt != DWC3_GHWPARAMS1_EN_PWROPT_HIB)) { 2643 (pwropt != DWC3_GHWPARAMS1_EN_PWROPT_HIB)) {
2571 if ((dwc->link_state == DWC3_LINK_STATE_U3) && 2644 if ((dwc->link_state == DWC3_LINK_STATE_U3) &&
2572 (next == DWC3_LINK_STATE_RESUME)) { 2645 (next == DWC3_LINK_STATE_RESUME)) {
2573 dwc3_trace(trace_dwc3_gadget,
2574 "ignoring transition U3 -> Resume");
2575 return; 2646 return;
2576 } 2647 }
2577 } 2648 }
@@ -2705,11 +2776,7 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc,
2705 break; 2776 break;
2706 case DWC3_DEVICE_EVENT_EOPF: 2777 case DWC3_DEVICE_EVENT_EOPF:
2707 /* It changed to be suspend event for version 2.30a and above */ 2778 /* It changed to be suspend event for version 2.30a and above */
2708 if (dwc->revision < DWC3_REVISION_230A) { 2779 if (dwc->revision >= DWC3_REVISION_230A) {
2709 dwc3_trace(trace_dwc3_gadget, "End of Periodic Frame");
2710 } else {
2711 dwc3_trace(trace_dwc3_gadget, "U3/L1-L2 Suspend Event");
2712
2713 /* 2780 /*
2714 * Ignore suspend event until the gadget enters into 2781 * Ignore suspend event until the gadget enters into
2715 * USB_STATE_CONFIGURED state. 2782 * USB_STATE_CONFIGURED state.
@@ -2720,16 +2787,9 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc,
2720 } 2787 }
2721 break; 2788 break;
2722 case DWC3_DEVICE_EVENT_SOF: 2789 case DWC3_DEVICE_EVENT_SOF:
2723 dwc3_trace(trace_dwc3_gadget, "Start of Periodic Frame");
2724 break;
2725 case DWC3_DEVICE_EVENT_ERRATIC_ERROR: 2790 case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
2726 dwc3_trace(trace_dwc3_gadget, "Erratic Error");
2727 break;
2728 case DWC3_DEVICE_EVENT_CMD_CMPL: 2791 case DWC3_DEVICE_EVENT_CMD_CMPL:
2729 dwc3_trace(trace_dwc3_gadget, "Command Complete");
2730 break;
2731 case DWC3_DEVICE_EVENT_OVERFLOW: 2792 case DWC3_DEVICE_EVENT_OVERFLOW:
2732 dwc3_trace(trace_dwc3_gadget, "Overflow");
2733 break; 2793 break;
2734 default: 2794 default:
2735 dev_WARN(dwc->dev, "UNKNOWN IRQ %d\n", event->type); 2795 dev_WARN(dwc->dev, "UNKNOWN IRQ %d\n", event->type);
@@ -2739,7 +2799,7 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc,
2739static void dwc3_process_event_entry(struct dwc3 *dwc, 2799static void dwc3_process_event_entry(struct dwc3 *dwc,
2740 const union dwc3_event *event) 2800 const union dwc3_event *event)
2741{ 2801{
2742 trace_dwc3_event(event->raw); 2802 trace_dwc3_event(event->raw, dwc);
2743 2803
2744 /* Endpoint IRQ, handle it and return early */ 2804 /* Endpoint IRQ, handle it and return early */
2745 if (event->type.is_devspec == 0) { 2805 if (event->type.is_devspec == 0) {
@@ -2772,7 +2832,7 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
2772 while (left > 0) { 2832 while (left > 0) {
2773 union dwc3_event event; 2833 union dwc3_event event;
2774 2834
2775 event.raw = *(u32 *) (evt->buf + evt->lpos); 2835 event.raw = *(u32 *) (evt->cache + evt->lpos);
2776 2836
2777 dwc3_process_event_entry(dwc, &event); 2837 dwc3_process_event_entry(dwc, &event);
2778 2838
@@ -2785,10 +2845,8 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
2785 * boundary so I worry about that once we try to handle 2845 * boundary so I worry about that once we try to handle
2786 * that. 2846 * that.
2787 */ 2847 */
2788 evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE; 2848 evt->lpos = (evt->lpos + 4) % evt->length;
2789 left -= 4; 2849 left -= 4;
2790
2791 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 4);
2792 } 2850 }
2793 2851
2794 evt->count = 0; 2852 evt->count = 0;
@@ -2800,6 +2858,11 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
2800 reg &= ~DWC3_GEVNTSIZ_INTMASK; 2858 reg &= ~DWC3_GEVNTSIZ_INTMASK;
2801 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg); 2859 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2802 2860
2861 if (dwc->imod_interval) {
2862 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), DWC3_GEVNTCOUNT_EHB);
2863 dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), dwc->imod_interval);
2864 }
2865
2803 return ret; 2866 return ret;
2804} 2867}
2805 2868
@@ -2820,6 +2883,7 @@ static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
2820static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt) 2883static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
2821{ 2884{
2822 struct dwc3 *dwc = evt->dwc; 2885 struct dwc3 *dwc = evt->dwc;
2886 u32 amount;
2823 u32 count; 2887 u32 count;
2824 u32 reg; 2888 u32 reg;
2825 2889
@@ -2843,6 +2907,14 @@ static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
2843 reg |= DWC3_GEVNTSIZ_INTMASK; 2907 reg |= DWC3_GEVNTSIZ_INTMASK;
2844 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg); 2908 dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2845 2909
2910 amount = min(count, evt->length - evt->lpos);
2911 memcpy(evt->cache + evt->lpos, evt->buf + evt->lpos, amount);
2912
2913 if (amount < count)
2914 memcpy(evt->cache, evt->buf, count - amount);
2915
2916 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), count);
2917
2846 return IRQ_WAKE_THREAD; 2918 return IRQ_WAKE_THREAD;
2847} 2919}
2848 2920
@@ -2853,6 +2925,39 @@ static irqreturn_t dwc3_interrupt(int irq, void *_evt)
2853 return dwc3_check_event_buf(evt); 2925 return dwc3_check_event_buf(evt);
2854} 2926}
2855 2927
2928static int dwc3_gadget_get_irq(struct dwc3 *dwc)
2929{
2930 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
2931 int irq;
2932
2933 irq = platform_get_irq_byname(dwc3_pdev, "peripheral");
2934 if (irq > 0)
2935 goto out;
2936
2937 if (irq == -EPROBE_DEFER)
2938 goto out;
2939
2940 irq = platform_get_irq_byname(dwc3_pdev, "dwc_usb3");
2941 if (irq > 0)
2942 goto out;
2943
2944 if (irq == -EPROBE_DEFER)
2945 goto out;
2946
2947 irq = platform_get_irq(dwc3_pdev, 0);
2948 if (irq > 0)
2949 goto out;
2950
2951 if (irq != -EPROBE_DEFER)
2952 dev_err(dwc->dev, "missing peripheral IRQ\n");
2953
2954 if (!irq)
2955 irq = -EINVAL;
2956
2957out:
2958 return irq;
2959}
2960
2856/** 2961/**
2857 * dwc3_gadget_init - Initializes gadget related registers 2962 * dwc3_gadget_init - Initializes gadget related registers
2858 * @dwc: pointer to our controller context structure 2963 * @dwc: pointer to our controller context structure
@@ -2861,35 +2966,18 @@ static irqreturn_t dwc3_interrupt(int irq, void *_evt)
2861 */ 2966 */
2862int dwc3_gadget_init(struct dwc3 *dwc) 2967int dwc3_gadget_init(struct dwc3 *dwc)
2863{ 2968{
2864 int ret, irq; 2969 int ret;
2865 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); 2970 int irq;
2866 2971
2867 irq = platform_get_irq_byname(dwc3_pdev, "peripheral"); 2972 irq = dwc3_gadget_get_irq(dwc);
2868 if (irq == -EPROBE_DEFER) 2973 if (irq < 0) {
2869 return irq; 2974 ret = irq;
2870 2975 goto err0;
2871 if (irq <= 0) {
2872 irq = platform_get_irq_byname(dwc3_pdev, "dwc_usb3");
2873 if (irq == -EPROBE_DEFER)
2874 return irq;
2875
2876 if (irq <= 0) {
2877 irq = platform_get_irq(dwc3_pdev, 0);
2878 if (irq <= 0) {
2879 if (irq != -EPROBE_DEFER) {
2880 dev_err(dwc->dev,
2881 "missing peripheral IRQ\n");
2882 }
2883 if (!irq)
2884 irq = -EINVAL;
2885 return irq;
2886 }
2887 }
2888 } 2976 }
2889 2977
2890 dwc->irq_gadget = irq; 2978 dwc->irq_gadget = irq;
2891 2979
2892 dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req), 2980 dwc->ctrl_req = dma_alloc_coherent(dwc->sysdev, sizeof(*dwc->ctrl_req),
2893 &dwc->ctrl_req_addr, GFP_KERNEL); 2981 &dwc->ctrl_req_addr, GFP_KERNEL);
2894 if (!dwc->ctrl_req) { 2982 if (!dwc->ctrl_req) {
2895 dev_err(dwc->dev, "failed to allocate ctrl request\n"); 2983 dev_err(dwc->dev, "failed to allocate ctrl request\n");
@@ -2897,8 +2985,9 @@ int dwc3_gadget_init(struct dwc3 *dwc)
2897 goto err0; 2985 goto err0;
2898 } 2986 }
2899 2987
2900 dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb) * 2, 2988 dwc->ep0_trb = dma_alloc_coherent(dwc->sysdev,
2901 &dwc->ep0_trb_addr, GFP_KERNEL); 2989 sizeof(*dwc->ep0_trb) * 2,
2990 &dwc->ep0_trb_addr, GFP_KERNEL);
2902 if (!dwc->ep0_trb) { 2991 if (!dwc->ep0_trb) {
2903 dev_err(dwc->dev, "failed to allocate ep0 trb\n"); 2992 dev_err(dwc->dev, "failed to allocate ep0 trb\n");
2904 ret = -ENOMEM; 2993 ret = -ENOMEM;
@@ -2911,7 +3000,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
2911 goto err2; 3000 goto err2;
2912 } 3001 }
2913 3002
2914 dwc->ep0_bounce = dma_alloc_coherent(dwc->dev, 3003 dwc->ep0_bounce = dma_alloc_coherent(dwc->sysdev,
2915 DWC3_EP0_BOUNCE_SIZE, &dwc->ep0_bounce_addr, 3004 DWC3_EP0_BOUNCE_SIZE, &dwc->ep0_bounce_addr,
2916 GFP_KERNEL); 3005 GFP_KERNEL);
2917 if (!dwc->ep0_bounce) { 3006 if (!dwc->ep0_bounce) {
@@ -2926,6 +3015,8 @@ int dwc3_gadget_init(struct dwc3 *dwc)
2926 goto err4; 3015 goto err4;
2927 } 3016 }
2928 3017
3018 init_completion(&dwc->ep0_in_setup);
3019
2929 dwc->gadget.ops = &dwc3_gadget_ops; 3020 dwc->gadget.ops = &dwc3_gadget_ops;
2930 dwc->gadget.speed = USB_SPEED_UNKNOWN; 3021 dwc->gadget.speed = USB_SPEED_UNKNOWN;
2931 dwc->gadget.sg_supported = true; 3022 dwc->gadget.sg_supported = true;
@@ -2949,8 +3040,7 @@ int dwc3_gadget_init(struct dwc3 *dwc)
2949 * composite.c that we are USB 2.0 + LPM ECN. 3040 * composite.c that we are USB 2.0 + LPM ECN.
2950 */ 3041 */
2951 if (dwc->revision < DWC3_REVISION_220A) 3042 if (dwc->revision < DWC3_REVISION_220A)
2952 dwc3_trace(trace_dwc3_gadget, 3043 dev_info(dwc->dev, "changing max_speed on rev %08x\n",
2953 "Changing max_speed on rev %08x",
2954 dwc->revision); 3044 dwc->revision);
2955 3045
2956 dwc->gadget.max_speed = dwc->maximum_speed; 3046 dwc->gadget.max_speed = dwc->maximum_speed;
@@ -2983,18 +3073,18 @@ err5:
2983 3073
2984err4: 3074err4:
2985 dwc3_gadget_free_endpoints(dwc); 3075 dwc3_gadget_free_endpoints(dwc);
2986 dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE, 3076 dma_free_coherent(dwc->sysdev, DWC3_EP0_BOUNCE_SIZE,
2987 dwc->ep0_bounce, dwc->ep0_bounce_addr); 3077 dwc->ep0_bounce, dwc->ep0_bounce_addr);
2988 3078
2989err3: 3079err3:
2990 kfree(dwc->setup_buf); 3080 kfree(dwc->setup_buf);
2991 3081
2992err2: 3082err2:
2993 dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb) * 2, 3083 dma_free_coherent(dwc->sysdev, sizeof(*dwc->ep0_trb) * 2,
2994 dwc->ep0_trb, dwc->ep0_trb_addr); 3084 dwc->ep0_trb, dwc->ep0_trb_addr);
2995 3085
2996err1: 3086err1:
2997 dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req), 3087 dma_free_coherent(dwc->sysdev, sizeof(*dwc->ctrl_req),
2998 dwc->ctrl_req, dwc->ctrl_req_addr); 3088 dwc->ctrl_req, dwc->ctrl_req_addr);
2999 3089
3000err0: 3090err0:
@@ -3009,16 +3099,16 @@ void dwc3_gadget_exit(struct dwc3 *dwc)
3009 3099
3010 dwc3_gadget_free_endpoints(dwc); 3100 dwc3_gadget_free_endpoints(dwc);
3011 3101
3012 dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE, 3102 dma_free_coherent(dwc->sysdev, DWC3_EP0_BOUNCE_SIZE,
3013 dwc->ep0_bounce, dwc->ep0_bounce_addr); 3103 dwc->ep0_bounce, dwc->ep0_bounce_addr);
3014 3104
3015 kfree(dwc->setup_buf); 3105 kfree(dwc->setup_buf);
3016 kfree(dwc->zlp_buf); 3106 kfree(dwc->zlp_buf);
3017 3107
3018 dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb) * 2, 3108 dma_free_coherent(dwc->sysdev, sizeof(*dwc->ep0_trb) * 2,
3019 dwc->ep0_trb, dwc->ep0_trb_addr); 3109 dwc->ep0_trb, dwc->ep0_trb_addr);
3020 3110
3021 dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req), 3111 dma_free_coherent(dwc->sysdev, sizeof(*dwc->ctrl_req),
3022 dwc->ctrl_req, dwc->ctrl_req_addr); 3112 dwc->ctrl_req, dwc->ctrl_req_addr);
3023} 3113}
3024 3114
diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
index e4a1d974a5ae..3129bcf74d7d 100644
--- a/drivers/usb/dwc3/gadget.h
+++ b/drivers/usb/dwc3/gadget.h
@@ -62,10 +62,7 @@ struct dwc3;
62 62
63static inline struct dwc3_request *next_request(struct list_head *list) 63static inline struct dwc3_request *next_request(struct list_head *list)
64{ 64{
65 if (list_empty(list)) 65 return list_first_entry_or_null(list, struct dwc3_request, list);
66 return NULL;
67
68 return list_first_entry(list, struct dwc3_request, list);
69} 66}
70 67
71static inline void dwc3_gadget_move_started_request(struct dwc3_request *req) 68static inline void dwc3_gadget_move_started_request(struct dwc3_request *req)
diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
index f6533c68fed1..487f0ff6ae25 100644
--- a/drivers/usb/dwc3/host.c
+++ b/drivers/usb/dwc3/host.c
@@ -19,6 +19,39 @@
19 19
20#include "core.h" 20#include "core.h"
21 21
22static int dwc3_host_get_irq(struct dwc3 *dwc)
23{
24 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
25 int irq;
26
27 irq = platform_get_irq_byname(dwc3_pdev, "host");
28 if (irq > 0)
29 goto out;
30
31 if (irq == -EPROBE_DEFER)
32 goto out;
33
34 irq = platform_get_irq_byname(dwc3_pdev, "dwc_usb3");
35 if (irq > 0)
36 goto out;
37
38 if (irq == -EPROBE_DEFER)
39 goto out;
40
41 irq = platform_get_irq(dwc3_pdev, 0);
42 if (irq > 0)
43 goto out;
44
45 if (irq != -EPROBE_DEFER)
46 dev_err(dwc->dev, "missing host IRQ\n");
47
48 if (!irq)
49 irq = -EINVAL;
50
51out:
52 return irq;
53}
54
22int dwc3_host_init(struct dwc3 *dwc) 55int dwc3_host_init(struct dwc3 *dwc)
23{ 56{
24 struct property_entry props[2]; 57 struct property_entry props[2];
@@ -27,39 +60,18 @@ int dwc3_host_init(struct dwc3 *dwc)
27 struct resource *res; 60 struct resource *res;
28 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); 61 struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
29 62
30 irq = platform_get_irq_byname(dwc3_pdev, "host"); 63 irq = dwc3_host_get_irq(dwc);
31 if (irq == -EPROBE_DEFER) 64 if (irq < 0)
32 return irq; 65 return irq;
33 66
34 if (irq <= 0) { 67 res = platform_get_resource_byname(dwc3_pdev, IORESOURCE_IRQ, "host");
35 irq = platform_get_irq_byname(dwc3_pdev, "dwc_usb3"); 68 if (!res)
36 if (irq == -EPROBE_DEFER)
37 return irq;
38
39 if (irq <= 0) {
40 irq = platform_get_irq(dwc3_pdev, 0);
41 if (irq <= 0) {
42 if (irq != -EPROBE_DEFER) {
43 dev_err(dwc->dev,
44 "missing host IRQ\n");
45 }
46 if (!irq)
47 irq = -EINVAL;
48 return irq;
49 } else {
50 res = platform_get_resource(dwc3_pdev,
51 IORESOURCE_IRQ, 0);
52 }
53 } else {
54 res = platform_get_resource_byname(dwc3_pdev,
55 IORESOURCE_IRQ,
56 "dwc_usb3");
57 }
58
59 } else {
60 res = platform_get_resource_byname(dwc3_pdev, IORESOURCE_IRQ, 69 res = platform_get_resource_byname(dwc3_pdev, IORESOURCE_IRQ,
61 "host"); 70 "dwc_usb3");
62 } 71 if (!res)
72 res = platform_get_resource(dwc3_pdev, IORESOURCE_IRQ, 0);
73 if (!res)
74 return -ENOMEM;
63 75
64 dwc->xhci_resources[1].start = irq; 76 dwc->xhci_resources[1].start = irq;
65 dwc->xhci_resources[1].end = irq; 77 dwc->xhci_resources[1].end = irq;
@@ -72,11 +84,7 @@ int dwc3_host_init(struct dwc3 *dwc)
72 return -ENOMEM; 84 return -ENOMEM;
73 } 85 }
74 86
75 dma_set_coherent_mask(&xhci->dev, dwc->dev->coherent_dma_mask);
76
77 xhci->dev.parent = dwc->dev; 87 xhci->dev.parent = dwc->dev;
78 xhci->dev.dma_mask = dwc->dev->dma_mask;
79 xhci->dev.dma_parms = dwc->dev->dma_parms;
80 88
81 dwc->xhci = xhci; 89 dwc->xhci = xhci;
82 90
@@ -99,9 +107,9 @@ int dwc3_host_init(struct dwc3 *dwc)
99 } 107 }
100 108
101 phy_create_lookup(dwc->usb2_generic_phy, "usb2-phy", 109 phy_create_lookup(dwc->usb2_generic_phy, "usb2-phy",
102 dev_name(&xhci->dev)); 110 dev_name(dwc->dev));
103 phy_create_lookup(dwc->usb3_generic_phy, "usb3-phy", 111 phy_create_lookup(dwc->usb3_generic_phy, "usb3-phy",
104 dev_name(&xhci->dev)); 112 dev_name(dwc->dev));
105 113
106 ret = platform_device_add(xhci); 114 ret = platform_device_add(xhci);
107 if (ret) { 115 if (ret) {
@@ -112,9 +120,9 @@ int dwc3_host_init(struct dwc3 *dwc)
112 return 0; 120 return 0;
113err2: 121err2:
114 phy_remove_lookup(dwc->usb2_generic_phy, "usb2-phy", 122 phy_remove_lookup(dwc->usb2_generic_phy, "usb2-phy",
115 dev_name(&xhci->dev)); 123 dev_name(dwc->dev));
116 phy_remove_lookup(dwc->usb3_generic_phy, "usb3-phy", 124 phy_remove_lookup(dwc->usb3_generic_phy, "usb3-phy",
117 dev_name(&xhci->dev)); 125 dev_name(dwc->dev));
118err1: 126err1:
119 platform_device_put(xhci); 127 platform_device_put(xhci);
120 return ret; 128 return ret;
@@ -123,8 +131,8 @@ err1:
123void dwc3_host_exit(struct dwc3 *dwc) 131void dwc3_host_exit(struct dwc3 *dwc)
124{ 132{
125 phy_remove_lookup(dwc->usb2_generic_phy, "usb2-phy", 133 phy_remove_lookup(dwc->usb2_generic_phy, "usb2-phy",
126 dev_name(&dwc->xhci->dev)); 134 dev_name(dwc->dev));
127 phy_remove_lookup(dwc->usb3_generic_phy, "usb3-phy", 135 phy_remove_lookup(dwc->usb3_generic_phy, "usb3-phy",
128 dev_name(&dwc->xhci->dev)); 136 dev_name(dwc->dev));
129 platform_device_unregister(dwc->xhci); 137 platform_device_unregister(dwc->xhci);
130} 138}
diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
index a06f9a8fecc7..c69b06696824 100644
--- a/drivers/usb/dwc3/io.h
+++ b/drivers/usb/dwc3/io.h
@@ -40,8 +40,7 @@ static inline u32 dwc3_readl(void __iomem *base, u32 offset)
40 * documentation, so we revert it back to the proper addresses, the 40 * documentation, so we revert it back to the proper addresses, the
41 * same way they are described on SNPS documentation 41 * same way they are described on SNPS documentation
42 */ 42 */
43 dwc3_trace(trace_dwc3_readl, "addr %p value %08x", 43 trace_dwc3_readl(base - DWC3_GLOBALS_REGS_START, offset, value);
44 base - DWC3_GLOBALS_REGS_START + offset, value);
45 44
46 return value; 45 return value;
47} 46}
@@ -60,8 +59,7 @@ static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
60 * documentation, so we revert it back to the proper addresses, the 59 * documentation, so we revert it back to the proper addresses, the
61 * same way they are described on SNPS documentation 60 * same way they are described on SNPS documentation
62 */ 61 */
63 dwc3_trace(trace_dwc3_writel, "addr %p value %08x", 62 trace_dwc3_writel(base - DWC3_GLOBALS_REGS_START, offset, value);
64 base - DWC3_GLOBALS_REGS_START + offset, value);
65} 63}
66 64
67#endif /* __DRIVERS_USB_DWC3_IO_H */ 65#endif /* __DRIVERS_USB_DWC3_IO_H */
diff --git a/drivers/usb/dwc3/trace.h b/drivers/usb/dwc3/trace.h
index d24cefd191b5..2b124f94d858 100644
--- a/drivers/usb/dwc3/trace.h
+++ b/drivers/usb/dwc3/trace.h
@@ -37,47 +37,66 @@ DECLARE_EVENT_CLASS(dwc3_log_msg,
37 TP_printk("%s", __get_str(msg)) 37 TP_printk("%s", __get_str(msg))
38); 38);
39 39
40DEFINE_EVENT(dwc3_log_msg, dwc3_readl, 40DEFINE_EVENT(dwc3_log_msg, dwc3_gadget,
41 TP_PROTO(struct va_format *vaf), 41 TP_PROTO(struct va_format *vaf),
42 TP_ARGS(vaf) 42 TP_ARGS(vaf)
43); 43);
44 44
45DEFINE_EVENT(dwc3_log_msg, dwc3_writel, 45DEFINE_EVENT(dwc3_log_msg, dwc3_core,
46 TP_PROTO(struct va_format *vaf), 46 TP_PROTO(struct va_format *vaf),
47 TP_ARGS(vaf) 47 TP_ARGS(vaf)
48); 48);
49 49
50DEFINE_EVENT(dwc3_log_msg, dwc3_gadget, 50DEFINE_EVENT(dwc3_log_msg, dwc3_ep0,
51 TP_PROTO(struct va_format *vaf), 51 TP_PROTO(struct va_format *vaf),
52 TP_ARGS(vaf) 52 TP_ARGS(vaf)
53); 53);
54 54
55DEFINE_EVENT(dwc3_log_msg, dwc3_core, 55DECLARE_EVENT_CLASS(dwc3_log_io,
56 TP_PROTO(struct va_format *vaf), 56 TP_PROTO(void *base, u32 offset, u32 value),
57 TP_ARGS(vaf) 57 TP_ARGS(base, offset, value),
58 TP_STRUCT__entry(
59 __field(void *, base)
60 __field(u32, offset)
61 __field(u32, value)
62 ),
63 TP_fast_assign(
64 __entry->base = base;
65 __entry->offset = offset;
66 __entry->value = value;
67 ),
68 TP_printk("addr %p value %08x", __entry->base + __entry->offset,
69 __entry->value)
58); 70);
59 71
60DEFINE_EVENT(dwc3_log_msg, dwc3_ep0, 72DEFINE_EVENT(dwc3_log_io, dwc3_readl,
61 TP_PROTO(struct va_format *vaf), 73 TP_PROTO(void *base, u32 offset, u32 value),
62 TP_ARGS(vaf) 74 TP_ARGS(base, offset, value)
75);
76
77DEFINE_EVENT(dwc3_log_io, dwc3_writel,
78 TP_PROTO(void *base, u32 offset, u32 value),
79 TP_ARGS(base, offset, value)
63); 80);
64 81
65DECLARE_EVENT_CLASS(dwc3_log_event, 82DECLARE_EVENT_CLASS(dwc3_log_event,
66 TP_PROTO(u32 event), 83 TP_PROTO(u32 event, struct dwc3 *dwc),
67 TP_ARGS(event), 84 TP_ARGS(event, dwc),
68 TP_STRUCT__entry( 85 TP_STRUCT__entry(
69 __field(u32, event) 86 __field(u32, event)
87 __field(u32, ep0state)
70 ), 88 ),
71 TP_fast_assign( 89 TP_fast_assign(
72 __entry->event = event; 90 __entry->event = event;
91 __entry->ep0state = dwc->ep0state;
73 ), 92 ),
74 TP_printk("event (%08x): %s", __entry->event, 93 TP_printk("event (%08x): %s", __entry->event,
75 dwc3_decode_event(__entry->event)) 94 dwc3_decode_event(__entry->event, __entry->ep0state))
76); 95);
77 96
78DEFINE_EVENT(dwc3_log_event, dwc3_event, 97DEFINE_EVENT(dwc3_log_event, dwc3_event,
79 TP_PROTO(u32 event), 98 TP_PROTO(u32 event, struct dwc3 *dwc),
80 TP_ARGS(event) 99 TP_ARGS(event, dwc)
81); 100);
82 101
83DECLARE_EVENT_CLASS(dwc3_log_ctrl, 102DECLARE_EVENT_CLASS(dwc3_log_ctrl,
@@ -237,6 +256,7 @@ DECLARE_EVENT_CLASS(dwc3_log_trb,
237 __field(u32, bph) 256 __field(u32, bph)
238 __field(u32, size) 257 __field(u32, size)
239 __field(u32, ctrl) 258 __field(u32, ctrl)
259 __field(u32, type)
240 ), 260 ),
241 TP_fast_assign( 261 TP_fast_assign(
242 snprintf(__get_str(name), DWC3_MSG_MAX, "%s", dep->name); 262 snprintf(__get_str(name), DWC3_MSG_MAX, "%s", dep->name);
@@ -247,11 +267,31 @@ DECLARE_EVENT_CLASS(dwc3_log_trb,
247 __entry->bph = trb->bph; 267 __entry->bph = trb->bph;
248 __entry->size = trb->size; 268 __entry->size = trb->size;
249 __entry->ctrl = trb->ctrl; 269 __entry->ctrl = trb->ctrl;
270 __entry->type = usb_endpoint_type(dep->endpoint.desc);
250 ), 271 ),
251 TP_printk("%s: %d/%d trb %p buf %08x%08x size %d ctrl %08x (%c%c%c%c:%c%c:%s)", 272 TP_printk("%s: %d/%d trb %p buf %08x%08x size %s%d ctrl %08x (%c%c%c%c:%c%c:%s)",
252 __get_str(name), __entry->queued, __entry->allocated, 273 __get_str(name), __entry->queued, __entry->allocated,
253 __entry->trb, __entry->bph, __entry->bpl, 274 __entry->trb, __entry->bph, __entry->bpl,
254 __entry->size, __entry->ctrl, 275 ({char *s;
276 int pcm = ((__entry->size >> 24) & 3) + 1;
277 switch (__entry->type) {
278 case USB_ENDPOINT_XFER_INT:
279 case USB_ENDPOINT_XFER_ISOC:
280 switch (pcm) {
281 case 1:
282 s = "1x ";
283 break;
284 case 2:
285 s = "2x ";
286 break;
287 case 3:
288 s = "3x ";
289 break;
290 }
291 default:
292 s = "";
293 } s; }),
294 DWC3_TRB_SIZE_LENGTH(__entry->size), __entry->ctrl,
255 __entry->ctrl & DWC3_TRB_CTRL_HWO ? 'H' : 'h', 295 __entry->ctrl & DWC3_TRB_CTRL_HWO ? 'H' : 'h',
256 __entry->ctrl & DWC3_TRB_CTRL_LST ? 'L' : 'l', 296 __entry->ctrl & DWC3_TRB_CTRL_LST ? 'L' : 'l',
257 __entry->ctrl & DWC3_TRB_CTRL_CHN ? 'C' : 'c', 297 __entry->ctrl & DWC3_TRB_CTRL_CHN ? 'C' : 'c',
@@ -301,6 +341,57 @@ DEFINE_EVENT(dwc3_log_trb, dwc3_complete_trb,
301 TP_ARGS(dep, trb) 341 TP_ARGS(dep, trb)
302); 342);
303 343
344DECLARE_EVENT_CLASS(dwc3_log_ep,
345 TP_PROTO(struct dwc3_ep *dep),
346 TP_ARGS(dep),
347 TP_STRUCT__entry(
348 __dynamic_array(char, name, DWC3_MSG_MAX)
349 __field(unsigned, maxpacket)
350 __field(unsigned, maxpacket_limit)
351 __field(unsigned, max_streams)
352 __field(unsigned, maxburst)
353 __field(unsigned, flags)
354 __field(unsigned, direction)
355 __field(u8, trb_enqueue)
356 __field(u8, trb_dequeue)
357 ),
358 TP_fast_assign(
359 snprintf(__get_str(name), DWC3_MSG_MAX, "%s", dep->name);
360 __entry->maxpacket = dep->endpoint.maxpacket;
361 __entry->maxpacket_limit = dep->endpoint.maxpacket_limit;
362 __entry->max_streams = dep->endpoint.max_streams;
363 __entry->maxburst = dep->endpoint.maxburst;
364 __entry->flags = dep->flags;
365 __entry->direction = dep->direction;
366 __entry->trb_enqueue = dep->trb_enqueue;
367 __entry->trb_dequeue = dep->trb_dequeue;
368 ),
369 TP_printk("%s: mps %d/%d streams %d burst %d ring %d/%d flags %c:%c%c%c%c%c:%c:%c",
370 __get_str(name), __entry->maxpacket,
371 __entry->maxpacket_limit, __entry->max_streams,
372 __entry->maxburst, __entry->trb_enqueue,
373 __entry->trb_dequeue,
374 __entry->flags & DWC3_EP_ENABLED ? 'E' : 'e',
375 __entry->flags & DWC3_EP_STALL ? 'S' : 's',
376 __entry->flags & DWC3_EP_WEDGE ? 'W' : 'w',
377 __entry->flags & DWC3_EP_BUSY ? 'B' : 'b',
378 __entry->flags & DWC3_EP_PENDING_REQUEST ? 'P' : 'p',
379 __entry->flags & DWC3_EP_MISSED_ISOC ? 'M' : 'm',
380 __entry->flags & DWC3_EP_END_TRANSFER_PENDING ? 'E' : 'e',
381 __entry->direction ? '<' : '>'
382 )
383);
384
385DEFINE_EVENT(dwc3_log_ep, dwc3_gadget_ep_enable,
386 TP_PROTO(struct dwc3_ep *dep),
387 TP_ARGS(dep)
388);
389
390DEFINE_EVENT(dwc3_log_ep, dwc3_gadget_ep_disable,
391 TP_PROTO(struct dwc3_ep *dep),
392 TP_ARGS(dep)
393);
394
304#endif /* __DWC3_TRACE_H */ 395#endif /* __DWC3_TRACE_H */
305 396
306/* this part has to be here */ 397/* this part has to be here */
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 32176f779861..41ab61f9b6e0 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -201,7 +201,12 @@ ep_found:
201 _ep->desc = chosen_desc; 201 _ep->desc = chosen_desc;
202 _ep->comp_desc = NULL; 202 _ep->comp_desc = NULL;
203 _ep->maxburst = 0; 203 _ep->maxburst = 0;
204 _ep->mult = 0; 204 _ep->mult = 1;
205
206 if (g->speed == USB_SPEED_HIGH && (usb_endpoint_xfer_isoc(_ep->desc) ||
207 usb_endpoint_xfer_int(_ep->desc)))
208 _ep->mult = usb_endpoint_maxp_mult(_ep->desc);
209
205 if (!want_comp_desc) 210 if (!want_comp_desc)
206 return 0; 211 return 0;
207 212
@@ -218,7 +223,7 @@ ep_found:
218 switch (usb_endpoint_type(_ep->desc)) { 223 switch (usb_endpoint_type(_ep->desc)) {
219 case USB_ENDPOINT_XFER_ISOC: 224 case USB_ENDPOINT_XFER_ISOC:
220 /* mult: bits 1:0 of bmAttributes */ 225 /* mult: bits 1:0 of bmAttributes */
221 _ep->mult = comp_desc->bmAttributes & 0x3; 226 _ep->mult = (comp_desc->bmAttributes & 0x3) + 1;
222 case USB_ENDPOINT_XFER_BULK: 227 case USB_ENDPOINT_XFER_BULK:
223 case USB_ENDPOINT_XFER_INT: 228 case USB_ENDPOINT_XFER_INT:
224 _ep->maxburst = comp_desc->bMaxBurst + 1; 229 _ep->maxburst = comp_desc->bMaxBurst + 1;
@@ -2382,18 +2387,8 @@ EXPORT_SYMBOL_GPL(usb_composite_setup_continue);
2382 2387
2383static char *composite_default_mfr(struct usb_gadget *gadget) 2388static char *composite_default_mfr(struct usb_gadget *gadget)
2384{ 2389{
2385 char *mfr; 2390 return kasprintf(GFP_KERNEL, "%s %s with %s", init_utsname()->sysname,
2386 int len; 2391 init_utsname()->release, gadget->name);
2387
2388 len = snprintf(NULL, 0, "%s %s with %s", init_utsname()->sysname,
2389 init_utsname()->release, gadget->name);
2390 len++;
2391 mfr = kmalloc(len, GFP_KERNEL);
2392 if (!mfr)
2393 return NULL;
2394 snprintf(mfr, len, "%s %s with %s", init_utsname()->sysname,
2395 init_utsname()->release, gadget->name);
2396 return mfr;
2397} 2392}
2398 2393
2399void usb_composite_overwrite_options(struct usb_composite_dev *cdev, 2394void usb_composite_overwrite_options(struct usb_composite_dev *cdev,
diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index 17989b72cdae..0780d8311ec6 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -266,7 +266,7 @@ static void ffs_ep0_complete(struct usb_ep *ep, struct usb_request *req)
266{ 266{
267 struct ffs_data *ffs = req->context; 267 struct ffs_data *ffs = req->context;
268 268
269 complete_all(&ffs->ep0req_completion); 269 complete(&ffs->ep0req_completion);
270} 270}
271 271
272static int __ffs_ep0_queue_wait(struct ffs_data *ffs, char *data, size_t len) 272static int __ffs_ep0_queue_wait(struct ffs_data *ffs, char *data, size_t len)
diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c
index e2966f87c860..7abd70b2a588 100644
--- a/drivers/usb/gadget/function/f_hid.c
+++ b/drivers/usb/gadget/function/f_hid.c
@@ -98,6 +98,60 @@ static struct hid_descriptor hidg_desc = {
98 /*.desc[0].wDescriptorLenght = DYNAMIC */ 98 /*.desc[0].wDescriptorLenght = DYNAMIC */
99}; 99};
100 100
101/* Super-Speed Support */
102
103static struct usb_endpoint_descriptor hidg_ss_in_ep_desc = {
104 .bLength = USB_DT_ENDPOINT_SIZE,
105 .bDescriptorType = USB_DT_ENDPOINT,
106 .bEndpointAddress = USB_DIR_IN,
107 .bmAttributes = USB_ENDPOINT_XFER_INT,
108 /*.wMaxPacketSize = DYNAMIC */
109 .bInterval = 4, /* FIXME: Add this field in the
110 * HID gadget configuration?
111 * (struct hidg_func_descriptor)
112 */
113};
114
115static struct usb_ss_ep_comp_descriptor hidg_ss_in_comp_desc = {
116 .bLength = sizeof(hidg_ss_in_comp_desc),
117 .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
118
119 /* .bMaxBurst = 0, */
120 /* .bmAttributes = 0, */
121 /* .wBytesPerInterval = DYNAMIC */
122};
123
124static struct usb_endpoint_descriptor hidg_ss_out_ep_desc = {
125 .bLength = USB_DT_ENDPOINT_SIZE,
126 .bDescriptorType = USB_DT_ENDPOINT,
127 .bEndpointAddress = USB_DIR_OUT,
128 .bmAttributes = USB_ENDPOINT_XFER_INT,
129 /*.wMaxPacketSize = DYNAMIC */
130 .bInterval = 4, /* FIXME: Add this field in the
131 * HID gadget configuration?
132 * (struct hidg_func_descriptor)
133 */
134};
135
136static struct usb_ss_ep_comp_descriptor hidg_ss_out_comp_desc = {
137 .bLength = sizeof(hidg_ss_out_comp_desc),
138 .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
139
140 /* .bMaxBurst = 0, */
141 /* .bmAttributes = 0, */
142 /* .wBytesPerInterval = DYNAMIC */
143};
144
145static struct usb_descriptor_header *hidg_ss_descriptors[] = {
146 (struct usb_descriptor_header *)&hidg_interface_desc,
147 (struct usb_descriptor_header *)&hidg_desc,
148 (struct usb_descriptor_header *)&hidg_ss_in_ep_desc,
149 (struct usb_descriptor_header *)&hidg_ss_in_comp_desc,
150 (struct usb_descriptor_header *)&hidg_ss_out_ep_desc,
151 (struct usb_descriptor_header *)&hidg_ss_out_comp_desc,
152 NULL,
153};
154
101/* High-Speed Support */ 155/* High-Speed Support */
102 156
103static struct usb_endpoint_descriptor hidg_hs_in_ep_desc = { 157static struct usb_endpoint_descriptor hidg_hs_in_ep_desc = {
@@ -624,8 +678,14 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
624 /* set descriptor dynamic values */ 678 /* set descriptor dynamic values */
625 hidg_interface_desc.bInterfaceSubClass = hidg->bInterfaceSubClass; 679 hidg_interface_desc.bInterfaceSubClass = hidg->bInterfaceSubClass;
626 hidg_interface_desc.bInterfaceProtocol = hidg->bInterfaceProtocol; 680 hidg_interface_desc.bInterfaceProtocol = hidg->bInterfaceProtocol;
681 hidg_ss_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
682 hidg_ss_in_comp_desc.wBytesPerInterval =
683 cpu_to_le16(hidg->report_length);
627 hidg_hs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length); 684 hidg_hs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
628 hidg_fs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length); 685 hidg_fs_in_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
686 hidg_ss_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
687 hidg_ss_out_comp_desc.wBytesPerInterval =
688 cpu_to_le16(hidg->report_length);
629 hidg_hs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length); 689 hidg_hs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
630 hidg_fs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length); 690 hidg_fs_out_ep_desc.wMaxPacketSize = cpu_to_le16(hidg->report_length);
631 /* 691 /*
@@ -641,8 +701,13 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
641 hidg_hs_out_ep_desc.bEndpointAddress = 701 hidg_hs_out_ep_desc.bEndpointAddress =
642 hidg_fs_out_ep_desc.bEndpointAddress; 702 hidg_fs_out_ep_desc.bEndpointAddress;
643 703
704 hidg_ss_in_ep_desc.bEndpointAddress =
705 hidg_fs_in_ep_desc.bEndpointAddress;
706 hidg_ss_out_ep_desc.bEndpointAddress =
707 hidg_fs_out_ep_desc.bEndpointAddress;
708
644 status = usb_assign_descriptors(f, hidg_fs_descriptors, 709 status = usb_assign_descriptors(f, hidg_fs_descriptors,
645 hidg_hs_descriptors, NULL, NULL); 710 hidg_hs_descriptors, hidg_ss_descriptors, NULL);
646 if (status) 711 if (status)
647 goto fail; 712 goto fail;
648 713
diff --git a/drivers/usb/gadget/function/f_ncm.c b/drivers/usb/gadget/function/f_ncm.c
index 639603722709..e8008fa35e1e 100644
--- a/drivers/usb/gadget/function/f_ncm.c
+++ b/drivers/usb/gadget/function/f_ncm.c
@@ -998,7 +998,7 @@ static struct sk_buff *package_for_tx(struct f_ncm *ncm)
998 /* Merge the skbs */ 998 /* Merge the skbs */
999 swap(skb2, ncm->skb_tx_data); 999 swap(skb2, ncm->skb_tx_data);
1000 if (ncm->skb_tx_data) { 1000 if (ncm->skb_tx_data) {
1001 dev_kfree_skb_any(ncm->skb_tx_data); 1001 dev_consume_skb_any(ncm->skb_tx_data);
1002 ncm->skb_tx_data = NULL; 1002 ncm->skb_tx_data = NULL;
1003 } 1003 }
1004 1004
@@ -1009,7 +1009,7 @@ static struct sk_buff *package_for_tx(struct f_ncm *ncm)
1009 /* Copy NTB across. */ 1009 /* Copy NTB across. */
1010 ntb_iter = (void *) skb_put(skb2, ncm->skb_tx_ndp->len); 1010 ntb_iter = (void *) skb_put(skb2, ncm->skb_tx_ndp->len);
1011 memcpy(ntb_iter, ncm->skb_tx_ndp->data, ncm->skb_tx_ndp->len); 1011 memcpy(ntb_iter, ncm->skb_tx_ndp->data, ncm->skb_tx_ndp->len);
1012 dev_kfree_skb_any(ncm->skb_tx_ndp); 1012 dev_consume_skb_any(ncm->skb_tx_ndp);
1013 ncm->skb_tx_ndp = NULL; 1013 ncm->skb_tx_ndp = NULL;
1014 1014
1015 /* Insert zero'd datagram. */ 1015 /* Insert zero'd datagram. */
@@ -1078,6 +1078,7 @@ static struct sk_buff *ncm_wrap_ntb(struct gether *port,
1078 if (!ncm->skb_tx_data) 1078 if (!ncm->skb_tx_data)
1079 goto err; 1079 goto err;
1080 1080
1081 ncm->skb_tx_data->dev = ncm->netdev;
1081 ntb_data = (void *) skb_put(ncm->skb_tx_data, ncb_len); 1082 ntb_data = (void *) skb_put(ncm->skb_tx_data, ncb_len);
1082 memset(ntb_data, 0, ncb_len); 1083 memset(ntb_data, 0, ncb_len);
1083 /* dwSignature */ 1084 /* dwSignature */
@@ -1096,6 +1097,8 @@ static struct sk_buff *ncm_wrap_ntb(struct gether *port,
1096 GFP_ATOMIC); 1097 GFP_ATOMIC);
1097 if (!ncm->skb_tx_ndp) 1098 if (!ncm->skb_tx_ndp)
1098 goto err; 1099 goto err;
1100
1101 ncm->skb_tx_ndp->dev = ncm->netdev;
1099 ntb_ndp = (void *) skb_put(ncm->skb_tx_ndp, 1102 ntb_ndp = (void *) skb_put(ncm->skb_tx_ndp,
1100 opts->ndp_size); 1103 opts->ndp_size);
1101 memset(ntb_ndp, 0, ncb_len); 1104 memset(ntb_ndp, 0, ncb_len);
@@ -1133,7 +1136,7 @@ static struct sk_buff *ncm_wrap_ntb(struct gether *port,
1133 memset(ntb_data, 0, dgram_pad); 1136 memset(ntb_data, 0, dgram_pad);
1134 ntb_data = (void *) skb_put(ncm->skb_tx_data, skb->len); 1137 ntb_data = (void *) skb_put(ncm->skb_tx_data, skb->len);
1135 memcpy(ntb_data, skb->data, skb->len); 1138 memcpy(ntb_data, skb->data, skb->len);
1136 dev_kfree_skb_any(skb); 1139 dev_consume_skb_any(skb);
1137 skb = NULL; 1140 skb = NULL;
1138 1141
1139 } else if (ncm->skb_tx_data && ncm->timer_force_tx) { 1142 } else if (ncm->skb_tx_data && ncm->timer_force_tx) {
@@ -1329,7 +1332,7 @@ static int ncm_unwrap_ntb(struct gether *port,
1329 } while (ndp_len > 2 * (opts->dgram_item_len * 2)); 1332 } while (ndp_len > 2 * (opts->dgram_item_len * 2));
1330 } while (ndp_index); 1333 } while (ndp_index);
1331 1334
1332 dev_kfree_skb_any(skb); 1335 dev_consume_skb_any(skb);
1333 1336
1334 VDBG(port->func.config->cdev, 1337 VDBG(port->func.config->cdev,
1335 "Parsed NTB with %d frames\n", dgram_counter); 1338 "Parsed NTB with %d frames\n", dgram_counter);
diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c
index cd214ec8a601..969cfe741380 100644
--- a/drivers/usb/gadget/function/f_uac2.c
+++ b/drivers/usb/gadget/function/f_uac2.c
@@ -1067,13 +1067,13 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn)
1067 agdev->out_ep = usb_ep_autoconfig(gadget, &fs_epout_desc); 1067 agdev->out_ep = usb_ep_autoconfig(gadget, &fs_epout_desc);
1068 if (!agdev->out_ep) { 1068 if (!agdev->out_ep) {
1069 dev_err(dev, "%s:%d Error!\n", __func__, __LINE__); 1069 dev_err(dev, "%s:%d Error!\n", __func__, __LINE__);
1070 goto err; 1070 return ret;
1071 } 1071 }
1072 1072
1073 agdev->in_ep = usb_ep_autoconfig(gadget, &fs_epin_desc); 1073 agdev->in_ep = usb_ep_autoconfig(gadget, &fs_epin_desc);
1074 if (!agdev->in_ep) { 1074 if (!agdev->in_ep) {
1075 dev_err(dev, "%s:%d Error!\n", __func__, __LINE__); 1075 dev_err(dev, "%s:%d Error!\n", __func__, __LINE__);
1076 goto err; 1076 return ret;
1077 } 1077 }
1078 1078
1079 uac2->p_prm.uac2 = uac2; 1079 uac2->p_prm.uac2 = uac2;
@@ -1091,7 +1091,7 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn)
1091 ret = usb_assign_descriptors(fn, fs_audio_desc, hs_audio_desc, NULL, 1091 ret = usb_assign_descriptors(fn, fs_audio_desc, hs_audio_desc, NULL,
1092 NULL); 1092 NULL);
1093 if (ret) 1093 if (ret)
1094 goto err; 1094 return ret;
1095 1095
1096 prm = &agdev->uac2.c_prm; 1096 prm = &agdev->uac2.c_prm;
1097 prm->max_psize = hs_epout_desc.wMaxPacketSize; 1097 prm->max_psize = hs_epout_desc.wMaxPacketSize;
@@ -1106,19 +1106,19 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn)
1106 prm->rbuf = kzalloc(prm->max_psize * USB_XFERS, GFP_KERNEL); 1106 prm->rbuf = kzalloc(prm->max_psize * USB_XFERS, GFP_KERNEL);
1107 if (!prm->rbuf) { 1107 if (!prm->rbuf) {
1108 prm->max_psize = 0; 1108 prm->max_psize = 0;
1109 goto err_free_descs; 1109 goto err;
1110 } 1110 }
1111 1111
1112 ret = alsa_uac2_init(agdev); 1112 ret = alsa_uac2_init(agdev);
1113 if (ret) 1113 if (ret)
1114 goto err_free_descs; 1114 goto err;
1115 return 0; 1115 return 0;
1116 1116
1117err_free_descs:
1118 usb_free_all_descriptors(fn);
1119err: 1117err:
1120 kfree(agdev->uac2.p_prm.rbuf); 1118 kfree(agdev->uac2.p_prm.rbuf);
1121 kfree(agdev->uac2.c_prm.rbuf); 1119 kfree(agdev->uac2.c_prm.rbuf);
1120err_free_descs:
1121 usb_free_all_descriptors(fn);
1122 return -EINVAL; 1122 return -EINVAL;
1123} 1123}
1124 1124
diff --git a/drivers/usb/gadget/function/rndis.c b/drivers/usb/gadget/function/rndis.c
index ab6ac1b74ac0..a3b5e468b116 100644
--- a/drivers/usb/gadget/function/rndis.c
+++ b/drivers/usb/gadget/function/rndis.c
@@ -80,8 +80,7 @@ static const struct file_operations rndis_proc_fops;
80#endif /* CONFIG_USB_GADGET_DEBUG_FILES */ 80#endif /* CONFIG_USB_GADGET_DEBUG_FILES */
81 81
82/* supported OIDs */ 82/* supported OIDs */
83static const u32 oid_supported_list[] = 83static const u32 oid_supported_list[] = {
84{
85 /* the general stuff */ 84 /* the general stuff */
86 RNDIS_OID_GEN_SUPPORTED_LIST, 85 RNDIS_OID_GEN_SUPPORTED_LIST,
87 RNDIS_OID_GEN_HARDWARE_STATUS, 86 RNDIS_OID_GEN_HARDWARE_STATUS,
@@ -474,8 +473,7 @@ static int gen_ndis_query_resp(struct rndis_params *params, u32 OID, u8 *buf,
474 break; 473 break;
475 474
476 default: 475 default:
477 pr_warning("%s: query unknown OID 0x%08X\n", 476 pr_warn("%s: query unknown OID 0x%08X\n", __func__, OID);
478 __func__, OID);
479 } 477 }
480 if (retval < 0) 478 if (retval < 0)
481 length = 0; 479 length = 0;
@@ -546,8 +544,8 @@ static int gen_ndis_set_resp(struct rndis_params *params, u32 OID,
546 break; 544 break;
547 545
548 default: 546 default:
549 pr_warning("%s: set unknown OID 0x%08X, size %d\n", 547 pr_warn("%s: set unknown OID 0x%08X, size %d\n",
550 __func__, OID, buf_len); 548 __func__, OID, buf_len);
551 } 549 }
552 550
553 return retval; 551 return retval;
@@ -854,7 +852,7 @@ int rndis_msg_parser(struct rndis_params *params, u8 *buf)
854 * In one case those messages seemed to relate to the host 852 * In one case those messages seemed to relate to the host
855 * suspending itself. 853 * suspending itself.
856 */ 854 */
857 pr_warning("%s: unknown RNDIS message 0x%08X len %d\n", 855 pr_warn("%s: unknown RNDIS message 0x%08X len %d\n",
858 __func__, MsgType, MsgLength); 856 __func__, MsgType, MsgLength);
859 print_hex_dump_bytes(__func__, DUMP_PREFIX_OFFSET, 857 print_hex_dump_bytes(__func__, DUMP_PREFIX_OFFSET,
860 buf, MsgLength); 858 buf, MsgLength);
diff --git a/drivers/usb/gadget/function/rndis.h b/drivers/usb/gadget/function/rndis.h
index ef92eb66d8ad..21e0430ffb98 100644
--- a/drivers/usb/gadget/function/rndis.h
+++ b/drivers/usb/gadget/function/rndis.h
@@ -22,8 +22,7 @@
22#define RNDIS_MAXIMUM_FRAME_SIZE 1518 22#define RNDIS_MAXIMUM_FRAME_SIZE 1518
23#define RNDIS_MAX_TOTAL_SIZE 1558 23#define RNDIS_MAX_TOTAL_SIZE 1558
24 24
25typedef struct rndis_init_msg_type 25typedef struct rndis_init_msg_type {
26{
27 __le32 MessageType; 26 __le32 MessageType;
28 __le32 MessageLength; 27 __le32 MessageLength;
29 __le32 RequestID; 28 __le32 RequestID;
@@ -32,8 +31,7 @@ typedef struct rndis_init_msg_type
32 __le32 MaxTransferSize; 31 __le32 MaxTransferSize;
33} rndis_init_msg_type; 32} rndis_init_msg_type;
34 33
35typedef struct rndis_init_cmplt_type 34typedef struct rndis_init_cmplt_type {
36{
37 __le32 MessageType; 35 __le32 MessageType;
38 __le32 MessageLength; 36 __le32 MessageLength;
39 __le32 RequestID; 37 __le32 RequestID;
@@ -49,15 +47,13 @@ typedef struct rndis_init_cmplt_type
49 __le32 AFListSize; 47 __le32 AFListSize;
50} rndis_init_cmplt_type; 48} rndis_init_cmplt_type;
51 49
52typedef struct rndis_halt_msg_type 50typedef struct rndis_halt_msg_type {
53{
54 __le32 MessageType; 51 __le32 MessageType;
55 __le32 MessageLength; 52 __le32 MessageLength;
56 __le32 RequestID; 53 __le32 RequestID;
57} rndis_halt_msg_type; 54} rndis_halt_msg_type;
58 55
59typedef struct rndis_query_msg_type 56typedef struct rndis_query_msg_type {
60{
61 __le32 MessageType; 57 __le32 MessageType;
62 __le32 MessageLength; 58 __le32 MessageLength;
63 __le32 RequestID; 59 __le32 RequestID;
@@ -67,8 +63,7 @@ typedef struct rndis_query_msg_type
67 __le32 DeviceVcHandle; 63 __le32 DeviceVcHandle;
68} rndis_query_msg_type; 64} rndis_query_msg_type;
69 65
70typedef struct rndis_query_cmplt_type 66typedef struct rndis_query_cmplt_type {
71{
72 __le32 MessageType; 67 __le32 MessageType;
73 __le32 MessageLength; 68 __le32 MessageLength;
74 __le32 RequestID; 69 __le32 RequestID;
@@ -77,8 +72,7 @@ typedef struct rndis_query_cmplt_type
77 __le32 InformationBufferOffset; 72 __le32 InformationBufferOffset;
78} rndis_query_cmplt_type; 73} rndis_query_cmplt_type;
79 74
80typedef struct rndis_set_msg_type 75typedef struct rndis_set_msg_type {
81{
82 __le32 MessageType; 76 __le32 MessageType;
83 __le32 MessageLength; 77 __le32 MessageLength;
84 __le32 RequestID; 78 __le32 RequestID;
@@ -88,31 +82,27 @@ typedef struct rndis_set_msg_type
88 __le32 DeviceVcHandle; 82 __le32 DeviceVcHandle;
89} rndis_set_msg_type; 83} rndis_set_msg_type;
90 84
91typedef struct rndis_set_cmplt_type 85typedef struct rndis_set_cmplt_type {
92{
93 __le32 MessageType; 86 __le32 MessageType;
94 __le32 MessageLength; 87 __le32 MessageLength;
95 __le32 RequestID; 88 __le32 RequestID;
96 __le32 Status; 89 __le32 Status;
97} rndis_set_cmplt_type; 90} rndis_set_cmplt_type;
98 91
99typedef struct rndis_reset_msg_type 92typedef struct rndis_reset_msg_type {
100{
101 __le32 MessageType; 93 __le32 MessageType;
102 __le32 MessageLength; 94 __le32 MessageLength;
103 __le32 Reserved; 95 __le32 Reserved;
104} rndis_reset_msg_type; 96} rndis_reset_msg_type;
105 97
106typedef struct rndis_reset_cmplt_type 98typedef struct rndis_reset_cmplt_type {
107{
108 __le32 MessageType; 99 __le32 MessageType;
109 __le32 MessageLength; 100 __le32 MessageLength;
110 __le32 Status; 101 __le32 Status;
111 __le32 AddressingReset; 102 __le32 AddressingReset;
112} rndis_reset_cmplt_type; 103} rndis_reset_cmplt_type;
113 104
114typedef struct rndis_indicate_status_msg_type 105typedef struct rndis_indicate_status_msg_type {
115{
116 __le32 MessageType; 106 __le32 MessageType;
117 __le32 MessageLength; 107 __le32 MessageLength;
118 __le32 Status; 108 __le32 Status;
@@ -120,23 +110,20 @@ typedef struct rndis_indicate_status_msg_type
120 __le32 StatusBufferOffset; 110 __le32 StatusBufferOffset;
121} rndis_indicate_status_msg_type; 111} rndis_indicate_status_msg_type;
122 112
123typedef struct rndis_keepalive_msg_type 113typedef struct rndis_keepalive_msg_type {
124{
125 __le32 MessageType; 114 __le32 MessageType;
126 __le32 MessageLength; 115 __le32 MessageLength;
127 __le32 RequestID; 116 __le32 RequestID;
128} rndis_keepalive_msg_type; 117} rndis_keepalive_msg_type;
129 118
130typedef struct rndis_keepalive_cmplt_type 119typedef struct rndis_keepalive_cmplt_type {
131{
132 __le32 MessageType; 120 __le32 MessageType;
133 __le32 MessageLength; 121 __le32 MessageLength;
134 __le32 RequestID; 122 __le32 RequestID;
135 __le32 Status; 123 __le32 Status;
136} rndis_keepalive_cmplt_type; 124} rndis_keepalive_cmplt_type;
137 125
138struct rndis_packet_msg_type 126struct rndis_packet_msg_type {
139{
140 __le32 MessageType; 127 __le32 MessageType;
141 __le32 MessageLength; 128 __le32 MessageLength;
142 __le32 DataOffset; 129 __le32 DataOffset;
@@ -150,8 +137,7 @@ struct rndis_packet_msg_type
150 __le32 Reserved; 137 __le32 Reserved;
151} __attribute__ ((packed)); 138} __attribute__ ((packed));
152 139
153struct rndis_config_parameter 140struct rndis_config_parameter {
154{
155 __le32 ParameterNameOffset; 141 __le32 ParameterNameOffset;
156 __le32 ParameterNameLength; 142 __le32 ParameterNameLength;
157 __le32 ParameterType; 143 __le32 ParameterType;
@@ -160,23 +146,20 @@ struct rndis_config_parameter
160}; 146};
161 147
162/* implementation specific */ 148/* implementation specific */
163enum rndis_state 149enum rndis_state {
164{
165 RNDIS_UNINITIALIZED, 150 RNDIS_UNINITIALIZED,
166 RNDIS_INITIALIZED, 151 RNDIS_INITIALIZED,
167 RNDIS_DATA_INITIALIZED, 152 RNDIS_DATA_INITIALIZED,
168}; 153};
169 154
170typedef struct rndis_resp_t 155typedef struct rndis_resp_t {
171{
172 struct list_head list; 156 struct list_head list;
173 u8 *buf; 157 u8 *buf;
174 u32 length; 158 u32 length;
175 int send; 159 int send;
176} rndis_resp_t; 160} rndis_resp_t;
177 161
178typedef struct rndis_params 162typedef struct rndis_params {
179{
180 int confignr; 163 int confignr;
181 u8 used; 164 u8 used;
182 u16 saved_filter; 165 u16 saved_filter;
diff --git a/drivers/usb/gadget/function/u_ether.c b/drivers/usb/gadget/function/u_ether.c
index 84a1709e0784..b4e5d6dfd549 100644
--- a/drivers/usb/gadget/function/u_ether.c
+++ b/drivers/usb/gadget/function/u_ether.c
@@ -215,7 +215,7 @@ rx_submit(struct eth_dev *dev, struct usb_request *req, gfp_t gfp_flags)
215 if (dev->port_usb->is_fixed) 215 if (dev->port_usb->is_fixed)
216 size = max_t(size_t, size, dev->port_usb->fixed_out_len); 216 size = max_t(size_t, size, dev->port_usb->fixed_out_len);
217 217
218 skb = alloc_skb(size + NET_IP_ALIGN, gfp_flags); 218 skb = __netdev_alloc_skb(dev->net, size + NET_IP_ALIGN, gfp_flags);
219 if (skb == NULL) { 219 if (skb == NULL) {
220 DBG(dev, "no rx skb\n"); 220 DBG(dev, "no rx skb\n");
221 goto enomem; 221 goto enomem;
@@ -446,16 +446,17 @@ static void tx_complete(struct usb_ep *ep, struct usb_request *req)
446 /* FALLTHROUGH */ 446 /* FALLTHROUGH */
447 case -ECONNRESET: /* unlink */ 447 case -ECONNRESET: /* unlink */
448 case -ESHUTDOWN: /* disconnect etc */ 448 case -ESHUTDOWN: /* disconnect etc */
449 dev_kfree_skb_any(skb);
449 break; 450 break;
450 case 0: 451 case 0:
451 dev->net->stats.tx_bytes += skb->len; 452 dev->net->stats.tx_bytes += skb->len;
453 dev_consume_skb_any(skb);
452 } 454 }
453 dev->net->stats.tx_packets++; 455 dev->net->stats.tx_packets++;
454 456
455 spin_lock(&dev->req_lock); 457 spin_lock(&dev->req_lock);
456 list_add(&req->list, &dev->tx_reqs); 458 list_add(&req->list, &dev->tx_reqs);
457 spin_unlock(&dev->req_lock); 459 spin_unlock(&dev->req_lock);
458 dev_kfree_skb_any(skb);
459 460
460 atomic_dec(&dev->tx_qlen); 461 atomic_dec(&dev->tx_qlen);
461 if (netif_carrier_ok(dev->net)) 462 if (netif_carrier_ok(dev->net))
diff --git a/drivers/usb/gadget/function/u_serial.c b/drivers/usb/gadget/function/u_serial.c
index e0cd1e4c8892..000677c991b0 100644
--- a/drivers/usb/gadget/function/u_serial.c
+++ b/drivers/usb/gadget/function/u_serial.c
@@ -622,8 +622,8 @@ static void gs_write_complete(struct usb_ep *ep, struct usb_request *req)
622 switch (req->status) { 622 switch (req->status) {
623 default: 623 default:
624 /* presumably a transient fault */ 624 /* presumably a transient fault */
625 pr_warning("%s: unexpected %s status %d\n", 625 pr_warn("%s: unexpected %s status %d\n",
626 __func__, ep->name, req->status); 626 __func__, ep->name, req->status);
627 /* FALL THROUGH */ 627 /* FALL THROUGH */
628 case 0: 628 case 0:
629 /* normal completion */ 629 /* normal completion */
@@ -1256,7 +1256,8 @@ static void gserial_console_exit(void)
1256 struct gscons_info *info = &gscons_info; 1256 struct gscons_info *info = &gscons_info;
1257 1257
1258 unregister_console(&gserial_cons); 1258 unregister_console(&gserial_cons);
1259 kthread_stop(info->console_thread); 1259 if (info->console_thread != NULL)
1260 kthread_stop(info->console_thread);
1260 gs_buf_free(&info->con_buf); 1261 gs_buf_free(&info->con_buf);
1261} 1262}
1262 1263
diff --git a/drivers/usb/gadget/function/uvc.h b/drivers/usb/gadget/function/uvc.h
index 7d3bb6272e06..11d70dead32b 100644
--- a/drivers/usb/gadget/function/uvc.h
+++ b/drivers/usb/gadget/function/uvc.h
@@ -26,14 +26,12 @@
26#define UVC_EVENT_DATA (V4L2_EVENT_PRIVATE_START + 5) 26#define UVC_EVENT_DATA (V4L2_EVENT_PRIVATE_START + 5)
27#define UVC_EVENT_LAST (V4L2_EVENT_PRIVATE_START + 5) 27#define UVC_EVENT_LAST (V4L2_EVENT_PRIVATE_START + 5)
28 28
29struct uvc_request_data 29struct uvc_request_data {
30{
31 __s32 length; 30 __s32 length;
32 __u8 data[60]; 31 __u8 data[60];
33}; 32};
34 33
35struct uvc_event 34struct uvc_event {
36{
37 union { 35 union {
38 enum usb_device_speed speed; 36 enum usb_device_speed speed;
39 struct usb_ctrlrequest req; 37 struct usb_ctrlrequest req;
@@ -104,8 +102,7 @@ extern unsigned int uvc_gadget_trace_param;
104 * Structures 102 * Structures
105 */ 103 */
106 104
107struct uvc_video 105struct uvc_video {
108{
109 struct usb_ep *ep; 106 struct usb_ep *ep;
110 107
111 /* Frame parameters */ 108 /* Frame parameters */
@@ -134,15 +131,13 @@ struct uvc_video
134 unsigned int fid; 131 unsigned int fid;
135}; 132};
136 133
137enum uvc_state 134enum uvc_state {
138{
139 UVC_STATE_DISCONNECTED, 135 UVC_STATE_DISCONNECTED,
140 UVC_STATE_CONNECTED, 136 UVC_STATE_CONNECTED,
141 UVC_STATE_STREAMING, 137 UVC_STATE_STREAMING,
142}; 138};
143 139
144struct uvc_device 140struct uvc_device {
145{
146 struct video_device vdev; 141 struct video_device vdev;
147 struct v4l2_device v4l2_dev; 142 struct v4l2_device v4l2_dev;
148 enum uvc_state state; 143 enum uvc_state state;
@@ -175,8 +170,7 @@ static inline struct uvc_device *to_uvc(struct usb_function *f)
175 return container_of(f, struct uvc_device, func); 170 return container_of(f, struct uvc_device, func);
176} 171}
177 172
178struct uvc_file_handle 173struct uvc_file_handle {
179{
180 struct v4l2_fh vfh; 174 struct v4l2_fh vfh;
181 struct uvc_video *device; 175 struct uvc_video *device;
182}; 176};
diff --git a/drivers/usb/gadget/function/uvc_v4l2.c b/drivers/usb/gadget/function/uvc_v4l2.c
index f4ccbd56f4d2..3e22b45687d3 100644
--- a/drivers/usb/gadget/function/uvc_v4l2.c
+++ b/drivers/usb/gadget/function/uvc_v4l2.c
@@ -53,8 +53,7 @@ uvc_send_response(struct uvc_device *uvc, struct uvc_request_data *data)
53 * V4L2 ioctls 53 * V4L2 ioctls
54 */ 54 */
55 55
56struct uvc_format 56struct uvc_format {
57{
58 u8 bpp; 57 u8 bpp;
59 u32 fcc; 58 u32 fcc;
60}; 59};
diff --git a/drivers/usb/gadget/function/uvc_video.c b/drivers/usb/gadget/function/uvc_video.c
index 3d0d5d94a62f..0f01c04d7cbd 100644
--- a/drivers/usb/gadget/function/uvc_video.c
+++ b/drivers/usb/gadget/function/uvc_video.c
@@ -243,7 +243,7 @@ uvc_video_alloc_requests(struct uvc_video *video)
243 243
244 req_size = video->ep->maxpacket 244 req_size = video->ep->maxpacket
245 * max_t(unsigned int, video->ep->maxburst, 1) 245 * max_t(unsigned int, video->ep->maxburst, 1)
246 * (video->ep->mult + 1); 246 * (video->ep->mult);
247 247
248 for (i = 0; i < UVC_NUM_REQUESTS; ++i) { 248 for (i = 0; i < UVC_NUM_REQUESTS; ++i) {
249 video->req_buffer[i] = kmalloc(req_size, GFP_KERNEL); 249 video->req_buffer[i] = kmalloc(req_size, GFP_KERNEL);
diff --git a/drivers/usb/gadget/udc/at91_udc.h b/drivers/usb/gadget/udc/at91_udc.h
index 0a433e6b346b..9bbe72764f31 100644
--- a/drivers/usb/gadget/udc/at91_udc.h
+++ b/drivers/usb/gadget/udc/at91_udc.h
@@ -175,7 +175,7 @@ struct at91_request {
175#endif 175#endif
176 176
177#define ERR(stuff...) pr_err("udc: " stuff) 177#define ERR(stuff...) pr_err("udc: " stuff)
178#define WARNING(stuff...) pr_warning("udc: " stuff) 178#define WARNING(stuff...) pr_warn("udc: " stuff)
179#define INFO(stuff...) pr_info("udc: " stuff) 179#define INFO(stuff...) pr_info("udc: " stuff)
180#define DBG(stuff...) pr_debug("udc: " stuff) 180#define DBG(stuff...) pr_debug("udc: " stuff)
181 181
diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c
index 45bc997d0711..f3212db9bc37 100644
--- a/drivers/usb/gadget/udc/atmel_usba_udc.c
+++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
@@ -529,7 +529,7 @@ usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
529 529
530 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); 530 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
531 531
532 maxpacket = usb_endpoint_maxp(desc) & 0x7ff; 532 maxpacket = usb_endpoint_maxp(desc);
533 533
534 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) 534 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
535 || ep->index == 0 535 || ep->index == 0
@@ -573,7 +573,7 @@ usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
573 * Bits 11:12 specify number of _additional_ 573 * Bits 11:12 specify number of _additional_
574 * transactions per microframe. 574 * transactions per microframe.
575 */ 575 */
576 nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1; 576 nr_trans = usb_endpoint_maxp_mult(desc);
577 if (nr_trans > 3) 577 if (nr_trans > 3)
578 return -EINVAL; 578 return -EINVAL;
579 579
@@ -1464,8 +1464,8 @@ restart:
1464 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); 1464 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1465 DBG(DBG_HW, "Packet length: %u\n", pkt_len); 1465 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1466 if (pkt_len != sizeof(crq)) { 1466 if (pkt_len != sizeof(crq)) {
1467 pr_warning("udc: Invalid packet length %u " 1467 pr_warn("udc: Invalid packet length %u (expected %zu)\n",
1468 "(expected %zu)\n", pkt_len, sizeof(crq)); 1468 pkt_len, sizeof(crq));
1469 set_protocol_stall(udc, ep); 1469 set_protocol_stall(udc, ep);
1470 return; 1470 return;
1471 } 1471 }
diff --git a/drivers/usb/gadget/udc/bdc/bdc_cmd.c b/drivers/usb/gadget/udc/bdc/bdc_cmd.c
index 4d5e9188beae..6e920f1dce02 100644
--- a/drivers/usb/gadget/udc/bdc/bdc_cmd.c
+++ b/drivers/usb/gadget/udc/bdc/bdc_cmd.c
@@ -182,7 +182,7 @@ int bdc_config_ep(struct bdc *bdc, struct bdc_ep *ep)
182 usb_endpoint_xfer_int(desc)) { 182 usb_endpoint_xfer_int(desc)) {
183 param2 |= si; 183 param2 |= si;
184 184
185 mbs = (usb_endpoint_maxp(desc) & 0x1800) >> 11; 185 mbs = usb_endpoint_maxp_mult(desc);
186 param2 |= mbs << MB_SHIFT; 186 param2 |= mbs << MB_SHIFT;
187 } 187 }
188 break; 188 break;
diff --git a/drivers/usb/gadget/udc/bdc/bdc_ep.c b/drivers/usb/gadget/udc/bdc/bdc_ep.c
index ccaa74ab6c0e..ff1ef24d1777 100644
--- a/drivers/usb/gadget/udc/bdc/bdc_ep.c
+++ b/drivers/usb/gadget/udc/bdc/bdc_ep.c
@@ -446,7 +446,7 @@ static int setup_bd_list_xfr(struct bdc *bdc, struct bdc_req *req, int num_bds)
446 bd_xfr->start_bdi = bd_list->eqp_bdi; 446 bd_xfr->start_bdi = bd_list->eqp_bdi;
447 bd = bdi_to_bd(ep, bd_list->eqp_bdi); 447 bd = bdi_to_bd(ep, bd_list->eqp_bdi);
448 req_len = req->usb_req.length; 448 req_len = req->usb_req.length;
449 maxp = usb_endpoint_maxp(ep->desc) & 0x7ff; 449 maxp = usb_endpoint_maxp(ep->desc);
450 tfs = roundup(req->usb_req.length, maxp); 450 tfs = roundup(req->usb_req.length, maxp);
451 tfs = tfs/maxp; 451 tfs = tfs/maxp;
452 dev_vdbg(bdc->dev, "%s ep:%s num_bds:%d tfs:%d r_len:%d bd:%p\n", 452 dev_vdbg(bdc->dev, "%s ep:%s num_bds:%d tfs:%d r_len:%d bd:%p\n",
diff --git a/drivers/usb/gadget/udc/dummy_hcd.c b/drivers/usb/gadget/udc/dummy_hcd.c
index 77d07904f932..02b14e91ae6c 100644
--- a/drivers/usb/gadget/udc/dummy_hcd.c
+++ b/drivers/usb/gadget/udc/dummy_hcd.c
@@ -503,7 +503,7 @@ static int dummy_enable(struct usb_ep *_ep,
503 * maximum packet size. 503 * maximum packet size.
504 * For SS devices the wMaxPacketSize is limited by 1024. 504 * For SS devices the wMaxPacketSize is limited by 1024.
505 */ 505 */
506 max = usb_endpoint_maxp(desc) & 0x7ff; 506 max = usb_endpoint_maxp(desc);
507 507
508 /* drivers must not request bad settings, since lower levels 508 /* drivers must not request bad settings, since lower levels
509 * (hardware or its drivers) may not check. some endpoints 509 * (hardware or its drivers) may not check. some endpoints
@@ -1483,8 +1483,7 @@ static int periodic_bytes(struct dummy *dum, struct dummy_ep *ep)
1483 int tmp; 1483 int tmp;
1484 1484
1485 /* high bandwidth mode */ 1485 /* high bandwidth mode */
1486 tmp = usb_endpoint_maxp(ep->desc); 1486 tmp = usb_endpoint_maxp_mult(ep->desc);
1487 tmp = (tmp >> 11) & 0x03;
1488 tmp *= 8 /* applies to entire frame */; 1487 tmp *= 8 /* applies to entire frame */;
1489 limit += limit * tmp; 1488 limit += limit * tmp;
1490 } 1489 }
diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c b/drivers/usb/gadget/udc/fsl_udc_core.c
index aab5221d6c2e..71094e479a96 100644
--- a/drivers/usb/gadget/udc/fsl_udc_core.c
+++ b/drivers/usb/gadget/udc/fsl_udc_core.c
@@ -585,8 +585,7 @@ static int fsl_ep_enable(struct usb_ep *_ep,
585 break; 585 break;
586 case USB_ENDPOINT_XFER_ISOC: 586 case USB_ENDPOINT_XFER_ISOC:
587 /* Calculate transactions needed for high bandwidth iso */ 587 /* Calculate transactions needed for high bandwidth iso */
588 mult = (unsigned char)(1 + ((max >> 11) & 0x03)); 588 mult = usb_endpoint_maxp_mult(desc);
589 max = max & 0x7ff; /* bit 0~10 */
590 /* 3 transactions at most */ 589 /* 3 transactions at most */
591 if (mult > 3) 590 if (mult > 3)
592 goto en_done; 591 goto en_done;
diff --git a/drivers/usb/gadget/udc/fsl_usb2_udc.h b/drivers/usb/gadget/udc/fsl_usb2_udc.h
index 84715625b2b3..e92b8408b6f6 100644
--- a/drivers/usb/gadget/udc/fsl_usb2_udc.h
+++ b/drivers/usb/gadget/udc/fsl_usb2_udc.h
@@ -554,7 +554,7 @@ static void dump_msg(const char *label, const u8 * buf, unsigned int length)
554#endif 554#endif
555 555
556#define ERR(stuff...) pr_err("udc: " stuff) 556#define ERR(stuff...) pr_err("udc: " stuff)
557#define WARNING(stuff...) pr_warning("udc: " stuff) 557#define WARNING(stuff...) pr_warn("udc: " stuff)
558#define INFO(stuff...) pr_info("udc: " stuff) 558#define INFO(stuff...) pr_info("udc: " stuff)
559 559
560/*-------------------------------------------------------------------------*/ 560/*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/gadget/udc/fusb300_udc.c b/drivers/usb/gadget/udc/fusb300_udc.c
index 948845c90e47..42ff308578df 100644
--- a/drivers/usb/gadget/udc/fusb300_udc.c
+++ b/drivers/usb/gadget/udc/fusb300_udc.c
@@ -218,7 +218,7 @@ static int config_ep(struct fusb300_ep *ep,
218 (info.type == USB_ENDPOINT_XFER_ISOC)) { 218 (info.type == USB_ENDPOINT_XFER_ISOC)) {
219 info.interval = desc->bInterval; 219 info.interval = desc->bInterval;
220 if (info.type == USB_ENDPOINT_XFER_ISOC) 220 if (info.type == USB_ENDPOINT_XFER_ISOC)
221 info.bw_num = ((desc->wMaxPacketSize & 0x1800) >> 11); 221 info.bw_num = usb_endpoint_maxp_mult(desc);
222 } 222 }
223 223
224 ep_fifo_setting(fusb300, info); 224 ep_fifo_setting(fusb300, info);
diff --git a/drivers/usb/gadget/udc/gr_udc.c b/drivers/usb/gadget/udc/gr_udc.c
index 39b7136d31d9..b16f8af34050 100644
--- a/drivers/usb/gadget/udc/gr_udc.c
+++ b/drivers/usb/gadget/udc/gr_udc.c
@@ -1539,7 +1539,7 @@ static int gr_ep_enable(struct usb_ep *_ep,
1539 * additional transactions. 1539 * additional transactions.
1540 */ 1540 */
1541 max = 0x7ff & usb_endpoint_maxp(desc); 1541 max = 0x7ff & usb_endpoint_maxp(desc);
1542 nt = 0x3 & (usb_endpoint_maxp(desc) >> 11); 1542 nt = usb_endpoint_maxp_mult(desc) - 1;
1543 buffer_size = GR_BUFFER_SIZE(epctrl); 1543 buffer_size = GR_BUFFER_SIZE(epctrl);
1544 if (nt && (mode == 0 || mode == 2)) { 1544 if (nt && (mode == 0 || mode == 2)) {
1545 dev_err(dev->dev, 1545 dev_err(dev->dev,
diff --git a/drivers/usb/gadget/udc/m66592-udc.c b/drivers/usb/gadget/udc/m66592-udc.c
index 6e977dc22570..de3e03483659 100644
--- a/drivers/usb/gadget/udc/m66592-udc.c
+++ b/drivers/usb/gadget/udc/m66592-udc.c
@@ -637,7 +637,7 @@ static void init_controller(struct m66592 *m66592)
637 clock = M66592_XTAL48; 637 clock = M66592_XTAL48;
638 break; 638 break;
639 default: 639 default:
640 pr_warning("m66592-udc: xtal configuration error\n"); 640 pr_warn("m66592-udc: xtal configuration error\n");
641 clock = 0; 641 clock = 0;
642 } 642 }
643 643
@@ -649,7 +649,7 @@ static void init_controller(struct m66592 *m66592)
649 irq_sense = 0; 649 irq_sense = 0;
650 break; 650 break;
651 default: 651 default:
652 pr_warning("m66592-udc: irq trigger config error\n"); 652 pr_warn("m66592-udc: irq trigger config error\n");
653 irq_sense = 0; 653 irq_sense = 0;
654 } 654 }
655 655
diff --git a/drivers/usb/gadget/udc/mv_u3d_core.c b/drivers/usb/gadget/udc/mv_u3d_core.c
index b9e19a591322..8d726bd767fd 100644
--- a/drivers/usb/gadget/udc/mv_u3d_core.c
+++ b/drivers/usb/gadget/udc/mv_u3d_core.c
@@ -462,6 +462,12 @@ static int mv_u3d_req_to_trb(struct mv_u3d_req *req)
462 req->trb_head->trb_hw, 462 req->trb_head->trb_hw,
463 trb_num * sizeof(*trb_hw), 463 trb_num * sizeof(*trb_hw),
464 DMA_BIDIRECTIONAL); 464 DMA_BIDIRECTIONAL);
465 if (dma_mapping_error(u3d->gadget.dev.parent,
466 req->trb_head->trb_dma)) {
467 kfree(req->trb_head->trb_hw);
468 kfree(req->trb_head);
469 return -EFAULT;
470 }
465 471
466 req->chain = 1; 472 req->chain = 1;
467 } 473 }
@@ -487,30 +493,32 @@ mv_u3d_start_queue(struct mv_u3d_ep *ep)
487 ret = usb_gadget_map_request(&u3d->gadget, &req->req, 493 ret = usb_gadget_map_request(&u3d->gadget, &req->req,
488 mv_u3d_ep_dir(ep)); 494 mv_u3d_ep_dir(ep));
489 if (ret) 495 if (ret)
490 return ret; 496 goto break_processing;
491 497
492 req->req.status = -EINPROGRESS; 498 req->req.status = -EINPROGRESS;
493 req->req.actual = 0; 499 req->req.actual = 0;
494 req->trb_count = 0; 500 req->trb_count = 0;
495 501
496 /* build trbs and push them to device queue */ 502 /* build trbs */
497 if (!mv_u3d_req_to_trb(req)) { 503 ret = mv_u3d_req_to_trb(req);
498 ret = mv_u3d_queue_trb(ep, req); 504 if (ret) {
499 if (ret) {
500 ep->processing = 0;
501 return ret;
502 }
503 } else {
504 ep->processing = 0;
505 dev_err(u3d->dev, "%s, mv_u3d_req_to_trb fail\n", __func__); 505 dev_err(u3d->dev, "%s, mv_u3d_req_to_trb fail\n", __func__);
506 return -ENOMEM; 506 goto break_processing;
507 } 507 }
508 508
509 /* and push them to device queue */
510 ret = mv_u3d_queue_trb(ep, req);
511 if (ret)
512 goto break_processing;
513
509 /* irq handler advances the queue */ 514 /* irq handler advances the queue */
510 if (req) 515 list_add_tail(&req->queue, &ep->queue);
511 list_add_tail(&req->queue, &ep->queue);
512 516
513 return 0; 517 return 0;
518
519break_processing:
520 ep->processing = 0;
521 return ret;
514} 522}
515 523
516static int mv_u3d_ep_enable(struct usb_ep *_ep, 524static int mv_u3d_ep_enable(struct usb_ep *_ep,
diff --git a/drivers/usb/gadget/udc/mv_udc_core.c b/drivers/usb/gadget/udc/mv_udc_core.c
index ce73b3552269..d82a91bddbd9 100644
--- a/drivers/usb/gadget/udc/mv_udc_core.c
+++ b/drivers/usb/gadget/udc/mv_udc_core.c
@@ -494,8 +494,7 @@ static int mv_ep_enable(struct usb_ep *_ep,
494 break; 494 break;
495 case USB_ENDPOINT_XFER_ISOC: 495 case USB_ENDPOINT_XFER_ISOC:
496 /* Calculate transactions needed for high bandwidth iso */ 496 /* Calculate transactions needed for high bandwidth iso */
497 mult = (unsigned char)(1 + ((max >> 11) & 0x03)); 497 mult = usb_endpoint_maxp_mult(desc);
498 max = max & 0x7ff; /* bit 0~10 */
499 /* 3 transactions at most */ 498 /* 3 transactions at most */
500 if (mult > 3) 499 if (mult > 3)
501 goto en_done; 500 goto en_done;
diff --git a/drivers/usb/gadget/udc/net2272.c b/drivers/usb/gadget/udc/net2272.c
index 7c6113432093..078c91d546e0 100644
--- a/drivers/usb/gadget/udc/net2272.c
+++ b/drivers/usb/gadget/udc/net2272.c
@@ -202,10 +202,10 @@ net2272_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
202 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) 202 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
203 return -ESHUTDOWN; 203 return -ESHUTDOWN;
204 204
205 max = usb_endpoint_maxp(desc) & 0x1fff; 205 max = usb_endpoint_maxp(desc);
206 206
207 spin_lock_irqsave(&dev->lock, flags); 207 spin_lock_irqsave(&dev->lock, flags);
208 _ep->maxpacket = max & 0x7fff; 208 _ep->maxpacket = max;
209 ep->desc = desc; 209 ep->desc = desc;
210 210
211 /* net2272_ep_reset() has already been called */ 211 /* net2272_ep_reset() has already been called */
diff --git a/drivers/usb/gadget/udc/net2280.c b/drivers/usb/gadget/udc/net2280.c
index 61c938c36d88..85504419ab31 100644
--- a/drivers/usb/gadget/udc/net2280.c
+++ b/drivers/usb/gadget/udc/net2280.c
@@ -224,14 +224,14 @@ net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
224 } 224 }
225 225
226 /* sanity check ep-e/ep-f since their fifos are small */ 226 /* sanity check ep-e/ep-f since their fifos are small */
227 max = usb_endpoint_maxp(desc) & 0x1fff; 227 max = usb_endpoint_maxp(desc);
228 if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) { 228 if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
229 ret = -ERANGE; 229 ret = -ERANGE;
230 goto print_err; 230 goto print_err;
231 } 231 }
232 232
233 spin_lock_irqsave(&dev->lock, flags); 233 spin_lock_irqsave(&dev->lock, flags);
234 _ep->maxpacket = max & 0x7ff; 234 _ep->maxpacket = max;
235 ep->desc = desc; 235 ep->desc = desc;
236 236
237 /* ep_reset() has already been called */ 237 /* ep_reset() has already been called */
@@ -1839,7 +1839,7 @@ static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
1839 ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK, 1839 ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
1840 (t & USB_DIR_IN) ? "in" : "out", 1840 (t & USB_DIR_IN) ? "in" : "out",
1841 type_string(d->bmAttributes), 1841 type_string(d->bmAttributes),
1842 usb_endpoint_maxp(d) & 0x1fff, 1842 usb_endpoint_maxp(d),
1843 ep->dma ? "dma" : "pio", ep->fifo_size 1843 ep->dma ? "dma" : "pio", ep->fifo_size
1844 ); 1844 );
1845 } else /* ep0 should only have one transfer queued */ 1845 } else /* ep0 should only have one transfer queued */
diff --git a/drivers/usb/gadget/udc/omap_udc.h b/drivers/usb/gadget/udc/omap_udc.h
index cfadeb5fc5de..26974196cf44 100644
--- a/drivers/usb/gadget/udc/omap_udc.h
+++ b/drivers/usb/gadget/udc/omap_udc.h
@@ -187,7 +187,7 @@ struct omap_udc {
187#endif 187#endif
188 188
189#define ERR(stuff...) pr_err("udc: " stuff) 189#define ERR(stuff...) pr_err("udc: " stuff)
190#define WARNING(stuff...) pr_warning("udc: " stuff) 190#define WARNING(stuff...) pr_warn("udc: " stuff)
191#define INFO(stuff...) pr_info("udc: " stuff) 191#define INFO(stuff...) pr_info("udc: " stuff)
192#define DBG(stuff...) pr_debug("udc: " stuff) 192#define DBG(stuff...) pr_debug("udc: " stuff)
193 193
diff --git a/drivers/usb/gadget/udc/pxa25x_udc.h b/drivers/usb/gadget/udc/pxa25x_udc.h
index 4b8b72d7ab37..a458bec2536d 100644
--- a/drivers/usb/gadget/udc/pxa25x_udc.h
+++ b/drivers/usb/gadget/udc/pxa25x_udc.h
@@ -248,7 +248,7 @@ dump_state(struct pxa25x_udc *dev)
248#define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0) 248#define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)
249 249
250#define ERR(stuff...) pr_err("udc: " stuff) 250#define ERR(stuff...) pr_err("udc: " stuff)
251#define WARNING(stuff...) pr_warning("udc: " stuff) 251#define WARNING(stuff...) pr_warn("udc: " stuff)
252#define INFO(stuff...) pr_info("udc: " stuff) 252#define INFO(stuff...) pr_info("udc: " stuff)
253 253
254 254
diff --git a/drivers/usb/gadget/udc/s3c2410_udc.c b/drivers/usb/gadget/udc/s3c2410_udc.c
index eb3571ee59e3..4643a01262b4 100644
--- a/drivers/usb/gadget/udc/s3c2410_udc.c
+++ b/drivers/usb/gadget/udc/s3c2410_udc.c
@@ -1047,10 +1047,10 @@ static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1047 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) 1047 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1048 return -ESHUTDOWN; 1048 return -ESHUTDOWN;
1049 1049
1050 max = usb_endpoint_maxp(desc) & 0x1fff; 1050 max = usb_endpoint_maxp(desc);
1051 1051
1052 local_irq_save(flags); 1052 local_irq_save(flags);
1053 _ep->maxpacket = max & 0x7ff; 1053 _ep->maxpacket = max;
1054 ep->ep.desc = desc; 1054 ep->ep.desc = desc;
1055 ep->halted = 0; 1055 ep->halted = 0;
1056 ep->bEndpointAddress = desc->bEndpointAddress; 1056 ep->bEndpointAddress = desc->bEndpointAddress;
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0b80cee30da4..6361fc739306 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -479,9 +479,10 @@ config USB_OHCI_HCD_OMAP3
479 OMAP3 and later chips. 479 OMAP3 and later chips.
480 480
481config USB_OHCI_HCD_DAVINCI 481config USB_OHCI_HCD_DAVINCI
482 bool "OHCI support for TI DaVinci DA8xx" 482 tristate "OHCI support for TI DaVinci DA8xx"
483 depends on ARCH_DAVINCI_DA8XX 483 depends on ARCH_DAVINCI_DA8XX
484 depends on USB_OHCI_HCD=y 484 depends on USB_OHCI_HCD
485 select PHY_DA8XX_USB
485 default y 486 default y
486 help 487 help
487 Enables support for the DaVinci DA8xx integrated OHCI 488 Enables support for the DaVinci DA8xx integrated OHCI
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 6ef785b0ea8f..2644537b7bcf 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_USB_OHCI_HCD_AT91) += ohci-at91.o
61obj-$(CONFIG_USB_OHCI_HCD_S3C2410) += ohci-s3c2410.o 61obj-$(CONFIG_USB_OHCI_HCD_S3C2410) += ohci-s3c2410.o
62obj-$(CONFIG_USB_OHCI_HCD_LPC32XX) += ohci-nxp.o 62obj-$(CONFIG_USB_OHCI_HCD_LPC32XX) += ohci-nxp.o
63obj-$(CONFIG_USB_OHCI_HCD_PXA27X) += ohci-pxa27x.o 63obj-$(CONFIG_USB_OHCI_HCD_PXA27X) += ohci-pxa27x.o
64obj-$(CONFIG_USB_OHCI_HCD_DAVINCI) += ohci-da8xx.o
64 65
65obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o 66obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o
66obj-$(CONFIG_USB_FHCI_HCD) += fhci.o 67obj-$(CONFIG_USB_FHCI_HCD) += fhci.o
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 9f5ffb629973..91701cc68082 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -286,6 +286,9 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
286 if (pdata->has_fsl_erratum_a005275 == 1) 286 if (pdata->has_fsl_erratum_a005275 == 1)
287 ehci->has_fsl_hs_errata = 1; 287 ehci->has_fsl_hs_errata = 1;
288 288
289 if (pdata->has_fsl_erratum_a005697 == 1)
290 ehci->has_fsl_susp_errata = 1;
291
289 if ((pdata->operating_mode == FSL_USB2_DR_HOST) || 292 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
290 (pdata->operating_mode == FSL_USB2_DR_OTG)) 293 (pdata->operating_mode == FSL_USB2_DR_OTG))
291 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0)) 294 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 74f62d68f013..df169c8e7225 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -310,6 +310,14 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
310 } 310 }
311 spin_unlock_irq(&ehci->lock); 311 spin_unlock_irq(&ehci->lock);
312 312
313 if (changed && ehci_has_fsl_susp_errata(ehci))
314 /*
315 * Wait for at least 10 millisecondes to ensure the controller
316 * enter the suspend status before initiating a port resume
317 * using the Force Port Resume bit (Not-EHCI compatible).
318 */
319 usleep_range(10000, 20000);
320
313 if ((changed && ehci->has_tdi_phy_lpm) || fs_idle_delay) { 321 if ((changed && ehci->has_tdi_phy_lpm) || fs_idle_delay) {
314 /* 322 /*
315 * Wait for HCD to enter low-power mode or for the bus 323 * Wait for HCD to enter low-power mode or for the bus
@@ -1200,6 +1208,12 @@ int ehci_hub_control(
1200 wIndex, (temp1 & HOSTPC_PHCD) ? 1208 wIndex, (temp1 & HOSTPC_PHCD) ?
1201 "succeeded" : "failed"); 1209 "succeeded" : "failed");
1202 } 1210 }
1211 if (ehci_has_fsl_susp_errata(ehci)) {
1212 /* 10ms for HCD enter suspend */
1213 spin_unlock_irqrestore(&ehci->lock, flags);
1214 usleep_range(10000, 20000);
1215 spin_lock_irqsave(&ehci->lock, flags);
1216 }
1203 set_bit(wIndex, &ehci->suspended_ports); 1217 set_bit(wIndex, &ehci->suspended_ports);
1204 break; 1218 break;
1205 case USB_PORT_FEAT_POWER: 1219 case USB_PORT_FEAT_POWER:
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 3b3649d88c5f..93326974ff4b 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -258,9 +258,8 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
258 /* These workarounds need to be applied after ehci_setup() */ 258 /* These workarounds need to be applied after ehci_setup() */
259 switch (pdev->vendor) { 259 switch (pdev->vendor) {
260 case PCI_VENDOR_ID_NEC: 260 case PCI_VENDOR_ID_NEC:
261 ehci->need_io_watchdog = 0;
262 break;
263 case PCI_VENDOR_ID_INTEL: 261 case PCI_VENDOR_ID_INTEL:
262 case PCI_VENDOR_ID_AMD:
264 ehci->need_io_watchdog = 0; 263 ehci->need_io_watchdog = 0;
265 break; 264 break;
266 case PCI_VENDOR_ID_NVIDIA: 265 case PCI_VENDOR_ID_NVIDIA:
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index eca3710d8fc4..8f3f055c05fa 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -550,11 +550,6 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
550 550
551/*-------------------------------------------------------------------------*/ 551/*-------------------------------------------------------------------------*/
552 552
553// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
554#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
555// ... and packet size, for any kind of endpoint descriptor
556#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
557
558/* 553/*
559 * reverse of qh_urb_transaction: free a list of TDs. 554 * reverse of qh_urb_transaction: free a list of TDs.
560 * used for cleanup after errors, before HC sees an URB's TDs. 555 * used for cleanup after errors, before HC sees an URB's TDs.
@@ -651,7 +646,7 @@ qh_urb_transaction (
651 token |= (1 /* "in" */ << 8); 646 token |= (1 /* "in" */ << 8);
652 /* else it's already initted to "out" pid (0 << 8) */ 647 /* else it's already initted to "out" pid (0 << 8) */
653 648
654 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input)); 649 maxpacket = usb_maxpacket(urb->dev, urb->pipe, !is_input);
655 650
656 /* 651 /*
657 * buffer gets wrapped in one or more qtds; 652 * buffer gets wrapped in one or more qtds;
@@ -770,9 +765,11 @@ qh_make (
770 gfp_t flags 765 gfp_t flags
771) { 766) {
772 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags); 767 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
768 struct usb_host_endpoint *ep;
773 u32 info1 = 0, info2 = 0; 769 u32 info1 = 0, info2 = 0;
774 int is_input, type; 770 int is_input, type;
775 int maxp = 0; 771 int maxp = 0;
772 int mult;
776 struct usb_tt *tt = urb->dev->tt; 773 struct usb_tt *tt = urb->dev->tt;
777 struct ehci_qh_hw *hw; 774 struct ehci_qh_hw *hw;
778 775
@@ -787,13 +784,15 @@ qh_make (
787 784
788 is_input = usb_pipein (urb->pipe); 785 is_input = usb_pipein (urb->pipe);
789 type = usb_pipetype (urb->pipe); 786 type = usb_pipetype (urb->pipe);
790 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input); 787 ep = usb_pipe_endpoint (urb->dev, urb->pipe);
788 maxp = usb_endpoint_maxp (&ep->desc);
789 mult = usb_endpoint_maxp_mult (&ep->desc);
791 790
792 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth 791 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
793 * acts like up to 3KB, but is built from smaller packets. 792 * acts like up to 3KB, but is built from smaller packets.
794 */ 793 */
795 if (max_packet(maxp) > 1024) { 794 if (maxp > 1024) {
796 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp)); 795 ehci_dbg(ehci, "bogus qh maxpacket %d\n", maxp);
797 goto done; 796 goto done;
798 } 797 }
799 798
@@ -809,8 +808,7 @@ qh_make (
809 unsigned tmp; 808 unsigned tmp;
810 809
811 qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH, 810 qh->ps.usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
812 is_input, 0, 811 is_input, 0, mult * maxp));
813 hb_mult(maxp) * max_packet(maxp)));
814 qh->ps.phase = NO_FRAME; 812 qh->ps.phase = NO_FRAME;
815 813
816 if (urb->dev->speed == USB_SPEED_HIGH) { 814 if (urb->dev->speed == USB_SPEED_HIGH) {
@@ -854,7 +852,7 @@ qh_make (
854 think_time = tt ? tt->think_time : 0; 852 think_time = tt ? tt->think_time : 0;
855 qh->ps.tt_usecs = NS_TO_US(think_time + 853 qh->ps.tt_usecs = NS_TO_US(think_time +
856 usb_calc_bus_time (urb->dev->speed, 854 usb_calc_bus_time (urb->dev->speed,
857 is_input, 0, max_packet (maxp))); 855 is_input, 0, maxp));
858 if (urb->interval > ehci->periodic_size) 856 if (urb->interval > ehci->periodic_size)
859 urb->interval = ehci->periodic_size; 857 urb->interval = ehci->periodic_size;
860 qh->ps.period = urb->interval; 858 qh->ps.period = urb->interval;
@@ -925,11 +923,11 @@ qh_make (
925 * to help them do so. So now people expect to use 923 * to help them do so. So now people expect to use
926 * such nonconformant devices with Linux too; sigh. 924 * such nonconformant devices with Linux too; sigh.
927 */ 925 */
928 info1 |= max_packet(maxp) << 16; 926 info1 |= maxp << 16;
929 info2 |= (EHCI_TUNE_MULT_HS << 30); 927 info2 |= (EHCI_TUNE_MULT_HS << 30);
930 } else { /* PIPE_INTERRUPT */ 928 } else { /* PIPE_INTERRUPT */
931 info1 |= max_packet (maxp) << 16; 929 info1 |= maxp << 16;
932 info2 |= hb_mult (maxp) << 30; 930 info2 |= mult << 30;
933 } 931 }
934 break; 932 break;
935 default: 933 default:
@@ -1221,7 +1219,7 @@ static int submit_single_step_set_feature(
1221 1219
1222 token |= (1 /* "in" */ << 8); /*This is IN stage*/ 1220 token |= (1 /* "in" */ << 8); /*This is IN stage*/
1223 1221
1224 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, 0)); 1222 maxpacket = usb_maxpacket(urb->dev, urb->pipe, 0);
1225 1223
1226 qtd_fill(ehci, qtd, buf, len, token, maxpacket); 1224 qtd_fill(ehci, qtd, buf, len, token, maxpacket);
1227 1225
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
index 1dfe54f14737..980a6b3b2da2 100644
--- a/drivers/usb/host/ehci-sched.c
+++ b/drivers/usb/host/ehci-sched.c
@@ -1064,11 +1064,10 @@ iso_stream_init(
1064 1064
1065 /* knows about ITD vs SITD */ 1065 /* knows about ITD vs SITD */
1066 if (dev->speed == USB_SPEED_HIGH) { 1066 if (dev->speed == USB_SPEED_HIGH) {
1067 unsigned multi = hb_mult(maxp); 1067 unsigned multi = usb_endpoint_maxp_mult(&urb->ep->desc);
1068 1068
1069 stream->highspeed = 1; 1069 stream->highspeed = 1;
1070 1070
1071 maxp = max_packet(maxp);
1072 buf1 |= maxp; 1071 buf1 |= maxp;
1073 maxp *= multi; 1072 maxp *= multi;
1074 1073
diff --git a/drivers/usb/host/ehci-w90x900.c b/drivers/usb/host/ehci-w90x900.c
index e42a29e8e229..63b9d0c67963 100644
--- a/drivers/usb/host/ehci-w90x900.c
+++ b/drivers/usb/host/ehci-w90x900.c
@@ -33,8 +33,7 @@ static const char hcd_name[] = "ehci-w90x900 ";
33 33
34static struct hc_driver __read_mostly ehci_w90x900_hc_driver; 34static struct hc_driver __read_mostly ehci_w90x900_hc_driver;
35 35
36static int usb_w90x900_probe(const struct hc_driver *driver, 36static int ehci_w90x900_probe(struct platform_device *pdev)
37 struct platform_device *pdev)
38{ 37{
39 struct usb_hcd *hcd; 38 struct usb_hcd *hcd;
40 struct ehci_hcd *ehci; 39 struct ehci_hcd *ehci;
@@ -42,7 +41,8 @@ static int usb_w90x900_probe(const struct hc_driver *driver,
42 int retval = 0, irq; 41 int retval = 0, irq;
43 unsigned long val; 42 unsigned long val;
44 43
45 hcd = usb_create_hcd(driver, &pdev->dev, "w90x900 EHCI"); 44 hcd = usb_create_hcd(&ehci_w90x900_hc_driver,
45 &pdev->dev, "w90x900 EHCI");
46 if (!hcd) { 46 if (!hcd) {
47 retval = -ENOMEM; 47 retval = -ENOMEM;
48 goto err1; 48 goto err1;
@@ -63,9 +63,9 @@ static int usb_w90x900_probe(const struct hc_driver *driver,
63 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); 63 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
64 64
65 /* enable PHY 0,1,the regs only apply to w90p910 65 /* enable PHY 0,1,the regs only apply to w90p910
66 * 0xA4,0xA8 were offsets of PHY0 and PHY1 controller of 66 * 0xA4,0xA8 were offsets of PHY0 and PHY1 controller of
67 * w90p910 IC relative to ehci->regs. 67 * w90p910 IC relative to ehci->regs.
68 */ 68 */
69 val = __raw_readl(ehci->regs+PHY0_CTR); 69 val = __raw_readl(ehci->regs+PHY0_CTR);
70 val |= ENPHY; 70 val |= ENPHY;
71 __raw_writel(val, ehci->regs+PHY0_CTR); 71 __raw_writel(val, ehci->regs+PHY0_CTR);
@@ -92,26 +92,12 @@ err1:
92 return retval; 92 return retval;
93} 93}
94 94
95static void usb_w90x900_remove(struct usb_hcd *hcd,
96 struct platform_device *pdev)
97{
98 usb_remove_hcd(hcd);
99 usb_put_hcd(hcd);
100}
101
102static int ehci_w90x900_probe(struct platform_device *pdev)
103{
104 if (usb_disabled())
105 return -ENODEV;
106
107 return usb_w90x900_probe(&ehci_w90x900_hc_driver, pdev);
108}
109
110static int ehci_w90x900_remove(struct platform_device *pdev) 95static int ehci_w90x900_remove(struct platform_device *pdev)
111{ 96{
112 struct usb_hcd *hcd = platform_get_drvdata(pdev); 97 struct usb_hcd *hcd = platform_get_drvdata(pdev);
113 98
114 usb_w90x900_remove(hcd, pdev); 99 usb_remove_hcd(hcd);
100 usb_put_hcd(hcd);
115 101
116 return 0; 102 return 0;
117} 103}
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 3f3b74aeca97..a8e36170d8b8 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -219,6 +219,7 @@ struct ehci_hcd { /* one per controller */
219 unsigned no_selective_suspend:1; 219 unsigned no_selective_suspend:1;
220 unsigned has_fsl_port_bug:1; /* FreeScale */ 220 unsigned has_fsl_port_bug:1; /* FreeScale */
221 unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */ 221 unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
222 unsigned has_fsl_susp_errata:1; /* NXP SUSP quirk */
222 unsigned big_endian_mmio:1; 223 unsigned big_endian_mmio:1;
223 unsigned big_endian_desc:1; 224 unsigned big_endian_desc:1;
224 unsigned big_endian_capbase:1; 225 unsigned big_endian_capbase:1;
@@ -710,6 +711,13 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
710#endif 711#endif
711 712
712/* 713/*
714 * Some Freescale/NXP processors have an erratum (USB A-005697)
715 * in which we need to wait for 10ms for bus to enter suspend mode
716 * after setting SUSP bit.
717 */
718#define ehci_has_fsl_susp_errata(e) ((e)->has_fsl_susp_errata)
719
720/*
713 * While most USB host controllers implement their registers in 721 * While most USB host controllers implement their registers in
714 * little-endian format, a minority (celleb companion chip) implement 722 * little-endian format, a minority (celleb companion chip) implement
715 * them in big endian format. 723 * them in big endian format.
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index f07ccb25bc24..e90ddb530765 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -226,6 +226,8 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device *ofdev)
226 of_property_read_bool(np, "fsl,usb-erratum-a007792"); 226 of_property_read_bool(np, "fsl,usb-erratum-a007792");
227 pdata->has_fsl_erratum_a005275 = 227 pdata->has_fsl_erratum_a005275 =
228 of_property_read_bool(np, "fsl,usb-erratum-a005275"); 228 of_property_read_bool(np, "fsl,usb-erratum-a005275");
229 pdata->has_fsl_erratum_a005697 =
230 of_property_read_bool(np, "fsl,usb_erratum-a005697");
229 231
230 /* 232 /*
231 * Determine whether phy_clk_valid needs to be checked 233 * Determine whether phy_clk_valid needs to be checked
diff --git a/drivers/usb/host/isp1362-hcd.c b/drivers/usb/host/isp1362-hcd.c
index 6cf82ee460a6..0f2b4b358e1a 100644
--- a/drivers/usb/host/isp1362-hcd.c
+++ b/drivers/usb/host/isp1362-hcd.c
@@ -147,7 +147,7 @@ static inline struct isp1362_ep_queue *get_ptd_queue(struct isp1362_hcd *isp1362
147 if (epq) 147 if (epq)
148 DBG(1, "%s: PTD $%04x is on %s queue\n", __func__, offset, epq->name); 148 DBG(1, "%s: PTD $%04x is on %s queue\n", __func__, offset, epq->name);
149 else 149 else
150 pr_warning("%s: invalid PTD $%04x\n", __func__, offset); 150 pr_warn("%s: invalid PTD $%04x\n", __func__, offset);
151 151
152 return epq; 152 return epq;
153} 153}
@@ -157,8 +157,9 @@ static inline int get_ptd_offset(struct isp1362_ep_queue *epq, u8 index)
157 int offset; 157 int offset;
158 158
159 if (index * epq->blk_size > epq->buf_size) { 159 if (index * epq->blk_size > epq->buf_size) {
160 pr_warning("%s: Bad %s index %d(%d)\n", __func__, epq->name, index, 160 pr_warn("%s: Bad %s index %d(%d)\n",
161 epq->buf_size / epq->blk_size); 161 __func__, epq->name, index,
162 epq->buf_size / epq->blk_size);
162 return -EINVAL; 163 return -EINVAL;
163 } 164 }
164 offset = epq->buf_start + index * epq->blk_size; 165 offset = epq->buf_start + index * epq->blk_size;
@@ -902,8 +903,8 @@ static void start_iso_transfers(struct isp1362_hcd *isp1362_hcd)
902 903
903 ptd_offset = next_ptd(epq, ep); 904 ptd_offset = next_ptd(epq, ep);
904 if (ptd_offset < 0) { 905 if (ptd_offset < 0) {
905 pr_warning("%s: req %d No more %s PTD buffers available\n", __func__, 906 pr_warn("%s: req %d No more %s PTD buffers available\n",
906 ep->num_req, epq->name); 907 __func__, ep->num_req, epq->name);
907 break; 908 break;
908 } 909 }
909 } 910 }
@@ -973,8 +974,8 @@ static void finish_transfers(struct isp1362_hcd *isp1362_hcd, unsigned long done
973 break; 974 break;
974 } 975 }
975 if (done_map) 976 if (done_map)
976 pr_warning("%s: done_map not clear: %08lx:%08lx\n", __func__, done_map, 977 pr_warn("%s: done_map not clear: %08lx:%08lx\n",
977 epq->skip_map); 978 __func__, done_map, epq->skip_map);
978 atomic_dec(&epq->finishing); 979 atomic_dec(&epq->finishing);
979} 980}
980 981
@@ -1433,7 +1434,7 @@ static int isp1362_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1433 } else 1434 } else
1434 DBG(1, "%s: urb %p active; wait4irq\n", __func__, urb); 1435 DBG(1, "%s: urb %p active; wait4irq\n", __func__, urb);
1435 } else { 1436 } else {
1436 pr_warning("%s: No EP in URB %p\n", __func__, urb); 1437 pr_warn("%s: No EP in URB %p\n", __func__, urb);
1437 retval = -EINVAL; 1438 retval = -EINVAL;
1438 } 1439 }
1439done: 1440done:
@@ -1748,10 +1749,10 @@ static int isp1362_bus_suspend(struct usb_hcd *hcd)
1748 /* FALL THROUGH */ 1749 /* FALL THROUGH */
1749 case OHCI_USB_RESET: 1750 case OHCI_USB_RESET:
1750 status = -EBUSY; 1751 status = -EBUSY;
1751 pr_warning("%s: needs reinit!\n", __func__); 1752 pr_warn("%s: needs reinit!\n", __func__);
1752 goto done; 1753 goto done;
1753 case OHCI_USB_SUSPEND: 1754 case OHCI_USB_SUSPEND:
1754 pr_warning("%s: already suspended?\n", __func__); 1755 pr_warn("%s: already suspended?\n", __func__);
1755 goto done; 1756 goto done;
1756 } 1757 }
1757 DBG(0, "%s: suspend root hub\n", __func__); 1758 DBG(0, "%s: suspend root hub\n", __func__);
@@ -1839,7 +1840,7 @@ static int isp1362_bus_resume(struct usb_hcd *hcd)
1839 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL); 1840 isp1362_hcd->hc_control = isp1362_read_reg32(isp1362_hcd, HCCONTROL);
1840 pr_info("%s: HCCONTROL: %08x\n", __func__, isp1362_hcd->hc_control); 1841 pr_info("%s: HCCONTROL: %08x\n", __func__, isp1362_hcd->hc_control);
1841 if (hcd->state == HC_STATE_RESUMING) { 1842 if (hcd->state == HC_STATE_RESUMING) {
1842 pr_warning("%s: duplicate resume\n", __func__); 1843 pr_warn("%s: duplicate resume\n", __func__);
1843 status = 0; 1844 status = 0;
1844 } else 1845 } else
1845 switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) { 1846 switch (isp1362_hcd->hc_control & OHCI_CTRL_HCFS) {
@@ -2474,8 +2475,8 @@ static int isp1362_chip_test(struct isp1362_hcd *isp1362_hcd)
2474 __func__, offset); 2475 __func__, offset);
2475 break; 2476 break;
2476 } 2477 }
2477 pr_warning("%s: memory check with offset %02x ok after second read\n", 2478 pr_warn("%s: memory check with offset %02x ok after second read\n",
2478 __func__, offset); 2479 __func__, offset);
2479 } 2480 }
2480 } 2481 }
2481 kfree(ref); 2482 kfree(ref);
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index b38a228134df..be9e63836881 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -14,8 +14,8 @@
14 14
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/gpio/consumer.h>
17#include <linux/of_platform.h> 18#include <linux/of_platform.h>
18#include <linux/of_gpio.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/platform_data/atmel.h> 20#include <linux/platform_data/atmel.h>
21#include <linux/io.h> 21#include <linux/io.h>
@@ -39,8 +39,8 @@
39 39
40#define AT91_MAX_USBH_PORTS 3 40#define AT91_MAX_USBH_PORTS 3
41struct at91_usbh_data { 41struct at91_usbh_data {
42 int vbus_pin[AT91_MAX_USBH_PORTS]; /* port power-control pin */ 42 struct gpio_desc *vbus_pin[AT91_MAX_USBH_PORTS];
43 int overcurrent_pin[AT91_MAX_USBH_PORTS]; 43 struct gpio_desc *overcurrent_pin[AT91_MAX_USBH_PORTS];
44 u8 ports; /* number of ports on root hub */ 44 u8 ports; /* number of ports on root hub */
45 u8 overcurrent_supported; 45 u8 overcurrent_supported;
46 u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS]; 46 u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS];
@@ -68,8 +68,6 @@ static const struct ohci_driver_overrides ohci_at91_drv_overrides __initconst =
68 .extra_priv_size = sizeof(struct ohci_at91_priv), 68 .extra_priv_size = sizeof(struct ohci_at91_priv),
69}; 69};
70 70
71extern int usb_disabled(void);
72
73/*-------------------------------------------------------------------------*/ 71/*-------------------------------------------------------------------------*/
74 72
75static void at91_start_clock(struct ohci_at91_priv *ohci_at91) 73static void at91_start_clock(struct ohci_at91_priv *ohci_at91)
@@ -268,11 +266,8 @@ static void ohci_at91_usb_set_power(struct at91_usbh_data *pdata, int port, int
268 if (!valid_port(port)) 266 if (!valid_port(port))
269 return; 267 return;
270 268
271 if (!gpio_is_valid(pdata->vbus_pin[port])) 269 gpiod_set_value(pdata->vbus_pin[port],
272 return; 270 pdata->vbus_pin_active_low[port] ^ enable);
273
274 gpio_set_value(pdata->vbus_pin[port],
275 pdata->vbus_pin_active_low[port] ^ enable);
276} 271}
277 272
278static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port) 273static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port)
@@ -280,11 +275,8 @@ static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port)
280 if (!valid_port(port)) 275 if (!valid_port(port))
281 return -EINVAL; 276 return -EINVAL;
282 277
283 if (!gpio_is_valid(pdata->vbus_pin[port])) 278 return gpiod_get_value(pdata->vbus_pin[port]) ^
284 return -EINVAL; 279 pdata->vbus_pin_active_low[port];
285
286 return gpio_get_value(pdata->vbus_pin[port]) ^
287 pdata->vbus_pin_active_low[port];
288} 280}
289 281
290/* 282/*
@@ -474,16 +466,13 @@ static irqreturn_t ohci_hcd_at91_overcurrent_irq(int irq, void *data)
474{ 466{
475 struct platform_device *pdev = data; 467 struct platform_device *pdev = data;
476 struct at91_usbh_data *pdata = dev_get_platdata(&pdev->dev); 468 struct at91_usbh_data *pdata = dev_get_platdata(&pdev->dev);
477 int val, gpio, port; 469 int val, port;
478 470
479 /* From the GPIO notifying the over-current situation, find 471 /* From the GPIO notifying the over-current situation, find
480 * out the corresponding port */ 472 * out the corresponding port */
481 at91_for_each_port(port) { 473 at91_for_each_port(port) {
482 if (gpio_is_valid(pdata->overcurrent_pin[port]) && 474 if (gpiod_to_irq(pdata->overcurrent_pin[port]) == irq)
483 gpio_to_irq(pdata->overcurrent_pin[port]) == irq) {
484 gpio = pdata->overcurrent_pin[port];
485 break; 475 break;
486 }
487 } 476 }
488 477
489 if (port == AT91_MAX_USBH_PORTS) { 478 if (port == AT91_MAX_USBH_PORTS) {
@@ -491,7 +480,7 @@ static irqreturn_t ohci_hcd_at91_overcurrent_irq(int irq, void *data)
491 return IRQ_HANDLED; 480 return IRQ_HANDLED;
492 } 481 }
493 482
494 val = gpio_get_value(gpio); 483 val = gpiod_get_value(pdata->overcurrent_pin[port]);
495 484
496 /* When notified of an over-current situation, disable power 485 /* When notified of an over-current situation, disable power
497 on the corresponding port, and mark this port in 486 on the corresponding port, and mark this port in
@@ -522,9 +511,8 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
522 struct device_node *np = pdev->dev.of_node; 511 struct device_node *np = pdev->dev.of_node;
523 struct at91_usbh_data *pdata; 512 struct at91_usbh_data *pdata;
524 int i; 513 int i;
525 int gpio;
526 int ret; 514 int ret;
527 enum of_gpio_flags flags; 515 int err;
528 u32 ports; 516 u32 ports;
529 517
530 /* Right now device-tree probed devices don't get dma_mask set. 518 /* Right now device-tree probed devices don't get dma_mask set.
@@ -545,38 +533,16 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
545 pdata->ports = ports; 533 pdata->ports = ports;
546 534
547 at91_for_each_port(i) { 535 at91_for_each_port(i) {
548 /* 536 pdata->vbus_pin[i] = devm_gpiod_get_optional(&pdev->dev,
549 * do not configure PIO if not in relation with 537 "atmel,vbus-gpio",
550 * real USB port on board 538 GPIOD_IN);
551 */ 539 if (IS_ERR(pdata->vbus_pin[i])) {
552 if (i >= pdata->ports) { 540 err = PTR_ERR(pdata->vbus_pin[i]);
553 pdata->vbus_pin[i] = -EINVAL; 541 dev_err(&pdev->dev, "unable to claim gpio \"vbus\": %d\n", err);
554 pdata->overcurrent_pin[i] = -EINVAL;
555 continue; 542 continue;
556 } 543 }
557 544
558 gpio = of_get_named_gpio_flags(np, "atmel,vbus-gpio", i, 545 pdata->vbus_pin_active_low[i] = gpiod_get_value(pdata->vbus_pin[i]);
559 &flags);
560 pdata->vbus_pin[i] = gpio;
561 if (!gpio_is_valid(gpio))
562 continue;
563 pdata->vbus_pin_active_low[i] = flags & OF_GPIO_ACTIVE_LOW;
564
565 ret = gpio_request(gpio, "ohci_vbus");
566 if (ret) {
567 dev_err(&pdev->dev,
568 "can't request vbus gpio %d\n", gpio);
569 continue;
570 }
571 ret = gpio_direction_output(gpio,
572 !pdata->vbus_pin_active_low[i]);
573 if (ret) {
574 dev_err(&pdev->dev,
575 "can't put vbus gpio %d as output %d\n",
576 gpio, !pdata->vbus_pin_active_low[i]);
577 gpio_free(gpio);
578 continue;
579 }
580 546
581 ohci_at91_usb_set_power(pdata, i, 1); 547 ohci_at91_usb_set_power(pdata, i, 1);
582 } 548 }
@@ -586,37 +552,21 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
586 break; 552 break;
587 553
588 pdata->overcurrent_pin[i] = 554 pdata->overcurrent_pin[i] =
589 of_get_named_gpio_flags(np, "atmel,oc-gpio", i, &flags); 555 devm_gpiod_get_optional(&pdev->dev,
590 556 "atmel,oc-gpio", GPIOD_IN);
591 if (!gpio_is_valid(pdata->overcurrent_pin[i])) 557 if (IS_ERR(pdata->overcurrent_pin[i])) {
592 continue; 558 err = PTR_ERR(pdata->overcurrent_pin[i]);
593 gpio = pdata->overcurrent_pin[i]; 559 dev_err(&pdev->dev, "unable to claim gpio \"overcurrent\": %d\n", err);
594
595 ret = gpio_request(gpio, "ohci_overcurrent");
596 if (ret) {
597 dev_err(&pdev->dev,
598 "can't request overcurrent gpio %d\n",
599 gpio);
600 continue; 560 continue;
601 } 561 }
602 562
603 ret = gpio_direction_input(gpio); 563 ret = devm_request_irq(&pdev->dev,
604 if (ret) { 564 gpiod_to_irq(pdata->overcurrent_pin[i]),
605 dev_err(&pdev->dev, 565 ohci_hcd_at91_overcurrent_irq,
606 "can't configure overcurrent gpio %d as input\n", 566 IRQF_SHARED,
607 gpio); 567 "ohci_overcurrent", pdev);
608 gpio_free(gpio); 568 if (ret)
609 continue; 569 dev_info(&pdev->dev, "failed to request gpio \"overcurrent\" IRQ\n");
610 }
611
612 ret = request_irq(gpio_to_irq(gpio),
613 ohci_hcd_at91_overcurrent_irq,
614 IRQF_SHARED, "ohci_overcurrent", pdev);
615 if (ret) {
616 gpio_free(gpio);
617 dev_err(&pdev->dev,
618 "can't get gpio IRQ for overcurrent\n");
619 }
620 } 570 }
621 571
622 device_init_wakeup(&pdev->dev, 1); 572 device_init_wakeup(&pdev->dev, 1);
@@ -629,19 +579,8 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev)
629 int i; 579 int i;
630 580
631 if (pdata) { 581 if (pdata) {
632 at91_for_each_port(i) { 582 at91_for_each_port(i)
633 if (!gpio_is_valid(pdata->vbus_pin[i]))
634 continue;
635 ohci_at91_usb_set_power(pdata, i, 0); 583 ohci_at91_usb_set_power(pdata, i, 0);
636 gpio_free(pdata->vbus_pin[i]);
637 }
638
639 at91_for_each_port(i) {
640 if (!gpio_is_valid(pdata->overcurrent_pin[i]))
641 continue;
642 free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev);
643 gpio_free(pdata->overcurrent_pin[i]);
644 }
645 } 584 }
646 585
647 device_init_wakeup(&pdev->dev, 0); 586 device_init_wakeup(&pdev->dev, 0);
diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c
index e5c33bc98ea4..05da2cb59612 100644
--- a/drivers/usb/host/ohci-da8xx.c
+++ b/drivers/usb/host/ohci-da8xx.c
@@ -11,62 +11,192 @@
11 * kind, whether express or implied. 11 * kind, whether express or implied.
12 */ 12 */
13 13
14#include <linux/clk.h>
15#include <linux/io.h>
14#include <linux/interrupt.h> 16#include <linux/interrupt.h>
15#include <linux/jiffies.h> 17#include <linux/jiffies.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
16#include <linux/platform_device.h> 20#include <linux/platform_device.h>
17#include <linux/clk.h> 21#include <linux/phy/phy.h>
18
19#include <mach/da8xx.h>
20#include <linux/platform_data/usb-davinci.h> 22#include <linux/platform_data/usb-davinci.h>
23#include <linux/regulator/consumer.h>
24#include <linux/usb.h>
25#include <linux/usb/hcd.h>
26#include <asm/unaligned.h>
21 27
22#ifndef CONFIG_ARCH_DAVINCI_DA8XX 28#include "ohci.h"
23#error "This file is DA8xx bus glue. Define CONFIG_ARCH_DAVINCI_DA8XX."
24#endif
25 29
26#define CFGCHIP2 DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG) 30#define DRIVER_DESC "DA8XX"
31#define DRV_NAME "ohci-da8xx"
27 32
28static struct clk *usb11_clk; 33static struct hc_driver __read_mostly ohci_da8xx_hc_driver;
29static struct clk *usb20_clk; 34
35static int (*orig_ohci_hub_control)(struct usb_hcd *hcd, u16 typeReq,
36 u16 wValue, u16 wIndex, char *buf, u16 wLength);
37static int (*orig_ohci_hub_status_data)(struct usb_hcd *hcd, char *buf);
38
39struct da8xx_ohci_hcd {
40 struct usb_hcd *hcd;
41 struct clk *usb11_clk;
42 struct phy *usb11_phy;
43 struct regulator *vbus_reg;
44 struct notifier_block nb;
45 unsigned int reg_enabled;
46};
47
48#define to_da8xx_ohci(hcd) (struct da8xx_ohci_hcd *)(hcd_to_ohci(hcd)->priv)
30 49
31/* Over-current indicator change bitmask */ 50/* Over-current indicator change bitmask */
32static volatile u16 ocic_mask; 51static volatile u16 ocic_mask;
33 52
34static void ohci_da8xx_clock(int on) 53static int ohci_da8xx_enable(struct usb_hcd *hcd)
35{ 54{
36 u32 cfgchip2; 55 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
37 56 int ret;
38 cfgchip2 = __raw_readl(CFGCHIP2); 57
39 if (on) { 58 ret = clk_prepare_enable(da8xx_ohci->usb11_clk);
40 clk_enable(usb11_clk); 59 if (ret)
41 60 return ret;
42 /* 61
43 * If USB 1.1 reference clock is sourced from USB 2.0 PHY, we 62 ret = phy_init(da8xx_ohci->usb11_phy);
44 * need to enable the USB 2.0 module clocking, start its PHY, 63 if (ret)
45 * and not allow it to stop the clock during USB 2.0 suspend. 64 goto err_phy_init;
46 */ 65
47 if (!(cfgchip2 & CFGCHIP2_USB1PHYCLKMUX)) { 66 ret = phy_power_on(da8xx_ohci->usb11_phy);
48 clk_enable(usb20_clk); 67 if (ret)
49 68 goto err_phy_power_on;
50 cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN); 69
51 cfgchip2 |= CFGCHIP2_PHY_PLLON; 70 return 0;
52 __raw_writel(cfgchip2, CFGCHIP2); 71
53 72err_phy_power_on:
54 pr_info("Waiting for USB PHY clock good...\n"); 73 phy_exit(da8xx_ohci->usb11_phy);
55 while (!(__raw_readl(CFGCHIP2) & CFGCHIP2_PHYCLKGD)) 74err_phy_init:
56 cpu_relax(); 75 clk_disable_unprepare(da8xx_ohci->usb11_clk);
57 } 76
77 return ret;
78}
79
80static void ohci_da8xx_disable(struct usb_hcd *hcd)
81{
82 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
83
84 phy_power_off(da8xx_ohci->usb11_phy);
85 phy_exit(da8xx_ohci->usb11_phy);
86 clk_disable_unprepare(da8xx_ohci->usb11_clk);
87}
58 88
59 /* Enable USB 1.1 PHY */ 89static int ohci_da8xx_set_power(struct usb_hcd *hcd, int on)
60 cfgchip2 |= CFGCHIP2_USB1SUSPENDM; 90{
61 } else { 91 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
62 clk_disable(usb11_clk); 92 struct device *dev = hcd->self.controller;
63 if (!(cfgchip2 & CFGCHIP2_USB1PHYCLKMUX)) 93 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
64 clk_disable(usb20_clk); 94 int ret;
95
96 if (hub && hub->set_power)
97 return hub->set_power(1, on);
98
99 if (!da8xx_ohci->vbus_reg)
100 return 0;
65 101
66 /* Disable USB 1.1 PHY */ 102 if (on && !da8xx_ohci->reg_enabled) {
67 cfgchip2 &= ~CFGCHIP2_USB1SUSPENDM; 103 ret = regulator_enable(da8xx_ohci->vbus_reg);
104 if (ret) {
105 dev_err(dev, "Failed to enable regulator: %d\n", ret);
106 return ret;
107 }
108 da8xx_ohci->reg_enabled = 1;
109
110 } else if (!on && da8xx_ohci->reg_enabled) {
111 ret = regulator_disable(da8xx_ohci->vbus_reg);
112 if (ret) {
113 dev_err(dev, "Failed to disable regulator: %d\n", ret);
114 return ret;
115 }
116 da8xx_ohci->reg_enabled = 0;
68 } 117 }
69 __raw_writel(cfgchip2, CFGCHIP2); 118
119 return 0;
120}
121
122static int ohci_da8xx_get_power(struct usb_hcd *hcd)
123{
124 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
125 struct device *dev = hcd->self.controller;
126 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
127
128 if (hub && hub->get_power)
129 return hub->get_power(1);
130
131 if (da8xx_ohci->vbus_reg)
132 return regulator_is_enabled(da8xx_ohci->vbus_reg);
133
134 return 1;
135}
136
137static int ohci_da8xx_get_oci(struct usb_hcd *hcd)
138{
139 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
140 struct device *dev = hcd->self.controller;
141 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
142 unsigned int flags;
143 int ret;
144
145 if (hub && hub->get_oci)
146 return hub->get_oci(1);
147
148 if (!da8xx_ohci->vbus_reg)
149 return 0;
150
151 ret = regulator_get_error_flags(da8xx_ohci->vbus_reg, &flags);
152 if (ret)
153 return ret;
154
155 if (flags & REGULATOR_ERROR_OVER_CURRENT)
156 return 1;
157
158 return 0;
159}
160
161static int ohci_da8xx_has_set_power(struct usb_hcd *hcd)
162{
163 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
164 struct device *dev = hcd->self.controller;
165 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
166
167 if (hub && hub->set_power)
168 return 1;
169
170 if (da8xx_ohci->vbus_reg)
171 return 1;
172
173 return 0;
174}
175
176static int ohci_da8xx_has_oci(struct usb_hcd *hcd)
177{
178 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
179 struct device *dev = hcd->self.controller;
180 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
181
182 if (hub && hub->get_oci)
183 return 1;
184
185 if (da8xx_ohci->vbus_reg)
186 return 1;
187
188 return 0;
189}
190
191static int ohci_da8xx_has_potpgt(struct usb_hcd *hcd)
192{
193 struct device *dev = hcd->self.controller;
194 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
195
196 if (hub && hub->potpgt)
197 return 1;
198
199 return 0;
70} 200}
71 201
72/* 202/*
@@ -82,7 +212,51 @@ static void ohci_da8xx_ocic_handler(struct da8xx_ohci_root_hub *hub,
82 hub->set_power(port, 0); 212 hub->set_power(port, 0);
83} 213}
84 214
85static int ohci_da8xx_init(struct usb_hcd *hcd) 215static int ohci_da8xx_regulator_event(struct notifier_block *nb,
216 unsigned long event, void *data)
217{
218 struct da8xx_ohci_hcd *da8xx_ohci =
219 container_of(nb, struct da8xx_ohci_hcd, nb);
220
221 if (event & REGULATOR_EVENT_OVER_CURRENT) {
222 ocic_mask |= 1 << 1;
223 ohci_da8xx_set_power(da8xx_ohci->hcd, 0);
224 }
225
226 return 0;
227}
228
229static int ohci_da8xx_register_notify(struct usb_hcd *hcd)
230{
231 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
232 struct device *dev = hcd->self.controller;
233 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
234 int ret = 0;
235
236 if (hub && hub->ocic_notify) {
237 ret = hub->ocic_notify(ohci_da8xx_ocic_handler);
238 } else if (da8xx_ohci->vbus_reg) {
239 da8xx_ohci->nb.notifier_call = ohci_da8xx_regulator_event;
240 ret = devm_regulator_register_notifier(da8xx_ohci->vbus_reg,
241 &da8xx_ohci->nb);
242 }
243
244 if (ret)
245 dev_err(dev, "Failed to register notifier: %d\n", ret);
246
247 return ret;
248}
249
250static void ohci_da8xx_unregister_notify(struct usb_hcd *hcd)
251{
252 struct device *dev = hcd->self.controller;
253 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
254
255 if (hub && hub->ocic_notify)
256 hub->ocic_notify(NULL);
257}
258
259static int ohci_da8xx_reset(struct usb_hcd *hcd)
86{ 260{
87 struct device *dev = hcd->self.controller; 261 struct device *dev = hcd->self.controller;
88 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev); 262 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
@@ -92,7 +266,9 @@ static int ohci_da8xx_init(struct usb_hcd *hcd)
92 266
93 dev_dbg(dev, "starting USB controller\n"); 267 dev_dbg(dev, "starting USB controller\n");
94 268
95 ohci_da8xx_clock(1); 269 result = ohci_da8xx_enable(hcd);
270 if (result < 0)
271 return result;
96 272
97 /* 273 /*
98 * DA8xx only have 1 port connected to the pins but the HC root hub 274 * DA8xx only have 1 port connected to the pins but the HC root hub
@@ -100,9 +276,11 @@ static int ohci_da8xx_init(struct usb_hcd *hcd)
100 */ 276 */
101 ohci->num_ports = 1; 277 ohci->num_ports = 1;
102 278
103 result = ohci_init(ohci); 279 result = ohci_setup(hcd);
104 if (result < 0) 280 if (result < 0) {
281 ohci_da8xx_disable(hcd);
105 return result; 282 return result;
283 }
106 284
107 /* 285 /*
108 * Since we're providing a board-specific root hub port power control 286 * Since we're providing a board-specific root hub port power control
@@ -111,45 +289,29 @@ static int ohci_da8xx_init(struct usb_hcd *hcd)
111 * the correct hub descriptor... 289 * the correct hub descriptor...
112 */ 290 */
113 rh_a = ohci_readl(ohci, &ohci->regs->roothub.a); 291 rh_a = ohci_readl(ohci, &ohci->regs->roothub.a);
114 if (hub->set_power) { 292 if (ohci_da8xx_has_set_power(hcd)) {
115 rh_a &= ~RH_A_NPS; 293 rh_a &= ~RH_A_NPS;
116 rh_a |= RH_A_PSM; 294 rh_a |= RH_A_PSM;
117 } 295 }
118 if (hub->get_oci) { 296 if (ohci_da8xx_has_oci(hcd)) {
119 rh_a &= ~RH_A_NOCP; 297 rh_a &= ~RH_A_NOCP;
120 rh_a |= RH_A_OCPM; 298 rh_a |= RH_A_OCPM;
121 } 299 }
122 rh_a &= ~RH_A_POTPGT; 300 if (ohci_da8xx_has_potpgt(hcd)) {
123 rh_a |= hub->potpgt << 24; 301 rh_a &= ~RH_A_POTPGT;
302 rh_a |= hub->potpgt << 24;
303 }
124 ohci_writel(ohci, rh_a, &ohci->regs->roothub.a); 304 ohci_writel(ohci, rh_a, &ohci->regs->roothub.a);
125 305
126 return result; 306 return result;
127} 307}
128 308
129static void ohci_da8xx_stop(struct usb_hcd *hcd)
130{
131 ohci_stop(hcd);
132 ohci_da8xx_clock(0);
133}
134
135static int ohci_da8xx_start(struct usb_hcd *hcd)
136{
137 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
138 int result;
139
140 result = ohci_run(ohci);
141 if (result < 0)
142 ohci_da8xx_stop(hcd);
143
144 return result;
145}
146
147/* 309/*
148 * Update the status data from the hub with the over-current indicator change. 310 * Update the status data from the hub with the over-current indicator change.
149 */ 311 */
150static int ohci_da8xx_hub_status_data(struct usb_hcd *hcd, char *buf) 312static int ohci_da8xx_hub_status_data(struct usb_hcd *hcd, char *buf)
151{ 313{
152 int length = ohci_hub_status_data(hcd, buf); 314 int length = orig_ohci_hub_status_data(hcd, buf);
153 315
154 /* See if we have OCIC bit set on port 1 */ 316 /* See if we have OCIC bit set on port 1 */
155 if (ocic_mask & (1 << 1)) { 317 if (ocic_mask & (1 << 1)) {
@@ -171,7 +333,6 @@ static int ohci_da8xx_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
171 u16 wIndex, char *buf, u16 wLength) 333 u16 wIndex, char *buf, u16 wLength)
172{ 334{
173 struct device *dev = hcd->self.controller; 335 struct device *dev = hcd->self.controller;
174 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
175 int temp; 336 int temp;
176 337
177 switch (typeReq) { 338 switch (typeReq) {
@@ -185,11 +346,11 @@ static int ohci_da8xx_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
185 temp = roothub_portstatus(hcd_to_ohci(hcd), wIndex - 1); 346 temp = roothub_portstatus(hcd_to_ohci(hcd), wIndex - 1);
186 347
187 /* The port power status (PPS) bit defaults to 1 */ 348 /* The port power status (PPS) bit defaults to 1 */
188 if (hub->get_power && hub->get_power(wIndex) == 0) 349 if (!ohci_da8xx_get_power(hcd))
189 temp &= ~RH_PS_PPS; 350 temp &= ~RH_PS_PPS;
190 351
191 /* The port over-current indicator (POCI) bit is always 0 */ 352 /* The port over-current indicator (POCI) bit is always 0 */
192 if (hub->get_oci && hub->get_oci(wIndex) > 0) 353 if (ohci_da8xx_get_oci(hcd) > 0)
193 temp |= RH_PS_POCI; 354 temp |= RH_PS_POCI;
194 355
195 /* The over-current indicator change (OCIC) bit is 0 too */ 356 /* The over-current indicator change (OCIC) bit is 0 too */
@@ -214,10 +375,7 @@ check_port:
214 dev_dbg(dev, "%sPortFeature(%u): %s\n", 375 dev_dbg(dev, "%sPortFeature(%u): %s\n",
215 temp ? "Set" : "Clear", wIndex, "POWER"); 376 temp ? "Set" : "Clear", wIndex, "POWER");
216 377
217 if (!hub->set_power) 378 return ohci_da8xx_set_power(hcd, temp) ? -EPIPE : 0;
218 return -EPIPE;
219
220 return hub->set_power(wIndex, temp) ? -EPIPE : 0;
221 case USB_PORT_FEAT_C_OVER_CURRENT: 379 case USB_PORT_FEAT_C_OVER_CURRENT:
222 dev_dbg(dev, "%sPortFeature(%u): %s\n", 380 dev_dbg(dev, "%sPortFeature(%u): %s\n",
223 temp ? "Set" : "Clear", wIndex, 381 temp ? "Set" : "Clear", wIndex,
@@ -231,86 +389,61 @@ check_port:
231 } 389 }
232 } 390 }
233 391
234 return ohci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); 392 return orig_ohci_hub_control(hcd, typeReq, wValue,
393 wIndex, buf, wLength);
235} 394}
236 395
237static const struct hc_driver ohci_da8xx_hc_driver = {
238 .description = hcd_name,
239 .product_desc = "DA8xx OHCI",
240 .hcd_priv_size = sizeof(struct ohci_hcd),
241
242 /*
243 * generic hardware linkage
244 */
245 .irq = ohci_irq,
246 .flags = HCD_USB11 | HCD_MEMORY,
247
248 /*
249 * basic lifecycle operations
250 */
251 .reset = ohci_da8xx_init,
252 .start = ohci_da8xx_start,
253 .stop = ohci_da8xx_stop,
254 .shutdown = ohci_shutdown,
255
256 /*
257 * managing i/o requests and associated device resources
258 */
259 .urb_enqueue = ohci_urb_enqueue,
260 .urb_dequeue = ohci_urb_dequeue,
261 .endpoint_disable = ohci_endpoint_disable,
262
263 /*
264 * scheduling support
265 */
266 .get_frame_number = ohci_get_frame,
267
268 /*
269 * root hub support
270 */
271 .hub_status_data = ohci_da8xx_hub_status_data,
272 .hub_control = ohci_da8xx_hub_control,
273
274#ifdef CONFIG_PM
275 .bus_suspend = ohci_bus_suspend,
276 .bus_resume = ohci_bus_resume,
277#endif
278 .start_port_reset = ohci_start_port_reset,
279};
280
281/*-------------------------------------------------------------------------*/ 396/*-------------------------------------------------------------------------*/
397#ifdef CONFIG_OF
398static const struct of_device_id da8xx_ohci_ids[] = {
399 { .compatible = "ti,da830-ohci" },
400 { }
401};
402MODULE_DEVICE_TABLE(of, da8xx_ohci_ids);
403#endif
282 404
283 405static int ohci_da8xx_probe(struct platform_device *pdev)
284/**
285 * usb_hcd_da8xx_probe - initialize DA8xx-based HCDs
286 * Context: !in_interrupt()
287 *
288 * Allocates basic resources for this USB host controller, and
289 * then invokes the start() method for the HCD associated with it
290 * through the hotplug entry's driver_data.
291 */
292static int usb_hcd_da8xx_probe(const struct hc_driver *driver,
293 struct platform_device *pdev)
294{ 406{
295 struct da8xx_ohci_root_hub *hub = dev_get_platdata(&pdev->dev); 407 struct da8xx_ohci_hcd *da8xx_ohci;
296 struct usb_hcd *hcd; 408 struct usb_hcd *hcd;
297 struct resource *mem; 409 struct resource *mem;
298 int error, irq; 410 int error, irq;
411 hcd = usb_create_hcd(&ohci_da8xx_hc_driver, &pdev->dev,
412 dev_name(&pdev->dev));
413 if (!hcd)
414 return -ENOMEM;
299 415
300 if (hub == NULL) 416 da8xx_ohci = to_da8xx_ohci(hcd);
301 return -ENODEV; 417 da8xx_ohci->hcd = hcd;
302 418
303 usb11_clk = devm_clk_get(&pdev->dev, "usb11"); 419 da8xx_ohci->usb11_clk = devm_clk_get(&pdev->dev, "usb11");
304 if (IS_ERR(usb11_clk)) 420 if (IS_ERR(da8xx_ohci->usb11_clk)) {
305 return PTR_ERR(usb11_clk); 421 error = PTR_ERR(da8xx_ohci->usb11_clk);
422 if (error != -EPROBE_DEFER)
423 dev_err(&pdev->dev, "Failed to get clock.\n");
424 goto err;
425 }
306 426
307 usb20_clk = devm_clk_get(&pdev->dev, "usb20"); 427 da8xx_ohci->usb11_phy = devm_phy_get(&pdev->dev, "usb-phy");
308 if (IS_ERR(usb20_clk)) 428 if (IS_ERR(da8xx_ohci->usb11_phy)) {
309 return PTR_ERR(usb20_clk); 429 error = PTR_ERR(da8xx_ohci->usb11_phy);
430 if (error != -EPROBE_DEFER)
431 dev_err(&pdev->dev, "Failed to get phy.\n");
432 goto err;
433 }
310 434
311 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); 435 da8xx_ohci->vbus_reg = devm_regulator_get_optional(&pdev->dev, "vbus");
312 if (!hcd) 436 if (IS_ERR(da8xx_ohci->vbus_reg)) {
313 return -ENOMEM; 437 error = PTR_ERR(da8xx_ohci->vbus_reg);
438 if (error == -ENODEV) {
439 da8xx_ohci->vbus_reg = NULL;
440 } else if (error == -EPROBE_DEFER) {
441 goto err;
442 } else {
443 dev_err(&pdev->dev, "Failed to get regulator\n");
444 goto err;
445 }
446 }
314 447
315 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 448 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
316 hcd->regs = devm_ioremap_resource(&pdev->dev, mem); 449 hcd->regs = devm_ioremap_resource(&pdev->dev, mem);
@@ -321,60 +454,38 @@ static int usb_hcd_da8xx_probe(const struct hc_driver *driver,
321 hcd->rsrc_start = mem->start; 454 hcd->rsrc_start = mem->start;
322 hcd->rsrc_len = resource_size(mem); 455 hcd->rsrc_len = resource_size(mem);
323 456
324 ohci_hcd_init(hcd_to_ohci(hcd));
325
326 irq = platform_get_irq(pdev, 0); 457 irq = platform_get_irq(pdev, 0);
327 if (irq < 0) { 458 if (irq < 0) {
328 error = -ENODEV; 459 error = -ENODEV;
329 goto err; 460 goto err;
330 } 461 }
462
331 error = usb_add_hcd(hcd, irq, 0); 463 error = usb_add_hcd(hcd, irq, 0);
332 if (error) 464 if (error)
333 goto err; 465 goto err;
334 466
335 device_wakeup_enable(hcd->self.controller); 467 device_wakeup_enable(hcd->self.controller);
336 468
337 if (hub->ocic_notify) { 469 error = ohci_da8xx_register_notify(hcd);
338 error = hub->ocic_notify(ohci_da8xx_ocic_handler); 470 if (error)
339 if (!error) 471 goto err_remove_hcd;
340 return 0; 472
341 } 473 return 0;
342 474
475err_remove_hcd:
343 usb_remove_hcd(hcd); 476 usb_remove_hcd(hcd);
344err: 477err:
345 usb_put_hcd(hcd); 478 usb_put_hcd(hcd);
346 return error; 479 return error;
347} 480}
348 481
349/** 482static int ohci_da8xx_remove(struct platform_device *pdev)
350 * usb_hcd_da8xx_remove - shutdown processing for DA8xx-based HCDs
351 * @dev: USB Host Controller being removed
352 * Context: !in_interrupt()
353 *
354 * Reverses the effect of usb_hcd_da8xx_probe(), first invoking
355 * the HCD's stop() method. It is always called from a thread
356 * context, normally "rmmod", "apmd", or something similar.
357 */
358static inline void
359usb_hcd_da8xx_remove(struct usb_hcd *hcd, struct platform_device *pdev)
360{ 483{
361 struct da8xx_ohci_root_hub *hub = dev_get_platdata(&pdev->dev); 484 struct usb_hcd *hcd = platform_get_drvdata(pdev);
362 485
363 hub->ocic_notify(NULL); 486 ohci_da8xx_unregister_notify(hcd);
364 usb_remove_hcd(hcd); 487 usb_remove_hcd(hcd);
365 usb_put_hcd(hcd); 488 usb_put_hcd(hcd);
366}
367
368static int ohci_hcd_da8xx_drv_probe(struct platform_device *dev)
369{
370 return usb_hcd_da8xx_probe(&ohci_da8xx_hc_driver, dev);
371}
372
373static int ohci_hcd_da8xx_drv_remove(struct platform_device *dev)
374{
375 struct usb_hcd *hcd = platform_get_drvdata(dev);
376
377 usb_hcd_da8xx_remove(hcd, dev);
378 489
379 return 0; 490 return 0;
380} 491}
@@ -397,7 +508,7 @@ static int ohci_da8xx_suspend(struct platform_device *pdev,
397 if (ret) 508 if (ret)
398 return ret; 509 return ret;
399 510
400 ohci_da8xx_clock(0); 511 ohci_da8xx_disable(hcd);
401 hcd->state = HC_STATE_SUSPENDED; 512 hcd->state = HC_STATE_SUSPENDED;
402 513
403 return ret; 514 return ret;
@@ -407,32 +518,77 @@ static int ohci_da8xx_resume(struct platform_device *dev)
407{ 518{
408 struct usb_hcd *hcd = platform_get_drvdata(dev); 519 struct usb_hcd *hcd = platform_get_drvdata(dev);
409 struct ohci_hcd *ohci = hcd_to_ohci(hcd); 520 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
521 int ret;
410 522
411 if (time_before(jiffies, ohci->next_statechange)) 523 if (time_before(jiffies, ohci->next_statechange))
412 msleep(5); 524 msleep(5);
413 ohci->next_statechange = jiffies; 525 ohci->next_statechange = jiffies;
414 526
415 ohci_da8xx_clock(1); 527 ret = ohci_da8xx_enable(hcd);
416 dev->dev.power.power_state = PMSG_ON; 528 if (ret)
417 usb_hcd_resume_root_hub(hcd); 529 return ret;
530
531 ohci_resume(hcd, false);
532
418 return 0; 533 return 0;
419} 534}
420#endif 535#endif
421 536
537static const struct ohci_driver_overrides da8xx_overrides __initconst = {
538 .reset = ohci_da8xx_reset,
539 .extra_priv_size = sizeof(struct da8xx_ohci_hcd),
540};
541
422/* 542/*
423 * Driver definition to register with platform structure. 543 * Driver definition to register with platform structure.
424 */ 544 */
425static struct platform_driver ohci_hcd_da8xx_driver = { 545static struct platform_driver ohci_hcd_da8xx_driver = {
426 .probe = ohci_hcd_da8xx_drv_probe, 546 .probe = ohci_da8xx_probe,
427 .remove = ohci_hcd_da8xx_drv_remove, 547 .remove = ohci_da8xx_remove,
428 .shutdown = usb_hcd_platform_shutdown, 548 .shutdown = usb_hcd_platform_shutdown,
429#ifdef CONFIG_PM 549#ifdef CONFIG_PM
430 .suspend = ohci_da8xx_suspend, 550 .suspend = ohci_da8xx_suspend,
431 .resume = ohci_da8xx_resume, 551 .resume = ohci_da8xx_resume,
432#endif 552#endif
433 .driver = { 553 .driver = {
434 .name = "ohci", 554 .name = DRV_NAME,
555 .of_match_table = of_match_ptr(da8xx_ohci_ids),
435 }, 556 },
436}; 557};
437 558
438MODULE_ALIAS("platform:ohci"); 559static int __init ohci_da8xx_init(void)
560{
561
562 if (usb_disabled())
563 return -ENODEV;
564
565 pr_info("%s: " DRIVER_DESC "\n", DRV_NAME);
566 ohci_init_driver(&ohci_da8xx_hc_driver, &da8xx_overrides);
567
568 /*
569 * The Davinci da8xx HW has some unusual quirks, which require
570 * da8xx-specific workarounds. We override certain hc_driver
571 * functions here to achieve that. We explicitly do not enhance
572 * ohci_driver_overrides to allow this more easily, since this
573 * is an unusual case, and we don't want to encourage others to
574 * override these functions by making it too easy.
575 */
576
577 orig_ohci_hub_control = ohci_da8xx_hc_driver.hub_control;
578 orig_ohci_hub_status_data = ohci_da8xx_hc_driver.hub_status_data;
579
580 ohci_da8xx_hc_driver.hub_status_data = ohci_da8xx_hub_status_data;
581 ohci_da8xx_hc_driver.hub_control = ohci_da8xx_hub_control;
582
583 return platform_driver_register(&ohci_hcd_da8xx_driver);
584}
585module_init(ohci_da8xx_init);
586
587static void __exit ohci_da8xx_exit(void)
588{
589 platform_driver_unregister(&ohci_hcd_da8xx_driver);
590}
591module_exit(ohci_da8xx_exit);
592MODULE_DESCRIPTION(DRIVER_DESC);
593MODULE_LICENSE("GPL");
594MODULE_ALIAS("platform:" DRV_NAME);
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 86612ac3fda2..8685cf3e6292 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1219,11 +1219,6 @@ MODULE_LICENSE ("GPL");
1219#define SA1111_DRIVER ohci_hcd_sa1111_driver 1219#define SA1111_DRIVER ohci_hcd_sa1111_driver
1220#endif 1220#endif
1221 1221
1222#ifdef CONFIG_USB_OHCI_HCD_DAVINCI
1223#include "ohci-da8xx.c"
1224#define DAVINCI_PLATFORM_DRIVER ohci_hcd_da8xx_driver
1225#endif
1226
1227#ifdef CONFIG_USB_OHCI_HCD_PPC_OF 1222#ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1228#include "ohci-ppc-of.c" 1223#include "ohci-ppc-of.c"
1229#define OF_PLATFORM_DRIVER ohci_hcd_ppc_of_driver 1224#define OF_PLATFORM_DRIVER ohci_hcd_ppc_of_driver
@@ -1303,19 +1298,9 @@ static int __init ohci_hcd_mod_init(void)
1303 goto error_tmio; 1298 goto error_tmio;
1304#endif 1299#endif
1305 1300
1306#ifdef DAVINCI_PLATFORM_DRIVER
1307 retval = platform_driver_register(&DAVINCI_PLATFORM_DRIVER);
1308 if (retval < 0)
1309 goto error_davinci;
1310#endif
1311
1312 return retval; 1301 return retval;
1313 1302
1314 /* Error path */ 1303 /* Error path */
1315#ifdef DAVINCI_PLATFORM_DRIVER
1316 platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1317 error_davinci:
1318#endif
1319#ifdef TMIO_OHCI_DRIVER 1304#ifdef TMIO_OHCI_DRIVER
1320 platform_driver_unregister(&TMIO_OHCI_DRIVER); 1305 platform_driver_unregister(&TMIO_OHCI_DRIVER);
1321 error_tmio: 1306 error_tmio:
@@ -1351,9 +1336,6 @@ module_init(ohci_hcd_mod_init);
1351 1336
1352static void __exit ohci_hcd_mod_exit(void) 1337static void __exit ohci_hcd_mod_exit(void)
1353{ 1338{
1354#ifdef DAVINCI_PLATFORM_DRIVER
1355 platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1356#endif
1357#ifdef TMIO_OHCI_DRIVER 1339#ifdef TMIO_OHCI_DRIVER
1358 platform_driver_unregister(&TMIO_OHCI_DRIVER); 1340 platform_driver_unregister(&TMIO_OHCI_DRIVER);
1359#endif 1341#endif
diff --git a/drivers/usb/host/ohci-mem.c b/drivers/usb/host/ohci-mem.c
index c9e315c6808a..ed8a762b8670 100644
--- a/drivers/usb/host/ohci-mem.c
+++ b/drivers/usb/host/ohci-mem.c
@@ -88,10 +88,9 @@ td_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
88 dma_addr_t dma; 88 dma_addr_t dma;
89 struct td *td; 89 struct td *td;
90 90
91 td = dma_pool_alloc (hc->td_cache, mem_flags, &dma); 91 td = dma_pool_zalloc (hc->td_cache, mem_flags, &dma);
92 if (td) { 92 if (td) {
93 /* in case hc fetches it, make it look dead */ 93 /* in case hc fetches it, make it look dead */
94 memset (td, 0, sizeof *td);
95 td->hwNextTD = cpu_to_hc32 (hc, dma); 94 td->hwNextTD = cpu_to_hc32 (hc, dma);
96 td->td_dma = dma; 95 td->td_dma = dma;
97 /* hashed in td_fill */ 96 /* hashed in td_fill */
@@ -122,9 +121,8 @@ ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
122 dma_addr_t dma; 121 dma_addr_t dma;
123 struct ed *ed; 122 struct ed *ed;
124 123
125 ed = dma_pool_alloc (hc->ed_cache, mem_flags, &dma); 124 ed = dma_pool_zalloc (hc->ed_cache, mem_flags, &dma);
126 if (ed) { 125 if (ed) {
127 memset (ed, 0, sizeof (*ed));
128 INIT_LIST_HEAD (&ed->td_list); 126 INIT_LIST_HEAD (&ed->td_list);
129 ed->dma = dma; 127 ed->dma = dma;
130 } 128 }
diff --git a/drivers/usb/host/ohci-nxp.c b/drivers/usb/host/ohci-nxp.c
index b7d4756232ae..6df8e2ed40fd 100644
--- a/drivers/usb/host/ohci-nxp.c
+++ b/drivers/usb/host/ohci-nxp.c
@@ -56,8 +56,6 @@ static struct hc_driver __read_mostly ohci_nxp_hc_driver;
56 56
57static struct i2c_client *isp1301_i2c_client; 57static struct i2c_client *isp1301_i2c_client;
58 58
59extern int usb_disabled(void);
60
61static struct clk *usb_host_clk; 59static struct clk *usb_host_clk;
62 60
63static void isp1301_configure_lpc32xx(void) 61static void isp1301_configure_lpc32xx(void)
@@ -127,6 +125,7 @@ static inline void isp1301_vbus_off(void)
127static void ohci_nxp_start_hc(void) 125static void ohci_nxp_start_hc(void)
128{ 126{
129 unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN; 127 unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
128
130 __raw_writel(tmp, USB_OTG_STAT_CONTROL); 129 __raw_writel(tmp, USB_OTG_STAT_CONTROL);
131 isp1301_vbus_on(); 130 isp1301_vbus_on();
132} 131}
@@ -134,6 +133,7 @@ static void ohci_nxp_start_hc(void)
134static void ohci_nxp_stop_hc(void) 133static void ohci_nxp_stop_hc(void)
135{ 134{
136 unsigned long tmp; 135 unsigned long tmp;
136
137 isp1301_vbus_off(); 137 isp1301_vbus_off();
138 tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN; 138 tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
139 __raw_writel(tmp, USB_OTG_STAT_CONTROL); 139 __raw_writel(tmp, USB_OTG_STAT_CONTROL);
@@ -155,9 +155,8 @@ static int ohci_hcd_nxp_probe(struct platform_device *pdev)
155 } 155 }
156 156
157 isp1301_i2c_client = isp1301_get_client(isp1301_node); 157 isp1301_i2c_client = isp1301_get_client(isp1301_node);
158 if (!isp1301_i2c_client) { 158 if (!isp1301_i2c_client)
159 return -EPROBE_DEFER; 159 return -EPROBE_DEFER;
160 }
161 160
162 ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 161 ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
163 if (ret) 162 if (ret)
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 495c1454b9e8..b08e385399b9 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -68,9 +68,6 @@ static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
68 68
69#endif 69#endif
70 70
71extern int usb_disabled(void);
72extern int ocpi_enable(void);
73
74static struct clk *usb_host_ck; 71static struct clk *usb_host_ck;
75static struct clk *usb_dc_ck; 72static struct clk *usb_dc_ck;
76 73
@@ -296,15 +293,14 @@ static int ohci_omap_reset(struct usb_hcd *hcd)
296/*-------------------------------------------------------------------------*/ 293/*-------------------------------------------------------------------------*/
297 294
298/** 295/**
299 * usb_hcd_omap_probe - initialize OMAP-based HCDs 296 * ohci_hcd_omap_probe - initialize OMAP-based HCDs
300 * Context: !in_interrupt() 297 * Context: !in_interrupt()
301 * 298 *
302 * Allocates basic resources for this USB host controller, and 299 * Allocates basic resources for this USB host controller, and
303 * then invokes the start() method for the HCD associated with it 300 * then invokes the start() method for the HCD associated with it
304 * through the hotplug entry's driver_data. 301 * through the hotplug entry's driver_data.
305 */ 302 */
306static int usb_hcd_omap_probe (const struct hc_driver *driver, 303static int ohci_hcd_omap_probe(struct platform_device *pdev)
307 struct platform_device *pdev)
308{ 304{
309 int retval, irq; 305 int retval, irq;
310 struct usb_hcd *hcd = 0; 306 struct usb_hcd *hcd = 0;
@@ -336,7 +332,8 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver,
336 } 332 }
337 333
338 334
339 hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev)); 335 hcd = usb_create_hcd(&ohci_omap_hc_driver, &pdev->dev,
336 dev_name(&pdev->dev));
340 if (!hcd) { 337 if (!hcd) {
341 retval = -ENOMEM; 338 retval = -ENOMEM;
342 goto err0; 339 goto err0;
@@ -384,17 +381,18 @@ err0:
384/* may be called with controller, bus, and devices active */ 381/* may be called with controller, bus, and devices active */
385 382
386/** 383/**
387 * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs 384 * ohci_hcd_omap_remove - shutdown processing for OMAP-based HCDs
388 * @dev: USB Host Controller being removed 385 * @dev: USB Host Controller being removed
389 * Context: !in_interrupt() 386 * Context: !in_interrupt()
390 * 387 *
391 * Reverses the effect of usb_hcd_omap_probe(), first invoking 388 * Reverses the effect of ohci_hcd_omap_probe(), first invoking
392 * the HCD's stop() method. It is always called from a thread 389 * the HCD's stop() method. It is always called from a thread
393 * context, normally "rmmod", "apmd", or something similar. 390 * context, normally "rmmod", "apmd", or something similar.
394 */ 391 */
395static inline void 392static int ohci_hcd_omap_remove(struct platform_device *pdev)
396usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
397{ 393{
394 struct usb_hcd *hcd = platform_get_drvdata(pdev);
395
398 dev_dbg(hcd->self.controller, "stopping USB Controller\n"); 396 dev_dbg(hcd->self.controller, "stopping USB Controller\n");
399 usb_remove_hcd(hcd); 397 usb_remove_hcd(hcd);
400 omap_ohci_clock_power(0); 398 omap_ohci_clock_power(0);
@@ -409,21 +407,6 @@ usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
409 usb_put_hcd(hcd); 407 usb_put_hcd(hcd);
410 clk_put(usb_dc_ck); 408 clk_put(usb_dc_ck);
411 clk_put(usb_host_ck); 409 clk_put(usb_host_ck);
412}
413
414/*-------------------------------------------------------------------------*/
415
416static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
417{
418 return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
419}
420
421static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
422{
423 struct usb_hcd *hcd = platform_get_drvdata(dev);
424
425 usb_hcd_omap_remove(hcd, dev);
426
427 return 0; 410 return 0;
428} 411}
429 412
@@ -472,8 +455,8 @@ static int ohci_omap_resume(struct platform_device *dev)
472 * Driver definition to register with the OMAP bus 455 * Driver definition to register with the OMAP bus
473 */ 456 */
474static struct platform_driver ohci_hcd_omap_driver = { 457static struct platform_driver ohci_hcd_omap_driver = {
475 .probe = ohci_hcd_omap_drv_probe, 458 .probe = ohci_hcd_omap_probe,
476 .remove = ohci_hcd_omap_drv_remove, 459 .remove = ohci_hcd_omap_remove,
477 .shutdown = usb_hcd_platform_shutdown, 460 .shutdown = usb_hcd_platform_shutdown,
478#ifdef CONFIG_PM 461#ifdef CONFIG_PM
479 .suspend = ohci_omap_suspend, 462 .suspend = ohci_omap_suspend,
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index a667cf2d5788..79efde8f21e0 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -404,7 +404,7 @@ static int ohci_pxa_of_init(struct platform_device *pdev)
404 404
405 405
406/** 406/**
407 * usb_hcd_pxa27x_probe - initialize pxa27x-based HCDs 407 * ohci_hcd_pxa27x_probe - initialize pxa27x-based HCDs
408 * Context: !in_interrupt() 408 * Context: !in_interrupt()
409 * 409 *
410 * Allocates basic resources for this USB host controller, and 410 * Allocates basic resources for this USB host controller, and
@@ -412,7 +412,7 @@ static int ohci_pxa_of_init(struct platform_device *pdev)
412 * through the hotplug entry's driver_data. 412 * through the hotplug entry's driver_data.
413 * 413 *
414 */ 414 */
415int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device *pdev) 415static int ohci_hcd_pxa27x_probe(struct platform_device *pdev)
416{ 416{
417 int retval, irq; 417 int retval, irq;
418 struct usb_hcd *hcd; 418 struct usb_hcd *hcd;
@@ -442,7 +442,7 @@ int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device
442 if (IS_ERR(usb_clk)) 442 if (IS_ERR(usb_clk))
443 return PTR_ERR(usb_clk); 443 return PTR_ERR(usb_clk);
444 444
445 hcd = usb_create_hcd (driver, &pdev->dev, "pxa27x"); 445 hcd = usb_create_hcd(&ohci_pxa27x_hc_driver, &pdev->dev, "pxa27x");
446 if (!hcd) 446 if (!hcd)
447 return -ENOMEM; 447 return -ENOMEM;
448 448
@@ -503,17 +503,18 @@ int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device
503/* may be called with controller, bus, and devices active */ 503/* may be called with controller, bus, and devices active */
504 504
505/** 505/**
506 * usb_hcd_pxa27x_remove - shutdown processing for pxa27x-based HCDs 506 * ohci_hcd_pxa27x_remove - shutdown processing for pxa27x-based HCDs
507 * @dev: USB Host Controller being removed 507 * @dev: USB Host Controller being removed
508 * Context: !in_interrupt() 508 * Context: !in_interrupt()
509 * 509 *
510 * Reverses the effect of usb_hcd_pxa27x_probe(), first invoking 510 * Reverses the effect of ohci_hcd_pxa27x_probe(), first invoking
511 * the HCD's stop() method. It is always called from a thread 511 * the HCD's stop() method. It is always called from a thread
512 * context, normally "rmmod", "apmd", or something similar. 512 * context, normally "rmmod", "apmd", or something similar.
513 * 513 *
514 */ 514 */
515void usb_hcd_pxa27x_remove (struct usb_hcd *hcd, struct platform_device *pdev) 515static int ohci_hcd_pxa27x_remove(struct platform_device *pdev)
516{ 516{
517 struct usb_hcd *hcd = platform_get_drvdata(pdev);
517 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd); 518 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
518 unsigned int i; 519 unsigned int i;
519 520
@@ -524,28 +525,11 @@ void usb_hcd_pxa27x_remove (struct usb_hcd *hcd, struct platform_device *pdev)
524 pxa27x_ohci_set_vbus_power(pxa_ohci, i, false); 525 pxa27x_ohci_set_vbus_power(pxa_ohci, i, false);
525 526
526 usb_put_hcd(hcd); 527 usb_put_hcd(hcd);
528 return 0;
527} 529}
528 530
529/*-------------------------------------------------------------------------*/ 531/*-------------------------------------------------------------------------*/
530 532
531static int ohci_hcd_pxa27x_drv_probe(struct platform_device *pdev)
532{
533 pr_debug ("In ohci_hcd_pxa27x_drv_probe");
534
535 if (usb_disabled())
536 return -ENODEV;
537
538 return usb_hcd_pxa27x_probe(&ohci_pxa27x_hc_driver, pdev);
539}
540
541static int ohci_hcd_pxa27x_drv_remove(struct platform_device *pdev)
542{
543 struct usb_hcd *hcd = platform_get_drvdata(pdev);
544
545 usb_hcd_pxa27x_remove(hcd, pdev);
546 return 0;
547}
548
549#ifdef CONFIG_PM 533#ifdef CONFIG_PM
550static int ohci_hcd_pxa27x_drv_suspend(struct device *dev) 534static int ohci_hcd_pxa27x_drv_suspend(struct device *dev)
551{ 535{
@@ -598,8 +582,8 @@ static const struct dev_pm_ops ohci_hcd_pxa27x_pm_ops = {
598#endif 582#endif
599 583
600static struct platform_driver ohci_hcd_pxa27x_driver = { 584static struct platform_driver ohci_hcd_pxa27x_driver = {
601 .probe = ohci_hcd_pxa27x_drv_probe, 585 .probe = ohci_hcd_pxa27x_probe,
602 .remove = ohci_hcd_pxa27x_drv_remove, 586 .remove = ohci_hcd_pxa27x_remove,
603 .shutdown = usb_hcd_platform_shutdown, 587 .shutdown = usb_hcd_platform_shutdown,
604 .driver = { 588 .driver = {
605 .name = "pxa27x-ohci", 589 .name = "pxa27x-ohci",
diff --git a/drivers/usb/host/ohci-s3c2410.c b/drivers/usb/host/ohci-s3c2410.c
index 7a1919ca543a..b006b93126f7 100644
--- a/drivers/usb/host/ohci-s3c2410.c
+++ b/drivers/usb/host/ohci-s3c2410.c
@@ -43,6 +43,8 @@ static const char hcd_name[] = "ohci-s3c2410";
43static struct clk *clk; 43static struct clk *clk;
44static struct clk *usb_clk; 44static struct clk *usb_clk;
45 45
46static struct hc_driver __read_mostly ohci_s3c2410_hc_driver;
47
46/* forward definitions */ 48/* forward definitions */
47 49
48static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc); 50static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc);
@@ -321,26 +323,29 @@ static void s3c2410_hcd_oc(struct s3c2410_hcd_info *info, int port_oc)
321/* may be called with controller, bus, and devices active */ 323/* may be called with controller, bus, and devices active */
322 324
323/* 325/*
324 * usb_hcd_s3c2410_remove - shutdown processing for HCD 326 * ohci_hcd_s3c2410_remove - shutdown processing for HCD
325 * @dev: USB Host Controller being removed 327 * @dev: USB Host Controller being removed
326 * Context: !in_interrupt() 328 * Context: !in_interrupt()
327 * 329 *
328 * Reverses the effect of usb_hcd_3c2410_probe(), first invoking 330 * Reverses the effect of ohci_hcd_3c2410_probe(), first invoking
329 * the HCD's stop() method. It is always called from a thread 331 * the HCD's stop() method. It is always called from a thread
330 * context, normally "rmmod", "apmd", or something similar. 332 * context, normally "rmmod", "apmd", or something similar.
331 * 333 *
332*/ 334*/
333 335
334static void 336static int
335usb_hcd_s3c2410_remove(struct usb_hcd *hcd, struct platform_device *dev) 337ohci_hcd_s3c2410_remove(struct platform_device *dev)
336{ 338{
339 struct usb_hcd *hcd = platform_get_drvdata(dev);
340
337 usb_remove_hcd(hcd); 341 usb_remove_hcd(hcd);
338 s3c2410_stop_hc(dev); 342 s3c2410_stop_hc(dev);
339 usb_put_hcd(hcd); 343 usb_put_hcd(hcd);
344 return 0;
340} 345}
341 346
342/** 347/**
343 * usb_hcd_s3c2410_probe - initialize S3C2410-based HCDs 348 * ohci_hcd_s3c2410_probe - initialize S3C2410-based HCDs
344 * Context: !in_interrupt() 349 * Context: !in_interrupt()
345 * 350 *
346 * Allocates basic resources for this USB host controller, and 351 * Allocates basic resources for this USB host controller, and
@@ -348,8 +353,7 @@ usb_hcd_s3c2410_remove(struct usb_hcd *hcd, struct platform_device *dev)
348 * through the hotplug entry's driver_data. 353 * through the hotplug entry's driver_data.
349 * 354 *
350 */ 355 */
351static int usb_hcd_s3c2410_probe(const struct hc_driver *driver, 356static int ohci_hcd_s3c2410_probe(struct platform_device *dev)
352 struct platform_device *dev)
353{ 357{
354 struct usb_hcd *hcd = NULL; 358 struct usb_hcd *hcd = NULL;
355 struct s3c2410_hcd_info *info = dev_get_platdata(&dev->dev); 359 struct s3c2410_hcd_info *info = dev_get_platdata(&dev->dev);
@@ -358,7 +362,7 @@ static int usb_hcd_s3c2410_probe(const struct hc_driver *driver,
358 s3c2410_usb_set_power(info, 1, 1); 362 s3c2410_usb_set_power(info, 1, 1);
359 s3c2410_usb_set_power(info, 2, 1); 363 s3c2410_usb_set_power(info, 2, 1);
360 364
361 hcd = usb_create_hcd(driver, &dev->dev, "s3c24xx"); 365 hcd = usb_create_hcd(&ohci_s3c2410_hc_driver, &dev->dev, "s3c24xx");
362 if (hcd == NULL) 366 if (hcd == NULL)
363 return -ENOMEM; 367 return -ENOMEM;
364 368
@@ -404,21 +408,6 @@ static int usb_hcd_s3c2410_probe(const struct hc_driver *driver,
404 408
405/*-------------------------------------------------------------------------*/ 409/*-------------------------------------------------------------------------*/
406 410
407static struct hc_driver __read_mostly ohci_s3c2410_hc_driver;
408
409static int ohci_hcd_s3c2410_drv_probe(struct platform_device *pdev)
410{
411 return usb_hcd_s3c2410_probe(&ohci_s3c2410_hc_driver, pdev);
412}
413
414static int ohci_hcd_s3c2410_drv_remove(struct platform_device *pdev)
415{
416 struct usb_hcd *hcd = platform_get_drvdata(pdev);
417
418 usb_hcd_s3c2410_remove(hcd, pdev);
419 return 0;
420}
421
422#ifdef CONFIG_PM 411#ifdef CONFIG_PM
423static int ohci_hcd_s3c2410_drv_suspend(struct device *dev) 412static int ohci_hcd_s3c2410_drv_suspend(struct device *dev)
424{ 413{
@@ -457,13 +446,21 @@ static const struct dev_pm_ops ohci_hcd_s3c2410_pm_ops = {
457 .resume = ohci_hcd_s3c2410_drv_resume, 446 .resume = ohci_hcd_s3c2410_drv_resume,
458}; 447};
459 448
449static const struct of_device_id ohci_hcd_s3c2410_dt_ids[] = {
450 { .compatible = "samsung,s3c2410-ohci" },
451 { /* sentinel */ }
452};
453
454MODULE_DEVICE_TABLE(of, ohci_hcd_s3c2410_dt_ids);
455
460static struct platform_driver ohci_hcd_s3c2410_driver = { 456static struct platform_driver ohci_hcd_s3c2410_driver = {
461 .probe = ohci_hcd_s3c2410_drv_probe, 457 .probe = ohci_hcd_s3c2410_probe,
462 .remove = ohci_hcd_s3c2410_drv_remove, 458 .remove = ohci_hcd_s3c2410_remove,
463 .shutdown = usb_hcd_platform_shutdown, 459 .shutdown = usb_hcd_platform_shutdown,
464 .driver = { 460 .driver = {
465 .name = "s3c2410-ohci", 461 .name = "s3c2410-ohci",
466 .pm = &ohci_hcd_s3c2410_pm_ops, 462 .pm = &ohci_hcd_s3c2410_pm_ops,
463 .of_match_table = ohci_hcd_s3c2410_dt_ids,
467 }, 464 },
468}; 465};
469 466
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 6afe32381209..321de2e0161b 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1032,7 +1032,6 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
1032 goto fail; 1032 goto fail;
1033 dev->num_rings_cached = 0; 1033 dev->num_rings_cached = 0;
1034 1034
1035 init_completion(&dev->cmd_completion);
1036 dev->udev = udev; 1035 dev->udev = udev;
1037 1036
1038 /* Point to output device context in dcbaa. */ 1037 /* Point to output device context in dcbaa. */
@@ -1370,7 +1369,7 @@ static u32 xhci_get_endpoint_max_burst(struct usb_device *udev,
1370 if (udev->speed == USB_SPEED_HIGH && 1369 if (udev->speed == USB_SPEED_HIGH &&
1371 (usb_endpoint_xfer_isoc(&ep->desc) || 1370 (usb_endpoint_xfer_isoc(&ep->desc) ||
1372 usb_endpoint_xfer_int(&ep->desc))) 1371 usb_endpoint_xfer_int(&ep->desc)))
1373 return (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11; 1372 return usb_endpoint_maxp_mult(&ep->desc) - 1;
1374 1373
1375 return 0; 1374 return 0;
1376} 1375}
@@ -1415,10 +1414,10 @@ static u32 xhci_get_max_esit_payload(struct usb_device *udev,
1415 else if (udev->speed >= USB_SPEED_SUPER) 1414 else if (udev->speed >= USB_SPEED_SUPER)
1416 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval); 1415 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
1417 1416
1418 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)); 1417 max_packet = usb_endpoint_maxp(&ep->desc);
1419 max_burst = (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11; 1418 max_burst = usb_endpoint_maxp_mult(&ep->desc);
1420 /* A 0 in max burst means 1 transfer per ESIT */ 1419 /* A 0 in max burst means 1 transfer per ESIT */
1421 return max_packet * (max_burst + 1); 1420 return max_packet * max_burst;
1422} 1421}
1423 1422
1424/* Set up an endpoint with one ring segment. Do not allocate stream rings. 1423/* Set up an endpoint with one ring segment. Do not allocate stream rings.
@@ -1461,7 +1460,7 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1461 max_esit_payload = xhci_get_max_esit_payload(udev, ep); 1460 max_esit_payload = xhci_get_max_esit_payload(udev, ep);
1462 interval = xhci_get_endpoint_interval(udev, ep); 1461 interval = xhci_get_endpoint_interval(udev, ep);
1463 mult = xhci_get_endpoint_mult(udev, ep); 1462 mult = xhci_get_endpoint_mult(udev, ep);
1464 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)); 1463 max_packet = usb_endpoint_maxp(&ep->desc);
1465 max_burst = xhci_get_endpoint_max_burst(udev, ep); 1464 max_burst = xhci_get_endpoint_max_burst(udev, ep);
1466 avg_trb_len = max_esit_payload; 1465 avg_trb_len = max_esit_payload;
1467 1466
@@ -2384,7 +2383,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2384 * "physically contiguous and 64-byte (cache line) aligned". 2383 * "physically contiguous and 64-byte (cache line) aligned".
2385 */ 2384 */
2386 xhci->dcbaa = dma_alloc_coherent(dev, sizeof(*xhci->dcbaa), &dma, 2385 xhci->dcbaa = dma_alloc_coherent(dev, sizeof(*xhci->dcbaa), &dma,
2387 GFP_KERNEL); 2386 flags);
2388 if (!xhci->dcbaa) 2387 if (!xhci->dcbaa)
2389 goto fail; 2388 goto fail;
2390 memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa)); 2389 memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa));
@@ -2480,7 +2479,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2480 2479
2481 xhci->erst.entries = dma_alloc_coherent(dev, 2480 xhci->erst.entries = dma_alloc_coherent(dev,
2482 sizeof(struct xhci_erst_entry) * ERST_NUM_SEGS, &dma, 2481 sizeof(struct xhci_erst_entry) * ERST_NUM_SEGS, &dma,
2483 GFP_KERNEL); 2482 flags);
2484 if (!xhci->erst.entries) 2483 if (!xhci->erst.entries)
2485 goto fail; 2484 goto fail;
2486 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 2485 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
@@ -2536,7 +2535,6 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2536 * something other than the default (~1ms minimum between interrupts). 2535 * something other than the default (~1ms minimum between interrupts).
2537 * See section 5.5.1.2. 2536 * See section 5.5.1.2.
2538 */ 2537 */
2539 init_completion(&xhci->addr_dev);
2540 for (i = 0; i < MAX_HC_SLOTS; ++i) 2538 for (i = 0; i < MAX_HC_SLOTS; ++i)
2541 xhci->devs[i] = NULL; 2539 xhci->devs[i] = NULL;
2542 for (i = 0; i < USB_MAXCHILDREN; ++i) { 2540 for (i = 0; i < USB_MAXCHILDREN; ++i) {
diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c
index 73f763c4f5f5..6e7ddf6cafae 100644
--- a/drivers/usb/host/xhci-mtk-sch.c
+++ b/drivers/usb/host/xhci-mtk-sch.c
@@ -337,7 +337,7 @@ int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
337 337
338 xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n", 338 xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
339 __func__, usb_endpoint_type(&ep->desc), udev->speed, 339 __func__, usb_endpoint_type(&ep->desc), udev->speed,
340 GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)), 340 usb_endpoint_maxp(&ep->desc),
341 usb_endpoint_dir_in(&ep->desc), ep); 341 usb_endpoint_dir_in(&ep->desc), ep);
342 342
343 if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) { 343 if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
@@ -403,7 +403,7 @@ void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
403 403
404 xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n", 404 xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
405 __func__, usb_endpoint_type(&ep->desc), udev->speed, 405 __func__, usb_endpoint_type(&ep->desc), udev->speed,
406 GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)), 406 usb_endpoint_maxp(&ep->desc),
407 usb_endpoint_dir_in(&ep->desc), ep); 407 usb_endpoint_dir_in(&ep->desc), ep);
408 408
409 if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) 409 if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 79959f17c38c..1094ebd2838f 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -94,6 +94,9 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
94 int ret; 94 int ret;
95 int i; 95 int i;
96 96
97 if (!mtk->has_ippc)
98 return 0;
99
97 /* power on host ip */ 100 /* power on host ip */
98 value = readl(&ippc->ip_pw_ctr1); 101 value = readl(&ippc->ip_pw_ctr1);
99 value &= ~CTRL1_IP_HOST_PDN; 102 value &= ~CTRL1_IP_HOST_PDN;
@@ -139,6 +142,9 @@ static int xhci_mtk_host_disable(struct xhci_hcd_mtk *mtk)
139 int ret; 142 int ret;
140 int i; 143 int i;
141 144
145 if (!mtk->has_ippc)
146 return 0;
147
142 /* power down all u3 ports */ 148 /* power down all u3 ports */
143 for (i = 0; i < mtk->num_u3_ports; i++) { 149 for (i = 0; i < mtk->num_u3_ports; i++) {
144 value = readl(&ippc->u3_ctrl_p[i]); 150 value = readl(&ippc->u3_ctrl_p[i]);
@@ -173,6 +179,9 @@ static int xhci_mtk_ssusb_config(struct xhci_hcd_mtk *mtk)
173 struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs; 179 struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
174 u32 value; 180 u32 value;
175 181
182 if (!mtk->has_ippc)
183 return 0;
184
176 /* reset whole ip */ 185 /* reset whole ip */
177 value = readl(&ippc->ip_pw_ctr0); 186 value = readl(&ippc->ip_pw_ctr0);
178 value |= CTRL0_IP_SW_RST; 187 value |= CTRL0_IP_SW_RST;
@@ -475,6 +484,7 @@ static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci)
475/* called during probe() after chip reset completes */ 484/* called during probe() after chip reset completes */
476static int xhci_mtk_setup(struct usb_hcd *hcd) 485static int xhci_mtk_setup(struct usb_hcd *hcd)
477{ 486{
487 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
478 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd); 488 struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
479 int ret; 489 int ret;
480 490
@@ -482,12 +492,21 @@ static int xhci_mtk_setup(struct usb_hcd *hcd)
482 ret = xhci_mtk_ssusb_config(mtk); 492 ret = xhci_mtk_ssusb_config(mtk);
483 if (ret) 493 if (ret)
484 return ret; 494 return ret;
495 }
496
497 ret = xhci_gen_setup(hcd, xhci_mtk_quirks);
498 if (ret)
499 return ret;
500
501 if (usb_hcd_is_primary_hcd(hcd)) {
502 mtk->num_u3_ports = xhci->num_usb3_ports;
503 mtk->num_u2_ports = xhci->num_usb2_ports;
485 ret = xhci_mtk_sch_init(mtk); 504 ret = xhci_mtk_sch_init(mtk);
486 if (ret) 505 if (ret)
487 return ret; 506 return ret;
488 } 507 }
489 508
490 return xhci_gen_setup(hcd, xhci_mtk_quirks); 509 return ret;
491} 510}
492 511
493static int xhci_mtk_probe(struct platform_device *pdev) 512static int xhci_mtk_probe(struct platform_device *pdev)
@@ -586,7 +605,7 @@ static int xhci_mtk_probe(struct platform_device *pdev)
586 mtk->hcd = platform_get_drvdata(pdev); 605 mtk->hcd = platform_get_drvdata(pdev);
587 platform_set_drvdata(pdev, mtk); 606 platform_set_drvdata(pdev, mtk);
588 607
589 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 608 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac");
590 hcd->regs = devm_ioremap_resource(dev, res); 609 hcd->regs = devm_ioremap_resource(dev, res);
591 if (IS_ERR(hcd->regs)) { 610 if (IS_ERR(hcd->regs)) {
592 ret = PTR_ERR(hcd->regs); 611 ret = PTR_ERR(hcd->regs);
@@ -595,11 +614,16 @@ static int xhci_mtk_probe(struct platform_device *pdev)
595 hcd->rsrc_start = res->start; 614 hcd->rsrc_start = res->start;
596 hcd->rsrc_len = resource_size(res); 615 hcd->rsrc_len = resource_size(res);
597 616
598 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 617 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
599 mtk->ippc_regs = devm_ioremap_resource(dev, res); 618 if (res) { /* ippc register is optional */
600 if (IS_ERR(mtk->ippc_regs)) { 619 mtk->ippc_regs = devm_ioremap_resource(dev, res);
601 ret = PTR_ERR(mtk->ippc_regs); 620 if (IS_ERR(mtk->ippc_regs)) {
602 goto put_usb2_hcd; 621 ret = PTR_ERR(mtk->ippc_regs);
622 goto put_usb2_hcd;
623 }
624 mtk->has_ippc = true;
625 } else {
626 mtk->has_ippc = false;
603 } 627 }
604 628
605 for (phy_num = 0; phy_num < mtk->num_phys; phy_num++) { 629 for (phy_num = 0; phy_num < mtk->num_phys; phy_num++) {
diff --git a/drivers/usb/host/xhci-mtk.h b/drivers/usb/host/xhci-mtk.h
index 7da677c79ea8..2845c49efe1b 100644
--- a/drivers/usb/host/xhci-mtk.h
+++ b/drivers/usb/host/xhci-mtk.h
@@ -118,6 +118,7 @@ struct xhci_hcd_mtk {
118 struct usb_hcd *hcd; 118 struct usb_hcd *hcd;
119 struct mu3h_sch_bw_info *sch_array; 119 struct mu3h_sch_bw_info *sch_array;
120 struct mu3c_ippc_regs __iomem *ippc_regs; 120 struct mu3c_ippc_regs __iomem *ippc_regs;
121 bool has_ippc;
121 int num_u2_ports; 122 int num_u2_ports;
122 int num_u3_ports; 123 int num_u3_ports;
123 struct regulator *vusb33; 124 struct regulator *vusb33;
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index ed56bf9ed885..ddfab301e366 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -100,6 +100,12 @@ static const struct xhci_plat_priv xhci_plat_renesas_rcar_gen3 = {
100 .plat_start = xhci_rcar_start, 100 .plat_start = xhci_rcar_start,
101}; 101};
102 102
103static const struct xhci_plat_priv xhci_plat_renesas_rcar_r8a7796 = {
104 .firmware_name = XHCI_RCAR_FIRMWARE_NAME_V3,
105 .init_quirk = xhci_rcar_init_quirk,
106 .plat_start = xhci_rcar_start,
107};
108
103static const struct of_device_id usb_xhci_of_match[] = { 109static const struct of_device_id usb_xhci_of_match[] = {
104 { 110 {
105 .compatible = "generic-xhci", 111 .compatible = "generic-xhci",
@@ -124,6 +130,9 @@ static const struct of_device_id usb_xhci_of_match[] = {
124 .compatible = "renesas,xhci-r8a7795", 130 .compatible = "renesas,xhci-r8a7795",
125 .data = &xhci_plat_renesas_rcar_gen3, 131 .data = &xhci_plat_renesas_rcar_gen3,
126 }, { 132 }, {
133 .compatible = "renesas,xhci-r8a7796",
134 .data = &xhci_plat_renesas_rcar_r8a7796,
135 }, {
127 .compatible = "renesas,rcar-gen2-xhci", 136 .compatible = "renesas,rcar-gen2-xhci",
128 .data = &xhci_plat_renesas_rcar_gen2, 137 .data = &xhci_plat_renesas_rcar_gen2,
129 }, { 138 }, {
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index 0e4535e632ec..d28df386e780 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -19,6 +19,8 @@
19#include "xhci-rcar.h" 19#include "xhci-rcar.h"
20 20
21/* 21/*
22* - The V3 firmware is for r8a7796 (with good performance).
23* - The V2 firmware can be used on both r8a7795 (es1.x) and r8a7796.
22* - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes 24* - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
23* performance degradation. So, this driver continues to use the V1 if R-Car 25* performance degradation. So, this driver continues to use the V1 if R-Car
24* Gen2. 26* Gen2.
@@ -26,6 +28,7 @@
26*/ 28*/
27MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1); 29MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
28MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2); 30MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
31MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3);
29 32
30/*** Register Offset ***/ 33/*** Register Offset ***/
31#define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */ 34#define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */
@@ -92,6 +95,7 @@ static int xhci_rcar_is_gen3(struct device *dev)
92 struct device_node *node = dev->of_node; 95 struct device_node *node = dev->of_node;
93 96
94 return of_device_is_compatible(node, "renesas,xhci-r8a7795") || 97 return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
98 of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
95 of_device_is_compatible(node, "renesas,rcar-gen3-xhci"); 99 of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
96} 100}
97 101
diff --git a/drivers/usb/host/xhci-rcar.h b/drivers/usb/host/xhci-rcar.h
index 2941a25cfe98..d2ffe20401cf 100644
--- a/drivers/usb/host/xhci-rcar.h
+++ b/drivers/usb/host/xhci-rcar.h
@@ -13,6 +13,7 @@
13 13
14#define XHCI_RCAR_FIRMWARE_NAME_V1 "r8a779x_usb3_v1.dlmem" 14#define XHCI_RCAR_FIRMWARE_NAME_V1 "r8a779x_usb3_v1.dlmem"
15#define XHCI_RCAR_FIRMWARE_NAME_V2 "r8a779x_usb3_v2.dlmem" 15#define XHCI_RCAR_FIRMWARE_NAME_V2 "r8a779x_usb3_v2.dlmem"
16#define XHCI_RCAR_FIRMWARE_NAME_V3 "r8a779x_usb3_v3.dlmem"
16 17
17#if IS_ENABLED(CONFIG_USB_XHCI_RCAR) 18#if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
18void xhci_rcar_start(struct usb_hcd *hcd); 19void xhci_rcar_start(struct usb_hcd *hcd);
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 797137e26549..bdf6b13d9b67 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -89,6 +89,11 @@ dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
89 return seg->dma + (segment_offset * sizeof(*trb)); 89 return seg->dma + (segment_offset * sizeof(*trb));
90} 90}
91 91
92static bool trb_is_noop(union xhci_trb *trb)
93{
94 return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
95}
96
92static bool trb_is_link(union xhci_trb *trb) 97static bool trb_is_link(union xhci_trb *trb)
93{ 98{
94 return TRB_TYPE_LINK_LE32(trb->link.control); 99 return TRB_TYPE_LINK_LE32(trb->link.control);
@@ -110,6 +115,20 @@ static bool link_trb_toggles_cycle(union xhci_trb *trb)
110 return le32_to_cpu(trb->link.control) & LINK_TOGGLE; 115 return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
111} 116}
112 117
118static bool last_td_in_urb(struct xhci_td *td)
119{
120 struct urb_priv *urb_priv = td->urb->hcpriv;
121
122 return urb_priv->td_cnt == urb_priv->length;
123}
124
125static void inc_td_cnt(struct urb *urb)
126{
127 struct urb_priv *urb_priv = urb->hcpriv;
128
129 urb_priv->td_cnt++;
130}
131
113/* Updates trb to point to the next TRB in the ring, and updates seg if the next 132/* Updates trb to point to the next TRB in the ring, and updates seg if the next
114 * TRB is in a new segment. This does not skip over link TRBs, and it does not 133 * TRB is in a new segment. This does not skip over link TRBs, and it does not
115 * effect the ring dequeue or enqueue pointers. 134 * effect the ring dequeue or enqueue pointers.
@@ -303,7 +322,6 @@ static int xhci_abort_cmd_ring(struct xhci_hcd *xhci)
303 "maybe the host is dead\n"); 322 "maybe the host is dead\n");
304 del_timer(&xhci->cmd_timer); 323 del_timer(&xhci->cmd_timer);
305 xhci->xhc_state |= XHCI_STATE_DYING; 324 xhci->xhc_state |= XHCI_STATE_DYING;
306 xhci_quiesce(xhci);
307 xhci_halt(xhci); 325 xhci_halt(xhci);
308 return -ESHUTDOWN; 326 return -ESHUTDOWN;
309 } 327 }
@@ -473,9 +491,8 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
473 if (new_deq == cur_td->last_trb) 491 if (new_deq == cur_td->last_trb)
474 td_last_trb_found = true; 492 td_last_trb_found = true;
475 493
476 if (cycle_found && 494 if (cycle_found && trb_is_link(new_deq) &&
477 TRB_TYPE_LINK_LE32(new_deq->generic.field[3]) && 495 link_trb_toggles_cycle(new_deq))
478 new_deq->generic.field[3] & cpu_to_le32(LINK_TOGGLE))
479 state->new_cycle_state ^= 0x1; 496 state->new_cycle_state ^= 0x1;
480 497
481 next_trb(xhci, ep_ring, &new_seg, &new_deq); 498 next_trb(xhci, ep_ring, &new_seg, &new_deq);
@@ -511,54 +528,32 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
511 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring. 528 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
512 */ 529 */
513static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, 530static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
514 struct xhci_td *cur_td, bool flip_cycle) 531 struct xhci_td *td, bool flip_cycle)
515{ 532{
516 struct xhci_segment *cur_seg; 533 struct xhci_segment *seg = td->start_seg;
517 union xhci_trb *cur_trb; 534 union xhci_trb *trb = td->first_trb;
518 535
519 for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb; 536 while (1) {
520 true; 537 if (trb_is_link(trb)) {
521 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { 538 /* unchain chained link TRBs */
522 if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) { 539 trb->link.control &= cpu_to_le32(~TRB_CHAIN);
523 /* Unchain any chained Link TRBs, but
524 * leave the pointers intact.
525 */
526 cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
527 /* Flip the cycle bit (link TRBs can't be the first
528 * or last TRB).
529 */
530 if (flip_cycle)
531 cur_trb->generic.field[3] ^=
532 cpu_to_le32(TRB_CYCLE);
533 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
534 "Cancel (unchain) link TRB");
535 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
536 "Address = %p (0x%llx dma); "
537 "in seg %p (0x%llx dma)",
538 cur_trb,
539 (unsigned long long)xhci_trb_virt_to_dma(cur_seg, cur_trb),
540 cur_seg,
541 (unsigned long long)cur_seg->dma);
542 } else { 540 } else {
543 cur_trb->generic.field[0] = 0; 541 trb->generic.field[0] = 0;
544 cur_trb->generic.field[1] = 0; 542 trb->generic.field[1] = 0;
545 cur_trb->generic.field[2] = 0; 543 trb->generic.field[2] = 0;
546 /* Preserve only the cycle bit of this TRB */ 544 /* Preserve only the cycle bit of this TRB */
547 cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE); 545 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
548 /* Flip the cycle bit except on the first or last TRB */ 546 trb->generic.field[3] |= cpu_to_le32(
549 if (flip_cycle && cur_trb != cur_td->first_trb &&
550 cur_trb != cur_td->last_trb)
551 cur_trb->generic.field[3] ^=
552 cpu_to_le32(TRB_CYCLE);
553 cur_trb->generic.field[3] |= cpu_to_le32(
554 TRB_TYPE(TRB_TR_NOOP)); 547 TRB_TYPE(TRB_TR_NOOP));
555 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
556 "TRB to noop at offset 0x%llx",
557 (unsigned long long)
558 xhci_trb_virt_to_dma(cur_seg, cur_trb));
559 } 548 }
560 if (cur_trb == cur_td->last_trb) 549 /* flip cycle if asked to */
550 if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
551 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
552
553 if (trb == td->last_trb)
561 break; 554 break;
555
556 next_trb(xhci, ep_ring, &seg, &trb);
562 } 557 }
563} 558}
564 559
@@ -574,39 +569,33 @@ static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
574 ep->stop_cmds_pending--; 569 ep->stop_cmds_pending--;
575} 570}
576 571
577/* Must be called with xhci->lock held in interrupt context */ 572/*
573 * Must be called with xhci->lock held in interrupt context,
574 * releases and re-acquires xhci->lock
575 */
578static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci, 576static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
579 struct xhci_td *cur_td, int status) 577 struct xhci_td *cur_td, int status)
580{ 578{
581 struct usb_hcd *hcd; 579 struct urb *urb = cur_td->urb;
582 struct urb *urb; 580 struct urb_priv *urb_priv = urb->hcpriv;
583 struct urb_priv *urb_priv; 581 struct usb_hcd *hcd = bus_to_hcd(urb->dev->bus);
584 582
585 urb = cur_td->urb; 583 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
586 urb_priv = urb->hcpriv; 584 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
587 urb_priv->td_cnt++; 585 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
588 hcd = bus_to_hcd(urb->dev->bus); 586 if (xhci->quirks & XHCI_AMD_PLL_FIX)
589 587 usb_amd_quirk_pll_enable();
590 /* Only giveback urb when this is the last td in urb */
591 if (urb_priv->td_cnt == urb_priv->length) {
592 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
593 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
594 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
595 if (xhci->quirks & XHCI_AMD_PLL_FIX)
596 usb_amd_quirk_pll_enable();
597 }
598 } 588 }
599 usb_hcd_unlink_urb_from_ep(hcd, urb);
600
601 spin_unlock(&xhci->lock);
602 usb_hcd_giveback_urb(hcd, urb, status);
603 xhci_urb_free_priv(urb_priv);
604 spin_lock(&xhci->lock);
605 } 589 }
590 xhci_urb_free_priv(urb_priv);
591 usb_hcd_unlink_urb_from_ep(hcd, urb);
592 spin_unlock(&xhci->lock);
593 usb_hcd_giveback_urb(hcd, urb, status);
594 spin_lock(&xhci->lock);
606} 595}
607 596
608void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci, struct xhci_ring *ring, 597static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
609 struct xhci_td *td) 598 struct xhci_ring *ring, struct xhci_td *td)
610{ 599{
611 struct device *dev = xhci_to_hcd(xhci)->self.controller; 600 struct device *dev = xhci_to_hcd(xhci)->self.controller;
612 struct xhci_segment *seg = td->bounce_seg; 601 struct xhci_segment *seg = td->bounce_seg;
@@ -752,7 +741,9 @@ remove_finished_td:
752 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb); 741 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
753 if (ep_ring && cur_td->bounce_seg) 742 if (ep_ring && cur_td->bounce_seg)
754 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td); 743 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
755 xhci_giveback_urb_in_irq(xhci, cur_td, 0); 744 inc_td_cnt(cur_td->urb);
745 if (last_td_in_urb(cur_td))
746 xhci_giveback_urb_in_irq(xhci, cur_td, 0);
756 747
757 /* Stop processing the cancelled list if the watchdog timer is 748 /* Stop processing the cancelled list if the watchdog timer is
758 * running. 749 * running.
@@ -777,7 +768,10 @@ static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
777 768
778 if (cur_td->bounce_seg) 769 if (cur_td->bounce_seg)
779 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td); 770 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
780 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN); 771
772 inc_td_cnt(cur_td->urb);
773 if (last_td_in_urb(cur_td))
774 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
781 } 775 }
782} 776}
783 777
@@ -814,7 +808,10 @@ static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
814 cur_td = list_first_entry(&ep->cancelled_td_list, 808 cur_td = list_first_entry(&ep->cancelled_td_list,
815 struct xhci_td, cancelled_td_list); 809 struct xhci_td, cancelled_td_list);
816 list_del_init(&cur_td->cancelled_td_list); 810 list_del_init(&cur_td->cancelled_td_list);
817 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN); 811
812 inc_td_cnt(cur_td->urb);
813 if (last_td_in_urb(cur_td))
814 xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
818 } 815 }
819} 816}
820 817
@@ -1003,8 +1000,7 @@ static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
1003 break; 1000 break;
1004 case COMP_CTX_STATE: 1001 case COMP_CTX_STATE:
1005 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n"); 1002 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1006 ep_state = le32_to_cpu(ep_ctx->ep_info); 1003 ep_state = GET_EP_CTX_STATE(ep_ctx);
1007 ep_state &= EP_STATE_MASK;
1008 slot_state = le32_to_cpu(slot_ctx->dev_state); 1004 slot_state = le32_to_cpu(slot_ctx->dev_state);
1009 slot_state = GET_SLOT_STATE(slot_state); 1005 slot_state = GET_SLOT_STATE(slot_state);
1010 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 1006 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
@@ -1096,12 +1092,12 @@ static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci, int slot_id,
1096} 1092}
1097 1093
1098static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id, 1094static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
1099 u32 cmd_comp_code) 1095 struct xhci_command *command, u32 cmd_comp_code)
1100{ 1096{
1101 if (cmd_comp_code == COMP_SUCCESS) 1097 if (cmd_comp_code == COMP_SUCCESS)
1102 xhci->slot_id = slot_id; 1098 command->slot_id = slot_id;
1103 else 1099 else
1104 xhci->slot_id = 0; 1100 command->slot_id = 0;
1105} 1101}
1106 1102
1107static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id) 1103static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
@@ -1183,7 +1179,7 @@ static void xhci_handle_cmd_nec_get_fw(struct xhci_hcd *xhci,
1183 struct xhci_event_cmd *event) 1179 struct xhci_event_cmd *event)
1184{ 1180{
1185 if (!(xhci->quirks & XHCI_NEC_HOST)) { 1181 if (!(xhci->quirks & XHCI_NEC_HOST)) {
1186 xhci->error_bitmask |= 1 << 6; 1182 xhci_warn(xhci, "WARN NEC_GET_FW command on non-NEC host\n");
1187 return; 1183 return;
1188 } 1184 }
1189 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 1185 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
@@ -1325,14 +1321,13 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1325 cmd_trb = xhci->cmd_ring->dequeue; 1321 cmd_trb = xhci->cmd_ring->dequeue;
1326 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, 1322 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1327 cmd_trb); 1323 cmd_trb);
1328 /* Is the command ring deq ptr out of sync with the deq seg ptr? */ 1324 /*
1329 if (cmd_dequeue_dma == 0) { 1325 * Check whether the completion event is for our internal kept
1330 xhci->error_bitmask |= 1 << 4; 1326 * command.
1331 return; 1327 */
1332 } 1328 if (!cmd_dequeue_dma || cmd_dma != (u64)cmd_dequeue_dma) {
1333 /* Does the DMA address match our internal dequeue pointer address? */ 1329 xhci_warn(xhci,
1334 if (cmd_dma != (u64) cmd_dequeue_dma) { 1330 "ERROR mismatched command completion event\n");
1335 xhci->error_bitmask |= 1 << 5;
1336 return; 1331 return;
1337 } 1332 }
1338 1333
@@ -1371,7 +1366,7 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1371 cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3])); 1366 cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
1372 switch (cmd_type) { 1367 switch (cmd_type) {
1373 case TRB_ENABLE_SLOT: 1368 case TRB_ENABLE_SLOT:
1374 xhci_handle_cmd_enable_slot(xhci, slot_id, cmd_comp_code); 1369 xhci_handle_cmd_enable_slot(xhci, slot_id, cmd, cmd_comp_code);
1375 break; 1370 break;
1376 case TRB_DISABLE_SLOT: 1371 case TRB_DISABLE_SLOT:
1377 xhci_handle_cmd_disable_slot(xhci, slot_id); 1372 xhci_handle_cmd_disable_slot(xhci, slot_id);
@@ -1418,7 +1413,7 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
1418 break; 1413 break;
1419 default: 1414 default:
1420 /* Skip over unknown commands on the event ring */ 1415 /* Skip over unknown commands on the event ring */
1421 xhci->error_bitmask |= 1 << 6; 1416 xhci_info(xhci, "INFO unknown command type %d\n", cmd_type);
1422 break; 1417 break;
1423 } 1418 }
1424 1419
@@ -1519,10 +1514,10 @@ static void handle_port_status(struct xhci_hcd *xhci,
1519 bool bogus_port_status = false; 1514 bool bogus_port_status = false;
1520 1515
1521 /* Port status change events always have a successful completion code */ 1516 /* Port status change events always have a successful completion code */
1522 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) { 1517 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS)
1523 xhci_warn(xhci, "WARN: xHC returned failed port status event\n"); 1518 xhci_warn(xhci,
1524 xhci->error_bitmask |= 1 << 8; 1519 "WARN: xHC returned failed port status event\n");
1525 } 1520
1526 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0])); 1521 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1527 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id); 1522 xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1528 1523
@@ -1759,7 +1754,7 @@ struct xhci_segment *trb_in_td(struct xhci_hcd *xhci,
1759static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci, 1754static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1760 unsigned int slot_id, unsigned int ep_index, 1755 unsigned int slot_id, unsigned int ep_index,
1761 unsigned int stream_id, 1756 unsigned int stream_id,
1762 struct xhci_td *td, union xhci_trb *event_trb) 1757 struct xhci_td *td, union xhci_trb *ep_trb)
1763{ 1758{
1764 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index]; 1759 struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1765 struct xhci_command *command; 1760 struct xhci_command *command;
@@ -1798,8 +1793,7 @@ static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1798 * endpoint anyway. Check if a babble halted the 1793 * endpoint anyway. Check if a babble halted the
1799 * endpoint. 1794 * endpoint.
1800 */ 1795 */
1801 if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == 1796 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
1802 cpu_to_le32(EP_STATE_HALTED))
1803 return 1; 1797 return 1;
1804 1798
1805 return 0; 1799 return 0;
@@ -1824,7 +1818,7 @@ int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1824 * Return 1 if the urb can be given back. 1818 * Return 1 if the urb can be given back.
1825 */ 1819 */
1826static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td, 1820static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1827 union xhci_trb *event_trb, struct xhci_transfer_event *event, 1821 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1828 struct xhci_virt_ep *ep, int *status, bool skip) 1822 struct xhci_virt_ep *ep, int *status, bool skip)
1829{ 1823{
1830 struct xhci_virt_device *xdev; 1824 struct xhci_virt_device *xdev;
@@ -1833,7 +1827,6 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1833 int ep_index; 1827 int ep_index;
1834 struct urb *urb = NULL; 1828 struct urb *urb = NULL;
1835 struct xhci_ep_ctx *ep_ctx; 1829 struct xhci_ep_ctx *ep_ctx;
1836 int ret = 0;
1837 struct urb_priv *urb_priv; 1830 struct urb_priv *urb_priv;
1838 u32 trb_comp_code; 1831 u32 trb_comp_code;
1839 1832
@@ -1866,7 +1859,7 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1866 * The class driver clears the device side halt later. 1859 * The class driver clears the device side halt later.
1867 */ 1860 */
1868 xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index, 1861 xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
1869 ep_ring->stream_id, td, event_trb); 1862 ep_ring->stream_id, td, ep_trb);
1870 } else { 1863 } else {
1871 /* Update ring dequeue pointer */ 1864 /* Update ring dequeue pointer */
1872 while (ep_ring->dequeue != td->last_trb) 1865 while (ep_ring->dequeue != td->last_trb)
@@ -1889,41 +1882,54 @@ td_cleanup:
1889 * unsigned). Play it safe and say we didn't transfer anything. 1882 * unsigned). Play it safe and say we didn't transfer anything.
1890 */ 1883 */
1891 if (urb->actual_length > urb->transfer_buffer_length) { 1884 if (urb->actual_length > urb->transfer_buffer_length) {
1892 xhci_warn(xhci, "URB transfer length is wrong, xHC issue? req. len = %u, act. len = %u\n", 1885 xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
1893 urb->transfer_buffer_length, 1886 urb->transfer_buffer_length, urb->actual_length);
1894 urb->actual_length);
1895 urb->actual_length = 0; 1887 urb->actual_length = 0;
1896 if (td->urb->transfer_flags & URB_SHORT_NOT_OK) 1888 *status = 0;
1897 *status = -EREMOTEIO;
1898 else
1899 *status = 0;
1900 } 1889 }
1901 list_del_init(&td->td_list); 1890 list_del_init(&td->td_list);
1902 /* Was this TD slated to be cancelled but completed anyway? */ 1891 /* Was this TD slated to be cancelled but completed anyway? */
1903 if (!list_empty(&td->cancelled_td_list)) 1892 if (!list_empty(&td->cancelled_td_list))
1904 list_del_init(&td->cancelled_td_list); 1893 list_del_init(&td->cancelled_td_list);
1905 1894
1906 urb_priv->td_cnt++; 1895 inc_td_cnt(urb);
1907 /* Giveback the urb when all the tds are completed */ 1896 /* Giveback the urb when all the tds are completed */
1908 if (urb_priv->td_cnt == urb_priv->length) { 1897 if (last_td_in_urb(td)) {
1909 ret = 1; 1898 if ((urb->actual_length != urb->transfer_buffer_length &&
1910 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { 1899 (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
1911 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--; 1900 (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
1912 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) { 1901 xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
1913 if (xhci->quirks & XHCI_AMD_PLL_FIX) 1902 urb, urb->actual_length,
1914 usb_amd_quirk_pll_enable(); 1903 urb->transfer_buffer_length, *status);
1915 } 1904
1916 } 1905 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
1906 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
1907 *status = 0;
1908 xhci_giveback_urb_in_irq(xhci, td, *status);
1917 } 1909 }
1910 return 0;
1911}
1918 1912
1919 return ret; 1913/* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
1914static int sum_trb_lengths(struct xhci_hcd *xhci, struct xhci_ring *ring,
1915 union xhci_trb *stop_trb)
1916{
1917 u32 sum;
1918 union xhci_trb *trb = ring->dequeue;
1919 struct xhci_segment *seg = ring->deq_seg;
1920
1921 for (sum = 0; trb != stop_trb; next_trb(xhci, ring, &seg, &trb)) {
1922 if (!trb_is_noop(trb) && !trb_is_link(trb))
1923 sum += TRB_LEN(le32_to_cpu(trb->generic.field[2]));
1924 }
1925 return sum;
1920} 1926}
1921 1927
1922/* 1928/*
1923 * Process control tds, update urb status and actual_length. 1929 * Process control tds, update urb status and actual_length.
1924 */ 1930 */
1925static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td, 1931static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1926 union xhci_trb *event_trb, struct xhci_transfer_event *event, 1932 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1927 struct xhci_virt_ep *ep, int *status) 1933 struct xhci_virt_ep *ep, int *status)
1928{ 1934{
1929 struct xhci_virt_device *xdev; 1935 struct xhci_virt_device *xdev;
@@ -1932,6 +1938,8 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1932 int ep_index; 1938 int ep_index;
1933 struct xhci_ep_ctx *ep_ctx; 1939 struct xhci_ep_ctx *ep_ctx;
1934 u32 trb_comp_code; 1940 u32 trb_comp_code;
1941 u32 remaining, requested;
1942 bool on_data_stage;
1935 1943
1936 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); 1944 slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1937 xdev = xhci->devs[slot_id]; 1945 xdev = xhci->devs[slot_id];
@@ -1939,195 +1947,161 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1939 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 1947 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1940 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index); 1948 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1941 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1949 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1950 requested = td->urb->transfer_buffer_length;
1951 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1952
1953 /* not setup (dequeue), or status stage means we are at data stage */
1954 on_data_stage = (ep_trb != ep_ring->dequeue && ep_trb != td->last_trb);
1942 1955
1943 switch (trb_comp_code) { 1956 switch (trb_comp_code) {
1944 case COMP_SUCCESS: 1957 case COMP_SUCCESS:
1945 if (event_trb == ep_ring->dequeue) { 1958 if (ep_trb != td->last_trb) {
1946 xhci_warn(xhci, "WARN: Success on ctrl setup TRB " 1959 xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
1947 "without IOC set??\n"); 1960 on_data_stage ? "data" : "setup");
1948 *status = -ESHUTDOWN;
1949 } else if (event_trb != td->last_trb) {
1950 xhci_warn(xhci, "WARN: Success on ctrl data TRB "
1951 "without IOC set??\n");
1952 *status = -ESHUTDOWN; 1961 *status = -ESHUTDOWN;
1953 } else { 1962 break;
1954 *status = 0;
1955 } 1963 }
1964 *status = 0;
1956 break; 1965 break;
1957 case COMP_SHORT_TX: 1966 case COMP_SHORT_TX:
1958 if (td->urb->transfer_flags & URB_SHORT_NOT_OK) 1967 *status = 0;
1959 *status = -EREMOTEIO;
1960 else
1961 *status = 0;
1962 break; 1968 break;
1963 case COMP_STOP_SHORT: 1969 case COMP_STOP_SHORT:
1964 if (event_trb == ep_ring->dequeue || event_trb == td->last_trb) 1970 if (on_data_stage)
1965 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n"); 1971 td->urb->actual_length = remaining;
1966 else 1972 else
1967 td->urb->actual_length = 1973 xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
1968 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1974 goto finish_td;
1969
1970 return finish_td(xhci, td, event_trb, event, ep, status, false);
1971 case COMP_STOP: 1975 case COMP_STOP:
1972 /* Did we stop at data stage? */ 1976 if (on_data_stage)
1973 if (event_trb != ep_ring->dequeue && event_trb != td->last_trb) 1977 td->urb->actual_length = requested - remaining;
1974 td->urb->actual_length = 1978 goto finish_td;
1975 td->urb->transfer_buffer_length -
1976 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1977 /* fall through */
1978 case COMP_STOP_INVAL: 1979 case COMP_STOP_INVAL:
1979 return finish_td(xhci, td, event_trb, event, ep, status, false); 1980 goto finish_td;
1980 default: 1981 default:
1981 if (!xhci_requires_manual_halt_cleanup(xhci, 1982 if (!xhci_requires_manual_halt_cleanup(xhci,
1982 ep_ctx, trb_comp_code)) 1983 ep_ctx, trb_comp_code))
1983 break; 1984 break;
1984 xhci_dbg(xhci, "TRB error code %u, " 1985 xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
1985 "halted endpoint index = %u\n", 1986 trb_comp_code, ep_index);
1986 trb_comp_code, ep_index);
1987 /* else fall through */ 1987 /* else fall through */
1988 case COMP_STALL: 1988 case COMP_STALL:
1989 /* Did we transfer part of the data (middle) phase? */ 1989 /* Did we transfer part of the data (middle) phase? */
1990 if (event_trb != ep_ring->dequeue && 1990 if (on_data_stage)
1991 event_trb != td->last_trb) 1991 td->urb->actual_length = requested - remaining;
1992 td->urb->actual_length =
1993 td->urb->transfer_buffer_length -
1994 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1995 else if (!td->urb_length_set) 1992 else if (!td->urb_length_set)
1996 td->urb->actual_length = 0; 1993 td->urb->actual_length = 0;
1997 1994 goto finish_td;
1998 return finish_td(xhci, td, event_trb, event, ep, status, false);
1999 } 1995 }
1996
1997 /* stopped at setup stage, no data transferred */
1998 if (ep_trb == ep_ring->dequeue)
1999 goto finish_td;
2000
2000 /* 2001 /*
2001 * Did we transfer any data, despite the errors that might have 2002 * if on data stage then update the actual_length of the URB and flag it
2002 * happened? I.e. did we get past the setup stage? 2003 * as set, so it won't be overwritten in the event for the last TRB.
2003 */ 2004 */
2004 if (event_trb != ep_ring->dequeue) { 2005 if (on_data_stage) {
2005 /* The event was for the status stage */ 2006 td->urb_length_set = true;
2006 if (event_trb == td->last_trb) { 2007 td->urb->actual_length = requested - remaining;
2007 if (td->urb_length_set) { 2008 xhci_dbg(xhci, "Waiting for status stage event\n");
2008 /* Don't overwrite a previously set error code 2009 return 0;
2009 */
2010 if ((*status == -EINPROGRESS || *status == 0) &&
2011 (td->urb->transfer_flags
2012 & URB_SHORT_NOT_OK))
2013 /* Did we already see a short data
2014 * stage? */
2015 *status = -EREMOTEIO;
2016 } else {
2017 td->urb->actual_length =
2018 td->urb->transfer_buffer_length;
2019 }
2020 } else {
2021 /*
2022 * Maybe the event was for the data stage? If so, update
2023 * already the actual_length of the URB and flag it as
2024 * set, so that it is not overwritten in the event for
2025 * the last TRB.
2026 */
2027 td->urb_length_set = true;
2028 td->urb->actual_length =
2029 td->urb->transfer_buffer_length -
2030 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2031 xhci_dbg(xhci, "Waiting for status "
2032 "stage event\n");
2033 return 0;
2034 }
2035 } 2010 }
2036 2011
2037 return finish_td(xhci, td, event_trb, event, ep, status, false); 2012 /* at status stage */
2013 if (!td->urb_length_set)
2014 td->urb->actual_length = requested;
2015
2016finish_td:
2017 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2038} 2018}
2039 2019
2040/* 2020/*
2041 * Process isochronous tds, update urb packet status and actual_length. 2021 * Process isochronous tds, update urb packet status and actual_length.
2042 */ 2022 */
2043static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, 2023static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2044 union xhci_trb *event_trb, struct xhci_transfer_event *event, 2024 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2045 struct xhci_virt_ep *ep, int *status) 2025 struct xhci_virt_ep *ep, int *status)
2046{ 2026{
2047 struct xhci_ring *ep_ring; 2027 struct xhci_ring *ep_ring;
2048 struct urb_priv *urb_priv; 2028 struct urb_priv *urb_priv;
2049 int idx; 2029 int idx;
2050 int len = 0;
2051 union xhci_trb *cur_trb;
2052 struct xhci_segment *cur_seg;
2053 struct usb_iso_packet_descriptor *frame; 2030 struct usb_iso_packet_descriptor *frame;
2054 u32 trb_comp_code; 2031 u32 trb_comp_code;
2055 bool skip_td = false; 2032 bool sum_trbs_for_length = false;
2033 u32 remaining, requested, ep_trb_len;
2034 int short_framestatus;
2056 2035
2057 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 2036 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2058 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 2037 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2059 urb_priv = td->urb->hcpriv; 2038 urb_priv = td->urb->hcpriv;
2060 idx = urb_priv->td_cnt; 2039 idx = urb_priv->td_cnt;
2061 frame = &td->urb->iso_frame_desc[idx]; 2040 frame = &td->urb->iso_frame_desc[idx];
2041 requested = frame->length;
2042 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2043 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2044 short_framestatus = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2045 -EREMOTEIO : 0;
2062 2046
2063 /* handle completion code */ 2047 /* handle completion code */
2064 switch (trb_comp_code) { 2048 switch (trb_comp_code) {
2065 case COMP_SUCCESS: 2049 case COMP_SUCCESS:
2066 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) { 2050 if (remaining) {
2067 frame->status = 0; 2051 frame->status = short_framestatus;
2052 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2053 sum_trbs_for_length = true;
2068 break; 2054 break;
2069 } 2055 }
2070 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH)) 2056 frame->status = 0;
2071 trb_comp_code = COMP_SHORT_TX; 2057 break;
2072 /* fallthrough */
2073 case COMP_STOP_SHORT:
2074 case COMP_SHORT_TX: 2058 case COMP_SHORT_TX:
2075 frame->status = td->urb->transfer_flags & URB_SHORT_NOT_OK ? 2059 frame->status = short_framestatus;
2076 -EREMOTEIO : 0; 2060 sum_trbs_for_length = true;
2077 break; 2061 break;
2078 case COMP_BW_OVER: 2062 case COMP_BW_OVER:
2079 frame->status = -ECOMM; 2063 frame->status = -ECOMM;
2080 skip_td = true;
2081 break; 2064 break;
2082 case COMP_BUFF_OVER: 2065 case COMP_BUFF_OVER:
2083 case COMP_BABBLE: 2066 case COMP_BABBLE:
2084 frame->status = -EOVERFLOW; 2067 frame->status = -EOVERFLOW;
2085 skip_td = true;
2086 break; 2068 break;
2087 case COMP_DEV_ERR: 2069 case COMP_DEV_ERR:
2088 case COMP_STALL: 2070 case COMP_STALL:
2089 frame->status = -EPROTO; 2071 frame->status = -EPROTO;
2090 skip_td = true;
2091 break; 2072 break;
2092 case COMP_TX_ERR: 2073 case COMP_TX_ERR:
2093 frame->status = -EPROTO; 2074 frame->status = -EPROTO;
2094 if (event_trb != td->last_trb) 2075 if (ep_trb != td->last_trb)
2095 return 0; 2076 return 0;
2096 skip_td = true;
2097 break; 2077 break;
2098 case COMP_STOP: 2078 case COMP_STOP:
2079 sum_trbs_for_length = true;
2080 break;
2081 case COMP_STOP_SHORT:
2082 /* field normally containing residue now contains tranferred */
2083 frame->status = short_framestatus;
2084 requested = remaining;
2085 break;
2099 case COMP_STOP_INVAL: 2086 case COMP_STOP_INVAL:
2087 requested = 0;
2088 remaining = 0;
2100 break; 2089 break;
2101 default: 2090 default:
2091 sum_trbs_for_length = true;
2102 frame->status = -1; 2092 frame->status = -1;
2103 break; 2093 break;
2104 } 2094 }
2105 2095
2106 if (trb_comp_code == COMP_SUCCESS || skip_td) { 2096 if (sum_trbs_for_length)
2107 frame->actual_length = frame->length; 2097 frame->actual_length = sum_trb_lengths(xhci, ep_ring, ep_trb) +
2108 td->urb->actual_length += frame->length; 2098 ep_trb_len - remaining;
2109 } else if (trb_comp_code == COMP_STOP_SHORT) { 2099 else
2110 frame->actual_length = 2100 frame->actual_length = requested;
2111 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2112 td->urb->actual_length += frame->actual_length;
2113 } else {
2114 for (cur_trb = ep_ring->dequeue,
2115 cur_seg = ep_ring->deq_seg; cur_trb != event_trb;
2116 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2117 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2118 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2119 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2120 }
2121 len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2122 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2123 2101
2124 if (trb_comp_code != COMP_STOP_INVAL) { 2102 td->urb->actual_length += frame->actual_length;
2125 frame->actual_length = len;
2126 td->urb->actual_length += len;
2127 }
2128 }
2129 2103
2130 return finish_td(xhci, td, event_trb, event, ep, status, false); 2104 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2131} 2105}
2132 2106
2133static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, 2107static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
@@ -2162,119 +2136,62 @@ static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2162 * Process bulk and interrupt tds, update urb status and actual_length. 2136 * Process bulk and interrupt tds, update urb status and actual_length.
2163 */ 2137 */
2164static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, 2138static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2165 union xhci_trb *event_trb, struct xhci_transfer_event *event, 2139 union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2166 struct xhci_virt_ep *ep, int *status) 2140 struct xhci_virt_ep *ep, int *status)
2167{ 2141{
2168 struct xhci_ring *ep_ring; 2142 struct xhci_ring *ep_ring;
2169 union xhci_trb *cur_trb;
2170 struct xhci_segment *cur_seg;
2171 u32 trb_comp_code; 2143 u32 trb_comp_code;
2144 u32 remaining, requested, ep_trb_len;
2172 2145
2173 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 2146 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2174 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 2147 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2148 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2149 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2150 requested = td->urb->transfer_buffer_length;
2175 2151
2176 switch (trb_comp_code) { 2152 switch (trb_comp_code) {
2177 case COMP_SUCCESS: 2153 case COMP_SUCCESS:
2178 /* Double check that the HW transferred everything. */ 2154 /* handle success with untransferred data as short packet */
2179 if (event_trb != td->last_trb || 2155 if (ep_trb != td->last_trb || remaining) {
2180 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { 2156 xhci_warn(xhci, "WARN Successful completion on short TX\n");
2181 xhci_warn(xhci, "WARN Successful completion " 2157 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2182 "on short TX\n"); 2158 td->urb->ep->desc.bEndpointAddress,
2183 if (td->urb->transfer_flags & URB_SHORT_NOT_OK) 2159 requested, remaining);
2184 *status = -EREMOTEIO;
2185 else
2186 *status = 0;
2187 if ((xhci->quirks & XHCI_TRUST_TX_LENGTH))
2188 trb_comp_code = COMP_SHORT_TX;
2189 } else {
2190 *status = 0;
2191 } 2160 }
2161 *status = 0;
2192 break; 2162 break;
2193 case COMP_STOP_SHORT:
2194 case COMP_SHORT_TX: 2163 case COMP_SHORT_TX:
2195 if (td->urb->transfer_flags & URB_SHORT_NOT_OK) 2164 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2196 *status = -EREMOTEIO; 2165 td->urb->ep->desc.bEndpointAddress,
2197 else 2166 requested, remaining);
2198 *status = 0; 2167 *status = 0;
2168 break;
2169 case COMP_STOP_SHORT:
2170 td->urb->actual_length = remaining;
2171 goto finish_td;
2172 case COMP_STOP_INVAL:
2173 /* stopped on ep trb with invalid length, exclude it */
2174 ep_trb_len = 0;
2175 remaining = 0;
2199 break; 2176 break;
2200 default: 2177 default:
2201 /* Others already handled above */ 2178 /* do nothing */
2202 break; 2179 break;
2203 } 2180 }
2204 if (trb_comp_code == COMP_SHORT_TX)
2205 xhci_dbg(xhci, "ep %#x - asked for %d bytes, "
2206 "%d bytes untransferred\n",
2207 td->urb->ep->desc.bEndpointAddress,
2208 td->urb->transfer_buffer_length,
2209 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2210 /* Stopped - short packet completion */
2211 if (trb_comp_code == COMP_STOP_SHORT) {
2212 td->urb->actual_length =
2213 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2214 2181
2215 if (td->urb->transfer_buffer_length < 2182 if (ep_trb == td->last_trb)
2216 td->urb->actual_length) { 2183 td->urb->actual_length = requested - remaining;
2217 xhci_warn(xhci, "HC gave bad length of %d bytes txed\n", 2184 else
2218 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len))); 2185 td->urb->actual_length =
2219 td->urb->actual_length = 0; 2186 sum_trb_lengths(xhci, ep_ring, ep_trb) +
2220 /* status will be set by usb core for canceled urbs */ 2187 ep_trb_len - remaining;
2221 } 2188finish_td:
2222 /* Fast path - was this the last TRB in the TD for this URB? */ 2189 if (remaining > requested) {
2223 } else if (event_trb == td->last_trb) { 2190 xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
2224 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { 2191 remaining);
2225 td->urb->actual_length =
2226 td->urb->transfer_buffer_length -
2227 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2228 if (td->urb->transfer_buffer_length <
2229 td->urb->actual_length) {
2230 xhci_warn(xhci, "HC gave bad length "
2231 "of %d bytes left\n",
2232 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)));
2233 td->urb->actual_length = 0;
2234 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2235 *status = -EREMOTEIO;
2236 else
2237 *status = 0;
2238 }
2239 /* Don't overwrite a previously set error code */
2240 if (*status == -EINPROGRESS) {
2241 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
2242 *status = -EREMOTEIO;
2243 else
2244 *status = 0;
2245 }
2246 } else {
2247 td->urb->actual_length =
2248 td->urb->transfer_buffer_length;
2249 /* Ignore a short packet completion if the
2250 * untransferred length was zero.
2251 */
2252 if (*status == -EREMOTEIO)
2253 *status = 0;
2254 }
2255 } else {
2256 /* Slow path - walk the list, starting from the dequeue
2257 * pointer, to get the actual length transferred.
2258 */
2259 td->urb->actual_length = 0; 2192 td->urb->actual_length = 0;
2260 for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
2261 cur_trb != event_trb;
2262 next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
2263 if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) &&
2264 !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3]))
2265 td->urb->actual_length +=
2266 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2]));
2267 }
2268 /* If the ring didn't stop on a Link or No-op TRB, add
2269 * in the actual bytes transferred from the Normal TRB
2270 */
2271 if (trb_comp_code != COMP_STOP_INVAL)
2272 td->urb->actual_length +=
2273 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) -
2274 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2275 } 2193 }
2276 2194 return finish_td(xhci, td, ep_trb, event, ep, status, false);
2277 return finish_td(xhci, td, event_trb, event, ep, status, false);
2278} 2195}
2279 2196
2280/* 2197/*
@@ -2293,16 +2210,13 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2293 unsigned int slot_id; 2210 unsigned int slot_id;
2294 int ep_index; 2211 int ep_index;
2295 struct xhci_td *td = NULL; 2212 struct xhci_td *td = NULL;
2296 dma_addr_t event_dma; 2213 dma_addr_t ep_trb_dma;
2297 struct xhci_segment *event_seg; 2214 struct xhci_segment *ep_seg;
2298 union xhci_trb *event_trb; 2215 union xhci_trb *ep_trb;
2299 struct urb *urb = NULL;
2300 int status = -EINPROGRESS; 2216 int status = -EINPROGRESS;
2301 struct urb_priv *urb_priv;
2302 struct xhci_ep_ctx *ep_ctx; 2217 struct xhci_ep_ctx *ep_ctx;
2303 struct list_head *tmp; 2218 struct list_head *tmp;
2304 u32 trb_comp_code; 2219 u32 trb_comp_code;
2305 int ret = 0;
2306 int td_num = 0; 2220 int td_num = 0;
2307 bool handling_skipped_tds = false; 2221 bool handling_skipped_tds = false;
2308 2222
@@ -2328,9 +2242,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2328 ep = &xdev->eps[ep_index]; 2242 ep = &xdev->eps[ep_index];
2329 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 2243 ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2330 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index); 2244 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2331 if (!ep_ring || 2245 if (!ep_ring || GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
2332 (le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
2333 EP_STATE_DISABLED) {
2334 xhci_err(xhci, "ERROR Transfer event for disabled endpoint " 2246 xhci_err(xhci, "ERROR Transfer event for disabled endpoint "
2335 "or incorrect stream ring\n"); 2247 "or incorrect stream ring\n");
2336 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n", 2248 xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
@@ -2352,7 +2264,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2352 td_num++; 2264 td_num++;
2353 } 2265 }
2354 2266
2355 event_dma = le64_to_cpu(event->buffer); 2267 ep_trb_dma = le64_to_cpu(event->buffer);
2356 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 2268 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2357 /* Look for common error cases */ 2269 /* Look for common error cases */
2358 switch (trb_comp_code) { 2270 switch (trb_comp_code) {
@@ -2480,7 +2392,6 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2480 xhci_dbg(xhci, "td_list is empty while skip " 2392 xhci_dbg(xhci, "td_list is empty while skip "
2481 "flag set. Clear skip flag.\n"); 2393 "flag set. Clear skip flag.\n");
2482 } 2394 }
2483 ret = 0;
2484 goto cleanup; 2395 goto cleanup;
2485 } 2396 }
2486 2397
@@ -2489,7 +2400,6 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2489 ep->skip = false; 2400 ep->skip = false;
2490 xhci_dbg(xhci, "All tds on the ep_ring skipped. " 2401 xhci_dbg(xhci, "All tds on the ep_ring skipped. "
2491 "Clear skip flag.\n"); 2402 "Clear skip flag.\n");
2492 ret = 0;
2493 goto cleanup; 2403 goto cleanup;
2494 } 2404 }
2495 2405
@@ -2498,8 +2408,8 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2498 td_num--; 2408 td_num--;
2499 2409
2500 /* Is this a TRB in the currently executing TD? */ 2410 /* Is this a TRB in the currently executing TD? */
2501 event_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue, 2411 ep_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
2502 td->last_trb, event_dma, false); 2412 td->last_trb, ep_trb_dma, false);
2503 2413
2504 /* 2414 /*
2505 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE 2415 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
@@ -2509,13 +2419,12 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2509 * last TRB of the previous TD. The command completion handle 2419 * last TRB of the previous TD. The command completion handle
2510 * will take care the rest. 2420 * will take care the rest.
2511 */ 2421 */
2512 if (!event_seg && (trb_comp_code == COMP_STOP || 2422 if (!ep_seg && (trb_comp_code == COMP_STOP ||
2513 trb_comp_code == COMP_STOP_INVAL)) { 2423 trb_comp_code == COMP_STOP_INVAL)) {
2514 ret = 0;
2515 goto cleanup; 2424 goto cleanup;
2516 } 2425 }
2517 2426
2518 if (!event_seg) { 2427 if (!ep_seg) {
2519 if (!ep->skip || 2428 if (!ep->skip ||
2520 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) { 2429 !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2521 /* Some host controllers give a spurious 2430 /* Some host controllers give a spurious
@@ -2525,7 +2434,6 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2525 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) && 2434 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2526 ep_ring->last_td_was_short) { 2435 ep_ring->last_td_was_short) {
2527 ep_ring->last_td_was_short = false; 2436 ep_ring->last_td_was_short = false;
2528 ret = 0;
2529 goto cleanup; 2437 goto cleanup;
2530 } 2438 }
2531 /* HC is busted, give up! */ 2439 /* HC is busted, give up! */
@@ -2536,11 +2444,11 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2536 trb_comp_code); 2444 trb_comp_code);
2537 trb_in_td(xhci, ep_ring->deq_seg, 2445 trb_in_td(xhci, ep_ring->deq_seg,
2538 ep_ring->dequeue, td->last_trb, 2446 ep_ring->dequeue, td->last_trb,
2539 event_dma, true); 2447 ep_trb_dma, true);
2540 return -ESHUTDOWN; 2448 return -ESHUTDOWN;
2541 } 2449 }
2542 2450
2543 ret = skip_isoc_td(xhci, td, event, ep, &status); 2451 skip_isoc_td(xhci, td, event, ep, &status);
2544 goto cleanup; 2452 goto cleanup;
2545 } 2453 }
2546 if (trb_comp_code == COMP_SHORT_TX) 2454 if (trb_comp_code == COMP_SHORT_TX)
@@ -2553,36 +2461,28 @@ static int handle_tx_event(struct xhci_hcd *xhci,
2553 ep->skip = false; 2461 ep->skip = false;
2554 } 2462 }
2555 2463
2556 event_trb = &event_seg->trbs[(event_dma - event_seg->dma) / 2464 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
2557 sizeof(*event_trb)]; 2465 sizeof(*ep_trb)];
2558 /* 2466 /*
2559 * No-op TRB should not trigger interrupts. 2467 * No-op TRB should not trigger interrupts.
2560 * If event_trb is a no-op TRB, it means the 2468 * If ep_trb is a no-op TRB, it means the
2561 * corresponding TD has been cancelled. Just ignore 2469 * corresponding TD has been cancelled. Just ignore
2562 * the TD. 2470 * the TD.
2563 */ 2471 */
2564 if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) { 2472 if (trb_is_noop(ep_trb)) {
2565 xhci_dbg(xhci, 2473 xhci_dbg(xhci, "ep_trb is a no-op TRB. Skip it\n");
2566 "event_trb is a no-op TRB. Skip it\n");
2567 goto cleanup; 2474 goto cleanup;
2568 } 2475 }
2569 2476
2570 /* Now update the urb's actual_length and give back to 2477 /* update the urb's actual_length and give back to the core */
2571 * the core
2572 */
2573 if (usb_endpoint_xfer_control(&td->urb->ep->desc)) 2478 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2574 ret = process_ctrl_td(xhci, td, event_trb, event, ep, 2479 process_ctrl_td(xhci, td, ep_trb, event, ep, &status);
2575 &status);
2576 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc)) 2480 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2577 ret = process_isoc_td(xhci, td, event_trb, event, ep, 2481 process_isoc_td(xhci, td, ep_trb, event, ep, &status);
2578 &status);
2579 else 2482 else
2580 ret = process_bulk_intr_td(xhci, td, event_trb, event, 2483 process_bulk_intr_td(xhci, td, ep_trb, event, ep,
2581 ep, &status); 2484 &status);
2582
2583cleanup: 2485cleanup:
2584
2585
2586 handling_skipped_tds = ep->skip && 2486 handling_skipped_tds = ep->skip &&
2587 trb_comp_code != COMP_MISSED_INT && 2487 trb_comp_code != COMP_MISSED_INT &&
2588 trb_comp_code != COMP_PING_ERR; 2488 trb_comp_code != COMP_PING_ERR;
@@ -2594,33 +2494,6 @@ cleanup:
2594 if (!handling_skipped_tds) 2494 if (!handling_skipped_tds)
2595 inc_deq(xhci, xhci->event_ring); 2495 inc_deq(xhci, xhci->event_ring);
2596 2496
2597 if (ret) {
2598 urb = td->urb;
2599 urb_priv = urb->hcpriv;
2600
2601 xhci_urb_free_priv(urb_priv);
2602
2603 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
2604 if ((urb->actual_length != urb->transfer_buffer_length &&
2605 (urb->transfer_flags &
2606 URB_SHORT_NOT_OK)) ||
2607 (status != 0 &&
2608 !usb_endpoint_xfer_isoc(&urb->ep->desc)))
2609 xhci_dbg(xhci, "Giveback URB %p, len = %d, "
2610 "expected = %d, status = %d\n",
2611 urb, urb->actual_length,
2612 urb->transfer_buffer_length,
2613 status);
2614 spin_unlock(&xhci->lock);
2615 /* EHCI, UHCI, and OHCI always unconditionally set the
2616 * urb->status of an isochronous endpoint to 0.
2617 */
2618 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
2619 status = 0;
2620 usb_hcd_giveback_urb(bus_to_hcd(urb->dev->bus), urb, status);
2621 spin_lock(&xhci->lock);
2622 }
2623
2624 /* 2497 /*
2625 * If ep->skip is set, it means there are missed tds on the 2498 * If ep->skip is set, it means there are missed tds on the
2626 * endpoint ring need to take care of. 2499 * endpoint ring need to take care of.
@@ -2644,18 +2517,17 @@ static int xhci_handle_event(struct xhci_hcd *xhci)
2644 int update_ptrs = 1; 2517 int update_ptrs = 1;
2645 int ret; 2518 int ret;
2646 2519
2520 /* Event ring hasn't been allocated yet. */
2647 if (!xhci->event_ring || !xhci->event_ring->dequeue) { 2521 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2648 xhci->error_bitmask |= 1 << 1; 2522 xhci_err(xhci, "ERROR event ring not ready\n");
2649 return 0; 2523 return -ENOMEM;
2650 } 2524 }
2651 2525
2652 event = xhci->event_ring->dequeue; 2526 event = xhci->event_ring->dequeue;
2653 /* Does the HC or OS own the TRB? */ 2527 /* Does the HC or OS own the TRB? */
2654 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) != 2528 if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2655 xhci->event_ring->cycle_state) { 2529 xhci->event_ring->cycle_state)
2656 xhci->error_bitmask |= 1 << 2;
2657 return 0; 2530 return 0;
2658 }
2659 2531
2660 /* 2532 /*
2661 * Barrier between reading the TRB_CYCLE (valid) flag above and any 2533 * Barrier between reading the TRB_CYCLE (valid) flag above and any
@@ -2663,7 +2535,7 @@ static int xhci_handle_event(struct xhci_hcd *xhci)
2663 */ 2535 */
2664 rmb(); 2536 rmb();
2665 /* FIXME: Handle more event types. */ 2537 /* FIXME: Handle more event types. */
2666 switch ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK)) { 2538 switch (le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) {
2667 case TRB_TYPE(TRB_COMPLETION): 2539 case TRB_TYPE(TRB_COMPLETION):
2668 handle_cmd_completion(xhci, &event->event_cmd); 2540 handle_cmd_completion(xhci, &event->event_cmd);
2669 break; 2541 break;
@@ -2673,9 +2545,7 @@ static int xhci_handle_event(struct xhci_hcd *xhci)
2673 break; 2545 break;
2674 case TRB_TYPE(TRB_TRANSFER): 2546 case TRB_TYPE(TRB_TRANSFER):
2675 ret = handle_tx_event(xhci, &event->trans_event); 2547 ret = handle_tx_event(xhci, &event->trans_event);
2676 if (ret < 0) 2548 if (ret >= 0)
2677 xhci->error_bitmask |= 1 << 9;
2678 else
2679 update_ptrs = 0; 2549 update_ptrs = 0;
2680 break; 2550 break;
2681 case TRB_TYPE(TRB_DEV_NOTE): 2551 case TRB_TYPE(TRB_DEV_NOTE):
@@ -2686,7 +2556,9 @@ static int xhci_handle_event(struct xhci_hcd *xhci)
2686 TRB_TYPE(48)) 2556 TRB_TYPE(48))
2687 handle_vendor_event(xhci, event); 2557 handle_vendor_event(xhci, event);
2688 else 2558 else
2689 xhci->error_bitmask |= 1 << 3; 2559 xhci_warn(xhci, "ERROR unknown event type %d\n",
2560 TRB_FIELD_TO_TYPE(
2561 le32_to_cpu(event->event_cmd.flags)));
2690 } 2562 }
2691 /* Any of the above functions may drop and re-acquire the lock, so check 2563 /* Any of the above functions may drop and re-acquire the lock, so check
2692 * to make sure a watchdog timer didn't mark the host as non-responsive. 2564 * to make sure a watchdog timer didn't mark the host as non-responsive.
@@ -2931,8 +2803,7 @@ static int prepare_transfer(struct xhci_hcd *xhci,
2931 return -EINVAL; 2803 return -EINVAL;
2932 } 2804 }
2933 2805
2934 ret = prepare_ring(xhci, ep_ring, 2806 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
2935 le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK,
2936 num_trbs, mem_flags); 2807 num_trbs, mem_flags);
2937 if (ret) 2808 if (ret)
2938 return ret; 2809 return ret;
@@ -3120,7 +2991,7 @@ static u32 xhci_td_remainder(struct xhci_hcd *xhci, int transferred,
3120 if (xhci->quirks & XHCI_MTK_HOST) 2991 if (xhci->quirks & XHCI_MTK_HOST)
3121 trb_buff_len = 0; 2992 trb_buff_len = 0;
3122 2993
3123 maxp = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc)); 2994 maxp = usb_endpoint_maxp(&urb->ep->desc);
3124 total_packet_count = DIV_ROUND_UP(td_total_len, maxp); 2995 total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
3125 2996
3126 /* Queueing functions don't count the current TRB into transferred */ 2997 /* Queueing functions don't count the current TRB into transferred */
@@ -3136,7 +3007,7 @@ static int xhci_align_td(struct xhci_hcd *xhci, struct urb *urb, u32 enqd_len,
3136 unsigned int max_pkt; 3007 unsigned int max_pkt;
3137 u32 new_buff_len; 3008 u32 new_buff_len;
3138 3009
3139 max_pkt = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc)); 3010 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3140 unalign = (enqd_len + *trb_buff_len) % max_pkt; 3011 unalign = (enqd_len + *trb_buff_len) % max_pkt;
3141 3012
3142 /* we got lucky, last normal TRB data on segment is packet aligned */ 3013 /* we got lucky, last normal TRB data on segment is packet aligned */
@@ -3650,7 +3521,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3650 addr = start_addr + urb->iso_frame_desc[i].offset; 3521 addr = start_addr + urb->iso_frame_desc[i].offset;
3651 td_len = urb->iso_frame_desc[i].length; 3522 td_len = urb->iso_frame_desc[i].length;
3652 td_remain_len = td_len; 3523 td_remain_len = td_len;
3653 max_pkt = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc)); 3524 max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3654 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt); 3525 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt);
3655 3526
3656 /* A zero-length transfer still involves at least one packet. */ 3527 /* A zero-length transfer still involves at least one packet. */
@@ -3828,7 +3699,7 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3828 /* Check the ring to guarantee there is enough room for the whole urb. 3699 /* Check the ring to guarantee there is enough room for the whole urb.
3829 * Do not insert any td of the urb to the ring if the check failed. 3700 * Do not insert any td of the urb to the ring if the check failed.
3830 */ 3701 */
3831 ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK, 3702 ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
3832 num_trbs, mem_flags); 3703 num_trbs, mem_flags);
3833 if (ret) 3704 if (ret)
3834 return ret; 3705 return ret;
@@ -3841,8 +3712,7 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
3841 3712
3842 /* Calculate the start frame and put it in urb->start_frame. */ 3713 /* Calculate the start frame and put it in urb->start_frame. */
3843 if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) { 3714 if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
3844 if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == 3715 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_RUNNING) {
3845 EP_STATE_RUNNING) {
3846 urb->start_frame = xep->next_frame_id; 3716 urb->start_frame = xep->next_frame_id;
3847 goto skip_start_over; 3717 goto skip_start_over;
3848 } 3718 }
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 1a4ca02729c2..1cd56417cbec 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -113,12 +113,12 @@ int xhci_halt(struct xhci_hcd *xhci)
113 113
114 ret = xhci_handshake(&xhci->op_regs->status, 114 ret = xhci_handshake(&xhci->op_regs->status,
115 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC); 115 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
116 if (!ret) { 116 if (ret) {
117 xhci->xhc_state |= XHCI_STATE_HALTED; 117 xhci_warn(xhci, "Host halt failed, %d\n", ret);
118 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; 118 return ret;
119 } else 119 }
120 xhci_warn(xhci, "Host not halted after %u microseconds.\n", 120 xhci->xhc_state |= XHCI_STATE_HALTED;
121 XHCI_MAX_HALT_USEC); 121 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
122 return ret; 122 return ret;
123} 123}
124 124
@@ -167,6 +167,12 @@ int xhci_reset(struct xhci_hcd *xhci)
167 int ret, i; 167 int ret, i;
168 168
169 state = readl(&xhci->op_regs->status); 169 state = readl(&xhci->op_regs->status);
170
171 if (state == ~(u32)0) {
172 xhci_warn(xhci, "Host not accessible, reset failed.\n");
173 return -ENODEV;
174 }
175
170 if ((state & STS_HALT) == 0) { 176 if ((state & STS_HALT) == 0) {
171 xhci_warn(xhci, "Host controller not halted, aborting reset.\n"); 177 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
172 return 0; 178 return 0;
@@ -690,7 +696,6 @@ void xhci_stop(struct usb_hcd *hcd)
690 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; 696 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
691 xhci_halt(xhci); 697 xhci_halt(xhci);
692 xhci_reset(xhci); 698 xhci_reset(xhci);
693
694 spin_unlock_irq(&xhci->lock); 699 spin_unlock_irq(&xhci->lock);
695 } 700 }
696 701
@@ -1645,8 +1650,7 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1645 /* If the HC already knows the endpoint is disabled, 1650 /* If the HC already knows the endpoint is disabled,
1646 * or the HCD has noted it is disabled, ignore this request 1651 * or the HCD has noted it is disabled, ignore this request
1647 */ 1652 */
1648 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == 1653 if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
1649 cpu_to_le32(EP_STATE_DISABLED)) ||
1650 le32_to_cpu(ctrl_ctx->drop_flags) & 1654 le32_to_cpu(ctrl_ctx->drop_flags) &
1651 xhci_get_endpoint_flag(&ep->desc)) { 1655 xhci_get_endpoint_flag(&ep->desc)) {
1652 /* Do not warn when called after a usb_device_reset */ 1656 /* Do not warn when called after a usb_device_reset */
@@ -3209,7 +3213,7 @@ int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3209 3213
3210 for (i = 0; i < num_eps; i++) { 3214 for (i = 0; i < num_eps; i++) {
3211 ep_index = xhci_get_endpoint_index(&eps[i]->desc); 3215 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3212 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&eps[i]->desc)); 3216 max_packet = usb_endpoint_maxp(&eps[i]->desc);
3213 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, 3217 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3214 num_stream_ctxs, 3218 num_stream_ctxs,
3215 num_streams, 3219 num_streams,
@@ -3683,27 +3687,26 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3683 int ret, slot_id; 3687 int ret, slot_id;
3684 struct xhci_command *command; 3688 struct xhci_command *command;
3685 3689
3686 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL); 3690 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
3687 if (!command) 3691 if (!command)
3688 return 0; 3692 return 0;
3689 3693
3690 /* xhci->slot_id and xhci->addr_dev are not thread-safe */ 3694 /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3691 mutex_lock(&xhci->mutex); 3695 mutex_lock(&xhci->mutex);
3692 spin_lock_irqsave(&xhci->lock, flags); 3696 spin_lock_irqsave(&xhci->lock, flags);
3693 command->completion = &xhci->addr_dev;
3694 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0); 3697 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3695 if (ret) { 3698 if (ret) {
3696 spin_unlock_irqrestore(&xhci->lock, flags); 3699 spin_unlock_irqrestore(&xhci->lock, flags);
3697 mutex_unlock(&xhci->mutex); 3700 mutex_unlock(&xhci->mutex);
3698 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); 3701 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3699 kfree(command); 3702 xhci_free_command(xhci, command);
3700 return 0; 3703 return 0;
3701 } 3704 }
3702 xhci_ring_cmd_db(xhci); 3705 xhci_ring_cmd_db(xhci);
3703 spin_unlock_irqrestore(&xhci->lock, flags); 3706 spin_unlock_irqrestore(&xhci->lock, flags);
3704 3707
3705 wait_for_completion(command->completion); 3708 wait_for_completion(command->completion);
3706 slot_id = xhci->slot_id; 3709 slot_id = command->slot_id;
3707 mutex_unlock(&xhci->mutex); 3710 mutex_unlock(&xhci->mutex);
3708 3711
3709 if (!slot_id || command->status != COMP_SUCCESS) { 3712 if (!slot_id || command->status != COMP_SUCCESS) {
@@ -3711,7 +3714,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3711 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n", 3714 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3712 HCS_MAX_SLOTS( 3715 HCS_MAX_SLOTS(
3713 readl(&xhci->cap_regs->hcs_params1))); 3716 readl(&xhci->cap_regs->hcs_params1)));
3714 kfree(command); 3717 xhci_free_command(xhci, command);
3715 return 0; 3718 return 0;
3716 } 3719 }
3717 3720
@@ -3747,7 +3750,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3747#endif 3750#endif
3748 3751
3749 3752
3750 kfree(command); 3753 xhci_free_command(xhci, command);
3751 /* Is this a LS or FS device under a HS hub? */ 3754 /* Is this a LS or FS device under a HS hub? */
3752 /* Hub or peripherial? */ 3755 /* Hub or peripherial? */
3753 return 1; 3756 return 1;
@@ -3755,6 +3758,7 @@ int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3755disable_slot: 3758disable_slot:
3756 /* Disable slot, if we can do it without mem alloc */ 3759 /* Disable slot, if we can do it without mem alloc */
3757 spin_lock_irqsave(&xhci->lock, flags); 3760 spin_lock_irqsave(&xhci->lock, flags);
3761 kfree(command->completion);
3758 command->completion = NULL; 3762 command->completion = NULL;
3759 command->status = 0; 3763 command->status = 0;
3760 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT, 3764 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
@@ -3816,14 +3820,13 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3816 } 3820 }
3817 } 3821 }
3818 3822
3819 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL); 3823 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
3820 if (!command) { 3824 if (!command) {
3821 ret = -ENOMEM; 3825 ret = -ENOMEM;
3822 goto out; 3826 goto out;
3823 } 3827 }
3824 3828
3825 command->in_ctx = virt_dev->in_ctx; 3829 command->in_ctx = virt_dev->in_ctx;
3826 command->completion = &xhci->addr_dev;
3827 3830
3828 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); 3831 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3829 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); 3832 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
@@ -3941,7 +3944,10 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3941 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); 3944 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3942out: 3945out:
3943 mutex_unlock(&xhci->mutex); 3946 mutex_unlock(&xhci->mutex);
3944 kfree(command); 3947 if (command) {
3948 kfree(command->completion);
3949 kfree(command);
3950 }
3945 return ret; 3951 return ret;
3946} 3952}
3947 3953
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index f945380035d0..8ccc11a974b8 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -709,6 +709,8 @@ struct xhci_ep_ctx {
709#define EP_STATE_HALTED 2 709#define EP_STATE_HALTED 2
710#define EP_STATE_STOPPED 3 710#define EP_STATE_STOPPED 3
711#define EP_STATE_ERROR 4 711#define EP_STATE_ERROR 4
712#define GET_EP_CTX_STATE(ctx) (le32_to_cpu((ctx)->ep_info) & EP_STATE_MASK)
713
712/* Mult - Max number of burtst within an interval, in EP companion desc. */ 714/* Mult - Max number of burtst within an interval, in EP companion desc. */
713#define EP_MULT(p) (((p) & 0x3) << 8) 715#define EP_MULT(p) (((p) & 0x3) << 8)
714#define CTX_TO_EP_MULT(p) (((p) >> 8) & 0x3) 716#define CTX_TO_EP_MULT(p) (((p) >> 8) & 0x3)
@@ -747,11 +749,6 @@ struct xhci_ep_ctx {
747#define MAX_PACKET_MASK (0xffff << 16) 749#define MAX_PACKET_MASK (0xffff << 16)
748#define MAX_PACKET_DECODED(p) (((p) >> 16) & 0xffff) 750#define MAX_PACKET_DECODED(p) (((p) >> 16) & 0xffff)
749 751
750/* Get max packet size from ep desc. Bit 10..0 specify the max packet size.
751 * USB2.0 spec 9.6.6.
752 */
753#define GET_MAX_PACKET(p) ((p) & 0x7ff)
754
755/* tx_info bitmasks */ 752/* tx_info bitmasks */
756#define EP_AVG_TRB_LENGTH(p) ((p) & 0xffff) 753#define EP_AVG_TRB_LENGTH(p) ((p) & 0xffff)
757#define EP_MAX_ESIT_PAYLOAD_LO(p) (((p) & 0xffff) << 16) 754#define EP_MAX_ESIT_PAYLOAD_LO(p) (((p) & 0xffff) << 16)
@@ -789,6 +786,7 @@ struct xhci_command {
789 /* Input context for changing device state */ 786 /* Input context for changing device state */
790 struct xhci_container_ctx *in_ctx; 787 struct xhci_container_ctx *in_ctx;
791 u32 status; 788 u32 status;
789 int slot_id;
792 /* If completion is null, no one is waiting on this command 790 /* If completion is null, no one is waiting on this command
793 * and the structure can be freed after the command completes. 791 * and the structure can be freed after the command completes.
794 */ 792 */
@@ -997,7 +995,6 @@ struct xhci_virt_device {
997 int num_rings_cached; 995 int num_rings_cached;
998#define XHCI_MAX_RINGS_CACHED 31 996#define XHCI_MAX_RINGS_CACHED 31
999 struct xhci_virt_ep eps[31]; 997 struct xhci_virt_ep eps[31];
1000 struct completion cmd_completion;
1001 u8 fake_port; 998 u8 fake_port;
1002 u8 real_port; 999 u8 real_port;
1003 struct xhci_interval_bw_table *bw_table; 1000 struct xhci_interval_bw_table *bw_table;
@@ -1583,8 +1580,6 @@ struct xhci_hcd {
1583 /* slot enabling and address device helpers */ 1580 /* slot enabling and address device helpers */
1584 /* these are not thread safe so use mutex */ 1581 /* these are not thread safe so use mutex */
1585 struct mutex mutex; 1582 struct mutex mutex;
1586 struct completion addr_dev;
1587 int slot_id;
1588 /* For USB 3.0 LPM enable/disable. */ 1583 /* For USB 3.0 LPM enable/disable. */
1589 struct xhci_command *lpm_command; 1584 struct xhci_command *lpm_command;
1590 /* Internal mirror of the HW's dcbaa */ 1585 /* Internal mirror of the HW's dcbaa */
@@ -1618,8 +1613,6 @@ struct xhci_hcd {
1618#define XHCI_STATE_DYING (1 << 0) 1613#define XHCI_STATE_DYING (1 << 0)
1619#define XHCI_STATE_HALTED (1 << 1) 1614#define XHCI_STATE_HALTED (1 << 1)
1620#define XHCI_STATE_REMOVING (1 << 2) 1615#define XHCI_STATE_REMOVING (1 << 2)
1621 /* Statistics */
1622 int error_bitmask;
1623 unsigned int quirks; 1616 unsigned int quirks;
1624#define XHCI_LINK_TRB_QUIRK (1 << 0) 1617#define XHCI_LINK_TRB_QUIRK (1 << 0)
1625#define XHCI_RESET_EP_QUIRK (1 << 1) 1618#define XHCI_RESET_EP_QUIRK (1 << 1)
diff --git a/drivers/usb/isp1760/isp1760-if.c b/drivers/usb/isp1760/isp1760-if.c
index 9535b2872183..79205b31e4a9 100644
--- a/drivers/usb/isp1760/isp1760-if.c
+++ b/drivers/usb/isp1760/isp1760-if.c
@@ -197,7 +197,7 @@ static int isp1760_plat_probe(struct platform_device *pdev)
197 197
198 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 198 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
199 if (!irq_res) { 199 if (!irq_res) {
200 pr_warning("isp1760: IRQ resource not available\n"); 200 pr_warn("isp1760: IRQ resource not available\n");
201 return -ENODEV; 201 return -ENODEV;
202 } 202 }
203 irqflags = irq_res->flags & IRQF_TRIGGER_MASK; 203 irqflags = irq_res->flags & IRQF_TRIGGER_MASK;
diff --git a/drivers/usb/misc/chaoskey.c b/drivers/usb/misc/chaoskey.c
index 6ddd08a32777..aa350dc9eb25 100644
--- a/drivers/usb/misc/chaoskey.c
+++ b/drivers/usb/misc/chaoskey.c
@@ -215,19 +215,7 @@ static int chaoskey_probe(struct usb_interface *interface,
215 215
216 dev->hwrng.name = dev->name ? dev->name : chaoskey_driver.name; 216 dev->hwrng.name = dev->name ? dev->name : chaoskey_driver.name;
217 dev->hwrng.read = chaoskey_rng_read; 217 dev->hwrng.read = chaoskey_rng_read;
218 218 dev->hwrng.quality = 1024;
219 /* Set the 'quality' metric. Quality is measured in units of
220 * 1/1024's of a bit ("mills"). This should be set to 1024,
221 * but there is a bug in the hwrng core which masks it with
222 * 1023.
223 *
224 * The patch that has been merged to the crypto development
225 * tree for that bug limits the value to 1024 at most, so by
226 * setting this to 1024 + 1023, we get 1023 before the fix is
227 * merged and 1024 afterwards. We'll patch this driver once
228 * both bits of code are in the same tree.
229 */
230 dev->hwrng.quality = 1024 + 1023;
231 219
232 dev->hwrng_registered = (hwrng_register(&dev->hwrng) == 0); 220 dev->hwrng_registered = (hwrng_register(&dev->hwrng) == 0);
233 if (!dev->hwrng_registered) 221 if (!dev->hwrng_registered)
diff --git a/drivers/usb/misc/rio500.c b/drivers/usb/misc/rio500.c
index 13731d512624..fc329c98a6e8 100644
--- a/drivers/usb/misc/rio500.c
+++ b/drivers/usb/misc/rio500.c
@@ -421,7 +421,7 @@ read_rio(struct file *file, char __user *buffer, size_t count, loff_t * ppos)
421 } else if (result != -EREMOTEIO) { 421 } else if (result != -EREMOTEIO) {
422 mutex_unlock(&(rio->lock)); 422 mutex_unlock(&(rio->lock));
423 dev_err(&rio->rio_dev->dev, 423 dev_err(&rio->rio_dev->dev,
424 "Read Whoops - result:%u partial:%u this_read:%u\n", 424 "Read Whoops - result:%d partial:%u this_read:%u\n",
425 result, partial, this_read); 425 result, partial, this_read);
426 return -EIO; 426 return -EIO;
427 } else { 427 } else {
diff --git a/drivers/usb/misc/usbtest.c b/drivers/usb/misc/usbtest.c
index 5c8210dc6fd9..3525626bf086 100644
--- a/drivers/usb/misc/usbtest.c
+++ b/drivers/usb/misc/usbtest.c
@@ -1915,7 +1915,7 @@ static struct urb *iso_alloc_urb(
1915 if (bytes < 0 || !desc) 1915 if (bytes < 0 || !desc)
1916 return NULL; 1916 return NULL;
1917 maxp = 0x7ff & usb_endpoint_maxp(desc); 1917 maxp = 0x7ff & usb_endpoint_maxp(desc);
1918 maxp *= 1 + (0x3 & (usb_endpoint_maxp(desc) >> 11)); 1918 maxp *= usb_endpoint_maxp_mult(desc);
1919 packets = DIV_ROUND_UP(bytes, maxp); 1919 packets = DIV_ROUND_UP(bytes, maxp);
1920 1920
1921 urb = usb_alloc_urb(packets, GFP_KERNEL); 1921 urb = usb_alloc_urb(packets, GFP_KERNEL);
@@ -2001,8 +2001,8 @@ test_queue(struct usbtest_dev *dev, struct usbtest_param_32 *param,
2001 "iso period %d %sframes, wMaxPacket %d, transactions: %d\n", 2001 "iso period %d %sframes, wMaxPacket %d, transactions: %d\n",
2002 1 << (desc->bInterval - 1), 2002 1 << (desc->bInterval - 1),
2003 (udev->speed == USB_SPEED_HIGH) ? "micro" : "", 2003 (udev->speed == USB_SPEED_HIGH) ? "micro" : "",
2004 usb_endpoint_maxp(desc) & 0x7ff, 2004 usb_endpoint_maxp(desc),
2005 1 + (0x3 & (usb_endpoint_maxp(desc) >> 11))); 2005 usb_endpoint_maxp_mult(desc));
2006 2006
2007 dev_info(&dev->intf->dev, 2007 dev_info(&dev->intf->dev,
2008 "total %lu msec (%lu packets)\n", 2008 "total %lu msec (%lu packets)\n",
diff --git a/drivers/usb/mtu3/Kconfig b/drivers/usb/mtu3/Kconfig
new file mode 100644
index 000000000000..25cd61947bee
--- /dev/null
+++ b/drivers/usb/mtu3/Kconfig
@@ -0,0 +1,54 @@
1# For MTK USB3.0 IP
2
3config USB_MTU3
4 tristate "MediaTek USB3 Dual Role controller"
5 depends on EXTCON && (USB || USB_GADGET) && HAS_DMA
6 depends on ARCH_MEDIATEK || COMPILE_TEST
7 select USB_XHCI_MTK if USB_SUPPORT && USB_XHCI_HCD
8 help
9 Say Y or M here if your system runs on MediaTek SoCs with
10 Dual Role SuperSpeed USB controller. You can select usb
11 mode as peripheral role or host role, or both.
12
13 If you don't know what this is, please say N.
14
15 Choose M here to compile this driver as a module, and it
16 will be called mtu3.ko.
17
18
19if USB_MTU3
20choice
21 bool "MTU3 Mode Selection"
22 default USB_MTU3_DUAL_ROLE if (USB && USB_GADGET)
23 default USB_MTU3_HOST if (USB && !USB_GADGET)
24 default USB_MTU3_GADGET if (!USB && USB_GADGET)
25
26config USB_MTU3_HOST
27 bool "Host only mode"
28 depends on USB=y || USB=USB_MTU3
29 help
30 Select this when you want to use MTU3 in host mode only,
31 thereby the gadget feature will be regressed.
32
33config USB_MTU3_GADGET
34 bool "Gadget only mode"
35 depends on USB_GADGET=y || USB_GADGET=USB_MTU3
36 help
37 Select this when you want to use MTU3 in gadget mode only,
38 thereby the host feature will be regressed.
39
40config USB_MTU3_DUAL_ROLE
41 bool "Dual Role mode"
42 depends on ((USB=y || USB=USB_MTU3) && (USB_GADGET=y || USB_GADGET=USB_MTU3))
43 help
44 This is the default mode of working of MTU3 controller where
45 both host and gadget features are enabled.
46
47endchoice
48
49config USB_MTU3_DEBUG
50 bool "Enable Debugging Messages"
51 help
52 Say Y here to enable debugging messages in the MTU3 Driver.
53
54endif
diff --git a/drivers/usb/mtu3/Makefile b/drivers/usb/mtu3/Makefile
new file mode 100644
index 000000000000..60e0fff7a847
--- /dev/null
+++ b/drivers/usb/mtu3/Makefile
@@ -0,0 +1,18 @@
1
2ccflags-$(CONFIG_USB_MTU3_DEBUG) += -DDEBUG
3
4obj-$(CONFIG_USB_MTU3) += mtu3.o
5
6mtu3-y := mtu3_plat.o
7
8ifneq ($(filter y,$(CONFIG_USB_MTU3_HOST) $(CONFIG_USB_MTU3_DUAL_ROLE)),)
9 mtu3-y += mtu3_host.o
10endif
11
12ifneq ($(filter y,$(CONFIG_USB_MTU3_GADGET) $(CONFIG_USB_MTU3_DUAL_ROLE)),)
13 mtu3-y += mtu3_core.o mtu3_gadget_ep0.o mtu3_gadget.o mtu3_qmu.o
14endif
15
16ifneq ($(CONFIG_USB_MTU3_DUAL_ROLE),)
17 mtu3-y += mtu3_dr.o
18endif
diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h
new file mode 100644
index 000000000000..ba9df719f363
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3.h
@@ -0,0 +1,417 @@
1/*
2 * mtu3.h - MediaTek USB3 DRD header
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __MTU3_H__
20#define __MTU3_H__
21
22#include <linux/device.h>
23#include <linux/dmapool.h>
24#include <linux/extcon.h>
25#include <linux/interrupt.h>
26#include <linux/list.h>
27#include <linux/phy/phy.h>
28#include <linux/regulator/consumer.h>
29#include <linux/usb.h>
30#include <linux/usb/ch9.h>
31#include <linux/usb/gadget.h>
32#include <linux/usb/otg.h>
33
34struct mtu3;
35struct mtu3_ep;
36struct mtu3_request;
37
38#include "mtu3_hw_regs.h"
39#include "mtu3_qmu.h"
40
41#define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
42#define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
43#define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
44
45#define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
46#define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
47#define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
48
49#define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
50#define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
51#define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
52
53#define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
54#define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
55#define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10))
56
57#define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
58#define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))
59
60#define MTU3_DRIVER_NAME "mtu3"
61#define DMA_ADDR_INVALID (~(dma_addr_t)0)
62
63#define MTU3_EP_ENABLED BIT(0)
64#define MTU3_EP_STALL BIT(1)
65#define MTU3_EP_WEDGE BIT(2)
66#define MTU3_EP_BUSY BIT(3)
67
68#define MTU3_U3_IP_SLOT_DEFAULT 2
69#define MTU3_U2_IP_SLOT_DEFAULT 1
70
71/**
72 * Normally the device works on HS or SS, to simplify fifo management,
73 * devide fifo into some 512B parts, use bitmap to manage it; And
74 * 128 bits size of bitmap is large enough, that means it can manage
75 * up to 64KB fifo size.
76 * NOTE: MTU3_EP_FIFO_UNIT should be power of two
77 */
78#define MTU3_EP_FIFO_UNIT (1 << 9)
79#define MTU3_FIFO_BIT_SIZE 128
80#define MTU3_U2_IP_EP0_FIFO_SIZE 64
81
82/**
83 * Maximum size of ep0 response buffer for ch9 requests,
84 * the SET_SEL request uses 6 so far, and GET_STATUS is 2
85 */
86#define EP0_RESPONSE_BUF 6
87
88/* device operated link and speed got from DEVICE_CONF register */
89enum mtu3_speed {
90 MTU3_SPEED_INACTIVE = 0,
91 MTU3_SPEED_FULL = 1,
92 MTU3_SPEED_HIGH = 3,
93 MTU3_SPEED_SUPER = 4,
94};
95
96/**
97 * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
98 * without data stage.
99 * @MU3D_EP0_STATE_TX: IN data stage
100 * @MU3D_EP0_STATE_RX: OUT data stage
101 * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
102 * waits for its completion interrupt
103 * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
104 * after receives a SETUP.
105 */
106enum mtu3_g_ep0_state {
107 MU3D_EP0_STATE_SETUP = 1,
108 MU3D_EP0_STATE_TX,
109 MU3D_EP0_STATE_RX,
110 MU3D_EP0_STATE_TX_END,
111 MU3D_EP0_STATE_STALL,
112};
113
114/**
115 * @base: the base address of fifo
116 * @limit: the bitmap size in bits
117 * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
118 */
119struct mtu3_fifo_info {
120 u32 base;
121 u32 limit;
122 DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE);
123};
124
125/**
126 * General Purpose Descriptor (GPD):
127 * The format of TX GPD is a little different from RX one.
128 * And the size of GPD is 16 bytes.
129 *
130 * @flag:
131 * bit0: Hardware Own (HWO)
132 * bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
133 * bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
134 * bit7: Interrupt On Completion (IOC)
135 * @chksum: This is used to validate the contents of this GPD;
136 * If TXQ_CS_EN / RXQ_CS_EN bit is set, an interrupt is issued
137 * when checksum validation fails;
138 * Checksum value is calculated over the 16 bytes of the GPD by default;
139 * @data_buf_len (RX ONLY): This value indicates the length of
140 * the assigned data buffer
141 * @next_gpd: Physical address of the next GPD
142 * @buffer: Physical address of the data buffer
143 * @buf_len:
144 * (TX): This value indicates the length of the assigned data buffer
145 * (RX): The total length of data received
146 * @ext_len: reserved
147 * @ext_flag:
148 * bit5 (TX ONLY): Zero Length Packet (ZLP),
149 */
150struct qmu_gpd {
151 __u8 flag;
152 __u8 chksum;
153 __le16 data_buf_len;
154 __le32 next_gpd;
155 __le32 buffer;
156 __le16 buf_len;
157 __u8 ext_len;
158 __u8 ext_flag;
159} __packed;
160
161/**
162* dma: physical base address of GPD segment
163* start: virtual base address of GPD segment
164* end: the last GPD element
165* enqueue: the first empty GPD to use
166* dequeue: the first completed GPD serviced by ISR
167* NOTE: the size of GPD ring should be >= 2
168*/
169struct mtu3_gpd_ring {
170 dma_addr_t dma;
171 struct qmu_gpd *start;
172 struct qmu_gpd *end;
173 struct qmu_gpd *enqueue;
174 struct qmu_gpd *dequeue;
175};
176
177/**
178* @vbus: vbus 5V used by host mode
179* @edev: external connector used to detect vbus and iddig changes
180* @vbus_nb: notifier for vbus detection
181* @vbus_nb: notifier for iddig(idpin) detection
182* @extcon_reg_dwork: delay work for extcon notifier register, waiting for
183* xHCI driver initialization, it's necessary for system bootup
184* as device.
185* @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
186* @id_*: used to maually switch between host and device modes by idpin
187* @manual_drd_enabled: it's true when supports dual-role device by debugfs
188* to switch host/device modes depending on user input.
189*/
190struct otg_switch_mtk {
191 struct regulator *vbus;
192 struct extcon_dev *edev;
193 struct notifier_block vbus_nb;
194 struct notifier_block id_nb;
195 struct delayed_work extcon_reg_dwork;
196 bool is_u3_drd;
197 /* dual-role switch by debugfs */
198 struct pinctrl *id_pinctrl;
199 struct pinctrl_state *id_float;
200 struct pinctrl_state *id_ground;
201 bool manual_drd_enabled;
202};
203
204/**
205 * @mac_base: register base address of device MAC, exclude xHCI's
206 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
207 * @vusb33: usb3.3V shared by device/host IP
208 * @sys_clk: system clock of mtu3, shared by device/host IP
209 * @dr_mode: works in which mode:
210 * host only, device only or dual-role mode
211 * @u2_ports: number of usb2.0 host ports
212 * @u3_ports: number of usb3.0 host ports
213 * @dbgfs_root: only used when supports manual dual-role switch via debugfs
214 * @wakeup_en: it's true when supports remote wakeup in host mode
215 * @wk_deb_p0: port0's wakeup debounce clock
216 * @wk_deb_p1: it's optional, and depends on port1 is supported or not
217 */
218struct ssusb_mtk {
219 struct device *dev;
220 struct mtu3 *u3d;
221 void __iomem *mac_base;
222 void __iomem *ippc_base;
223 struct phy **phys;
224 int num_phys;
225 /* common power & clock */
226 struct regulator *vusb33;
227 struct clk *sys_clk;
228 /* otg */
229 struct otg_switch_mtk otg_switch;
230 enum usb_dr_mode dr_mode;
231 bool is_host;
232 int u2_ports;
233 int u3_ports;
234 struct dentry *dbgfs_root;
235 /* usb wakeup for host mode */
236 bool wakeup_en;
237 struct clk *wk_deb_p0;
238 struct clk *wk_deb_p1;
239 struct regmap *pericfg;
240};
241
242/**
243 * @fifo_size: it is (@slot + 1) * @fifo_seg_size
244 * @fifo_seg_size: it is roundup_pow_of_two(@maxp)
245 */
246struct mtu3_ep {
247 struct usb_ep ep;
248 char name[12];
249 struct mtu3 *mtu;
250 u8 epnum;
251 u8 type;
252 u8 is_in;
253 u16 maxp;
254 int slot;
255 u32 fifo_size;
256 u32 fifo_addr;
257 u32 fifo_seg_size;
258 struct mtu3_fifo_info *fifo;
259
260 struct list_head req_list;
261 struct mtu3_gpd_ring gpd_ring;
262 const struct usb_ss_ep_comp_descriptor *comp_desc;
263 const struct usb_endpoint_descriptor *desc;
264
265 int flags;
266 u8 wedged;
267 u8 busy;
268};
269
270struct mtu3_request {
271 struct usb_request request;
272 struct list_head list;
273 struct mtu3_ep *mep;
274 struct mtu3 *mtu;
275 struct qmu_gpd *gpd;
276 int epnum;
277};
278
279static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev)
280{
281 return dev_get_drvdata(dev);
282}
283
284/**
285 * struct mtu3 - device driver instance data.
286 * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
287 * MTU3_U3_IP_SLOT_DEFAULT for U3 IP
288 * @may_wakeup: means device's remote wakeup is enabled
289 * @is_self_powered: is reported in device status and the config descriptor
290 * @ep0_req: dummy request used while handling standard USB requests
291 * for GET_STATUS and SET_SEL
292 * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
293 */
294struct mtu3 {
295 spinlock_t lock;
296 struct ssusb_mtk *ssusb;
297 struct device *dev;
298 void __iomem *mac_base;
299 void __iomem *ippc_base;
300 int irq;
301
302 struct mtu3_fifo_info tx_fifo;
303 struct mtu3_fifo_info rx_fifo;
304
305 struct mtu3_ep *ep_array;
306 struct mtu3_ep *in_eps;
307 struct mtu3_ep *out_eps;
308 struct mtu3_ep *ep0;
309 int num_eps;
310 int slot;
311 int active_ep;
312
313 struct dma_pool *qmu_gpd_pool;
314 enum mtu3_g_ep0_state ep0_state;
315 struct usb_gadget g; /* the gadget */
316 struct usb_gadget_driver *gadget_driver;
317 struct mtu3_request ep0_req;
318 u8 setup_buf[EP0_RESPONSE_BUF];
319 u32 max_speed;
320
321 unsigned is_active:1;
322 unsigned may_wakeup:1;
323 unsigned is_self_powered:1;
324 unsigned test_mode:1;
325 unsigned softconnect:1;
326 unsigned u1_enable:1;
327 unsigned u2_enable:1;
328 unsigned is_u3_ip:1;
329
330 u8 address;
331 u8 test_mode_nr;
332 u32 hw_version;
333};
334
335static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g)
336{
337 return container_of(g, struct mtu3, g);
338}
339
340static inline int is_first_entry(const struct list_head *list,
341 const struct list_head *head)
342{
343 return list_is_last(head, list);
344}
345
346static inline struct mtu3_request *to_mtu3_request(struct usb_request *req)
347{
348 return req ? container_of(req, struct mtu3_request, request) : NULL;
349}
350
351static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep)
352{
353 return ep ? container_of(ep, struct mtu3_ep, ep) : NULL;
354}
355
356static inline struct mtu3_request *next_request(struct mtu3_ep *mep)
357{
358 struct list_head *queue = &mep->req_list;
359
360 if (list_empty(queue))
361 return NULL;
362
363 return list_first_entry(queue, struct mtu3_request, list);
364}
365
366static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data)
367{
368 writel(data, base + offset);
369}
370
371static inline u32 mtu3_readl(void __iomem *base, u32 offset)
372{
373 return readl(base + offset);
374}
375
376static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
377{
378 void __iomem *addr = base + offset;
379 u32 tmp = readl(addr);
380
381 writel((tmp | (bits)), addr);
382}
383
384static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
385{
386 void __iomem *addr = base + offset;
387 u32 tmp = readl(addr);
388
389 writel((tmp & ~(bits)), addr);
390}
391
392int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks);
393struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags);
394void mtu3_free_request(struct usb_ep *ep, struct usb_request *req);
395void mtu3_req_complete(struct mtu3_ep *mep,
396 struct usb_request *req, int status);
397
398int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
399 int interval, int burst, int mult);
400void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep);
401void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set);
402void mtu3_ep0_setup(struct mtu3 *mtu);
403void mtu3_start(struct mtu3 *mtu);
404void mtu3_stop(struct mtu3 *mtu);
405void mtu3_dev_on_off(struct mtu3 *mtu, int is_on);
406
407int mtu3_gadget_setup(struct mtu3 *mtu);
408void mtu3_gadget_cleanup(struct mtu3 *mtu);
409void mtu3_gadget_reset(struct mtu3 *mtu);
410void mtu3_gadget_suspend(struct mtu3 *mtu);
411void mtu3_gadget_resume(struct mtu3 *mtu);
412void mtu3_gadget_disconnect(struct mtu3 *mtu);
413
414irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu);
415extern const struct usb_ep_ops mtu3_ep0_ops;
416
417#endif
diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c
new file mode 100644
index 000000000000..99c65b0788ff
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_core.c
@@ -0,0 +1,863 @@
1/*
2 * mtu3_core.c - hardware access layer and gadget init/exit of
3 * MediaTek usb3 Dual-Role Controller Driver
4 *
5 * Copyright (C) 2016 MediaTek Inc.
6 *
7 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/of_address.h>
23#include <linux/of_irq.h>
24#include <linux/platform_device.h>
25
26#include "mtu3.h"
27
28static int ep_fifo_alloc(struct mtu3_ep *mep, u32 seg_size)
29{
30 struct mtu3_fifo_info *fifo = mep->fifo;
31 u32 num_bits = DIV_ROUND_UP(seg_size, MTU3_EP_FIFO_UNIT);
32 u32 start_bit;
33
34 /* ensure that @mep->fifo_seg_size is power of two */
35 num_bits = roundup_pow_of_two(num_bits);
36 if (num_bits > fifo->limit)
37 return -EINVAL;
38
39 mep->fifo_seg_size = num_bits * MTU3_EP_FIFO_UNIT;
40 num_bits = num_bits * (mep->slot + 1);
41 start_bit = bitmap_find_next_zero_area(fifo->bitmap,
42 fifo->limit, 0, num_bits, 0);
43 if (start_bit >= fifo->limit)
44 return -EOVERFLOW;
45
46 bitmap_set(fifo->bitmap, start_bit, num_bits);
47 mep->fifo_size = num_bits * MTU3_EP_FIFO_UNIT;
48 mep->fifo_addr = fifo->base + MTU3_EP_FIFO_UNIT * start_bit;
49
50 dev_dbg(mep->mtu->dev, "%s fifo:%#x/%#x, start_bit: %d\n",
51 __func__, mep->fifo_seg_size, mep->fifo_size, start_bit);
52
53 return mep->fifo_addr;
54}
55
56static void ep_fifo_free(struct mtu3_ep *mep)
57{
58 struct mtu3_fifo_info *fifo = mep->fifo;
59 u32 addr = mep->fifo_addr;
60 u32 bits = mep->fifo_size / MTU3_EP_FIFO_UNIT;
61 u32 start_bit;
62
63 if (unlikely(addr < fifo->base || bits > fifo->limit))
64 return;
65
66 start_bit = (addr - fifo->base) / MTU3_EP_FIFO_UNIT;
67 bitmap_clear(fifo->bitmap, start_bit, bits);
68 mep->fifo_size = 0;
69 mep->fifo_seg_size = 0;
70
71 dev_dbg(mep->mtu->dev, "%s size:%#x/%#x, start_bit: %d\n",
72 __func__, mep->fifo_seg_size, mep->fifo_size, start_bit);
73}
74
75/* enable/disable U3D SS function */
76static inline void mtu3_ss_func_set(struct mtu3 *mtu, bool enable)
77{
78 /* If usb3_en==0, LTSSM will go to SS.Disable state */
79 if (enable)
80 mtu3_setbits(mtu->mac_base, U3D_USB3_CONFIG, USB3_EN);
81 else
82 mtu3_clrbits(mtu->mac_base, U3D_USB3_CONFIG, USB3_EN);
83
84 dev_dbg(mtu->dev, "USB3_EN = %d\n", !!enable);
85}
86
87/* set/clear U3D HS device soft connect */
88static inline void mtu3_hs_softconn_set(struct mtu3 *mtu, bool enable)
89{
90 if (enable) {
91 mtu3_setbits(mtu->mac_base, U3D_POWER_MANAGEMENT,
92 SOFT_CONN | SUSPENDM_ENABLE);
93 } else {
94 mtu3_clrbits(mtu->mac_base, U3D_POWER_MANAGEMENT,
95 SOFT_CONN | SUSPENDM_ENABLE);
96 }
97 dev_dbg(mtu->dev, "SOFTCONN = %d\n", !!enable);
98}
99
100/* only port0 of U2/U3 supports device mode */
101static int mtu3_device_enable(struct mtu3 *mtu)
102{
103 void __iomem *ibase = mtu->ippc_base;
104 u32 check_clk = 0;
105
106 mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
107
108 if (mtu->is_u3_ip) {
109 check_clk = SSUSB_U3_MAC_RST_B_STS;
110 mtu3_clrbits(ibase, SSUSB_U3_CTRL(0),
111 (SSUSB_U3_PORT_DIS | SSUSB_U3_PORT_PDN |
112 SSUSB_U3_PORT_HOST_SEL));
113 }
114 mtu3_clrbits(ibase, SSUSB_U2_CTRL(0),
115 (SSUSB_U2_PORT_DIS | SSUSB_U2_PORT_PDN |
116 SSUSB_U2_PORT_HOST_SEL));
117 mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
118
119 return ssusb_check_clocks(mtu->ssusb, check_clk);
120}
121
122static void mtu3_device_disable(struct mtu3 *mtu)
123{
124 void __iomem *ibase = mtu->ippc_base;
125
126 if (mtu->is_u3_ip)
127 mtu3_setbits(ibase, SSUSB_U3_CTRL(0),
128 (SSUSB_U3_PORT_DIS | SSUSB_U3_PORT_PDN));
129
130 mtu3_setbits(ibase, SSUSB_U2_CTRL(0),
131 SSUSB_U2_PORT_DIS | SSUSB_U2_PORT_PDN);
132 mtu3_clrbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
133 mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
134}
135
136/* reset U3D's device module. */
137static void mtu3_device_reset(struct mtu3 *mtu)
138{
139 void __iomem *ibase = mtu->ippc_base;
140
141 mtu3_setbits(ibase, U3D_SSUSB_DEV_RST_CTRL, SSUSB_DEV_SW_RST);
142 udelay(1);
143 mtu3_clrbits(ibase, U3D_SSUSB_DEV_RST_CTRL, SSUSB_DEV_SW_RST);
144}
145
146/* disable all interrupts */
147static void mtu3_intr_disable(struct mtu3 *mtu)
148{
149 void __iomem *mbase = mtu->mac_base;
150
151 /* Disable level 1 interrupts */
152 mtu3_writel(mbase, U3D_LV1IECR, ~0x0);
153 /* Disable endpoint interrupts */
154 mtu3_writel(mbase, U3D_EPIECR, ~0x0);
155}
156
157static void mtu3_intr_status_clear(struct mtu3 *mtu)
158{
159 void __iomem *mbase = mtu->mac_base;
160
161 /* Clear EP0 and Tx/Rx EPn interrupts status */
162 mtu3_writel(mbase, U3D_EPISR, ~0x0);
163 /* Clear U2 USB common interrupts status */
164 mtu3_writel(mbase, U3D_COMMON_USB_INTR, ~0x0);
165 /* Clear U3 LTSSM interrupts status */
166 mtu3_writel(mbase, U3D_LTSSM_INTR, ~0x0);
167 /* Clear speed change interrupt status */
168 mtu3_writel(mbase, U3D_DEV_LINK_INTR, ~0x0);
169}
170
171/* enable system global interrupt */
172static void mtu3_intr_enable(struct mtu3 *mtu)
173{
174 void __iomem *mbase = mtu->mac_base;
175 u32 value;
176
177 /*Enable level 1 interrupts (BMU, QMU, MAC3, DMA, MAC2, EPCTL) */
178 value = BMU_INTR | QMU_INTR | MAC3_INTR | MAC2_INTR | EP_CTRL_INTR;
179 mtu3_writel(mbase, U3D_LV1IESR, value);
180
181 /* Enable U2 common USB interrupts */
182 value = SUSPEND_INTR | RESUME_INTR | RESET_INTR;
183 mtu3_writel(mbase, U3D_COMMON_USB_INTR_ENABLE, value);
184
185 if (mtu->is_u3_ip) {
186 /* Enable U3 LTSSM interrupts */
187 value = HOT_RST_INTR | WARM_RST_INTR | VBUS_RISE_INTR |
188 VBUS_FALL_INTR | ENTER_U3_INTR | EXIT_U3_INTR;
189 mtu3_writel(mbase, U3D_LTSSM_INTR_ENABLE, value);
190 }
191
192 /* Enable QMU interrupts. */
193 value = TXQ_CSERR_INT | TXQ_LENERR_INT | RXQ_CSERR_INT |
194 RXQ_LENERR_INT | RXQ_ZLPERR_INT;
195 mtu3_writel(mbase, U3D_QIESR1, value);
196
197 /* Enable speed change interrupt */
198 mtu3_writel(mbase, U3D_DEV_LINK_INTR_ENABLE, SSUSB_DEV_SPEED_CHG_INTR);
199}
200
201/* set/clear the stall and toggle bits for non-ep0 */
202void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set)
203{
204 struct mtu3 *mtu = mep->mtu;
205 void __iomem *mbase = mtu->mac_base;
206 u8 epnum = mep->epnum;
207 u32 csr;
208
209 if (mep->is_in) { /* TX */
210 csr = mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)) & TX_W1C_BITS;
211 if (set)
212 csr |= TX_SENDSTALL;
213 else
214 csr = (csr & (~TX_SENDSTALL)) | TX_SENTSTALL;
215 mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), csr);
216 } else { /* RX */
217 csr = mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)) & RX_W1C_BITS;
218 if (set)
219 csr |= RX_SENDSTALL;
220 else
221 csr = (csr & (~RX_SENDSTALL)) | RX_SENTSTALL;
222 mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), csr);
223 }
224
225 if (!set) {
226 mtu3_setbits(mbase, U3D_EP_RST, EP_RST(mep->is_in, epnum));
227 mtu3_clrbits(mbase, U3D_EP_RST, EP_RST(mep->is_in, epnum));
228 mep->flags &= ~MTU3_EP_STALL;
229 } else {
230 mep->flags |= MTU3_EP_STALL;
231 }
232
233 dev_dbg(mtu->dev, "%s: %s\n", mep->name,
234 set ? "SEND STALL" : "CLEAR STALL, with EP RESET");
235}
236
237void mtu3_dev_on_off(struct mtu3 *mtu, int is_on)
238{
239 if (mtu->is_u3_ip && (mtu->max_speed == USB_SPEED_SUPER))
240 mtu3_ss_func_set(mtu, is_on);
241 else
242 mtu3_hs_softconn_set(mtu, is_on);
243
244 dev_info(mtu->dev, "gadget (%s) pullup D%s\n",
245 usb_speed_string(mtu->max_speed), is_on ? "+" : "-");
246}
247
248void mtu3_start(struct mtu3 *mtu)
249{
250 void __iomem *mbase = mtu->mac_base;
251
252 dev_dbg(mtu->dev, "%s devctl 0x%x\n", __func__,
253 mtu3_readl(mbase, U3D_DEVICE_CONTROL));
254
255 mtu3_clrbits(mtu->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
256
257 /*
258 * When disable U2 port, USB2_CSR's register will be reset to
259 * default value after re-enable it again(HS is enabled by default).
260 * So if force mac to work as FS, disable HS function.
261 */
262 if (mtu->max_speed == USB_SPEED_FULL)
263 mtu3_clrbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
264
265 /* Initialize the default interrupts */
266 mtu3_intr_enable(mtu);
267 mtu->is_active = 1;
268
269 if (mtu->softconnect)
270 mtu3_dev_on_off(mtu, 1);
271}
272
273void mtu3_stop(struct mtu3 *mtu)
274{
275 dev_dbg(mtu->dev, "%s\n", __func__);
276
277 mtu3_intr_disable(mtu);
278 mtu3_intr_status_clear(mtu);
279
280 if (mtu->softconnect)
281 mtu3_dev_on_off(mtu, 0);
282
283 mtu->is_active = 0;
284 mtu3_setbits(mtu->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
285}
286
287/* for non-ep0 */
288int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
289 int interval, int burst, int mult)
290{
291 void __iomem *mbase = mtu->mac_base;
292 int epnum = mep->epnum;
293 u32 csr0, csr1, csr2;
294 int fifo_sgsz, fifo_addr;
295 int num_pkts;
296
297 fifo_addr = ep_fifo_alloc(mep, mep->maxp);
298 if (fifo_addr < 0) {
299 dev_err(mtu->dev, "alloc ep fifo failed(%d)\n", mep->maxp);
300 return -ENOMEM;
301 }
302 fifo_sgsz = ilog2(mep->fifo_seg_size);
303 dev_dbg(mtu->dev, "%s fifosz: %x(%x/%x)\n", __func__, fifo_sgsz,
304 mep->fifo_seg_size, mep->fifo_size);
305
306 if (mep->is_in) {
307 csr0 = TX_TXMAXPKTSZ(mep->maxp);
308 csr0 |= TX_DMAREQEN;
309
310 num_pkts = (burst + 1) * (mult + 1) - 1;
311 csr1 = TX_SS_BURST(burst) | TX_SLOT(mep->slot);
312 csr1 |= TX_MAX_PKT(num_pkts) | TX_MULT(mult);
313
314 csr2 = TX_FIFOADDR(fifo_addr >> 4);
315 csr2 |= TX_FIFOSEGSIZE(fifo_sgsz);
316
317 switch (mep->type) {
318 case USB_ENDPOINT_XFER_BULK:
319 csr1 |= TX_TYPE(TYPE_BULK);
320 break;
321 case USB_ENDPOINT_XFER_ISOC:
322 csr1 |= TX_TYPE(TYPE_ISO);
323 csr2 |= TX_BINTERVAL(interval);
324 break;
325 case USB_ENDPOINT_XFER_INT:
326 csr1 |= TX_TYPE(TYPE_INT);
327 csr2 |= TX_BINTERVAL(interval);
328 break;
329 }
330
331 /* Enable QMU Done interrupt */
332 mtu3_setbits(mbase, U3D_QIESR0, QMU_TX_DONE_INT(epnum));
333
334 mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), csr0);
335 mtu3_writel(mbase, MU3D_EP_TXCR1(epnum), csr1);
336 mtu3_writel(mbase, MU3D_EP_TXCR2(epnum), csr2);
337
338 dev_dbg(mtu->dev, "U3D_TX%d CSR0:%#x, CSR1:%#x, CSR2:%#x\n",
339 epnum, mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)),
340 mtu3_readl(mbase, MU3D_EP_TXCR1(epnum)),
341 mtu3_readl(mbase, MU3D_EP_TXCR2(epnum)));
342 } else {
343 csr0 = RX_RXMAXPKTSZ(mep->maxp);
344 csr0 |= RX_DMAREQEN;
345
346 num_pkts = (burst + 1) * (mult + 1) - 1;
347 csr1 = RX_SS_BURST(burst) | RX_SLOT(mep->slot);
348 csr1 |= RX_MAX_PKT(num_pkts) | RX_MULT(mult);
349
350 csr2 = RX_FIFOADDR(fifo_addr >> 4);
351 csr2 |= RX_FIFOSEGSIZE(fifo_sgsz);
352
353 switch (mep->type) {
354 case USB_ENDPOINT_XFER_BULK:
355 csr1 |= RX_TYPE(TYPE_BULK);
356 break;
357 case USB_ENDPOINT_XFER_ISOC:
358 csr1 |= RX_TYPE(TYPE_ISO);
359 csr2 |= RX_BINTERVAL(interval);
360 break;
361 case USB_ENDPOINT_XFER_INT:
362 csr1 |= RX_TYPE(TYPE_INT);
363 csr2 |= RX_BINTERVAL(interval);
364 break;
365 }
366
367 /*Enable QMU Done interrupt */
368 mtu3_setbits(mbase, U3D_QIESR0, QMU_RX_DONE_INT(epnum));
369
370 mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), csr0);
371 mtu3_writel(mbase, MU3D_EP_RXCR1(epnum), csr1);
372 mtu3_writel(mbase, MU3D_EP_RXCR2(epnum), csr2);
373
374 dev_dbg(mtu->dev, "U3D_RX%d CSR0:%#x, CSR1:%#x, CSR2:%#x\n",
375 epnum, mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)),
376 mtu3_readl(mbase, MU3D_EP_RXCR1(epnum)),
377 mtu3_readl(mbase, MU3D_EP_RXCR2(epnum)));
378 }
379
380 dev_dbg(mtu->dev, "csr0:%#x, csr1:%#x, csr2:%#x\n", csr0, csr1, csr2);
381 dev_dbg(mtu->dev, "%s: %s, fifo-addr:%#x, fifo-size:%#x(%#x/%#x)\n",
382 __func__, mep->name, mep->fifo_addr, mep->fifo_size,
383 fifo_sgsz, mep->fifo_seg_size);
384
385 return 0;
386}
387
388/* for non-ep0 */
389void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep)
390{
391 void __iomem *mbase = mtu->mac_base;
392 int epnum = mep->epnum;
393
394 if (mep->is_in) {
395 mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), 0);
396 mtu3_writel(mbase, MU3D_EP_TXCR1(epnum), 0);
397 mtu3_writel(mbase, MU3D_EP_TXCR2(epnum), 0);
398 mtu3_setbits(mbase, U3D_QIECR0, QMU_TX_DONE_INT(epnum));
399 } else {
400 mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), 0);
401 mtu3_writel(mbase, MU3D_EP_RXCR1(epnum), 0);
402 mtu3_writel(mbase, MU3D_EP_RXCR2(epnum), 0);
403 mtu3_setbits(mbase, U3D_QIECR0, QMU_RX_DONE_INT(epnum));
404 }
405
406 ep_fifo_free(mep);
407
408 dev_dbg(mtu->dev, "%s: %s\n", __func__, mep->name);
409}
410
411/*
412 * Two scenarios:
413 * 1. when device IP supports SS, the fifo of EP0, TX EPs, RX EPs
414 * are separated;
415 * 2. when supports only HS, the fifo is shared for all EPs, and
416 * the capability registers of @EPNTXFFSZ or @EPNRXFFSZ indicate
417 * the total fifo size of non-ep0, and ep0's is fixed to 64B,
418 * so the total fifo size is 64B + @EPNTXFFSZ;
419 * Due to the first 64B should be reserved for EP0, non-ep0's fifo
420 * starts from offset 64 and are divided into two equal parts for
421 * TX or RX EPs for simplification.
422 */
423static void get_ep_fifo_config(struct mtu3 *mtu)
424{
425 struct mtu3_fifo_info *tx_fifo;
426 struct mtu3_fifo_info *rx_fifo;
427 u32 fifosize;
428
429 if (mtu->is_u3_ip) {
430 fifosize = mtu3_readl(mtu->mac_base, U3D_CAP_EPNTXFFSZ);
431 tx_fifo = &mtu->tx_fifo;
432 tx_fifo->base = 0;
433 tx_fifo->limit = fifosize / MTU3_EP_FIFO_UNIT;
434 bitmap_zero(tx_fifo->bitmap, MTU3_FIFO_BIT_SIZE);
435
436 fifosize = mtu3_readl(mtu->mac_base, U3D_CAP_EPNRXFFSZ);
437 rx_fifo = &mtu->rx_fifo;
438 rx_fifo->base = 0;
439 rx_fifo->limit = fifosize / MTU3_EP_FIFO_UNIT;
440 bitmap_zero(rx_fifo->bitmap, MTU3_FIFO_BIT_SIZE);
441 mtu->slot = MTU3_U3_IP_SLOT_DEFAULT;
442 } else {
443 fifosize = mtu3_readl(mtu->mac_base, U3D_CAP_EPNTXFFSZ);
444 tx_fifo = &mtu->tx_fifo;
445 tx_fifo->base = MTU3_U2_IP_EP0_FIFO_SIZE;
446 tx_fifo->limit = (fifosize / MTU3_EP_FIFO_UNIT) >> 1;
447 bitmap_zero(tx_fifo->bitmap, MTU3_FIFO_BIT_SIZE);
448
449 rx_fifo = &mtu->rx_fifo;
450 rx_fifo->base =
451 tx_fifo->base + tx_fifo->limit * MTU3_EP_FIFO_UNIT;
452 rx_fifo->limit = tx_fifo->limit;
453 bitmap_zero(rx_fifo->bitmap, MTU3_FIFO_BIT_SIZE);
454 mtu->slot = MTU3_U2_IP_SLOT_DEFAULT;
455 }
456
457 dev_dbg(mtu->dev, "%s, TX: base-%d, limit-%d; RX: base-%d, limit-%d\n",
458 __func__, tx_fifo->base, tx_fifo->limit,
459 rx_fifo->base, rx_fifo->limit);
460}
461
462void mtu3_ep0_setup(struct mtu3 *mtu)
463{
464 u32 maxpacket = mtu->g.ep0->maxpacket;
465 u32 csr;
466
467 dev_dbg(mtu->dev, "%s maxpacket: %d\n", __func__, maxpacket);
468
469 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR);
470 csr &= ~EP0_MAXPKTSZ_MSK;
471 csr |= EP0_MAXPKTSZ(maxpacket);
472 csr &= EP0_W1C_BITS;
473 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
474
475 /* Enable EP0 interrupt */
476 mtu3_writel(mtu->mac_base, U3D_EPIESR, EP0ISR);
477}
478
479static int mtu3_mem_alloc(struct mtu3 *mtu)
480{
481 void __iomem *mbase = mtu->mac_base;
482 struct mtu3_ep *ep_array;
483 int in_ep_num, out_ep_num;
484 u32 cap_epinfo;
485 int ret;
486 int i;
487
488 cap_epinfo = mtu3_readl(mbase, U3D_CAP_EPINFO);
489 in_ep_num = CAP_TX_EP_NUM(cap_epinfo);
490 out_ep_num = CAP_RX_EP_NUM(cap_epinfo);
491
492 dev_info(mtu->dev, "fifosz/epnum: Tx=%#x/%d, Rx=%#x/%d\n",
493 mtu3_readl(mbase, U3D_CAP_EPNTXFFSZ), in_ep_num,
494 mtu3_readl(mbase, U3D_CAP_EPNRXFFSZ), out_ep_num);
495
496 /* one for ep0, another is reserved */
497 mtu->num_eps = min(in_ep_num, out_ep_num) + 1;
498 ep_array = kcalloc(mtu->num_eps * 2, sizeof(*ep_array), GFP_KERNEL);
499 if (ep_array == NULL)
500 return -ENOMEM;
501
502 mtu->ep_array = ep_array;
503 mtu->in_eps = ep_array;
504 mtu->out_eps = &ep_array[mtu->num_eps];
505 /* ep0 uses in_eps[0], out_eps[0] is reserved */
506 mtu->ep0 = mtu->in_eps;
507 mtu->ep0->mtu = mtu;
508 mtu->ep0->epnum = 0;
509
510 for (i = 1; i < mtu->num_eps; i++) {
511 struct mtu3_ep *mep = mtu->in_eps + i;
512
513 mep->fifo = &mtu->tx_fifo;
514 mep = mtu->out_eps + i;
515 mep->fifo = &mtu->rx_fifo;
516 }
517
518 get_ep_fifo_config(mtu);
519
520 ret = mtu3_qmu_init(mtu);
521 if (ret)
522 kfree(mtu->ep_array);
523
524 return ret;
525}
526
527static void mtu3_mem_free(struct mtu3 *mtu)
528{
529 mtu3_qmu_exit(mtu);
530 kfree(mtu->ep_array);
531}
532
533static void mtu3_set_speed(struct mtu3 *mtu)
534{
535 void __iomem *mbase = mtu->mac_base;
536
537 if (!mtu->is_u3_ip && (mtu->max_speed > USB_SPEED_HIGH))
538 mtu->max_speed = USB_SPEED_HIGH;
539
540 if (mtu->max_speed == USB_SPEED_FULL) {
541 /* disable U3 SS function */
542 mtu3_clrbits(mbase, U3D_USB3_CONFIG, USB3_EN);
543 /* disable HS function */
544 mtu3_clrbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
545 } else if (mtu->max_speed == USB_SPEED_HIGH) {
546 mtu3_clrbits(mbase, U3D_USB3_CONFIG, USB3_EN);
547 /* HS/FS detected by HW */
548 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE);
549 }
550
551 dev_info(mtu->dev, "max_speed: %s\n",
552 usb_speed_string(mtu->max_speed));
553}
554
555static void mtu3_regs_init(struct mtu3 *mtu)
556{
557
558 void __iomem *mbase = mtu->mac_base;
559
560 /* be sure interrupts are disabled before registration of ISR */
561 mtu3_intr_disable(mtu);
562 mtu3_intr_status_clear(mtu);
563
564 if (mtu->is_u3_ip) {
565 /* disable LGO_U1/U2 by default */
566 mtu3_clrbits(mbase, U3D_LINK_POWER_CONTROL,
567 SW_U1_ACCEPT_ENABLE | SW_U2_ACCEPT_ENABLE |
568 SW_U1_REQUEST_ENABLE | SW_U2_REQUEST_ENABLE);
569 /* device responses to u3_exit from host automatically */
570 mtu3_clrbits(mbase, U3D_LTSSM_CTRL, SOFT_U3_EXIT_EN);
571 /* automatically build U2 link when U3 detect fail */
572 mtu3_setbits(mbase, U3D_USB2_TEST_MODE, U2U3_AUTO_SWITCH);
573 }
574
575 mtu3_set_speed(mtu);
576
577 /* delay about 0.1us from detecting reset to send chirp-K */
578 mtu3_clrbits(mbase, U3D_LINK_RESET_INFO, WTCHRP_MSK);
579 /* U2/U3 detected by HW */
580 mtu3_writel(mbase, U3D_DEVICE_CONF, 0);
581 /* enable QMU 16B checksum */
582 mtu3_setbits(mbase, U3D_QCR0, QMU_CS16B_EN);
583 /* vbus detected by HW */
584 mtu3_clrbits(mbase, U3D_MISC_CTRL, VBUS_FRC_EN | VBUS_ON);
585}
586
587static irqreturn_t mtu3_link_isr(struct mtu3 *mtu)
588{
589 void __iomem *mbase = mtu->mac_base;
590 enum usb_device_speed udev_speed;
591 u32 maxpkt = 64;
592 u32 link;
593 u32 speed;
594
595 link = mtu3_readl(mbase, U3D_DEV_LINK_INTR);
596 link &= mtu3_readl(mbase, U3D_DEV_LINK_INTR_ENABLE);
597 mtu3_writel(mbase, U3D_DEV_LINK_INTR, link); /* W1C */
598 dev_dbg(mtu->dev, "=== LINK[%x] ===\n", link);
599
600 if (!(link & SSUSB_DEV_SPEED_CHG_INTR))
601 return IRQ_NONE;
602
603 speed = SSUSB_DEV_SPEED(mtu3_readl(mbase, U3D_DEVICE_CONF));
604
605 switch (speed) {
606 case MTU3_SPEED_FULL:
607 udev_speed = USB_SPEED_FULL;
608 /*BESLCK = 4 < BESLCK_U3 = 10 < BESLDCK = 15 */
609 mtu3_writel(mbase, U3D_USB20_LPM_PARAMETER, LPM_BESLDCK(0xf)
610 | LPM_BESLCK(4) | LPM_BESLCK_U3(0xa));
611 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT,
612 LPM_BESL_STALL | LPM_BESLD_STALL);
613 break;
614 case MTU3_SPEED_HIGH:
615 udev_speed = USB_SPEED_HIGH;
616 /*BESLCK = 4 < BESLCK_U3 = 10 < BESLDCK = 15 */
617 mtu3_writel(mbase, U3D_USB20_LPM_PARAMETER, LPM_BESLDCK(0xf)
618 | LPM_BESLCK(4) | LPM_BESLCK_U3(0xa));
619 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT,
620 LPM_BESL_STALL | LPM_BESLD_STALL);
621 break;
622 case MTU3_SPEED_SUPER:
623 udev_speed = USB_SPEED_SUPER;
624 maxpkt = 512;
625 break;
626 default:
627 udev_speed = USB_SPEED_UNKNOWN;
628 break;
629 }
630 dev_dbg(mtu->dev, "%s: %s\n", __func__, usb_speed_string(udev_speed));
631
632 mtu->g.speed = udev_speed;
633 mtu->g.ep0->maxpacket = maxpkt;
634 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
635
636 if (udev_speed == USB_SPEED_UNKNOWN)
637 mtu3_gadget_disconnect(mtu);
638 else
639 mtu3_ep0_setup(mtu);
640
641 return IRQ_HANDLED;
642}
643
644static irqreturn_t mtu3_u3_ltssm_isr(struct mtu3 *mtu)
645{
646 void __iomem *mbase = mtu->mac_base;
647 u32 ltssm;
648
649 ltssm = mtu3_readl(mbase, U3D_LTSSM_INTR);
650 ltssm &= mtu3_readl(mbase, U3D_LTSSM_INTR_ENABLE);
651 mtu3_writel(mbase, U3D_LTSSM_INTR, ltssm); /* W1C */
652 dev_dbg(mtu->dev, "=== LTSSM[%x] ===\n", ltssm);
653
654 if (ltssm & (HOT_RST_INTR | WARM_RST_INTR))
655 mtu3_gadget_reset(mtu);
656
657 if (ltssm & VBUS_FALL_INTR)
658 mtu3_ss_func_set(mtu, false);
659
660 if (ltssm & VBUS_RISE_INTR)
661 mtu3_ss_func_set(mtu, true);
662
663 if (ltssm & EXIT_U3_INTR)
664 mtu3_gadget_resume(mtu);
665
666 if (ltssm & ENTER_U3_INTR)
667 mtu3_gadget_suspend(mtu);
668
669 return IRQ_HANDLED;
670}
671
672static irqreturn_t mtu3_u2_common_isr(struct mtu3 *mtu)
673{
674 void __iomem *mbase = mtu->mac_base;
675 u32 u2comm;
676
677 u2comm = mtu3_readl(mbase, U3D_COMMON_USB_INTR);
678 u2comm &= mtu3_readl(mbase, U3D_COMMON_USB_INTR_ENABLE);
679 mtu3_writel(mbase, U3D_COMMON_USB_INTR, u2comm); /* W1C */
680 dev_dbg(mtu->dev, "=== U2COMM[%x] ===\n", u2comm);
681
682 if (u2comm & SUSPEND_INTR)
683 mtu3_gadget_suspend(mtu);
684
685 if (u2comm & RESUME_INTR)
686 mtu3_gadget_resume(mtu);
687
688 if (u2comm & RESET_INTR)
689 mtu3_gadget_reset(mtu);
690
691 return IRQ_HANDLED;
692}
693
694static irqreturn_t mtu3_irq(int irq, void *data)
695{
696 struct mtu3 *mtu = (struct mtu3 *)data;
697 unsigned long flags;
698 u32 level1;
699
700 spin_lock_irqsave(&mtu->lock, flags);
701
702 /* U3D_LV1ISR is RU */
703 level1 = mtu3_readl(mtu->mac_base, U3D_LV1ISR);
704 level1 &= mtu3_readl(mtu->mac_base, U3D_LV1IER);
705
706 if (level1 & EP_CTRL_INTR)
707 mtu3_link_isr(mtu);
708
709 if (level1 & MAC2_INTR)
710 mtu3_u2_common_isr(mtu);
711
712 if (level1 & MAC3_INTR)
713 mtu3_u3_ltssm_isr(mtu);
714
715 if (level1 & BMU_INTR)
716 mtu3_ep0_isr(mtu);
717
718 if (level1 & QMU_INTR)
719 mtu3_qmu_isr(mtu);
720
721 spin_unlock_irqrestore(&mtu->lock, flags);
722
723 return IRQ_HANDLED;
724}
725
726static int mtu3_hw_init(struct mtu3 *mtu)
727{
728 u32 cap_dev;
729 int ret;
730
731 mtu->hw_version = mtu3_readl(mtu->ippc_base, U3D_SSUSB_HW_ID);
732
733 cap_dev = mtu3_readl(mtu->ippc_base, U3D_SSUSB_IP_DEV_CAP);
734 mtu->is_u3_ip = !!SSUSB_IP_DEV_U3_PORT_NUM(cap_dev);
735
736 dev_info(mtu->dev, "IP version 0x%x(%s IP)\n", mtu->hw_version,
737 mtu->is_u3_ip ? "U3" : "U2");
738
739 mtu3_device_reset(mtu);
740
741 ret = mtu3_device_enable(mtu);
742 if (ret) {
743 dev_err(mtu->dev, "device enable failed %d\n", ret);
744 return ret;
745 }
746
747 ret = mtu3_mem_alloc(mtu);
748 if (ret)
749 return -ENOMEM;
750
751 mtu3_regs_init(mtu);
752
753 return 0;
754}
755
756static void mtu3_hw_exit(struct mtu3 *mtu)
757{
758 mtu3_device_disable(mtu);
759 mtu3_mem_free(mtu);
760}
761
762/*-------------------------------------------------------------------------*/
763
764int ssusb_gadget_init(struct ssusb_mtk *ssusb)
765{
766 struct device *dev = ssusb->dev;
767 struct platform_device *pdev = to_platform_device(dev);
768 struct mtu3 *mtu = NULL;
769 struct resource *res;
770 int ret = -ENOMEM;
771
772 mtu = devm_kzalloc(dev, sizeof(struct mtu3), GFP_KERNEL);
773 if (mtu == NULL)
774 return -ENOMEM;
775
776 mtu->irq = platform_get_irq(pdev, 0);
777 if (mtu->irq <= 0) {
778 dev_err(dev, "fail to get irq number\n");
779 return -ENODEV;
780 }
781 dev_info(dev, "irq %d\n", mtu->irq);
782
783 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac");
784 mtu->mac_base = devm_ioremap_resource(dev, res);
785 if (IS_ERR(mtu->mac_base)) {
786 dev_err(dev, "error mapping memory for dev mac\n");
787 return PTR_ERR(mtu->mac_base);
788 }
789
790 spin_lock_init(&mtu->lock);
791 mtu->dev = dev;
792 mtu->ippc_base = ssusb->ippc_base;
793 ssusb->mac_base = mtu->mac_base;
794 ssusb->u3d = mtu;
795 mtu->ssusb = ssusb;
796 mtu->max_speed = usb_get_maximum_speed(dev);
797
798 /* check the max_speed parameter */
799 switch (mtu->max_speed) {
800 case USB_SPEED_FULL:
801 case USB_SPEED_HIGH:
802 case USB_SPEED_SUPER:
803 break;
804 default:
805 dev_err(dev, "invalid max_speed: %s\n",
806 usb_speed_string(mtu->max_speed));
807 /* fall through */
808 case USB_SPEED_UNKNOWN:
809 /* default as SS */
810 mtu->max_speed = USB_SPEED_SUPER;
811 break;
812 }
813
814 dev_dbg(dev, "mac_base=0x%p, ippc_base=0x%p\n",
815 mtu->mac_base, mtu->ippc_base);
816
817 ret = mtu3_hw_init(mtu);
818 if (ret) {
819 dev_err(dev, "mtu3 hw init failed:%d\n", ret);
820 return ret;
821 }
822
823 ret = devm_request_irq(dev, mtu->irq, mtu3_irq, 0, dev_name(dev), mtu);
824 if (ret) {
825 dev_err(dev, "request irq %d failed!\n", mtu->irq);
826 goto irq_err;
827 }
828
829 device_init_wakeup(dev, true);
830
831 ret = mtu3_gadget_setup(mtu);
832 if (ret) {
833 dev_err(dev, "mtu3 gadget init failed:%d\n", ret);
834 goto gadget_err;
835 }
836
837 /* init as host mode, power down device IP for power saving */
838 if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG)
839 mtu3_stop(mtu);
840
841 dev_dbg(dev, " %s() done...\n", __func__);
842
843 return 0;
844
845gadget_err:
846 device_init_wakeup(dev, false);
847
848irq_err:
849 mtu3_hw_exit(mtu);
850 ssusb->u3d = NULL;
851 dev_err(dev, " %s() fail...\n", __func__);
852
853 return ret;
854}
855
856void ssusb_gadget_exit(struct ssusb_mtk *ssusb)
857{
858 struct mtu3 *mtu = ssusb->u3d;
859
860 mtu3_gadget_cleanup(mtu);
861 device_init_wakeup(ssusb->dev, false);
862 mtu3_hw_exit(mtu);
863}
diff --git a/drivers/usb/mtu3/mtu3_dr.c b/drivers/usb/mtu3/mtu3_dr.c
new file mode 100644
index 000000000000..1a8987e7c5b0
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_dr.c
@@ -0,0 +1,379 @@
1/*
2 * mtu3_dr.c - dual role switch and host glue layer
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/debugfs.h>
20#include <linux/irq.h>
21#include <linux/kernel.h>
22#include <linux/of_device.h>
23#include <linux/pinctrl/consumer.h>
24#include <linux/seq_file.h>
25#include <linux/uaccess.h>
26
27#include "mtu3.h"
28#include "mtu3_dr.h"
29
30#define USB2_PORT 2
31#define USB3_PORT 3
32
33enum mtu3_vbus_id_state {
34 MTU3_ID_FLOAT = 1,
35 MTU3_ID_GROUND,
36 MTU3_VBUS_OFF,
37 MTU3_VBUS_VALID,
38};
39
40static void toggle_opstate(struct ssusb_mtk *ssusb)
41{
42 if (!ssusb->otg_switch.is_u3_drd) {
43 mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION);
44 mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN);
45 }
46}
47
48/* only port0 supports dual-role mode */
49static int ssusb_port0_switch(struct ssusb_mtk *ssusb,
50 int version, bool tohost)
51{
52 void __iomem *ibase = ssusb->ippc_base;
53 u32 value;
54
55 dev_dbg(ssusb->dev, "%s (switch u%d port0 to %s)\n", __func__,
56 version, tohost ? "host" : "device");
57
58 if (version == USB2_PORT) {
59 /* 1. power off and disable u2 port0 */
60 value = mtu3_readl(ibase, SSUSB_U2_CTRL(0));
61 value |= SSUSB_U2_PORT_PDN | SSUSB_U2_PORT_DIS;
62 mtu3_writel(ibase, SSUSB_U2_CTRL(0), value);
63
64 /* 2. power on, enable u2 port0 and select its mode */
65 value = mtu3_readl(ibase, SSUSB_U2_CTRL(0));
66 value &= ~(SSUSB_U2_PORT_PDN | SSUSB_U2_PORT_DIS);
67 value = tohost ? (value | SSUSB_U2_PORT_HOST_SEL) :
68 (value & (~SSUSB_U2_PORT_HOST_SEL));
69 mtu3_writel(ibase, SSUSB_U2_CTRL(0), value);
70 } else {
71 /* 1. power off and disable u3 port0 */
72 value = mtu3_readl(ibase, SSUSB_U3_CTRL(0));
73 value |= SSUSB_U3_PORT_PDN | SSUSB_U3_PORT_DIS;
74 mtu3_writel(ibase, SSUSB_U3_CTRL(0), value);
75
76 /* 2. power on, enable u3 port0 and select its mode */
77 value = mtu3_readl(ibase, SSUSB_U3_CTRL(0));
78 value &= ~(SSUSB_U3_PORT_PDN | SSUSB_U3_PORT_DIS);
79 value = tohost ? (value | SSUSB_U3_PORT_HOST_SEL) :
80 (value & (~SSUSB_U3_PORT_HOST_SEL));
81 mtu3_writel(ibase, SSUSB_U3_CTRL(0), value);
82 }
83
84 return 0;
85}
86
87static void switch_port_to_host(struct ssusb_mtk *ssusb)
88{
89 u32 check_clk = 0;
90
91 dev_dbg(ssusb->dev, "%s\n", __func__);
92
93 ssusb_port0_switch(ssusb, USB2_PORT, true);
94
95 if (ssusb->otg_switch.is_u3_drd) {
96 ssusb_port0_switch(ssusb, USB3_PORT, true);
97 check_clk = SSUSB_U3_MAC_RST_B_STS;
98 }
99
100 ssusb_check_clocks(ssusb, check_clk);
101
102 /* after all clocks are stable */
103 toggle_opstate(ssusb);
104}
105
106static void switch_port_to_device(struct ssusb_mtk *ssusb)
107{
108 u32 check_clk = 0;
109
110 dev_dbg(ssusb->dev, "%s\n", __func__);
111
112 ssusb_port0_switch(ssusb, USB2_PORT, false);
113
114 if (ssusb->otg_switch.is_u3_drd) {
115 ssusb_port0_switch(ssusb, USB3_PORT, false);
116 check_clk = SSUSB_U3_MAC_RST_B_STS;
117 }
118
119 ssusb_check_clocks(ssusb, check_clk);
120}
121
122int ssusb_set_vbus(struct otg_switch_mtk *otg_sx, int is_on)
123{
124 struct ssusb_mtk *ssusb =
125 container_of(otg_sx, struct ssusb_mtk, otg_switch);
126 struct regulator *vbus = otg_sx->vbus;
127 int ret;
128
129 /* vbus is optional */
130 if (!vbus)
131 return 0;
132
133 dev_dbg(ssusb->dev, "%s: turn %s\n", __func__, is_on ? "on" : "off");
134
135 if (is_on) {
136 ret = regulator_enable(vbus);
137 if (ret) {
138 dev_err(ssusb->dev, "vbus regulator enable failed\n");
139 return ret;
140 }
141 } else {
142 regulator_disable(vbus);
143 }
144
145 return 0;
146}
147
148/*
149 * switch to host: -> MTU3_VBUS_OFF --> MTU3_ID_GROUND
150 * switch to device: -> MTU3_ID_FLOAT --> MTU3_VBUS_VALID
151 */
152static void ssusb_set_mailbox(struct otg_switch_mtk *otg_sx,
153 enum mtu3_vbus_id_state status)
154{
155 struct ssusb_mtk *ssusb =
156 container_of(otg_sx, struct ssusb_mtk, otg_switch);
157 struct mtu3 *mtu = ssusb->u3d;
158
159 dev_dbg(ssusb->dev, "mailbox state(%d)\n", status);
160
161 switch (status) {
162 case MTU3_ID_GROUND:
163 switch_port_to_host(ssusb);
164 ssusb_set_vbus(otg_sx, 1);
165 ssusb->is_host = true;
166 break;
167 case MTU3_ID_FLOAT:
168 ssusb->is_host = false;
169 ssusb_set_vbus(otg_sx, 0);
170 switch_port_to_device(ssusb);
171 break;
172 case MTU3_VBUS_OFF:
173 mtu3_stop(mtu);
174 pm_relax(ssusb->dev);
175 break;
176 case MTU3_VBUS_VALID:
177 /* avoid suspend when works as device */
178 pm_stay_awake(ssusb->dev);
179 mtu3_start(mtu);
180 break;
181 default:
182 dev_err(ssusb->dev, "invalid state\n");
183 }
184}
185
186static int ssusb_id_notifier(struct notifier_block *nb,
187 unsigned long event, void *ptr)
188{
189 struct otg_switch_mtk *otg_sx =
190 container_of(nb, struct otg_switch_mtk, id_nb);
191
192 if (event)
193 ssusb_set_mailbox(otg_sx, MTU3_ID_GROUND);
194 else
195 ssusb_set_mailbox(otg_sx, MTU3_ID_FLOAT);
196
197 return NOTIFY_DONE;
198}
199
200static int ssusb_vbus_notifier(struct notifier_block *nb,
201 unsigned long event, void *ptr)
202{
203 struct otg_switch_mtk *otg_sx =
204 container_of(nb, struct otg_switch_mtk, vbus_nb);
205
206 if (event)
207 ssusb_set_mailbox(otg_sx, MTU3_VBUS_VALID);
208 else
209 ssusb_set_mailbox(otg_sx, MTU3_VBUS_OFF);
210
211 return NOTIFY_DONE;
212}
213
214static int ssusb_extcon_register(struct otg_switch_mtk *otg_sx)
215{
216 struct ssusb_mtk *ssusb =
217 container_of(otg_sx, struct ssusb_mtk, otg_switch);
218 struct extcon_dev *edev = otg_sx->edev;
219 int ret;
220
221 /* extcon is optional */
222 if (!edev)
223 return 0;
224
225 otg_sx->vbus_nb.notifier_call = ssusb_vbus_notifier;
226 ret = extcon_register_notifier(edev, EXTCON_USB,
227 &otg_sx->vbus_nb);
228 if (ret < 0)
229 dev_err(ssusb->dev, "failed to register notifier for USB\n");
230
231 otg_sx->id_nb.notifier_call = ssusb_id_notifier;
232 ret = extcon_register_notifier(edev, EXTCON_USB_HOST,
233 &otg_sx->id_nb);
234 if (ret < 0)
235 dev_err(ssusb->dev, "failed to register notifier for USB-HOST\n");
236
237 dev_dbg(ssusb->dev, "EXTCON_USB: %d, EXTCON_USB_HOST: %d\n",
238 extcon_get_cable_state_(edev, EXTCON_USB),
239 extcon_get_cable_state_(edev, EXTCON_USB_HOST));
240
241 /* default as host, switch to device mode if needed */
242 if (extcon_get_cable_state_(edev, EXTCON_USB_HOST) == false)
243 ssusb_set_mailbox(otg_sx, MTU3_ID_FLOAT);
244 if (extcon_get_cable_state_(edev, EXTCON_USB) == true)
245 ssusb_set_mailbox(otg_sx, MTU3_VBUS_VALID);
246
247 return 0;
248}
249
250static void extcon_register_dwork(struct work_struct *work)
251{
252 struct delayed_work *dwork = to_delayed_work(work);
253 struct otg_switch_mtk *otg_sx =
254 container_of(dwork, struct otg_switch_mtk, extcon_reg_dwork);
255
256 ssusb_extcon_register(otg_sx);
257}
258
259/*
260 * We provide an interface via debugfs to switch between host and device modes
261 * depending on user input.
262 * This is useful in special cases, such as uses TYPE-A receptacle but also
263 * wants to support dual-role mode.
264 * It generates cable state changes by pulling up/down IDPIN and
265 * notifies driver to switch mode by "extcon-usb-gpio".
266 * NOTE: when use MICRO receptacle, should not enable this interface.
267 */
268static void ssusb_mode_manual_switch(struct ssusb_mtk *ssusb, int to_host)
269{
270 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
271
272 if (to_host)
273 pinctrl_select_state(otg_sx->id_pinctrl, otg_sx->id_ground);
274 else
275 pinctrl_select_state(otg_sx->id_pinctrl, otg_sx->id_float);
276}
277
278
279static int ssusb_mode_show(struct seq_file *sf, void *unused)
280{
281 struct ssusb_mtk *ssusb = sf->private;
282
283 seq_printf(sf, "current mode: %s(%s drd)\n(echo device/host)\n",
284 ssusb->is_host ? "host" : "device",
285 ssusb->otg_switch.manual_drd_enabled ? "manual" : "auto");
286
287 return 0;
288}
289
290static int ssusb_mode_open(struct inode *inode, struct file *file)
291{
292 return single_open(file, ssusb_mode_show, inode->i_private);
293}
294
295static ssize_t ssusb_mode_write(struct file *file,
296 const char __user *ubuf, size_t count, loff_t *ppos)
297{
298 struct seq_file *sf = file->private_data;
299 struct ssusb_mtk *ssusb = sf->private;
300 char buf[16];
301
302 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
303 return -EFAULT;
304
305 if (!strncmp(buf, "host", 4) && !ssusb->is_host) {
306 ssusb_mode_manual_switch(ssusb, 1);
307 } else if (!strncmp(buf, "device", 6) && ssusb->is_host) {
308 ssusb_mode_manual_switch(ssusb, 0);
309 } else {
310 dev_err(ssusb->dev, "wrong or duplicated setting\n");
311 return -EINVAL;
312 }
313
314 return count;
315}
316
317static const struct file_operations ssusb_mode_fops = {
318 .open = ssusb_mode_open,
319 .write = ssusb_mode_write,
320 .read = seq_read,
321 .llseek = seq_lseek,
322 .release = single_release,
323};
324
325static void ssusb_debugfs_init(struct ssusb_mtk *ssusb)
326{
327 struct dentry *root;
328 struct dentry *file;
329
330 root = debugfs_create_dir(dev_name(ssusb->dev), usb_debug_root);
331 if (IS_ERR_OR_NULL(root)) {
332 if (!root)
333 dev_err(ssusb->dev, "create debugfs root failed\n");
334 return;
335 }
336 ssusb->dbgfs_root = root;
337
338 file = debugfs_create_file("mode", S_IRUGO | S_IWUSR, root,
339 ssusb, &ssusb_mode_fops);
340 if (!file)
341 dev_dbg(ssusb->dev, "create debugfs mode failed\n");
342}
343
344static void ssusb_debugfs_exit(struct ssusb_mtk *ssusb)
345{
346 debugfs_remove_recursive(ssusb->dbgfs_root);
347}
348
349int ssusb_otg_switch_init(struct ssusb_mtk *ssusb)
350{
351 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
352
353 INIT_DELAYED_WORK(&otg_sx->extcon_reg_dwork, extcon_register_dwork);
354
355 if (otg_sx->manual_drd_enabled)
356 ssusb_debugfs_init(ssusb);
357
358 /* It is enough to delay 1s for waiting for host initialization */
359 schedule_delayed_work(&otg_sx->extcon_reg_dwork, HZ);
360
361 return 0;
362}
363
364void ssusb_otg_switch_exit(struct ssusb_mtk *ssusb)
365{
366 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
367
368 cancel_delayed_work(&otg_sx->extcon_reg_dwork);
369
370 if (otg_sx->edev) {
371 extcon_unregister_notifier(otg_sx->edev,
372 EXTCON_USB, &otg_sx->vbus_nb);
373 extcon_unregister_notifier(otg_sx->edev,
374 EXTCON_USB_HOST, &otg_sx->id_nb);
375 }
376
377 if (otg_sx->manual_drd_enabled)
378 ssusb_debugfs_exit(ssusb);
379}
diff --git a/drivers/usb/mtu3/mtu3_dr.h b/drivers/usb/mtu3/mtu3_dr.h
new file mode 100644
index 000000000000..9b228b5811b0
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_dr.h
@@ -0,0 +1,108 @@
1/*
2 * mtu3_dr.h - dual role switch and host glue layer header
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef _MTU3_DR_H_
20#define _MTU3_DR_H_
21
22#if IS_ENABLED(CONFIG_USB_MTU3_HOST) || IS_ENABLED(CONFIG_USB_MTU3_DUAL_ROLE)
23
24int ssusb_host_init(struct ssusb_mtk *ssusb, struct device_node *parent_dn);
25void ssusb_host_exit(struct ssusb_mtk *ssusb);
26int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb,
27 struct device_node *dn);
28int ssusb_host_enable(struct ssusb_mtk *ssusb);
29int ssusb_host_disable(struct ssusb_mtk *ssusb, bool suspend);
30int ssusb_wakeup_enable(struct ssusb_mtk *ssusb);
31void ssusb_wakeup_disable(struct ssusb_mtk *ssusb);
32
33#else
34
35static inline int ssusb_host_init(struct ssusb_mtk *ssusb,
36
37 struct device_node *parent_dn)
38{
39 return 0;
40}
41
42static inline void ssusb_host_exit(struct ssusb_mtk *ssusb)
43{}
44
45static inline int ssusb_wakeup_of_property_parse(
46 struct ssusb_mtk *ssusb, struct device_node *dn)
47{
48 return 0;
49}
50
51static inline int ssusb_host_enable(struct ssusb_mtk *ssusb)
52{
53 return 0;
54}
55
56static inline int ssusb_host_disable(struct ssusb_mtk *ssusb, bool suspend)
57{
58 return 0;
59}
60
61static inline int ssusb_wakeup_enable(struct ssusb_mtk *ssusb)
62{
63 return 0;
64}
65
66static inline void ssusb_wakeup_disable(struct ssusb_mtk *ssusb)
67{}
68
69#endif
70
71
72#if IS_ENABLED(CONFIG_USB_MTU3_GADGET) || IS_ENABLED(CONFIG_USB_MTU3_DUAL_ROLE)
73int ssusb_gadget_init(struct ssusb_mtk *ssusb);
74void ssusb_gadget_exit(struct ssusb_mtk *ssusb);
75#else
76static inline int ssusb_gadget_init(struct ssusb_mtk *ssusb)
77{
78 return 0;
79}
80
81static inline void ssusb_gadget_exit(struct ssusb_mtk *ssusb)
82{}
83#endif
84
85
86#if IS_ENABLED(CONFIG_USB_MTU3_DUAL_ROLE)
87int ssusb_otg_switch_init(struct ssusb_mtk *ssusb);
88void ssusb_otg_switch_exit(struct ssusb_mtk *ssusb);
89int ssusb_set_vbus(struct otg_switch_mtk *otg_sx, int is_on);
90
91#else
92
93static inline int ssusb_otg_switch_init(struct ssusb_mtk *ssusb)
94{
95 return 0;
96}
97
98static inline void ssusb_otg_switch_exit(struct ssusb_mtk *ssusb)
99{}
100
101static inline int ssusb_set_vbus(struct otg_switch_mtk *otg_sx, int is_on)
102{
103 return 0;
104}
105
106#endif
107
108#endif /* _MTU3_DR_H_ */
diff --git a/drivers/usb/mtu3/mtu3_gadget.c b/drivers/usb/mtu3/mtu3_gadget.c
new file mode 100644
index 000000000000..9dd2441b4fa1
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_gadget.c
@@ -0,0 +1,730 @@
1/*
2 * mtu3_gadget.c - MediaTek usb3 DRD peripheral support
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include "mtu3.h"
20
21void mtu3_req_complete(struct mtu3_ep *mep,
22 struct usb_request *req, int status)
23__releases(mep->mtu->lock)
24__acquires(mep->mtu->lock)
25{
26 struct mtu3_request *mreq;
27 struct mtu3 *mtu;
28 int busy = mep->busy;
29
30 mreq = to_mtu3_request(req);
31 list_del(&mreq->list);
32 if (mreq->request.status == -EINPROGRESS)
33 mreq->request.status = status;
34
35 mtu = mreq->mtu;
36 mep->busy = 1;
37 spin_unlock(&mtu->lock);
38
39 /* ep0 makes use of PIO, needn't unmap it */
40 if (mep->epnum)
41 usb_gadget_unmap_request(&mtu->g, req, mep->is_in);
42
43 dev_dbg(mtu->dev, "%s complete req: %p, sts %d, %d/%d\n", mep->name,
44 req, req->status, mreq->request.actual, mreq->request.length);
45
46 usb_gadget_giveback_request(&mep->ep, &mreq->request);
47
48 spin_lock(&mtu->lock);
49 mep->busy = busy;
50}
51
52static void nuke(struct mtu3_ep *mep, const int status)
53{
54 struct mtu3_request *mreq = NULL;
55
56 mep->busy = 1;
57 if (list_empty(&mep->req_list))
58 return;
59
60 dev_dbg(mep->mtu->dev, "abort %s's req: sts %d\n", mep->name, status);
61
62 /* exclude EP0 */
63 if (mep->epnum)
64 mtu3_qmu_flush(mep);
65
66 while (!list_empty(&mep->req_list)) {
67 mreq = list_first_entry(&mep->req_list,
68 struct mtu3_request, list);
69 mtu3_req_complete(mep, &mreq->request, status);
70 }
71}
72
73static int mtu3_ep_enable(struct mtu3_ep *mep)
74{
75 const struct usb_endpoint_descriptor *desc;
76 const struct usb_ss_ep_comp_descriptor *comp_desc;
77 struct mtu3 *mtu = mep->mtu;
78 u32 interval = 0;
79 u32 mult = 0;
80 u32 burst = 0;
81 int max_packet;
82 int ret;
83
84 desc = mep->desc;
85 comp_desc = mep->comp_desc;
86 mep->type = usb_endpoint_type(desc);
87 max_packet = usb_endpoint_maxp(desc);
88 mep->maxp = max_packet & GENMASK(10, 0);
89
90 switch (mtu->g.speed) {
91 case USB_SPEED_SUPER:
92 if (usb_endpoint_xfer_int(desc) ||
93 usb_endpoint_xfer_isoc(desc)) {
94 interval = desc->bInterval;
95 interval = clamp_val(interval, 1, 16) - 1;
96 if (usb_endpoint_xfer_isoc(desc) && comp_desc)
97 mult = comp_desc->bmAttributes;
98 }
99 if (comp_desc)
100 burst = comp_desc->bMaxBurst;
101
102 break;
103 case USB_SPEED_HIGH:
104 if (usb_endpoint_xfer_isoc(desc) ||
105 usb_endpoint_xfer_int(desc)) {
106 interval = desc->bInterval;
107 interval = clamp_val(interval, 1, 16) - 1;
108 burst = (max_packet & GENMASK(12, 11)) >> 11;
109 }
110 break;
111 default:
112 break; /*others are ignored */
113 }
114
115 dev_dbg(mtu->dev, "%s maxp:%d, interval:%d, burst:%d, mult:%d\n",
116 __func__, mep->maxp, interval, burst, mult);
117
118 mep->ep.maxpacket = mep->maxp;
119 mep->ep.desc = desc;
120 mep->ep.comp_desc = comp_desc;
121
122 /* slot mainly affects bulk/isoc transfer, so ignore int */
123 mep->slot = usb_endpoint_xfer_int(desc) ? 0 : mtu->slot;
124
125 ret = mtu3_config_ep(mtu, mep, interval, burst, mult);
126 if (ret < 0)
127 return ret;
128
129 ret = mtu3_gpd_ring_alloc(mep);
130 if (ret < 0) {
131 mtu3_deconfig_ep(mtu, mep);
132 return ret;
133 }
134
135 mtu3_qmu_start(mep);
136
137 return 0;
138}
139
140static int mtu3_ep_disable(struct mtu3_ep *mep)
141{
142 struct mtu3 *mtu = mep->mtu;
143
144 mtu3_qmu_stop(mep);
145
146 /* abort all pending requests */
147 nuke(mep, -ESHUTDOWN);
148 mtu3_deconfig_ep(mtu, mep);
149 mtu3_gpd_ring_free(mep);
150
151 mep->desc = NULL;
152 mep->ep.desc = NULL;
153 mep->comp_desc = NULL;
154 mep->type = 0;
155 mep->flags = 0;
156
157 return 0;
158}
159
160static int mtu3_gadget_ep_enable(struct usb_ep *ep,
161 const struct usb_endpoint_descriptor *desc)
162{
163 struct mtu3_ep *mep;
164 struct mtu3 *mtu;
165 unsigned long flags;
166 int ret = -EINVAL;
167
168 if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
169 pr_debug("%s invalid parameters\n", __func__);
170 return -EINVAL;
171 }
172
173 if (!desc->wMaxPacketSize) {
174 pr_debug("%s missing wMaxPacketSize\n", __func__);
175 return -EINVAL;
176 }
177 mep = to_mtu3_ep(ep);
178 mtu = mep->mtu;
179
180 /* check ep number and direction against endpoint */
181 if (usb_endpoint_num(desc) != mep->epnum)
182 return -EINVAL;
183
184 if (!!usb_endpoint_dir_in(desc) ^ !!mep->is_in)
185 return -EINVAL;
186
187 dev_dbg(mtu->dev, "%s %s\n", __func__, ep->name);
188
189 if (mep->flags & MTU3_EP_ENABLED) {
190 dev_WARN_ONCE(mtu->dev, true, "%s is already enabled\n",
191 mep->name);
192 return 0;
193 }
194
195 spin_lock_irqsave(&mtu->lock, flags);
196 mep->desc = desc;
197 mep->comp_desc = ep->comp_desc;
198
199 ret = mtu3_ep_enable(mep);
200 if (ret)
201 goto error;
202
203 mep->busy = 0;
204 mep->wedged = 0;
205 mep->flags |= MTU3_EP_ENABLED;
206 mtu->active_ep++;
207
208error:
209 spin_unlock_irqrestore(&mtu->lock, flags);
210
211 dev_dbg(mtu->dev, "%s active_ep=%d\n", __func__, mtu->active_ep);
212
213 return ret;
214}
215
216static int mtu3_gadget_ep_disable(struct usb_ep *ep)
217{
218 struct mtu3_ep *mep = to_mtu3_ep(ep);
219 struct mtu3 *mtu = mep->mtu;
220 unsigned long flags;
221
222 dev_dbg(mtu->dev, "%s %s\n", __func__, mep->name);
223
224 if (!(mep->flags & MTU3_EP_ENABLED)) {
225 dev_warn(mtu->dev, "%s is already disabled\n", mep->name);
226 return 0;
227 }
228
229 spin_lock_irqsave(&mtu->lock, flags);
230 mtu3_ep_disable(mep);
231 mep->flags &= ~MTU3_EP_ENABLED;
232 mtu->active_ep--;
233 spin_unlock_irqrestore(&(mtu->lock), flags);
234
235 dev_dbg(mtu->dev, "%s active_ep=%d, mtu3 is_active=%d\n",
236 __func__, mtu->active_ep, mtu->is_active);
237
238 return 0;
239}
240
241struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
242{
243 struct mtu3_ep *mep = to_mtu3_ep(ep);
244 struct mtu3_request *mreq;
245
246 mreq = kzalloc(sizeof(*mreq), gfp_flags);
247 if (!mreq)
248 return NULL;
249
250 mreq->request.dma = DMA_ADDR_INVALID;
251 mreq->epnum = mep->epnum;
252 mreq->mep = mep;
253
254 return &mreq->request;
255}
256
257void mtu3_free_request(struct usb_ep *ep, struct usb_request *req)
258{
259 kfree(to_mtu3_request(req));
260}
261
262static int mtu3_gadget_queue(struct usb_ep *ep,
263 struct usb_request *req, gfp_t gfp_flags)
264{
265 struct mtu3_ep *mep;
266 struct mtu3_request *mreq;
267 struct mtu3 *mtu;
268 unsigned long flags;
269 int ret = 0;
270
271 if (!ep || !req)
272 return -EINVAL;
273
274 if (!req->buf)
275 return -ENODATA;
276
277 mep = to_mtu3_ep(ep);
278 mtu = mep->mtu;
279 mreq = to_mtu3_request(req);
280 mreq->mtu = mtu;
281
282 if (mreq->mep != mep)
283 return -EINVAL;
284
285 dev_dbg(mtu->dev, "%s %s EP%d(%s), req=%p, maxp=%d, len#%d\n",
286 __func__, mep->is_in ? "TX" : "RX", mreq->epnum, ep->name,
287 mreq, ep->maxpacket, mreq->request.length);
288
289 if (req->length > GPD_BUF_SIZE) {
290 dev_warn(mtu->dev,
291 "req length > supported MAX:%d requested:%d\n",
292 GPD_BUF_SIZE, req->length);
293 return -EOPNOTSUPP;
294 }
295
296 /* don't queue if the ep is down */
297 if (!mep->desc) {
298 dev_dbg(mtu->dev, "req=%p queued to %s while it's disabled\n",
299 req, ep->name);
300 return -ESHUTDOWN;
301 }
302
303 mreq->request.actual = 0;
304 mreq->request.status = -EINPROGRESS;
305
306 ret = usb_gadget_map_request(&mtu->g, req, mep->is_in);
307 if (ret) {
308 dev_err(mtu->dev, "dma mapping failed\n");
309 return ret;
310 }
311
312 spin_lock_irqsave(&mtu->lock, flags);
313
314 if (mtu3_prepare_transfer(mep)) {
315 ret = -EAGAIN;
316 goto error;
317 }
318
319 list_add_tail(&mreq->list, &mep->req_list);
320 mtu3_insert_gpd(mep, mreq);
321 mtu3_qmu_resume(mep);
322
323error:
324 spin_unlock_irqrestore(&mtu->lock, flags);
325
326 return ret;
327}
328
329static int mtu3_gadget_dequeue(struct usb_ep *ep, struct usb_request *req)
330{
331 struct mtu3_ep *mep = to_mtu3_ep(ep);
332 struct mtu3_request *mreq = to_mtu3_request(req);
333 struct mtu3_request *r;
334 unsigned long flags;
335 int ret = 0;
336 struct mtu3 *mtu = mep->mtu;
337
338 if (!ep || !req || mreq->mep != mep)
339 return -EINVAL;
340
341 dev_dbg(mtu->dev, "%s : req=%p\n", __func__, req);
342
343 spin_lock_irqsave(&mtu->lock, flags);
344
345 list_for_each_entry(r, &mep->req_list, list) {
346 if (r == mreq)
347 break;
348 }
349 if (r != mreq) {
350 dev_dbg(mtu->dev, "req=%p not queued to %s\n", req, ep->name);
351 ret = -EINVAL;
352 goto done;
353 }
354
355 mtu3_qmu_flush(mep); /* REVISIT: set BPS ?? */
356 mtu3_req_complete(mep, req, -ECONNRESET);
357 mtu3_qmu_start(mep);
358
359done:
360 spin_unlock_irqrestore(&mtu->lock, flags);
361
362 return ret;
363}
364
365/*
366 * Set or clear the halt bit of an EP.
367 * A halted EP won't TX/RX any data but will queue requests.
368 */
369static int mtu3_gadget_ep_set_halt(struct usb_ep *ep, int value)
370{
371 struct mtu3_ep *mep = to_mtu3_ep(ep);
372 struct mtu3 *mtu = mep->mtu;
373 struct mtu3_request *mreq;
374 unsigned long flags;
375 int ret = 0;
376
377 if (!ep)
378 return -EINVAL;
379
380 dev_dbg(mtu->dev, "%s : %s...", __func__, ep->name);
381
382 spin_lock_irqsave(&mtu->lock, flags);
383
384 if (mep->type == USB_ENDPOINT_XFER_ISOC) {
385 ret = -EINVAL;
386 goto done;
387 }
388
389 mreq = next_request(mep);
390 if (value) {
391 /*
392 * If there is not request for TX-EP, QMU will not transfer
393 * data to TX-FIFO, so no need check whether TX-FIFO
394 * holds bytes or not here
395 */
396 if (mreq) {
397 dev_dbg(mtu->dev, "req in progress, cannot halt %s\n",
398 ep->name);
399 ret = -EAGAIN;
400 goto done;
401 }
402 } else {
403 mep->wedged = 0;
404 }
405
406 dev_dbg(mtu->dev, "%s %s stall\n", ep->name, value ? "set" : "clear");
407
408 mtu3_ep_stall_set(mep, value);
409
410done:
411 spin_unlock_irqrestore(&mtu->lock, flags);
412
413 return ret;
414}
415
416/* Sets the halt feature with the clear requests ignored */
417static int mtu3_gadget_ep_set_wedge(struct usb_ep *ep)
418{
419 struct mtu3_ep *mep = to_mtu3_ep(ep);
420
421 if (!ep)
422 return -EINVAL;
423
424 mep->wedged = 1;
425
426 return usb_ep_set_halt(ep);
427}
428
429static const struct usb_ep_ops mtu3_ep_ops = {
430 .enable = mtu3_gadget_ep_enable,
431 .disable = mtu3_gadget_ep_disable,
432 .alloc_request = mtu3_alloc_request,
433 .free_request = mtu3_free_request,
434 .queue = mtu3_gadget_queue,
435 .dequeue = mtu3_gadget_dequeue,
436 .set_halt = mtu3_gadget_ep_set_halt,
437 .set_wedge = mtu3_gadget_ep_set_wedge,
438};
439
440static int mtu3_gadget_get_frame(struct usb_gadget *gadget)
441{
442 struct mtu3 *mtu = gadget_to_mtu3(gadget);
443
444 return (int)mtu3_readl(mtu->mac_base, U3D_USB20_FRAME_NUM);
445}
446
447static int mtu3_gadget_wakeup(struct usb_gadget *gadget)
448{
449 struct mtu3 *mtu = gadget_to_mtu3(gadget);
450 unsigned long flags;
451
452 dev_dbg(mtu->dev, "%s\n", __func__);
453
454 /* remote wakeup feature is not enabled by host */
455 if (!mtu->may_wakeup)
456 return -EOPNOTSUPP;
457
458 spin_lock_irqsave(&mtu->lock, flags);
459 if (mtu->g.speed == USB_SPEED_SUPER) {
460 mtu3_setbits(mtu->mac_base, U3D_LINK_POWER_CONTROL, UX_EXIT);
461 } else {
462 mtu3_setbits(mtu->mac_base, U3D_POWER_MANAGEMENT, RESUME);
463 spin_unlock_irqrestore(&mtu->lock, flags);
464 usleep_range(10000, 11000);
465 spin_lock_irqsave(&mtu->lock, flags);
466 mtu3_clrbits(mtu->mac_base, U3D_POWER_MANAGEMENT, RESUME);
467 }
468 spin_unlock_irqrestore(&mtu->lock, flags);
469 return 0;
470}
471
472static int mtu3_gadget_set_self_powered(struct usb_gadget *gadget,
473 int is_selfpowered)
474{
475 struct mtu3 *mtu = gadget_to_mtu3(gadget);
476
477 mtu->is_self_powered = !!is_selfpowered;
478 return 0;
479}
480
481static int mtu3_gadget_pullup(struct usb_gadget *gadget, int is_on)
482{
483 struct mtu3 *mtu = gadget_to_mtu3(gadget);
484 unsigned long flags;
485
486 dev_dbg(mtu->dev, "%s (%s) for %sactive device\n", __func__,
487 is_on ? "on" : "off", mtu->is_active ? "" : "in");
488
489 /* we'd rather not pullup unless the device is active. */
490 spin_lock_irqsave(&mtu->lock, flags);
491
492 is_on = !!is_on;
493 if (!mtu->is_active) {
494 /* save it for mtu3_start() to process the request */
495 mtu->softconnect = is_on;
496 } else if (is_on != mtu->softconnect) {
497 mtu->softconnect = is_on;
498 mtu3_dev_on_off(mtu, is_on);
499 }
500
501 spin_unlock_irqrestore(&mtu->lock, flags);
502
503 return 0;
504}
505
506static int mtu3_gadget_start(struct usb_gadget *gadget,
507 struct usb_gadget_driver *driver)
508{
509 struct mtu3 *mtu = gadget_to_mtu3(gadget);
510 unsigned long flags;
511
512 if (mtu->gadget_driver) {
513 dev_err(mtu->dev, "%s is already bound to %s\n",
514 mtu->g.name, mtu->gadget_driver->driver.name);
515 return -EBUSY;
516 }
517
518 dev_dbg(mtu->dev, "bind driver %s\n", driver->function);
519
520 spin_lock_irqsave(&mtu->lock, flags);
521
522 mtu->softconnect = 0;
523 mtu->gadget_driver = driver;
524
525 if (mtu->ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
526 mtu3_start(mtu);
527
528 spin_unlock_irqrestore(&mtu->lock, flags);
529
530 return 0;
531}
532
533static void stop_activity(struct mtu3 *mtu)
534{
535 struct usb_gadget_driver *driver = mtu->gadget_driver;
536 int i;
537
538 /* don't disconnect if it's not connected */
539 if (mtu->g.speed == USB_SPEED_UNKNOWN)
540 driver = NULL;
541 else
542 mtu->g.speed = USB_SPEED_UNKNOWN;
543
544 /* deactivate the hardware */
545 if (mtu->softconnect) {
546 mtu->softconnect = 0;
547 mtu3_dev_on_off(mtu, 0);
548 }
549
550 /*
551 * killing any outstanding requests will quiesce the driver;
552 * then report disconnect
553 */
554 nuke(mtu->ep0, -ESHUTDOWN);
555 for (i = 1; i < mtu->num_eps; i++) {
556 nuke(mtu->in_eps + i, -ESHUTDOWN);
557 nuke(mtu->out_eps + i, -ESHUTDOWN);
558 }
559
560 if (driver) {
561 spin_unlock(&mtu->lock);
562 driver->disconnect(&mtu->g);
563 spin_lock(&mtu->lock);
564 }
565}
566
567static int mtu3_gadget_stop(struct usb_gadget *g)
568{
569 struct mtu3 *mtu = gadget_to_mtu3(g);
570 unsigned long flags;
571
572 dev_dbg(mtu->dev, "%s\n", __func__);
573
574 spin_lock_irqsave(&mtu->lock, flags);
575
576 stop_activity(mtu);
577 mtu->gadget_driver = NULL;
578
579 if (mtu->ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
580 mtu3_stop(mtu);
581
582 spin_unlock_irqrestore(&mtu->lock, flags);
583
584 return 0;
585}
586
587static const struct usb_gadget_ops mtu3_gadget_ops = {
588 .get_frame = mtu3_gadget_get_frame,
589 .wakeup = mtu3_gadget_wakeup,
590 .set_selfpowered = mtu3_gadget_set_self_powered,
591 .pullup = mtu3_gadget_pullup,
592 .udc_start = mtu3_gadget_start,
593 .udc_stop = mtu3_gadget_stop,
594};
595
596static void init_hw_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
597 u32 epnum, u32 is_in)
598{
599 mep->epnum = epnum;
600 mep->mtu = mtu;
601 mep->is_in = is_in;
602
603 INIT_LIST_HEAD(&mep->req_list);
604
605 sprintf(mep->name, "ep%d%s", epnum,
606 !epnum ? "" : (is_in ? "in" : "out"));
607
608 mep->ep.name = mep->name;
609 INIT_LIST_HEAD(&mep->ep.ep_list);
610
611 /* initialize maxpacket as SS */
612 if (!epnum) {
613 usb_ep_set_maxpacket_limit(&mep->ep, 512);
614 mep->ep.caps.type_control = true;
615 mep->ep.ops = &mtu3_ep0_ops;
616 mtu->g.ep0 = &mep->ep;
617 } else {
618 usb_ep_set_maxpacket_limit(&mep->ep, 1024);
619 mep->ep.caps.type_iso = true;
620 mep->ep.caps.type_bulk = true;
621 mep->ep.caps.type_int = true;
622 mep->ep.ops = &mtu3_ep_ops;
623 list_add_tail(&mep->ep.ep_list, &mtu->g.ep_list);
624 }
625
626 dev_dbg(mtu->dev, "%s, name=%s, maxp=%d\n", __func__, mep->ep.name,
627 mep->ep.maxpacket);
628
629 if (!epnum) {
630 mep->ep.caps.dir_in = true;
631 mep->ep.caps.dir_out = true;
632 } else if (is_in) {
633 mep->ep.caps.dir_in = true;
634 } else {
635 mep->ep.caps.dir_out = true;
636 }
637}
638
639static void mtu3_gadget_init_eps(struct mtu3 *mtu)
640{
641 u8 epnum;
642
643 /* initialize endpoint list just once */
644 INIT_LIST_HEAD(&(mtu->g.ep_list));
645
646 dev_dbg(mtu->dev, "%s num_eps(1 for a pair of tx&rx ep)=%d\n",
647 __func__, mtu->num_eps);
648
649 init_hw_ep(mtu, mtu->ep0, 0, 0);
650 for (epnum = 1; epnum < mtu->num_eps; epnum++) {
651 init_hw_ep(mtu, mtu->in_eps + epnum, epnum, 1);
652 init_hw_ep(mtu, mtu->out_eps + epnum, epnum, 0);
653 }
654}
655
656int mtu3_gadget_setup(struct mtu3 *mtu)
657{
658 int ret;
659
660 mtu->g.ops = &mtu3_gadget_ops;
661 mtu->g.max_speed = mtu->max_speed;
662 mtu->g.speed = USB_SPEED_UNKNOWN;
663 mtu->g.sg_supported = 0;
664 mtu->g.name = MTU3_DRIVER_NAME;
665 mtu->is_active = 0;
666
667 mtu3_gadget_init_eps(mtu);
668
669 ret = usb_add_gadget_udc(mtu->dev, &mtu->g);
670 if (ret) {
671 dev_err(mtu->dev, "failed to register udc\n");
672 return ret;
673 }
674
675 usb_gadget_set_state(&mtu->g, USB_STATE_NOTATTACHED);
676
677 return 0;
678}
679
680void mtu3_gadget_cleanup(struct mtu3 *mtu)
681{
682 usb_del_gadget_udc(&mtu->g);
683}
684
685void mtu3_gadget_resume(struct mtu3 *mtu)
686{
687 dev_dbg(mtu->dev, "gadget RESUME\n");
688 if (mtu->gadget_driver && mtu->gadget_driver->resume) {
689 spin_unlock(&mtu->lock);
690 mtu->gadget_driver->resume(&mtu->g);
691 spin_lock(&mtu->lock);
692 }
693}
694
695/* called when SOF packets stop for 3+ msec or enters U3 */
696void mtu3_gadget_suspend(struct mtu3 *mtu)
697{
698 dev_dbg(mtu->dev, "gadget SUSPEND\n");
699 if (mtu->gadget_driver && mtu->gadget_driver->suspend) {
700 spin_unlock(&mtu->lock);
701 mtu->gadget_driver->suspend(&mtu->g);
702 spin_lock(&mtu->lock);
703 }
704}
705
706/* called when VBUS drops below session threshold, and in other cases */
707void mtu3_gadget_disconnect(struct mtu3 *mtu)
708{
709 dev_dbg(mtu->dev, "gadget DISCONNECT\n");
710 if (mtu->gadget_driver && mtu->gadget_driver->disconnect) {
711 spin_unlock(&mtu->lock);
712 mtu->gadget_driver->disconnect(&mtu->g);
713 spin_lock(&mtu->lock);
714 }
715
716 usb_gadget_set_state(&mtu->g, USB_STATE_NOTATTACHED);
717}
718
719void mtu3_gadget_reset(struct mtu3 *mtu)
720{
721 dev_dbg(mtu->dev, "gadget RESET\n");
722
723 /* report disconnect, if we didn't flush EP state */
724 if (mtu->g.speed != USB_SPEED_UNKNOWN)
725 mtu3_gadget_disconnect(mtu);
726
727 mtu->address = 0;
728 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
729 mtu->may_wakeup = 0;
730}
diff --git a/drivers/usb/mtu3/mtu3_gadget_ep0.c b/drivers/usb/mtu3/mtu3_gadget_ep0.c
new file mode 100644
index 000000000000..2d7427b48775
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_gadget_ep0.c
@@ -0,0 +1,881 @@
1/*
2 * mtu3_gadget_ep0.c - MediaTek USB3 DRD peripheral driver ep0 handling
3 *
4 * Copyright (c) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng.Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include "mtu3.h"
20
21/* ep0 is always mtu3->in_eps[0] */
22#define next_ep0_request(mtu) next_request((mtu)->ep0)
23
24/* for high speed test mode; see USB 2.0 spec 7.1.20 */
25static const u8 mtu3_test_packet[53] = {
26 /* implicit SYNC then DATA0 to start */
27
28 /* JKJKJKJK x9 */
29 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
30 /* JJKKJJKK x8 */
31 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
32 /* JJJJKKKK x8 */
33 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
34 /* JJJJJJJKKKKKKK x8 */
35 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
36 /* JJJJJJJK x8 */
37 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd,
38 /* JKKKKKKK x10, JK */
39 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e,
40 /* implicit CRC16 then EOP to end */
41};
42
43static char *decode_ep0_state(struct mtu3 *mtu)
44{
45 switch (mtu->ep0_state) {
46 case MU3D_EP0_STATE_SETUP:
47 return "SETUP";
48 case MU3D_EP0_STATE_TX:
49 return "IN";
50 case MU3D_EP0_STATE_RX:
51 return "OUT";
52 case MU3D_EP0_STATE_TX_END:
53 return "TX-END";
54 case MU3D_EP0_STATE_STALL:
55 return "STALL";
56 default:
57 return "??";
58 }
59}
60
61static void ep0_req_giveback(struct mtu3 *mtu, struct usb_request *req)
62{
63 mtu3_req_complete(mtu->ep0, req, 0);
64}
65
66static int
67forward_to_driver(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
68__releases(mtu->lock)
69__acquires(mtu->lock)
70{
71 int ret;
72
73 if (!mtu->gadget_driver)
74 return -EOPNOTSUPP;
75
76 spin_unlock(&mtu->lock);
77 ret = mtu->gadget_driver->setup(&mtu->g, setup);
78 spin_lock(&mtu->lock);
79
80 dev_dbg(mtu->dev, "%s ret %d\n", __func__, ret);
81 return ret;
82}
83
84static void ep0_write_fifo(struct mtu3_ep *mep, const u8 *src, u16 len)
85{
86 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
87 u16 index = 0;
88
89 dev_dbg(mep->mtu->dev, "%s: ep%din, len=%d, buf=%p\n",
90 __func__, mep->epnum, len, src);
91
92 if (len >= 4) {
93 iowrite32_rep(fifo, src, len >> 2);
94 index = len & ~0x03;
95 }
96 if (len & 0x02) {
97 writew(*(u16 *)&src[index], fifo);
98 index += 2;
99 }
100 if (len & 0x01)
101 writeb(src[index], fifo);
102}
103
104static void ep0_read_fifo(struct mtu3_ep *mep, u8 *dst, u16 len)
105{
106 void __iomem *fifo = mep->mtu->mac_base + U3D_FIFO0;
107 u32 value;
108 u16 index = 0;
109
110 dev_dbg(mep->mtu->dev, "%s: ep%dout len=%d buf=%p\n",
111 __func__, mep->epnum, len, dst);
112
113 if (len >= 4) {
114 ioread32_rep(fifo, dst, len >> 2);
115 index = len & ~0x03;
116 }
117 if (len & 0x3) {
118 value = readl(fifo);
119 memcpy(&dst[index], &value, len & 0x3);
120 }
121
122}
123
124static void ep0_load_test_packet(struct mtu3 *mtu)
125{
126 /*
127 * because the length of test packet is less than max packet of HS ep0,
128 * write it into fifo directly.
129 */
130 ep0_write_fifo(mtu->ep0, mtu3_test_packet, sizeof(mtu3_test_packet));
131}
132
133/*
134 * A. send STALL for setup transfer without data stage:
135 * set SENDSTALL and SETUPPKTRDY at the same time;
136 * B. send STALL for other cases:
137 * set SENDSTALL only.
138 */
139static void ep0_stall_set(struct mtu3_ep *mep0, bool set, u32 pktrdy)
140{
141 struct mtu3 *mtu = mep0->mtu;
142 void __iomem *mbase = mtu->mac_base;
143 u32 csr;
144
145 /* EP0_SENTSTALL is W1C */
146 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
147 if (set)
148 csr |= EP0_SENDSTALL | pktrdy;
149 else
150 csr = (csr & ~EP0_SENDSTALL) | EP0_SENTSTALL;
151 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
152
153 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
154
155 dev_dbg(mtu->dev, "ep0: %s STALL, ep0_state: %s\n",
156 set ? "SEND" : "CLEAR", decode_ep0_state(mtu));
157}
158
159static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq);
160
161static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req)
162{}
163
164static void ep0_set_sel_complete(struct usb_ep *ep, struct usb_request *req)
165{
166 struct mtu3_request *mreq;
167 struct mtu3 *mtu;
168 struct usb_set_sel_req sel;
169
170 memcpy(&sel, req->buf, sizeof(sel));
171
172 mreq = to_mtu3_request(req);
173 mtu = mreq->mtu;
174 dev_dbg(mtu->dev, "u1sel:%d, u1pel:%d, u2sel:%d, u2pel:%d\n",
175 sel.u1_sel, sel.u1_pel, sel.u2_sel, sel.u2_pel);
176}
177
178/* queue data stage to handle 6 byte SET_SEL request */
179static int ep0_set_sel(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
180{
181 int ret;
182 u16 length = le16_to_cpu(setup->wLength);
183
184 if (unlikely(length != 6)) {
185 dev_err(mtu->dev, "%s wrong wLength:%d\n",
186 __func__, length);
187 return -EINVAL;
188 }
189
190 mtu->ep0_req.mep = mtu->ep0;
191 mtu->ep0_req.request.length = 6;
192 mtu->ep0_req.request.buf = mtu->setup_buf;
193 mtu->ep0_req.request.complete = ep0_set_sel_complete;
194 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
195
196 return ret < 0 ? ret : 1;
197}
198
199static int
200ep0_get_status(struct mtu3 *mtu, const struct usb_ctrlrequest *setup)
201{
202 struct mtu3_ep *mep = NULL;
203 int handled = 1;
204 u8 result[2] = {0, 0};
205 u8 epnum = 0;
206 int is_in;
207
208 switch (setup->bRequestType & USB_RECIP_MASK) {
209 case USB_RECIP_DEVICE:
210 result[0] = mtu->is_self_powered << USB_DEVICE_SELF_POWERED;
211 result[0] |= mtu->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
212 /* superspeed only */
213 if (mtu->g.speed == USB_SPEED_SUPER) {
214 result[0] |= mtu->u1_enable << USB_DEV_STAT_U1_ENABLED;
215 result[0] |= mtu->u2_enable << USB_DEV_STAT_U2_ENABLED;
216 }
217
218 dev_dbg(mtu->dev, "%s result=%x, U1=%x, U2=%x\n", __func__,
219 result[0], mtu->u1_enable, mtu->u2_enable);
220
221 break;
222 case USB_RECIP_INTERFACE:
223 break;
224 case USB_RECIP_ENDPOINT:
225 epnum = (u8) le16_to_cpu(setup->wIndex);
226 is_in = epnum & USB_DIR_IN;
227 epnum &= USB_ENDPOINT_NUMBER_MASK;
228
229 if (epnum >= mtu->num_eps) {
230 handled = -EINVAL;
231 break;
232 }
233 if (!epnum)
234 break;
235
236 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
237 if (!mep->desc) {
238 handled = -EINVAL;
239 break;
240 }
241 if (mep->flags & MTU3_EP_STALL)
242 result[0] |= 1 << USB_ENDPOINT_HALT;
243
244 break;
245 default:
246 /* class, vendor, etc ... delegate */
247 handled = 0;
248 break;
249 }
250
251 if (handled > 0) {
252 int ret;
253
254 /* prepare a data stage for GET_STATUS */
255 dev_dbg(mtu->dev, "get_status=%x\n", *(u16 *)result);
256 memcpy(mtu->setup_buf, result, sizeof(result));
257 mtu->ep0_req.mep = mtu->ep0;
258 mtu->ep0_req.request.length = 2;
259 mtu->ep0_req.request.buf = &mtu->setup_buf;
260 mtu->ep0_req.request.complete = ep0_dummy_complete;
261 ret = ep0_queue(mtu->ep0, &mtu->ep0_req);
262 if (ret < 0)
263 handled = ret;
264 }
265 return handled;
266}
267
268static int handle_test_mode(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
269{
270 void __iomem *mbase = mtu->mac_base;
271 int handled = 1;
272
273 switch (le16_to_cpu(setup->wIndex) >> 8) {
274 case TEST_J:
275 dev_dbg(mtu->dev, "TEST_J\n");
276 mtu->test_mode_nr = TEST_J_MODE;
277 break;
278 case TEST_K:
279 dev_dbg(mtu->dev, "TEST_K\n");
280 mtu->test_mode_nr = TEST_K_MODE;
281 break;
282 case TEST_SE0_NAK:
283 dev_dbg(mtu->dev, "TEST_SE0_NAK\n");
284 mtu->test_mode_nr = TEST_SE0_NAK_MODE;
285 break;
286 case TEST_PACKET:
287 dev_dbg(mtu->dev, "TEST_PACKET\n");
288 mtu->test_mode_nr = TEST_PACKET_MODE;
289 break;
290 default:
291 handled = -EINVAL;
292 goto out;
293 }
294
295 mtu->test_mode = true;
296
297 /* no TX completion interrupt, and need restart platform after test */
298 if (mtu->test_mode_nr == TEST_PACKET_MODE)
299 ep0_load_test_packet(mtu);
300
301 mtu3_writel(mbase, U3D_USB2_TEST_MODE, mtu->test_mode_nr);
302
303 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
304
305out:
306 return handled;
307}
308
309static int ep0_handle_feature_dev(struct mtu3 *mtu,
310 struct usb_ctrlrequest *setup, bool set)
311{
312 void __iomem *mbase = mtu->mac_base;
313 int handled = -EINVAL;
314 u32 lpc;
315
316 switch (le16_to_cpu(setup->wValue)) {
317 case USB_DEVICE_REMOTE_WAKEUP:
318 mtu->may_wakeup = !!set;
319 handled = 1;
320 break;
321 case USB_DEVICE_TEST_MODE:
322 if (!set || (mtu->g.speed != USB_SPEED_HIGH) ||
323 (le16_to_cpu(setup->wIndex) & 0xff))
324 break;
325
326 handled = handle_test_mode(mtu, setup);
327 break;
328 case USB_DEVICE_U1_ENABLE:
329 if (mtu->g.speed != USB_SPEED_SUPER ||
330 mtu->g.state != USB_STATE_CONFIGURED)
331 break;
332
333 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
334 if (set)
335 lpc |= SW_U1_ACCEPT_ENABLE;
336 else
337 lpc &= ~SW_U1_ACCEPT_ENABLE;
338 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
339
340 mtu->u1_enable = !!set;
341 handled = 1;
342 break;
343 case USB_DEVICE_U2_ENABLE:
344 if (mtu->g.speed != USB_SPEED_SUPER ||
345 mtu->g.state != USB_STATE_CONFIGURED)
346 break;
347
348 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL);
349 if (set)
350 lpc |= SW_U2_ACCEPT_ENABLE;
351 else
352 lpc &= ~SW_U2_ACCEPT_ENABLE;
353 mtu3_writel(mbase, U3D_LINK_POWER_CONTROL, lpc);
354
355 mtu->u2_enable = !!set;
356 handled = 1;
357 break;
358 default:
359 handled = -EINVAL;
360 break;
361 }
362 return handled;
363}
364
365static int ep0_handle_feature(struct mtu3 *mtu,
366 struct usb_ctrlrequest *setup, bool set)
367{
368 struct mtu3_ep *mep;
369 int handled = -EINVAL;
370 int is_in;
371 u16 value;
372 u16 index;
373 u8 epnum;
374
375 value = le16_to_cpu(setup->wValue);
376 index = le16_to_cpu(setup->wIndex);
377
378 switch (setup->bRequestType & USB_RECIP_MASK) {
379 case USB_RECIP_DEVICE:
380 handled = ep0_handle_feature_dev(mtu, setup, set);
381 break;
382 case USB_RECIP_INTERFACE:
383 /* superspeed only */
384 if ((value == USB_INTRF_FUNC_SUSPEND)
385 && (mtu->g.speed == USB_SPEED_SUPER)) {
386 /*
387 * forward the request because function drivers
388 * should handle it
389 */
390 handled = 0;
391 }
392 break;
393 case USB_RECIP_ENDPOINT:
394 epnum = index & USB_ENDPOINT_NUMBER_MASK;
395 if (epnum == 0 || epnum >= mtu->num_eps ||
396 value != USB_ENDPOINT_HALT)
397 break;
398
399 is_in = index & USB_DIR_IN;
400 mep = (is_in ? mtu->in_eps : mtu->out_eps) + epnum;
401 if (!mep->desc)
402 break;
403
404 handled = 1;
405 /* ignore request if endpoint is wedged */
406 if (mep->wedged)
407 break;
408
409 mtu3_ep_stall_set(mep, set);
410 break;
411 default:
412 /* class, vendor, etc ... delegate */
413 handled = 0;
414 break;
415 }
416 return handled;
417}
418
419/*
420 * handle all control requests can be handled
421 * returns:
422 * negative errno - error happened
423 * zero - need delegate SETUP to gadget driver
424 * positive - already handled
425 */
426static int handle_standard_request(struct mtu3 *mtu,
427 struct usb_ctrlrequest *setup)
428{
429 void __iomem *mbase = mtu->mac_base;
430 enum usb_device_state state = mtu->g.state;
431 int handled = -EINVAL;
432 u32 dev_conf;
433 u16 value;
434
435 value = le16_to_cpu(setup->wValue);
436
437 /* the gadget driver handles everything except what we must handle */
438 switch (setup->bRequest) {
439 case USB_REQ_SET_ADDRESS:
440 /* change it after the status stage */
441 mtu->address = (u8) (value & 0x7f);
442 dev_dbg(mtu->dev, "set address to 0x%x\n", mtu->address);
443
444 dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF);
445 dev_conf &= ~DEV_ADDR_MSK;
446 dev_conf |= DEV_ADDR(mtu->address);
447 mtu3_writel(mbase, U3D_DEVICE_CONF, dev_conf);
448
449 if (mtu->address)
450 usb_gadget_set_state(&mtu->g, USB_STATE_ADDRESS);
451 else
452 usb_gadget_set_state(&mtu->g, USB_STATE_DEFAULT);
453
454 handled = 1;
455 break;
456 case USB_REQ_SET_CONFIGURATION:
457 if (state == USB_STATE_ADDRESS) {
458 usb_gadget_set_state(&mtu->g,
459 USB_STATE_CONFIGURED);
460 } else if (state == USB_STATE_CONFIGURED) {
461 /*
462 * USB2 spec sec 9.4.7, if wValue is 0 then dev
463 * is moved to addressed state
464 */
465 if (!value)
466 usb_gadget_set_state(&mtu->g,
467 USB_STATE_ADDRESS);
468 }
469 handled = 0;
470 break;
471 case USB_REQ_CLEAR_FEATURE:
472 handled = ep0_handle_feature(mtu, setup, 0);
473 break;
474 case USB_REQ_SET_FEATURE:
475 handled = ep0_handle_feature(mtu, setup, 1);
476 break;
477 case USB_REQ_GET_STATUS:
478 handled = ep0_get_status(mtu, setup);
479 break;
480 case USB_REQ_SET_SEL:
481 handled = ep0_set_sel(mtu, setup);
482 break;
483 case USB_REQ_SET_ISOCH_DELAY:
484 handled = 1;
485 break;
486 default:
487 /* delegate SET_CONFIGURATION, etc */
488 handled = 0;
489 }
490
491 return handled;
492}
493
494/* receive an data packet (OUT) */
495static void ep0_rx_state(struct mtu3 *mtu)
496{
497 struct mtu3_request *mreq;
498 struct usb_request *req;
499 void __iomem *mbase = mtu->mac_base;
500 u32 maxp;
501 u32 csr;
502 u16 count = 0;
503
504 dev_dbg(mtu->dev, "%s\n", __func__);
505
506 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
507 mreq = next_ep0_request(mtu);
508 req = &mreq->request;
509
510 /* read packet and ack; or stall because of gadget driver bug */
511 if (req) {
512 void *buf = req->buf + req->actual;
513 unsigned int len = req->length - req->actual;
514
515 /* read the buffer */
516 count = mtu3_readl(mbase, U3D_RXCOUNT0);
517 if (count > len) {
518 req->status = -EOVERFLOW;
519 count = len;
520 }
521 ep0_read_fifo(mtu->ep0, buf, count);
522 req->actual += count;
523 csr |= EP0_RXPKTRDY;
524
525 maxp = mtu->g.ep0->maxpacket;
526 if (count < maxp || req->actual == req->length) {
527 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
528 dev_dbg(mtu->dev, "ep0 state: %s\n",
529 decode_ep0_state(mtu));
530
531 csr |= EP0_DATAEND;
532 } else {
533 req = NULL;
534 }
535 } else {
536 csr |= EP0_RXPKTRDY | EP0_SENDSTALL;
537 dev_dbg(mtu->dev, "%s: SENDSTALL\n", __func__);
538 }
539
540 mtu3_writel(mbase, U3D_EP0CSR, csr);
541
542 /* give back the request if have received all data */
543 if (req)
544 ep0_req_giveback(mtu, req);
545
546}
547
548/* transmitting to the host (IN) */
549static void ep0_tx_state(struct mtu3 *mtu)
550{
551 struct mtu3_request *mreq = next_ep0_request(mtu);
552 struct usb_request *req;
553 u32 csr;
554 u8 *src;
555 u8 count;
556 u32 maxp;
557
558 dev_dbg(mtu->dev, "%s\n", __func__);
559
560 if (!mreq)
561 return;
562
563 maxp = mtu->g.ep0->maxpacket;
564 req = &mreq->request;
565
566 /* load the data */
567 src = (u8 *)req->buf + req->actual;
568 count = min(maxp, req->length - req->actual);
569 if (count)
570 ep0_write_fifo(mtu->ep0, src, count);
571
572 dev_dbg(mtu->dev, "%s act=%d, len=%d, cnt=%d, maxp=%d zero=%d\n",
573 __func__, req->actual, req->length, count, maxp, req->zero);
574
575 req->actual += count;
576
577 if ((count < maxp)
578 || ((req->actual == req->length) && !req->zero))
579 mtu->ep0_state = MU3D_EP0_STATE_TX_END;
580
581 /* send it out, triggering a "txpktrdy cleared" irq */
582 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
583 mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
584
585 dev_dbg(mtu->dev, "%s ep0csr=0x%x\n", __func__,
586 mtu3_readl(mtu->mac_base, U3D_EP0CSR));
587}
588
589static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup)
590{
591 struct mtu3_request *mreq;
592 u32 count;
593 u32 csr;
594
595 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
596 count = mtu3_readl(mtu->mac_base, U3D_RXCOUNT0);
597
598 ep0_read_fifo(mtu->ep0, (u8 *)setup, count);
599
600 dev_dbg(mtu->dev, "SETUP req%02x.%02x v%04x i%04x l%04x\n",
601 setup->bRequestType, setup->bRequest,
602 le16_to_cpu(setup->wValue), le16_to_cpu(setup->wIndex),
603 le16_to_cpu(setup->wLength));
604
605 /* clean up any leftover transfers */
606 mreq = next_ep0_request(mtu);
607 if (mreq)
608 ep0_req_giveback(mtu, &mreq->request);
609
610 if (le16_to_cpu(setup->wLength) == 0) {
611 ; /* no data stage, nothing to do */
612 } else if (setup->bRequestType & USB_DIR_IN) {
613 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
614 csr | EP0_SETUPPKTRDY | EP0_DPHTX);
615 mtu->ep0_state = MU3D_EP0_STATE_TX;
616 } else {
617 mtu3_writel(mtu->mac_base, U3D_EP0CSR,
618 (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX));
619 mtu->ep0_state = MU3D_EP0_STATE_RX;
620 }
621}
622
623static int ep0_handle_setup(struct mtu3 *mtu)
624__releases(mtu->lock)
625__acquires(mtu->lock)
626{
627 struct usb_ctrlrequest setup;
628 struct mtu3_request *mreq;
629 void __iomem *mbase = mtu->mac_base;
630 int handled = 0;
631
632 ep0_read_setup(mtu, &setup);
633
634 if ((setup.bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
635 handled = handle_standard_request(mtu, &setup);
636
637 dev_dbg(mtu->dev, "handled %d, ep0_state: %s\n",
638 handled, decode_ep0_state(mtu));
639
640 if (handled < 0)
641 goto stall;
642 else if (handled > 0)
643 goto finish;
644
645 handled = forward_to_driver(mtu, &setup);
646 if (handled < 0) {
647stall:
648 dev_dbg(mtu->dev, "%s stall (%d)\n", __func__, handled);
649
650 ep0_stall_set(mtu->ep0, true,
651 le16_to_cpu(setup.wLength) ? 0 : EP0_SETUPPKTRDY);
652
653 return 0;
654 }
655
656finish:
657 if (mtu->test_mode) {
658 ; /* nothing to do */
659 } else if (le16_to_cpu(setup.wLength) == 0) { /* no data stage */
660
661 mtu3_writel(mbase, U3D_EP0CSR,
662 (mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS)
663 | EP0_SETUPPKTRDY | EP0_DATAEND);
664
665 /* complete zlp request directly */
666 mreq = next_ep0_request(mtu);
667 if (mreq && !mreq->request.length)
668 ep0_req_giveback(mtu, &mreq->request);
669 }
670
671 return 0;
672}
673
674irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu)
675{
676 void __iomem *mbase = mtu->mac_base;
677 struct mtu3_request *mreq;
678 u32 int_status;
679 irqreturn_t ret = IRQ_NONE;
680 u32 csr;
681 u32 len;
682
683 int_status = mtu3_readl(mbase, U3D_EPISR);
684 int_status &= mtu3_readl(mbase, U3D_EPIER);
685 mtu3_writel(mbase, U3D_EPISR, int_status); /* W1C */
686
687 /* only handle ep0's */
688 if (!(int_status & EP0ISR))
689 return IRQ_NONE;
690
691 csr = mtu3_readl(mbase, U3D_EP0CSR);
692
693 dev_dbg(mtu->dev, "%s csr=0x%x\n", __func__, csr);
694
695 /* we sent a stall.. need to clear it now.. */
696 if (csr & EP0_SENTSTALL) {
697 ep0_stall_set(mtu->ep0, false, 0);
698 csr = mtu3_readl(mbase, U3D_EP0CSR);
699 ret = IRQ_HANDLED;
700 }
701 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
702
703 switch (mtu->ep0_state) {
704 case MU3D_EP0_STATE_TX:
705 /* irq on clearing txpktrdy */
706 if ((csr & EP0_FIFOFULL) == 0) {
707 ep0_tx_state(mtu);
708 ret = IRQ_HANDLED;
709 }
710 break;
711 case MU3D_EP0_STATE_RX:
712 /* irq on set rxpktrdy */
713 if (csr & EP0_RXPKTRDY) {
714 ep0_rx_state(mtu);
715 ret = IRQ_HANDLED;
716 }
717 break;
718 case MU3D_EP0_STATE_TX_END:
719 mtu3_writel(mbase, U3D_EP0CSR,
720 (csr & EP0_W1C_BITS) | EP0_DATAEND);
721
722 mreq = next_ep0_request(mtu);
723 if (mreq)
724 ep0_req_giveback(mtu, &mreq->request);
725
726 mtu->ep0_state = MU3D_EP0_STATE_SETUP;
727 ret = IRQ_HANDLED;
728 dev_dbg(mtu->dev, "ep0_state: %s\n", decode_ep0_state(mtu));
729 break;
730 case MU3D_EP0_STATE_SETUP:
731 if (!(csr & EP0_SETUPPKTRDY))
732 break;
733
734 len = mtu3_readl(mbase, U3D_RXCOUNT0);
735 if (len != 8) {
736 dev_err(mtu->dev, "SETUP packet len %d != 8 ?\n", len);
737 break;
738 }
739
740 ep0_handle_setup(mtu);
741 ret = IRQ_HANDLED;
742 break;
743 default:
744 /* can't happen */
745 ep0_stall_set(mtu->ep0, true, 0);
746 WARN_ON(1);
747 break;
748 }
749
750 return ret;
751}
752
753
754static int mtu3_ep0_enable(struct usb_ep *ep,
755 const struct usb_endpoint_descriptor *desc)
756{
757 /* always enabled */
758 return -EINVAL;
759}
760
761static int mtu3_ep0_disable(struct usb_ep *ep)
762{
763 /* always enabled */
764 return -EINVAL;
765}
766
767static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq)
768{
769 struct mtu3 *mtu = mep->mtu;
770
771 mreq->mtu = mtu;
772 mreq->request.actual = 0;
773 mreq->request.status = -EINPROGRESS;
774
775 dev_dbg(mtu->dev, "%s %s (ep0_state: %s), len#%d\n", __func__,
776 mep->name, decode_ep0_state(mtu), mreq->request.length);
777
778 if (!list_empty(&mep->req_list))
779 return -EBUSY;
780
781 switch (mtu->ep0_state) {
782 case MU3D_EP0_STATE_SETUP:
783 case MU3D_EP0_STATE_RX: /* control-OUT data */
784 case MU3D_EP0_STATE_TX: /* control-IN data */
785 break;
786 default:
787 dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__,
788 decode_ep0_state(mtu));
789 return -EINVAL;
790 }
791
792 list_add_tail(&mreq->list, &mep->req_list);
793
794 /* sequence #1, IN ... start writing the data */
795 if (mtu->ep0_state == MU3D_EP0_STATE_TX)
796 ep0_tx_state(mtu);
797
798 return 0;
799}
800
801static int mtu3_ep0_queue(struct usb_ep *ep,
802 struct usb_request *req, gfp_t gfp)
803{
804 struct mtu3_ep *mep;
805 struct mtu3_request *mreq;
806 struct mtu3 *mtu;
807 unsigned long flags;
808 int ret = 0;
809
810 if (!ep || !req)
811 return -EINVAL;
812
813 mep = to_mtu3_ep(ep);
814 mtu = mep->mtu;
815 mreq = to_mtu3_request(req);
816
817 spin_lock_irqsave(&mtu->lock, flags);
818 ret = ep0_queue(mep, mreq);
819 spin_unlock_irqrestore(&mtu->lock, flags);
820 return ret;
821}
822
823static int mtu3_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
824{
825 /* we just won't support this */
826 return -EINVAL;
827}
828
829static int mtu3_ep0_halt(struct usb_ep *ep, int value)
830{
831 struct mtu3_ep *mep;
832 struct mtu3 *mtu;
833 unsigned long flags;
834 int ret = 0;
835
836 if (!ep || !value)
837 return -EINVAL;
838
839 mep = to_mtu3_ep(ep);
840 mtu = mep->mtu;
841
842 dev_dbg(mtu->dev, "%s\n", __func__);
843
844 spin_lock_irqsave(&mtu->lock, flags);
845
846 if (!list_empty(&mep->req_list)) {
847 ret = -EBUSY;
848 goto cleanup;
849 }
850
851 switch (mtu->ep0_state) {
852 /*
853 * stalls are usually issued after parsing SETUP packet, either
854 * directly in irq context from setup() or else later.
855 */
856 case MU3D_EP0_STATE_TX:
857 case MU3D_EP0_STATE_TX_END:
858 case MU3D_EP0_STATE_RX:
859 case MU3D_EP0_STATE_SETUP:
860 ep0_stall_set(mtu->ep0, true, 0);
861 break;
862 default:
863 dev_dbg(mtu->dev, "ep0 can't halt in state %s\n",
864 decode_ep0_state(mtu));
865 ret = -EINVAL;
866 }
867
868cleanup:
869 spin_unlock_irqrestore(&mtu->lock, flags);
870 return ret;
871}
872
873const struct usb_ep_ops mtu3_ep0_ops = {
874 .enable = mtu3_ep0_enable,
875 .disable = mtu3_ep0_disable,
876 .alloc_request = mtu3_alloc_request,
877 .free_request = mtu3_free_request,
878 .queue = mtu3_ep0_queue,
879 .dequeue = mtu3_ep0_dequeue,
880 .set_halt = mtu3_ep0_halt,
881};
diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c
new file mode 100644
index 000000000000..cd4d01087855
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_host.c
@@ -0,0 +1,294 @@
1/*
2 * mtu3_dr.c - dual role switch and host glue layer
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/clk.h>
20#include <linux/iopoll.h>
21#include <linux/irq.h>
22#include <linux/kernel.h>
23#include <linux/mfd/syscon.h>
24#include <linux/of_device.h>
25#include <linux/regmap.h>
26
27#include "mtu3.h"
28#include "mtu3_dr.h"
29
30#define PERI_WK_CTRL1 0x404
31#define UWK_CTL1_IS_C(x) (((x) & 0xf) << 26)
32#define UWK_CTL1_IS_E BIT(25)
33#define UWK_CTL1_IDDIG_C(x) (((x) & 0xf) << 11) /* cycle debounce */
34#define UWK_CTL1_IDDIG_E BIT(10) /* enable debounce */
35#define UWK_CTL1_IDDIG_P BIT(9) /* polarity */
36#define UWK_CTL1_IS_P BIT(6) /* polarity for ip sleep */
37
38/*
39 * ip-sleep wakeup mode:
40 * all clocks can be turn off, but power domain should be kept on
41 */
42static void ssusb_wakeup_ip_sleep_en(struct ssusb_mtk *ssusb)
43{
44 u32 tmp;
45 struct regmap *pericfg = ssusb->pericfg;
46
47 regmap_read(pericfg, PERI_WK_CTRL1, &tmp);
48 tmp &= ~UWK_CTL1_IS_P;
49 tmp &= ~(UWK_CTL1_IS_C(0xf));
50 tmp |= UWK_CTL1_IS_C(0x8);
51 regmap_write(pericfg, PERI_WK_CTRL1, tmp);
52 regmap_write(pericfg, PERI_WK_CTRL1, tmp | UWK_CTL1_IS_E);
53
54 regmap_read(pericfg, PERI_WK_CTRL1, &tmp);
55 dev_dbg(ssusb->dev, "%s(): WK_CTRL1[P6,E25,C26:29]=%#x\n",
56 __func__, tmp);
57}
58
59static void ssusb_wakeup_ip_sleep_dis(struct ssusb_mtk *ssusb)
60{
61 u32 tmp;
62
63 regmap_read(ssusb->pericfg, PERI_WK_CTRL1, &tmp);
64 tmp &= ~UWK_CTL1_IS_E;
65 regmap_write(ssusb->pericfg, PERI_WK_CTRL1, tmp);
66}
67
68int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb,
69 struct device_node *dn)
70{
71 struct device *dev = ssusb->dev;
72
73 /*
74 * Wakeup function is optional, so it is not an error if this property
75 * does not exist, and in such case, no need to get relative
76 * properties anymore.
77 */
78 ssusb->wakeup_en = of_property_read_bool(dn, "mediatek,enable-wakeup");
79 if (!ssusb->wakeup_en)
80 return 0;
81
82 ssusb->wk_deb_p0 = devm_clk_get(dev, "wakeup_deb_p0");
83 if (IS_ERR(ssusb->wk_deb_p0)) {
84 dev_err(dev, "fail to get wakeup_deb_p0\n");
85 return PTR_ERR(ssusb->wk_deb_p0);
86 }
87
88 if (of_property_read_bool(dn, "wakeup_deb_p1")) {
89 ssusb->wk_deb_p1 = devm_clk_get(dev, "wakeup_deb_p1");
90 if (IS_ERR(ssusb->wk_deb_p1)) {
91 dev_err(dev, "fail to get wakeup_deb_p1\n");
92 return PTR_ERR(ssusb->wk_deb_p1);
93 }
94 }
95
96 ssusb->pericfg = syscon_regmap_lookup_by_phandle(dn,
97 "mediatek,syscon-wakeup");
98 if (IS_ERR(ssusb->pericfg)) {
99 dev_err(dev, "fail to get pericfg regs\n");
100 return PTR_ERR(ssusb->pericfg);
101 }
102
103 return 0;
104}
105
106static int ssusb_wakeup_clks_enable(struct ssusb_mtk *ssusb)
107{
108 int ret;
109
110 ret = clk_prepare_enable(ssusb->wk_deb_p0);
111 if (ret) {
112 dev_err(ssusb->dev, "failed to enable wk_deb_p0\n");
113 goto usb_p0_err;
114 }
115
116 ret = clk_prepare_enable(ssusb->wk_deb_p1);
117 if (ret) {
118 dev_err(ssusb->dev, "failed to enable wk_deb_p1\n");
119 goto usb_p1_err;
120 }
121
122 return 0;
123
124usb_p1_err:
125 clk_disable_unprepare(ssusb->wk_deb_p0);
126usb_p0_err:
127 return -EINVAL;
128}
129
130static void ssusb_wakeup_clks_disable(struct ssusb_mtk *ssusb)
131{
132 clk_disable_unprepare(ssusb->wk_deb_p1);
133 clk_disable_unprepare(ssusb->wk_deb_p0);
134}
135
136static void host_ports_num_get(struct ssusb_mtk *ssusb)
137{
138 u32 xhci_cap;
139
140 xhci_cap = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_XHCI_CAP);
141 ssusb->u2_ports = SSUSB_IP_XHCI_U2_PORT_NUM(xhci_cap);
142 ssusb->u3_ports = SSUSB_IP_XHCI_U3_PORT_NUM(xhci_cap);
143
144 dev_dbg(ssusb->dev, "host - u2_ports:%d, u3_ports:%d\n",
145 ssusb->u2_ports, ssusb->u3_ports);
146}
147
148/* only configure ports will be used later */
149int ssusb_host_enable(struct ssusb_mtk *ssusb)
150{
151 void __iomem *ibase = ssusb->ippc_base;
152 int num_u3p = ssusb->u3_ports;
153 int num_u2p = ssusb->u2_ports;
154 u32 check_clk;
155 u32 value;
156 int i;
157
158 /* power on host ip */
159 mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
160
161 /* power on and enable all u3 ports */
162 for (i = 0; i < num_u3p; i++) {
163 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
164 value &= ~(SSUSB_U3_PORT_PDN | SSUSB_U3_PORT_DIS);
165 value |= SSUSB_U3_PORT_HOST_SEL;
166 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
167 }
168
169 /* power on and enable all u2 ports */
170 for (i = 0; i < num_u2p; i++) {
171 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
172 value &= ~(SSUSB_U2_PORT_PDN | SSUSB_U2_PORT_DIS);
173 value |= SSUSB_U2_PORT_HOST_SEL;
174 mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
175 }
176
177 check_clk = SSUSB_XHCI_RST_B_STS;
178 if (num_u3p)
179 check_clk = SSUSB_U3_MAC_RST_B_STS;
180
181 return ssusb_check_clocks(ssusb, check_clk);
182}
183
184int ssusb_host_disable(struct ssusb_mtk *ssusb, bool suspend)
185{
186 void __iomem *ibase = ssusb->ippc_base;
187 int num_u3p = ssusb->u3_ports;
188 int num_u2p = ssusb->u2_ports;
189 u32 value;
190 int ret;
191 int i;
192
193 /* power down and disable all u3 ports */
194 for (i = 0; i < num_u3p; i++) {
195 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
196 value |= SSUSB_U3_PORT_PDN;
197 value |= suspend ? 0 : SSUSB_U3_PORT_DIS;
198 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
199 }
200
201 /* power down and disable all u2 ports */
202 for (i = 0; i < num_u2p; i++) {
203 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
204 value |= SSUSB_U2_PORT_PDN;
205 value |= suspend ? 0 : SSUSB_U2_PORT_DIS;
206 mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
207 }
208
209 /* power down host ip */
210 mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
211
212 if (!suspend)
213 return 0;
214
215 /* wait for host ip to sleep */
216 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
217 (value & SSUSB_IP_SLEEP_STS), 100, 100000);
218 if (ret)
219 dev_err(ssusb->dev, "ip sleep failed!!!\n");
220
221 return ret;
222}
223
224static void ssusb_host_setup(struct ssusb_mtk *ssusb)
225{
226 host_ports_num_get(ssusb);
227
228 /*
229 * power on host and power on/enable all ports
230 * if support OTG, gadget driver will switch port0 to device mode
231 */
232 ssusb_host_enable(ssusb);
233
234 /* if port0 supports dual-role, works as host mode by default */
235 ssusb_set_vbus(&ssusb->otg_switch, 1);
236}
237
238static void ssusb_host_cleanup(struct ssusb_mtk *ssusb)
239{
240 if (ssusb->is_host)
241 ssusb_set_vbus(&ssusb->otg_switch, 0);
242
243 ssusb_host_disable(ssusb, false);
244}
245
246/*
247 * If host supports multiple ports, the VBUSes(5V) of ports except port0
248 * which supports OTG are better to be enabled by default in DTS.
249 * Because the host driver will keep link with devices attached when system
250 * enters suspend mode, so no need to control VBUSes after initialization.
251 */
252int ssusb_host_init(struct ssusb_mtk *ssusb, struct device_node *parent_dn)
253{
254 struct device *parent_dev = ssusb->dev;
255 int ret;
256
257 ssusb_host_setup(ssusb);
258
259 ret = of_platform_populate(parent_dn, NULL, NULL, parent_dev);
260 if (ret) {
261 dev_dbg(parent_dev, "failed to create child devices at %s\n",
262 parent_dn->full_name);
263 return ret;
264 }
265
266 dev_info(parent_dev, "xHCI platform device register success...\n");
267
268 return 0;
269}
270
271void ssusb_host_exit(struct ssusb_mtk *ssusb)
272{
273 of_platform_depopulate(ssusb->dev);
274 ssusb_host_cleanup(ssusb);
275}
276
277int ssusb_wakeup_enable(struct ssusb_mtk *ssusb)
278{
279 int ret = 0;
280
281 if (ssusb->wakeup_en) {
282 ret = ssusb_wakeup_clks_enable(ssusb);
283 ssusb_wakeup_ip_sleep_en(ssusb);
284 }
285 return ret;
286}
287
288void ssusb_wakeup_disable(struct ssusb_mtk *ssusb)
289{
290 if (ssusb->wakeup_en) {
291 ssusb_wakeup_ip_sleep_dis(ssusb);
292 ssusb_wakeup_clks_disable(ssusb);
293 }
294}
diff --git a/drivers/usb/mtu3/mtu3_hw_regs.h b/drivers/usb/mtu3/mtu3_hw_regs.h
new file mode 100644
index 000000000000..212367295276
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_hw_regs.h
@@ -0,0 +1,473 @@
1/*
2 * mtu3_hw_regs.h - MediaTek USB3 DRD register and field definitions
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef _SSUSB_HW_REGS_H_
20#define _SSUSB_HW_REGS_H_
21
22/* segment offset of MAC register */
23#define SSUSB_DEV_BASE 0x0000
24#define SSUSB_EPCTL_CSR_BASE 0x0800
25#define SSUSB_USB3_MAC_CSR_BASE 0x1400
26#define SSUSB_USB3_SYS_CSR_BASE 0x1400
27#define SSUSB_USB2_CSR_BASE 0x2400
28
29/* IPPC register in Infra */
30#define SSUSB_SIFSLV_IPPC_BASE 0x0000
31
32/* --------------- SSUSB_DEV REGISTER DEFINITION --------------- */
33
34#define U3D_LV1ISR (SSUSB_DEV_BASE + 0x0000)
35#define U3D_LV1IER (SSUSB_DEV_BASE + 0x0004)
36#define U3D_LV1IESR (SSUSB_DEV_BASE + 0x0008)
37#define U3D_LV1IECR (SSUSB_DEV_BASE + 0x000C)
38
39#define U3D_EPISR (SSUSB_DEV_BASE + 0x0080)
40#define U3D_EPIER (SSUSB_DEV_BASE + 0x0084)
41#define U3D_EPIESR (SSUSB_DEV_BASE + 0x0088)
42#define U3D_EPIECR (SSUSB_DEV_BASE + 0x008C)
43
44#define U3D_EP0CSR (SSUSB_DEV_BASE + 0x0100)
45#define U3D_RXCOUNT0 (SSUSB_DEV_BASE + 0x0108)
46#define U3D_RESERVED (SSUSB_DEV_BASE + 0x010C)
47#define U3D_TX1CSR0 (SSUSB_DEV_BASE + 0x0110)
48#define U3D_TX1CSR1 (SSUSB_DEV_BASE + 0x0114)
49#define U3D_TX1CSR2 (SSUSB_DEV_BASE + 0x0118)
50
51#define U3D_RX1CSR0 (SSUSB_DEV_BASE + 0x0210)
52#define U3D_RX1CSR1 (SSUSB_DEV_BASE + 0x0214)
53#define U3D_RX1CSR2 (SSUSB_DEV_BASE + 0x0218)
54
55#define U3D_FIFO0 (SSUSB_DEV_BASE + 0x0300)
56
57#define U3D_QCR0 (SSUSB_DEV_BASE + 0x0400)
58#define U3D_QCR1 (SSUSB_DEV_BASE + 0x0404)
59#define U3D_QCR2 (SSUSB_DEV_BASE + 0x0408)
60#define U3D_QCR3 (SSUSB_DEV_BASE + 0x040C)
61
62#define U3D_TXQCSR1 (SSUSB_DEV_BASE + 0x0510)
63#define U3D_TXQSAR1 (SSUSB_DEV_BASE + 0x0514)
64#define U3D_TXQCPR1 (SSUSB_DEV_BASE + 0x0518)
65
66#define U3D_RXQCSR1 (SSUSB_DEV_BASE + 0x0610)
67#define U3D_RXQSAR1 (SSUSB_DEV_BASE + 0x0614)
68#define U3D_RXQCPR1 (SSUSB_DEV_BASE + 0x0618)
69#define U3D_RXQLDPR1 (SSUSB_DEV_BASE + 0x061C)
70
71#define U3D_QISAR0 (SSUSB_DEV_BASE + 0x0700)
72#define U3D_QIER0 (SSUSB_DEV_BASE + 0x0704)
73#define U3D_QIESR0 (SSUSB_DEV_BASE + 0x0708)
74#define U3D_QIECR0 (SSUSB_DEV_BASE + 0x070C)
75#define U3D_QISAR1 (SSUSB_DEV_BASE + 0x0710)
76#define U3D_QIER1 (SSUSB_DEV_BASE + 0x0714)
77#define U3D_QIESR1 (SSUSB_DEV_BASE + 0x0718)
78#define U3D_QIECR1 (SSUSB_DEV_BASE + 0x071C)
79
80#define U3D_TQERRIR0 (SSUSB_DEV_BASE + 0x0780)
81#define U3D_TQERRIER0 (SSUSB_DEV_BASE + 0x0784)
82#define U3D_TQERRIESR0 (SSUSB_DEV_BASE + 0x0788)
83#define U3D_TQERRIECR0 (SSUSB_DEV_BASE + 0x078C)
84#define U3D_RQERRIR0 (SSUSB_DEV_BASE + 0x07C0)
85#define U3D_RQERRIER0 (SSUSB_DEV_BASE + 0x07C4)
86#define U3D_RQERRIESR0 (SSUSB_DEV_BASE + 0x07C8)
87#define U3D_RQERRIECR0 (SSUSB_DEV_BASE + 0x07CC)
88#define U3D_RQERRIR1 (SSUSB_DEV_BASE + 0x07D0)
89#define U3D_RQERRIER1 (SSUSB_DEV_BASE + 0x07D4)
90#define U3D_RQERRIESR1 (SSUSB_DEV_BASE + 0x07D8)
91#define U3D_RQERRIECR1 (SSUSB_DEV_BASE + 0x07DC)
92
93#define U3D_CAP_EP0FFSZ (SSUSB_DEV_BASE + 0x0C04)
94#define U3D_CAP_EPNTXFFSZ (SSUSB_DEV_BASE + 0x0C08)
95#define U3D_CAP_EPNRXFFSZ (SSUSB_DEV_BASE + 0x0C0C)
96#define U3D_CAP_EPINFO (SSUSB_DEV_BASE + 0x0C10)
97#define U3D_MISC_CTRL (SSUSB_DEV_BASE + 0x0C84)
98
99/*---------------- SSUSB_DEV FIELD DEFINITION ---------------*/
100
101/* U3D_LV1ISR */
102#define EP_CTRL_INTR BIT(5)
103#define MAC2_INTR BIT(4)
104#define DMA_INTR BIT(3)
105#define MAC3_INTR BIT(2)
106#define QMU_INTR BIT(1)
107#define BMU_INTR BIT(0)
108
109/* U3D_LV1IECR */
110#define LV1IECR_MSK GENMASK(31, 0)
111
112/* U3D_EPISR */
113#define EPRISR(x) (BIT(16) << (x))
114#define EPTISR(x) (BIT(0) << (x))
115#define EP0ISR BIT(0)
116
117/* U3D_EP0CSR */
118#define EP0_SENDSTALL BIT(25)
119#define EP0_FIFOFULL BIT(23)
120#define EP0_SENTSTALL BIT(22)
121#define EP0_DPHTX BIT(20)
122#define EP0_DATAEND BIT(19)
123#define EP0_TXPKTRDY BIT(18)
124#define EP0_SETUPPKTRDY BIT(17)
125#define EP0_RXPKTRDY BIT(16)
126#define EP0_MAXPKTSZ_MSK GENMASK(9, 0)
127#define EP0_MAXPKTSZ(x) ((x) & EP0_MAXPKTSZ_MSK)
128#define EP0_W1C_BITS (~(EP0_RXPKTRDY | EP0_SETUPPKTRDY | EP0_SENTSTALL))
129
130/* U3D_TX1CSR0 */
131#define TX_DMAREQEN BIT(29)
132#define TX_FIFOFULL BIT(25)
133#define TX_FIFOEMPTY BIT(24)
134#define TX_SENTSTALL BIT(22)
135#define TX_SENDSTALL BIT(21)
136#define TX_TXPKTRDY BIT(16)
137#define TX_TXMAXPKTSZ_MSK GENMASK(10, 0)
138#define TX_TXMAXPKTSZ(x) ((x) & TX_TXMAXPKTSZ_MSK)
139#define TX_W1C_BITS (~(TX_SENTSTALL))
140
141/* U3D_TX1CSR1 */
142#define TX_MULT(x) (((x) & 0x3) << 22)
143#define TX_MAX_PKT(x) (((x) & 0x3f) << 16)
144#define TX_SLOT(x) (((x) & 0x3f) << 8)
145#define TX_TYPE(x) (((x) & 0x3) << 4)
146#define TX_SS_BURST(x) (((x) & 0xf) << 0)
147
148/* for TX_TYPE & RX_TYPE */
149#define TYPE_BULK (0x0)
150#define TYPE_INT (0x1)
151#define TYPE_ISO (0x2)
152#define TYPE_MASK (0x3)
153
154/* U3D_TX1CSR2 */
155#define TX_BINTERVAL(x) (((x) & 0xff) << 24)
156#define TX_FIFOSEGSIZE(x) (((x) & 0xf) << 16)
157#define TX_FIFOADDR(x) (((x) & 0x1fff) << 0)
158
159/* U3D_RX1CSR0 */
160#define RX_DMAREQEN BIT(29)
161#define RX_SENTSTALL BIT(22)
162#define RX_SENDSTALL BIT(21)
163#define RX_RXPKTRDY BIT(16)
164#define RX_RXMAXPKTSZ_MSK GENMASK(10, 0)
165#define RX_RXMAXPKTSZ(x) ((x) & RX_RXMAXPKTSZ_MSK)
166#define RX_W1C_BITS (~(RX_SENTSTALL | RX_RXPKTRDY))
167
168/* U3D_RX1CSR1 */
169#define RX_MULT(x) (((x) & 0x3) << 22)
170#define RX_MAX_PKT(x) (((x) & 0x3f) << 16)
171#define RX_SLOT(x) (((x) & 0x3f) << 8)
172#define RX_TYPE(x) (((x) & 0x3) << 4)
173#define RX_SS_BURST(x) (((x) & 0xf) << 0)
174
175/* U3D_RX1CSR2 */
176#define RX_BINTERVAL(x) (((x) & 0xff) << 24)
177#define RX_FIFOSEGSIZE(x) (((x) & 0xf) << 16)
178#define RX_FIFOADDR(x) (((x) & 0x1fff) << 0)
179
180/* U3D_QCR0 */
181#define QMU_RX_CS_EN(x) (BIT(16) << (x))
182#define QMU_TX_CS_EN(x) (BIT(0) << (x))
183#define QMU_CS16B_EN BIT(0)
184
185/* U3D_QCR1 */
186#define QMU_TX_ZLP(x) (BIT(0) << (x))
187
188/* U3D_QCR3 */
189#define QMU_RX_COZ(x) (BIT(16) << (x))
190#define QMU_RX_ZLP(x) (BIT(0) << (x))
191
192/* U3D_TXQCSR1 */
193/* U3D_RXQCSR1 */
194#define QMU_Q_ACTIVE BIT(15)
195#define QMU_Q_STOP BIT(2)
196#define QMU_Q_RESUME BIT(1)
197#define QMU_Q_START BIT(0)
198
199/* U3D_QISAR0, U3D_QIER0, U3D_QIESR0, U3D_QIECR0 */
200#define QMU_RX_DONE_INT(x) (BIT(16) << (x))
201#define QMU_TX_DONE_INT(x) (BIT(0) << (x))
202
203/* U3D_QISAR1, U3D_QIER1, U3D_QIESR1, U3D_QIECR1 */
204#define RXQ_ZLPERR_INT BIT(20)
205#define RXQ_LENERR_INT BIT(18)
206#define RXQ_CSERR_INT BIT(17)
207#define RXQ_EMPTY_INT BIT(16)
208#define TXQ_LENERR_INT BIT(2)
209#define TXQ_CSERR_INT BIT(1)
210#define TXQ_EMPTY_INT BIT(0)
211
212/* U3D_TQERRIR0, U3D_TQERRIER0, U3D_TQERRIESR0, U3D_TQERRIECR0 */
213#define QMU_TX_LEN_ERR(x) (BIT(16) << (x))
214#define QMU_TX_CS_ERR(x) (BIT(0) << (x))
215
216/* U3D_RQERRIR0, U3D_RQERRIER0, U3D_RQERRIESR0, U3D_RQERRIECR0 */
217#define QMU_RX_LEN_ERR(x) (BIT(16) << (x))
218#define QMU_RX_CS_ERR(x) (BIT(0) << (x))
219
220/* U3D_RQERRIR1, U3D_RQERRIER1, U3D_RQERRIESR1, U3D_RQERRIECR1 */
221#define QMU_RX_ZLP_ERR(n) (BIT(16) << (n))
222
223/* U3D_CAP_EPINFO */
224#define CAP_RX_EP_NUM(x) (((x) >> 8) & 0x1f)
225#define CAP_TX_EP_NUM(x) ((x) & 0x1f)
226
227/* U3D_MISC_CTRL */
228#define VBUS_ON BIT(1)
229#define VBUS_FRC_EN BIT(0)
230
231
232/*---------------- SSUSB_EPCTL_CSR REGISTER DEFINITION ----------------*/
233
234#define U3D_DEVICE_CONF (SSUSB_EPCTL_CSR_BASE + 0x0000)
235#define U3D_EP_RST (SSUSB_EPCTL_CSR_BASE + 0x0004)
236
237#define U3D_DEV_LINK_INTR_ENABLE (SSUSB_EPCTL_CSR_BASE + 0x0050)
238#define U3D_DEV_LINK_INTR (SSUSB_EPCTL_CSR_BASE + 0x0054)
239
240/*---------------- SSUSB_EPCTL_CSR FIELD DEFINITION ----------------*/
241
242/* U3D_DEVICE_CONF */
243#define DEV_ADDR_MSK GENMASK(30, 24)
244#define DEV_ADDR(x) ((0x7f & (x)) << 24)
245#define HW_USB2_3_SEL BIT(18)
246#define SW_USB2_3_SEL_EN BIT(17)
247#define SW_USB2_3_SEL BIT(16)
248#define SSUSB_DEV_SPEED(x) ((x) & 0x7)
249
250/* U3D_EP_RST */
251#define EP1_IN_RST BIT(17)
252#define EP1_OUT_RST BIT(1)
253#define EP_RST(is_in, epnum) (((is_in) ? BIT(16) : BIT(0)) << (epnum))
254#define EP0_RST BIT(0)
255
256/* U3D_DEV_LINK_INTR_ENABLE */
257/* U3D_DEV_LINK_INTR */
258#define SSUSB_DEV_SPEED_CHG_INTR BIT(0)
259
260
261/*---------------- SSUSB_USB3_MAC_CSR REGISTER DEFINITION ----------------*/
262
263#define U3D_LTSSM_CTRL (SSUSB_USB3_MAC_CSR_BASE + 0x0010)
264#define U3D_USB3_CONFIG (SSUSB_USB3_MAC_CSR_BASE + 0x001C)
265
266#define U3D_LTSSM_INTR_ENABLE (SSUSB_USB3_MAC_CSR_BASE + 0x013C)
267#define U3D_LTSSM_INTR (SSUSB_USB3_MAC_CSR_BASE + 0x0140)
268
269/*---------------- SSUSB_USB3_MAC_CSR FIELD DEFINITION ----------------*/
270
271/* U3D_LTSSM_CTRL */
272#define FORCE_POLLING_FAIL BIT(4)
273#define FORCE_RXDETECT_FAIL BIT(3)
274#define SOFT_U3_EXIT_EN BIT(2)
275#define COMPLIANCE_EN BIT(1)
276#define U1_GO_U2_EN BIT(0)
277
278/* U3D_USB3_CONFIG */
279#define USB3_EN BIT(0)
280
281/* U3D_LTSSM_INTR_ENABLE */
282/* U3D_LTSSM_INTR */
283#define U3_RESUME_INTR BIT(18)
284#define U3_LFPS_TMOUT_INTR BIT(17)
285#define VBUS_FALL_INTR BIT(16)
286#define VBUS_RISE_INTR BIT(15)
287#define RXDET_SUCCESS_INTR BIT(14)
288#define EXIT_U3_INTR BIT(13)
289#define EXIT_U2_INTR BIT(12)
290#define EXIT_U1_INTR BIT(11)
291#define ENTER_U3_INTR BIT(10)
292#define ENTER_U2_INTR BIT(9)
293#define ENTER_U1_INTR BIT(8)
294#define ENTER_U0_INTR BIT(7)
295#define RECOVERY_INTR BIT(6)
296#define WARM_RST_INTR BIT(5)
297#define HOT_RST_INTR BIT(4)
298#define LOOPBACK_INTR BIT(3)
299#define COMPLIANCE_INTR BIT(2)
300#define SS_DISABLE_INTR BIT(1)
301#define SS_INACTIVE_INTR BIT(0)
302
303/*---------------- SSUSB_USB3_SYS_CSR REGISTER DEFINITION ----------------*/
304
305#define U3D_LINK_UX_INACT_TIMER (SSUSB_USB3_SYS_CSR_BASE + 0x020C)
306#define U3D_LINK_POWER_CONTROL (SSUSB_USB3_SYS_CSR_BASE + 0x0210)
307#define U3D_LINK_ERR_COUNT (SSUSB_USB3_SYS_CSR_BASE + 0x0214)
308
309/*---------------- SSUSB_USB3_SYS_CSR FIELD DEFINITION ----------------*/
310
311/* U3D_LINK_UX_INACT_TIMER */
312#define DEV_U2_INACT_TIMEOUT_MSK GENMASK(23, 16)
313#define DEV_U2_INACT_TIMEOUT_VALUE(x) (((x) & 0xff) << 16)
314#define U2_INACT_TIMEOUT_MSK GENMASK(15, 8)
315#define U1_INACT_TIMEOUT_MSK GENMASK(7, 0)
316#define U1_INACT_TIMEOUT_VALUE(x) ((x) & 0xff)
317
318/* U3D_LINK_POWER_CONTROL */
319#define SW_U2_ACCEPT_ENABLE BIT(9)
320#define SW_U1_ACCEPT_ENABLE BIT(8)
321#define UX_EXIT BIT(5)
322#define LGO_U3 BIT(4)
323#define LGO_U2 BIT(3)
324#define LGO_U1 BIT(2)
325#define SW_U2_REQUEST_ENABLE BIT(1)
326#define SW_U1_REQUEST_ENABLE BIT(0)
327
328/* U3D_LINK_ERR_COUNT */
329#define CLR_LINK_ERR_CNT BIT(16)
330#define LINK_ERROR_COUNT GENMASK(15, 0)
331
332/*---------------- SSUSB_USB2_CSR REGISTER DEFINITION ----------------*/
333
334#define U3D_POWER_MANAGEMENT (SSUSB_USB2_CSR_BASE + 0x0004)
335#define U3D_DEVICE_CONTROL (SSUSB_USB2_CSR_BASE + 0x000C)
336#define U3D_USB2_TEST_MODE (SSUSB_USB2_CSR_BASE + 0x0014)
337#define U3D_COMMON_USB_INTR_ENABLE (SSUSB_USB2_CSR_BASE + 0x0018)
338#define U3D_COMMON_USB_INTR (SSUSB_USB2_CSR_BASE + 0x001C)
339#define U3D_LINK_RESET_INFO (SSUSB_USB2_CSR_BASE + 0x0024)
340#define U3D_USB20_FRAME_NUM (SSUSB_USB2_CSR_BASE + 0x003C)
341#define U3D_USB20_LPM_PARAMETER (SSUSB_USB2_CSR_BASE + 0x0044)
342#define U3D_USB20_MISC_CONTROL (SSUSB_USB2_CSR_BASE + 0x004C)
343
344/*---------------- SSUSB_USB2_CSR FIELD DEFINITION ----------------*/
345
346/* U3D_POWER_MANAGEMENT */
347#define LPM_BESL_STALL BIT(14)
348#define LPM_BESLD_STALL BIT(13)
349#define LPM_RWP BIT(11)
350#define LPM_HRWE BIT(10)
351#define LPM_MODE(x) (((x) & 0x3) << 8)
352#define ISO_UPDATE BIT(7)
353#define SOFT_CONN BIT(6)
354#define HS_ENABLE BIT(5)
355#define RESUME BIT(2)
356#define SUSPENDM_ENABLE BIT(0)
357
358/* U3D_DEVICE_CONTROL */
359#define DC_HOSTREQ BIT(1)
360#define DC_SESSION BIT(0)
361
362/* U3D_USB2_TEST_MODE */
363#define U2U3_AUTO_SWITCH BIT(10)
364#define LPM_FORCE_STALL BIT(8)
365#define FIFO_ACCESS BIT(6)
366#define FORCE_FS BIT(5)
367#define FORCE_HS BIT(4)
368#define TEST_PACKET_MODE BIT(3)
369#define TEST_K_MODE BIT(2)
370#define TEST_J_MODE BIT(1)
371#define TEST_SE0_NAK_MODE BIT(0)
372
373/* U3D_COMMON_USB_INTR_ENABLE */
374/* U3D_COMMON_USB_INTR */
375#define LPM_RESUME_INTR BIT(9)
376#define LPM_INTR BIT(8)
377#define DISCONN_INTR BIT(5)
378#define CONN_INTR BIT(4)
379#define SOF_INTR BIT(3)
380#define RESET_INTR BIT(2)
381#define RESUME_INTR BIT(1)
382#define SUSPEND_INTR BIT(0)
383
384/* U3D_LINK_RESET_INFO */
385#define WTCHRP_MSK GENMASK(19, 16)
386
387/* U3D_USB20_LPM_PARAMETER */
388#define LPM_BESLCK_U3(x) (((x) & 0xf) << 12)
389#define LPM_BESLCK(x) (((x) & 0xf) << 8)
390#define LPM_BESLDCK(x) (((x) & 0xf) << 4)
391#define LPM_BESL GENMASK(3, 0)
392
393/* U3D_USB20_MISC_CONTROL */
394#define LPM_U3_ACK_EN BIT(0)
395
396/*---------------- SSUSB_SIFSLV_IPPC REGISTER DEFINITION ----------------*/
397
398#define U3D_SSUSB_IP_PW_CTRL0 (SSUSB_SIFSLV_IPPC_BASE + 0x0000)
399#define U3D_SSUSB_IP_PW_CTRL1 (SSUSB_SIFSLV_IPPC_BASE + 0x0004)
400#define U3D_SSUSB_IP_PW_CTRL2 (SSUSB_SIFSLV_IPPC_BASE + 0x0008)
401#define U3D_SSUSB_IP_PW_CTRL3 (SSUSB_SIFSLV_IPPC_BASE + 0x000C)
402#define U3D_SSUSB_IP_PW_STS1 (SSUSB_SIFSLV_IPPC_BASE + 0x0010)
403#define U3D_SSUSB_IP_PW_STS2 (SSUSB_SIFSLV_IPPC_BASE + 0x0014)
404#define U3D_SSUSB_OTG_STS (SSUSB_SIFSLV_IPPC_BASE + 0x0018)
405#define U3D_SSUSB_OTG_STS_CLR (SSUSB_SIFSLV_IPPC_BASE + 0x001C)
406#define U3D_SSUSB_IP_XHCI_CAP (SSUSB_SIFSLV_IPPC_BASE + 0x0024)
407#define U3D_SSUSB_IP_DEV_CAP (SSUSB_SIFSLV_IPPC_BASE + 0x0028)
408#define U3D_SSUSB_OTG_INT_EN (SSUSB_SIFSLV_IPPC_BASE + 0x002C)
409#define U3D_SSUSB_U3_CTRL_0P (SSUSB_SIFSLV_IPPC_BASE + 0x0030)
410#define U3D_SSUSB_U2_CTRL_0P (SSUSB_SIFSLV_IPPC_BASE + 0x0050)
411#define U3D_SSUSB_REF_CK_CTRL (SSUSB_SIFSLV_IPPC_BASE + 0x008C)
412#define U3D_SSUSB_DEV_RST_CTRL (SSUSB_SIFSLV_IPPC_BASE + 0x0098)
413#define U3D_SSUSB_HW_ID (SSUSB_SIFSLV_IPPC_BASE + 0x00A0)
414#define U3D_SSUSB_HW_SUB_ID (SSUSB_SIFSLV_IPPC_BASE + 0x00A4)
415#define U3D_SSUSB_IP_SPARE0 (SSUSB_SIFSLV_IPPC_BASE + 0x00C8)
416
417/*---------------- SSUSB_SIFSLV_IPPC FIELD DEFINITION ----------------*/
418
419/* U3D_SSUSB_IP_PW_CTRL0 */
420#define SSUSB_IP_SW_RST BIT(0)
421
422/* U3D_SSUSB_IP_PW_CTRL1 */
423#define SSUSB_IP_HOST_PDN BIT(0)
424
425/* U3D_SSUSB_IP_PW_CTRL2 */
426#define SSUSB_IP_DEV_PDN BIT(0)
427
428/* U3D_SSUSB_IP_PW_CTRL3 */
429#define SSUSB_IP_PCIE_PDN BIT(0)
430
431/* U3D_SSUSB_IP_PW_STS1 */
432#define SSUSB_IP_SLEEP_STS BIT(30)
433#define SSUSB_U3_MAC_RST_B_STS BIT(16)
434#define SSUSB_XHCI_RST_B_STS BIT(11)
435#define SSUSB_SYS125_RST_B_STS BIT(10)
436#define SSUSB_REF_RST_B_STS BIT(8)
437#define SSUSB_SYSPLL_STABLE BIT(0)
438
439/* U3D_SSUSB_IP_PW_STS2 */
440#define SSUSB_U2_MAC_SYS_RST_B_STS BIT(0)
441
442/* U3D_SSUSB_OTG_STS */
443#define SSUSB_VBUS_VALID BIT(9)
444
445/* U3D_SSUSB_OTG_STS_CLR */
446#define SSUSB_VBUS_INTR_CLR BIT(6)
447
448/* U3D_SSUSB_IP_XHCI_CAP */
449#define SSUSB_IP_XHCI_U2_PORT_NUM(x) (((x) >> 8) & 0xff)
450#define SSUSB_IP_XHCI_U3_PORT_NUM(x) ((x) & 0xff)
451
452/* U3D_SSUSB_IP_DEV_CAP */
453#define SSUSB_IP_DEV_U3_PORT_NUM(x) ((x) & 0xff)
454
455/* U3D_SSUSB_OTG_INT_EN */
456#define SSUSB_VBUS_CHG_INT_A_EN BIT(7)
457#define SSUSB_VBUS_CHG_INT_B_EN BIT(6)
458
459/* U3D_SSUSB_U3_CTRL_0P */
460#define SSUSB_U3_PORT_HOST_SEL BIT(2)
461#define SSUSB_U3_PORT_PDN BIT(1)
462#define SSUSB_U3_PORT_DIS BIT(0)
463
464/* U3D_SSUSB_U2_CTRL_0P */
465#define SSUSB_U2_PORT_OTG_SEL BIT(7)
466#define SSUSB_U2_PORT_HOST_SEL BIT(2)
467#define SSUSB_U2_PORT_PDN BIT(1)
468#define SSUSB_U2_PORT_DIS BIT(0)
469
470/* U3D_SSUSB_DEV_RST_CTRL */
471#define SSUSB_DEV_SW_RST BIT(0)
472
473#endif /* _SSUSB_HW_REGS_H_ */
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
new file mode 100644
index 000000000000..783367805c99
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -0,0 +1,484 @@
1/*
2 * Copyright (C) 2016 MediaTek Inc.
3 *
4 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/clk.h>
18#include <linux/dma-mapping.h>
19#include <linux/iopoll.h>
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/of_address.h>
23#include <linux/of_irq.h>
24#include <linux/pinctrl/consumer.h>
25#include <linux/platform_device.h>
26
27#include "mtu3.h"
28#include "mtu3_dr.h"
29
30/* u2-port0 should be powered on and enabled; */
31int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
32{
33 void __iomem *ibase = ssusb->ippc_base;
34 u32 value, check_val;
35 int ret;
36
37 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
38 SSUSB_REF_RST_B_STS;
39
40 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
41 (check_val == (value & check_val)), 100, 20000);
42 if (ret) {
43 dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
44 return ret;
45 }
46
47 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
48 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
49 if (ret) {
50 dev_err(ssusb->dev, "mac2 clock is not stable\n");
51 return ret;
52 }
53
54 return 0;
55}
56
57static int ssusb_phy_init(struct ssusb_mtk *ssusb)
58{
59 int i;
60 int ret;
61
62 for (i = 0; i < ssusb->num_phys; i++) {
63 ret = phy_init(ssusb->phys[i]);
64 if (ret)
65 goto exit_phy;
66 }
67 return 0;
68
69exit_phy:
70 for (; i > 0; i--)
71 phy_exit(ssusb->phys[i - 1]);
72
73 return ret;
74}
75
76static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
77{
78 int i;
79
80 for (i = 0; i < ssusb->num_phys; i++)
81 phy_exit(ssusb->phys[i]);
82
83 return 0;
84}
85
86static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
87{
88 int i;
89 int ret;
90
91 for (i = 0; i < ssusb->num_phys; i++) {
92 ret = phy_power_on(ssusb->phys[i]);
93 if (ret)
94 goto power_off_phy;
95 }
96 return 0;
97
98power_off_phy:
99 for (; i > 0; i--)
100 phy_power_off(ssusb->phys[i - 1]);
101
102 return ret;
103}
104
105static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
106{
107 unsigned int i;
108
109 for (i = 0; i < ssusb->num_phys; i++)
110 phy_power_off(ssusb->phys[i]);
111}
112
113static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
114{
115 int ret = 0;
116
117 ret = regulator_enable(ssusb->vusb33);
118 if (ret) {
119 dev_err(ssusb->dev, "failed to enable vusb33\n");
120 goto vusb33_err;
121 }
122
123 ret = clk_prepare_enable(ssusb->sys_clk);
124 if (ret) {
125 dev_err(ssusb->dev, "failed to enable sys_clk\n");
126 goto clk_err;
127 }
128
129 ret = ssusb_phy_init(ssusb);
130 if (ret) {
131 dev_err(ssusb->dev, "failed to init phy\n");
132 goto phy_init_err;
133 }
134
135 ret = ssusb_phy_power_on(ssusb);
136 if (ret) {
137 dev_err(ssusb->dev, "failed to power on phy\n");
138 goto phy_err;
139 }
140
141 return 0;
142
143phy_err:
144 ssusb_phy_exit(ssusb);
145phy_init_err:
146 clk_disable_unprepare(ssusb->sys_clk);
147clk_err:
148 regulator_disable(ssusb->vusb33);
149vusb33_err:
150
151 return ret;
152}
153
154static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
155{
156 clk_disable_unprepare(ssusb->sys_clk);
157 regulator_disable(ssusb->vusb33);
158 ssusb_phy_power_off(ssusb);
159 ssusb_phy_exit(ssusb);
160}
161
162static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
163{
164 /* reset whole ip (xhci & u3d) */
165 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
166 udelay(1);
167 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
168}
169
170static int get_iddig_pinctrl(struct ssusb_mtk *ssusb)
171{
172 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
173
174 otg_sx->id_pinctrl = devm_pinctrl_get(ssusb->dev);
175 if (IS_ERR(otg_sx->id_pinctrl)) {
176 dev_err(ssusb->dev, "Cannot find id pinctrl!\n");
177 return PTR_ERR(otg_sx->id_pinctrl);
178 }
179
180 otg_sx->id_float =
181 pinctrl_lookup_state(otg_sx->id_pinctrl, "id_float");
182 if (IS_ERR(otg_sx->id_float)) {
183 dev_err(ssusb->dev, "Cannot find pinctrl id_float!\n");
184 return PTR_ERR(otg_sx->id_float);
185 }
186
187 otg_sx->id_ground =
188 pinctrl_lookup_state(otg_sx->id_pinctrl, "id_ground");
189 if (IS_ERR(otg_sx->id_ground)) {
190 dev_err(ssusb->dev, "Cannot find pinctrl id_ground!\n");
191 return PTR_ERR(otg_sx->id_ground);
192 }
193
194 return 0;
195}
196
197static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
198{
199 struct device_node *node = pdev->dev.of_node;
200 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
201 struct device *dev = &pdev->dev;
202 struct regulator *vbus;
203 struct resource *res;
204 int i;
205 int ret;
206
207 ssusb->num_phys = of_count_phandle_with_args(node,
208 "phys", "#phy-cells");
209 if (ssusb->num_phys > 0) {
210 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
211 sizeof(*ssusb->phys), GFP_KERNEL);
212 if (!ssusb->phys)
213 return -ENOMEM;
214 } else {
215 ssusb->num_phys = 0;
216 }
217
218 for (i = 0; i < ssusb->num_phys; i++) {
219 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
220 if (IS_ERR(ssusb->phys[i])) {
221 dev_err(dev, "failed to get phy-%d\n", i);
222 return PTR_ERR(ssusb->phys[i]);
223 }
224 }
225
226 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
227 ssusb->ippc_base = devm_ioremap_resource(dev, res);
228 if (IS_ERR(ssusb->ippc_base)) {
229 dev_err(dev, "failed to map memory for ippc\n");
230 return PTR_ERR(ssusb->ippc_base);
231 }
232
233 ssusb->vusb33 = devm_regulator_get(&pdev->dev, "vusb33");
234 if (IS_ERR(ssusb->vusb33)) {
235 dev_err(dev, "failed to get vusb33\n");
236 return PTR_ERR(ssusb->vusb33);
237 }
238
239 ssusb->sys_clk = devm_clk_get(dev, "sys_ck");
240 if (IS_ERR(ssusb->sys_clk)) {
241 dev_err(dev, "failed to get sys clock\n");
242 return PTR_ERR(ssusb->sys_clk);
243 }
244
245 ssusb->dr_mode = usb_get_dr_mode(dev);
246 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN) {
247 dev_err(dev, "dr_mode is error\n");
248 return -EINVAL;
249 }
250
251 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
252 return 0;
253
254 /* if host role is supported */
255 ret = ssusb_wakeup_of_property_parse(ssusb, node);
256 if (ret)
257 return ret;
258
259 if (ssusb->dr_mode != USB_DR_MODE_OTG)
260 return 0;
261
262 /* if dual-role mode is supported */
263 vbus = devm_regulator_get(&pdev->dev, "vbus");
264 if (IS_ERR(vbus)) {
265 dev_err(dev, "failed to get vbus\n");
266 return PTR_ERR(vbus);
267 }
268 otg_sx->vbus = vbus;
269
270 otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
271 otg_sx->manual_drd_enabled =
272 of_property_read_bool(node, "enable-manual-drd");
273
274 if (of_property_read_bool(node, "extcon")) {
275 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
276 if (IS_ERR(otg_sx->edev)) {
277 dev_err(ssusb->dev, "couldn't get extcon device\n");
278 return -EPROBE_DEFER;
279 }
280 if (otg_sx->manual_drd_enabled) {
281 ret = get_iddig_pinctrl(ssusb);
282 if (ret)
283 return ret;
284 }
285 }
286
287 dev_info(dev, "dr_mode: %d, is_u3_dr: %d\n",
288 ssusb->dr_mode, otg_sx->is_u3_drd);
289
290 return 0;
291}
292
293static int mtu3_probe(struct platform_device *pdev)
294{
295 struct device_node *node = pdev->dev.of_node;
296 struct device *dev = &pdev->dev;
297 struct ssusb_mtk *ssusb;
298 int ret = -ENOMEM;
299
300 /* all elements are set to ZERO as default value */
301 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
302 if (!ssusb)
303 return -ENOMEM;
304
305 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
306 if (ret) {
307 dev_err(dev, "No suitable DMA config available\n");
308 return -ENOTSUPP;
309 }
310
311 platform_set_drvdata(pdev, ssusb);
312 ssusb->dev = dev;
313
314 ret = get_ssusb_rscs(pdev, ssusb);
315 if (ret)
316 return ret;
317
318 /* enable power domain */
319 pm_runtime_enable(dev);
320 pm_runtime_get_sync(dev);
321 device_enable_async_suspend(dev);
322
323 ret = ssusb_rscs_init(ssusb);
324 if (ret)
325 goto comm_init_err;
326
327 ssusb_ip_sw_reset(ssusb);
328
329 if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
330 ssusb->dr_mode = USB_DR_MODE_HOST;
331 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
332 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
333
334 /* default as host */
335 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
336
337 switch (ssusb->dr_mode) {
338 case USB_DR_MODE_PERIPHERAL:
339 ret = ssusb_gadget_init(ssusb);
340 if (ret) {
341 dev_err(dev, "failed to initialize gadget\n");
342 goto comm_exit;
343 }
344 break;
345 case USB_DR_MODE_HOST:
346 ret = ssusb_host_init(ssusb, node);
347 if (ret) {
348 dev_err(dev, "failed to initialize host\n");
349 goto comm_exit;
350 }
351 break;
352 case USB_DR_MODE_OTG:
353 ret = ssusb_gadget_init(ssusb);
354 if (ret) {
355 dev_err(dev, "failed to initialize gadget\n");
356 goto comm_exit;
357 }
358
359 ret = ssusb_host_init(ssusb, node);
360 if (ret) {
361 dev_err(dev, "failed to initialize host\n");
362 goto gadget_exit;
363 }
364
365 ssusb_otg_switch_init(ssusb);
366 break;
367 default:
368 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
369 ret = -EINVAL;
370 goto comm_exit;
371 }
372
373 return 0;
374
375gadget_exit:
376 ssusb_gadget_exit(ssusb);
377comm_exit:
378 ssusb_rscs_exit(ssusb);
379comm_init_err:
380 pm_runtime_put_sync(dev);
381 pm_runtime_disable(dev);
382
383 return ret;
384}
385
386static int mtu3_remove(struct platform_device *pdev)
387{
388 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
389
390 switch (ssusb->dr_mode) {
391 case USB_DR_MODE_PERIPHERAL:
392 ssusb_gadget_exit(ssusb);
393 break;
394 case USB_DR_MODE_HOST:
395 ssusb_host_exit(ssusb);
396 break;
397 case USB_DR_MODE_OTG:
398 ssusb_otg_switch_exit(ssusb);
399 ssusb_gadget_exit(ssusb);
400 ssusb_host_exit(ssusb);
401 break;
402 default:
403 return -EINVAL;
404 }
405
406 ssusb_rscs_exit(ssusb);
407 pm_runtime_put_sync(&pdev->dev);
408 pm_runtime_disable(&pdev->dev);
409
410 return 0;
411}
412
413/*
414 * when support dual-role mode, we reject suspend when
415 * it works as device mode;
416 */
417static int __maybe_unused mtu3_suspend(struct device *dev)
418{
419 struct platform_device *pdev = to_platform_device(dev);
420 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
421
422 dev_dbg(dev, "%s\n", __func__);
423
424 /* REVISIT: disconnect it for only device mode? */
425 if (!ssusb->is_host)
426 return 0;
427
428 ssusb_host_disable(ssusb, true);
429 ssusb_phy_power_off(ssusb);
430 clk_disable_unprepare(ssusb->sys_clk);
431 ssusb_wakeup_enable(ssusb);
432
433 return 0;
434}
435
436static int __maybe_unused mtu3_resume(struct device *dev)
437{
438 struct platform_device *pdev = to_platform_device(dev);
439 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
440
441 dev_dbg(dev, "%s\n", __func__);
442
443 if (!ssusb->is_host)
444 return 0;
445
446 ssusb_wakeup_disable(ssusb);
447 clk_prepare_enable(ssusb->sys_clk);
448 ssusb_phy_power_on(ssusb);
449 ssusb_host_enable(ssusb);
450
451 return 0;
452}
453
454static const struct dev_pm_ops mtu3_pm_ops = {
455 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
456};
457
458#define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
459
460#ifdef CONFIG_OF
461
462static const struct of_device_id mtu3_of_match[] = {
463 {.compatible = "mediatek,mt8173-mtu3",},
464 {},
465};
466
467MODULE_DEVICE_TABLE(of, mtu3_of_match);
468
469#endif
470
471static struct platform_driver mtu3_driver = {
472 .probe = mtu3_probe,
473 .remove = mtu3_remove,
474 .driver = {
475 .name = MTU3_DRIVER_NAME,
476 .pm = DEV_PM_OPS,
477 .of_match_table = of_match_ptr(mtu3_of_match),
478 },
479};
480module_platform_driver(mtu3_driver);
481
482MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
483MODULE_LICENSE("GPL v2");
484MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");
diff --git a/drivers/usb/mtu3/mtu3_qmu.c b/drivers/usb/mtu3/mtu3_qmu.c
new file mode 100644
index 000000000000..7d9ba8a52368
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_qmu.c
@@ -0,0 +1,573 @@
1/*
2 * mtu3_qmu.c - Queue Management Unit driver for device controller
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19/*
20 * Queue Management Unit (QMU) is designed to unload SW effort
21 * to serve DMA interrupts.
22 * By preparing General Purpose Descriptor (GPD) and Buffer Descriptor (BD),
23 * SW links data buffers and triggers QMU to send / receive data to
24 * host / from device at a time.
25 * And now only GPD is supported.
26 *
27 * For more detailed information, please refer to QMU Programming Guide
28 */
29
30#include <linux/dmapool.h>
31#include <linux/iopoll.h>
32
33#include "mtu3.h"
34
35#define QMU_CHECKSUM_LEN 16
36
37#define GPD_FLAGS_HWO BIT(0)
38#define GPD_FLAGS_BDP BIT(1)
39#define GPD_FLAGS_BPS BIT(2)
40#define GPD_FLAGS_IOC BIT(7)
41
42#define GPD_EXT_FLAG_ZLP BIT(5)
43
44
45static struct qmu_gpd *gpd_dma_to_virt(struct mtu3_gpd_ring *ring,
46 dma_addr_t dma_addr)
47{
48 dma_addr_t dma_base = ring->dma;
49 struct qmu_gpd *gpd_head = ring->start;
50 u32 offset = (dma_addr - dma_base) / sizeof(*gpd_head);
51
52 if (offset >= MAX_GPD_NUM)
53 return NULL;
54
55 return gpd_head + offset;
56}
57
58static dma_addr_t gpd_virt_to_dma(struct mtu3_gpd_ring *ring,
59 struct qmu_gpd *gpd)
60{
61 dma_addr_t dma_base = ring->dma;
62 struct qmu_gpd *gpd_head = ring->start;
63 u32 offset;
64
65 offset = gpd - gpd_head;
66 if (offset >= MAX_GPD_NUM)
67 return 0;
68
69 return dma_base + (offset * sizeof(*gpd));
70}
71
72static void gpd_ring_init(struct mtu3_gpd_ring *ring, struct qmu_gpd *gpd)
73{
74 ring->start = gpd;
75 ring->enqueue = gpd;
76 ring->dequeue = gpd;
77 ring->end = gpd + MAX_GPD_NUM - 1;
78}
79
80static void reset_gpd_list(struct mtu3_ep *mep)
81{
82 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
83 struct qmu_gpd *gpd = ring->start;
84
85 if (gpd) {
86 gpd->flag &= ~GPD_FLAGS_HWO;
87 gpd_ring_init(ring, gpd);
88 }
89}
90
91int mtu3_gpd_ring_alloc(struct mtu3_ep *mep)
92{
93 struct qmu_gpd *gpd;
94 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
95
96 /* software own all gpds as default */
97 gpd = dma_pool_zalloc(mep->mtu->qmu_gpd_pool, GFP_ATOMIC, &ring->dma);
98 if (gpd == NULL)
99 return -ENOMEM;
100
101 gpd_ring_init(ring, gpd);
102
103 return 0;
104}
105
106void mtu3_gpd_ring_free(struct mtu3_ep *mep)
107{
108 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
109
110 dma_pool_free(mep->mtu->qmu_gpd_pool,
111 ring->start, ring->dma);
112 memset(ring, 0, sizeof(*ring));
113}
114
115/*
116 * calculate check sum of a gpd or bd
117 * add "noinline" and "mb" to prevent wrong calculation
118 */
119static noinline u8 qmu_calc_checksum(u8 *data)
120{
121 u8 chksum = 0;
122 int i;
123
124 data[1] = 0x0; /* set checksum to 0 */
125
126 mb(); /* ensure the gpd/bd is really up-to-date */
127 for (i = 0; i < QMU_CHECKSUM_LEN; i++)
128 chksum += data[i];
129
130 /* Default: HWO=1, @flag[bit0] */
131 chksum += 1;
132
133 return 0xFF - chksum;
134}
135
136void mtu3_qmu_resume(struct mtu3_ep *mep)
137{
138 struct mtu3 *mtu = mep->mtu;
139 void __iomem *mbase = mtu->mac_base;
140 int epnum = mep->epnum;
141 u32 offset;
142
143 offset = mep->is_in ? USB_QMU_TQCSR(epnum) : USB_QMU_RQCSR(epnum);
144
145 mtu3_writel(mbase, offset, QMU_Q_RESUME);
146 if (!(mtu3_readl(mbase, offset) & QMU_Q_ACTIVE))
147 mtu3_writel(mbase, offset, QMU_Q_RESUME);
148}
149
150static struct qmu_gpd *advance_enq_gpd(struct mtu3_gpd_ring *ring)
151{
152 if (ring->enqueue < ring->end)
153 ring->enqueue++;
154 else
155 ring->enqueue = ring->start;
156
157 return ring->enqueue;
158}
159
160static struct qmu_gpd *advance_deq_gpd(struct mtu3_gpd_ring *ring)
161{
162 if (ring->dequeue < ring->end)
163 ring->dequeue++;
164 else
165 ring->dequeue = ring->start;
166
167 return ring->dequeue;
168}
169
170/* check if a ring is emtpy */
171static int gpd_ring_empty(struct mtu3_gpd_ring *ring)
172{
173 struct qmu_gpd *enq = ring->enqueue;
174 struct qmu_gpd *next;
175
176 if (ring->enqueue < ring->end)
177 next = enq + 1;
178 else
179 next = ring->start;
180
181 /* one gpd is reserved to simplify gpd preparation */
182 return next == ring->dequeue;
183}
184
185int mtu3_prepare_transfer(struct mtu3_ep *mep)
186{
187 return gpd_ring_empty(&mep->gpd_ring);
188}
189
190static int mtu3_prepare_tx_gpd(struct mtu3_ep *mep, struct mtu3_request *mreq)
191{
192 struct qmu_gpd *enq;
193 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
194 struct qmu_gpd *gpd = ring->enqueue;
195 struct usb_request *req = &mreq->request;
196
197 /* set all fields to zero as default value */
198 memset(gpd, 0, sizeof(*gpd));
199
200 gpd->buffer = cpu_to_le32((u32)req->dma);
201 gpd->buf_len = cpu_to_le16(req->length);
202 gpd->flag |= GPD_FLAGS_IOC;
203
204 /* get the next GPD */
205 enq = advance_enq_gpd(ring);
206 dev_dbg(mep->mtu->dev, "TX-EP%d queue gpd=%p, enq=%p\n",
207 mep->epnum, gpd, enq);
208
209 enq->flag &= ~GPD_FLAGS_HWO;
210 gpd->next_gpd = cpu_to_le32((u32)gpd_virt_to_dma(ring, enq));
211
212 if (req->zero)
213 gpd->ext_flag |= GPD_EXT_FLAG_ZLP;
214
215 gpd->chksum = qmu_calc_checksum((u8 *)gpd);
216 gpd->flag |= GPD_FLAGS_HWO;
217
218 mreq->gpd = gpd;
219
220 return 0;
221}
222
223static int mtu3_prepare_rx_gpd(struct mtu3_ep *mep, struct mtu3_request *mreq)
224{
225 struct qmu_gpd *enq;
226 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
227 struct qmu_gpd *gpd = ring->enqueue;
228 struct usb_request *req = &mreq->request;
229
230 /* set all fields to zero as default value */
231 memset(gpd, 0, sizeof(*gpd));
232
233 gpd->buffer = cpu_to_le32((u32)req->dma);
234 gpd->data_buf_len = cpu_to_le16(req->length);
235 gpd->flag |= GPD_FLAGS_IOC;
236
237 /* get the next GPD */
238 enq = advance_enq_gpd(ring);
239 dev_dbg(mep->mtu->dev, "RX-EP%d queue gpd=%p, enq=%p\n",
240 mep->epnum, gpd, enq);
241
242 enq->flag &= ~GPD_FLAGS_HWO;
243 gpd->next_gpd = cpu_to_le32((u32)gpd_virt_to_dma(ring, enq));
244 gpd->chksum = qmu_calc_checksum((u8 *)gpd);
245 gpd->flag |= GPD_FLAGS_HWO;
246
247 mreq->gpd = gpd;
248
249 return 0;
250}
251
252void mtu3_insert_gpd(struct mtu3_ep *mep, struct mtu3_request *mreq)
253{
254
255 if (mep->is_in)
256 mtu3_prepare_tx_gpd(mep, mreq);
257 else
258 mtu3_prepare_rx_gpd(mep, mreq);
259}
260
261int mtu3_qmu_start(struct mtu3_ep *mep)
262{
263 struct mtu3 *mtu = mep->mtu;
264 void __iomem *mbase = mtu->mac_base;
265 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
266 u8 epnum = mep->epnum;
267
268 if (mep->is_in) {
269 /* set QMU start address */
270 mtu3_writel(mbase, USB_QMU_TQSAR(mep->epnum), ring->dma);
271 mtu3_setbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_DMAREQEN);
272 mtu3_setbits(mbase, U3D_QCR0, QMU_TX_CS_EN(epnum));
273 /* send zero length packet according to ZLP flag in GPD */
274 mtu3_setbits(mbase, U3D_QCR1, QMU_TX_ZLP(epnum));
275 mtu3_writel(mbase, U3D_TQERRIESR0,
276 QMU_TX_LEN_ERR(epnum) | QMU_TX_CS_ERR(epnum));
277
278 if (mtu3_readl(mbase, USB_QMU_TQCSR(epnum)) & QMU_Q_ACTIVE) {
279 dev_warn(mtu->dev, "Tx %d Active Now!\n", epnum);
280 return 0;
281 }
282 mtu3_writel(mbase, USB_QMU_TQCSR(epnum), QMU_Q_START);
283
284 } else {
285 mtu3_writel(mbase, USB_QMU_RQSAR(mep->epnum), ring->dma);
286 mtu3_setbits(mbase, MU3D_EP_RXCR0(mep->epnum), RX_DMAREQEN);
287 mtu3_setbits(mbase, U3D_QCR0, QMU_RX_CS_EN(epnum));
288 /* don't expect ZLP */
289 mtu3_clrbits(mbase, U3D_QCR3, QMU_RX_ZLP(epnum));
290 /* move to next GPD when receive ZLP */
291 mtu3_setbits(mbase, U3D_QCR3, QMU_RX_COZ(epnum));
292 mtu3_writel(mbase, U3D_RQERRIESR0,
293 QMU_RX_LEN_ERR(epnum) | QMU_RX_CS_ERR(epnum));
294 mtu3_writel(mbase, U3D_RQERRIESR1, QMU_RX_ZLP_ERR(epnum));
295
296 if (mtu3_readl(mbase, USB_QMU_RQCSR(epnum)) & QMU_Q_ACTIVE) {
297 dev_warn(mtu->dev, "Rx %d Active Now!\n", epnum);
298 return 0;
299 }
300 mtu3_writel(mbase, USB_QMU_RQCSR(epnum), QMU_Q_START);
301 }
302
303 return 0;
304}
305
306/* may called in atomic context */
307void mtu3_qmu_stop(struct mtu3_ep *mep)
308{
309 struct mtu3 *mtu = mep->mtu;
310 void __iomem *mbase = mtu->mac_base;
311 int epnum = mep->epnum;
312 u32 value = 0;
313 u32 qcsr;
314 int ret;
315
316 qcsr = mep->is_in ? USB_QMU_TQCSR(epnum) : USB_QMU_RQCSR(epnum);
317
318 if (!(mtu3_readl(mbase, qcsr) & QMU_Q_ACTIVE)) {
319 dev_dbg(mtu->dev, "%s's qmu is inactive now!\n", mep->name);
320 return;
321 }
322 mtu3_writel(mbase, qcsr, QMU_Q_STOP);
323
324 ret = readl_poll_timeout_atomic(mbase + qcsr, value,
325 !(value & QMU_Q_ACTIVE), 1, 1000);
326 if (ret) {
327 dev_err(mtu->dev, "stop %s's qmu failed\n", mep->name);
328 return;
329 }
330
331 dev_dbg(mtu->dev, "%s's qmu stop now!\n", mep->name);
332}
333
334void mtu3_qmu_flush(struct mtu3_ep *mep)
335{
336
337 dev_dbg(mep->mtu->dev, "%s flush QMU %s\n", __func__,
338 ((mep->is_in) ? "TX" : "RX"));
339
340 /*Stop QMU */
341 mtu3_qmu_stop(mep);
342 reset_gpd_list(mep);
343}
344
345/*
346 * QMU can't transfer zero length packet directly (a hardware limit
347 * on old SoCs), so when needs to send ZLP, we intentionally trigger
348 * a length error interrupt, and in the ISR sends a ZLP by BMU.
349 */
350static void qmu_tx_zlp_error_handler(struct mtu3 *mtu, u8 epnum)
351{
352 struct mtu3_ep *mep = mtu->in_eps + epnum;
353 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
354 void __iomem *mbase = mtu->mac_base;
355 struct qmu_gpd *gpd_current = NULL;
356 dma_addr_t gpd_dma = mtu3_readl(mbase, USB_QMU_TQCPR(epnum));
357 struct usb_request *req = NULL;
358 struct mtu3_request *mreq;
359 u32 txcsr = 0;
360 int ret;
361
362 mreq = next_request(mep);
363 if (mreq && mreq->request.length == 0)
364 req = &mreq->request;
365 else
366 return;
367
368 gpd_current = gpd_dma_to_virt(ring, gpd_dma);
369
370 if (le16_to_cpu(gpd_current->buf_len) != 0) {
371 dev_err(mtu->dev, "TX EP%d buffer length error(!=0)\n", epnum);
372 return;
373 }
374
375 dev_dbg(mtu->dev, "%s send ZLP for req=%p\n", __func__, mreq);
376
377 mtu3_clrbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_DMAREQEN);
378
379 ret = readl_poll_timeout_atomic(mbase + MU3D_EP_TXCR0(mep->epnum),
380 txcsr, !(txcsr & TX_FIFOFULL), 1, 1000);
381 if (ret) {
382 dev_err(mtu->dev, "%s wait for fifo empty fail\n", __func__);
383 return;
384 }
385 mtu3_setbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_TXPKTRDY);
386
387 /* by pass the current GDP */
388 gpd_current->flag |= GPD_FLAGS_BPS;
389 gpd_current->chksum = qmu_calc_checksum((u8 *)gpd_current);
390 gpd_current->flag |= GPD_FLAGS_HWO;
391
392 /*enable DMAREQEN, switch back to QMU mode */
393 mtu3_setbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_DMAREQEN);
394 mtu3_qmu_resume(mep);
395}
396
397/*
398 * NOTE: request list maybe is already empty as following case:
399 * queue_tx --> qmu_interrupt(clear interrupt pending, schedule tasklet)-->
400 * queue_tx --> process_tasklet(meanwhile, the second one is transferred,
401 * tasklet process both of them)-->qmu_interrupt for second one.
402 * To avoid upper case, put qmu_done_tx in ISR directly to process it.
403 */
404static void qmu_done_tx(struct mtu3 *mtu, u8 epnum)
405{
406 struct mtu3_ep *mep = mtu->in_eps + epnum;
407 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
408 void __iomem *mbase = mtu->mac_base;
409 struct qmu_gpd *gpd = ring->dequeue;
410 struct qmu_gpd *gpd_current = NULL;
411 dma_addr_t gpd_dma = mtu3_readl(mbase, USB_QMU_TQCPR(epnum));
412 struct usb_request *request = NULL;
413 struct mtu3_request *mreq;
414
415 /*transfer phy address got from QMU register to virtual address */
416 gpd_current = gpd_dma_to_virt(ring, gpd_dma);
417
418 dev_dbg(mtu->dev, "%s EP%d, last=%p, current=%p, enq=%p\n",
419 __func__, epnum, gpd, gpd_current, ring->enqueue);
420
421 while (gpd != gpd_current && !(gpd->flag & GPD_FLAGS_HWO)) {
422
423 mreq = next_request(mep);
424
425 if (mreq == NULL || mreq->gpd != gpd) {
426 dev_err(mtu->dev, "no correct TX req is found\n");
427 break;
428 }
429
430 request = &mreq->request;
431 request->actual = le16_to_cpu(gpd->buf_len);
432 mtu3_req_complete(mep, request, 0);
433
434 gpd = advance_deq_gpd(ring);
435 }
436
437 dev_dbg(mtu->dev, "%s EP%d, deq=%p, enq=%p, complete\n",
438 __func__, epnum, ring->dequeue, ring->enqueue);
439
440}
441
442static void qmu_done_rx(struct mtu3 *mtu, u8 epnum)
443{
444 struct mtu3_ep *mep = mtu->out_eps + epnum;
445 struct mtu3_gpd_ring *ring = &mep->gpd_ring;
446 void __iomem *mbase = mtu->mac_base;
447 struct qmu_gpd *gpd = ring->dequeue;
448 struct qmu_gpd *gpd_current = NULL;
449 dma_addr_t gpd_dma = mtu3_readl(mbase, USB_QMU_RQCPR(epnum));
450 struct usb_request *req = NULL;
451 struct mtu3_request *mreq;
452
453 gpd_current = gpd_dma_to_virt(ring, gpd_dma);
454
455 dev_dbg(mtu->dev, "%s EP%d, last=%p, current=%p, enq=%p\n",
456 __func__, epnum, gpd, gpd_current, ring->enqueue);
457
458 while (gpd != gpd_current && !(gpd->flag & GPD_FLAGS_HWO)) {
459
460 mreq = next_request(mep);
461
462 if (mreq == NULL || mreq->gpd != gpd) {
463 dev_err(mtu->dev, "no correct RX req is found\n");
464 break;
465 }
466 req = &mreq->request;
467
468 req->actual = le16_to_cpu(gpd->buf_len);
469 mtu3_req_complete(mep, req, 0);
470
471 gpd = advance_deq_gpd(ring);
472 }
473
474 dev_dbg(mtu->dev, "%s EP%d, deq=%p, enq=%p, complete\n",
475 __func__, epnum, ring->dequeue, ring->enqueue);
476}
477
478static void qmu_done_isr(struct mtu3 *mtu, u32 done_status)
479{
480 int i;
481
482 for (i = 1; i < mtu->num_eps; i++) {
483 if (done_status & QMU_RX_DONE_INT(i))
484 qmu_done_rx(mtu, i);
485 if (done_status & QMU_TX_DONE_INT(i))
486 qmu_done_tx(mtu, i);
487 }
488}
489
490static void qmu_exception_isr(struct mtu3 *mtu, u32 qmu_status)
491{
492 void __iomem *mbase = mtu->mac_base;
493 u32 errval;
494 int i;
495
496 if ((qmu_status & RXQ_CSERR_INT) || (qmu_status & RXQ_LENERR_INT)) {
497 errval = mtu3_readl(mbase, U3D_RQERRIR0);
498 for (i = 1; i < mtu->num_eps; i++) {
499 if (errval & QMU_RX_CS_ERR(i))
500 dev_err(mtu->dev, "Rx %d CS error!\n", i);
501
502 if (errval & QMU_RX_LEN_ERR(i))
503 dev_err(mtu->dev, "RX %d Length error\n", i);
504 }
505 mtu3_writel(mbase, U3D_RQERRIR0, errval);
506 }
507
508 if (qmu_status & RXQ_ZLPERR_INT) {
509 errval = mtu3_readl(mbase, U3D_RQERRIR1);
510 for (i = 1; i < mtu->num_eps; i++) {
511 if (errval & QMU_RX_ZLP_ERR(i))
512 dev_dbg(mtu->dev, "RX EP%d Recv ZLP\n", i);
513 }
514 mtu3_writel(mbase, U3D_RQERRIR1, errval);
515 }
516
517 if ((qmu_status & TXQ_CSERR_INT) || (qmu_status & TXQ_LENERR_INT)) {
518 errval = mtu3_readl(mbase, U3D_TQERRIR0);
519 for (i = 1; i < mtu->num_eps; i++) {
520 if (errval & QMU_TX_CS_ERR(i))
521 dev_err(mtu->dev, "Tx %d checksum error!\n", i);
522
523 if (errval & QMU_TX_LEN_ERR(i))
524 qmu_tx_zlp_error_handler(mtu, i);
525 }
526 mtu3_writel(mbase, U3D_TQERRIR0, errval);
527 }
528}
529
530irqreturn_t mtu3_qmu_isr(struct mtu3 *mtu)
531{
532 void __iomem *mbase = mtu->mac_base;
533 u32 qmu_status;
534 u32 qmu_done_status;
535
536 /* U3D_QISAR1 is read update */
537 qmu_status = mtu3_readl(mbase, U3D_QISAR1);
538 qmu_status &= mtu3_readl(mbase, U3D_QIER1);
539
540 qmu_done_status = mtu3_readl(mbase, U3D_QISAR0);
541 qmu_done_status &= mtu3_readl(mbase, U3D_QIER0);
542 mtu3_writel(mbase, U3D_QISAR0, qmu_done_status); /* W1C */
543 dev_dbg(mtu->dev, "=== QMUdone[tx=%x, rx=%x] QMUexp[%x] ===\n",
544 (qmu_done_status & 0xFFFF), qmu_done_status >> 16,
545 qmu_status);
546
547 if (qmu_done_status)
548 qmu_done_isr(mtu, qmu_done_status);
549
550 if (qmu_status)
551 qmu_exception_isr(mtu, qmu_status);
552
553 return IRQ_HANDLED;
554}
555
556int mtu3_qmu_init(struct mtu3 *mtu)
557{
558
559 compiletime_assert(QMU_GPD_SIZE == 16, "QMU_GPD size SHOULD be 16B");
560
561 mtu->qmu_gpd_pool = dma_pool_create("QMU_GPD", mtu->dev,
562 QMU_GPD_RING_SIZE, QMU_GPD_SIZE, 0);
563
564 if (!mtu->qmu_gpd_pool)
565 return -ENOMEM;
566
567 return 0;
568}
569
570void mtu3_qmu_exit(struct mtu3 *mtu)
571{
572 dma_pool_destroy(mtu->qmu_gpd_pool);
573}
diff --git a/drivers/usb/mtu3/mtu3_qmu.h b/drivers/usb/mtu3/mtu3_qmu.h
new file mode 100644
index 000000000000..4dafa16bf120
--- /dev/null
+++ b/drivers/usb/mtu3/mtu3_qmu.h
@@ -0,0 +1,43 @@
1/*
2 * mtu3_qmu.h - Queue Management Unit driver header
3 *
4 * Copyright (C) 2016 MediaTek Inc.
5 *
6 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __MTK_QMU_H__
20#define __MTK_QMU_H__
21
22#define MAX_GPD_NUM 64
23#define QMU_GPD_SIZE (sizeof(struct qmu_gpd))
24#define QMU_GPD_RING_SIZE (MAX_GPD_NUM * QMU_GPD_SIZE)
25
26#define GPD_BUF_SIZE 65532
27
28void mtu3_qmu_stop(struct mtu3_ep *mep);
29int mtu3_qmu_start(struct mtu3_ep *mep);
30void mtu3_qmu_resume(struct mtu3_ep *mep);
31void mtu3_qmu_flush(struct mtu3_ep *mep);
32
33void mtu3_insert_gpd(struct mtu3_ep *mep, struct mtu3_request *mreq);
34int mtu3_prepare_transfer(struct mtu3_ep *mep);
35
36int mtu3_gpd_ring_alloc(struct mtu3_ep *mep);
37void mtu3_gpd_ring_free(struct mtu3_ep *mep);
38
39irqreturn_t mtu3_qmu_isr(struct mtu3 *mtu);
40int mtu3_qmu_init(struct mtu3 *mtu);
41void mtu3_qmu_exit(struct mtu3 *mtu);
42
43#endif
diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index 2440f88e07a3..e89708d839e5 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
@@ -6,6 +6,9 @@
6 * Based on the DaVinci "glue layer" code. 6 * Based on the DaVinci "glue layer" code.
7 * Copyright (C) 2005-2006 by Texas Instruments 7 * Copyright (C) 2005-2006 by Texas Instruments
8 * 8 *
9 * DT support
10 * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
11 *
9 * This file is part of the Inventra Controller Driver for Linux. 12 * This file is part of the Inventra Controller Driver for Linux.
10 * 13 *
11 * The Inventra Controller Driver for Linux is free software; you 14 * The Inventra Controller Driver for Linux is free software; you
@@ -340,6 +343,13 @@ static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
340 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent); 343 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
341 enum phy_mode phy_mode; 344 enum phy_mode phy_mode;
342 345
346 /*
347 * The PHY has some issues when it is forced in device or host mode.
348 * Unless the user request another mode, configure the PHY in OTG mode.
349 */
350 if (!musb->is_initialized)
351 return phy_set_mode(glue->phy, PHY_MODE_USB_OTG);
352
343 switch (musb_mode) { 353 switch (musb_mode) {
344 case MUSB_HOST: /* Force VBUS valid, ID = 0 */ 354 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
345 phy_mode = PHY_MODE_USB_HOST; 355 phy_mode = PHY_MODE_USB_HOST;
@@ -366,6 +376,12 @@ static int da8xx_musb_init(struct musb *musb)
366 376
367 musb->mregs += DA8XX_MENTOR_CORE_OFFSET; 377 musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
368 378
379 ret = clk_prepare_enable(glue->clk);
380 if (ret) {
381 dev_err(glue->dev, "failed to enable clock\n");
382 return ret;
383 }
384
369 /* Returns zero if e.g. not clocked */ 385 /* Returns zero if e.g. not clocked */
370 rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG); 386 rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
371 if (!rev) 387 if (!rev)
@@ -377,12 +393,6 @@ static int da8xx_musb_init(struct musb *musb)
377 goto fail; 393 goto fail;
378 } 394 }
379 395
380 ret = clk_prepare_enable(glue->clk);
381 if (ret) {
382 dev_err(glue->dev, "failed to enable clock\n");
383 goto fail;
384 }
385
386 setup_timer(&otg_workaround, otg_timer, (unsigned long)musb); 396 setup_timer(&otg_workaround, otg_timer, (unsigned long)musb);
387 397
388 /* Reset the controller */ 398 /* Reset the controller */
@@ -392,7 +402,7 @@ static int da8xx_musb_init(struct musb *musb)
392 ret = phy_init(glue->phy); 402 ret = phy_init(glue->phy);
393 if (ret) { 403 if (ret) {
394 dev_err(glue->dev, "Failed to init phy.\n"); 404 dev_err(glue->dev, "Failed to init phy.\n");
395 goto err_phy_init; 405 goto fail;
396 } 406 }
397 407
398 ret = phy_power_on(glue->phy); 408 ret = phy_power_on(glue->phy);
@@ -412,9 +422,8 @@ static int da8xx_musb_init(struct musb *musb)
412 422
413err_phy_power_on: 423err_phy_power_on:
414 phy_exit(glue->phy); 424 phy_exit(glue->phy);
415err_phy_init:
416 clk_disable_unprepare(glue->clk);
417fail: 425fail:
426 clk_disable_unprepare(glue->clk);
418 return ret; 427 return ret;
419} 428}
420 429
@@ -433,6 +442,21 @@ static int da8xx_musb_exit(struct musb *musb)
433 return 0; 442 return 0;
434} 443}
435 444
445static inline u8 get_vbus_power(struct device *dev)
446{
447 struct regulator *vbus_supply;
448 int current_uA;
449
450 vbus_supply = regulator_get_optional(dev, "vbus");
451 if (IS_ERR(vbus_supply))
452 return 255;
453 current_uA = regulator_get_current_limit(vbus_supply);
454 regulator_put(vbus_supply);
455 if (current_uA <= 0 || current_uA > 510000)
456 return 255;
457 return current_uA / 1000 / 2;
458}
459
436static const struct musb_platform_ops da8xx_ops = { 460static const struct musb_platform_ops da8xx_ops = {
437 .quirks = MUSB_DMA_CPPI | MUSB_INDEXED_EP, 461 .quirks = MUSB_DMA_CPPI | MUSB_INDEXED_EP,
438 .init = da8xx_musb_init, 462 .init = da8xx_musb_init,
@@ -458,6 +482,12 @@ static const struct platform_device_info da8xx_dev_info = {
458 .dma_mask = DMA_BIT_MASK(32), 482 .dma_mask = DMA_BIT_MASK(32),
459}; 483};
460 484
485static const struct musb_hdrc_config da8xx_config = {
486 .ram_bits = 10,
487 .num_eps = 5,
488 .multipoint = 1,
489};
490
461static int da8xx_probe(struct platform_device *pdev) 491static int da8xx_probe(struct platform_device *pdev)
462{ 492{
463 struct resource musb_resources[2]; 493 struct resource musb_resources[2];
@@ -465,6 +495,7 @@ static int da8xx_probe(struct platform_device *pdev)
465 struct da8xx_glue *glue; 495 struct da8xx_glue *glue;
466 struct platform_device_info pinfo; 496 struct platform_device_info pinfo;
467 struct clk *clk; 497 struct clk *clk;
498 struct device_node *np = pdev->dev.of_node;
468 int ret; 499 int ret;
469 500
470 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 501 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
@@ -487,6 +518,16 @@ static int da8xx_probe(struct platform_device *pdev)
487 glue->dev = &pdev->dev; 518 glue->dev = &pdev->dev;
488 glue->clk = clk; 519 glue->clk = clk;
489 520
521 if (IS_ENABLED(CONFIG_OF) && np) {
522 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
523 if (!pdata)
524 return -ENOMEM;
525
526 pdata->config = &da8xx_config;
527 pdata->mode = musb_get_mode(&pdev->dev);
528 pdata->power = get_vbus_power(&pdev->dev);
529 }
530
490 pdata->platform_ops = &da8xx_ops; 531 pdata->platform_ops = &da8xx_ops;
491 532
492 glue->usb_phy = usb_phy_generic_register(); 533 glue->usb_phy = usb_phy_generic_register();
@@ -537,11 +578,22 @@ static int da8xx_remove(struct platform_device *pdev)
537 return 0; 578 return 0;
538} 579}
539 580
581#ifdef CONFIG_OF
582static const struct of_device_id da8xx_id_table[] = {
583 {
584 .compatible = "ti,da830-musb",
585 },
586 {},
587};
588MODULE_DEVICE_TABLE(of, da8xx_id_table);
589#endif
590
540static struct platform_driver da8xx_driver = { 591static struct platform_driver da8xx_driver = {
541 .probe = da8xx_probe, 592 .probe = da8xx_probe,
542 .remove = da8xx_remove, 593 .remove = da8xx_remove,
543 .driver = { 594 .driver = {
544 .name = "musb-da8xx", 595 .name = "musb-da8xx",
596 .of_match_table = of_match_ptr(da8xx_id_table),
545 }, 597 },
546}; 598};
547 599
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index c3e172e15ec3..9e226468a13e 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -100,6 +100,7 @@
100#include <linux/io.h> 100#include <linux/io.h>
101#include <linux/dma-mapping.h> 101#include <linux/dma-mapping.h>
102#include <linux/usb.h> 102#include <linux/usb.h>
103#include <linux/usb/of.h>
103 104
104#include "musb_core.h" 105#include "musb_core.h"
105#include "musb_trace.h" 106#include "musb_trace.h"
@@ -130,6 +131,24 @@ static inline struct musb *dev_to_musb(struct device *dev)
130 return dev_get_drvdata(dev); 131 return dev_get_drvdata(dev);
131} 132}
132 133
134enum musb_mode musb_get_mode(struct device *dev)
135{
136 enum usb_dr_mode mode;
137
138 mode = usb_get_dr_mode(dev);
139 switch (mode) {
140 case USB_DR_MODE_HOST:
141 return MUSB_HOST;
142 case USB_DR_MODE_PERIPHERAL:
143 return MUSB_PERIPHERAL;
144 case USB_DR_MODE_OTG:
145 case USB_DR_MODE_UNKNOWN:
146 default:
147 return MUSB_OTG;
148 }
149}
150EXPORT_SYMBOL_GPL(musb_get_mode);
151
133/*-------------------------------------------------------------------------*/ 152/*-------------------------------------------------------------------------*/
134 153
135#ifndef CONFIG_BLACKFIN 154#ifndef CONFIG_BLACKFIN
@@ -569,10 +588,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
569 if (devctl & MUSB_DEVCTL_HM) { 588 if (devctl & MUSB_DEVCTL_HM) {
570 switch (musb->xceiv->otg->state) { 589 switch (musb->xceiv->otg->state) {
571 case OTG_STATE_A_SUSPEND: 590 case OTG_STATE_A_SUSPEND:
572 /* remote wakeup? later, GetPortStatus 591 /* remote wakeup? */
573 * will stop RESUME signaling
574 */
575
576 musb->port1_status |= 592 musb->port1_status |=
577 (USB_PORT_STAT_C_SUSPEND << 16) 593 (USB_PORT_STAT_C_SUSPEND << 16)
578 | MUSB_PORT_STAT_RESUME; 594 | MUSB_PORT_STAT_RESUME;
@@ -2414,8 +2430,9 @@ fail2:
2414 musb_platform_exit(musb); 2430 musb_platform_exit(musb);
2415 2431
2416fail1: 2432fail1:
2417 dev_err(musb->controller, 2433 if (status != -EPROBE_DEFER)
2418 "musb_init_controller failed with status %d\n", status); 2434 dev_err(musb->controller,
2435 "%s failed with status %d\n", __func__, status);
2419 2436
2420 musb_free(musb); 2437 musb_free(musb);
2421 2438
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 91817d77d59c..a611e2f67bdc 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -626,4 +626,10 @@ static inline void musb_platform_post_root_reset_end(struct musb *musb)
626 musb->ops->post_root_reset_end(musb); 626 musb->ops->post_root_reset_end(musb);
627} 627}
628 628
629/*
630 * gets the "dr_mode" property from DT and converts it into musb_mode
631 * if the property is not found or not recognized returns MUSB_OTG
632 */
633extern enum musb_mode musb_get_mode(struct device *dev);
634
629#endif /* __MUSB_CORE_H__ */ 635#endif /* __MUSB_CORE_H__ */
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index a55173c9e564..1acc4864f9f6 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -974,8 +974,8 @@ static int musb_gadget_enable(struct usb_ep *ep,
974 goto fail; 974 goto fail;
975 975
976 /* REVISIT this rules out high bandwidth periodic transfers */ 976 /* REVISIT this rules out high bandwidth periodic transfers */
977 tmp = usb_endpoint_maxp(desc); 977 tmp = usb_endpoint_maxp_mult(desc) - 1;
978 if (tmp & ~0x07ff) { 978 if (tmp) {
979 int ok; 979 int ok;
980 980
981 if (usb_endpoint_dir_in(desc)) 981 if (usb_endpoint_dir_in(desc))
@@ -987,12 +987,12 @@ static int musb_gadget_enable(struct usb_ep *ep,
987 musb_dbg(musb, "no support for high bandwidth ISO"); 987 musb_dbg(musb, "no support for high bandwidth ISO");
988 goto fail; 988 goto fail;
989 } 989 }
990 musb_ep->hb_mult = (tmp >> 11) & 3; 990 musb_ep->hb_mult = tmp;
991 } else { 991 } else {
992 musb_ep->hb_mult = 0; 992 musb_ep->hb_mult = 0;
993 } 993 }
994 994
995 musb_ep->packet_sz = tmp & 0x7ff; 995 musb_ep->packet_sz = usb_endpoint_maxp(desc);
996 tmp = musb_ep->packet_sz * (musb_ep->hb_mult + 1); 996 tmp = musb_ep->packet_sz * (musb_ep->hb_mult + 1);
997 997
998 /* enable the interrupts for the endpoint, set the endpoint 998 /* enable the interrupts for the endpoint, set the endpoint
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 53bc4ceefe89..f6cdbad00dac 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -2237,7 +2237,7 @@ static int musb_urb_enqueue(
2237 * Some musb cores don't support high bandwidth ISO transfers; and 2237 * Some musb cores don't support high bandwidth ISO transfers; and
2238 * we don't (yet!) support high bandwidth interrupt transfers. 2238 * we don't (yet!) support high bandwidth interrupt transfers.
2239 */ 2239 */
2240 qh->hb_mult = 1 + ((qh->maxpacket >> 11) & 0x03); 2240 qh->hb_mult = usb_endpoint_maxp_mult(epd);
2241 if (qh->hb_mult > 1) { 2241 if (qh->hb_mult > 1) {
2242 int ok = (qh->type == USB_ENDPOINT_XFER_ISOC); 2242 int ok = (qh->type == USB_ENDPOINT_XFER_ISOC);
2243 2243
diff --git a/drivers/usb/musb/musb_virthub.c b/drivers/usb/musb/musb_virthub.c
index 61b5f1c3c5bc..0b4595439d51 100644
--- a/drivers/usb/musb/musb_virthub.c
+++ b/drivers/usb/musb/musb_virthub.c
@@ -132,7 +132,6 @@ void musb_port_suspend(struct musb *musb, bool do_suspend)
132 132
133 musb_dbg(musb, "Root port resuming, power %02x", power); 133 musb_dbg(musb, "Root port resuming, power %02x", power);
134 134
135 /* later, GetPortStatus will stop RESUME signaling */
136 musb->port1_status |= MUSB_PORT_STAT_RESUME; 135 musb->port1_status |= MUSB_PORT_STAT_RESUME;
137 schedule_delayed_work(&musb->finish_resume_work, 136 schedule_delayed_work(&musb->finish_resume_work,
138 msecs_to_jiffies(USB_RESUME_TIMEOUT)); 137 msecs_to_jiffies(USB_RESUME_TIMEOUT));
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index e8be8e39ab8f..8b73214a9ea3 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -277,12 +277,12 @@ static int omap2430_musb_init(struct musb *musb)
277 if (status == -ENXIO) 277 if (status == -ENXIO)
278 return status; 278 return status;
279 279
280 pr_err("HS USB OTG: no transceiver configured\n"); 280 dev_dbg(dev, "HS USB OTG: no transceiver configured\n");
281 return -EPROBE_DEFER; 281 return -EPROBE_DEFER;
282 } 282 }
283 283
284 if (IS_ERR(musb->phy)) { 284 if (IS_ERR(musb->phy)) {
285 pr_err("HS USB OTG: no PHY configured\n"); 285 dev_err(dev, "HS USB OTG: no PHY configured\n");
286 return PTR_ERR(musb->phy); 286 return PTR_ERR(musb->phy);
287 } 287 }
288 musb->isr = omap2430_musb_interrupt; 288 musb->isr = omap2430_musb_interrupt;
@@ -301,7 +301,7 @@ static int omap2430_musb_init(struct musb *musb)
301 301
302 musb_writel(musb->mregs, OTG_INTERFSEL, l); 302 musb_writel(musb->mregs, OTG_INTERFSEL, l);
303 303
304 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, " 304 dev_dbg(dev, "HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
305 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n", 305 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
306 musb_readl(musb->mregs, OTG_REVISION), 306 musb_readl(musb->mregs, OTG_REVISION),
307 musb_readl(musb->mregs, OTG_SYSCONFIG), 307 musb_readl(musb->mregs, OTG_SYSCONFIG),
diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c
index 1408245be18e..d0be0eadd0d9 100644
--- a/drivers/usb/musb/sunxi.c
+++ b/drivers/usb/musb/sunxi.c
@@ -186,16 +186,6 @@ static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
186 if (musb->int_usb) 186 if (musb->int_usb)
187 writeb(musb->int_usb, musb->mregs + SUNXI_MUSB_INTRUSB); 187 writeb(musb->int_usb, musb->mregs + SUNXI_MUSB_INTRUSB);
188 188
189 /*
190 * sunxi musb often signals babble on low / full speed device
191 * disconnect, without ever raising MUSB_INTR_DISCONNECT, since
192 * normally babble never happens treat it as disconnect.
193 */
194 if ((musb->int_usb & MUSB_INTR_BABBLE) && is_host_active(musb)) {
195 musb->int_usb &= ~MUSB_INTR_BABBLE;
196 musb->int_usb |= MUSB_INTR_DISCONNECT;
197 }
198
199 if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) { 189 if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) {
200 /* ep0 FADDR must be 0 when (re)entering peripheral mode */ 190 /* ep0 FADDR must be 0 when (re)entering peripheral mode */
201 musb_ep_select(musb->mregs, 0); 191 musb_ep_select(musb->mregs, 0);
@@ -390,6 +380,20 @@ static int sunxi_musb_set_mode(struct musb *musb, u8 mode)
390 return 0; 380 return 0;
391} 381}
392 382
383static int sunxi_musb_recover(struct musb *musb)
384{
385 struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent);
386
387 /*
388 * Schedule a phy_set_mode with the current glue->phy_mode value,
389 * this will force end the current session.
390 */
391 set_bit(SUNXI_MUSB_FL_PHY_MODE_PEND, &glue->flags);
392 schedule_work(&glue->work);
393
394 return 0;
395}
396
393/* 397/*
394 * sunxi musb register layout 398 * sunxi musb register layout
395 * 0x00 - 0x17 fifo regs, 1 long per fifo 399 * 0x00 - 0x17 fifo regs, 1 long per fifo
@@ -618,6 +622,7 @@ static const struct musb_platform_ops sunxi_musb_ops = {
618 .dma_init = sunxi_musb_dma_controller_create, 622 .dma_init = sunxi_musb_dma_controller_create,
619 .dma_exit = sunxi_musb_dma_controller_destroy, 623 .dma_exit = sunxi_musb_dma_controller_destroy,
620 .set_mode = sunxi_musb_set_mode, 624 .set_mode = sunxi_musb_set_mode,
625 .recover = sunxi_musb_recover,
621 .set_vbus = sunxi_musb_set_vbus, 626 .set_vbus = sunxi_musb_set_vbus,
622 .pre_root_reset_end = sunxi_musb_pre_root_reset_end, 627 .pre_root_reset_end = sunxi_musb_pre_root_reset_end,
623 .post_root_reset_end = sunxi_musb_post_root_reset_end, 628 .post_root_reset_end = sunxi_musb_post_root_reset_end,
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index b9c409a18faa..61cef7511a50 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -84,6 +84,7 @@ config SAMSUNG_USBPHY
84config TWL6030_USB 84config TWL6030_USB
85 tristate "TWL6030 USB Transceiver Driver" 85 tristate "TWL6030 USB Transceiver Driver"
86 depends on TWL4030_CORE && OMAP_USB2 && USB_MUSB_OMAP2PLUS 86 depends on TWL4030_CORE && OMAP_USB2 && USB_MUSB_OMAP2PLUS
87 depends on OF
87 help 88 help
88 Enable this to support the USB OTG transceiver on TWL6030 89 Enable this to support the USB OTG transceiver on TWL6030
89 family chips. This TWL6030 transceiver has the VBUS and ID GND 90 family chips. This TWL6030 transceiver has the VBUS and ID GND
diff --git a/drivers/usb/phy/phy-am335x-control.c b/drivers/usb/phy/phy-am335x-control.c
index 42a1afe36a90..5f5f19813fde 100644
--- a/drivers/usb/phy/phy-am335x-control.c
+++ b/drivers/usb/phy/phy-am335x-control.c
@@ -134,10 +134,12 @@ struct phy_control *am335x_get_phy_control(struct device *dev)
134 return NULL; 134 return NULL;
135 135
136 dev = bus_find_device(&platform_bus_type, NULL, node, match); 136 dev = bus_find_device(&platform_bus_type, NULL, node, match);
137 of_node_put(node);
137 if (!dev) 138 if (!dev)
138 return NULL; 139 return NULL;
139 140
140 ctrl_usb = dev_get_drvdata(dev); 141 ctrl_usb = dev_get_drvdata(dev);
142 put_device(dev);
141 if (!ctrl_usb) 143 if (!ctrl_usb)
142 return NULL; 144 return NULL;
143 return &ctrl_usb->phy_ctrl; 145 return &ctrl_usb->phy_ctrl;
diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
index 8311ba2968cd..89d6e7a5fdb7 100644
--- a/drivers/usb/phy/phy-generic.c
+++ b/drivers/usb/phy/phy-generic.c
@@ -59,6 +59,15 @@ EXPORT_SYMBOL_GPL(usb_phy_generic_unregister);
59 59
60static int nop_set_suspend(struct usb_phy *x, int suspend) 60static int nop_set_suspend(struct usb_phy *x, int suspend)
61{ 61{
62 struct usb_phy_generic *nop = dev_get_drvdata(x->dev);
63
64 if (!IS_ERR(nop->clk)) {
65 if (suspend)
66 clk_disable_unprepare(nop->clk);
67 else
68 clk_prepare_enable(nop->clk);
69 }
70
62 return 0; 71 return 0;
63} 72}
64 73
diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c
index 8d111ec653e4..042c5a8fd423 100644
--- a/drivers/usb/phy/phy-isp1301-omap.c
+++ b/drivers/usb/phy/phy-isp1301-omap.c
@@ -94,7 +94,7 @@ struct isp1301 {
94 94
95#if defined(CONFIG_MACH_OMAP_H2) || defined(CONFIG_MACH_OMAP_H3) 95#if defined(CONFIG_MACH_OMAP_H2) || defined(CONFIG_MACH_OMAP_H3)
96 96
97#if defined(CONFIG_TPS65010) || (defined(CONFIG_TPS65010_MODULE) && defined(MODULE)) 97#if IS_REACHABLE(CONFIG_TPS65010)
98 98
99#include <linux/i2c/tps65010.h> 99#include <linux/i2c/tps65010.h>
100 100
diff --git a/drivers/usb/phy/phy-twl6030-usb.c b/drivers/usb/phy/phy-twl6030-usb.c
index a72e8d670adc..628b600b02b1 100644
--- a/drivers/usb/phy/phy-twl6030-usb.c
+++ b/drivers/usb/phy/phy-twl6030-usb.c
@@ -108,7 +108,6 @@ struct twl6030_usb {
108 enum musb_vbus_id_status linkstat; 108 enum musb_vbus_id_status linkstat;
109 u8 asleep; 109 u8 asleep;
110 bool vbus_enable; 110 bool vbus_enable;
111 const char *regulator;
112}; 111};
113 112
114#define comparator_to_twl(x) container_of((x), struct twl6030_usb, comparator) 113#define comparator_to_twl(x) container_of((x), struct twl6030_usb, comparator)
@@ -166,7 +165,7 @@ static int twl6030_usb_ldo_init(struct twl6030_usb *twl)
166 /* Program MISC2 register and set bit VUSB_IN_VBAT */ 165 /* Program MISC2 register and set bit VUSB_IN_VBAT */
167 twl6030_writeb(twl, TWL6030_MODULE_ID0, 0x10, TWL6030_MISC2); 166 twl6030_writeb(twl, TWL6030_MODULE_ID0, 0x10, TWL6030_MISC2);
168 167
169 twl->usb3v3 = regulator_get(twl->dev, twl->regulator); 168 twl->usb3v3 = regulator_get(twl->dev, "usb");
170 if (IS_ERR(twl->usb3v3)) 169 if (IS_ERR(twl->usb3v3))
171 return -ENODEV; 170 return -ENODEV;
172 171
@@ -341,7 +340,11 @@ static int twl6030_usb_probe(struct platform_device *pdev)
341 int status, err; 340 int status, err;
342 struct device_node *np = pdev->dev.of_node; 341 struct device_node *np = pdev->dev.of_node;
343 struct device *dev = &pdev->dev; 342 struct device *dev = &pdev->dev;
344 struct twl4030_usb_data *pdata = dev_get_platdata(dev); 343
344 if (!np) {
345 dev_err(dev, "no DT info\n");
346 return -EINVAL;
347 }
345 348
346 twl = devm_kzalloc(dev, sizeof(*twl), GFP_KERNEL); 349 twl = devm_kzalloc(dev, sizeof(*twl), GFP_KERNEL);
347 if (!twl) 350 if (!twl)
@@ -361,18 +364,6 @@ static int twl6030_usb_probe(struct platform_device *pdev)
361 return -EPROBE_DEFER; 364 return -EPROBE_DEFER;
362 } 365 }
363 366
364 if (np) {
365 twl->regulator = "usb";
366 } else if (pdata) {
367 if (pdata->features & TWL6032_SUBCLASS)
368 twl->regulator = "ldousb";
369 else
370 twl->regulator = "vusb";
371 } else {
372 dev_err(&pdev->dev, "twl6030 initialized without pdata\n");
373 return -EINVAL;
374 }
375
376 /* init spinlock for workqueue */ 367 /* init spinlock for workqueue */
377 spin_lock_init(&twl->lock); 368 spin_lock_init(&twl->lock);
378 369
@@ -436,13 +427,11 @@ static int twl6030_usb_remove(struct platform_device *pdev)
436 return 0; 427 return 0;
437} 428}
438 429
439#ifdef CONFIG_OF
440static const struct of_device_id twl6030_usb_id_table[] = { 430static const struct of_device_id twl6030_usb_id_table[] = {
441 { .compatible = "ti,twl6030-usb" }, 431 { .compatible = "ti,twl6030-usb" },
442 {} 432 {}
443}; 433};
444MODULE_DEVICE_TABLE(of, twl6030_usb_id_table); 434MODULE_DEVICE_TABLE(of, twl6030_usb_id_table);
445#endif
446 435
447static struct platform_driver twl6030_usb_driver = { 436static struct platform_driver twl6030_usb_driver = {
448 .probe = twl6030_usb_probe, 437 .probe = twl6030_usb_probe,
diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
index 857e78337324..d1af831f43eb 100644
--- a/drivers/usb/renesas_usbhs/fifo.c
+++ b/drivers/usb/renesas_usbhs/fifo.c
@@ -100,10 +100,7 @@ static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
100 100
101static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) 101static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
102{ 102{
103 if (list_empty(&pipe->list)) 103 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
104 return NULL;
105
106 return list_first_entry(&pipe->list, struct usbhs_pkt, node);
107} 104}
108 105
109static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, 106static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
diff --git a/drivers/usb/serial/Kconfig b/drivers/usb/serial/Kconfig
index 56ecb8b5115d..d9bc8dafe000 100644
--- a/drivers/usb/serial/Kconfig
+++ b/drivers/usb/serial/Kconfig
@@ -255,6 +255,16 @@ config USB_SERIAL_F81232
255 To compile this driver as a module, choose M here: the 255 To compile this driver as a module, choose M here: the
256 module will be called f81232. 256 module will be called f81232.
257 257
258config USB_SERIAL_F8153X
259 tristate "USB Fintek F81532/534 Multi-Ports Serial Driver"
260 help
261 Say Y here if you want to use the Fintek F81532/534 Multi-Ports
262 USB to serial adapter.
263
264 To compile this driver as a module, choose M here: the
265 module will be called f81534.
266
267
258config USB_SERIAL_GARMIN 268config USB_SERIAL_GARMIN
259 tristate "USB Garmin GPS driver" 269 tristate "USB Garmin GPS driver"
260 help 270 help
diff --git a/drivers/usb/serial/Makefile b/drivers/usb/serial/Makefile
index 349d9df0895f..9e43b7b002eb 100644
--- a/drivers/usb/serial/Makefile
+++ b/drivers/usb/serial/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_USB_SERIAL_EDGEPORT) += io_edgeport.o
23obj-$(CONFIG_USB_SERIAL_EDGEPORT_TI) += io_ti.o 23obj-$(CONFIG_USB_SERIAL_EDGEPORT_TI) += io_ti.o
24obj-$(CONFIG_USB_SERIAL_EMPEG) += empeg.o 24obj-$(CONFIG_USB_SERIAL_EMPEG) += empeg.o
25obj-$(CONFIG_USB_SERIAL_F81232) += f81232.o 25obj-$(CONFIG_USB_SERIAL_F81232) += f81232.o
26obj-$(CONFIG_USB_SERIAL_F8153X) += f81534.o
26obj-$(CONFIG_USB_SERIAL_FTDI_SIO) += ftdi_sio.o 27obj-$(CONFIG_USB_SERIAL_FTDI_SIO) += ftdi_sio.o
27obj-$(CONFIG_USB_SERIAL_GARMIN) += garmin_gps.o 28obj-$(CONFIG_USB_SERIAL_GARMIN) += garmin_gps.o
28obj-$(CONFIG_USB_SERIAL_IPAQ) += ipaq.o 29obj-$(CONFIG_USB_SERIAL_IPAQ) += ipaq.o
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index f139488d0816..2597b83a8ae2 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -61,13 +61,26 @@
61 * the Net/FreeBSD uchcom.c driver by Takanori Watanabe. Domo arigato. 61 * the Net/FreeBSD uchcom.c driver by Takanori Watanabe. Domo arigato.
62 */ 62 */
63 63
64#define CH341_REQ_READ_VERSION 0x5F
64#define CH341_REQ_WRITE_REG 0x9A 65#define CH341_REQ_WRITE_REG 0x9A
65#define CH341_REQ_READ_REG 0x95 66#define CH341_REQ_READ_REG 0x95
66#define CH341_REG_BREAK1 0x05 67#define CH341_REQ_SERIAL_INIT 0xA1
67#define CH341_REG_BREAK2 0x18 68#define CH341_REQ_MODEM_CTRL 0xA4
68#define CH341_NBREAK_BITS_REG1 0x01 69
69#define CH341_NBREAK_BITS_REG2 0x40 70#define CH341_REG_BREAK 0x05
70 71#define CH341_REG_LCR 0x18
72#define CH341_NBREAK_BITS 0x01
73
74#define CH341_LCR_ENABLE_RX 0x80
75#define CH341_LCR_ENABLE_TX 0x40
76#define CH341_LCR_MARK_SPACE 0x20
77#define CH341_LCR_PAR_EVEN 0x10
78#define CH341_LCR_ENABLE_PAR 0x08
79#define CH341_LCR_STOP_BITS_2 0x04
80#define CH341_LCR_CS8 0x03
81#define CH341_LCR_CS7 0x02
82#define CH341_LCR_CS6 0x01
83#define CH341_LCR_CS5 0x00
71 84
72static const struct usb_device_id id_table[] = { 85static const struct usb_device_id id_table[] = {
73 { USB_DEVICE(0x4348, 0x5523) }, 86 { USB_DEVICE(0x4348, 0x5523) },
@@ -119,10 +132,10 @@ static int ch341_control_in(struct usb_device *dev,
119 return r; 132 return r;
120} 133}
121 134
122static int ch341_set_baudrate(struct usb_device *dev, 135static int ch341_init_set_baudrate(struct usb_device *dev,
123 struct ch341_private *priv) 136 struct ch341_private *priv, unsigned ctrl)
124{ 137{
125 short a, b; 138 short a;
126 int r; 139 int r;
127 unsigned long factor; 140 unsigned long factor;
128 short divisor; 141 short divisor;
@@ -142,18 +155,17 @@ static int ch341_set_baudrate(struct usb_device *dev,
142 155
143 factor = 0x10000 - factor; 156 factor = 0x10000 - factor;
144 a = (factor & 0xff00) | divisor; 157 a = (factor & 0xff00) | divisor;
145 b = factor & 0xff;
146 158
147 r = ch341_control_out(dev, 0x9a, 0x1312, a); 159 /* 0x9c is "enable SFR_UART Control register and timer" */
148 if (!r) 160 r = ch341_control_out(dev, CH341_REQ_SERIAL_INIT,
149 r = ch341_control_out(dev, 0x9a, 0x0f2c, b); 161 0x9c | (ctrl << 8), a | 0x80);
150 162
151 return r; 163 return r;
152} 164}
153 165
154static int ch341_set_handshake(struct usb_device *dev, u8 control) 166static int ch341_set_handshake(struct usb_device *dev, u8 control)
155{ 167{
156 return ch341_control_out(dev, 0xa4, ~control, 0); 168 return ch341_control_out(dev, CH341_REQ_MODEM_CTRL, ~control, 0);
157} 169}
158 170
159static int ch341_get_status(struct usb_device *dev, struct ch341_private *priv) 171static int ch341_get_status(struct usb_device *dev, struct ch341_private *priv)
@@ -167,7 +179,7 @@ static int ch341_get_status(struct usb_device *dev, struct ch341_private *priv)
167 if (!buffer) 179 if (!buffer)
168 return -ENOMEM; 180 return -ENOMEM;
169 181
170 r = ch341_control_in(dev, 0x95, 0x0706, 0, buffer, size); 182 r = ch341_control_in(dev, CH341_REQ_READ_REG, 0x0706, 0, buffer, size);
171 if (r < 0) 183 if (r < 0)
172 goto out; 184 goto out;
173 185
@@ -197,24 +209,21 @@ static int ch341_configure(struct usb_device *dev, struct ch341_private *priv)
197 return -ENOMEM; 209 return -ENOMEM;
198 210
199 /* expect two bytes 0x27 0x00 */ 211 /* expect two bytes 0x27 0x00 */
200 r = ch341_control_in(dev, 0x5f, 0, 0, buffer, size); 212 r = ch341_control_in(dev, CH341_REQ_READ_VERSION, 0, 0, buffer, size);
201 if (r < 0) 213 if (r < 0)
202 goto out; 214 goto out;
215 dev_dbg(&dev->dev, "Chip version: 0x%02x\n", buffer[0]);
203 216
204 r = ch341_control_out(dev, 0xa1, 0, 0); 217 r = ch341_control_out(dev, CH341_REQ_SERIAL_INIT, 0, 0);
205 if (r < 0)
206 goto out;
207
208 r = ch341_set_baudrate(dev, priv);
209 if (r < 0) 218 if (r < 0)
210 goto out; 219 goto out;
211 220
212 /* expect two bytes 0x56 0x00 */ 221 /* expect two bytes 0x56 0x00 */
213 r = ch341_control_in(dev, 0x95, 0x2518, 0, buffer, size); 222 r = ch341_control_in(dev, CH341_REQ_READ_REG, 0x2518, 0, buffer, size);
214 if (r < 0) 223 if (r < 0)
215 goto out; 224 goto out;
216 225
217 r = ch341_control_out(dev, 0x9a, 0x2518, 0x0050); 226 r = ch341_control_out(dev, CH341_REQ_WRITE_REG, 0x2518, 0x0050);
218 if (r < 0) 227 if (r < 0)
219 goto out; 228 goto out;
220 229
@@ -223,11 +232,7 @@ static int ch341_configure(struct usb_device *dev, struct ch341_private *priv)
223 if (r < 0) 232 if (r < 0)
224 goto out; 233 goto out;
225 234
226 r = ch341_control_out(dev, 0xa1, 0x501f, 0xd90a); 235 r = ch341_init_set_baudrate(dev, priv, 0);
227 if (r < 0)
228 goto out;
229
230 r = ch341_set_baudrate(dev, priv);
231 if (r < 0) 236 if (r < 0)
232 goto out; 237 goto out;
233 238
@@ -342,16 +347,53 @@ static void ch341_set_termios(struct tty_struct *tty,
342 struct ch341_private *priv = usb_get_serial_port_data(port); 347 struct ch341_private *priv = usb_get_serial_port_data(port);
343 unsigned baud_rate; 348 unsigned baud_rate;
344 unsigned long flags; 349 unsigned long flags;
350 unsigned char ctrl;
351 int r;
352
353 /* redundant changes may cause the chip to lose bytes */
354 if (old_termios && !tty_termios_hw_change(&tty->termios, old_termios))
355 return;
345 356
346 baud_rate = tty_get_baud_rate(tty); 357 baud_rate = tty_get_baud_rate(tty);
347 358
348 priv->baud_rate = baud_rate; 359 priv->baud_rate = baud_rate;
360 ctrl = CH341_LCR_ENABLE_RX | CH341_LCR_ENABLE_TX;
361
362 switch (C_CSIZE(tty)) {
363 case CS5:
364 ctrl |= CH341_LCR_CS5;
365 break;
366 case CS6:
367 ctrl |= CH341_LCR_CS6;
368 break;
369 case CS7:
370 ctrl |= CH341_LCR_CS7;
371 break;
372 case CS8:
373 ctrl |= CH341_LCR_CS8;
374 break;
375 }
376
377 if (C_PARENB(tty)) {
378 ctrl |= CH341_LCR_ENABLE_PAR;
379 if (C_PARODD(tty) == 0)
380 ctrl |= CH341_LCR_PAR_EVEN;
381 if (C_CMSPAR(tty))
382 ctrl |= CH341_LCR_MARK_SPACE;
383 }
384
385 if (C_CSTOPB(tty))
386 ctrl |= CH341_LCR_STOP_BITS_2;
349 387
350 if (baud_rate) { 388 if (baud_rate) {
351 spin_lock_irqsave(&priv->lock, flags); 389 spin_lock_irqsave(&priv->lock, flags);
352 priv->line_control |= (CH341_BIT_DTR | CH341_BIT_RTS); 390 priv->line_control |= (CH341_BIT_DTR | CH341_BIT_RTS);
353 spin_unlock_irqrestore(&priv->lock, flags); 391 spin_unlock_irqrestore(&priv->lock, flags);
354 ch341_set_baudrate(port->serial->dev, priv); 392 r = ch341_init_set_baudrate(port->serial->dev, priv, ctrl);
393 if (r < 0 && old_termios) {
394 priv->baud_rate = tty_termios_baud_rate(old_termios);
395 tty_termios_copy_hw(&tty->termios, old_termios);
396 }
355 } else { 397 } else {
356 spin_lock_irqsave(&priv->lock, flags); 398 spin_lock_irqsave(&priv->lock, flags);
357 priv->line_control &= ~(CH341_BIT_DTR | CH341_BIT_RTS); 399 priv->line_control &= ~(CH341_BIT_DTR | CH341_BIT_RTS);
@@ -360,17 +402,12 @@ static void ch341_set_termios(struct tty_struct *tty,
360 402
361 ch341_set_handshake(port->serial->dev, priv->line_control); 403 ch341_set_handshake(port->serial->dev, priv->line_control);
362 404
363 /* Unimplemented:
364 * (cflag & CSIZE) : data bits [5, 8]
365 * (cflag & PARENB) : parity {NONE, EVEN, ODD}
366 * (cflag & CSTOPB) : stop bits [1, 2]
367 */
368} 405}
369 406
370static void ch341_break_ctl(struct tty_struct *tty, int break_state) 407static void ch341_break_ctl(struct tty_struct *tty, int break_state)
371{ 408{
372 const uint16_t ch341_break_reg = 409 const uint16_t ch341_break_reg =
373 ((uint16_t) CH341_REG_BREAK2 << 8) | CH341_REG_BREAK1; 410 ((uint16_t) CH341_REG_LCR << 8) | CH341_REG_BREAK;
374 struct usb_serial_port *port = tty->driver_data; 411 struct usb_serial_port *port = tty->driver_data;
375 int r; 412 int r;
376 uint16_t reg_contents; 413 uint16_t reg_contents;
@@ -391,12 +428,12 @@ static void ch341_break_ctl(struct tty_struct *tty, int break_state)
391 __func__, break_reg[0], break_reg[1]); 428 __func__, break_reg[0], break_reg[1]);
392 if (break_state != 0) { 429 if (break_state != 0) {
393 dev_dbg(&port->dev, "%s - Enter break state requested\n", __func__); 430 dev_dbg(&port->dev, "%s - Enter break state requested\n", __func__);
394 break_reg[0] &= ~CH341_NBREAK_BITS_REG1; 431 break_reg[0] &= ~CH341_NBREAK_BITS;
395 break_reg[1] &= ~CH341_NBREAK_BITS_REG2; 432 break_reg[1] &= ~CH341_LCR_ENABLE_TX;
396 } else { 433 } else {
397 dev_dbg(&port->dev, "%s - Leave break state requested\n", __func__); 434 dev_dbg(&port->dev, "%s - Leave break state requested\n", __func__);
398 break_reg[0] |= CH341_NBREAK_BITS_REG1; 435 break_reg[0] |= CH341_NBREAK_BITS;
399 break_reg[1] |= CH341_NBREAK_BITS_REG2; 436 break_reg[1] |= CH341_LCR_ENABLE_TX;
400 } 437 }
401 dev_dbg(&port->dev, "%s - New ch341 break register contents - reg1: %x, reg2: %x\n", 438 dev_dbg(&port->dev, "%s - New ch341 break register contents - reg1: %x, reg2: %x\n",
402 __func__, break_reg[0], break_reg[1]); 439 __func__, break_reg[0], break_reg[1]);
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 243ac5ebe46a..fff718352e0c 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -23,6 +23,9 @@
23#include <linux/usb.h> 23#include <linux/usb.h>
24#include <linux/uaccess.h> 24#include <linux/uaccess.h>
25#include <linux/usb/serial.h> 25#include <linux/usb/serial.h>
26#include <linux/gpio/driver.h>
27#include <linux/bitops.h>
28#include <linux/mutex.h>
26 29
27#define DRIVER_DESC "Silicon Labs CP210x RS232 serial adaptor driver" 30#define DRIVER_DESC "Silicon Labs CP210x RS232 serial adaptor driver"
28 31
@@ -33,7 +36,7 @@ static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *);
33static void cp210x_close(struct usb_serial_port *); 36static void cp210x_close(struct usb_serial_port *);
34static void cp210x_get_termios(struct tty_struct *, struct usb_serial_port *); 37static void cp210x_get_termios(struct tty_struct *, struct usb_serial_port *);
35static void cp210x_get_termios_port(struct usb_serial_port *port, 38static void cp210x_get_termios_port(struct usb_serial_port *port,
36 unsigned int *cflagp, unsigned int *baudp); 39 tcflag_t *cflagp, unsigned int *baudp);
37static void cp210x_change_speed(struct tty_struct *, struct usb_serial_port *, 40static void cp210x_change_speed(struct tty_struct *, struct usb_serial_port *,
38 struct ktermios *); 41 struct ktermios *);
39static void cp210x_set_termios(struct tty_struct *, struct usb_serial_port *, 42static void cp210x_set_termios(struct tty_struct *, struct usb_serial_port *,
@@ -44,6 +47,9 @@ static int cp210x_tiocmset(struct tty_struct *, unsigned int, unsigned int);
44static int cp210x_tiocmset_port(struct usb_serial_port *port, 47static int cp210x_tiocmset_port(struct usb_serial_port *port,
45 unsigned int, unsigned int); 48 unsigned int, unsigned int);
46static void cp210x_break_ctl(struct tty_struct *, int); 49static void cp210x_break_ctl(struct tty_struct *, int);
50static int cp210x_attach(struct usb_serial *);
51static void cp210x_disconnect(struct usb_serial *);
52static void cp210x_release(struct usb_serial *);
47static int cp210x_port_probe(struct usb_serial_port *); 53static int cp210x_port_probe(struct usb_serial_port *);
48static int cp210x_port_remove(struct usb_serial_port *); 54static int cp210x_port_remove(struct usb_serial_port *);
49static void cp210x_dtr_rts(struct usb_serial_port *p, int on); 55static void cp210x_dtr_rts(struct usb_serial_port *p, int on);
@@ -209,6 +215,16 @@ static const struct usb_device_id id_table[] = {
209 215
210MODULE_DEVICE_TABLE(usb, id_table); 216MODULE_DEVICE_TABLE(usb, id_table);
211 217
218struct cp210x_serial_private {
219#ifdef CONFIG_GPIOLIB
220 struct gpio_chip gc;
221 u8 config;
222 u8 gpio_mode;
223 bool gpio_registered;
224#endif
225 u8 partnum;
226};
227
212struct cp210x_port_private { 228struct cp210x_port_private {
213 __u8 bInterfaceNumber; 229 __u8 bInterfaceNumber;
214 bool has_swapped_line_ctl; 230 bool has_swapped_line_ctl;
@@ -230,6 +246,9 @@ static struct usb_serial_driver cp210x_device = {
230 .tx_empty = cp210x_tx_empty, 246 .tx_empty = cp210x_tx_empty,
231 .tiocmget = cp210x_tiocmget, 247 .tiocmget = cp210x_tiocmget,
232 .tiocmset = cp210x_tiocmset, 248 .tiocmset = cp210x_tiocmset,
249 .attach = cp210x_attach,
250 .disconnect = cp210x_disconnect,
251 .release = cp210x_release,
233 .port_probe = cp210x_port_probe, 252 .port_probe = cp210x_port_probe,
234 .port_remove = cp210x_port_remove, 253 .port_remove = cp210x_port_remove,
235 .dtr_rts = cp210x_dtr_rts 254 .dtr_rts = cp210x_dtr_rts
@@ -272,6 +291,7 @@ static struct usb_serial_driver * const serial_drivers[] = {
272#define CP210X_SET_CHARS 0x19 291#define CP210X_SET_CHARS 0x19
273#define CP210X_GET_BAUDRATE 0x1D 292#define CP210X_GET_BAUDRATE 0x1D
274#define CP210X_SET_BAUDRATE 0x1E 293#define CP210X_SET_BAUDRATE 0x1E
294#define CP210X_VENDOR_SPECIFIC 0xFF
275 295
276/* CP210X_IFC_ENABLE */ 296/* CP210X_IFC_ENABLE */
277#define UART_ENABLE 0x0001 297#define UART_ENABLE 0x0001
@@ -314,6 +334,21 @@ static struct usb_serial_driver * const serial_drivers[] = {
314#define CONTROL_WRITE_DTR 0x0100 334#define CONTROL_WRITE_DTR 0x0100
315#define CONTROL_WRITE_RTS 0x0200 335#define CONTROL_WRITE_RTS 0x0200
316 336
337/* CP210X_VENDOR_SPECIFIC values */
338#define CP210X_READ_LATCH 0x00C2
339#define CP210X_GET_PARTNUM 0x370B
340#define CP210X_GET_PORTCONFIG 0x370C
341#define CP210X_GET_DEVICEMODE 0x3711
342#define CP210X_WRITE_LATCH 0x37E1
343
344/* Part number definitions */
345#define CP210X_PARTNUM_CP2101 0x01
346#define CP210X_PARTNUM_CP2102 0x02
347#define CP210X_PARTNUM_CP2103 0x03
348#define CP210X_PARTNUM_CP2104 0x04
349#define CP210X_PARTNUM_CP2105 0x05
350#define CP210X_PARTNUM_CP2108 0x08
351
317/* CP210X_GET_COMM_STATUS returns these 0x13 bytes */ 352/* CP210X_GET_COMM_STATUS returns these 0x13 bytes */
318struct cp210x_comm_status { 353struct cp210x_comm_status {
319 __le32 ulErrors; 354 __le32 ulErrors;
@@ -369,6 +404,60 @@ struct cp210x_flow_ctl {
369#define CP210X_SERIAL_RTS_ACTIVE 1 404#define CP210X_SERIAL_RTS_ACTIVE 1
370#define CP210X_SERIAL_RTS_FLOW_CTL 2 405#define CP210X_SERIAL_RTS_FLOW_CTL 2
371 406
407/* CP210X_VENDOR_SPECIFIC, CP210X_GET_DEVICEMODE call reads these 0x2 bytes. */
408struct cp210x_pin_mode {
409 u8 eci;
410 u8 sci;
411} __packed;
412
413#define CP210X_PIN_MODE_MODEM 0
414#define CP210X_PIN_MODE_GPIO BIT(0)
415
416/*
417 * CP210X_VENDOR_SPECIFIC, CP210X_GET_PORTCONFIG call reads these 0xf bytes.
418 * Structure needs padding due to unused/unspecified bytes.
419 */
420struct cp210x_config {
421 __le16 gpio_mode;
422 u8 __pad0[2];
423 __le16 reset_state;
424 u8 __pad1[4];
425 __le16 suspend_state;
426 u8 sci_cfg;
427 u8 eci_cfg;
428 u8 device_cfg;
429} __packed;
430
431/* GPIO modes */
432#define CP210X_SCI_GPIO_MODE_OFFSET 9
433#define CP210X_SCI_GPIO_MODE_MASK GENMASK(11, 9)
434
435#define CP210X_ECI_GPIO_MODE_OFFSET 2
436#define CP210X_ECI_GPIO_MODE_MASK GENMASK(3, 2)
437
438/* CP2105 port configuration values */
439#define CP2105_GPIO0_TXLED_MODE BIT(0)
440#define CP2105_GPIO1_RXLED_MODE BIT(1)
441#define CP2105_GPIO1_RS485_MODE BIT(2)
442
443/* CP210X_VENDOR_SPECIFIC, CP210X_WRITE_LATCH call writes these 0x2 bytes. */
444struct cp210x_gpio_write {
445 u8 mask;
446 u8 state;
447} __packed;
448
449/*
450 * Helper to get interface number when we only have struct usb_serial.
451 */
452static u8 cp210x_interface_num(struct usb_serial *serial)
453{
454 struct usb_host_interface *cur_altsetting;
455
456 cur_altsetting = serial->interface->cur_altsetting;
457
458 return cur_altsetting->desc.bInterfaceNumber;
459}
460
372/* 461/*
373 * Reads a variable-sized block of CP210X_ registers, identified by req. 462 * Reads a variable-sized block of CP210X_ registers, identified by req.
374 * Returns data into buf in native USB byte order. 463 * Returns data into buf in native USB byte order.
@@ -402,7 +491,7 @@ static int cp210x_read_reg_block(struct usb_serial_port *port, u8 req,
402 dev_err(&port->dev, "failed get req 0x%x size %d status: %d\n", 491 dev_err(&port->dev, "failed get req 0x%x size %d status: %d\n",
403 req, bufsize, result); 492 req, bufsize, result);
404 if (result >= 0) 493 if (result >= 0)
405 result = -EPROTO; 494 result = -EIO;
406 495
407 /* 496 /*
408 * FIXME Some callers don't bother to check for error, 497 * FIXME Some callers don't bother to check for error,
@@ -465,6 +554,40 @@ static int cp210x_read_u8_reg(struct usb_serial_port *port, u8 req, u8 *val)
465} 554}
466 555
467/* 556/*
557 * Reads a variable-sized vendor block of CP210X_ registers, identified by val.
558 * Returns data into buf in native USB byte order.
559 */
560static int cp210x_read_vendor_block(struct usb_serial *serial, u8 type, u16 val,
561 void *buf, int bufsize)
562{
563 void *dmabuf;
564 int result;
565
566 dmabuf = kmalloc(bufsize, GFP_KERNEL);
567 if (!dmabuf)
568 return -ENOMEM;
569
570 result = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0),
571 CP210X_VENDOR_SPECIFIC, type, val,
572 cp210x_interface_num(serial), dmabuf, bufsize,
573 USB_CTRL_GET_TIMEOUT);
574 if (result == bufsize) {
575 memcpy(buf, dmabuf, bufsize);
576 result = 0;
577 } else {
578 dev_err(&serial->interface->dev,
579 "failed to get vendor val 0x%04x size %d: %d\n", val,
580 bufsize, result);
581 if (result >= 0)
582 result = -EIO;
583 }
584
585 kfree(dmabuf);
586
587 return result;
588}
589
590/*
468 * Writes any 16-bit CP210X_ register (req) whose value is passed 591 * Writes any 16-bit CP210X_ register (req) whose value is passed
469 * entirely in the wValue field of the USB request. 592 * entirely in the wValue field of the USB request.
470 */ 593 */
@@ -515,7 +638,7 @@ static int cp210x_write_reg_block(struct usb_serial_port *port, u8 req,
515 dev_err(&port->dev, "failed set req 0x%x size %d status: %d\n", 638 dev_err(&port->dev, "failed set req 0x%x size %d status: %d\n",
516 req, bufsize, result); 639 req, bufsize, result);
517 if (result >= 0) 640 if (result >= 0)
518 result = -EPROTO; 641 result = -EIO;
519 } 642 }
520 643
521 return result; 644 return result;
@@ -533,6 +656,42 @@ static int cp210x_write_u32_reg(struct usb_serial_port *port, u8 req, u32 val)
533 return cp210x_write_reg_block(port, req, &le32_val, sizeof(le32_val)); 656 return cp210x_write_reg_block(port, req, &le32_val, sizeof(le32_val));
534} 657}
535 658
659#ifdef CONFIG_GPIOLIB
660/*
661 * Writes a variable-sized vendor block of CP210X_ registers, identified by val.
662 * Data in buf must be in native USB byte order.
663 */
664static int cp210x_write_vendor_block(struct usb_serial *serial, u8 type,
665 u16 val, void *buf, int bufsize)
666{
667 void *dmabuf;
668 int result;
669
670 dmabuf = kmemdup(buf, bufsize, GFP_KERNEL);
671 if (!dmabuf)
672 return -ENOMEM;
673
674 result = usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0),
675 CP210X_VENDOR_SPECIFIC, type, val,
676 cp210x_interface_num(serial), dmabuf, bufsize,
677 USB_CTRL_SET_TIMEOUT);
678
679 kfree(dmabuf);
680
681 if (result == bufsize) {
682 result = 0;
683 } else {
684 dev_err(&serial->interface->dev,
685 "failed to set vendor val 0x%04x size %d: %d\n", val,
686 bufsize, result);
687 if (result >= 0)
688 result = -EIO;
689 }
690
691 return result;
692}
693#endif
694
536/* 695/*
537 * Detect CP2108 GET_LINE_CTL bug and activate workaround. 696 * Detect CP2108 GET_LINE_CTL bug and activate workaround.
538 * Write a known good value 0x800, read it back. 697 * Write a known good value 0x800, read it back.
@@ -683,7 +842,7 @@ static int cp210x_get_tx_queue_byte_count(struct usb_serial_port *port,
683 } else { 842 } else {
684 dev_err(&port->dev, "failed to get comm status: %d\n", result); 843 dev_err(&port->dev, "failed to get comm status: %d\n", result);
685 if (result >= 0) 844 if (result >= 0)
686 result = -EPROTO; 845 result = -EIO;
687 } 846 }
688 847
689 kfree(sts); 848 kfree(sts);
@@ -719,7 +878,7 @@ static void cp210x_get_termios(struct tty_struct *tty,
719 &tty->termios.c_cflag, &baud); 878 &tty->termios.c_cflag, &baud);
720 tty_encode_baud_rate(tty, baud, baud); 879 tty_encode_baud_rate(tty, baud, baud);
721 } else { 880 } else {
722 unsigned int cflag; 881 tcflag_t cflag;
723 cflag = 0; 882 cflag = 0;
724 cp210x_get_termios_port(port, &cflag, &baud); 883 cp210x_get_termios_port(port, &cflag, &baud);
725 } 884 }
@@ -730,10 +889,10 @@ static void cp210x_get_termios(struct tty_struct *tty,
730 * This is the heart of cp210x_get_termios which always uses a &usb_serial_port. 889 * This is the heart of cp210x_get_termios which always uses a &usb_serial_port.
731 */ 890 */
732static void cp210x_get_termios_port(struct usb_serial_port *port, 891static void cp210x_get_termios_port(struct usb_serial_port *port,
733 unsigned int *cflagp, unsigned int *baudp) 892 tcflag_t *cflagp, unsigned int *baudp)
734{ 893{
735 struct device *dev = &port->dev; 894 struct device *dev = &port->dev;
736 unsigned int cflag; 895 tcflag_t cflag;
737 struct cp210x_flow_ctl flow_ctl; 896 struct cp210x_flow_ctl flow_ctl;
738 u32 baud; 897 u32 baud;
739 u16 bits; 898 u16 bits;
@@ -930,16 +1089,9 @@ static void cp210x_set_termios(struct tty_struct *tty,
930 dev_dbg(dev, "%s - data bits = 7\n", __func__); 1089 dev_dbg(dev, "%s - data bits = 7\n", __func__);
931 break; 1090 break;
932 case CS8: 1091 case CS8:
933 bits |= BITS_DATA_8;
934 dev_dbg(dev, "%s - data bits = 8\n", __func__);
935 break;
936 /*case CS9:
937 bits |= BITS_DATA_9;
938 dev_dbg(dev, "%s - data bits = 9\n", __func__);
939 break;*/
940 default: 1092 default:
941 dev_dbg(dev, "cp210x driver does not support the number of bits requested, using 8 bit mode\n");
942 bits |= BITS_DATA_8; 1093 bits |= BITS_DATA_8;
1094 dev_dbg(dev, "%s - data bits = 8\n", __func__);
943 break; 1095 break;
944 } 1096 }
945 if (cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits)) 1097 if (cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits))
@@ -1108,10 +1260,188 @@ static void cp210x_break_ctl(struct tty_struct *tty, int break_state)
1108 cp210x_write_u16_reg(port, CP210X_SET_BREAK, state); 1260 cp210x_write_u16_reg(port, CP210X_SET_BREAK, state);
1109} 1261}
1110 1262
1263#ifdef CONFIG_GPIOLIB
1264static int cp210x_gpio_request(struct gpio_chip *gc, unsigned int offset)
1265{
1266 struct usb_serial *serial = gpiochip_get_data(gc);
1267 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1268
1269 switch (offset) {
1270 case 0:
1271 if (priv->config & CP2105_GPIO0_TXLED_MODE)
1272 return -ENODEV;
1273 break;
1274 case 1:
1275 if (priv->config & (CP2105_GPIO1_RXLED_MODE |
1276 CP2105_GPIO1_RS485_MODE))
1277 return -ENODEV;
1278 break;
1279 }
1280
1281 return 0;
1282}
1283
1284static int cp210x_gpio_get(struct gpio_chip *gc, unsigned int gpio)
1285{
1286 struct usb_serial *serial = gpiochip_get_data(gc);
1287 int result;
1288 u8 buf;
1289
1290 result = cp210x_read_vendor_block(serial, REQTYPE_INTERFACE_TO_HOST,
1291 CP210X_READ_LATCH, &buf, sizeof(buf));
1292 if (result < 0)
1293 return result;
1294
1295 return !!(buf & BIT(gpio));
1296}
1297
1298static void cp210x_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)
1299{
1300 struct usb_serial *serial = gpiochip_get_data(gc);
1301 struct cp210x_gpio_write buf;
1302
1303 if (value == 1)
1304 buf.state = BIT(gpio);
1305 else
1306 buf.state = 0;
1307
1308 buf.mask = BIT(gpio);
1309
1310 cp210x_write_vendor_block(serial, REQTYPE_HOST_TO_INTERFACE,
1311 CP210X_WRITE_LATCH, &buf, sizeof(buf));
1312}
1313
1314static int cp210x_gpio_direction_get(struct gpio_chip *gc, unsigned int gpio)
1315{
1316 /* Hardware does not support an input mode */
1317 return 0;
1318}
1319
1320static int cp210x_gpio_direction_input(struct gpio_chip *gc, unsigned int gpio)
1321{
1322 /* Hardware does not support an input mode */
1323 return -ENOTSUPP;
1324}
1325
1326static int cp210x_gpio_direction_output(struct gpio_chip *gc, unsigned int gpio,
1327 int value)
1328{
1329 return 0;
1330}
1331
1332static int cp210x_gpio_set_single_ended(struct gpio_chip *gc, unsigned int gpio,
1333 enum single_ended_mode mode)
1334{
1335 struct usb_serial *serial = gpiochip_get_data(gc);
1336 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1337
1338 /* Succeed only if in correct mode (this can't be set at runtime) */
1339 if ((mode == LINE_MODE_PUSH_PULL) && (priv->gpio_mode & BIT(gpio)))
1340 return 0;
1341
1342 if ((mode == LINE_MODE_OPEN_DRAIN) && !(priv->gpio_mode & BIT(gpio)))
1343 return 0;
1344
1345 return -ENOTSUPP;
1346}
1347
1348/*
1349 * This function is for configuring GPIO using shared pins, where other signals
1350 * are made unavailable by configuring the use of GPIO. This is believed to be
1351 * only applicable to the cp2105 at this point, the other devices supported by
1352 * this driver that provide GPIO do so in a way that does not impact other
1353 * signals and are thus expected to have very different initialisation.
1354 */
1355static int cp2105_shared_gpio_init(struct usb_serial *serial)
1356{
1357 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1358 struct cp210x_pin_mode mode;
1359 struct cp210x_config config;
1360 u8 intf_num = cp210x_interface_num(serial);
1361 int result;
1362
1363 result = cp210x_read_vendor_block(serial, REQTYPE_DEVICE_TO_HOST,
1364 CP210X_GET_DEVICEMODE, &mode,
1365 sizeof(mode));
1366 if (result < 0)
1367 return result;
1368
1369 result = cp210x_read_vendor_block(serial, REQTYPE_DEVICE_TO_HOST,
1370 CP210X_GET_PORTCONFIG, &config,
1371 sizeof(config));
1372 if (result < 0)
1373 return result;
1374
1375 /* 2 banks of GPIO - One for the pins taken from each serial port */
1376 if (intf_num == 0) {
1377 if (mode.eci == CP210X_PIN_MODE_MODEM)
1378 return 0;
1379
1380 priv->config = config.eci_cfg;
1381 priv->gpio_mode = (u8)((le16_to_cpu(config.gpio_mode) &
1382 CP210X_ECI_GPIO_MODE_MASK) >>
1383 CP210X_ECI_GPIO_MODE_OFFSET);
1384 priv->gc.ngpio = 2;
1385 } else if (intf_num == 1) {
1386 if (mode.sci == CP210X_PIN_MODE_MODEM)
1387 return 0;
1388
1389 priv->config = config.sci_cfg;
1390 priv->gpio_mode = (u8)((le16_to_cpu(config.gpio_mode) &
1391 CP210X_SCI_GPIO_MODE_MASK) >>
1392 CP210X_SCI_GPIO_MODE_OFFSET);
1393 priv->gc.ngpio = 3;
1394 } else {
1395 return -ENODEV;
1396 }
1397
1398 priv->gc.label = "cp210x";
1399 priv->gc.request = cp210x_gpio_request;
1400 priv->gc.get_direction = cp210x_gpio_direction_get;
1401 priv->gc.direction_input = cp210x_gpio_direction_input;
1402 priv->gc.direction_output = cp210x_gpio_direction_output;
1403 priv->gc.get = cp210x_gpio_get;
1404 priv->gc.set = cp210x_gpio_set;
1405 priv->gc.set_single_ended = cp210x_gpio_set_single_ended;
1406 priv->gc.owner = THIS_MODULE;
1407 priv->gc.parent = &serial->interface->dev;
1408 priv->gc.base = -1;
1409 priv->gc.can_sleep = true;
1410
1411 result = gpiochip_add_data(&priv->gc, serial);
1412 if (!result)
1413 priv->gpio_registered = true;
1414
1415 return result;
1416}
1417
1418static void cp210x_gpio_remove(struct usb_serial *serial)
1419{
1420 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1421
1422 if (priv->gpio_registered) {
1423 gpiochip_remove(&priv->gc);
1424 priv->gpio_registered = false;
1425 }
1426}
1427
1428#else
1429
1430static int cp2105_shared_gpio_init(struct usb_serial *serial)
1431{
1432 return 0;
1433}
1434
1435static void cp210x_gpio_remove(struct usb_serial *serial)
1436{
1437 /* Nothing to do */
1438}
1439
1440#endif
1441
1111static int cp210x_port_probe(struct usb_serial_port *port) 1442static int cp210x_port_probe(struct usb_serial_port *port)
1112{ 1443{
1113 struct usb_serial *serial = port->serial; 1444 struct usb_serial *serial = port->serial;
1114 struct usb_host_interface *cur_altsetting;
1115 struct cp210x_port_private *port_priv; 1445 struct cp210x_port_private *port_priv;
1116 int ret; 1446 int ret;
1117 1447
@@ -1119,8 +1449,7 @@ static int cp210x_port_probe(struct usb_serial_port *port)
1119 if (!port_priv) 1449 if (!port_priv)
1120 return -ENOMEM; 1450 return -ENOMEM;
1121 1451
1122 cur_altsetting = serial->interface->cur_altsetting; 1452 port_priv->bInterfaceNumber = cp210x_interface_num(serial);
1123 port_priv->bInterfaceNumber = cur_altsetting->desc.bInterfaceNumber;
1124 1453
1125 usb_set_serial_port_data(port, port_priv); 1454 usb_set_serial_port_data(port, port_priv);
1126 1455
@@ -1143,6 +1472,52 @@ static int cp210x_port_remove(struct usb_serial_port *port)
1143 return 0; 1472 return 0;
1144} 1473}
1145 1474
1475static int cp210x_attach(struct usb_serial *serial)
1476{
1477 int result;
1478 struct cp210x_serial_private *priv;
1479
1480 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1481 if (!priv)
1482 return -ENOMEM;
1483
1484 result = cp210x_read_vendor_block(serial, REQTYPE_DEVICE_TO_HOST,
1485 CP210X_GET_PARTNUM, &priv->partnum,
1486 sizeof(priv->partnum));
1487 if (result < 0)
1488 goto err_free_priv;
1489
1490 usb_set_serial_data(serial, priv);
1491
1492 if (priv->partnum == CP210X_PARTNUM_CP2105) {
1493 result = cp2105_shared_gpio_init(serial);
1494 if (result < 0) {
1495 dev_err(&serial->interface->dev,
1496 "GPIO initialisation failed, continuing without GPIO support\n");
1497 }
1498 }
1499
1500 return 0;
1501err_free_priv:
1502 kfree(priv);
1503
1504 return result;
1505}
1506
1507static void cp210x_disconnect(struct usb_serial *serial)
1508{
1509 cp210x_gpio_remove(serial);
1510}
1511
1512static void cp210x_release(struct usb_serial *serial)
1513{
1514 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1515
1516 cp210x_gpio_remove(serial);
1517
1518 kfree(priv);
1519}
1520
1146module_usb_serial_driver(serial_drivers, id_table); 1521module_usb_serial_driver(serial_drivers, id_table);
1147 1522
1148MODULE_DESCRIPTION(DRIVER_DESC); 1523MODULE_DESCRIPTION(DRIVER_DESC);
diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c
new file mode 100644
index 000000000000..8282a6a18fee
--- /dev/null
+++ b/drivers/usb/serial/f81534.c
@@ -0,0 +1,1409 @@
1/*
2 * F81532/F81534 USB to Serial Ports Bridge
3 *
4 * F81532 => 2 Serial Ports
5 * F81534 => 4 Serial Ports
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
13 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
14 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
15 *
16 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
17 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
18 * (Read Data/MSR/LSR).
19 *
20 * Write URB is fixed with 512bytes, per serial port used 128Bytes.
21 * It can be described by f81534_prepare_write_buffer()
22 *
23 * Read URB is 512Bytes max, per serial port used 128Bytes.
24 * It can be described by f81534_process_read_urb() and maybe received with
25 * 128x1,2,3,4 bytes.
26 *
27 */
28#include <linux/slab.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/usb.h>
32#include <linux/usb/serial.h>
33#include <linux/serial_reg.h>
34#include <linux/module.h>
35#include <linux/uaccess.h>
36
37/* Serial Port register Address */
38#define F81534_UART_BASE_ADDRESS 0x1200
39#define F81534_UART_OFFSET 0x10
40#define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
41#define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
42#define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
43#define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
44#define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
45#define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
46#define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
47
48#define F81534_DEF_CONF_ADDRESS_START 0x3000
49#define F81534_DEF_CONF_SIZE 8
50
51#define F81534_CUSTOM_ADDRESS_START 0x2f00
52#define F81534_CUSTOM_DATA_SIZE 0x10
53#define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
54#define F81534_CUSTOM_VALID_TOKEN 0xf0
55#define F81534_CONF_OFFSET 1
56
57#define F81534_MAX_DATA_BLOCK 64
58#define F81534_MAX_BUS_RETRY 20
59
60/* Default URB timeout for USB operations */
61#define F81534_USB_MAX_RETRY 10
62#define F81534_USB_TIMEOUT 1000
63#define F81534_SET_GET_REGISTER 0xA0
64
65#define F81534_NUM_PORT 4
66#define F81534_UNUSED_PORT 0xff
67#define F81534_WRITE_BUFFER_SIZE 512
68
69#define DRIVER_DESC "Fintek F81532/F81534"
70#define FINTEK_VENDOR_ID_1 0x1934
71#define FINTEK_VENDOR_ID_2 0x2C42
72#define FINTEK_DEVICE_ID 0x1202
73#define F81534_MAX_TX_SIZE 124
74#define F81534_MAX_RX_SIZE 124
75#define F81534_RECEIVE_BLOCK_SIZE 128
76#define F81534_MAX_RECEIVE_BLOCK_SIZE 512
77
78#define F81534_TOKEN_RECEIVE 0x01
79#define F81534_TOKEN_WRITE 0x02
80#define F81534_TOKEN_TX_EMPTY 0x03
81#define F81534_TOKEN_MSR_CHANGE 0x04
82
83/*
84 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
85 * idle if we performed any command.
86 *
87 * SPI Bus status register: F81534_BUS_REG_STATUS
88 * Bit 0/1 : BUSY
89 * Bit 2 : IDLE
90 */
91#define F81534_BUS_BUSY (BIT(0) | BIT(1))
92#define F81534_BUS_IDLE BIT(2)
93#define F81534_BUS_READ_DATA 0x1004
94#define F81534_BUS_REG_STATUS 0x1003
95#define F81534_BUS_REG_START 0x1002
96#define F81534_BUS_REG_END 0x1001
97
98#define F81534_CMD_READ 0x03
99
100#define F81534_DEFAULT_BAUD_RATE 9600
101#define F81534_MAX_BAUDRATE 115200
102
103#define F81534_PORT_CONF_DISABLE_PORT BIT(3)
104#define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
105#define F81534_PORT_UNAVAILABLE \
106 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
107
108#define F81534_1X_RXTRIGGER 0xc3
109#define F81534_8X_RXTRIGGER 0xcf
110
111static const struct usb_device_id f81534_id_table[] = {
112 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
113 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
114 {} /* Terminating entry */
115};
116
117#define F81534_TX_EMPTY_BIT 0
118
119struct f81534_serial_private {
120 u8 conf_data[F81534_DEF_CONF_SIZE];
121 int tty_idx[F81534_NUM_PORT];
122 u8 setting_idx;
123 int opened_port;
124 struct mutex urb_mutex;
125};
126
127struct f81534_port_private {
128 struct mutex mcr_mutex;
129 unsigned long tx_empty;
130 spinlock_t msr_lock;
131 u8 shadow_mcr;
132 u8 shadow_msr;
133 u8 phy_num;
134};
135
136static int f81534_logic_to_phy_port(struct usb_serial *serial,
137 struct usb_serial_port *port)
138{
139 struct f81534_serial_private *serial_priv =
140 usb_get_serial_data(port->serial);
141 int count = 0;
142 int i;
143
144 for (i = 0; i < F81534_NUM_PORT; ++i) {
145 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
146 continue;
147
148 if (port->port_number == count)
149 return i;
150
151 ++count;
152 }
153
154 return -ENODEV;
155}
156
157static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
158{
159 struct usb_interface *interface = serial->interface;
160 struct usb_device *dev = serial->dev;
161 size_t count = F81534_USB_MAX_RETRY;
162 int status;
163 u8 *tmp;
164
165 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
166 if (!tmp)
167 return -ENOMEM;
168
169 *tmp = data;
170
171 /*
172 * Our device maybe not reply when heavily loading, We'll retry for
173 * F81534_USB_MAX_RETRY times.
174 */
175 while (count--) {
176 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
177 F81534_SET_GET_REGISTER,
178 USB_TYPE_VENDOR | USB_DIR_OUT,
179 reg, 0, tmp, sizeof(u8),
180 F81534_USB_TIMEOUT);
181 if (status > 0) {
182 status = 0;
183 break;
184 } else if (status == 0) {
185 status = -EIO;
186 }
187 }
188
189 if (status < 0) {
190 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
191 __func__, reg, data, status);
192 }
193
194 kfree(tmp);
195 return status;
196}
197
198static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
199{
200 struct usb_interface *interface = serial->interface;
201 struct usb_device *dev = serial->dev;
202 size_t count = F81534_USB_MAX_RETRY;
203 int status;
204 u8 *tmp;
205
206 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
207 if (!tmp)
208 return -ENOMEM;
209
210 /*
211 * Our device maybe not reply when heavily loading, We'll retry for
212 * F81534_USB_MAX_RETRY times.
213 */
214 while (count--) {
215 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
216 F81534_SET_GET_REGISTER,
217 USB_TYPE_VENDOR | USB_DIR_IN,
218 reg, 0, tmp, sizeof(u8),
219 F81534_USB_TIMEOUT);
220 if (status > 0) {
221 status = 0;
222 break;
223 } else if (status == 0) {
224 status = -EIO;
225 }
226 }
227
228 if (status < 0) {
229 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
230 reg, status);
231 goto end;
232 }
233
234 *data = *tmp;
235
236end:
237 kfree(tmp);
238 return status;
239}
240
241static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
242 u8 data)
243{
244 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
245
246 return f81534_set_register(port->serial,
247 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
248}
249
250static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
251 u8 *data)
252{
253 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
254
255 return f81534_get_register(port->serial,
256 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
257}
258
259/*
260 * If we try to access the internal flash via SPI bus, we should check the bus
261 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
262 */
263static int f81534_wait_for_spi_idle(struct usb_serial *serial)
264{
265 size_t count = F81534_MAX_BUS_RETRY;
266 u8 tmp;
267 int status;
268
269 do {
270 status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
271 &tmp);
272 if (status)
273 return status;
274
275 if (tmp & F81534_BUS_BUSY)
276 continue;
277
278 if (tmp & F81534_BUS_IDLE)
279 break;
280
281 } while (--count);
282
283 if (!count) {
284 dev_err(&serial->interface->dev,
285 "%s: timed out waiting for idle SPI bus\n",
286 __func__);
287 return -EIO;
288 }
289
290 return f81534_set_register(serial, F81534_BUS_REG_STATUS,
291 tmp & ~F81534_BUS_IDLE);
292}
293
294static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
295 u8 *data)
296{
297 int status;
298
299 status = f81534_get_register(serial, reg, data);
300 if (status)
301 return status;
302
303 return f81534_wait_for_spi_idle(serial);
304}
305
306static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
307{
308 int status;
309
310 status = f81534_set_register(serial, reg, data);
311 if (status)
312 return status;
313
314 return f81534_wait_for_spi_idle(serial);
315}
316
317static int f81534_read_flash(struct usb_serial *serial, u32 address,
318 size_t size, u8 *buf)
319{
320 u8 tmp_buf[F81534_MAX_DATA_BLOCK];
321 size_t block = 0;
322 size_t read_size;
323 size_t count;
324 int status;
325 int offset;
326 u16 reg_tmp;
327
328 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
329 F81534_CMD_READ);
330 if (status)
331 return status;
332
333 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
334 (address >> 16) & 0xff);
335 if (status)
336 return status;
337
338 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
339 (address >> 8) & 0xff);
340 if (status)
341 return status;
342
343 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
344 (address >> 0) & 0xff);
345 if (status)
346 return status;
347
348 /* Continuous read mode */
349 do {
350 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
351
352 for (count = 0; count < read_size; ++count) {
353 /* To write F81534_BUS_REG_END when final byte */
354 if (size <= F81534_MAX_DATA_BLOCK &&
355 read_size == count + 1)
356 reg_tmp = F81534_BUS_REG_END;
357 else
358 reg_tmp = F81534_BUS_REG_START;
359
360 /*
361 * Dummy code, force IC to generate a read pulse, the
362 * set of value 0xf1 is dont care (any value is ok)
363 */
364 status = f81534_set_spi_register(serial, reg_tmp,
365 0xf1);
366 if (status)
367 return status;
368
369 status = f81534_get_spi_register(serial,
370 F81534_BUS_READ_DATA,
371 &tmp_buf[count]);
372 if (status)
373 return status;
374
375 offset = count + block * F81534_MAX_DATA_BLOCK;
376 buf[offset] = tmp_buf[count];
377 }
378
379 size -= read_size;
380 ++block;
381 } while (size);
382
383 return 0;
384}
385
386static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
387{
388 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
389 int phy_num = port_priv->phy_num;
390 u8 tx_len;
391 int i;
392
393 /*
394 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
395 * index 0: port phy idx (e.g., 0,1,2,3)
396 * index 1: only F81534_TOKEN_WRITE
397 * index 2: serial TX out length
398 * index 3: fix to 0
399 * index 4~127: serial out data block
400 */
401 for (i = 0; i < F81534_NUM_PORT; ++i) {
402 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
403 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
404 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
405 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
406 }
407
408 tx_len = kfifo_out_locked(&port->write_fifo,
409 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
410 F81534_MAX_TX_SIZE, &port->lock);
411
412 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
413}
414
415static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
416{
417 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
418 struct urb *urb;
419 unsigned long flags;
420 int result;
421
422 /* Check is any data in write_fifo */
423 spin_lock_irqsave(&port->lock, flags);
424
425 if (kfifo_is_empty(&port->write_fifo)) {
426 spin_unlock_irqrestore(&port->lock, flags);
427 return 0;
428 }
429
430 spin_unlock_irqrestore(&port->lock, flags);
431
432 /* Check H/W is TXEMPTY */
433 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
434 return 0;
435
436 urb = port->write_urbs[0];
437 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
438 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
439
440 result = usb_submit_urb(urb, mem_flags);
441 if (result) {
442 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
443 dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
444 result);
445 return result;
446 }
447
448 usb_serial_port_softint(port);
449 return 0;
450}
451
452static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
453{
454 if (!baudrate)
455 return 0;
456
457 /* Round to nearest divisor */
458 return DIV_ROUND_CLOSEST(clockrate, baudrate);
459}
460
461static int f81534_set_port_config(struct usb_serial_port *port, u32 baudrate,
462 u8 lcr)
463{
464 u32 divisor;
465 int status;
466 u8 value;
467
468 if (baudrate <= 1200)
469 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
470 else
471 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
472
473 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
474 if (status) {
475 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
476 return status;
477 }
478
479 if (baudrate <= 1200)
480 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
481 else
482 value = UART_FCR_R_TRIG_11 | UART_FCR_ENABLE_FIFO; /* TL: 14 */
483
484 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
485 value);
486 if (status) {
487 dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
488 return status;
489 }
490
491 divisor = f81534_calc_baud_divisor(baudrate, F81534_MAX_BAUDRATE);
492 value = UART_LCR_DLAB;
493 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
494 value);
495 if (status) {
496 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
497 return status;
498 }
499
500 value = divisor & 0xff;
501 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
502 if (status) {
503 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
504 return status;
505 }
506
507 value = (divisor >> 8) & 0xff;
508 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
509 if (status) {
510 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
511 return status;
512 }
513
514 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, lcr);
515 if (status) {
516 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
517 return status;
518 }
519
520 return 0;
521}
522
523static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
524 unsigned int clear)
525{
526 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
527 int status;
528 u8 tmp;
529
530 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
531 return 0; /* no change */
532
533 mutex_lock(&port_priv->mcr_mutex);
534
535 /* 'Set' takes precedence over 'Clear' */
536 clear &= ~set;
537
538 /* Always enable UART_MCR_OUT2 */
539 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
540
541 if (clear & TIOCM_DTR)
542 tmp &= ~UART_MCR_DTR;
543
544 if (clear & TIOCM_RTS)
545 tmp &= ~UART_MCR_RTS;
546
547 if (set & TIOCM_DTR)
548 tmp |= UART_MCR_DTR;
549
550 if (set & TIOCM_RTS)
551 tmp |= UART_MCR_RTS;
552
553 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
554 if (status < 0) {
555 dev_err(&port->dev, "%s: MCR write failed\n", __func__);
556 mutex_unlock(&port_priv->mcr_mutex);
557 return status;
558 }
559
560 port_priv->shadow_mcr = tmp;
561 mutex_unlock(&port_priv->mcr_mutex);
562 return 0;
563}
564
565/*
566 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
567 * for latest configuration index. If nothing found
568 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
569 * F81534_DEF_CONF_ADDRESS_START section.
570 *
571 * Due to we only use block0 to save data, so *index should be 0 or
572 * F81534_CUSTOM_NO_CUSTOM_DATA.
573 */
574static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
575{
576 u8 tmp;
577 int status;
578
579 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
580 &tmp);
581 if (status) {
582 dev_err(&serial->interface->dev, "%s: read failed: %d\n",
583 __func__, status);
584 return status;
585 }
586
587 /* We'll use the custom data when the data is valid. */
588 if (tmp == F81534_CUSTOM_VALID_TOKEN)
589 *index = 0;
590 else
591 *index = F81534_CUSTOM_NO_CUSTOM_DATA;
592
593 return 0;
594}
595
596/*
597 * We had 2 generation of F81532/534 IC. All has an internal storage.
598 *
599 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
600 * internal data will used. All mode and gpio control should manually set
601 * by AP or Driver and all storage space value are 0xff. The
602 * f81534_calc_num_ports() will run to final we marked as "oldest version"
603 * for this IC.
604 *
605 * 2rd is designed to more generic to use any transceiver and this is our
606 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
607 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
608 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
609 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
610 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
611 * The f81534_calc_num_ports() will run to "new style" with checking
612 * F81534_PORT_UNAVAILABLE section.
613 */
614static int f81534_calc_num_ports(struct usb_serial *serial)
615{
616 u8 setting[F81534_CUSTOM_DATA_SIZE];
617 u8 setting_idx;
618 u8 num_port = 0;
619 int status;
620 size_t i;
621
622 /* Check had custom setting */
623 status = f81534_find_config_idx(serial, &setting_idx);
624 if (status) {
625 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
626 __func__, status);
627 return 0;
628 }
629
630 /*
631 * We'll read custom data only when data available, otherwise we'll
632 * read default value instead.
633 */
634 if (setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
635 status = f81534_read_flash(serial,
636 F81534_CUSTOM_ADDRESS_START +
637 F81534_CONF_OFFSET,
638 sizeof(setting), setting);
639 if (status) {
640 dev_err(&serial->interface->dev,
641 "%s: get custom data failed: %d\n",
642 __func__, status);
643 return 0;
644 }
645
646 dev_dbg(&serial->interface->dev,
647 "%s: read config from block: %d\n", __func__,
648 setting_idx);
649 } else {
650 /* Read default board setting */
651 status = f81534_read_flash(serial,
652 F81534_DEF_CONF_ADDRESS_START, F81534_NUM_PORT,
653 setting);
654
655 if (status) {
656 dev_err(&serial->interface->dev,
657 "%s: read failed: %d\n", __func__,
658 status);
659 return 0;
660 }
661
662 dev_dbg(&serial->interface->dev, "%s: read default config\n",
663 __func__);
664 }
665
666 /* New style, find all possible ports */
667 for (i = 0; i < F81534_NUM_PORT; ++i) {
668 if (setting[i] & F81534_PORT_UNAVAILABLE)
669 continue;
670
671 ++num_port;
672 }
673
674 if (num_port)
675 return num_port;
676
677 dev_warn(&serial->interface->dev, "%s: Read Failed. default 4 ports\n",
678 __func__);
679 return 4; /* Nothing found, oldest version IC */
680}
681
682static void f81534_set_termios(struct tty_struct *tty,
683 struct usb_serial_port *port,
684 struct ktermios *old_termios)
685{
686 u8 new_lcr = 0;
687 int status;
688 u32 baud;
689
690 if (C_BAUD(tty) == B0)
691 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
692 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
693 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
694
695 if (C_PARENB(tty)) {
696 new_lcr |= UART_LCR_PARITY;
697
698 if (!C_PARODD(tty))
699 new_lcr |= UART_LCR_EPAR;
700
701 if (C_CMSPAR(tty))
702 new_lcr |= UART_LCR_SPAR;
703 }
704
705 if (C_CSTOPB(tty))
706 new_lcr |= UART_LCR_STOP;
707
708 switch (C_CSIZE(tty)) {
709 case CS5:
710 new_lcr |= UART_LCR_WLEN5;
711 break;
712 case CS6:
713 new_lcr |= UART_LCR_WLEN6;
714 break;
715 case CS7:
716 new_lcr |= UART_LCR_WLEN7;
717 break;
718 default:
719 case CS8:
720 new_lcr |= UART_LCR_WLEN8;
721 break;
722 }
723
724 baud = tty_get_baud_rate(tty);
725 if (!baud)
726 return;
727
728 if (baud > F81534_MAX_BAUDRATE) {
729 if (old_termios)
730 baud = tty_termios_baud_rate(old_termios);
731 else
732 baud = F81534_DEFAULT_BAUD_RATE;
733
734 tty_encode_baud_rate(tty, baud, baud);
735 }
736
737 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
738
739 status = f81534_set_port_config(port, baud, new_lcr);
740 if (status < 0) {
741 dev_err(&port->dev, "%s: set port config failed: %d\n",
742 __func__, status);
743 }
744}
745
746static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
747{
748 return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
749}
750
751static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
752{
753 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
754 struct tty_struct *tty;
755 unsigned long flags;
756 u8 old_msr;
757
758 if (!(msr & UART_MSR_ANY_DELTA))
759 return;
760
761 spin_lock_irqsave(&port_priv->msr_lock, flags);
762 old_msr = port_priv->shadow_msr;
763 port_priv->shadow_msr = msr;
764 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
765
766 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
767 msr);
768
769 /* Update input line counters */
770 if (msr & UART_MSR_DCTS)
771 port->icount.cts++;
772 if (msr & UART_MSR_DDSR)
773 port->icount.dsr++;
774 if (msr & UART_MSR_DDCD)
775 port->icount.dcd++;
776 if (msr & UART_MSR_TERI)
777 port->icount.rng++;
778
779 wake_up_interruptible(&port->port.delta_msr_wait);
780
781 if (!(msr & UART_MSR_DDCD))
782 return;
783
784 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
785 __func__, port_priv->phy_num, old_msr, msr);
786
787 tty = tty_port_tty_get(&port->port);
788 if (!tty)
789 return;
790
791 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
792 tty_kref_put(tty);
793}
794
795static int f81534_read_msr(struct usb_serial_port *port)
796{
797 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
798 unsigned long flags;
799 int status;
800 u8 msr;
801
802 /* Get MSR initial value */
803 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
804 if (status)
805 return status;
806
807 /* Force update current state */
808 spin_lock_irqsave(&port_priv->msr_lock, flags);
809 port_priv->shadow_msr = msr;
810 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
811
812 return 0;
813}
814
815static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
816{
817 struct f81534_serial_private *serial_priv =
818 usb_get_serial_data(port->serial);
819 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
820 int status;
821
822 status = f81534_set_port_register(port,
823 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
824 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
825 if (status) {
826 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
827 status);
828 return status;
829 }
830
831 if (tty)
832 f81534_set_termios(tty, port, NULL);
833
834 status = f81534_read_msr(port);
835 if (status)
836 return status;
837
838 mutex_lock(&serial_priv->urb_mutex);
839
840 /* Submit Read URBs for first port opened */
841 if (!serial_priv->opened_port) {
842 status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
843 if (status)
844 goto exit;
845 }
846
847 serial_priv->opened_port++;
848
849exit:
850 mutex_unlock(&serial_priv->urb_mutex);
851
852 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
853 return status;
854}
855
856static void f81534_close(struct usb_serial_port *port)
857{
858 struct f81534_serial_private *serial_priv =
859 usb_get_serial_data(port->serial);
860 struct usb_serial_port *port0 = port->serial->port[0];
861 unsigned long flags;
862 size_t i;
863
864 usb_kill_urb(port->write_urbs[0]);
865
866 spin_lock_irqsave(&port->lock, flags);
867 kfifo_reset_out(&port->write_fifo);
868 spin_unlock_irqrestore(&port->lock, flags);
869
870 /* Kill Read URBs when final port closed */
871 mutex_lock(&serial_priv->urb_mutex);
872 serial_priv->opened_port--;
873
874 if (!serial_priv->opened_port) {
875 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
876 usb_kill_urb(port0->read_urbs[i]);
877 }
878
879 mutex_unlock(&serial_priv->urb_mutex);
880}
881
882static int f81534_get_serial_info(struct usb_serial_port *port,
883 struct serial_struct __user *retinfo)
884{
885 struct f81534_port_private *port_priv;
886 struct serial_struct tmp;
887
888 port_priv = usb_get_serial_port_data(port);
889
890 memset(&tmp, 0, sizeof(tmp));
891
892 tmp.type = PORT_16550A;
893 tmp.port = port->port_number;
894 tmp.line = port->minor;
895 tmp.baud_base = F81534_MAX_BAUDRATE;
896
897 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
898 return -EFAULT;
899
900 return 0;
901}
902
903static int f81534_ioctl(struct tty_struct *tty, unsigned int cmd,
904 unsigned long arg)
905{
906 struct usb_serial_port *port = tty->driver_data;
907 struct serial_struct __user *buf = (struct serial_struct __user *)arg;
908
909 switch (cmd) {
910 case TIOCGSERIAL:
911 return f81534_get_serial_info(port, buf);
912 default:
913 break;
914 }
915
916 return -ENOIOCTLCMD;
917}
918
919static void f81534_process_per_serial_block(struct usb_serial_port *port,
920 u8 *data)
921{
922 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
923 int phy_num = data[0];
924 size_t read_size = 0;
925 size_t i;
926 char tty_flag;
927 int status;
928 u8 lsr;
929
930 /*
931 * The block layout is 128 Bytes
932 * index 0: port phy idx (e.g., 0,1,2,3),
933 * index 1: It's could be
934 * F81534_TOKEN_RECEIVE
935 * F81534_TOKEN_TX_EMPTY
936 * F81534_TOKEN_MSR_CHANGE
937 * index 2: serial in size (data+lsr, must be even)
938 * meaningful for F81534_TOKEN_RECEIVE only
939 * index 3: current MSR with this device
940 * index 4~127: serial in data block (data+lsr, must be even)
941 */
942 switch (data[1]) {
943 case F81534_TOKEN_TX_EMPTY:
944 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
945
946 /* Try to submit writer */
947 status = f81534_submit_writer(port, GFP_ATOMIC);
948 if (status)
949 dev_err(&port->dev, "%s: submit failed\n", __func__);
950 return;
951
952 case F81534_TOKEN_MSR_CHANGE:
953 f81534_msr_changed(port, data[3]);
954 return;
955
956 case F81534_TOKEN_RECEIVE:
957 read_size = data[2];
958 if (read_size > F81534_MAX_RX_SIZE) {
959 dev_err(&port->dev,
960 "%s: phy: %d read_size: %zu larger than: %d\n",
961 __func__, phy_num, read_size,
962 F81534_MAX_RX_SIZE);
963 return;
964 }
965
966 break;
967
968 default:
969 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
970 data[1]);
971 return;
972 }
973
974 for (i = 4; i < 4 + read_size; i += 2) {
975 tty_flag = TTY_NORMAL;
976 lsr = data[i + 1];
977
978 if (lsr & UART_LSR_BRK_ERROR_BITS) {
979 if (lsr & UART_LSR_BI) {
980 tty_flag = TTY_BREAK;
981 port->icount.brk++;
982 usb_serial_handle_break(port);
983 } else if (lsr & UART_LSR_PE) {
984 tty_flag = TTY_PARITY;
985 port->icount.parity++;
986 } else if (lsr & UART_LSR_FE) {
987 tty_flag = TTY_FRAME;
988 port->icount.frame++;
989 }
990
991 if (lsr & UART_LSR_OE) {
992 port->icount.overrun++;
993 tty_insert_flip_char(&port->port, 0,
994 TTY_OVERRUN);
995 }
996 }
997
998 if (port->port.console && port->sysrq) {
999 if (usb_serial_handle_sysrq_char(port, data[i]))
1000 continue;
1001 }
1002
1003 tty_insert_flip_char(&port->port, data[i], tty_flag);
1004 }
1005
1006 tty_flip_buffer_push(&port->port);
1007}
1008
1009static void f81534_process_read_urb(struct urb *urb)
1010{
1011 struct f81534_serial_private *serial_priv;
1012 struct usb_serial_port *port;
1013 struct usb_serial *serial;
1014 u8 *buf;
1015 int phy_port_num;
1016 int tty_port_num;
1017 size_t i;
1018
1019 if (!urb->actual_length ||
1020 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1021 return;
1022 }
1023
1024 port = urb->context;
1025 serial = port->serial;
1026 buf = urb->transfer_buffer;
1027 serial_priv = usb_get_serial_data(serial);
1028
1029 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1030 phy_port_num = buf[i];
1031 if (phy_port_num >= F81534_NUM_PORT) {
1032 dev_err(&port->dev,
1033 "%s: phy_port_num: %d larger than: %d\n",
1034 __func__, phy_port_num, F81534_NUM_PORT);
1035 continue;
1036 }
1037
1038 tty_port_num = serial_priv->tty_idx[phy_port_num];
1039 port = serial->port[tty_port_num];
1040
1041 if (tty_port_initialized(&port->port))
1042 f81534_process_per_serial_block(port, &buf[i]);
1043 }
1044}
1045
1046static void f81534_write_usb_callback(struct urb *urb)
1047{
1048 struct usb_serial_port *port = urb->context;
1049
1050 switch (urb->status) {
1051 case 0:
1052 break;
1053 case -ENOENT:
1054 case -ECONNRESET:
1055 case -ESHUTDOWN:
1056 dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1057 __func__, urb->status);
1058 return;
1059 case -EPIPE:
1060 dev_err(&port->dev, "%s - urb stopped: %d\n",
1061 __func__, urb->status);
1062 return;
1063 default:
1064 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1065 __func__, urb->status);
1066 break;
1067 }
1068}
1069
1070static int f81534_setup_ports(struct usb_serial *serial)
1071{
1072 struct usb_serial_port *port;
1073 u8 port0_out_address;
1074 int buffer_size;
1075 size_t i;
1076
1077 /*
1078 * In our system architecture, we had 2 or 4 serial ports,
1079 * but only get 1 set of bulk in/out endpoints.
1080 *
1081 * The usb-serial subsystem will generate port 0 data,
1082 * but port 1/2/3 will not. It's will generate write URB and buffer
1083 * by following code and use the port0 read URB for read operation.
1084 */
1085 for (i = 1; i < serial->num_ports; ++i) {
1086 port0_out_address = serial->port[0]->bulk_out_endpointAddress;
1087 buffer_size = serial->port[0]->bulk_out_size;
1088 port = serial->port[i];
1089
1090 if (kfifo_alloc(&port->write_fifo, PAGE_SIZE, GFP_KERNEL))
1091 return -ENOMEM;
1092
1093 port->bulk_out_size = buffer_size;
1094 port->bulk_out_endpointAddress = port0_out_address;
1095
1096 port->write_urbs[0] = usb_alloc_urb(0, GFP_KERNEL);
1097 if (!port->write_urbs[0])
1098 return -ENOMEM;
1099
1100 port->bulk_out_buffers[0] = kzalloc(buffer_size, GFP_KERNEL);
1101 if (!port->bulk_out_buffers[0])
1102 return -ENOMEM;
1103
1104 usb_fill_bulk_urb(port->write_urbs[0], serial->dev,
1105 usb_sndbulkpipe(serial->dev,
1106 port0_out_address),
1107 port->bulk_out_buffers[0], buffer_size,
1108 serial->type->write_bulk_callback, port);
1109
1110 port->write_urb = port->write_urbs[0];
1111 port->bulk_out_buffer = port->bulk_out_buffers[0];
1112 }
1113
1114 return 0;
1115}
1116
1117static int f81534_probe(struct usb_serial *serial,
1118 const struct usb_device_id *id)
1119{
1120 struct usb_endpoint_descriptor *endpoint;
1121 struct usb_host_interface *iface_desc;
1122 struct device *dev;
1123 int num_bulk_in = 0;
1124 int num_bulk_out = 0;
1125 int size_bulk_in = 0;
1126 int size_bulk_out = 0;
1127 int i;
1128
1129 dev = &serial->interface->dev;
1130 iface_desc = serial->interface->cur_altsetting;
1131
1132 for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
1133 endpoint = &iface_desc->endpoint[i].desc;
1134
1135 if (usb_endpoint_is_bulk_in(endpoint)) {
1136 ++num_bulk_in;
1137 size_bulk_in = usb_endpoint_maxp(endpoint);
1138 }
1139
1140 if (usb_endpoint_is_bulk_out(endpoint)) {
1141 ++num_bulk_out;
1142 size_bulk_out = usb_endpoint_maxp(endpoint);
1143 }
1144 }
1145
1146 if (num_bulk_in != 1 || num_bulk_out != 1) {
1147 dev_err(dev, "expected endpoints not found\n");
1148 return -ENODEV;
1149 }
1150
1151 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
1152 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
1153 dev_err(dev, "unsupported endpoint max packet size\n");
1154 return -ENODEV;
1155 }
1156
1157 return 0;
1158}
1159
1160static int f81534_attach(struct usb_serial *serial)
1161{
1162 struct f81534_serial_private *serial_priv;
1163 int index = 0;
1164 int status;
1165 int i;
1166
1167 serial_priv = devm_kzalloc(&serial->interface->dev,
1168 sizeof(*serial_priv), GFP_KERNEL);
1169 if (!serial_priv)
1170 return -ENOMEM;
1171
1172 usb_set_serial_data(serial, serial_priv);
1173
1174 mutex_init(&serial_priv->urb_mutex);
1175
1176 status = f81534_setup_ports(serial);
1177 if (status)
1178 return status;
1179
1180 /* Check had custom setting */
1181 status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
1182 if (status) {
1183 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
1184 __func__, status);
1185 return status;
1186 }
1187
1188 /*
1189 * We'll read custom data only when data available, otherwise we'll
1190 * read default value instead.
1191 */
1192 if (serial_priv->setting_idx == F81534_CUSTOM_NO_CUSTOM_DATA) {
1193 /*
1194 * The default configuration layout:
1195 * byte 0/1/2/3: uart setting
1196 */
1197 status = f81534_read_flash(serial,
1198 F81534_DEF_CONF_ADDRESS_START,
1199 F81534_DEF_CONF_SIZE,
1200 serial_priv->conf_data);
1201 if (status) {
1202 dev_err(&serial->interface->dev,
1203 "%s: read reserve data failed: %d\n",
1204 __func__, status);
1205 return status;
1206 }
1207 } else {
1208 /* Only read 8 bytes for mode & GPIO */
1209 status = f81534_read_flash(serial,
1210 F81534_CUSTOM_ADDRESS_START +
1211 F81534_CONF_OFFSET,
1212 sizeof(serial_priv->conf_data),
1213 serial_priv->conf_data);
1214 if (status) {
1215 dev_err(&serial->interface->dev,
1216 "%s: idx: %d get data failed: %d\n",
1217 __func__, serial_priv->setting_idx,
1218 status);
1219 return status;
1220 }
1221 }
1222
1223 /* Assign phy-to-logic mapping */
1224 for (i = 0; i < F81534_NUM_PORT; ++i) {
1225 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
1226 continue;
1227
1228 serial_priv->tty_idx[i] = index++;
1229 dev_dbg(&serial->interface->dev,
1230 "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
1231 serial_priv->tty_idx[i]);
1232 }
1233
1234 return 0;
1235}
1236
1237static int f81534_port_probe(struct usb_serial_port *port)
1238{
1239 struct f81534_port_private *port_priv;
1240
1241 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1242 if (!port_priv)
1243 return -ENOMEM;
1244
1245 spin_lock_init(&port_priv->msr_lock);
1246 mutex_init(&port_priv->mcr_mutex);
1247
1248 /* Assign logic-to-phy mapping */
1249 port_priv->phy_num = f81534_logic_to_phy_port(port->serial, port);
1250 if (port_priv->phy_num < 0 || port_priv->phy_num >= F81534_NUM_PORT)
1251 return -ENODEV;
1252
1253 usb_set_serial_port_data(port, port_priv);
1254 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1255 port->port_number, port_priv->phy_num);
1256
1257 return 0;
1258}
1259
1260static int f81534_tiocmget(struct tty_struct *tty)
1261{
1262 struct usb_serial_port *port = tty->driver_data;
1263 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1264 int status;
1265 int r;
1266 u8 msr;
1267 u8 mcr;
1268
1269 /* Read current MSR from device */
1270 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1271 if (status)
1272 return status;
1273
1274 mutex_lock(&port_priv->mcr_mutex);
1275 mcr = port_priv->shadow_mcr;
1276 mutex_unlock(&port_priv->mcr_mutex);
1277
1278 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1279 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1280 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1281 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1282 (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1283 (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1284
1285 return r;
1286}
1287
1288static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1289 unsigned int clear)
1290{
1291 struct usb_serial_port *port = tty->driver_data;
1292
1293 return f81534_update_mctrl(port, set, clear);
1294}
1295
1296static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1297{
1298 if (on)
1299 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1300 else
1301 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1302}
1303
1304static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1305 const u8 *buf, int count)
1306{
1307 int bytes_out, status;
1308
1309 if (!count)
1310 return 0;
1311
1312 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1313 &port->lock);
1314
1315 status = f81534_submit_writer(port, GFP_ATOMIC);
1316 if (status) {
1317 dev_err(&port->dev, "%s: submit failed\n", __func__);
1318 return status;
1319 }
1320
1321 return bytes_out;
1322}
1323
1324static bool f81534_tx_empty(struct usb_serial_port *port)
1325{
1326 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1327
1328 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1329}
1330
1331static int f81534_resume(struct usb_serial *serial)
1332{
1333 struct f81534_serial_private *serial_priv =
1334 usb_get_serial_data(serial);
1335 struct usb_serial_port *port;
1336 int error = 0;
1337 int status;
1338 size_t i;
1339
1340 /*
1341 * We'll register port 0 bulkin when port had opened, It'll take all
1342 * port received data, MSR register change and TX_EMPTY information.
1343 */
1344 mutex_lock(&serial_priv->urb_mutex);
1345
1346 if (serial_priv->opened_port) {
1347 status = f81534_submit_read_urb(serial, GFP_NOIO);
1348 if (status) {
1349 mutex_unlock(&serial_priv->urb_mutex);
1350 return status;
1351 }
1352 }
1353
1354 mutex_unlock(&serial_priv->urb_mutex);
1355
1356 for (i = 0; i < serial->num_ports; i++) {
1357 port = serial->port[i];
1358 if (!tty_port_initialized(&port->port))
1359 continue;
1360
1361 status = f81534_submit_writer(port, GFP_NOIO);
1362 if (status) {
1363 dev_err(&port->dev, "%s: submit failed\n", __func__);
1364 ++error;
1365 }
1366 }
1367
1368 if (error)
1369 return -EIO;
1370
1371 return 0;
1372}
1373
1374static struct usb_serial_driver f81534_device = {
1375 .driver = {
1376 .owner = THIS_MODULE,
1377 .name = "f81534",
1378 },
1379 .description = DRIVER_DESC,
1380 .id_table = f81534_id_table,
1381 .open = f81534_open,
1382 .close = f81534_close,
1383 .write = f81534_write,
1384 .tx_empty = f81534_tx_empty,
1385 .calc_num_ports = f81534_calc_num_ports,
1386 .probe = f81534_probe,
1387 .attach = f81534_attach,
1388 .port_probe = f81534_port_probe,
1389 .dtr_rts = f81534_dtr_rts,
1390 .process_read_urb = f81534_process_read_urb,
1391 .ioctl = f81534_ioctl,
1392 .tiocmget = f81534_tiocmget,
1393 .tiocmset = f81534_tiocmset,
1394 .write_bulk_callback = f81534_write_usb_callback,
1395 .set_termios = f81534_set_termios,
1396 .resume = f81534_resume,
1397};
1398
1399static struct usb_serial_driver *const serial_drivers[] = {
1400 &f81534_device, NULL
1401};
1402
1403module_usb_serial_driver(serial_drivers, f81534_id_table);
1404
1405MODULE_DEVICE_TABLE(usb, f81534_id_table);
1406MODULE_DESCRIPTION(DRIVER_DESC);
1407MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1408MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1409MODULE_LICENSE("GPL");
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 6e9fc8bcc285..23d14b98ae2a 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -1455,8 +1455,6 @@ static int get_serial_info(struct usb_serial_port *port,
1455 struct ftdi_private *priv = usb_get_serial_port_data(port); 1455 struct ftdi_private *priv = usb_get_serial_port_data(port);
1456 struct serial_struct tmp; 1456 struct serial_struct tmp;
1457 1457
1458 if (!retinfo)
1459 return -EFAULT;
1460 memset(&tmp, 0, sizeof(tmp)); 1458 memset(&tmp, 0, sizeof(tmp));
1461 tmp.flags = priv->flags; 1459 tmp.flags = priv->flags;
1462 tmp.baud_base = priv->baud_base; 1460 tmp.baud_base = priv->baud_base;
@@ -1538,9 +1536,6 @@ static int get_lsr_info(struct usb_serial_port *port,
1538 struct ftdi_private *priv = usb_get_serial_port_data(port); 1536 struct ftdi_private *priv = usb_get_serial_port_data(port);
1539 unsigned int result = 0; 1537 unsigned int result = 0;
1540 1538
1541 if (!retinfo)
1542 return -EFAULT;
1543
1544 if (priv->transmit_empty) 1539 if (priv->transmit_empty)
1545 result = TIOCSER_TEMT; 1540 result = TIOCSER_TEMT;
1546 1541
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c
index 11c05ce2f35f..dcc0c58aaad5 100644
--- a/drivers/usb/serial/io_edgeport.c
+++ b/drivers/usb/serial/io_edgeport.c
@@ -1554,9 +1554,6 @@ static int get_serial_info(struct edgeport_port *edge_port,
1554{ 1554{
1555 struct serial_struct tmp; 1555 struct serial_struct tmp;
1556 1556
1557 if (!retinfo)
1558 return -EFAULT;
1559
1560 memset(&tmp, 0, sizeof(tmp)); 1557 memset(&tmp, 0, sizeof(tmp));
1561 1558
1562 tmp.type = PORT_16550A; 1559 tmp.type = PORT_16550A;
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c
index fce82fd79f77..c339163698eb 100644
--- a/drivers/usb/serial/io_ti.c
+++ b/drivers/usb/serial/io_ti.c
@@ -2459,9 +2459,6 @@ static int get_serial_info(struct edgeport_port *edge_port,
2459 struct serial_struct tmp; 2459 struct serial_struct tmp;
2460 unsigned cwait; 2460 unsigned cwait;
2461 2461
2462 if (!retinfo)
2463 return -EFAULT;
2464
2465 cwait = edge_port->port->port.closing_wait; 2462 cwait = edge_port->port->port.closing_wait;
2466 if (cwait != ASYNC_CLOSING_WAIT_NONE) 2463 if (cwait != ASYNC_CLOSING_WAIT_NONE)
2467 cwait = jiffies_to_msecs(cwait) / 10; 2464 cwait = jiffies_to_msecs(cwait) / 10;
diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c
index fc5d3a791e08..0ee190fc1bf8 100644
--- a/drivers/usb/serial/kl5kusb105.c
+++ b/drivers/usb/serial/kl5kusb105.c
@@ -296,7 +296,7 @@ static int klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port)
296 rc = usb_serial_generic_open(tty, port); 296 rc = usb_serial_generic_open(tty, port);
297 if (rc) { 297 if (rc) {
298 retval = rc; 298 retval = rc;
299 goto exit; 299 goto err_free_cfg;
300 } 300 }
301 301
302 rc = usb_control_msg(port->serial->dev, 302 rc = usb_control_msg(port->serial->dev,
@@ -311,21 +311,38 @@ static int klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port)
311 if (rc < 0) { 311 if (rc < 0) {
312 dev_err(&port->dev, "Enabling read failed (error = %d)\n", rc); 312 dev_err(&port->dev, "Enabling read failed (error = %d)\n", rc);
313 retval = rc; 313 retval = rc;
314 goto err_generic_close;
314 } else 315 } else
315 dev_dbg(&port->dev, "%s - enabled reading\n", __func__); 316 dev_dbg(&port->dev, "%s - enabled reading\n", __func__);
316 317
317 rc = klsi_105_get_line_state(port, &line_state); 318 rc = klsi_105_get_line_state(port, &line_state);
318 if (rc >= 0) { 319 if (rc < 0) {
319 spin_lock_irqsave(&priv->lock, flags);
320 priv->line_state = line_state;
321 spin_unlock_irqrestore(&priv->lock, flags);
322 dev_dbg(&port->dev, "%s - read line state 0x%lx\n", __func__, line_state);
323 retval = 0;
324 } else
325 retval = rc; 320 retval = rc;
321 goto err_disable_read;
322 }
323
324 spin_lock_irqsave(&priv->lock, flags);
325 priv->line_state = line_state;
326 spin_unlock_irqrestore(&priv->lock, flags);
327 dev_dbg(&port->dev, "%s - read line state 0x%lx\n", __func__,
328 line_state);
329
330 return 0;
326 331
327exit: 332err_disable_read:
333 usb_control_msg(port->serial->dev,
334 usb_sndctrlpipe(port->serial->dev, 0),
335 KL5KUSB105A_SIO_CONFIGURE,
336 USB_TYPE_VENDOR | USB_DIR_OUT,
337 KL5KUSB105A_SIO_CONFIGURE_READ_OFF,
338 0, /* index */
339 NULL, 0,
340 KLSI_TIMEOUT);
341err_generic_close:
342 usb_serial_generic_close(port);
343err_free_cfg:
328 kfree(cfg); 344 kfree(cfg);
345
329 return retval; 346 return retval;
330} 347}
331 348
diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c
index de9992b492b0..d52caa03679c 100644
--- a/drivers/usb/serial/mos7720.c
+++ b/drivers/usb/serial/mos7720.c
@@ -1861,9 +1861,6 @@ static int get_serial_info(struct moschip_port *mos7720_port,
1861{ 1861{
1862 struct serial_struct tmp; 1862 struct serial_struct tmp;
1863 1863
1864 if (!retinfo)
1865 return -EFAULT;
1866
1867 memset(&tmp, 0, sizeof(tmp)); 1864 memset(&tmp, 0, sizeof(tmp));
1868 1865
1869 tmp.type = PORT_16550A; 1866 tmp.type = PORT_16550A;
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index 57426d703a09..9a220b8e810f 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -1956,9 +1956,6 @@ static int mos7840_get_serial_info(struct moschip_port *mos7840_port,
1956 if (mos7840_port == NULL) 1956 if (mos7840_port == NULL)
1957 return -1; 1957 return -1;
1958 1958
1959 if (!retinfo)
1960 return -EFAULT;
1961
1962 memset(&tmp, 0, sizeof(tmp)); 1959 memset(&tmp, 0, sizeof(tmp));
1963 1960
1964 tmp.type = PORT_16550A; 1961 tmp.type = PORT_16550A;
diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c
index 4b7bfb394a32..5ded6f524d59 100644
--- a/drivers/usb/serial/opticon.c
+++ b/drivers/usb/serial/opticon.c
@@ -336,9 +336,6 @@ static int get_serial_info(struct usb_serial_port *port,
336{ 336{
337 struct serial_struct tmp; 337 struct serial_struct tmp;
338 338
339 if (!serial)
340 return -EFAULT;
341
342 memset(&tmp, 0x00, sizeof(tmp)); 339 memset(&tmp, 0x00, sizeof(tmp));
343 340
344 /* fake emulate a 16550 uart to make userspace code happy */ 341 /* fake emulate a 16550 uart to make userspace code happy */
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 9894e341c6ac..7ce31a4c7e7f 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -268,6 +268,8 @@ static void option_instat_callback(struct urb *urb);
268#define TELIT_PRODUCT_CC864_SINGLE 0x1006 268#define TELIT_PRODUCT_CC864_SINGLE 0x1006
269#define TELIT_PRODUCT_DE910_DUAL 0x1010 269#define TELIT_PRODUCT_DE910_DUAL 0x1010
270#define TELIT_PRODUCT_UE910_V2 0x1012 270#define TELIT_PRODUCT_UE910_V2 0x1012
271#define TELIT_PRODUCT_LE922_USBCFG1 0x1040
272#define TELIT_PRODUCT_LE922_USBCFG2 0x1041
271#define TELIT_PRODUCT_LE922_USBCFG0 0x1042 273#define TELIT_PRODUCT_LE922_USBCFG0 0x1042
272#define TELIT_PRODUCT_LE922_USBCFG3 0x1043 274#define TELIT_PRODUCT_LE922_USBCFG3 0x1043
273#define TELIT_PRODUCT_LE922_USBCFG5 0x1045 275#define TELIT_PRODUCT_LE922_USBCFG5 0x1045
@@ -1210,6 +1212,10 @@ static const struct usb_device_id option_ids[] = {
1210 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UE910_V2) }, 1212 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UE910_V2) },
1211 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG0), 1213 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG0),
1212 .driver_info = (kernel_ulong_t)&telit_le922_blacklist_usbcfg0 }, 1214 .driver_info = (kernel_ulong_t)&telit_le922_blacklist_usbcfg0 },
1215 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG1),
1216 .driver_info = (kernel_ulong_t)&telit_le910_blacklist },
1217 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG2),
1218 .driver_info = (kernel_ulong_t)&telit_le922_blacklist_usbcfg3 },
1213 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG3), 1219 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG3),
1214 .driver_info = (kernel_ulong_t)&telit_le922_blacklist_usbcfg3 }, 1220 .driver_info = (kernel_ulong_t)&telit_le922_blacklist_usbcfg3 },
1215 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG5, 0xff), 1221 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG5, 0xff),
@@ -1989,6 +1995,7 @@ static const struct usb_device_id option_ids[] = {
1989 { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d02, 0xff, 0x00, 0x00) }, 1995 { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d02, 0xff, 0x00, 0x00) },
1990 { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x02, 0x01) }, 1996 { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x02, 0x01) },
1991 { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x00, 0x00) }, 1997 { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x00, 0x00) },
1998 { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d04, 0xff) }, /* D-Link DWM-158 */
1992 { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e19, 0xff), /* D-Link DWM-221 B1 */ 1999 { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e19, 0xff), /* D-Link DWM-221 B1 */
1993 .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, 2000 .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
1994 { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */ 2001 { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */
diff --git a/drivers/usb/serial/quatech2.c b/drivers/usb/serial/quatech2.c
index 85acb50a7ee2..659cb8606bd9 100644
--- a/drivers/usb/serial/quatech2.c
+++ b/drivers/usb/serial/quatech2.c
@@ -463,9 +463,6 @@ static int get_serial_info(struct usb_serial_port *port,
463{ 463{
464 struct serial_struct tmp; 464 struct serial_struct tmp;
465 465
466 if (!retinfo)
467 return -EFAULT;
468
469 memset(&tmp, 0, sizeof(tmp)); 466 memset(&tmp, 0, sizeof(tmp));
470 tmp.line = port->minor; 467 tmp.line = port->minor;
471 tmp.port = 0; 468 tmp.port = 0;
diff --git a/drivers/usb/serial/ssu100.c b/drivers/usb/serial/ssu100.c
index 70a098de429f..2a156144c76c 100644
--- a/drivers/usb/serial/ssu100.c
+++ b/drivers/usb/serial/ssu100.c
@@ -318,9 +318,6 @@ static int get_serial_info(struct usb_serial_port *port,
318{ 318{
319 struct serial_struct tmp; 319 struct serial_struct tmp;
320 320
321 if (!retinfo)
322 return -EFAULT;
323
324 memset(&tmp, 0, sizeof(tmp)); 321 memset(&tmp, 0, sizeof(tmp));
325 tmp.line = port->minor; 322 tmp.line = port->minor;
326 tmp.port = 0; 323 tmp.port = 0;
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c
index a8b9bdba314f..8db9d071d940 100644
--- a/drivers/usb/serial/ti_usb_3410_5052.c
+++ b/drivers/usb/serial/ti_usb_3410_5052.c
@@ -1426,9 +1426,6 @@ static int ti_get_serial_info(struct ti_port *tport,
1426 struct serial_struct ret_serial; 1426 struct serial_struct ret_serial;
1427 unsigned cwait; 1427 unsigned cwait;
1428 1428
1429 if (!ret_arg)
1430 return -EFAULT;
1431
1432 cwait = port->port.closing_wait; 1429 cwait = port->port.closing_wait;
1433 if (cwait != ASYNC_CLOSING_WAIT_NONE) 1430 if (cwait != ASYNC_CLOSING_WAIT_NONE)
1434 cwait = jiffies_to_msecs(cwait) / 10; 1431 cwait = jiffies_to_msecs(cwait) / 10;
diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c
index 3dfdfc81254b..59bfcb3da116 100644
--- a/drivers/usb/serial/usb_wwan.c
+++ b/drivers/usb/serial/usb_wwan.c
@@ -140,9 +140,6 @@ static int get_serial_info(struct usb_serial_port *port,
140{ 140{
141 struct serial_struct tmp; 141 struct serial_struct tmp;
142 142
143 if (!retinfo)
144 return -EFAULT;
145
146 memset(&tmp, 0, sizeof(tmp)); 143 memset(&tmp, 0, sizeof(tmp));
147 tmp.line = port->minor; 144 tmp.line = port->minor;
148 tmp.port = port->port_number; 145 tmp.port = port->port_number;
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index 2cba13a532cd..615bea08ec0a 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -52,7 +52,6 @@
52 52
53#include <linux/sched.h> 53#include <linux/sched.h>
54#include <linux/errno.h> 54#include <linux/errno.h>
55#include <linux/freezer.h>
56#include <linux/module.h> 55#include <linux/module.h>
57#include <linux/slab.h> 56#include <linux/slab.h>
58#include <linux/kthread.h> 57#include <linux/kthread.h>
diff --git a/drivers/usb/usbip/vhci_hcd.c b/drivers/usb/usbip/vhci_hcd.c
index 03eccf29ace0..c4724fb3a691 100644
--- a/drivers/usb/usbip/vhci_hcd.c
+++ b/drivers/usb/usbip/vhci_hcd.c
@@ -460,13 +460,14 @@ static void vhci_tx_urb(struct urb *urb)
460{ 460{
461 struct vhci_device *vdev = get_vdev(urb->dev); 461 struct vhci_device *vdev = get_vdev(urb->dev);
462 struct vhci_priv *priv; 462 struct vhci_priv *priv;
463 struct vhci_hcd *vhci = vdev_to_vhci(vdev); 463 struct vhci_hcd *vhci;
464 unsigned long flags; 464 unsigned long flags;
465 465
466 if (!vdev) { 466 if (!vdev) {
467 pr_err("could not get virtual device"); 467 pr_err("could not get virtual device");
468 return; 468 return;
469 } 469 }
470 vhci = vdev_to_vhci(vdev);
470 471
471 priv = kzalloc(sizeof(struct vhci_priv), GFP_ATOMIC); 472 priv = kzalloc(sizeof(struct vhci_priv), GFP_ATOMIC);
472 if (!priv) { 473 if (!priv) {
diff --git a/drivers/usb/usbip/vhci_sysfs.c b/drivers/usb/usbip/vhci_sysfs.c
index c404017c1b5a..b96e5b189269 100644
--- a/drivers/usb/usbip/vhci_sysfs.c
+++ b/drivers/usb/usbip/vhci_sysfs.c
@@ -361,6 +361,7 @@ static void set_status_attr(int id)
361 status->attr.attr.name = status->name; 361 status->attr.attr.name = status->name;
362 status->attr.attr.mode = S_IRUGO; 362 status->attr.attr.mode = S_IRUGO;
363 status->attr.show = status_show; 363 status->attr.show = status_show;
364 sysfs_attr_init(&status->attr.attr);
364} 365}
365 366
366static int init_status_attrs(void) 367static int init_status_attrs(void)
diff --git a/drivers/usb/usbip/vudc_dev.c b/drivers/usb/usbip/vudc_dev.c
index 7091848df6c8..968471b62cbc 100644
--- a/drivers/usb/usbip/vudc_dev.c
+++ b/drivers/usb/usbip/vudc_dev.c
@@ -242,10 +242,10 @@ static const struct usb_gadget_ops vgadget_ops = {
242static int vep_enable(struct usb_ep *_ep, 242static int vep_enable(struct usb_ep *_ep,
243 const struct usb_endpoint_descriptor *desc) 243 const struct usb_endpoint_descriptor *desc)
244{ 244{
245 struct vep *ep; 245 struct vep *ep;
246 struct vudc *udc; 246 struct vudc *udc;
247 unsigned maxp; 247 unsigned int maxp;
248 unsigned long flags; 248 unsigned long flags;
249 249
250 ep = to_vep(_ep); 250 ep = to_vep(_ep);
251 udc = ep_to_vudc(ep); 251 udc = ep_to_vudc(ep);
@@ -259,7 +259,7 @@ static int vep_enable(struct usb_ep *_ep,
259 259
260 spin_lock_irqsave(&udc->lock, flags); 260 spin_lock_irqsave(&udc->lock, flags);
261 261
262 maxp = usb_endpoint_maxp(desc) & 0x7ff; 262 maxp = usb_endpoint_maxp(desc);
263 _ep->maxpacket = maxp; 263 _ep->maxpacket = maxp;
264 ep->desc = desc; 264 ep->desc = desc;
265 ep->type = usb_endpoint_type(desc); 265 ep->type = usb_endpoint_type(desc);
@@ -549,30 +549,34 @@ static int init_vudc_hw(struct vudc *udc)
549 sprintf(ep->name, "ep%d%s", num, 549 sprintf(ep->name, "ep%d%s", num,
550 i ? (is_out ? "out" : "in") : ""); 550 i ? (is_out ? "out" : "in") : "");
551 ep->ep.name = ep->name; 551 ep->ep.name = ep->name;
552
553 ep->ep.ops = &vep_ops;
554
555 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
556 ep->ep.max_streams = 16;
557 ep->gadget = &udc->gadget;
558 INIT_LIST_HEAD(&ep->req_queue);
559
552 if (i == 0) { 560 if (i == 0) {
561 /* ep0 */
553 ep->ep.caps.type_control = true; 562 ep->ep.caps.type_control = true;
554 ep->ep.caps.dir_out = true; 563 ep->ep.caps.dir_out = true;
555 ep->ep.caps.dir_in = true; 564 ep->ep.caps.dir_in = true;
565
566 udc->gadget.ep0 = &ep->ep;
556 } else { 567 } else {
568 /* All other eps */
557 ep->ep.caps.type_iso = true; 569 ep->ep.caps.type_iso = true;
558 ep->ep.caps.type_int = true; 570 ep->ep.caps.type_int = true;
559 ep->ep.caps.type_bulk = true; 571 ep->ep.caps.type_bulk = true;
560 }
561 572
562 if (is_out) 573 if (is_out)
563 ep->ep.caps.dir_out = true; 574 ep->ep.caps.dir_out = true;
564 else 575 else
565 ep->ep.caps.dir_in = true; 576 ep->ep.caps.dir_in = true;
566 577
567 ep->ep.ops = &vep_ops; 578 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
568 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 579 }
569 ep->halted = ep->wedged = ep->already_seen =
570 ep->setup_stage = 0;
571 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
572 ep->ep.max_streams = 16;
573 ep->gadget = &udc->gadget;
574 ep->desc = NULL;
575 INIT_LIST_HEAD(&ep->req_queue);
576 } 580 }
577 581
578 spin_lock_init(&udc->lock); 582 spin_lock_init(&udc->lock);
@@ -589,9 +593,6 @@ static int init_vudc_hw(struct vudc *udc)
589 ud->eh_ops.reset = vudc_device_reset; 593 ud->eh_ops.reset = vudc_device_reset;
590 ud->eh_ops.unusable = vudc_device_unusable; 594 ud->eh_ops.unusable = vudc_device_unusable;
591 595
592 udc->gadget.ep0 = &udc->ep[0].ep;
593 list_del_init(&udc->ep[0].ep.ep_list);
594
595 v_init_timer(udc); 596 v_init_timer(udc);
596 return 0; 597 return 0;
597 598
diff --git a/drivers/usb/usbip/vudc_transfer.c b/drivers/usb/usbip/vudc_transfer.c
index aba6bd478045..4cfd475ee865 100644
--- a/drivers/usb/usbip/vudc_transfer.c
+++ b/drivers/usb/usbip/vudc_transfer.c
@@ -73,8 +73,8 @@ static int handle_control_request(struct vudc *udc, struct urb *urb,
73{ 73{
74 struct vep *ep2; 74 struct vep *ep2;
75 int ret_val = 1; 75 int ret_val = 1;
76 unsigned w_index; 76 unsigned int w_index;
77 unsigned w_value; 77 unsigned int w_value;
78 78
79 w_index = le16_to_cpu(setup->wIndex); 79 w_index = le16_to_cpu(setup->wIndex);
80 w_value = le16_to_cpu(setup->wValue); 80 w_value = le16_to_cpu(setup->wValue);
@@ -200,7 +200,7 @@ static int transfer(struct vudc *udc,
200top: 200top:
201 /* if there's no request queued, the device is NAKing; return */ 201 /* if there's no request queued, the device is NAKing; return */
202 list_for_each_entry(req, &ep->req_queue, req_entry) { 202 list_for_each_entry(req, &ep->req_queue, req_entry) {
203 unsigned host_len, dev_len, len; 203 unsigned int host_len, dev_len, len;
204 void *ubuf_pos, *rbuf_pos; 204 void *ubuf_pos, *rbuf_pos;
205 int is_short, to_host; 205 int is_short, to_host;
206 int rescan = 0; 206 int rescan = 0;
@@ -339,6 +339,8 @@ static void v_timer(unsigned long _vudc)
339 total = timer->frame_limit; 339 total = timer->frame_limit;
340 } 340 }
341 341
342 /* We have to clear ep0 flags separately as it's not on the list */
343 udc->ep[0].already_seen = 0;
342 list_for_each_entry(_ep, &udc->gadget.ep_list, ep_list) { 344 list_for_each_entry(_ep, &udc->gadget.ep_list, ep_list) {
343 ep = to_vep(_ep); 345 ep = to_vep(_ep);
344 ep->already_seen = 0; 346 ep->already_seen = 0;
diff --git a/drivers/usb/wusbcore/dev-sysfs.c b/drivers/usb/wusbcore/dev-sysfs.c
index 415b14002a61..d4de56b93d68 100644
--- a/drivers/usb/wusbcore/dev-sysfs.c
+++ b/drivers/usb/wusbcore/dev-sysfs.c
@@ -53,7 +53,7 @@ static ssize_t wusb_disconnect_store(struct device *dev,
53 wusbhc_put(wusbhc); 53 wusbhc_put(wusbhc);
54 return size; 54 return size;
55} 55}
56static DEVICE_ATTR(wusb_disconnect, 0200, NULL, wusb_disconnect_store); 56static DEVICE_ATTR_WO(wusb_disconnect);
57 57
58static ssize_t wusb_cdid_show(struct device *dev, 58static ssize_t wusb_cdid_show(struct device *dev,
59 struct device_attribute *attr, char *buf) 59 struct device_attribute *attr, char *buf)
@@ -69,7 +69,7 @@ static ssize_t wusb_cdid_show(struct device *dev,
69 wusb_dev_put(wusb_dev); 69 wusb_dev_put(wusb_dev);
70 return result + 1; 70 return result + 1;
71} 71}
72static DEVICE_ATTR(wusb_cdid, 0444, wusb_cdid_show, NULL); 72static DEVICE_ATTR_RO(wusb_cdid);
73 73
74static ssize_t wusb_ck_store(struct device *dev, 74static ssize_t wusb_ck_store(struct device *dev,
75 struct device_attribute *attr, 75 struct device_attribute *attr,
@@ -105,7 +105,7 @@ static ssize_t wusb_ck_store(struct device *dev,
105 wusbhc_put(wusbhc); 105 wusbhc_put(wusbhc);
106 return result < 0 ? result : size; 106 return result < 0 ? result : size;
107} 107}
108static DEVICE_ATTR(wusb_ck, 0200, NULL, wusb_ck_store); 108static DEVICE_ATTR_WO(wusb_ck);
109 109
110static struct attribute *wusb_dev_attrs[] = { 110static struct attribute *wusb_dev_attrs[] = {
111 &dev_attr_wusb_disconnect.attr, 111 &dev_attr_wusb_disconnect.attr,
diff --git a/drivers/usb/wusbcore/security.c b/drivers/usb/wusbcore/security.c
index 8c9421b69da0..170f2c38de9b 100644
--- a/drivers/usb/wusbcore/security.c
+++ b/drivers/usb/wusbcore/security.c
@@ -240,6 +240,7 @@ int wusb_dev_sec_add(struct wusbhc *wusbhc,
240 if (new_secd == NULL) { 240 if (new_secd == NULL) {
241 dev_err(dev, 241 dev_err(dev,
242 "Can't allocate space for security descriptors\n"); 242 "Can't allocate space for security descriptors\n");
243 result = -ENOMEM;
243 goto out; 244 goto out;
244 } 245 }
245 secd = new_secd; 246 secd = new_secd;
diff --git a/drivers/usb/wusbcore/wa-nep.c b/drivers/usb/wusbcore/wa-nep.c
index ed4622279c63..e3819fc182b0 100644
--- a/drivers/usb/wusbcore/wa-nep.c
+++ b/drivers/usb/wusbcore/wa-nep.c
@@ -198,6 +198,7 @@ static int wa_nep_queue(struct wahc *wa, size_t size)
198 if (nw == NULL) { 198 if (nw == NULL) {
199 if (printk_ratelimit()) 199 if (printk_ratelimit())
200 dev_err(dev, "No memory to queue notification\n"); 200 dev_err(dev, "No memory to queue notification\n");
201 result = -ENOMEM;
201 goto out; 202 goto out;
202 } 203 }
203 INIT_WORK(&nw->work, wa_notif_dispatch); 204 INIT_WORK(&nw->work, wa_notif_dispatch);
diff --git a/drivers/usb/wusbcore/wa-xfer.c b/drivers/usb/wusbcore/wa-xfer.c
index 167fcc71f5f6..e70322b1dd02 100644
--- a/drivers/usb/wusbcore/wa-xfer.c
+++ b/drivers/usb/wusbcore/wa-xfer.c
@@ -1203,6 +1203,7 @@ static int __wa_xfer_setup_segs(struct wa_xfer *xfer, size_t xfer_hdr_size)
1203 sizeof(struct wa_xfer_packet_info_hwaiso) + 1203 sizeof(struct wa_xfer_packet_info_hwaiso) +
1204 (seg_isoc_frame_count * sizeof(__le16)); 1204 (seg_isoc_frame_count * sizeof(__le16));
1205 } 1205 }
1206 result = -ENOMEM;
1206 seg = xfer->seg[cnt] = kmalloc(alloc_size + iso_pkt_descr_size, 1207 seg = xfer->seg[cnt] = kmalloc(alloc_size + iso_pkt_descr_size,
1207 GFP_ATOMIC); 1208 GFP_ATOMIC);
1208 if (seg == NULL) 1209 if (seg == NULL)
diff --git a/drivers/usb/wusbcore/wusbhc.c b/drivers/usb/wusbcore/wusbhc.c
index 94f401ab859f..a273a91cf667 100644
--- a/drivers/usb/wusbcore/wusbhc.c
+++ b/drivers/usb/wusbcore/wusbhc.c
@@ -84,8 +84,7 @@ static ssize_t wusb_trust_timeout_store(struct device *dev,
84out: 84out:
85 return result < 0 ? result : size; 85 return result < 0 ? result : size;
86} 86}
87static DEVICE_ATTR(wusb_trust_timeout, 0644, wusb_trust_timeout_show, 87static DEVICE_ATTR_RW(wusb_trust_timeout);
88 wusb_trust_timeout_store);
89 88
90/* 89/*
91 * Show the current WUSB CHID. 90 * Show the current WUSB CHID.
@@ -145,7 +144,7 @@ static ssize_t wusb_chid_store(struct device *dev,
145 result = wusbhc_chid_set(wusbhc, &chid); 144 result = wusbhc_chid_set(wusbhc, &chid);
146 return result < 0 ? result : size; 145 return result < 0 ? result : size;
147} 146}
148static DEVICE_ATTR(wusb_chid, 0644, wusb_chid_show, wusb_chid_store); 147static DEVICE_ATTR_RW(wusb_chid);
149 148
150 149
151static ssize_t wusb_phy_rate_show(struct device *dev, 150static ssize_t wusb_phy_rate_show(struct device *dev,
@@ -174,8 +173,7 @@ static ssize_t wusb_phy_rate_store(struct device *dev,
174 wusbhc->phy_rate = phy_rate; 173 wusbhc->phy_rate = phy_rate;
175 return size; 174 return size;
176} 175}
177static DEVICE_ATTR(wusb_phy_rate, 0644, wusb_phy_rate_show, 176static DEVICE_ATTR_RW(wusb_phy_rate);
178 wusb_phy_rate_store);
179 177
180static ssize_t wusb_dnts_show(struct device *dev, 178static ssize_t wusb_dnts_show(struct device *dev,
181 struct device_attribute *attr, 179 struct device_attribute *attr,
@@ -205,7 +203,7 @@ static ssize_t wusb_dnts_store(struct device *dev,
205 203
206 return size; 204 return size;
207} 205}
208static DEVICE_ATTR(wusb_dnts, 0644, wusb_dnts_show, wusb_dnts_store); 206static DEVICE_ATTR_RW(wusb_dnts);
209 207
210static ssize_t wusb_retry_count_show(struct device *dev, 208static ssize_t wusb_retry_count_show(struct device *dev,
211 struct device_attribute *attr, 209 struct device_attribute *attr,
@@ -234,8 +232,7 @@ static ssize_t wusb_retry_count_store(struct device *dev,
234 232
235 return size; 233 return size;
236} 234}
237static DEVICE_ATTR(wusb_retry_count, 0644, wusb_retry_count_show, 235static DEVICE_ATTR_RW(wusb_retry_count);
238 wusb_retry_count_store);
239 236
240/* Group all the WUSBHC attributes */ 237/* Group all the WUSBHC attributes */
241static struct attribute *wusbhc_attrs[] = { 238static struct attribute *wusbhc_attrs[] = {
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index f2912914141a..60cef8227534 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -100,6 +100,7 @@ struct fsl_usb2_platform_data {
100 unsigned already_suspended:1; 100 unsigned already_suspended:1;
101 unsigned has_fsl_erratum_a007792:1; 101 unsigned has_fsl_erratum_a007792:1;
102 unsigned has_fsl_erratum_a005275:1; 102 unsigned has_fsl_erratum_a005275:1;
103 unsigned has_fsl_erratum_a005697:1;
103 unsigned check_phy_clk_valid:1; 104 unsigned check_phy_clk_valid:1;
104 105
105 /* register save area for suspend/resume */ 106 /* register save area for suspend/resume */
diff --git a/include/linux/usb.h b/include/linux/usb.h
index eba1f10e8cfd..7e68259360de 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -1160,7 +1160,7 @@ extern struct bus_type usb_bus_type;
1160 * @minor_base: the start of the minor range for this driver. 1160 * @minor_base: the start of the minor range for this driver.
1161 * 1161 *
1162 * This structure is used for the usb_register_dev() and 1162 * This structure is used for the usb_register_dev() and
1163 * usb_unregister_dev() functions, to consolidate a number of the 1163 * usb_deregister_dev() functions, to consolidate a number of the
1164 * parameters used for them. 1164 * parameters used for them.
1165 */ 1165 */
1166struct usb_class_driver { 1166struct usb_class_driver {
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 8e81f9eb95e4..e4516e9ded0f 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -429,7 +429,9 @@ static inline struct usb_gadget *dev_to_usb_gadget(struct device *dev)
429 */ 429 */
430static inline size_t usb_ep_align(struct usb_ep *ep, size_t len) 430static inline size_t usb_ep_align(struct usb_ep *ep, size_t len)
431{ 431{
432 return round_up(len, (size_t)le16_to_cpu(ep->desc->wMaxPacketSize)); 432 int max_packet_size = (size_t)usb_endpoint_maxp(ep->desc) & 0x7ff;
433
434 return round_up(len, max_packet_size);
433} 435}
434 436
435/** 437/**
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index 66fc13705ab7..40edf6a8533e 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -566,21 +566,22 @@ extern void usb_ep0_reinit(struct usb_device *);
566 ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8) 566 ((USB_DIR_OUT|USB_TYPE_STANDARD|USB_RECIP_INTERFACE)<<8)
567 567
568/* class requests from the USB 2.0 hub spec, table 11-15 */ 568/* class requests from the USB 2.0 hub spec, table 11-15 */
569#define HUB_CLASS_REQ(dir, type, request) ((((dir) | (type)) << 8) | (request))
569/* GetBusState and SetHubDescriptor are optional, omitted */ 570/* GetBusState and SetHubDescriptor are optional, omitted */
570#define ClearHubFeature (0x2000 | USB_REQ_CLEAR_FEATURE) 571#define ClearHubFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, USB_REQ_CLEAR_FEATURE)
571#define ClearPortFeature (0x2300 | USB_REQ_CLEAR_FEATURE) 572#define ClearPortFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, USB_REQ_CLEAR_FEATURE)
572#define GetHubDescriptor (0xa000 | USB_REQ_GET_DESCRIPTOR) 573#define GetHubDescriptor HUB_CLASS_REQ(USB_DIR_IN, USB_RT_HUB, USB_REQ_GET_DESCRIPTOR)
573#define GetHubStatus (0xa000 | USB_REQ_GET_STATUS) 574#define GetHubStatus HUB_CLASS_REQ(USB_DIR_IN, USB_RT_HUB, USB_REQ_GET_STATUS)
574#define GetPortStatus (0xa300 | USB_REQ_GET_STATUS) 575#define GetPortStatus HUB_CLASS_REQ(USB_DIR_IN, USB_RT_PORT, USB_REQ_GET_STATUS)
575#define SetHubFeature (0x2000 | USB_REQ_SET_FEATURE) 576#define SetHubFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, USB_REQ_SET_FEATURE)
576#define SetPortFeature (0x2300 | USB_REQ_SET_FEATURE) 577#define SetPortFeature HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_PORT, USB_REQ_SET_FEATURE)
577 578
578 579
579/*-------------------------------------------------------------------------*/ 580/*-------------------------------------------------------------------------*/
580 581
581/* class requests from USB 3.1 hub spec, table 10-7 */ 582/* class requests from USB 3.1 hub spec, table 10-7 */
582#define SetHubDepth (0x2000 | HUB_SET_DEPTH) 583#define SetHubDepth HUB_CLASS_REQ(USB_DIR_OUT, USB_RT_HUB, HUB_SET_DEPTH)
583#define GetPortErrorCount (0xa300 | HUB_GET_PORT_ERR_COUNT) 584#define GetPortErrorCount HUB_CLASS_REQ(USB_DIR_IN, USB_RT_PORT, HUB_GET_PORT_ERR_COUNT)
584 585
585/* 586/*
586 * Generic bandwidth allocation constants/support 587 * Generic bandwidth allocation constants/support
diff --git a/include/uapi/linux/usb/ch9.h b/include/uapi/linux/usb/ch9.h
index a8acc24765fe..2c5d7c4a69e3 100644
--- a/include/uapi/linux/usb/ch9.h
+++ b/include/uapi/linux/usb/ch9.h
@@ -423,6 +423,12 @@ struct usb_endpoint_descriptor {
423#define USB_ENDPOINT_XFER_INT 3 423#define USB_ENDPOINT_XFER_INT 3
424#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80 424#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
425 425
426#define USB_ENDPOINT_MAXP_MASK 0x07ff
427#define USB_EP_MAXP_MULT_SHIFT 11
428#define USB_EP_MAXP_MULT_MASK (3 << USB_EP_MAXP_MULT_SHIFT)
429#define USB_EP_MAXP_MULT(m) \
430 (((m) & USB_EP_MAXP_MULT_MASK) >> USB_EP_MAXP_MULT_SHIFT)
431
426/* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */ 432/* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
427#define USB_ENDPOINT_INTRTYPE 0x30 433#define USB_ENDPOINT_INTRTYPE 0x30
428#define USB_ENDPOINT_INTR_PERIODIC (0 << 4) 434#define USB_ENDPOINT_INTR_PERIODIC (0 << 4)
@@ -623,11 +629,25 @@ static inline int usb_endpoint_is_isoc_out(
623 * usb_endpoint_maxp - get endpoint's max packet size 629 * usb_endpoint_maxp - get endpoint's max packet size
624 * @epd: endpoint to be checked 630 * @epd: endpoint to be checked
625 * 631 *
626 * Returns @epd's max packet 632 * Returns @epd's max packet bits [10:0]
627 */ 633 */
628static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd) 634static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
629{ 635{
630 return __le16_to_cpu(epd->wMaxPacketSize); 636 return __le16_to_cpu(epd->wMaxPacketSize) & USB_ENDPOINT_MAXP_MASK;
637}
638
639/**
640 * usb_endpoint_maxp_mult - get endpoint's transactional opportunities
641 * @epd: endpoint to be checked
642 *
643 * Return @epd's wMaxPacketSize[12:11] + 1
644 */
645static inline int
646usb_endpoint_maxp_mult(const struct usb_endpoint_descriptor *epd)
647{
648 int maxp = __le16_to_cpu(epd->wMaxPacketSize);
649
650 return USB_EP_MAXP_MULT(maxp) + 1;
631} 651}
632 652
633static inline int usb_endpoint_interrupt_type( 653static inline int usb_endpoint_interrupt_type(
diff --git a/tools/usb/usbip/.gitignore b/tools/usb/usbip/.gitignore
index 9aad9e30a8ba..03b892c8bd8c 100644
--- a/tools/usb/usbip/.gitignore
+++ b/tools/usb/usbip/.gitignore
@@ -2,6 +2,7 @@ Makefile
2Makefile.in 2Makefile.in
3aclocal.m4 3aclocal.m4
4autom4te.cache/ 4autom4te.cache/
5compile
5config.guess 6config.guess
6config.h 7config.h
7config.h.in 8config.h.in
@@ -21,7 +22,10 @@ src/Makefile.in
21stamp-h1 22stamp-h1
22libsrc/libusbip.la 23libsrc/libusbip.la
23libsrc/libusbip_la-names.lo 24libsrc/libusbip_la-names.lo
25libsrc/libusbip_la-sysfs_utils.lo
24libsrc/libusbip_la-usbip_common.lo 26libsrc/libusbip_la-usbip_common.lo
27libsrc/libusbip_la-usbip_device_driver.lo
28libsrc/libusbip_la-usbip_host_common.lo
25libsrc/libusbip_la-usbip_host_driver.lo 29libsrc/libusbip_la-usbip_host_driver.lo
26libsrc/libusbip_la-vhci_driver.lo 30libsrc/libusbip_la-vhci_driver.lo
27src/usbip 31src/usbip
diff --git a/tools/usb/usbip/src/usbipd.c b/tools/usb/usbip/src/usbipd.c
index a0972dea9e6c..009afb4a3aae 100644
--- a/tools/usb/usbip/src/usbipd.c
+++ b/tools/usb/usbip/src/usbipd.c
@@ -398,13 +398,6 @@ static int listen_all_addrinfo(struct addrinfo *ai_head, int sockfdlist[],
398 * (see do_standalone_mode()) */ 398 * (see do_standalone_mode()) */
399 usbip_net_set_v6only(sock); 399 usbip_net_set_v6only(sock);
400 400
401 if (sock >= FD_SETSIZE) {
402 err("FD_SETSIZE: %s: sock=%d, max=%d",
403 ai_buf, sock, FD_SETSIZE);
404 close(sock);
405 continue;
406 }
407
408 ret = bind(sock, ai->ai_addr, ai->ai_addrlen); 401 ret = bind(sock, ai->ai_addr, ai->ai_addrlen);
409 if (ret < 0) { 402 if (ret < 0) {
410 err("bind: %s: %d (%s)", 403 err("bind: %s: %d (%s)",