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authorCharles Keepax <ckeepax@opensource.wolfsonmicro.com>2016-10-25 11:42:29 -0400
committerMark Brown <broonie@kernel.org>2016-10-25 15:13:36 -0400
commit03d2ec460f126d8f4409d137b5865bc4eca253c0 (patch)
tree15585ba57e0d629aead4fdba74fc81c7ef98d668
parent1001354ca34179f3db924eb66672442a173147dc (diff)
ASoC: cs42xx8: Mark chip ID as volatile and remove cache bypass
Rather than manually enabling cache bypass when reading the ID registers simply remove the default which will cause the first read to go to the hardware. The old code worked this is simply the more standard way to implement this. There is a comment included in the code that claims the chip ID register also contains the right input volume, however this is clearly not the case from the rest of the driver. Further investigation reveals exactly the same comment in the wm8962 driver, where this is the case, so this is almost certainly a copy and paste error from when the driver was created. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Acked-by: Brian Austin <brian.austin@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/codecs/cs42xx8.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/sound/soc/codecs/cs42xx8.c b/sound/soc/codecs/cs42xx8.c
index b4d87379d2bc..c1785bd4ff19 100644
--- a/sound/soc/codecs/cs42xx8.c
+++ b/sound/soc/codecs/cs42xx8.c
@@ -321,7 +321,6 @@ static struct snd_soc_dai_driver cs42xx8_dai = {
321}; 321};
322 322
323static const struct reg_default cs42xx8_reg[] = { 323static const struct reg_default cs42xx8_reg[] = {
324 { 0x01, 0x01 }, /* Chip I.D. and Revision Register */
325 { 0x02, 0x00 }, /* Power Control */ 324 { 0x02, 0x00 }, /* Power Control */
326 { 0x03, 0xF0 }, /* Functional Mode */ 325 { 0x03, 0xF0 }, /* Functional Mode */
327 { 0x04, 0x46 }, /* Interface Formats */ 326 { 0x04, 0x46 }, /* Interface Formats */
@@ -498,13 +497,6 @@ int cs42xx8_probe(struct device *dev, struct regmap *regmap)
498 /* Make sure hardware reset done */ 497 /* Make sure hardware reset done */
499 msleep(5); 498 msleep(5);
500 499
501 /*
502 * We haven't marked the chip revision as volatile due to
503 * sharing a register with the right input volume; explicitly
504 * bypass the cache to read it.
505 */
506 regcache_cache_bypass(cs42xx8->regmap, true);
507
508 /* Validate the chip ID */ 500 /* Validate the chip ID */
509 ret = regmap_read(cs42xx8->regmap, CS42XX8_CHIPID, &val); 501 ret = regmap_read(cs42xx8->regmap, CS42XX8_CHIPID, &val);
510 if (ret < 0) { 502 if (ret < 0) {
@@ -523,8 +515,6 @@ int cs42xx8_probe(struct device *dev, struct regmap *regmap)
523 dev_info(dev, "found device, revision %X\n", 515 dev_info(dev, "found device, revision %X\n",
524 val & CS42XX8_CHIPID_REV_ID_MASK); 516 val & CS42XX8_CHIPID_REV_ID_MASK);
525 517
526 regcache_cache_bypass(cs42xx8->regmap, false);
527
528 cs42xx8_dai.name = cs42xx8->drvdata->name; 518 cs42xx8_dai.name = cs42xx8->drvdata->name;
529 519
530 /* Each adc supports stereo input */ 520 /* Each adc supports stereo input */