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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2017-09-01 10:31:23 -0400 |
---|---|---|
committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-09-01 13:30:43 -0400 |
commit | 034263a3b9a9d02de81ebafe40e77c6cde80d23f (patch) | |
tree | 021bd43a7a410ef93ddceb9efc0e6bd8afc37604 | |
parent | 43d57414b6e9f31809c2bd25b0545b887ce6ab09 (diff) |
drm/i915: Fix enum pipe vs. enum transcoder for the PCH transcoder
Use enum pipe for PCH transcoders also in the FIFO underrun code.
Fixes the following new sparse warnings:
intel_fifo_underrun.c:340:49: warning: mixing different enum types
intel_fifo_underrun.c:340:49: int enum pipe versus
intel_fifo_underrun.c:340:49: int enum transcoder
intel_fifo_underrun.c:344:49: warning: mixing different enum types
intel_fifo_underrun.c:344:49: int enum pipe versus
intel_fifo_underrun.c:344:49: int enum transcoder
intel_fifo_underrun.c:397:57: warning: mixing different enum types
intel_fifo_underrun.c:397:57: int enum pipe versus
intel_fifo_underrun.c:397:57: int enum transcoder
intel_fifo_underrun.c:398:17: warning: mixing different enum types
intel_fifo_underrun.c:398:17: int enum pipe versus
intel_fifo_underrun.c:398:17: int enum transcoder
Cc: Matthias Kaehlcke <mka@chromium.org>
Fixes: a21960339c8c ("drm/i915: Consistently use enum pipe for PCH transcoders")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170901143123.7590-3-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 41c32e5da3ff3922490341a988b2a3ae46d0b6a8)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/i915_trace.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_fifo_underrun.c | 20 |
2 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index b24a83d43559..6fd5c57e21f6 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h | |||
@@ -38,7 +38,7 @@ TRACE_EVENT(intel_cpu_fifo_underrun, | |||
38 | ); | 38 | ); |
39 | 39 | ||
40 | TRACE_EVENT(intel_pch_fifo_underrun, | 40 | TRACE_EVENT(intel_pch_fifo_underrun, |
41 | TP_PROTO(struct drm_i915_private *dev_priv, enum transcoder pch_transcoder), | 41 | TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pch_transcoder), |
42 | TP_ARGS(dev_priv, pch_transcoder), | 42 | TP_ARGS(dev_priv, pch_transcoder), |
43 | 43 | ||
44 | TP_STRUCT__entry( | 44 | TP_STRUCT__entry( |
@@ -48,7 +48,7 @@ TRACE_EVENT(intel_pch_fifo_underrun, | |||
48 | ), | 48 | ), |
49 | 49 | ||
50 | TP_fast_assign( | 50 | TP_fast_assign( |
51 | enum pipe pipe = (enum pipe)pch_transcoder; | 51 | enum pipe pipe = pch_transcoder; |
52 | __entry->pipe = pipe; | 52 | __entry->pipe = pipe; |
53 | __entry->frame = dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe); | 53 | __entry->frame = dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe); |
54 | __entry->scanline = intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe)); | 54 | __entry->scanline = intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe)); |
diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c index 5a7cca32c0fa..04689600e337 100644 --- a/drivers/gpu/drm/i915/intel_fifo_underrun.c +++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c | |||
@@ -187,11 +187,11 @@ static void broadwell_set_fifo_underrun_reporting(struct drm_device *dev, | |||
187 | } | 187 | } |
188 | 188 | ||
189 | static void ibx_set_fifo_underrun_reporting(struct drm_device *dev, | 189 | static void ibx_set_fifo_underrun_reporting(struct drm_device *dev, |
190 | enum transcoder pch_transcoder, | 190 | enum pipe pch_transcoder, |
191 | bool enable) | 191 | bool enable) |
192 | { | 192 | { |
193 | struct drm_i915_private *dev_priv = to_i915(dev); | 193 | struct drm_i915_private *dev_priv = to_i915(dev); |
194 | uint32_t bit = (pch_transcoder == TRANSCODER_A) ? | 194 | uint32_t bit = (pch_transcoder == PIPE_A) ? |
195 | SDE_TRANSA_FIFO_UNDER : SDE_TRANSB_FIFO_UNDER; | 195 | SDE_TRANSA_FIFO_UNDER : SDE_TRANSB_FIFO_UNDER; |
196 | 196 | ||
197 | if (enable) | 197 | if (enable) |
@@ -203,7 +203,7 @@ static void ibx_set_fifo_underrun_reporting(struct drm_device *dev, | |||
203 | static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc) | 203 | static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc) |
204 | { | 204 | { |
205 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); | 205 | struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); |
206 | enum transcoder pch_transcoder = (enum transcoder) crtc->pipe; | 206 | enum pipe pch_transcoder = crtc->pipe; |
207 | uint32_t serr_int = I915_READ(SERR_INT); | 207 | uint32_t serr_int = I915_READ(SERR_INT); |
208 | 208 | ||
209 | lockdep_assert_held(&dev_priv->irq_lock); | 209 | lockdep_assert_held(&dev_priv->irq_lock); |
@@ -215,12 +215,12 @@ static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc) | |||
215 | POSTING_READ(SERR_INT); | 215 | POSTING_READ(SERR_INT); |
216 | 216 | ||
217 | trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder); | 217 | trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder); |
218 | DRM_ERROR("pch fifo underrun on pch transcoder %s\n", | 218 | DRM_ERROR("pch fifo underrun on pch transcoder %c\n", |
219 | transcoder_name(pch_transcoder)); | 219 | pipe_name(pch_transcoder)); |
220 | } | 220 | } |
221 | 221 | ||
222 | static void cpt_set_fifo_underrun_reporting(struct drm_device *dev, | 222 | static void cpt_set_fifo_underrun_reporting(struct drm_device *dev, |
223 | enum transcoder pch_transcoder, | 223 | enum pipe pch_transcoder, |
224 | bool enable, bool old) | 224 | bool enable, bool old) |
225 | { | 225 | { |
226 | struct drm_i915_private *dev_priv = to_i915(dev); | 226 | struct drm_i915_private *dev_priv = to_i915(dev); |
@@ -238,8 +238,8 @@ static void cpt_set_fifo_underrun_reporting(struct drm_device *dev, | |||
238 | 238 | ||
239 | if (old && I915_READ(SERR_INT) & | 239 | if (old && I915_READ(SERR_INT) & |
240 | SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) { | 240 | SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) { |
241 | DRM_ERROR("uncleared pch fifo underrun on pch transcoder %s\n", | 241 | DRM_ERROR("uncleared pch fifo underrun on pch transcoder %c\n", |
242 | transcoder_name(pch_transcoder)); | 242 | pipe_name(pch_transcoder)); |
243 | } | 243 | } |
244 | } | 244 | } |
245 | } | 245 | } |
@@ -395,8 +395,8 @@ void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, | |||
395 | if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, | 395 | if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, |
396 | false)) { | 396 | false)) { |
397 | trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder); | 397 | trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder); |
398 | DRM_ERROR("PCH transcoder %s FIFO underrun\n", | 398 | DRM_ERROR("PCH transcoder %c FIFO underrun\n", |
399 | transcoder_name(pch_transcoder)); | 399 | pipe_name(pch_transcoder)); |
400 | } | 400 | } |
401 | } | 401 | } |
402 | 402 | ||