powerpc/powernv: Define and set POWER9 HFSCR doorbell bit

Define and set the POWER9 HFSCR doorbell bit so that guests can use
msgsndp.

ISA 3.0 calls this MSGP, so name it accordingly in the code.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

2 files changed, 3 insertions, 1 deletions

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c94df450bdd6..04aa1ee8cdb6 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -309,6 +309,7 @@
 
 /* HFSCR and FSCR bit numbers are the same */
 #define FSCR_LM_LG      11      /* Enable Load Monitor Registers */
+#define FSCR_MSGP_LG    10      /* Enable MSGP */
 #define FSCR_TAR_LG     8       /* Enable Target Address Register */
 #define FSCR_EBB_LG     7       /* Enable Event Based Branching */
 #define FSCR_TM_LG      5       /* Enable Transactional Memory */
@@ -324,6 +325,7 @@
 #define   FSCR_DSCR     __MASK(FSCR_DSCR_LG)
 #define SPRN_HFSCR      0xbe    /* HV=1 Facility Status & Control Register */
 #define   HFSCR_LM      __MASK(FSCR_LM_LG)
+#define   HFSCR_MSGP    __MASK(FSCR_MSGP_LG)
 #define   HFSCR_TAR     __MASK(FSCR_TAR_LG)
 #define   HFSCR_EBB     __MASK(FSCR_EBB_LG)
 #define   HFSCR_TM      __MASK(FSCR_TM_LG)
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index 52ff3f025437..bdfc1c67eb38 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -174,7 +174,7 @@ __init_FSCR:
 __init_HFSCR:
         mfspr   r3,SPRN_HFSCR
         ori     r3,r3,HFSCR_TAR|HFSCR_TM|HFSCR_BHRB|HFSCR_PM|\
-                      HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP|HFSCR_EBB
+                      HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP|HFSCR_EBB|HFSCR_MSGP
         mtspr   SPRN_HFSCR,r3
         blr