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authorSibi Sankar <sibis@codeaurora.org>2019-05-13 06:20:14 -0400
committerAndy Gross <agross@kernel.org>2019-05-29 22:40:44 -0400
commit02e03c897a96d42c3cb6c31bce8ba635ef19a55c (patch)
tree61ae5e0deb744ac6938b1eef8b835f57acf6fb13
parentdec9a05a147e4988e1f743c0d0a1389a0552e322 (diff)
soc: qcom: rpmpd: Add MSM8998 power-domains
Add the shared cx/mx and sensor sub-system's cx and mx power-domains found on MSM8998. Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
-rw-r--r--drivers/soc/qcom/rpmpd.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/soc/qcom/rpmpd.c b/drivers/soc/qcom/rpmpd.c
index 63db8b26642c..3c1a55cf25d6 100644
--- a/drivers/soc/qcom/rpmpd.c
+++ b/drivers/soc/qcom/rpmpd.c
@@ -20,9 +20,12 @@
20 * RPMPD_X is X encoded as a little-endian, lower-case, ASCII string */ 20 * RPMPD_X is X encoded as a little-endian, lower-case, ASCII string */
21#define RPMPD_SMPA 0x61706d73 21#define RPMPD_SMPA 0x61706d73
22#define RPMPD_LDOA 0x616f646c 22#define RPMPD_LDOA 0x616f646c
23#define RPMPD_RWCX 0x78637772
23#define RPMPD_RWMX 0x786d7772 24#define RPMPD_RWMX 0x786d7772
24#define RPMPD_RWLC 0x636c7772 25#define RPMPD_RWLC 0x636c7772
25#define RPMPD_RWLM 0x6d6c7772 26#define RPMPD_RWLM 0x6d6c7772
27#define RPMPD_RWSC 0x63737772
28#define RPMPD_RWSM 0x6d737772
26 29
27/* Operation Keys */ 30/* Operation Keys */
28#define KEY_CORNER 0x6e726f63 /* corn */ 31#define KEY_CORNER 0x6e726f63 /* corn */
@@ -136,6 +139,38 @@ static const struct rpmpd_desc msm8996_desc = {
136 .max_state = MAX_8996_RPMPD_STATE, 139 .max_state = MAX_8996_RPMPD_STATE,
137}; 140};
138 141
142/* msm8998 RPM Power domains */
143DEFINE_RPMPD_PAIR(msm8998, vddcx, vddcx_ao, RWCX, LEVEL, 0);
144DEFINE_RPMPD_VFL(msm8998, vddcx_vfl, RWCX, 0);
145
146DEFINE_RPMPD_PAIR(msm8998, vddmx, vddmx_ao, RWMX, LEVEL, 0);
147DEFINE_RPMPD_VFL(msm8998, vddmx_vfl, RWMX, 0);
148
149DEFINE_RPMPD_LEVEL(msm8998, vdd_ssccx, RWSC, 0);
150DEFINE_RPMPD_VFL(msm8998, vdd_ssccx_vfl, RWSC, 0);
151
152DEFINE_RPMPD_LEVEL(msm8998, vdd_sscmx, RWSM, 0);
153DEFINE_RPMPD_VFL(msm8998, vdd_sscmx_vfl, RWSM, 0);
154
155static struct rpmpd *msm8998_rpmpds[] = {
156 [MSM8998_VDDCX] = &msm8998_vddcx,
157 [MSM8998_VDDCX_AO] = &msm8998_vddcx_ao,
158 [MSM8998_VDDCX_VFL] = &msm8998_vddcx_vfl,
159 [MSM8998_VDDMX] = &msm8998_vddmx,
160 [MSM8998_VDDMX_AO] = &msm8998_vddmx_ao,
161 [MSM8998_VDDMX_VFL] = &msm8998_vddmx_vfl,
162 [MSM8998_SSCCX] = &msm8998_vdd_ssccx,
163 [MSM8998_SSCCX_VFL] = &msm8998_vdd_ssccx_vfl,
164 [MSM8998_SSCMX] = &msm8998_vdd_sscmx,
165 [MSM8998_SSCMX_VFL] = &msm8998_vdd_sscmx_vfl,
166};
167
168static const struct rpmpd_desc msm8998_desc = {
169 .rpmpds = msm8998_rpmpds,
170 .num_pds = ARRAY_SIZE(msm8998_rpmpds),
171 .max_state = RPM_SMD_LEVEL_BINNING,
172};
173
139/* qcs404 RPM Power domains */ 174/* qcs404 RPM Power domains */
140DEFINE_RPMPD_PAIR(qcs404, vddmx, vddmx_ao, RWMX, LEVEL, 0); 175DEFINE_RPMPD_PAIR(qcs404, vddmx, vddmx_ao, RWMX, LEVEL, 0);
141DEFINE_RPMPD_VFL(qcs404, vddmx_vfl, RWMX, 0); 176DEFINE_RPMPD_VFL(qcs404, vddmx_vfl, RWMX, 0);
@@ -164,6 +199,7 @@ static const struct rpmpd_desc qcs404_desc = {
164 199
165static const struct of_device_id rpmpd_match_table[] = { 200static const struct of_device_id rpmpd_match_table[] = {
166 { .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc }, 201 { .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
202 { .compatible = "qcom,msm8998-rpmpd", .data = &msm8998_desc },
167 { .compatible = "qcom,qcs404-rpmpd", .data = &qcs404_desc }, 203 { .compatible = "qcom,qcs404-rpmpd", .data = &qcs404_desc },
168 { } 204 { }
169}; 205};